drivers/mtd/nand/spi/core.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Copyright (C) 2016-2017 Micron Technology, Inc.
   4  *
   5  * Authors:
   6  *      Peter Pan <peterpandong@micron.com>
   7  *      Boris Brezillon <boris.brezillon@bootlin.com>
   8  */
   9
  10 #define pr_fmt(fmt)     "spi-nand: " fmt
  11
  12 #include <linux/device.h>
  13 #include <linux/jiffies.h>
  14 #include <linux/kernel.h>
  15 #include <linux/module.h>
  16 #include <linux/mtd/spinand.h>
  17 #include <linux/of.h>
  18 #include <linux/slab.h>
  19 #include <linux/spi/spi.h>
  20 #include <linux/spi/spi-mem.h>
  21
  22 static void spinand_cache_op_adjust_colum(struct spinand_device *spinand,
  23                                           const struct nand_page_io_req *req,
  24                                           u16 *column)
  25 {
  26         struct nand_device *nand = spinand_to_nand(spinand);
  27         unsigned int shift;
  28
  29         if (nand->memorg.planes_per_lun < 2)
  30                 return;
  31
  32         /* The plane number is passed in MSB just above the column address */
  33         shift = fls(nand->memorg.pagesize);
  34         *column |= req->pos.plane << shift;
  35 }
  36
  37 static int spinand_read_reg_op(struct spinand_device *spinand, u8 reg, u8 *val)
  38 {
  39         struct spi_mem_op op = SPINAND_GET_FEATURE_OP(reg,
  40                                                       spinand->scratchbuf);
  41         int ret;
  42
  43         ret = spi_mem_exec_op(spinand->spimem, &op);
  44         if (ret)
  45                 return ret;
  46
  47         *val = *spinand->scratchbuf;
  48         return 0;
  49 }
  50
  51 static int spinand_write_reg_op(struct spinand_device *spinand, u8 reg, u8 val)
  52 {
  53         struct spi_mem_op op = SPINAND_SET_FEATURE_OP(reg,
  54                                                       spinand->scratchbuf);
  55
  56         *spinand->scratchbuf = val;
  57         return spi_mem_exec_op(spinand->spimem, &op);
  58 }
  59
  60 static int spinand_read_status(struct spinand_device *spinand, u8 *status)
  61 {
  62         return spinand_read_reg_op(spinand, REG_STATUS, status);
  63 }
  64
  65 static int spinand_get_cfg(struct spinand_device *spinand, u8 *cfg)
  66 {
  67         struct nand_device *nand = spinand_to_nand(spinand);
  68
  69         if (WARN_ON(spinand->cur_target < 0 ||
  70                     spinand->cur_target >= nand->memorg.ntargets))
  71                 return -EINVAL;
  72
  73         *cfg = spinand->cfg_cache[spinand->cur_target];
  74         return 0;
  75 }
  76
  77 static int spinand_set_cfg(struct spinand_device *spinand, u8 cfg)
  78 {
  79         struct nand_device *nand = spinand_to_nand(spinand);
  80         int ret;
  81
  82         if (WARN_ON(spinand->cur_target < 0 ||
  83                     spinand->cur_target >= nand->memorg.ntargets))
  84                 return -EINVAL;
  85
  86         if (spinand->cfg_cache[spinand->cur_target] == cfg)
  87                 return 0;
  88
  89         ret = spinand_write_reg_op(spinand, REG_CFG, cfg);
  90         if (ret)
  91                 return ret;
  92
  93         spinand->cfg_cache[spinand->cur_target] = cfg;
  94         return 0;
  95 }
  96
  97 /**
  98  * spinand_upd_cfg() - Update the configuration register
  99  * @spinand: the spinand device
 100  * @mask: the mask encoding the bits to update in the config reg
 101  * @val: the new value to apply
 102  *
 103  * Update the configuration register.
 104  *
 105  * Return: 0 on success, a negative error code otherwise.
 106  */
 107 int spinand_upd_cfg(struct spinand_device *spinand, u8 mask, u8 val)
 108 {
 109         int ret;
 110         u8 cfg;
 111
 112         ret = spinand_get_cfg(spinand, &cfg);
 113         if (ret)
 114                 return ret;
 115
 116         cfg &= ~mask;
 117         cfg |= val;
 118
 119         return spinand_set_cfg(spinand, cfg);
 120 }
 121
 122 /**
 123  * spinand_select_target() - Select a specific NAND target/die
 124  * @spinand: the spinand device
 125  * @target: the target/die to select
 126  *
 127  * Select a new target/die. If chip only has one die, this function is a NOOP.
 128  *
 129  * Return: 0 on success, a negative error code otherwise.
 130  */
 131 int spinand_select_target(struct spinand_device *spinand, unsigned int target)
 132 {
 133         struct nand_device *nand = spinand_to_nand(spinand);
 134         int ret;
 135
 136         if (WARN_ON(target >= nand->memorg.ntargets))
 137                 return -EINVAL;
 138
 139         if (spinand->cur_target == target)
 140                 return 0;
 141
 142         if (nand->memorg.ntargets == 1) {
 143                 spinand->cur_target = target;
 144                 return 0;
 145         }
 146
 147         ret = spinand->select_target(spinand, target);
 148         if (ret)
 149                 return ret;
 150
 151         spinand->cur_target = target;
 152         return 0;
 153 }
 154
 155 static int spinand_init_cfg_cache(struct spinand_device *spinand)
 156 {
 157         struct nand_device *nand = spinand_to_nand(spinand);
 158         struct device *dev = &spinand->spimem->spi->dev;
 159         unsigned int target;
 160         int ret;
 161
 162         spinand->cfg_cache = devm_kcalloc(dev,
 163                                           nand->memorg.ntargets,
 164                                           sizeof(*spinand->cfg_cache),
 165                                           GFP_KERNEL);
 166         if (!spinand->cfg_cache)
 167                 return -ENOMEM;
 168
 169         for (target = 0; target < nand->memorg.ntargets; target++) {
 170                 ret = spinand_select_target(spinand, target);
 171                 if (ret)
 172                         return ret;
 173
 174                 /*
 175                  * We use spinand_read_reg_op() instead of spinand_get_cfg()
 176                  * here to bypass the config cache.
 177                  */
 178                 ret = spinand_read_reg_op(spinand, REG_CFG,
 179                                           &spinand->cfg_cache[target]);
 180                 if (ret)
 181                         return ret;
 182         }
 183
 184         return 0;
 185 }
 186
 187 static int spinand_init_quad_enable(struct spinand_device *spinand)
 188 {
 189         bool enable = false;
 190
 191         if (!(spinand->flags & SPINAND_HAS_QE_BIT))
 192                 return 0;
 193
 194         if (spinand->op_templates.read_cache->data.buswidth == 4 ||
 195             spinand->op_templates.write_cache->data.buswidth == 4 ||
 196             spinand->op_templates.update_cache->data.buswidth == 4)
 197                 enable = true;
 198
 199         return spinand_upd_cfg(spinand, CFG_QUAD_ENABLE,
 200                                enable ? CFG_QUAD_ENABLE : 0);
 201 }
 202
 203 static int spinand_ecc_enable(struct spinand_device *spinand,
 204                               bool enable)
 205 {
 206         return spinand_upd_cfg(spinand, CFG_ECC_ENABLE,
 207                                enable ? CFG_ECC_ENABLE : 0);
 208 }
 209
 210 static int spinand_write_enable_op(struct spinand_device *spinand)
 211 {
 212         struct spi_mem_op op = SPINAND_WR_EN_DIS_OP(true);
 213
 214         return spi_mem_exec_op(spinand->spimem, &op);
 215 }
 216
 217 static int spinand_load_page_op(struct spinand_device *spinand,
 218                                 const struct nand_page_io_req *req)
 219 {
 220         struct nand_device *nand = spinand_to_nand(spinand);
 221         unsigned int row = nanddev_pos_to_row(nand, &req->pos);
 222         struct spi_mem_op op = SPINAND_PAGE_READ_OP(row);
 223
 224         return spi_mem_exec_op(spinand->spimem, &op);
 225 }
 226
 227 static int spinand_read_from_cache_op(struct spinand_device *spinand,
 228                                       const struct nand_page_io_req *req)
 229 {
 230         struct spi_mem_op op = *spinand->op_templates.read_cache;
 231         struct nand_device *nand = spinand_to_nand(spinand);
 232         struct mtd_info *mtd = nanddev_to_mtd(nand);
 233         struct nand_page_io_req adjreq = *req;
 234         unsigned int nbytes = 0;
 235         void *buf = NULL;
 236         u16 column = 0;
 237         int ret;
 238
 239         if (req->datalen) {
 240                 adjreq.datalen = nanddev_page_size(nand);
 241                 adjreq.dataoffs = 0;
 242                 adjreq.databuf.in = spinand->databuf;
 243                 buf = spinand->databuf;
 244                 nbytes = adjreq.datalen;
 245         }
 246
 247         if (req->ooblen) {
 248                 adjreq.ooblen = nanddev_per_page_oobsize(nand);
 249                 adjreq.ooboffs = 0;
 250                 adjreq.oobbuf.in = spinand->oobbuf;
 251                 nbytes += nanddev_per_page_oobsize(nand);
 252                 if (!buf) {
 253                         buf = spinand->oobbuf;
 254                         column = nanddev_page_size(nand);
 255                 }
 256         }
 257
 258         spinand_cache_op_adjust_colum(spinand, &adjreq, &column);
 259         op.addr.val = column;
 260
 261         /*
 262          * Some controllers are limited in term of max RX data size. In this
 263          * case, just repeat the READ_CACHE operation after updating the
 264          * column.
 265          */
 266         while (nbytes) {
 267                 op.data.buf.in = buf;
 268                 op.data.nbytes = nbytes;
 269                 ret = spi_mem_adjust_op_size(spinand->spimem, &op);
 270                 if (ret)
 271                         return ret;
 272
 273                 ret = spi_mem_exec_op(spinand->spimem, &op);
 274                 if (ret)
 275                         return ret;
 276
 277                 buf += op.data.nbytes;
 278                 nbytes -= op.data.nbytes;
 279                 op.addr.val += op.data.nbytes;
 280         }
 281
 282         if (req->datalen)
 283                 memcpy(req->databuf.in, spinand->databuf + req->dataoffs,
 284                        req->datalen);
 285
 286         if (req->ooblen) {
 287                 if (req->mode == MTD_OPS_AUTO_OOB)
 288                         mtd_ooblayout_get_databytes(mtd, req->oobbuf.in,
 289                                                     spinand->oobbuf,
 290                                                     req->ooboffs,
 291                                                     req->ooblen);
 292                 else
 293                         memcpy(req->oobbuf.in, spinand->oobbuf + req->ooboffs,
 294                                req->ooblen);
 295         }
 296
 297         return 0;
 298 }
 299
 300 static int spinand_write_to_cache_op(struct spinand_device *spinand,
 301                                      const struct nand_page_io_req *req)
 302 {
 303         struct spi_mem_op op = *spinand->op_templates.write_cache;
 304         struct nand_device *nand = spinand_to_nand(spinand);
 305         struct mtd_info *mtd = nanddev_to_mtd(nand);
 306         struct nand_page_io_req adjreq = *req;
 307         unsigned int nbytes = 0;
 308         void *buf = NULL;
 309         u16 column = 0;
 310         int ret;
 311
 312         memset(spinand->databuf, 0xff,
 313                nanddev_page_size(nand) +
 314                nanddev_per_page_oobsize(nand));
 315
 316         if (req->datalen) {
 317                 memcpy(spinand->databuf + req->dataoffs, req->databuf.out,
 318                        req->datalen);
 319                 adjreq.dataoffs = 0;
 320                 adjreq.datalen = nanddev_page_size(nand);
 321                 adjreq.databuf.out = spinand->databuf;
 322                 nbytes = adjreq.datalen;
 323                 buf = spinand->databuf;
 324         }
 325
 326         if (req->ooblen) {
 327                 if (req->mode == MTD_OPS_AUTO_OOB)
 328                         mtd_ooblayout_set_databytes(mtd, req->oobbuf.out,
 329                                                     spinand->oobbuf,
 330                                                     req->ooboffs,
 331                                                     req->ooblen);
 332                 else
 333                         memcpy(spinand->oobbuf + req->ooboffs, req->oobbuf.out,
 334                                req->ooblen);
 335
 336                 adjreq.ooblen = nanddev_per_page_oobsize(nand);
 337                 adjreq.ooboffs = 0;
 338                 nbytes += nanddev_per_page_oobsize(nand);
 339                 if (!buf) {
 340                         buf = spinand->oobbuf;
 341                         column = nanddev_page_size(nand);
 342                 }
 343         }
 344
 345         spinand_cache_op_adjust_colum(spinand, &adjreq, &column);
 346
 347         op = *spinand->op_templates.write_cache;
 348         op.addr.val = column;
 349
 350         /*
 351          * Some controllers are limited in term of max TX data size. In this
 352          * case, split the operation into one LOAD CACHE and one or more
 353          * LOAD RANDOM CACHE.
 354          */
 355         while (nbytes) {
 356                 op.data.buf.out = buf;
 357                 op.data.nbytes = nbytes;
 358
 359                 ret = spi_mem_adjust_op_size(spinand->spimem, &op);
 360                 if (ret)
 361                         return ret;
 362
 363                 ret = spi_mem_exec_op(spinand->spimem, &op);
 364                 if (ret)
 365                         return ret;
 366
 367                 buf += op.data.nbytes;
 368                 nbytes -= op.data.nbytes;
 369                 op.addr.val += op.data.nbytes;
 370
 371                 /*
 372                  * We need to use the RANDOM LOAD CACHE operation if there's
 373                  * more than one iteration, because the LOAD operation resets
 374                  * the cache to 0xff.
 375                  */
 376                 if (nbytes) {
 377                         column = op.addr.val;
 378                         op = *spinand->op_templates.update_cache;
 379                         op.addr.val = column;
 380                 }
 381         }
 382
 383         return 0;
 384 }
 385
 386 static int spinand_program_op(struct spinand_device *spinand,
 387                               const struct nand_page_io_req *req)
 388 {
 389         struct nand_device *nand = spinand_to_nand(spinand);
 390         unsigned int row = nanddev_pos_to_row(nand, &req->pos);
 391         struct spi_mem_op op = SPINAND_PROG_EXEC_OP(row);
 392
 393         return spi_mem_exec_op(spinand->spimem, &op);
 394 }
 395
 396 static int spinand_erase_op(struct spinand_device *spinand,
 397                             const struct nand_pos *pos)
 398 {
 399         struct nand_device *nand = spinand_to_nand(spinand);
 400         unsigned int row = nanddev_pos_to_row(nand, pos);
 401         struct spi_mem_op op = SPINAND_BLK_ERASE_OP(row);
 402
 403         return spi_mem_exec_op(spinand->spimem, &op);
 404 }
 405
 406 static int spinand_wait(struct spinand_device *spinand, u8 *s)
 407 {
 408         unsigned long timeo =  jiffies + msecs_to_jiffies(400);
 409         u8 status;
 410         int ret;
 411
 412         do {
 413                 ret = spinand_read_status(spinand, &status);
 414                 if (ret)
 415                         return ret;
 416
 417                 if (!(status & STATUS_BUSY))
 418                         goto out;
 419         } while (time_before(jiffies, timeo));
 420
 421         /*
 422          * Extra read, just in case the STATUS_READY bit has changed
 423          * since our last check
 424          */
 425         ret = spinand_read_status(spinand, &status);
 426         if (ret)
 427                 return ret;
 428
 429 out:
 430         if (s)
 431                 *s = status;
 432
 433         return status & STATUS_BUSY ? -ETIMEDOUT : 0;
 434 }
 435
 436 static int spinand_read_id_op(struct spinand_device *spinand, u8 *buf)
 437 {
 438         struct spi_mem_op op = SPINAND_READID_OP(0, spinand->scratchbuf,
 439                                                  SPINAND_MAX_ID_LEN);
 440         int ret;
 441
 442         ret = spi_mem_exec_op(spinand->spimem, &op);
 443         if (!ret)
 444                 memcpy(buf, spinand->scratchbuf, SPINAND_MAX_ID_LEN);
 445
 446         return ret;
 447 }
 448
 449 static int spinand_reset_op(struct spinand_device *spinand)
 450 {
 451         struct spi_mem_op op = SPINAND_RESET_OP;
 452         int ret;
 453
 454         ret = spi_mem_exec_op(spinand->spimem, &op);
 455         if (ret)
 456                 return ret;
 457
 458         return spinand_wait(spinand, NULL);
 459 }
 460
 461 static int spinand_lock_block(struct spinand_device *spinand, u8 lock)
 462 {
 463         return spinand_write_reg_op(spinand, REG_BLOCK_LOCK, lock);
 464 }
 465
 466 static int spinand_check_ecc_status(struct spinand_device *spinand, u8 status)
 467 {
 468         struct nand_device *nand = spinand_to_nand(spinand);
 469
 470         if (spinand->eccinfo.get_status)
 471                 return spinand->eccinfo.get_status(spinand, status);
 472
 473         switch (status & STATUS_ECC_MASK) {
 474         case STATUS_ECC_NO_BITFLIPS:
 475                 return 0;
 476
 477         case STATUS_ECC_HAS_BITFLIPS:
 478                 /*
 479                  * We have no way to know exactly how many bitflips have been
 480                  * fixed, so let's return the maximum possible value so that
 481                  * wear-leveling layers move the data immediately.
 482                  */
 483                 return nand->eccreq.strength;
 484
 485         case STATUS_ECC_UNCOR_ERROR:
 486                 return -EBADMSG;
 487
 488         default:
 489                 break;
 490         }
 491
 492         return -EINVAL;
 493 }
 494
 495 static int spinand_read_page(struct spinand_device *spinand,
 496                              const struct nand_page_io_req *req,
 497                              bool ecc_enabled)
 498 {
 499         u8 status;
 500         int ret;
 501
 502         ret = spinand_load_page_op(spinand, req);
 503         if (ret)
 504                 return ret;
 505
 506         ret = spinand_wait(spinand, &status);
 507         if (ret < 0)
 508                 return ret;
 509
 510         ret = spinand_read_from_cache_op(spinand, req);
 511         if (ret)
 512                 return ret;
 513
 514         if (!ecc_enabled)
 515                 return 0;
 516
 517         return spinand_check_ecc_status(spinand, status);
 518 }
 519
 520 static int spinand_write_page(struct spinand_device *spinand,
 521                               const struct nand_page_io_req *req)
 522 {
 523         u8 status;
 524         int ret;
 525
 526         ret = spinand_write_enable_op(spinand);
 527         if (ret)
 528                 return ret;
 529
 530         ret = spinand_write_to_cache_op(spinand, req);
 531         if (ret)
 532                 return ret;
 533
 534         ret = spinand_program_op(spinand, req);
 535         if (ret)
 536                 return ret;
 537
 538         ret = spinand_wait(spinand, &status);
 539         if (!ret && (status & STATUS_PROG_FAILED))
 540                 ret = -EIO;
 541
 542         return ret;
 543 }
 544
 545 static int spinand_mtd_read(struct mtd_info *mtd, loff_t from,
 546                             struct mtd_oob_ops *ops)
 547 {
 548         struct spinand_device *spinand = mtd_to_spinand(mtd);
 549         struct nand_device *nand = mtd_to_nanddev(mtd);
 550         unsigned int max_bitflips = 0;
 551         struct nand_io_iter iter;
 552         bool enable_ecc = false;
 553         bool ecc_failed = false;
 554         int ret = 0;
 555
 556         if (ops->mode != MTD_OPS_RAW && spinand->eccinfo.ooblayout)
 557                 enable_ecc = true;
 558
 559         mutex_lock(&spinand->lock);
 560
 561         nanddev_io_for_each_page(nand, from, ops, &iter) {
 562                 ret = spinand_select_target(spinand, iter.req.pos.target);
 563                 if (ret)
 564                         break;
 565
 566                 ret = spinand_ecc_enable(spinand, enable_ecc);
 567                 if (ret)
 568                         break;
 569
 570                 ret = spinand_read_page(spinand, &iter.req, enable_ecc);
 571                 if (ret < 0 && ret != -EBADMSG)
 572                         break;
 573
 574                 if (ret == -EBADMSG) {
 575                         ecc_failed = true;
 576                         mtd->ecc_stats.failed++;
 577                         ret = 0;
 578                 } else {
 579                         mtd->ecc_stats.corrected += ret;
 580                         max_bitflips = max_t(unsigned int, max_bitflips, ret);
 581                 }
 582
 583                 ops->retlen += iter.req.datalen;
 584                 ops->oobretlen += iter.req.ooblen;
 585         }
 586
 587         mutex_unlock(&spinand->lock);
 588
 589         if (ecc_failed && !ret)
 590                 ret = -EBADMSG;
 591
 592         return ret ? ret : max_bitflips;
 593 }
 594
 595 static int spinand_mtd_write(struct mtd_info *mtd, loff_t to,
 596                              struct mtd_oob_ops *ops)
 597 {
 598         struct spinand_device *spinand = mtd_to_spinand(mtd);
 599         struct nand_device *nand = mtd_to_nanddev(mtd);
 600         struct nand_io_iter iter;
 601         bool enable_ecc = false;
 602         int ret = 0;
 603
 604         if (ops->mode != MTD_OPS_RAW && mtd->ooblayout)
 605                 enable_ecc = true;
 606
 607         mutex_lock(&spinand->lock);
 608
 609         nanddev_io_for_each_page(nand, to, ops, &iter) {
 610                 ret = spinand_select_target(spinand, iter.req.pos.target);
 611                 if (ret)
 612                         break;
 613
 614                 ret = spinand_ecc_enable(spinand, enable_ecc);
 615                 if (ret)
 616                         break;
 617
 618                 ret = spinand_write_page(spinand, &iter.req);
 619                 if (ret)
 620                         break;
 621
 622                 ops->retlen += iter.req.datalen;
 623                 ops->oobretlen += iter.req.ooblen;
 624         }
 625
 626         mutex_unlock(&spinand->lock);
 627
 628         return ret;
 629 }
 630
 631 static bool spinand_isbad(struct nand_device *nand, const struct nand_pos *pos)
 632 {
 633         struct spinand_device *spinand = nand_to_spinand(nand);
 634         struct nand_page_io_req req = {
 635                 .pos = *pos,
 636                 .ooblen = 2,
 637                 .ooboffs = 0,
 638                 .oobbuf.in = spinand->oobbuf,
 639                 .mode = MTD_OPS_RAW,
 640         };
 641
 642         memset(spinand->oobbuf, 0, 2);
 643         spinand_select_target(spinand, pos->target);
 644         spinand_read_page(spinand, &req, false);
 645         if (spinand->oobbuf[0] != 0xff || spinand->oobbuf[1] != 0xff)
 646                 return true;
 647
 648         return false;
 649 }
 650
 651 static int spinand_mtd_block_isbad(struct mtd_info *mtd, loff_t offs)
 652 {
 653         struct nand_device *nand = mtd_to_nanddev(mtd);
 654         struct spinand_device *spinand = nand_to_spinand(nand);
 655         struct nand_pos pos;
 656         int ret;
 657
 658         nanddev_offs_to_pos(nand, offs, &pos);
 659         mutex_lock(&spinand->lock);
 660         ret = nanddev_isbad(nand, &pos);
 661         mutex_unlock(&spinand->lock);
 662
 663         return ret;
 664 }
 665
 666 static int spinand_markbad(struct nand_device *nand, const struct nand_pos *pos)
 667 {
 668         struct spinand_device *spinand = nand_to_spinand(nand);
 669         struct nand_page_io_req req = {
 670                 .pos = *pos,
 671                 .ooboffs = 0,
 672                 .ooblen = 2,
 673                 .oobbuf.out = spinand->oobbuf,
 674         };
 675         int ret;
 676
 677         /* Erase block before marking it bad. */
 678         ret = spinand_select_target(spinand, pos->target);
 679         if (ret)
 680                 return ret;
 681
 682         ret = spinand_write_enable_op(spinand);
 683         if (ret)
 684                 return ret;
 685
 686         spinand_erase_op(spinand, pos);
 687
 688         memset(spinand->oobbuf, 0, 2);
 689         return spinand_write_page(spinand, &req);
 690 }
 691
 692 static int spinand_mtd_block_markbad(struct mtd_info *mtd, loff_t offs)
 693 {
 694         struct nand_device *nand = mtd_to_nanddev(mtd);
 695         struct spinand_device *spinand = nand_to_spinand(nand);
 696         struct nand_pos pos;
 697         int ret;
 698
 699         nanddev_offs_to_pos(nand, offs, &pos);
 700         mutex_lock(&spinand->lock);
 701         ret = nanddev_markbad(nand, &pos);
 702         mutex_unlock(&spinand->lock);
 703
 704         return ret;
 705 }
 706
 707 static int spinand_erase(struct nand_device *nand, const struct nand_pos *pos)
 708 {
 709         struct spinand_device *spinand = nand_to_spinand(nand);
 710         u8 status;
 711         int ret;
 712
 713         ret = spinand_select_target(spinand, pos->target);
 714         if (ret)
 715                 return ret;
 716
 717         ret = spinand_write_enable_op(spinand);
 718         if (ret)
 719                 return ret;
 720
 721         ret = spinand_erase_op(spinand, pos);
 722         if (ret)
 723                 return ret;
 724
 725         ret = spinand_wait(spinand, &status);
 726         if (!ret && (status & STATUS_ERASE_FAILED))
 727                 ret = -EIO;
 728
 729         return ret;
 730 }
 731
 732 static int spinand_mtd_erase(struct mtd_info *mtd,
 733                              struct erase_info *einfo)
 734 {
 735         struct spinand_device *spinand = mtd_to_spinand(mtd);
 736         int ret;
 737
 738         mutex_lock(&spinand->lock);
 739         ret = nanddev_mtd_erase(mtd, einfo);
 740         mutex_unlock(&spinand->lock);
 741
 742         return ret;
 743 }
 744
 745 static int spinand_mtd_block_isreserved(struct mtd_info *mtd, loff_t offs)
 746 {
 747         struct spinand_device *spinand = mtd_to_spinand(mtd);
 748         struct nand_device *nand = mtd_to_nanddev(mtd);
 749         struct nand_pos pos;
 750         int ret;
 751
 752         nanddev_offs_to_pos(nand, offs, &pos);
 753         mutex_lock(&spinand->lock);
 754         ret = nanddev_isreserved(nand, &pos);
 755         mutex_unlock(&spinand->lock);
 756
 757         return ret;
 758 }
 759
 760 static const struct nand_ops spinand_ops = {
 761         .erase = spinand_erase,
 762         .markbad = spinand_markbad,
 763         .isbad = spinand_isbad,
 764 };
 765
 766 static const struct spinand_manufacturer *spinand_manufacturers[] = {
 767         &gigadevice_spinand_manufacturer,
 768         &macronix_spinand_manufacturer,
 769         &micron_spinand_manufacturer,
 770         &toshiba_spinand_manufacturer,
 771         &winbond_spinand_manufacturer,
 772 };
 773
 774 static int spinand_manufacturer_detect(struct spinand_device *spinand)
 775 {
 776         unsigned int i;
 777         int ret;
 778
 779         for (i = 0; i < ARRAY_SIZE(spinand_manufacturers); i++) {
 780                 ret = spinand_manufacturers[i]->ops->detect(spinand);
 781                 if (ret > 0) {
 782                         spinand->manufacturer = spinand_manufacturers[i];
 783                         return 0;
 784                 } else if (ret < 0) {
 785                         return ret;
 786                 }
 787         }
 788
 789         return -ENOTSUPP;
 790 }
 791
 792 static int spinand_manufacturer_init(struct spinand_device *spinand)
 793 {
 794         if (spinand->manufacturer->ops->init)
 795                 return spinand->manufacturer->ops->init(spinand);
 796
 797         return 0;
 798 }
 799
 800 static void spinand_manufacturer_cleanup(struct spinand_device *spinand)
 801 {
 802         /* Release manufacturer private data */
 803         if (spinand->manufacturer->ops->cleanup)
 804                 return spinand->manufacturer->ops->cleanup(spinand);
 805 }
 806
 807 static const struct spi_mem_op *
 808 spinand_select_op_variant(struct spinand_device *spinand,
 809                           const struct spinand_op_variants *variants)
 810 {
 811         struct nand_device *nand = spinand_to_nand(spinand);
 812         unsigned int i;
 813
 814         for (i = 0; i < variants->nops; i++) {
 815                 struct spi_mem_op op = variants->ops[i];
 816                 unsigned int nbytes;
 817                 int ret;
 818
 819                 nbytes = nanddev_per_page_oobsize(nand) +
 820                          nanddev_page_size(nand);
 821
 822                 while (nbytes) {
 823                         op.data.nbytes = nbytes;
 824                         ret = spi_mem_adjust_op_size(spinand->spimem, &op);
 825                         if (ret)
 826                                 break;
 827
 828                         if (!spi_mem_supports_op(spinand->spimem, &op))
 829                                 break;
 830
 831                         nbytes -= op.data.nbytes;
 832                 }
 833
 834                 if (!nbytes)
 835                         return &variants->ops[i];
 836         }
 837
 838         return NULL;
 839 }
 840
 841 /**
 842  * spinand_match_and_init() - Try to find a match between a device ID and an
 843  *                            entry in a spinand_info table
 844  * @spinand: SPI NAND object
 845  * @table: SPI NAND device description table
 846  * @table_size: size of the device description table
 847  *
 848  * Should be used by SPI NAND manufacturer drivers when they want to find a
 849  * match between a device ID retrieved through the READ_ID command and an
 850  * entry in the SPI NAND description table. If a match is found, the spinand
 851  * object will be initialized with information provided by the matching
 852  * spinand_info entry.
 853  *
 854  * Return: 0 on success, a negative error code otherwise.
 855  */
 856 int spinand_match_and_init(struct spinand_device *spinand,
 857                            const struct spinand_info *table,
 858                            unsigned int table_size, u8 devid)
 859 {
 860         struct nand_device *nand = spinand_to_nand(spinand);
 861         unsigned int i;
 862
 863         for (i = 0; i < table_size; i++) {
 864                 const struct spinand_info *info = &table[i];
 865                 const struct spi_mem_op *op;
 866
 867                 if (devid != info->devid)
 868                         continue;
 869
 870                 nand->memorg = table[i].memorg;
 871                 nand->eccreq = table[i].eccreq;
 872                 spinand->eccinfo = table[i].eccinfo;
 873                 spinand->flags = table[i].flags;
 874                 spinand->select_target = table[i].select_target;
 875
 876                 op = spinand_select_op_variant(spinand,
 877                                                info->op_variants.read_cache);
 878                 if (!op)
 879                         return -ENOTSUPP;
 880
 881                 spinand->op_templates.read_cache = op;
 882
 883                 op = spinand_select_op_variant(spinand,
 884                                                info->op_variants.write_cache);
 885                 if (!op)
 886                         return -ENOTSUPP;
 887
 888                 spinand->op_templates.write_cache = op;
 889
 890                 op = spinand_select_op_variant(spinand,
 891                                                info->op_variants.update_cache);
 892                 spinand->op_templates.update_cache = op;
 893
 894                 return 0;
 895         }
 896
 897         return -ENOTSUPP;
 898 }
 899
 900 static int spinand_detect(struct spinand_device *spinand)
 901 {
 902         struct device *dev = &spinand->spimem->spi->dev;
 903         struct nand_device *nand = spinand_to_nand(spinand);
 904         int ret;
 905
 906         ret = spinand_reset_op(spinand);
 907         if (ret)
 908                 return ret;
 909
 910         ret = spinand_read_id_op(spinand, spinand->id.data);
 911         if (ret)
 912                 return ret;
 913
 914         spinand->id.len = SPINAND_MAX_ID_LEN;
 915
 916         ret = spinand_manufacturer_detect(spinand);
 917         if (ret) {
 918                 dev_err(dev, "unknown raw ID %*phN\n", SPINAND_MAX_ID_LEN,
 919                         spinand->id.data);
 920                 return ret;
 921         }
 922
 923         if (nand->memorg.ntargets > 1 && !spinand->select_target) {
 924                 dev_err(dev,
 925                         "SPI NANDs with more than one die must implement ->select_target()\n");
 926                 return -EINVAL;
 927         }
 928
 929         dev_info(&spinand->spimem->spi->dev,
 930                  "%s SPI NAND was found.\n", spinand->manufacturer->name);
 931         dev_info(&spinand->spimem->spi->dev,
 932                  "%llu MiB, block size: %zu KiB, page size: %zu, OOB size: %u\n",
 933                  nanddev_size(nand) >> 20, nanddev_eraseblock_size(nand) >> 10,
 934                  nanddev_page_size(nand), nanddev_per_page_oobsize(nand));
 935
 936         return 0;
 937 }
 938
 939 static int spinand_noecc_ooblayout_ecc(struct mtd_info *mtd, int section,
 940                                        struct mtd_oob_region *region)
 941 {
 942         return -ERANGE;
 943 }
 944
 945 static int spinand_noecc_ooblayout_free(struct mtd_info *mtd, int section,
 946                                         struct mtd_oob_region *region)
 947 {
 948         if (section)
 949                 return -ERANGE;
 950
 951         /* Reserve 2 bytes for the BBM. */
 952         region->offset = 2;
 953         region->length = 62;
 954
 955         return 0;
 956 }
 957
 958 static const struct mtd_ooblayout_ops spinand_noecc_ooblayout = {
 959         .ecc = spinand_noecc_ooblayout_ecc,
 960         .free = spinand_noecc_ooblayout_free,
 961 };
 962
 963 static int spinand_init(struct spinand_device *spinand)
 964 {
 965         struct device *dev = &spinand->spimem->spi->dev;
 966         struct mtd_info *mtd = spinand_to_mtd(spinand);
 967         struct nand_device *nand = mtd_to_nanddev(mtd);
 968         int ret, i;
 969
 970         /*
 971          * We need a scratch buffer because the spi_mem interface requires that
 972          * buf passed in spi_mem_op->data.buf be DMA-able.
 973          */
 974         spinand->scratchbuf = kzalloc(SPINAND_MAX_ID_LEN, GFP_KERNEL);
 975         if (!spinand->scratchbuf)
 976                 return -ENOMEM;
 977
 978         ret = spinand_detect(spinand);
 979         if (ret)
 980                 goto err_free_bufs;
 981
 982         /*
 983          * Use kzalloc() instead of devm_kzalloc() here, because some drivers
 984          * may use this buffer for DMA access.
 985          * Memory allocated by devm_ does not guarantee DMA-safe alignment.
 986          */
 987         spinand->databuf = kzalloc(nanddev_page_size(nand) +
 988                                nanddev_per_page_oobsize(nand),
 989                                GFP_KERNEL);
 990         if (!spinand->databuf) {
 991                 ret = -ENOMEM;
 992                 goto err_free_bufs;
 993         }
 994
 995         spinand->oobbuf = spinand->databuf + nanddev_page_size(nand);
 996
 997         ret = spinand_init_cfg_cache(spinand);
 998         if (ret)
 999                 goto err_free_bufs;
1000
1001         ret = spinand_init_quad_enable(spinand);
1002         if (ret)
1003                 goto err_free_bufs;
1004
1005         ret = spinand_upd_cfg(spinand, CFG_OTP_ENABLE, 0);
1006         if (ret)
1007                 goto err_free_bufs;
1008
1009         ret = spinand_manufacturer_init(spinand);
1010         if (ret) {
1011                 dev_err(dev,
1012                         "Failed to initialize the SPI NAND chip (err = %d)\n",
1013                         ret);
1014                 goto err_free_bufs;
1015         }
1016
1017         /* After power up, all blocks are locked, so unlock them here. */
1018         for (i = 0; i < nand->memorg.ntargets; i++) {
1019                 ret = spinand_select_target(spinand, i);
1020                 if (ret)
1021                         goto err_free_bufs;
1022
1023                 ret = spinand_lock_block(spinand, BL_ALL_UNLOCKED);
1024                 if (ret)
1025                         goto err_free_bufs;
1026         }
1027
1028         ret = nanddev_init(nand, &spinand_ops, THIS_MODULE);
1029         if (ret)
1030                 goto err_manuf_cleanup;
1031
1032         /*
1033          * Right now, we don't support ECC, so let the whole oob
1034          * area is available for user.
1035          */
1036         mtd->_read_oob = spinand_mtd_read;
1037         mtd->_write_oob = spinand_mtd_write;
1038         mtd->_block_isbad = spinand_mtd_block_isbad;
1039         mtd->_block_markbad = spinand_mtd_block_markbad;
1040         mtd->_block_isreserved = spinand_mtd_block_isreserved;
1041         mtd->_erase = spinand_mtd_erase;
1042
1043         if (spinand->eccinfo.ooblayout)
1044                 mtd_set_ooblayout(mtd, spinand->eccinfo.ooblayout);
1045         else
1046                 mtd_set_ooblayout(mtd, &spinand_noecc_ooblayout);
1047
1048         ret = mtd_ooblayout_count_freebytes(mtd);
1049         if (ret < 0)
1050                 goto err_cleanup_nanddev;
1051
1052         mtd->oobavail = ret;
1053
1054         return 0;
1055
1056 err_cleanup_nanddev:
1057         nanddev_cleanup(nand);
1058
1059 err_manuf_cleanup:
1060         spinand_manufacturer_cleanup(spinand);
1061
1062 err_free_bufs:
1063         kfree(spinand->databuf);
1064         kfree(spinand->scratchbuf);
1065         return ret;
1066 }
1067
1068 static void spinand_cleanup(struct spinand_device *spinand)
1069 {
1070         struct nand_device *nand = spinand_to_nand(spinand);
1071
1072         nanddev_cleanup(nand);
1073         spinand_manufacturer_cleanup(spinand);
1074         kfree(spinand->databuf);
1075         kfree(spinand->scratchbuf);
1076 }
1077
1078 static int spinand_probe(struct spi_mem *mem)
1079 {
1080         struct spinand_device *spinand;
1081         struct mtd_info *mtd;
1082         int ret;
1083
1084         spinand = devm_kzalloc(&mem->spi->dev, sizeof(*spinand),
1085                                GFP_KERNEL);
1086         if (!spinand)
1087                 return -ENOMEM;
1088
1089         spinand->spimem = mem;
1090         spi_mem_set_drvdata(mem, spinand);
1091         spinand_set_of_node(spinand, mem->spi->dev.of_node);
1092         mutex_init(&spinand->lock);
1093         mtd = spinand_to_mtd(spinand);
1094         mtd->dev.parent = &mem->spi->dev;
1095
1096         ret = spinand_init(spinand);
1097         if (ret)
1098                 return ret;
1099
1100         ret = mtd_device_register(mtd, NULL, 0);
1101         if (ret)
1102                 goto err_spinand_cleanup;
1103
1104         return 0;
1105
1106 err_spinand_cleanup:
1107         spinand_cleanup(spinand);
1108
1109         return ret;
1110 }
1111
1112 static int spinand_remove(struct spi_mem *mem)
1113 {
1114         struct spinand_device *spinand;
1115         struct mtd_info *mtd;
1116         int ret;
1117
1118         spinand = spi_mem_get_drvdata(mem);
1119         mtd = spinand_to_mtd(spinand);
1120
1121         ret = mtd_device_unregister(mtd);
1122         if (ret)
1123                 return ret;
1124
1125         spinand_cleanup(spinand);
1126
1127         return 0;
1128 }
1129
1130 static const struct spi_device_id spinand_ids[] = {
1131         { .name = "spi-nand" },
1132         { /* sentinel */ },
1133 };
1134
1135 #ifdef CONFIG_OF
1136 static const struct of_device_id spinand_of_ids[] = {
1137         { .compatible = "spi-nand" },
1138         { /* sentinel */ },
1139 };
1140 #endif
1141
1142 static struct spi_mem_driver spinand_drv = {
1143         .spidrv = {
1144                 .id_table = spinand_ids,
1145                 .driver = {
1146                         .name = "spi-nand",
1147                         .of_match_table = of_match_ptr(spinand_of_ids),
1148                 },
1149         },
1150         .probe = spinand_probe,
1151         .remove = spinand_remove,
1152 };
1153 module_spi_mem_driver(spinand_drv);
1154
1155 MODULE_DESCRIPTION("SPI NAND framework");
1156 MODULE_AUTHOR("Peter Pan<peterpandong@micron.com>");
1157 MODULE_LICENSE("GPL v2");