1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * NAND flash simulator.
5 * Author: Artem B. Bityuckiy <dedekind@oktetlabs.ru>, <dedekind@infradead.org>
7 * Copyright (C) 2004 Nokia Corporation
9 * Note: NS means "NAND Simulator".
10 * Note: Input means input TO flash chip, output means output FROM chip.
13 #define pr_fmt(fmt) "[nandsim]" fmt
15 #include <linux/init.h>
16 #include <linux/types.h>
17 #include <linux/module.h>
18 #include <linux/moduleparam.h>
19 #include <linux/vmalloc.h>
20 #include <linux/math64.h>
21 #include <linux/slab.h>
22 #include <linux/errno.h>
23 #include <linux/string.h>
24 #include <linux/mtd/mtd.h>
25 #include <linux/mtd/rawnand.h>
26 #include <linux/mtd/partitions.h>
27 #include <linux/delay.h>
28 #include <linux/list.h>
29 #include <linux/random.h>
30 #include <linux/sched.h>
31 #include <linux/sched/mm.h>
33 #include <linux/pagemap.h>
34 #include <linux/seq_file.h>
35 #include <linux/debugfs.h>
37 /* Default simulator parameters values */
38 #if !defined(CONFIG_NANDSIM_FIRST_ID_BYTE) || \
39 !defined(CONFIG_NANDSIM_SECOND_ID_BYTE) || \
40 !defined(CONFIG_NANDSIM_THIRD_ID_BYTE) || \
41 !defined(CONFIG_NANDSIM_FOURTH_ID_BYTE)
42 #define CONFIG_NANDSIM_FIRST_ID_BYTE 0x98
43 #define CONFIG_NANDSIM_SECOND_ID_BYTE 0x39
44 #define CONFIG_NANDSIM_THIRD_ID_BYTE 0xFF /* No byte */
45 #define CONFIG_NANDSIM_FOURTH_ID_BYTE 0xFF /* No byte */
48 #ifndef CONFIG_NANDSIM_ACCESS_DELAY
49 #define CONFIG_NANDSIM_ACCESS_DELAY 25
51 #ifndef CONFIG_NANDSIM_PROGRAMM_DELAY
52 #define CONFIG_NANDSIM_PROGRAMM_DELAY 200
54 #ifndef CONFIG_NANDSIM_ERASE_DELAY
55 #define CONFIG_NANDSIM_ERASE_DELAY 2
57 #ifndef CONFIG_NANDSIM_OUTPUT_CYCLE
58 #define CONFIG_NANDSIM_OUTPUT_CYCLE 40
60 #ifndef CONFIG_NANDSIM_INPUT_CYCLE
61 #define CONFIG_NANDSIM_INPUT_CYCLE 50
63 #ifndef CONFIG_NANDSIM_BUS_WIDTH
64 #define CONFIG_NANDSIM_BUS_WIDTH 8
66 #ifndef CONFIG_NANDSIM_DO_DELAYS
67 #define CONFIG_NANDSIM_DO_DELAYS 0
69 #ifndef CONFIG_NANDSIM_LOG
70 #define CONFIG_NANDSIM_LOG 0
72 #ifndef CONFIG_NANDSIM_DBG
73 #define CONFIG_NANDSIM_DBG 0
75 #ifndef CONFIG_NANDSIM_MAX_PARTS
76 #define CONFIG_NANDSIM_MAX_PARTS 32
79 static uint access_delay = CONFIG_NANDSIM_ACCESS_DELAY;
80 static uint programm_delay = CONFIG_NANDSIM_PROGRAMM_DELAY;
81 static uint erase_delay = CONFIG_NANDSIM_ERASE_DELAY;
82 static uint output_cycle = CONFIG_NANDSIM_OUTPUT_CYCLE;
83 static uint input_cycle = CONFIG_NANDSIM_INPUT_CYCLE;
84 static uint bus_width = CONFIG_NANDSIM_BUS_WIDTH;
85 static uint do_delays = CONFIG_NANDSIM_DO_DELAYS;
86 static uint log = CONFIG_NANDSIM_LOG;
87 static uint dbg = CONFIG_NANDSIM_DBG;
88 static unsigned long parts[CONFIG_NANDSIM_MAX_PARTS];
89 static unsigned int parts_num;
90 static char *badblocks = NULL;
91 static char *weakblocks = NULL;
92 static char *weakpages = NULL;
93 static unsigned int bitflips = 0;
94 static char *gravepages = NULL;
95 static unsigned int overridesize = 0;
96 static char *cache_file = NULL;
97 static unsigned int bbt;
98 static unsigned int bch;
99 static u_char id_bytes[8] = {
100 [0] = CONFIG_NANDSIM_FIRST_ID_BYTE,
101 [1] = CONFIG_NANDSIM_SECOND_ID_BYTE,
102 [2] = CONFIG_NANDSIM_THIRD_ID_BYTE,
103 [3] = CONFIG_NANDSIM_FOURTH_ID_BYTE,
107 module_param_array(id_bytes, byte, NULL, 0400);
108 module_param_named(first_id_byte, id_bytes[0], byte, 0400);
109 module_param_named(second_id_byte, id_bytes[1], byte, 0400);
110 module_param_named(third_id_byte, id_bytes[2], byte, 0400);
111 module_param_named(fourth_id_byte, id_bytes[3], byte, 0400);
112 module_param(access_delay, uint, 0400);
113 module_param(programm_delay, uint, 0400);
114 module_param(erase_delay, uint, 0400);
115 module_param(output_cycle, uint, 0400);
116 module_param(input_cycle, uint, 0400);
117 module_param(bus_width, uint, 0400);
118 module_param(do_delays, uint, 0400);
119 module_param(log, uint, 0400);
120 module_param(dbg, uint, 0400);
121 module_param_array(parts, ulong, &parts_num, 0400);
122 module_param(badblocks, charp, 0400);
123 module_param(weakblocks, charp, 0400);
124 module_param(weakpages, charp, 0400);
125 module_param(bitflips, uint, 0400);
126 module_param(gravepages, charp, 0400);
127 module_param(overridesize, uint, 0400);
128 module_param(cache_file, charp, 0400);
129 module_param(bbt, uint, 0400);
130 module_param(bch, uint, 0400);
132 MODULE_PARM_DESC(id_bytes, "The ID bytes returned by NAND Flash 'read ID' command");
133 MODULE_PARM_DESC(first_id_byte, "The first byte returned by NAND Flash 'read ID' command (manufacturer ID) (obsolete)");
134 MODULE_PARM_DESC(second_id_byte, "The second byte returned by NAND Flash 'read ID' command (chip ID) (obsolete)");
135 MODULE_PARM_DESC(third_id_byte, "The third byte returned by NAND Flash 'read ID' command (obsolete)");
136 MODULE_PARM_DESC(fourth_id_byte, "The fourth byte returned by NAND Flash 'read ID' command (obsolete)");
137 MODULE_PARM_DESC(access_delay, "Initial page access delay (microseconds)");
138 MODULE_PARM_DESC(programm_delay, "Page programm delay (microseconds");
139 MODULE_PARM_DESC(erase_delay, "Sector erase delay (milliseconds)");
140 MODULE_PARM_DESC(output_cycle, "Word output (from flash) time (nanoseconds)");
141 MODULE_PARM_DESC(input_cycle, "Word input (to flash) time (nanoseconds)");
142 MODULE_PARM_DESC(bus_width, "Chip's bus width (8- or 16-bit)");
143 MODULE_PARM_DESC(do_delays, "Simulate NAND delays using busy-waits if not zero");
144 MODULE_PARM_DESC(log, "Perform logging if not zero");
145 MODULE_PARM_DESC(dbg, "Output debug information if not zero");
146 MODULE_PARM_DESC(parts, "Partition sizes (in erase blocks) separated by commas");
147 /* Page and erase block positions for the following parameters are independent of any partitions */
148 MODULE_PARM_DESC(badblocks, "Erase blocks that are initially marked bad, separated by commas");
149 MODULE_PARM_DESC(weakblocks, "Weak erase blocks [: remaining erase cycles (defaults to 3)]"
150 " separated by commas e.g. 113:2 means eb 113"
151 " can be erased only twice before failing");
152 MODULE_PARM_DESC(weakpages, "Weak pages [: maximum writes (defaults to 3)]"
153 " separated by commas e.g. 1401:2 means page 1401"
154 " can be written only twice before failing");
155 MODULE_PARM_DESC(bitflips, "Maximum number of random bit flips per page (zero by default)");
156 MODULE_PARM_DESC(gravepages, "Pages that lose data [: maximum reads (defaults to 3)]"
157 " separated by commas e.g. 1401:2 means page 1401"
158 " can be read only twice before failing");
159 MODULE_PARM_DESC(overridesize, "Specifies the NAND Flash size overriding the ID bytes. "
160 "The size is specified in erase blocks and as the exponent of a power of two"
161 " e.g. 5 means a size of 32 erase blocks");
162 MODULE_PARM_DESC(cache_file, "File to use to cache nand pages instead of memory");
163 MODULE_PARM_DESC(bbt, "0 OOB, 1 BBT with marker in OOB, 2 BBT with marker in data area");
164 MODULE_PARM_DESC(bch, "Enable BCH ecc and set how many bits should "
165 "be correctable in 512-byte blocks");
167 /* The largest possible page size */
168 #define NS_LARGEST_PAGE_SIZE 4096
170 /* Simulator's output macros (logging, debugging, warning, error) */
171 #define NS_LOG(args...) \
172 do { if (log) pr_debug(" log: " args); } while(0)
173 #define NS_DBG(args...) \
174 do { if (dbg) pr_debug(" debug: " args); } while(0)
175 #define NS_WARN(args...) \
176 do { pr_warn(" warning: " args); } while(0)
177 #define NS_ERR(args...) \
178 do { pr_err(" error: " args); } while(0)
179 #define NS_INFO(args...) \
180 do { pr_info(" " args); } while(0)
182 /* Busy-wait delay macros (microseconds, milliseconds) */
183 #define NS_UDELAY(us) \
184 do { if (do_delays) udelay(us); } while(0)
185 #define NS_MDELAY(us) \
186 do { if (do_delays) mdelay(us); } while(0)
188 /* Is the nandsim structure initialized ? */
189 #define NS_IS_INITIALIZED(ns) ((ns)->geom.totsz != 0)
191 /* Good operation completion status */
192 #define NS_STATUS_OK(ns) (NAND_STATUS_READY | (NAND_STATUS_WP * ((ns)->lines.wp == 0)))
194 /* Operation failed completion status */
195 #define NS_STATUS_FAILED(ns) (NAND_STATUS_FAIL | NS_STATUS_OK(ns))
197 /* Calculate the page offset in flash RAM image by (row, column) address */
198 #define NS_RAW_OFFSET(ns) \
199 (((ns)->regs.row * (ns)->geom.pgszoob) + (ns)->regs.column)
201 /* Calculate the OOB offset in flash RAM image by (row, column) address */
202 #define NS_RAW_OFFSET_OOB(ns) (NS_RAW_OFFSET(ns) + ns->geom.pgsz)
204 /* After a command is input, the simulator goes to one of the following states */
205 #define STATE_CMD_READ0 0x00000001 /* read data from the beginning of page */
206 #define STATE_CMD_READ1 0x00000002 /* read data from the second half of page */
207 #define STATE_CMD_READSTART 0x00000003 /* read data second command (large page devices) */
208 #define STATE_CMD_PAGEPROG 0x00000004 /* start page program */
209 #define STATE_CMD_READOOB 0x00000005 /* read OOB area */
210 #define STATE_CMD_ERASE1 0x00000006 /* sector erase first command */
211 #define STATE_CMD_STATUS 0x00000007 /* read status */
212 #define STATE_CMD_SEQIN 0x00000009 /* sequential data input */
213 #define STATE_CMD_READID 0x0000000A /* read ID */
214 #define STATE_CMD_ERASE2 0x0000000B /* sector erase second command */
215 #define STATE_CMD_RESET 0x0000000C /* reset */
216 #define STATE_CMD_RNDOUT 0x0000000D /* random output command */
217 #define STATE_CMD_RNDOUTSTART 0x0000000E /* random output start command */
218 #define STATE_CMD_MASK 0x0000000F /* command states mask */
220 /* After an address is input, the simulator goes to one of these states */
221 #define STATE_ADDR_PAGE 0x00000010 /* full (row, column) address is accepted */
222 #define STATE_ADDR_SEC 0x00000020 /* sector address was accepted */
223 #define STATE_ADDR_COLUMN 0x00000030 /* column address was accepted */
224 #define STATE_ADDR_ZERO 0x00000040 /* one byte zero address was accepted */
225 #define STATE_ADDR_MASK 0x00000070 /* address states mask */
227 /* During data input/output the simulator is in these states */
228 #define STATE_DATAIN 0x00000100 /* waiting for data input */
229 #define STATE_DATAIN_MASK 0x00000100 /* data input states mask */
231 #define STATE_DATAOUT 0x00001000 /* waiting for page data output */
232 #define STATE_DATAOUT_ID 0x00002000 /* waiting for ID bytes output */
233 #define STATE_DATAOUT_STATUS 0x00003000 /* waiting for status output */
234 #define STATE_DATAOUT_MASK 0x00007000 /* data output states mask */
236 /* Previous operation is done, ready to accept new requests */
237 #define STATE_READY 0x00000000
239 /* This state is used to mark that the next state isn't known yet */
240 #define STATE_UNKNOWN 0x10000000
242 /* Simulator's actions bit masks */
243 #define ACTION_CPY 0x00100000 /* copy page/OOB to the internal buffer */
244 #define ACTION_PRGPAGE 0x00200000 /* program the internal buffer to flash */
245 #define ACTION_SECERASE 0x00300000 /* erase sector */
246 #define ACTION_ZEROOFF 0x00400000 /* don't add any offset to address */
247 #define ACTION_HALFOFF 0x00500000 /* add to address half of page */
248 #define ACTION_OOBOFF 0x00600000 /* add to address OOB offset */
249 #define ACTION_MASK 0x00700000 /* action mask */
251 #define NS_OPER_NUM 13 /* Number of operations supported by the simulator */
252 #define NS_OPER_STATES 6 /* Maximum number of states in operation */
254 #define OPT_ANY 0xFFFFFFFF /* any chip supports this operation */
255 #define OPT_PAGE512 0x00000002 /* 512-byte page chips */
256 #define OPT_PAGE2048 0x00000008 /* 2048-byte page chips */
257 #define OPT_PAGE512_8BIT 0x00000040 /* 512-byte page chips with 8-bit bus width */
258 #define OPT_PAGE4096 0x00000080 /* 4096-byte page chips */
259 #define OPT_LARGEPAGE (OPT_PAGE2048 | OPT_PAGE4096) /* 2048 & 4096-byte page chips */
260 #define OPT_SMALLPAGE (OPT_PAGE512) /* 512-byte page chips */
262 /* Remove action bits from state */
263 #define NS_STATE(x) ((x) & ~ACTION_MASK)
266 * Maximum previous states which need to be saved. Currently saving is
267 * only needed for page program operation with preceded read command
268 * (which is only valid for 512-byte pages).
270 #define NS_MAX_PREVSTATES 1
272 /* Maximum page cache pages needed to read or write a NAND page to the cache_file */
273 #define NS_MAX_HELD_PAGES 16
276 * A union to represent flash memory contents and flash buffer.
279 u_char *byte; /* for byte access */
280 uint16_t *word; /* for 16-bit word access */
284 * The structure which describes all the internal simulator data.
287 struct nand_chip chip;
288 struct nand_controller base;
289 struct mtd_partition partitions[CONFIG_NANDSIM_MAX_PARTS];
290 unsigned int nbparts;
292 uint busw; /* flash chip bus width (8 or 16) */
293 u_char ids[8]; /* chip's ID bytes */
294 uint32_t options; /* chip's characteristic bits */
295 uint32_t state; /* current chip state */
296 uint32_t nxstate; /* next expected state */
298 uint32_t *op; /* current operation, NULL operations isn't known yet */
299 uint32_t pstates[NS_MAX_PREVSTATES]; /* previous states */
300 uint16_t npstates; /* number of previous states saved */
301 uint16_t stateidx; /* current state index */
303 /* The simulated NAND flash pages array */
306 /* Slab allocator for nand pages */
307 struct kmem_cache *nand_pages_slab;
309 /* Internal buffer of page + OOB size bytes */
312 /* NAND flash "geometry" */
314 uint64_t totsz; /* total flash size, bytes */
315 uint32_t secsz; /* flash sector (erase block) size, bytes */
316 uint pgsz; /* NAND flash page size, bytes */
317 uint oobsz; /* page OOB area size, bytes */
318 uint64_t totszoob; /* total flash size including OOB, bytes */
319 uint pgszoob; /* page size including OOB , bytes*/
320 uint secszoob; /* sector size including OOB, bytes */
321 uint pgnum; /* total number of pages */
322 uint pgsec; /* number of pages per sector */
323 uint secshift; /* bits number in sector size */
324 uint pgshift; /* bits number in page size */
325 uint pgaddrbytes; /* bytes per page address */
326 uint secaddrbytes; /* bytes per sector address */
327 uint idbytes; /* the number ID bytes that this chip outputs */
330 /* NAND flash internal registers */
332 unsigned command; /* the command register */
333 u_char status; /* the status register */
334 uint row; /* the page number */
335 uint column; /* the offset within page */
336 uint count; /* internal counter */
337 uint num; /* number of bytes which must be processed */
338 uint off; /* fixed page offset */
341 /* NAND flash lines state */
343 int ce; /* chip Enable */
344 int cle; /* command Latch Enable */
345 int ale; /* address Latch Enable */
346 int wp; /* write Protect */
349 /* Fields needed when using a cache file */
350 struct file *cfile; /* Open file */
351 unsigned long *pages_written; /* Which pages have been written */
353 struct page *held_pages[NS_MAX_HELD_PAGES];
361 * Operations array. To perform any operation the simulator must pass
362 * through the correspondent states chain.
364 static struct nandsim_operations {
365 uint32_t reqopts; /* options which are required to perform the operation */
366 uint32_t states[NS_OPER_STATES]; /* operation's states */
367 } ops[NS_OPER_NUM] = {
368 /* Read page + OOB from the beginning */
369 {OPT_SMALLPAGE, {STATE_CMD_READ0 | ACTION_ZEROOFF, STATE_ADDR_PAGE | ACTION_CPY,
370 STATE_DATAOUT, STATE_READY}},
371 /* Read page + OOB from the second half */
372 {OPT_PAGE512_8BIT, {STATE_CMD_READ1 | ACTION_HALFOFF, STATE_ADDR_PAGE | ACTION_CPY,
373 STATE_DATAOUT, STATE_READY}},
375 {OPT_SMALLPAGE, {STATE_CMD_READOOB | ACTION_OOBOFF, STATE_ADDR_PAGE | ACTION_CPY,
376 STATE_DATAOUT, STATE_READY}},
377 /* Program page starting from the beginning */
378 {OPT_ANY, {STATE_CMD_SEQIN, STATE_ADDR_PAGE, STATE_DATAIN,
379 STATE_CMD_PAGEPROG | ACTION_PRGPAGE, STATE_READY}},
380 /* Program page starting from the beginning */
381 {OPT_SMALLPAGE, {STATE_CMD_READ0, STATE_CMD_SEQIN | ACTION_ZEROOFF, STATE_ADDR_PAGE,
382 STATE_DATAIN, STATE_CMD_PAGEPROG | ACTION_PRGPAGE, STATE_READY}},
383 /* Program page starting from the second half */
384 {OPT_PAGE512, {STATE_CMD_READ1, STATE_CMD_SEQIN | ACTION_HALFOFF, STATE_ADDR_PAGE,
385 STATE_DATAIN, STATE_CMD_PAGEPROG | ACTION_PRGPAGE, STATE_READY}},
387 {OPT_SMALLPAGE, {STATE_CMD_READOOB, STATE_CMD_SEQIN | ACTION_OOBOFF, STATE_ADDR_PAGE,
388 STATE_DATAIN, STATE_CMD_PAGEPROG | ACTION_PRGPAGE, STATE_READY}},
390 {OPT_ANY, {STATE_CMD_ERASE1, STATE_ADDR_SEC, STATE_CMD_ERASE2 | ACTION_SECERASE, STATE_READY}},
392 {OPT_ANY, {STATE_CMD_STATUS, STATE_DATAOUT_STATUS, STATE_READY}},
394 {OPT_ANY, {STATE_CMD_READID, STATE_ADDR_ZERO, STATE_DATAOUT_ID, STATE_READY}},
395 /* Large page devices read page */
396 {OPT_LARGEPAGE, {STATE_CMD_READ0, STATE_ADDR_PAGE, STATE_CMD_READSTART | ACTION_CPY,
397 STATE_DATAOUT, STATE_READY}},
398 /* Large page devices random page read */
399 {OPT_LARGEPAGE, {STATE_CMD_RNDOUT, STATE_ADDR_COLUMN, STATE_CMD_RNDOUTSTART | ACTION_CPY,
400 STATE_DATAOUT, STATE_READY}},
404 struct list_head list;
405 unsigned int erase_block_no;
406 unsigned int max_erases;
407 unsigned int erases_done;
410 static LIST_HEAD(weak_blocks);
413 struct list_head list;
414 unsigned int page_no;
415 unsigned int max_writes;
416 unsigned int writes_done;
419 static LIST_HEAD(weak_pages);
422 struct list_head list;
423 unsigned int page_no;
424 unsigned int max_reads;
425 unsigned int reads_done;
428 static LIST_HEAD(grave_pages);
430 static unsigned long *erase_block_wear = NULL;
431 static unsigned int wear_eb_count = 0;
432 static unsigned long total_wear = 0;
434 /* MTD structure for NAND controller */
435 static struct mtd_info *nsmtd;
437 static int ns_show(struct seq_file *m, void *private)
439 unsigned long wmin = -1, wmax = 0, avg;
440 unsigned long deciles[10], decile_max[10], tot = 0;
443 /* Calc wear stats */
444 for (i = 0; i < wear_eb_count; ++i) {
445 unsigned long wear = erase_block_wear[i];
453 for (i = 0; i < 9; ++i) {
455 decile_max[i] = (wmax * (i + 1) + 5) / 10;
458 decile_max[9] = wmax;
459 for (i = 0; i < wear_eb_count; ++i) {
461 unsigned long wear = erase_block_wear[i];
462 for (d = 0; d < 10; ++d)
463 if (wear <= decile_max[d]) {
468 avg = tot / wear_eb_count;
470 /* Output wear report */
471 seq_printf(m, "Total numbers of erases: %lu\n", tot);
472 seq_printf(m, "Number of erase blocks: %u\n", wear_eb_count);
473 seq_printf(m, "Average number of erases: %lu\n", avg);
474 seq_printf(m, "Maximum number of erases: %lu\n", wmax);
475 seq_printf(m, "Minimum number of erases: %lu\n", wmin);
476 for (i = 0; i < 10; ++i) {
477 unsigned long from = (i ? decile_max[i - 1] + 1 : 0);
478 if (from > decile_max[i])
480 seq_printf(m, "Number of ebs with erase counts from %lu to %lu : %lu\n",
488 DEFINE_SHOW_ATTRIBUTE(ns);
491 * ns_debugfs_create - initialize debugfs
492 * @ns: nandsim device description object
494 * This function creates all debugfs files for UBI device @ubi. Returns zero in
495 * case of success and a negative error code in case of failure.
497 static int ns_debugfs_create(struct nandsim *ns)
499 struct dentry *root = nsmtd->dbg.dfs_dir;
502 * Just skip debugfs initialization when the debugfs directory is
505 if (IS_ERR_OR_NULL(root)) {
506 if (IS_ENABLED(CONFIG_DEBUG_FS) &&
507 !IS_ENABLED(CONFIG_MTD_PARTITIONED_MASTER))
508 NS_WARN("CONFIG_MTD_PARTITIONED_MASTER must be enabled to expose debugfs stuff\n");
512 ns->dent = debugfs_create_file("nandsim_wear_report", 0400, root, ns,
514 if (IS_ERR_OR_NULL(ns->dent)) {
515 NS_ERR("cannot create \"nandsim_wear_report\" debugfs entry\n");
522 static void ns_debugfs_remove(struct nandsim *ns)
524 debugfs_remove_recursive(ns->dent);
528 * Allocate array of page pointers, create slab allocation for an array
529 * and initialize the array by NULL pointers.
531 * RETURNS: 0 if success, -ENOMEM if memory alloc fails.
533 static int __init ns_alloc_device(struct nandsim *ns)
539 cfile = filp_open(cache_file, O_CREAT | O_RDWR | O_LARGEFILE, 0600);
541 return PTR_ERR(cfile);
542 if (!(cfile->f_mode & FMODE_CAN_READ)) {
543 NS_ERR("alloc_device: cache file not readable\n");
547 if (!(cfile->f_mode & FMODE_CAN_WRITE)) {
548 NS_ERR("alloc_device: cache file not writeable\n");
553 vzalloc(array_size(sizeof(unsigned long),
554 BITS_TO_LONGS(ns->geom.pgnum)));
555 if (!ns->pages_written) {
556 NS_ERR("alloc_device: unable to allocate pages written array\n");
560 ns->file_buf = kmalloc(ns->geom.pgszoob, GFP_KERNEL);
562 NS_ERR("alloc_device: unable to allocate file buf\n");
571 vfree(ns->pages_written);
573 filp_close(cfile, NULL);
578 ns->pages = vmalloc(array_size(sizeof(union ns_mem), ns->geom.pgnum));
580 NS_ERR("alloc_device: unable to allocate page array\n");
583 for (i = 0; i < ns->geom.pgnum; i++) {
584 ns->pages[i].byte = NULL;
586 ns->nand_pages_slab = kmem_cache_create("nandsim",
587 ns->geom.pgszoob, 0, 0, NULL);
588 if (!ns->nand_pages_slab) {
589 NS_ERR("cache_create: unable to create kmem_cache\n");
603 * Free any allocated pages, and free the array of page pointers.
605 static void ns_free_device(struct nandsim *ns)
611 vfree(ns->pages_written);
612 filp_close(ns->cfile, NULL);
617 for (i = 0; i < ns->geom.pgnum; i++) {
618 if (ns->pages[i].byte)
619 kmem_cache_free(ns->nand_pages_slab,
622 kmem_cache_destroy(ns->nand_pages_slab);
627 static char __init *ns_get_partition_name(int i)
629 return kasprintf(GFP_KERNEL, "NAND simulator partition %d", i);
633 * Initialize the nandsim structure.
635 * RETURNS: 0 if success, -ERRNO if failure.
637 static int __init ns_init(struct mtd_info *mtd)
639 struct nand_chip *chip = mtd_to_nand(mtd);
640 struct nandsim *ns = nand_get_controller_data(chip);
643 uint64_t next_offset;
645 if (NS_IS_INITIALIZED(ns)) {
646 NS_ERR("init_nandsim: nandsim is already initialized\n");
650 /* Initialize the NAND flash parameters */
651 ns->busw = chip->options & NAND_BUSWIDTH_16 ? 16 : 8;
652 ns->geom.totsz = mtd->size;
653 ns->geom.pgsz = mtd->writesize;
654 ns->geom.oobsz = mtd->oobsize;
655 ns->geom.secsz = mtd->erasesize;
656 ns->geom.pgszoob = ns->geom.pgsz + ns->geom.oobsz;
657 ns->geom.pgnum = div_u64(ns->geom.totsz, ns->geom.pgsz);
658 ns->geom.totszoob = ns->geom.totsz + (uint64_t)ns->geom.pgnum * ns->geom.oobsz;
659 ns->geom.secshift = ffs(ns->geom.secsz) - 1;
660 ns->geom.pgshift = chip->page_shift;
661 ns->geom.pgsec = ns->geom.secsz / ns->geom.pgsz;
662 ns->geom.secszoob = ns->geom.secsz + ns->geom.oobsz * ns->geom.pgsec;
665 if (ns->geom.pgsz == 512) {
666 ns->options |= OPT_PAGE512;
668 ns->options |= OPT_PAGE512_8BIT;
669 } else if (ns->geom.pgsz == 2048) {
670 ns->options |= OPT_PAGE2048;
671 } else if (ns->geom.pgsz == 4096) {
672 ns->options |= OPT_PAGE4096;
674 NS_ERR("init_nandsim: unknown page size %u\n", ns->geom.pgsz);
678 if (ns->options & OPT_SMALLPAGE) {
679 if (ns->geom.totsz <= (32 << 20)) {
680 ns->geom.pgaddrbytes = 3;
681 ns->geom.secaddrbytes = 2;
683 ns->geom.pgaddrbytes = 4;
684 ns->geom.secaddrbytes = 3;
687 if (ns->geom.totsz <= (128 << 20)) {
688 ns->geom.pgaddrbytes = 4;
689 ns->geom.secaddrbytes = 2;
691 ns->geom.pgaddrbytes = 5;
692 ns->geom.secaddrbytes = 3;
696 /* Fill the partition_info structure */
697 if (parts_num > ARRAY_SIZE(ns->partitions)) {
698 NS_ERR("too many partitions.\n");
701 remains = ns->geom.totsz;
703 for (i = 0; i < parts_num; ++i) {
704 uint64_t part_sz = (uint64_t)parts[i] * ns->geom.secsz;
706 if (!part_sz || part_sz > remains) {
707 NS_ERR("bad partition size.\n");
710 ns->partitions[i].name = ns_get_partition_name(i);
711 if (!ns->partitions[i].name) {
712 NS_ERR("unable to allocate memory.\n");
715 ns->partitions[i].offset = next_offset;
716 ns->partitions[i].size = part_sz;
717 next_offset += ns->partitions[i].size;
718 remains -= ns->partitions[i].size;
720 ns->nbparts = parts_num;
722 if (parts_num + 1 > ARRAY_SIZE(ns->partitions)) {
723 NS_ERR("too many partitions.\n");
725 goto free_partition_names;
727 ns->partitions[i].name = ns_get_partition_name(i);
728 if (!ns->partitions[i].name) {
729 NS_ERR("unable to allocate memory.\n");
731 goto free_partition_names;
733 ns->partitions[i].offset = next_offset;
734 ns->partitions[i].size = remains;
739 NS_WARN("16-bit flashes support wasn't tested\n");
741 printk("flash size: %llu MiB\n",
742 (unsigned long long)ns->geom.totsz >> 20);
743 printk("page size: %u bytes\n", ns->geom.pgsz);
744 printk("OOB area size: %u bytes\n", ns->geom.oobsz);
745 printk("sector size: %u KiB\n", ns->geom.secsz >> 10);
746 printk("pages number: %u\n", ns->geom.pgnum);
747 printk("pages per sector: %u\n", ns->geom.pgsec);
748 printk("bus width: %u\n", ns->busw);
749 printk("bits in sector size: %u\n", ns->geom.secshift);
750 printk("bits in page size: %u\n", ns->geom.pgshift);
751 printk("bits in OOB size: %u\n", ffs(ns->geom.oobsz) - 1);
752 printk("flash size with OOB: %llu KiB\n",
753 (unsigned long long)ns->geom.totszoob >> 10);
754 printk("page address bytes: %u\n", ns->geom.pgaddrbytes);
755 printk("sector address bytes: %u\n", ns->geom.secaddrbytes);
756 printk("options: %#x\n", ns->options);
758 ret = ns_alloc_device(ns);
760 goto free_partition_names;
762 /* Allocate / initialize the internal buffer */
763 ns->buf.byte = kmalloc(ns->geom.pgszoob, GFP_KERNEL);
765 NS_ERR("init_nandsim: unable to allocate %u bytes for the internal buffer\n",
770 memset(ns->buf.byte, 0xFF, ns->geom.pgszoob);
776 free_partition_names:
777 for (i = 0; i < ARRAY_SIZE(ns->partitions); ++i)
778 kfree(ns->partitions[i].name);
784 * Free the nandsim structure.
786 static void ns_free(struct nandsim *ns)
790 for (i = 0; i < ARRAY_SIZE(ns->partitions); ++i)
791 kfree(ns->partitions[i].name);
799 static int ns_parse_badblocks(struct nandsim *ns, struct mtd_info *mtd)
803 unsigned int erase_block_no;
810 zero_ok = (*w == '0' ? 1 : 0);
811 erase_block_no = simple_strtoul(w, &w, 0);
812 if (!zero_ok && !erase_block_no) {
813 NS_ERR("invalid badblocks.\n");
816 offset = (loff_t)erase_block_no * ns->geom.secsz;
817 if (mtd_block_markbad(mtd, offset)) {
818 NS_ERR("invalid badblocks.\n");
827 static int ns_parse_weakblocks(void)
831 unsigned int erase_block_no;
832 unsigned int max_erases;
833 struct weak_block *wb;
839 zero_ok = (*w == '0' ? 1 : 0);
840 erase_block_no = simple_strtoul(w, &w, 0);
841 if (!zero_ok && !erase_block_no) {
842 NS_ERR("invalid weakblocks.\n");
848 max_erases = simple_strtoul(w, &w, 0);
852 wb = kzalloc(sizeof(*wb), GFP_KERNEL);
854 NS_ERR("unable to allocate memory.\n");
857 wb->erase_block_no = erase_block_no;
858 wb->max_erases = max_erases;
859 list_add(&wb->list, &weak_blocks);
864 static int ns_erase_error(unsigned int erase_block_no)
866 struct weak_block *wb;
868 list_for_each_entry(wb, &weak_blocks, list)
869 if (wb->erase_block_no == erase_block_no) {
870 if (wb->erases_done >= wb->max_erases)
872 wb->erases_done += 1;
878 static int ns_parse_weakpages(void)
882 unsigned int page_no;
883 unsigned int max_writes;
884 struct weak_page *wp;
890 zero_ok = (*w == '0' ? 1 : 0);
891 page_no = simple_strtoul(w, &w, 0);
892 if (!zero_ok && !page_no) {
893 NS_ERR("invalid weakpages.\n");
899 max_writes = simple_strtoul(w, &w, 0);
903 wp = kzalloc(sizeof(*wp), GFP_KERNEL);
905 NS_ERR("unable to allocate memory.\n");
908 wp->page_no = page_no;
909 wp->max_writes = max_writes;
910 list_add(&wp->list, &weak_pages);
915 static int ns_write_error(unsigned int page_no)
917 struct weak_page *wp;
919 list_for_each_entry(wp, &weak_pages, list)
920 if (wp->page_no == page_no) {
921 if (wp->writes_done >= wp->max_writes)
923 wp->writes_done += 1;
929 static int ns_parse_gravepages(void)
933 unsigned int page_no;
934 unsigned int max_reads;
935 struct grave_page *gp;
941 zero_ok = (*g == '0' ? 1 : 0);
942 page_no = simple_strtoul(g, &g, 0);
943 if (!zero_ok && !page_no) {
944 NS_ERR("invalid gravepagess.\n");
950 max_reads = simple_strtoul(g, &g, 0);
954 gp = kzalloc(sizeof(*gp), GFP_KERNEL);
956 NS_ERR("unable to allocate memory.\n");
959 gp->page_no = page_no;
960 gp->max_reads = max_reads;
961 list_add(&gp->list, &grave_pages);
966 static int ns_read_error(unsigned int page_no)
968 struct grave_page *gp;
970 list_for_each_entry(gp, &grave_pages, list)
971 if (gp->page_no == page_no) {
972 if (gp->reads_done >= gp->max_reads)
980 static int ns_setup_wear_reporting(struct mtd_info *mtd)
984 wear_eb_count = div_u64(mtd->size, mtd->erasesize);
985 mem = wear_eb_count * sizeof(unsigned long);
986 if (mem / sizeof(unsigned long) != wear_eb_count) {
987 NS_ERR("Too many erase blocks for wear reporting\n");
990 erase_block_wear = kzalloc(mem, GFP_KERNEL);
991 if (!erase_block_wear) {
992 NS_ERR("Too many erase blocks for wear reporting\n");
998 static void ns_update_wear(unsigned int erase_block_no)
1000 if (!erase_block_wear)
1004 * TODO: Notify this through a debugfs entry,
1005 * instead of showing an error message.
1007 if (total_wear == 0)
1008 NS_ERR("Erase counter total overflow\n");
1009 erase_block_wear[erase_block_no] += 1;
1010 if (erase_block_wear[erase_block_no] == 0)
1011 NS_ERR("Erase counter overflow for erase block %u\n", erase_block_no);
1015 * Returns the string representation of 'state' state.
1017 static char *ns_get_state_name(uint32_t state)
1019 switch (NS_STATE(state)) {
1020 case STATE_CMD_READ0:
1021 return "STATE_CMD_READ0";
1022 case STATE_CMD_READ1:
1023 return "STATE_CMD_READ1";
1024 case STATE_CMD_PAGEPROG:
1025 return "STATE_CMD_PAGEPROG";
1026 case STATE_CMD_READOOB:
1027 return "STATE_CMD_READOOB";
1028 case STATE_CMD_READSTART:
1029 return "STATE_CMD_READSTART";
1030 case STATE_CMD_ERASE1:
1031 return "STATE_CMD_ERASE1";
1032 case STATE_CMD_STATUS:
1033 return "STATE_CMD_STATUS";
1034 case STATE_CMD_SEQIN:
1035 return "STATE_CMD_SEQIN";
1036 case STATE_CMD_READID:
1037 return "STATE_CMD_READID";
1038 case STATE_CMD_ERASE2:
1039 return "STATE_CMD_ERASE2";
1040 case STATE_CMD_RESET:
1041 return "STATE_CMD_RESET";
1042 case STATE_CMD_RNDOUT:
1043 return "STATE_CMD_RNDOUT";
1044 case STATE_CMD_RNDOUTSTART:
1045 return "STATE_CMD_RNDOUTSTART";
1046 case STATE_ADDR_PAGE:
1047 return "STATE_ADDR_PAGE";
1048 case STATE_ADDR_SEC:
1049 return "STATE_ADDR_SEC";
1050 case STATE_ADDR_ZERO:
1051 return "STATE_ADDR_ZERO";
1052 case STATE_ADDR_COLUMN:
1053 return "STATE_ADDR_COLUMN";
1055 return "STATE_DATAIN";
1057 return "STATE_DATAOUT";
1058 case STATE_DATAOUT_ID:
1059 return "STATE_DATAOUT_ID";
1060 case STATE_DATAOUT_STATUS:
1061 return "STATE_DATAOUT_STATUS";
1063 return "STATE_READY";
1065 return "STATE_UNKNOWN";
1068 NS_ERR("get_state_name: unknown state, BUG\n");
1073 * Check if command is valid.
1075 * RETURNS: 1 if wrong command, 0 if right.
1077 static int ns_check_command(int cmd)
1081 case NAND_CMD_READ0:
1082 case NAND_CMD_READ1:
1083 case NAND_CMD_READSTART:
1084 case NAND_CMD_PAGEPROG:
1085 case NAND_CMD_READOOB:
1086 case NAND_CMD_ERASE1:
1087 case NAND_CMD_STATUS:
1088 case NAND_CMD_SEQIN:
1089 case NAND_CMD_READID:
1090 case NAND_CMD_ERASE2:
1091 case NAND_CMD_RESET:
1092 case NAND_CMD_RNDOUT:
1093 case NAND_CMD_RNDOUTSTART:
1102 * Returns state after command is accepted by command number.
1104 static uint32_t ns_get_state_by_command(unsigned command)
1107 case NAND_CMD_READ0:
1108 return STATE_CMD_READ0;
1109 case NAND_CMD_READ1:
1110 return STATE_CMD_READ1;
1111 case NAND_CMD_PAGEPROG:
1112 return STATE_CMD_PAGEPROG;
1113 case NAND_CMD_READSTART:
1114 return STATE_CMD_READSTART;
1115 case NAND_CMD_READOOB:
1116 return STATE_CMD_READOOB;
1117 case NAND_CMD_ERASE1:
1118 return STATE_CMD_ERASE1;
1119 case NAND_CMD_STATUS:
1120 return STATE_CMD_STATUS;
1121 case NAND_CMD_SEQIN:
1122 return STATE_CMD_SEQIN;
1123 case NAND_CMD_READID:
1124 return STATE_CMD_READID;
1125 case NAND_CMD_ERASE2:
1126 return STATE_CMD_ERASE2;
1127 case NAND_CMD_RESET:
1128 return STATE_CMD_RESET;
1129 case NAND_CMD_RNDOUT:
1130 return STATE_CMD_RNDOUT;
1131 case NAND_CMD_RNDOUTSTART:
1132 return STATE_CMD_RNDOUTSTART;
1135 NS_ERR("get_state_by_command: unknown command, BUG\n");
1140 * Move an address byte to the correspondent internal register.
1142 static inline void ns_accept_addr_byte(struct nandsim *ns, u_char bt)
1144 uint byte = (uint)bt;
1146 if (ns->regs.count < (ns->geom.pgaddrbytes - ns->geom.secaddrbytes))
1147 ns->regs.column |= (byte << 8 * ns->regs.count);
1149 ns->regs.row |= (byte << 8 * (ns->regs.count -
1150 ns->geom.pgaddrbytes +
1151 ns->geom.secaddrbytes));
1158 * Switch to STATE_READY state.
1160 static inline void ns_switch_to_ready_state(struct nandsim *ns, u_char status)
1162 NS_DBG("switch_to_ready_state: switch to %s state\n",
1163 ns_get_state_name(STATE_READY));
1165 ns->state = STATE_READY;
1166 ns->nxstate = STATE_UNKNOWN;
1174 ns->regs.column = 0;
1175 ns->regs.status = status;
1179 * If the operation isn't known yet, try to find it in the global array
1180 * of supported operations.
1182 * Operation can be unknown because of the following.
1183 * 1. New command was accepted and this is the first call to find the
1184 * correspondent states chain. In this case ns->npstates = 0;
1185 * 2. There are several operations which begin with the same command(s)
1186 * (for example program from the second half and read from the
1187 * second half operations both begin with the READ1 command). In this
1188 * case the ns->pstates[] array contains previous states.
1190 * Thus, the function tries to find operation containing the following
1191 * states (if the 'flag' parameter is 0):
1192 * ns->pstates[0], ... ns->pstates[ns->npstates], ns->state
1194 * If (one and only one) matching operation is found, it is accepted (
1195 * ns->ops, ns->state, ns->nxstate are initialized, ns->npstate is
1198 * If there are several matches, the current state is pushed to the
1201 * The operation can be unknown only while commands are input to the chip.
1202 * As soon as address command is accepted, the operation must be known.
1203 * In such situation the function is called with 'flag' != 0, and the
1204 * operation is searched using the following pattern:
1205 * ns->pstates[0], ... ns->pstates[ns->npstates], <address input>
1207 * It is supposed that this pattern must either match one operation or
1208 * none. There can't be ambiguity in that case.
1210 * If no matches found, the function does the following:
1211 * 1. if there are saved states present, try to ignore them and search
1212 * again only using the last command. If nothing was found, switch
1213 * to the STATE_READY state.
1214 * 2. if there are no saved states, switch to the STATE_READY state.
1216 * RETURNS: -2 - no matched operations found.
1217 * -1 - several matches.
1218 * 0 - operation is found.
1220 static int ns_find_operation(struct nandsim *ns, uint32_t flag)
1225 for (i = 0; i < NS_OPER_NUM; i++) {
1229 if (!(ns->options & ops[i].reqopts))
1230 /* Ignore operations we can't perform */
1234 if (!(ops[i].states[ns->npstates] & STATE_ADDR_MASK))
1237 if (NS_STATE(ns->state) != NS_STATE(ops[i].states[ns->npstates]))
1241 for (j = 0; j < ns->npstates; j++)
1242 if (NS_STATE(ops[i].states[j]) != NS_STATE(ns->pstates[j])
1243 && (ns->options & ops[idx].reqopts)) {
1254 if (opsfound == 1) {
1256 ns->op = &ops[idx].states[0];
1259 * In this case the find_operation function was
1260 * called when address has just began input. But it isn't
1261 * yet fully input and the current state must
1262 * not be one of STATE_ADDR_*, but the STATE_ADDR_*
1263 * state must be the next state (ns->nxstate).
1265 ns->stateidx = ns->npstates - 1;
1267 ns->stateidx = ns->npstates;
1270 ns->state = ns->op[ns->stateidx];
1271 ns->nxstate = ns->op[ns->stateidx + 1];
1272 NS_DBG("find_operation: operation found, index: %d, state: %s, nxstate %s\n",
1273 idx, ns_get_state_name(ns->state),
1274 ns_get_state_name(ns->nxstate));
1278 if (opsfound == 0) {
1279 /* Nothing was found. Try to ignore previous commands (if any) and search again */
1280 if (ns->npstates != 0) {
1281 NS_DBG("find_operation: no operation found, try again with state %s\n",
1282 ns_get_state_name(ns->state));
1284 return ns_find_operation(ns, 0);
1287 NS_DBG("find_operation: no operations found\n");
1288 ns_switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
1293 /* This shouldn't happen */
1294 NS_DBG("find_operation: BUG, operation must be known if address is input\n");
1298 NS_DBG("find_operation: there is still ambiguity\n");
1300 ns->pstates[ns->npstates++] = ns->state;
1305 static void ns_put_pages(struct nandsim *ns)
1309 for (i = 0; i < ns->held_cnt; i++)
1310 put_page(ns->held_pages[i]);
1313 /* Get page cache pages in advance to provide NOFS memory allocation */
1314 static int ns_get_pages(struct nandsim *ns, struct file *file, size_t count,
1317 pgoff_t index, start_index, end_index;
1319 struct address_space *mapping = file->f_mapping;
1321 start_index = pos >> PAGE_SHIFT;
1322 end_index = (pos + count - 1) >> PAGE_SHIFT;
1323 if (end_index - start_index + 1 > NS_MAX_HELD_PAGES)
1326 for (index = start_index; index <= end_index; index++) {
1327 page = find_get_page(mapping, index);
1329 page = find_or_create_page(mapping, index, GFP_NOFS);
1331 write_inode_now(mapping->host, 1);
1332 page = find_or_create_page(mapping, index, GFP_NOFS);
1340 ns->held_pages[ns->held_cnt++] = page;
1345 static ssize_t ns_read_file(struct nandsim *ns, struct file *file, void *buf,
1346 size_t count, loff_t pos)
1350 unsigned int noreclaim_flag;
1352 err = ns_get_pages(ns, file, count, pos);
1355 noreclaim_flag = memalloc_noreclaim_save();
1356 tx = kernel_read(file, buf, count, &pos);
1357 memalloc_noreclaim_restore(noreclaim_flag);
1362 static ssize_t ns_write_file(struct nandsim *ns, struct file *file, void *buf,
1363 size_t count, loff_t pos)
1367 unsigned int noreclaim_flag;
1369 err = ns_get_pages(ns, file, count, pos);
1372 noreclaim_flag = memalloc_noreclaim_save();
1373 tx = kernel_write(file, buf, count, &pos);
1374 memalloc_noreclaim_restore(noreclaim_flag);
1380 * Returns a pointer to the current page.
1382 static inline union ns_mem *NS_GET_PAGE(struct nandsim *ns)
1384 return &(ns->pages[ns->regs.row]);
1388 * Retuns a pointer to the current byte, within the current page.
1390 static inline u_char *NS_PAGE_BYTE_OFF(struct nandsim *ns)
1392 return NS_GET_PAGE(ns)->byte + ns->regs.column + ns->regs.off;
1395 static int ns_do_read_error(struct nandsim *ns, int num)
1397 unsigned int page_no = ns->regs.row;
1399 if (ns_read_error(page_no)) {
1400 prandom_bytes(ns->buf.byte, num);
1401 NS_WARN("simulating read error in page %u\n", page_no);
1407 static void ns_do_bit_flips(struct nandsim *ns, int num)
1409 if (bitflips && prandom_u32() < (1 << 22)) {
1412 flips = (prandom_u32() % (int) bitflips) + 1;
1414 int pos = prandom_u32() % (num * 8);
1415 ns->buf.byte[pos / 8] ^= (1 << (pos % 8));
1416 NS_WARN("read_page: flipping bit %d in page %d "
1417 "reading from %d ecc: corrected=%u failed=%u\n",
1418 pos, ns->regs.row, ns->regs.column + ns->regs.off,
1419 nsmtd->ecc_stats.corrected, nsmtd->ecc_stats.failed);
1425 * Fill the NAND buffer with data read from the specified page.
1427 static void ns_read_page(struct nandsim *ns, int num)
1429 union ns_mem *mypage;
1432 if (!test_bit(ns->regs.row, ns->pages_written)) {
1433 NS_DBG("read_page: page %d not written\n", ns->regs.row);
1434 memset(ns->buf.byte, 0xFF, num);
1439 NS_DBG("read_page: page %d written, reading from %d\n",
1440 ns->regs.row, ns->regs.column + ns->regs.off);
1441 if (ns_do_read_error(ns, num))
1443 pos = (loff_t)NS_RAW_OFFSET(ns) + ns->regs.off;
1444 tx = ns_read_file(ns, ns->cfile, ns->buf.byte, num,
1447 NS_ERR("read_page: read error for page %d ret %ld\n", ns->regs.row, (long)tx);
1450 ns_do_bit_flips(ns, num);
1455 mypage = NS_GET_PAGE(ns);
1456 if (mypage->byte == NULL) {
1457 NS_DBG("read_page: page %d not allocated\n", ns->regs.row);
1458 memset(ns->buf.byte, 0xFF, num);
1460 NS_DBG("read_page: page %d allocated, reading from %d\n",
1461 ns->regs.row, ns->regs.column + ns->regs.off);
1462 if (ns_do_read_error(ns, num))
1464 memcpy(ns->buf.byte, NS_PAGE_BYTE_OFF(ns), num);
1465 ns_do_bit_flips(ns, num);
1470 * Erase all pages in the specified sector.
1472 static void ns_erase_sector(struct nandsim *ns)
1474 union ns_mem *mypage;
1478 for (i = 0; i < ns->geom.pgsec; i++)
1479 if (__test_and_clear_bit(ns->regs.row + i,
1480 ns->pages_written)) {
1481 NS_DBG("erase_sector: freeing page %d\n", ns->regs.row + i);
1486 mypage = NS_GET_PAGE(ns);
1487 for (i = 0; i < ns->geom.pgsec; i++) {
1488 if (mypage->byte != NULL) {
1489 NS_DBG("erase_sector: freeing page %d\n", ns->regs.row+i);
1490 kmem_cache_free(ns->nand_pages_slab, mypage->byte);
1491 mypage->byte = NULL;
1498 * Program the specified page with the contents from the NAND buffer.
1500 static int ns_prog_page(struct nandsim *ns, int num)
1503 union ns_mem *mypage;
1511 NS_DBG("prog_page: writing page %d\n", ns->regs.row);
1512 pg_off = ns->file_buf + ns->regs.column + ns->regs.off;
1513 off = (loff_t)NS_RAW_OFFSET(ns) + ns->regs.off;
1514 if (!test_bit(ns->regs.row, ns->pages_written)) {
1516 memset(ns->file_buf, 0xff, ns->geom.pgszoob);
1519 tx = ns_read_file(ns, ns->cfile, pg_off, num, off);
1521 NS_ERR("prog_page: read error for page %d ret %ld\n", ns->regs.row, (long)tx);
1525 for (i = 0; i < num; i++)
1526 pg_off[i] &= ns->buf.byte[i];
1528 loff_t pos = (loff_t)ns->regs.row * ns->geom.pgszoob;
1529 tx = ns_write_file(ns, ns->cfile, ns->file_buf,
1530 ns->geom.pgszoob, pos);
1531 if (tx != ns->geom.pgszoob) {
1532 NS_ERR("prog_page: write error for page %d ret %ld\n", ns->regs.row, (long)tx);
1535 __set_bit(ns->regs.row, ns->pages_written);
1537 tx = ns_write_file(ns, ns->cfile, pg_off, num, off);
1539 NS_ERR("prog_page: write error for page %d ret %ld\n", ns->regs.row, (long)tx);
1546 mypage = NS_GET_PAGE(ns);
1547 if (mypage->byte == NULL) {
1548 NS_DBG("prog_page: allocating page %d\n", ns->regs.row);
1550 * We allocate memory with GFP_NOFS because a flash FS may
1551 * utilize this. If it is holding an FS lock, then gets here,
1552 * then kernel memory alloc runs writeback which goes to the FS
1553 * again and deadlocks. This was seen in practice.
1555 mypage->byte = kmem_cache_alloc(ns->nand_pages_slab, GFP_NOFS);
1556 if (mypage->byte == NULL) {
1557 NS_ERR("prog_page: error allocating memory for page %d\n", ns->regs.row);
1560 memset(mypage->byte, 0xFF, ns->geom.pgszoob);
1563 pg_off = NS_PAGE_BYTE_OFF(ns);
1564 for (i = 0; i < num; i++)
1565 pg_off[i] &= ns->buf.byte[i];
1571 * If state has any action bit, perform this action.
1573 * RETURNS: 0 if success, -1 if error.
1575 static int ns_do_state_action(struct nandsim *ns, uint32_t action)
1578 int busdiv = ns->busw == 8 ? 1 : 2;
1579 unsigned int erase_block_no, page_no;
1581 action &= ACTION_MASK;
1583 /* Check that page address input is correct */
1584 if (action != ACTION_SECERASE && ns->regs.row >= ns->geom.pgnum) {
1585 NS_WARN("do_state_action: wrong page number (%#x)\n", ns->regs.row);
1593 * Copy page data to the internal buffer.
1596 /* Column shouldn't be very large */
1597 if (ns->regs.column >= (ns->geom.pgszoob - ns->regs.off)) {
1598 NS_ERR("do_state_action: column number is too large\n");
1601 num = ns->geom.pgszoob - ns->regs.off - ns->regs.column;
1602 ns_read_page(ns, num);
1604 NS_DBG("do_state_action: (ACTION_CPY:) copy %d bytes to int buf, raw offset %d\n",
1605 num, NS_RAW_OFFSET(ns) + ns->regs.off);
1607 if (ns->regs.off == 0)
1608 NS_LOG("read page %d\n", ns->regs.row);
1609 else if (ns->regs.off < ns->geom.pgsz)
1610 NS_LOG("read page %d (second half)\n", ns->regs.row);
1612 NS_LOG("read OOB of page %d\n", ns->regs.row);
1614 NS_UDELAY(access_delay);
1615 NS_UDELAY(input_cycle * ns->geom.pgsz / 1000 / busdiv);
1619 case ACTION_SECERASE:
1625 NS_ERR("do_state_action: device is write-protected, ignore sector erase\n");
1629 if (ns->regs.row >= ns->geom.pgnum - ns->geom.pgsec
1630 || (ns->regs.row & ~(ns->geom.secsz - 1))) {
1631 NS_ERR("do_state_action: wrong sector address (%#x)\n", ns->regs.row);
1635 ns->regs.row = (ns->regs.row <<
1636 8 * (ns->geom.pgaddrbytes - ns->geom.secaddrbytes)) | ns->regs.column;
1637 ns->regs.column = 0;
1639 erase_block_no = ns->regs.row >> (ns->geom.secshift - ns->geom.pgshift);
1641 NS_DBG("do_state_action: erase sector at address %#x, off = %d\n",
1642 ns->regs.row, NS_RAW_OFFSET(ns));
1643 NS_LOG("erase sector %u\n", erase_block_no);
1645 ns_erase_sector(ns);
1647 NS_MDELAY(erase_delay);
1649 if (erase_block_wear)
1650 ns_update_wear(erase_block_no);
1652 if (ns_erase_error(erase_block_no)) {
1653 NS_WARN("simulating erase failure in erase block %u\n", erase_block_no);
1659 case ACTION_PRGPAGE:
1661 * Program page - move internal buffer data to the page.
1665 NS_WARN("do_state_action: device is write-protected, programm\n");
1669 num = ns->geom.pgszoob - ns->regs.off - ns->regs.column;
1670 if (num != ns->regs.count) {
1671 NS_ERR("do_state_action: too few bytes were input (%d instead of %d)\n",
1672 ns->regs.count, num);
1676 if (ns_prog_page(ns, num) == -1)
1679 page_no = ns->regs.row;
1681 NS_DBG("do_state_action: copy %d bytes from int buf to (%#x, %#x), raw off = %d\n",
1682 num, ns->regs.row, ns->regs.column, NS_RAW_OFFSET(ns) + ns->regs.off);
1683 NS_LOG("programm page %d\n", ns->regs.row);
1685 NS_UDELAY(programm_delay);
1686 NS_UDELAY(output_cycle * ns->geom.pgsz / 1000 / busdiv);
1688 if (ns_write_error(page_no)) {
1689 NS_WARN("simulating write failure in page %u\n", page_no);
1695 case ACTION_ZEROOFF:
1696 NS_DBG("do_state_action: set internal offset to 0\n");
1700 case ACTION_HALFOFF:
1701 if (!(ns->options & OPT_PAGE512_8BIT)) {
1702 NS_ERR("do_state_action: BUG! can't skip half of page for non-512"
1703 "byte page size 8x chips\n");
1706 NS_DBG("do_state_action: set internal offset to %d\n", ns->geom.pgsz/2);
1707 ns->regs.off = ns->geom.pgsz/2;
1711 NS_DBG("do_state_action: set internal offset to %d\n", ns->geom.pgsz);
1712 ns->regs.off = ns->geom.pgsz;
1716 NS_DBG("do_state_action: BUG! unknown action\n");
1723 * Switch simulator's state.
1725 static void ns_switch_state(struct nandsim *ns)
1729 * The current operation have already been identified.
1730 * Just follow the states chain.
1734 ns->state = ns->nxstate;
1735 ns->nxstate = ns->op[ns->stateidx + 1];
1737 NS_DBG("switch_state: operation is known, switch to the next state, "
1738 "state: %s, nxstate: %s\n",
1739 ns_get_state_name(ns->state),
1740 ns_get_state_name(ns->nxstate));
1742 /* See, whether we need to do some action */
1743 if ((ns->state & ACTION_MASK) &&
1744 ns_do_state_action(ns, ns->state) < 0) {
1745 ns_switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
1751 * We don't yet know which operation we perform.
1752 * Try to identify it.
1756 * The only event causing the switch_state function to
1757 * be called with yet unknown operation is new command.
1759 ns->state = ns_get_state_by_command(ns->regs.command);
1761 NS_DBG("switch_state: operation is unknown, try to find it\n");
1763 if (ns_find_operation(ns, 0))
1766 if ((ns->state & ACTION_MASK) &&
1767 ns_do_state_action(ns, ns->state) < 0) {
1768 ns_switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
1773 /* For 16x devices column means the page offset in words */
1774 if ((ns->nxstate & STATE_ADDR_MASK) && ns->busw == 16) {
1775 NS_DBG("switch_state: double the column number for 16x device\n");
1776 ns->regs.column <<= 1;
1779 if (NS_STATE(ns->nxstate) == STATE_READY) {
1781 * The current state is the last. Return to STATE_READY
1784 u_char status = NS_STATUS_OK(ns);
1786 /* In case of data states, see if all bytes were input/output */
1787 if ((ns->state & (STATE_DATAIN_MASK | STATE_DATAOUT_MASK))
1788 && ns->regs.count != ns->regs.num) {
1789 NS_WARN("switch_state: not all bytes were processed, %d left\n",
1790 ns->regs.num - ns->regs.count);
1791 status = NS_STATUS_FAILED(ns);
1794 NS_DBG("switch_state: operation complete, switch to STATE_READY state\n");
1796 ns_switch_to_ready_state(ns, status);
1799 } else if (ns->nxstate & (STATE_DATAIN_MASK | STATE_DATAOUT_MASK)) {
1801 * If the next state is data input/output, switch to it now
1804 ns->state = ns->nxstate;
1805 ns->nxstate = ns->op[++ns->stateidx + 1];
1806 ns->regs.num = ns->regs.count = 0;
1808 NS_DBG("switch_state: the next state is data I/O, switch, "
1809 "state: %s, nxstate: %s\n",
1810 ns_get_state_name(ns->state),
1811 ns_get_state_name(ns->nxstate));
1814 * Set the internal register to the count of bytes which
1815 * are expected to be input or output
1817 switch (NS_STATE(ns->state)) {
1820 ns->regs.num = ns->geom.pgszoob - ns->regs.off - ns->regs.column;
1823 case STATE_DATAOUT_ID:
1824 ns->regs.num = ns->geom.idbytes;
1827 case STATE_DATAOUT_STATUS:
1828 ns->regs.count = ns->regs.num = 0;
1832 NS_ERR("switch_state: BUG! unknown data state\n");
1835 } else if (ns->nxstate & STATE_ADDR_MASK) {
1837 * If the next state is address input, set the internal
1838 * register to the number of expected address bytes
1843 switch (NS_STATE(ns->nxstate)) {
1844 case STATE_ADDR_PAGE:
1845 ns->regs.num = ns->geom.pgaddrbytes;
1848 case STATE_ADDR_SEC:
1849 ns->regs.num = ns->geom.secaddrbytes;
1852 case STATE_ADDR_ZERO:
1856 case STATE_ADDR_COLUMN:
1857 /* Column address is always 2 bytes */
1858 ns->regs.num = ns->geom.pgaddrbytes - ns->geom.secaddrbytes;
1862 NS_ERR("switch_state: BUG! unknown address state\n");
1866 * Just reset internal counters.
1874 static u_char ns_nand_read_byte(struct nand_chip *chip)
1876 struct nandsim *ns = nand_get_controller_data(chip);
1879 /* Sanity and correctness checks */
1880 if (!ns->lines.ce) {
1881 NS_ERR("read_byte: chip is disabled, return %#x\n", (uint)outb);
1884 if (ns->lines.ale || ns->lines.cle) {
1885 NS_ERR("read_byte: ALE or CLE pin is high, return %#x\n", (uint)outb);
1888 if (!(ns->state & STATE_DATAOUT_MASK)) {
1889 NS_WARN("read_byte: unexpected data output cycle, state is %s return %#x\n",
1890 ns_get_state_name(ns->state), (uint)outb);
1894 /* Status register may be read as many times as it is wanted */
1895 if (NS_STATE(ns->state) == STATE_DATAOUT_STATUS) {
1896 NS_DBG("read_byte: return %#x status\n", ns->regs.status);
1897 return ns->regs.status;
1900 /* Check if there is any data in the internal buffer which may be read */
1901 if (ns->regs.count == ns->regs.num) {
1902 NS_WARN("read_byte: no more data to output, return %#x\n", (uint)outb);
1906 switch (NS_STATE(ns->state)) {
1908 if (ns->busw == 8) {
1909 outb = ns->buf.byte[ns->regs.count];
1910 ns->regs.count += 1;
1912 outb = (u_char)cpu_to_le16(ns->buf.word[ns->regs.count >> 1]);
1913 ns->regs.count += 2;
1916 case STATE_DATAOUT_ID:
1917 NS_DBG("read_byte: read ID byte %d, total = %d\n", ns->regs.count, ns->regs.num);
1918 outb = ns->ids[ns->regs.count];
1919 ns->regs.count += 1;
1925 if (ns->regs.count == ns->regs.num) {
1926 NS_DBG("read_byte: all bytes were read\n");
1928 if (NS_STATE(ns->nxstate) == STATE_READY)
1929 ns_switch_state(ns);
1935 static void ns_nand_write_byte(struct nand_chip *chip, u_char byte)
1937 struct nandsim *ns = nand_get_controller_data(chip);
1939 /* Sanity and correctness checks */
1940 if (!ns->lines.ce) {
1941 NS_ERR("write_byte: chip is disabled, ignore write\n");
1944 if (ns->lines.ale && ns->lines.cle) {
1945 NS_ERR("write_byte: ALE and CLE pins are high simultaneously, ignore write\n");
1949 if (ns->lines.cle == 1) {
1951 * The byte written is a command.
1954 if (byte == NAND_CMD_RESET) {
1955 NS_LOG("reset chip\n");
1956 ns_switch_to_ready_state(ns, NS_STATUS_OK(ns));
1960 /* Check that the command byte is correct */
1961 if (ns_check_command(byte)) {
1962 NS_ERR("write_byte: unknown command %#x\n", (uint)byte);
1966 if (NS_STATE(ns->state) == STATE_DATAOUT_STATUS
1967 || NS_STATE(ns->state) == STATE_DATAOUT) {
1968 int row = ns->regs.row;
1970 ns_switch_state(ns);
1971 if (byte == NAND_CMD_RNDOUT)
1975 /* Check if chip is expecting command */
1976 if (NS_STATE(ns->nxstate) != STATE_UNKNOWN && !(ns->nxstate & STATE_CMD_MASK)) {
1977 /* Do not warn if only 2 id bytes are read */
1978 if (!(ns->regs.command == NAND_CMD_READID &&
1979 NS_STATE(ns->state) == STATE_DATAOUT_ID && ns->regs.count == 2)) {
1981 * We are in situation when something else (not command)
1982 * was expected but command was input. In this case ignore
1983 * previous command(s)/state(s) and accept the last one.
1985 NS_WARN("write_byte: command (%#x) wasn't expected, expected state is %s, ignore previous states\n",
1987 ns_get_state_name(ns->nxstate));
1989 ns_switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
1992 NS_DBG("command byte corresponding to %s state accepted\n",
1993 ns_get_state_name(ns_get_state_by_command(byte)));
1994 ns->regs.command = byte;
1995 ns_switch_state(ns);
1997 } else if (ns->lines.ale == 1) {
1999 * The byte written is an address.
2002 if (NS_STATE(ns->nxstate) == STATE_UNKNOWN) {
2004 NS_DBG("write_byte: operation isn't known yet, identify it\n");
2006 if (ns_find_operation(ns, 1) < 0)
2009 if ((ns->state & ACTION_MASK) &&
2010 ns_do_state_action(ns, ns->state) < 0) {
2011 ns_switch_to_ready_state(ns,
2012 NS_STATUS_FAILED(ns));
2017 switch (NS_STATE(ns->nxstate)) {
2018 case STATE_ADDR_PAGE:
2019 ns->regs.num = ns->geom.pgaddrbytes;
2021 case STATE_ADDR_SEC:
2022 ns->regs.num = ns->geom.secaddrbytes;
2024 case STATE_ADDR_ZERO:
2032 /* Check that chip is expecting address */
2033 if (!(ns->nxstate & STATE_ADDR_MASK)) {
2034 NS_ERR("write_byte: address (%#x) isn't expected, expected state is %s, switch to STATE_READY\n",
2035 (uint)byte, ns_get_state_name(ns->nxstate));
2036 ns_switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
2040 /* Check if this is expected byte */
2041 if (ns->regs.count == ns->regs.num) {
2042 NS_ERR("write_byte: no more address bytes expected\n");
2043 ns_switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
2047 ns_accept_addr_byte(ns, byte);
2049 ns->regs.count += 1;
2051 NS_DBG("write_byte: address byte %#x was accepted (%d bytes input, %d expected)\n",
2052 (uint)byte, ns->regs.count, ns->regs.num);
2054 if (ns->regs.count == ns->regs.num) {
2055 NS_DBG("address (%#x, %#x) is accepted\n", ns->regs.row, ns->regs.column);
2056 ns_switch_state(ns);
2061 * The byte written is an input data.
2064 /* Check that chip is expecting data input */
2065 if (!(ns->state & STATE_DATAIN_MASK)) {
2066 NS_ERR("write_byte: data input (%#x) isn't expected, state is %s, switch to %s\n",
2067 (uint)byte, ns_get_state_name(ns->state),
2068 ns_get_state_name(STATE_READY));
2069 ns_switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
2073 /* Check if this is expected byte */
2074 if (ns->regs.count == ns->regs.num) {
2075 NS_WARN("write_byte: %u input bytes has already been accepted, ignore write\n",
2080 if (ns->busw == 8) {
2081 ns->buf.byte[ns->regs.count] = byte;
2082 ns->regs.count += 1;
2084 ns->buf.word[ns->regs.count >> 1] = cpu_to_le16((uint16_t)byte);
2085 ns->regs.count += 2;
2092 static void ns_nand_write_buf(struct nand_chip *chip, const u_char *buf,
2095 struct nandsim *ns = nand_get_controller_data(chip);
2097 /* Check that chip is expecting data input */
2098 if (!(ns->state & STATE_DATAIN_MASK)) {
2099 NS_ERR("write_buf: data input isn't expected, state is %s, switch to STATE_READY\n",
2100 ns_get_state_name(ns->state));
2101 ns_switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
2105 /* Check if these are expected bytes */
2106 if (ns->regs.count + len > ns->regs.num) {
2107 NS_ERR("write_buf: too many input bytes\n");
2108 ns_switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
2112 memcpy(ns->buf.byte + ns->regs.count, buf, len);
2113 ns->regs.count += len;
2115 if (ns->regs.count == ns->regs.num) {
2116 NS_DBG("write_buf: %d bytes were written\n", ns->regs.count);
2120 static void ns_nand_read_buf(struct nand_chip *chip, u_char *buf, int len)
2122 struct nandsim *ns = nand_get_controller_data(chip);
2124 /* Sanity and correctness checks */
2125 if (!ns->lines.ce) {
2126 NS_ERR("read_buf: chip is disabled\n");
2129 if (ns->lines.ale || ns->lines.cle) {
2130 NS_ERR("read_buf: ALE or CLE pin is high\n");
2133 if (!(ns->state & STATE_DATAOUT_MASK)) {
2134 NS_WARN("read_buf: unexpected data output cycle, current state is %s\n",
2135 ns_get_state_name(ns->state));
2139 if (NS_STATE(ns->state) != STATE_DATAOUT) {
2142 for (i = 0; i < len; i++)
2143 buf[i] = ns_nand_read_byte(chip);
2148 /* Check if these are expected bytes */
2149 if (ns->regs.count + len > ns->regs.num) {
2150 NS_ERR("read_buf: too many bytes to read\n");
2151 ns_switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
2155 memcpy(buf, ns->buf.byte + ns->regs.count, len);
2156 ns->regs.count += len;
2158 if (ns->regs.count == ns->regs.num) {
2159 if (NS_STATE(ns->nxstate) == STATE_READY)
2160 ns_switch_state(ns);
2166 static int ns_exec_op(struct nand_chip *chip, const struct nand_operation *op,
2171 const struct nand_op_instr *instr = NULL;
2172 struct nandsim *ns = nand_get_controller_data(chip);
2179 for (op_id = 0; op_id < op->ninstrs; op_id++) {
2180 instr = &op->instrs[op_id];
2184 switch (instr->type) {
2185 case NAND_OP_CMD_INSTR:
2187 ns_nand_write_byte(chip, instr->ctx.cmd.opcode);
2189 case NAND_OP_ADDR_INSTR:
2191 for (i = 0; i < instr->ctx.addr.naddrs; i++)
2192 ns_nand_write_byte(chip, instr->ctx.addr.addrs[i]);
2194 case NAND_OP_DATA_IN_INSTR:
2195 ns_nand_read_buf(chip, instr->ctx.data.buf.in, instr->ctx.data.len);
2197 case NAND_OP_DATA_OUT_INSTR:
2198 ns_nand_write_buf(chip, instr->ctx.data.buf.out, instr->ctx.data.len);
2200 case NAND_OP_WAITRDY_INSTR:
2201 /* we are always ready */
2209 static int ns_attach_chip(struct nand_chip *chip)
2211 unsigned int eccsteps, eccbytes;
2213 chip->ecc.engine_type = NAND_ECC_ENGINE_TYPE_SOFT;
2214 chip->ecc.algo = bch ? NAND_ECC_ALGO_BCH : NAND_ECC_ALGO_HAMMING;
2219 if (!IS_ENABLED(CONFIG_MTD_NAND_ECC_SW_BCH)) {
2220 NS_ERR("BCH ECC support is disabled\n");
2224 /* Use 512-byte ecc blocks */
2225 eccsteps = nsmtd->writesize / 512;
2226 eccbytes = ((bch * 13) + 7) / 8;
2228 /* Do not bother supporting small page devices */
2229 if (nsmtd->oobsize < 64 || !eccsteps) {
2230 NS_ERR("BCH not available on small page devices\n");
2234 if (((eccbytes * eccsteps) + 2) > nsmtd->oobsize) {
2235 NS_ERR("Invalid BCH value %u\n", bch);
2239 chip->ecc.size = 512;
2240 chip->ecc.strength = bch;
2241 chip->ecc.bytes = eccbytes;
2243 NS_INFO("Using %u-bit/%u bytes BCH ECC\n", bch, chip->ecc.size);
2248 static const struct nand_controller_ops ns_controller_ops = {
2249 .attach_chip = ns_attach_chip,
2250 .exec_op = ns_exec_op,
2254 * Module initialization function
2256 static int __init ns_init_module(void)
2258 struct list_head *pos, *n;
2259 struct nand_chip *chip;
2263 if (bus_width != 8 && bus_width != 16) {
2264 NS_ERR("wrong bus width (%d), use only 8 or 16\n", bus_width);
2268 ns = kzalloc(sizeof(struct nandsim), GFP_KERNEL);
2270 NS_ERR("unable to allocate core structures.\n");
2274 nsmtd = nand_to_mtd(chip);
2275 nand_set_controller_data(chip, (void *)ns);
2277 /* The NAND_SKIP_BBTSCAN option is necessary for 'overridesize' */
2278 /* and 'badblocks' parameters to work */
2279 chip->options |= NAND_SKIP_BBTSCAN;
2283 chip->bbt_options |= NAND_BBT_NO_OOB;
2286 chip->bbt_options |= NAND_BBT_USE_FLASH;
2291 NS_ERR("bbt has to be 0..2\n");
2293 goto free_ns_struct;
2296 * Perform minimum nandsim structure initialization to handle
2297 * the initial ID read command correctly
2299 if (id_bytes[6] != 0xFF || id_bytes[7] != 0xFF)
2300 ns->geom.idbytes = 8;
2301 else if (id_bytes[4] != 0xFF || id_bytes[5] != 0xFF)
2302 ns->geom.idbytes = 6;
2303 else if (id_bytes[2] != 0xFF || id_bytes[3] != 0xFF)
2304 ns->geom.idbytes = 4;
2306 ns->geom.idbytes = 2;
2307 ns->regs.status = NS_STATUS_OK(ns);
2308 ns->nxstate = STATE_UNKNOWN;
2309 ns->options |= OPT_PAGE512; /* temporary value */
2310 memcpy(ns->ids, id_bytes, sizeof(ns->ids));
2311 if (bus_width == 16) {
2313 chip->options |= NAND_BUSWIDTH_16;
2316 nsmtd->owner = THIS_MODULE;
2318 ret = ns_parse_weakblocks();
2320 goto free_ns_struct;
2322 ret = ns_parse_weakpages();
2326 ret = ns_parse_gravepages();
2330 nand_controller_init(&ns->base);
2331 ns->base.ops = &ns_controller_ops;
2332 chip->controller = &ns->base;
2334 ret = nand_scan(chip, 1);
2336 NS_ERR("Could not scan NAND Simulator device\n");
2341 uint64_t new_size = (uint64_t)nsmtd->erasesize << overridesize;
2342 struct nand_memory_organization *memorg;
2345 memorg = nanddev_get_memorg(&chip->base);
2347 if (new_size >> overridesize != nsmtd->erasesize) {
2348 NS_ERR("overridesize is too big\n");
2353 /* N.B. This relies on nand_scan not doing anything with the size before we change it */
2354 nsmtd->size = new_size;
2355 memorg->eraseblocks_per_lun = 1 << overridesize;
2356 targetsize = nanddev_target_size(&chip->base);
2357 chip->chip_shift = ffs(nsmtd->erasesize) + overridesize - 1;
2358 chip->pagemask = (targetsize >> chip->page_shift) - 1;
2361 ret = ns_setup_wear_reporting(nsmtd);
2365 ret = ns_init(nsmtd);
2369 ret = nand_create_bbt(chip);
2371 goto free_ns_object;
2373 ret = ns_parse_badblocks(ns, nsmtd);
2375 goto free_ns_object;
2377 /* Register NAND partitions */
2378 ret = mtd_device_register(nsmtd, &ns->partitions[0], ns->nbparts);
2380 goto free_ns_object;
2382 ret = ns_debugfs_create(ns);
2384 goto unregister_mtd;
2389 WARN_ON(mtd_device_unregister(nsmtd));
2393 kfree(erase_block_wear);
2397 list_for_each_safe(pos, n, &grave_pages) {
2399 kfree(list_entry(pos, struct grave_page, list));
2402 list_for_each_safe(pos, n, &weak_pages) {
2404 kfree(list_entry(pos, struct weak_page, list));
2407 list_for_each_safe(pos, n, &weak_blocks) {
2409 kfree(list_entry(pos, struct weak_block, list));
2417 module_init(ns_init_module);
2420 * Module clean-up function
2422 static void __exit ns_cleanup_module(void)
2424 struct nand_chip *chip = mtd_to_nand(nsmtd);
2425 struct nandsim *ns = nand_get_controller_data(chip);
2426 struct list_head *pos, *n;
2428 ns_debugfs_remove(ns);
2429 WARN_ON(mtd_device_unregister(nsmtd));
2431 kfree(erase_block_wear);
2434 list_for_each_safe(pos, n, &grave_pages) {
2436 kfree(list_entry(pos, struct grave_page, list));
2439 list_for_each_safe(pos, n, &weak_pages) {
2441 kfree(list_entry(pos, struct weak_page, list));
2444 list_for_each_safe(pos, n, &weak_blocks) {
2446 kfree(list_entry(pos, struct weak_block, list));
2452 module_exit(ns_cleanup_module);
2454 MODULE_LICENSE ("GPL");
2455 MODULE_AUTHOR ("Artem B. Bityuckiy");
2456 MODULE_DESCRIPTION ("The NAND flash simulator");