1 // SPDX-License-Identifier: GPL-2.0-only
3 * Host side test driver to test endpoint functionality
5 * Copyright (C) 2017 Texas Instruments
6 * Author: Kishon Vijay Abraham I <kishon@ti.com>
9 #include <linux/crc32.h>
10 #include <linux/delay.h>
13 #include <linux/interrupt.h>
14 #include <linux/irq.h>
15 #include <linux/miscdevice.h>
16 #include <linux/module.h>
17 #include <linux/mutex.h>
18 #include <linux/random.h>
19 #include <linux/slab.h>
20 #include <linux/pci.h>
21 #include <linux/pci_ids.h>
23 #include <linux/pci_regs.h>
25 #include <uapi/linux/pcitest.h>
27 #define DRV_MODULE_NAME "pci-endpoint-test"
29 #define IRQ_TYPE_UNDEFINED -1
30 #define IRQ_TYPE_LEGACY 0
31 #define IRQ_TYPE_MSI 1
32 #define IRQ_TYPE_MSIX 2
34 #define PCI_ENDPOINT_TEST_MAGIC 0x0
36 #define PCI_ENDPOINT_TEST_COMMAND 0x4
37 #define COMMAND_RAISE_LEGACY_IRQ BIT(0)
38 #define COMMAND_RAISE_MSI_IRQ BIT(1)
39 #define COMMAND_RAISE_MSIX_IRQ BIT(2)
40 #define COMMAND_READ BIT(3)
41 #define COMMAND_WRITE BIT(4)
42 #define COMMAND_COPY BIT(5)
44 #define PCI_ENDPOINT_TEST_STATUS 0x8
45 #define STATUS_READ_SUCCESS BIT(0)
46 #define STATUS_READ_FAIL BIT(1)
47 #define STATUS_WRITE_SUCCESS BIT(2)
48 #define STATUS_WRITE_FAIL BIT(3)
49 #define STATUS_COPY_SUCCESS BIT(4)
50 #define STATUS_COPY_FAIL BIT(5)
51 #define STATUS_IRQ_RAISED BIT(6)
52 #define STATUS_SRC_ADDR_INVALID BIT(7)
53 #define STATUS_DST_ADDR_INVALID BIT(8)
55 #define PCI_ENDPOINT_TEST_LOWER_SRC_ADDR 0x0c
56 #define PCI_ENDPOINT_TEST_UPPER_SRC_ADDR 0x10
58 #define PCI_ENDPOINT_TEST_LOWER_DST_ADDR 0x14
59 #define PCI_ENDPOINT_TEST_UPPER_DST_ADDR 0x18
61 #define PCI_ENDPOINT_TEST_SIZE 0x1c
62 #define PCI_ENDPOINT_TEST_CHECKSUM 0x20
64 #define PCI_ENDPOINT_TEST_IRQ_TYPE 0x24
65 #define PCI_ENDPOINT_TEST_IRQ_NUMBER 0x28
67 #define PCI_DEVICE_ID_TI_AM654 0xb00c
69 #define is_am654_pci_dev(pdev) \
70 ((pdev)->device == PCI_DEVICE_ID_TI_AM654)
72 static DEFINE_IDA(pci_endpoint_test_ida);
74 #define to_endpoint_test(priv) container_of((priv), struct pci_endpoint_test, \
78 module_param(no_msi, bool, 0444);
79 MODULE_PARM_DESC(no_msi, "Disable MSI interrupt in pci_endpoint_test");
81 static int irq_type = IRQ_TYPE_MSI;
82 module_param(irq_type, int, 0444);
83 MODULE_PARM_DESC(irq_type, "IRQ mode selection in pci_endpoint_test (0 - Legacy, 1 - MSI, 2 - MSI-X)");
94 struct pci_endpoint_test {
97 void __iomem *bar[PCI_STD_NUM_BARS];
98 struct completion irq_raised;
101 /* mutex to protect the ioctls */
103 struct miscdevice miscdev;
104 enum pci_barno test_reg_bar;
108 struct pci_endpoint_test_data {
109 enum pci_barno test_reg_bar;
114 static inline u32 pci_endpoint_test_readl(struct pci_endpoint_test *test,
117 return readl(test->base + offset);
120 static inline void pci_endpoint_test_writel(struct pci_endpoint_test *test,
121 u32 offset, u32 value)
123 writel(value, test->base + offset);
126 static inline u32 pci_endpoint_test_bar_readl(struct pci_endpoint_test *test,
129 return readl(test->bar[bar] + offset);
132 static inline void pci_endpoint_test_bar_writel(struct pci_endpoint_test *test,
133 int bar, u32 offset, u32 value)
135 writel(value, test->bar[bar] + offset);
138 static irqreturn_t pci_endpoint_test_irqhandler(int irq, void *dev_id)
140 struct pci_endpoint_test *test = dev_id;
143 reg = pci_endpoint_test_readl(test, PCI_ENDPOINT_TEST_STATUS);
144 if (reg & STATUS_IRQ_RAISED) {
145 test->last_irq = irq;
146 complete(&test->irq_raised);
147 reg &= ~STATUS_IRQ_RAISED;
149 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_STATUS,
155 static void pci_endpoint_test_free_irq_vectors(struct pci_endpoint_test *test)
157 struct pci_dev *pdev = test->pdev;
159 pci_free_irq_vectors(pdev);
162 static bool pci_endpoint_test_alloc_irq_vectors(struct pci_endpoint_test *test,
166 struct pci_dev *pdev = test->pdev;
167 struct device *dev = &pdev->dev;
171 case IRQ_TYPE_LEGACY:
172 irq = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_LEGACY);
174 dev_err(dev, "Failed to get Legacy interrupt\n");
177 irq = pci_alloc_irq_vectors(pdev, 1, 32, PCI_IRQ_MSI);
179 dev_err(dev, "Failed to get MSI interrupts\n");
182 irq = pci_alloc_irq_vectors(pdev, 1, 2048, PCI_IRQ_MSIX);
184 dev_err(dev, "Failed to get MSI-X interrupts\n");
187 dev_err(dev, "Invalid IRQ type selected\n");
194 test->num_irqs = irq;
199 static void pci_endpoint_test_release_irq(struct pci_endpoint_test *test)
202 struct pci_dev *pdev = test->pdev;
203 struct device *dev = &pdev->dev;
205 for (i = 0; i < test->num_irqs; i++)
206 devm_free_irq(dev, pci_irq_vector(pdev, i), test);
211 static bool pci_endpoint_test_request_irq(struct pci_endpoint_test *test)
215 struct pci_dev *pdev = test->pdev;
216 struct device *dev = &pdev->dev;
218 for (i = 0; i < test->num_irqs; i++) {
219 err = devm_request_irq(dev, pci_irq_vector(pdev, i),
220 pci_endpoint_test_irqhandler,
221 IRQF_SHARED, DRV_MODULE_NAME, test);
230 case IRQ_TYPE_LEGACY:
231 dev_err(dev, "Failed to request IRQ %d for Legacy\n",
232 pci_irq_vector(pdev, i));
235 dev_err(dev, "Failed to request IRQ %d for MSI %d\n",
236 pci_irq_vector(pdev, i),
240 dev_err(dev, "Failed to request IRQ %d for MSI-X %d\n",
241 pci_irq_vector(pdev, i),
249 static bool pci_endpoint_test_bar(struct pci_endpoint_test *test,
250 enum pci_barno barno)
255 struct pci_dev *pdev = test->pdev;
257 if (!test->bar[barno])
260 size = pci_resource_len(pdev, barno);
262 if (barno == test->test_reg_bar)
265 for (j = 0; j < size; j += 4)
266 pci_endpoint_test_bar_writel(test, barno, j, 0xA0A0A0A0);
268 for (j = 0; j < size; j += 4) {
269 val = pci_endpoint_test_bar_readl(test, barno, j);
270 if (val != 0xA0A0A0A0)
277 static bool pci_endpoint_test_legacy_irq(struct pci_endpoint_test *test)
281 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_IRQ_TYPE,
283 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_IRQ_NUMBER, 0);
284 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_COMMAND,
285 COMMAND_RAISE_LEGACY_IRQ);
286 val = wait_for_completion_timeout(&test->irq_raised,
287 msecs_to_jiffies(1000));
294 static bool pci_endpoint_test_msi_irq(struct pci_endpoint_test *test,
295 u16 msi_num, bool msix)
298 struct pci_dev *pdev = test->pdev;
300 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_IRQ_TYPE,
301 msix == false ? IRQ_TYPE_MSI :
303 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_IRQ_NUMBER, msi_num);
304 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_COMMAND,
305 msix == false ? COMMAND_RAISE_MSI_IRQ :
306 COMMAND_RAISE_MSIX_IRQ);
307 val = wait_for_completion_timeout(&test->irq_raised,
308 msecs_to_jiffies(1000));
312 if (pci_irq_vector(pdev, msi_num - 1) == test->last_irq)
318 static bool pci_endpoint_test_copy(struct pci_endpoint_test *test, size_t size)
323 dma_addr_t src_phys_addr;
324 dma_addr_t dst_phys_addr;
325 struct pci_dev *pdev = test->pdev;
326 struct device *dev = &pdev->dev;
328 dma_addr_t orig_src_phys_addr;
330 dma_addr_t orig_dst_phys_addr;
332 size_t alignment = test->alignment;
336 if (size > SIZE_MAX - alignment)
339 if (irq_type < IRQ_TYPE_LEGACY || irq_type > IRQ_TYPE_MSIX) {
340 dev_err(dev, "Invalid IRQ type option\n");
344 orig_src_addr = kzalloc(size + alignment, GFP_KERNEL);
345 if (!orig_src_addr) {
346 dev_err(dev, "Failed to allocate source buffer\n");
351 get_random_bytes(orig_src_addr, size + alignment);
352 orig_src_phys_addr = dma_map_single(dev, orig_src_addr,
353 size + alignment, DMA_TO_DEVICE);
354 if (dma_mapping_error(dev, orig_src_phys_addr)) {
355 dev_err(dev, "failed to map source buffer address\n");
357 goto err_src_phys_addr;
360 if (alignment && !IS_ALIGNED(orig_src_phys_addr, alignment)) {
361 src_phys_addr = PTR_ALIGN(orig_src_phys_addr, alignment);
362 offset = src_phys_addr - orig_src_phys_addr;
363 src_addr = orig_src_addr + offset;
365 src_phys_addr = orig_src_phys_addr;
366 src_addr = orig_src_addr;
369 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_LOWER_SRC_ADDR,
370 lower_32_bits(src_phys_addr));
372 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_UPPER_SRC_ADDR,
373 upper_32_bits(src_phys_addr));
375 src_crc32 = crc32_le(~0, src_addr, size);
377 orig_dst_addr = kzalloc(size + alignment, GFP_KERNEL);
378 if (!orig_dst_addr) {
379 dev_err(dev, "Failed to allocate destination address\n");
384 orig_dst_phys_addr = dma_map_single(dev, orig_dst_addr,
385 size + alignment, DMA_FROM_DEVICE);
386 if (dma_mapping_error(dev, orig_dst_phys_addr)) {
387 dev_err(dev, "failed to map destination buffer address\n");
389 goto err_dst_phys_addr;
392 if (alignment && !IS_ALIGNED(orig_dst_phys_addr, alignment)) {
393 dst_phys_addr = PTR_ALIGN(orig_dst_phys_addr, alignment);
394 offset = dst_phys_addr - orig_dst_phys_addr;
395 dst_addr = orig_dst_addr + offset;
397 dst_phys_addr = orig_dst_phys_addr;
398 dst_addr = orig_dst_addr;
401 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_LOWER_DST_ADDR,
402 lower_32_bits(dst_phys_addr));
403 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_UPPER_DST_ADDR,
404 upper_32_bits(dst_phys_addr));
406 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_SIZE,
409 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_IRQ_TYPE, irq_type);
410 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_IRQ_NUMBER, 1);
411 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_COMMAND,
414 wait_for_completion(&test->irq_raised);
416 dma_unmap_single(dev, orig_dst_phys_addr, size + alignment,
419 dst_crc32 = crc32_le(~0, dst_addr, size);
420 if (dst_crc32 == src_crc32)
424 kfree(orig_dst_addr);
427 dma_unmap_single(dev, orig_src_phys_addr, size + alignment,
431 kfree(orig_src_addr);
437 static bool pci_endpoint_test_write(struct pci_endpoint_test *test, size_t size)
442 dma_addr_t phys_addr;
443 struct pci_dev *pdev = test->pdev;
444 struct device *dev = &pdev->dev;
446 dma_addr_t orig_phys_addr;
448 size_t alignment = test->alignment;
451 if (size > SIZE_MAX - alignment)
454 if (irq_type < IRQ_TYPE_LEGACY || irq_type > IRQ_TYPE_MSIX) {
455 dev_err(dev, "Invalid IRQ type option\n");
459 orig_addr = kzalloc(size + alignment, GFP_KERNEL);
461 dev_err(dev, "Failed to allocate address\n");
466 get_random_bytes(orig_addr, size + alignment);
468 orig_phys_addr = dma_map_single(dev, orig_addr, size + alignment,
470 if (dma_mapping_error(dev, orig_phys_addr)) {
471 dev_err(dev, "failed to map source buffer address\n");
476 if (alignment && !IS_ALIGNED(orig_phys_addr, alignment)) {
477 phys_addr = PTR_ALIGN(orig_phys_addr, alignment);
478 offset = phys_addr - orig_phys_addr;
479 addr = orig_addr + offset;
481 phys_addr = orig_phys_addr;
485 crc32 = crc32_le(~0, addr, size);
486 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_CHECKSUM,
489 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_LOWER_SRC_ADDR,
490 lower_32_bits(phys_addr));
491 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_UPPER_SRC_ADDR,
492 upper_32_bits(phys_addr));
494 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_SIZE, size);
496 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_IRQ_TYPE, irq_type);
497 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_IRQ_NUMBER, 1);
498 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_COMMAND,
501 wait_for_completion(&test->irq_raised);
503 reg = pci_endpoint_test_readl(test, PCI_ENDPOINT_TEST_STATUS);
504 if (reg & STATUS_READ_SUCCESS)
507 dma_unmap_single(dev, orig_phys_addr, size + alignment,
517 static bool pci_endpoint_test_read(struct pci_endpoint_test *test, size_t size)
521 dma_addr_t phys_addr;
522 struct pci_dev *pdev = test->pdev;
523 struct device *dev = &pdev->dev;
525 dma_addr_t orig_phys_addr;
527 size_t alignment = test->alignment;
530 if (size > SIZE_MAX - alignment)
533 if (irq_type < IRQ_TYPE_LEGACY || irq_type > IRQ_TYPE_MSIX) {
534 dev_err(dev, "Invalid IRQ type option\n");
538 orig_addr = kzalloc(size + alignment, GFP_KERNEL);
540 dev_err(dev, "Failed to allocate destination address\n");
545 orig_phys_addr = dma_map_single(dev, orig_addr, size + alignment,
547 if (dma_mapping_error(dev, orig_phys_addr)) {
548 dev_err(dev, "failed to map source buffer address\n");
553 if (alignment && !IS_ALIGNED(orig_phys_addr, alignment)) {
554 phys_addr = PTR_ALIGN(orig_phys_addr, alignment);
555 offset = phys_addr - orig_phys_addr;
556 addr = orig_addr + offset;
558 phys_addr = orig_phys_addr;
562 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_LOWER_DST_ADDR,
563 lower_32_bits(phys_addr));
564 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_UPPER_DST_ADDR,
565 upper_32_bits(phys_addr));
567 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_SIZE, size);
569 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_IRQ_TYPE, irq_type);
570 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_IRQ_NUMBER, 1);
571 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_COMMAND,
574 wait_for_completion(&test->irq_raised);
576 dma_unmap_single(dev, orig_phys_addr, size + alignment,
579 crc32 = crc32_le(~0, addr, size);
580 if (crc32 == pci_endpoint_test_readl(test, PCI_ENDPOINT_TEST_CHECKSUM))
589 static bool pci_endpoint_test_set_irq(struct pci_endpoint_test *test,
592 struct pci_dev *pdev = test->pdev;
593 struct device *dev = &pdev->dev;
595 if (req_irq_type < IRQ_TYPE_LEGACY || req_irq_type > IRQ_TYPE_MSIX) {
596 dev_err(dev, "Invalid IRQ type option\n");
600 if (irq_type == req_irq_type)
603 pci_endpoint_test_release_irq(test);
604 pci_endpoint_test_free_irq_vectors(test);
606 if (!pci_endpoint_test_alloc_irq_vectors(test, req_irq_type))
609 if (!pci_endpoint_test_request_irq(test))
612 irq_type = req_irq_type;
616 pci_endpoint_test_free_irq_vectors(test);
617 irq_type = IRQ_TYPE_UNDEFINED;
621 static long pci_endpoint_test_ioctl(struct file *file, unsigned int cmd,
626 struct pci_endpoint_test *test = to_endpoint_test(file->private_data);
627 struct pci_dev *pdev = test->pdev;
629 mutex_lock(&test->mutex);
633 if (bar < 0 || bar > 5)
635 if (is_am654_pci_dev(pdev) && bar == BAR_0)
637 ret = pci_endpoint_test_bar(test, bar);
639 case PCITEST_LEGACY_IRQ:
640 ret = pci_endpoint_test_legacy_irq(test);
644 ret = pci_endpoint_test_msi_irq(test, arg, cmd == PCITEST_MSIX);
647 ret = pci_endpoint_test_write(test, arg);
650 ret = pci_endpoint_test_read(test, arg);
653 ret = pci_endpoint_test_copy(test, arg);
655 case PCITEST_SET_IRQTYPE:
656 ret = pci_endpoint_test_set_irq(test, arg);
658 case PCITEST_GET_IRQTYPE:
664 mutex_unlock(&test->mutex);
668 static const struct file_operations pci_endpoint_test_fops = {
669 .owner = THIS_MODULE,
670 .unlocked_ioctl = pci_endpoint_test_ioctl,
673 static int pci_endpoint_test_probe(struct pci_dev *pdev,
674 const struct pci_device_id *ent)
681 struct device *dev = &pdev->dev;
682 struct pci_endpoint_test *test;
683 struct pci_endpoint_test_data *data;
684 enum pci_barno test_reg_bar = BAR_0;
685 struct miscdevice *misc_device;
687 if (pci_is_bridge(pdev))
690 test = devm_kzalloc(dev, sizeof(*test), GFP_KERNEL);
694 test->test_reg_bar = 0;
699 irq_type = IRQ_TYPE_LEGACY;
701 data = (struct pci_endpoint_test_data *)ent->driver_data;
703 test_reg_bar = data->test_reg_bar;
704 test->test_reg_bar = test_reg_bar;
705 test->alignment = data->alignment;
706 irq_type = data->irq_type;
709 init_completion(&test->irq_raised);
710 mutex_init(&test->mutex);
712 if ((dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(48)) != 0) &&
713 dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)) != 0) {
714 dev_err(dev, "Cannot set DMA mask\n");
718 err = pci_enable_device(pdev);
720 dev_err(dev, "Cannot enable PCI device\n");
724 err = pci_request_regions(pdev, DRV_MODULE_NAME);
726 dev_err(dev, "Cannot obtain PCI resources\n");
727 goto err_disable_pdev;
730 pci_set_master(pdev);
732 if (!pci_endpoint_test_alloc_irq_vectors(test, irq_type))
733 goto err_disable_irq;
735 if (!pci_endpoint_test_request_irq(test))
736 goto err_disable_irq;
738 for (bar = 0; bar < PCI_STD_NUM_BARS; bar++) {
739 if (pci_resource_flags(pdev, bar) & IORESOURCE_MEM) {
740 base = pci_ioremap_bar(pdev, bar);
742 dev_err(dev, "Failed to read BAR%d\n", bar);
743 WARN_ON(bar == test_reg_bar);
745 test->bar[bar] = base;
749 test->base = test->bar[test_reg_bar];
752 dev_err(dev, "Cannot perform PCI test without BAR%d\n",
757 pci_set_drvdata(pdev, test);
759 id = ida_simple_get(&pci_endpoint_test_ida, 0, 0, GFP_KERNEL);
762 dev_err(dev, "Unable to get id\n");
766 snprintf(name, sizeof(name), DRV_MODULE_NAME ".%d", id);
767 misc_device = &test->miscdev;
768 misc_device->minor = MISC_DYNAMIC_MINOR;
769 misc_device->name = kstrdup(name, GFP_KERNEL);
770 if (!misc_device->name) {
774 misc_device->fops = &pci_endpoint_test_fops,
776 err = misc_register(misc_device);
778 dev_err(dev, "Failed to register device\n");
785 kfree(misc_device->name);
788 ida_simple_remove(&pci_endpoint_test_ida, id);
791 for (bar = 0; bar < PCI_STD_NUM_BARS; bar++) {
793 pci_iounmap(pdev, test->bar[bar]);
795 pci_endpoint_test_release_irq(test);
798 pci_endpoint_test_free_irq_vectors(test);
799 pci_release_regions(pdev);
802 pci_disable_device(pdev);
807 static void pci_endpoint_test_remove(struct pci_dev *pdev)
811 struct pci_endpoint_test *test = pci_get_drvdata(pdev);
812 struct miscdevice *misc_device = &test->miscdev;
814 if (sscanf(misc_device->name, DRV_MODULE_NAME ".%d", &id) != 1)
819 misc_deregister(&test->miscdev);
820 kfree(misc_device->name);
821 ida_simple_remove(&pci_endpoint_test_ida, id);
822 for (bar = 0; bar < PCI_STD_NUM_BARS; bar++) {
824 pci_iounmap(pdev, test->bar[bar]);
827 pci_endpoint_test_release_irq(test);
828 pci_endpoint_test_free_irq_vectors(test);
830 pci_release_regions(pdev);
831 pci_disable_device(pdev);
834 static const struct pci_endpoint_test_data default_data = {
835 .test_reg_bar = BAR_0,
837 .irq_type = IRQ_TYPE_MSI,
840 static const struct pci_endpoint_test_data am654_data = {
841 .test_reg_bar = BAR_2,
843 .irq_type = IRQ_TYPE_MSI,
846 static const struct pci_device_id pci_endpoint_test_tbl[] = {
847 { PCI_DEVICE(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_DRA74x),
848 .driver_data = (kernel_ulong_t)&default_data,
850 { PCI_DEVICE(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_DRA72x),
851 .driver_data = (kernel_ulong_t)&default_data,
853 { PCI_DEVICE(PCI_VENDOR_ID_FREESCALE, 0x81c0) },
854 { PCI_DEVICE_DATA(SYNOPSYS, EDDA, NULL) },
855 { PCI_DEVICE(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_AM654),
856 .driver_data = (kernel_ulong_t)&am654_data
860 MODULE_DEVICE_TABLE(pci, pci_endpoint_test_tbl);
862 static struct pci_driver pci_endpoint_test_driver = {
863 .name = DRV_MODULE_NAME,
864 .id_table = pci_endpoint_test_tbl,
865 .probe = pci_endpoint_test_probe,
866 .remove = pci_endpoint_test_remove,
868 module_pci_driver(pci_endpoint_test_driver);
870 MODULE_DESCRIPTION("PCI ENDPOINT TEST HOST DRIVER");
871 MODULE_AUTHOR("Kishon Vijay Abraham I <kishon@ti.com>");
872 MODULE_LICENSE("GPL v2");