1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2012 Invensense, Inc.
6 #include <linux/module.h>
7 #include <linux/slab.h>
10 #include <linux/delay.h>
11 #include <linux/sysfs.h>
12 #include <linux/jiffies.h>
13 #include <linux/irq.h>
14 #include <linux/interrupt.h>
15 #include <linux/iio/iio.h>
16 #include <linux/acpi.h>
17 #include <linux/platform_device.h>
18 #include <linux/regulator/consumer.h>
20 #include <linux/pm_runtime.h>
21 #include "inv_mpu_iio.h"
22 #include "inv_mpu_magn.h"
25 * this is the gyro scale translated from dynamic range plus/minus
26 * {250, 500, 1000, 2000} to rad/s
28 static const int gyro_scale_6050[] = {133090, 266181, 532362, 1064724};
31 * this is the accel scale translated from dynamic range plus/minus
32 * {2, 4, 8, 16} to m/s^2
34 static const int accel_scale[] = {598, 1196, 2392, 4785};
36 static const struct inv_mpu6050_reg_map reg_set_icm20602 = {
37 .sample_rate_div = INV_MPU6050_REG_SAMPLE_RATE_DIV,
38 .lpf = INV_MPU6050_REG_CONFIG,
39 .accel_lpf = INV_MPU6500_REG_ACCEL_CONFIG_2,
40 .user_ctrl = INV_MPU6050_REG_USER_CTRL,
41 .fifo_en = INV_MPU6050_REG_FIFO_EN,
42 .gyro_config = INV_MPU6050_REG_GYRO_CONFIG,
43 .accl_config = INV_MPU6050_REG_ACCEL_CONFIG,
44 .fifo_count_h = INV_MPU6050_REG_FIFO_COUNT_H,
45 .fifo_r_w = INV_MPU6050_REG_FIFO_R_W,
46 .raw_gyro = INV_MPU6050_REG_RAW_GYRO,
47 .raw_accl = INV_MPU6050_REG_RAW_ACCEL,
48 .temperature = INV_MPU6050_REG_TEMPERATURE,
49 .int_enable = INV_MPU6050_REG_INT_ENABLE,
50 .int_status = INV_MPU6050_REG_INT_STATUS,
51 .pwr_mgmt_1 = INV_MPU6050_REG_PWR_MGMT_1,
52 .pwr_mgmt_2 = INV_MPU6050_REG_PWR_MGMT_2,
53 .int_pin_cfg = INV_MPU6050_REG_INT_PIN_CFG,
54 .accl_offset = INV_MPU6500_REG_ACCEL_OFFSET,
55 .gyro_offset = INV_MPU6050_REG_GYRO_OFFSET,
56 .i2c_if = INV_ICM20602_REG_I2C_IF,
59 static const struct inv_mpu6050_reg_map reg_set_6500 = {
60 .sample_rate_div = INV_MPU6050_REG_SAMPLE_RATE_DIV,
61 .lpf = INV_MPU6050_REG_CONFIG,
62 .accel_lpf = INV_MPU6500_REG_ACCEL_CONFIG_2,
63 .user_ctrl = INV_MPU6050_REG_USER_CTRL,
64 .fifo_en = INV_MPU6050_REG_FIFO_EN,
65 .gyro_config = INV_MPU6050_REG_GYRO_CONFIG,
66 .accl_config = INV_MPU6050_REG_ACCEL_CONFIG,
67 .fifo_count_h = INV_MPU6050_REG_FIFO_COUNT_H,
68 .fifo_r_w = INV_MPU6050_REG_FIFO_R_W,
69 .raw_gyro = INV_MPU6050_REG_RAW_GYRO,
70 .raw_accl = INV_MPU6050_REG_RAW_ACCEL,
71 .temperature = INV_MPU6050_REG_TEMPERATURE,
72 .int_enable = INV_MPU6050_REG_INT_ENABLE,
73 .int_status = INV_MPU6050_REG_INT_STATUS,
74 .pwr_mgmt_1 = INV_MPU6050_REG_PWR_MGMT_1,
75 .pwr_mgmt_2 = INV_MPU6050_REG_PWR_MGMT_2,
76 .int_pin_cfg = INV_MPU6050_REG_INT_PIN_CFG,
77 .accl_offset = INV_MPU6500_REG_ACCEL_OFFSET,
78 .gyro_offset = INV_MPU6050_REG_GYRO_OFFSET,
82 static const struct inv_mpu6050_reg_map reg_set_6050 = {
83 .sample_rate_div = INV_MPU6050_REG_SAMPLE_RATE_DIV,
84 .lpf = INV_MPU6050_REG_CONFIG,
85 .user_ctrl = INV_MPU6050_REG_USER_CTRL,
86 .fifo_en = INV_MPU6050_REG_FIFO_EN,
87 .gyro_config = INV_MPU6050_REG_GYRO_CONFIG,
88 .accl_config = INV_MPU6050_REG_ACCEL_CONFIG,
89 .fifo_count_h = INV_MPU6050_REG_FIFO_COUNT_H,
90 .fifo_r_w = INV_MPU6050_REG_FIFO_R_W,
91 .raw_gyro = INV_MPU6050_REG_RAW_GYRO,
92 .raw_accl = INV_MPU6050_REG_RAW_ACCEL,
93 .temperature = INV_MPU6050_REG_TEMPERATURE,
94 .int_enable = INV_MPU6050_REG_INT_ENABLE,
95 .pwr_mgmt_1 = INV_MPU6050_REG_PWR_MGMT_1,
96 .pwr_mgmt_2 = INV_MPU6050_REG_PWR_MGMT_2,
97 .int_pin_cfg = INV_MPU6050_REG_INT_PIN_CFG,
98 .accl_offset = INV_MPU6050_REG_ACCEL_OFFSET,
99 .gyro_offset = INV_MPU6050_REG_GYRO_OFFSET,
103 static const struct inv_mpu6050_chip_config chip_config_6050 = {
104 .clk = INV_CLK_INTERNAL,
105 .fsr = INV_MPU6050_FSR_2000DPS,
106 .lpf = INV_MPU6050_FILTER_20HZ,
107 .divider = INV_MPU6050_FIFO_RATE_TO_DIVIDER(50),
112 .gyro_fifo_enable = false,
113 .accl_fifo_enable = false,
114 .temp_fifo_enable = false,
115 .magn_fifo_enable = false,
116 .accl_fs = INV_MPU6050_FS_02G,
120 static const struct inv_mpu6050_chip_config chip_config_6500 = {
122 .fsr = INV_MPU6050_FSR_2000DPS,
123 .lpf = INV_MPU6050_FILTER_20HZ,
124 .divider = INV_MPU6050_FIFO_RATE_TO_DIVIDER(50),
129 .gyro_fifo_enable = false,
130 .accl_fifo_enable = false,
131 .temp_fifo_enable = false,
132 .magn_fifo_enable = false,
133 .accl_fs = INV_MPU6050_FS_02G,
137 /* Indexed by enum inv_devices */
138 static const struct inv_mpu6050_hw hw_info[] = {
140 .whoami = INV_MPU6050_WHOAMI_VALUE,
142 .reg = ®_set_6050,
143 .config = &chip_config_6050,
145 .temp = {INV_MPU6050_TEMP_OFFSET, INV_MPU6050_TEMP_SCALE},
146 .startup_time = {INV_MPU6050_GYRO_STARTUP_TIME, INV_MPU6050_ACCEL_STARTUP_TIME},
149 .whoami = INV_MPU6500_WHOAMI_VALUE,
151 .reg = ®_set_6500,
152 .config = &chip_config_6500,
154 .temp = {INV_MPU6500_TEMP_OFFSET, INV_MPU6500_TEMP_SCALE},
155 .startup_time = {INV_MPU6500_GYRO_STARTUP_TIME, INV_MPU6500_ACCEL_STARTUP_TIME},
158 .whoami = INV_MPU6515_WHOAMI_VALUE,
160 .reg = ®_set_6500,
161 .config = &chip_config_6500,
163 .temp = {INV_MPU6500_TEMP_OFFSET, INV_MPU6500_TEMP_SCALE},
164 .startup_time = {INV_MPU6500_GYRO_STARTUP_TIME, INV_MPU6500_ACCEL_STARTUP_TIME},
167 .whoami = INV_MPU6880_WHOAMI_VALUE,
169 .reg = ®_set_6500,
170 .config = &chip_config_6500,
172 .temp = {INV_MPU6500_TEMP_OFFSET, INV_MPU6500_TEMP_SCALE},
173 .startup_time = {INV_MPU6500_GYRO_STARTUP_TIME, INV_MPU6500_ACCEL_STARTUP_TIME},
176 .whoami = INV_MPU6000_WHOAMI_VALUE,
178 .reg = ®_set_6050,
179 .config = &chip_config_6050,
181 .temp = {INV_MPU6050_TEMP_OFFSET, INV_MPU6050_TEMP_SCALE},
182 .startup_time = {INV_MPU6050_GYRO_STARTUP_TIME, INV_MPU6050_ACCEL_STARTUP_TIME},
185 .whoami = INV_MPU9150_WHOAMI_VALUE,
187 .reg = ®_set_6050,
188 .config = &chip_config_6050,
190 .temp = {INV_MPU6050_TEMP_OFFSET, INV_MPU6050_TEMP_SCALE},
191 .startup_time = {INV_MPU6050_GYRO_STARTUP_TIME, INV_MPU6050_ACCEL_STARTUP_TIME},
194 .whoami = INV_MPU9250_WHOAMI_VALUE,
196 .reg = ®_set_6500,
197 .config = &chip_config_6500,
199 .temp = {INV_MPU6500_TEMP_OFFSET, INV_MPU6500_TEMP_SCALE},
200 .startup_time = {INV_MPU6500_GYRO_STARTUP_TIME, INV_MPU6500_ACCEL_STARTUP_TIME},
203 .whoami = INV_MPU9255_WHOAMI_VALUE,
205 .reg = ®_set_6500,
206 .config = &chip_config_6500,
208 .temp = {INV_MPU6500_TEMP_OFFSET, INV_MPU6500_TEMP_SCALE},
209 .startup_time = {INV_MPU6500_GYRO_STARTUP_TIME, INV_MPU6500_ACCEL_STARTUP_TIME},
212 .whoami = INV_ICM20608_WHOAMI_VALUE,
214 .reg = ®_set_6500,
215 .config = &chip_config_6500,
217 .temp = {INV_ICM20608_TEMP_OFFSET, INV_ICM20608_TEMP_SCALE},
218 .startup_time = {INV_MPU6500_GYRO_STARTUP_TIME, INV_MPU6500_ACCEL_STARTUP_TIME},
221 .whoami = INV_ICM20608D_WHOAMI_VALUE,
223 .reg = ®_set_6500,
224 .config = &chip_config_6500,
226 .temp = {INV_ICM20608_TEMP_OFFSET, INV_ICM20608_TEMP_SCALE},
227 .startup_time = {INV_MPU6500_GYRO_STARTUP_TIME, INV_MPU6500_ACCEL_STARTUP_TIME},
230 .whoami = INV_ICM20609_WHOAMI_VALUE,
232 .reg = ®_set_6500,
233 .config = &chip_config_6500,
234 .fifo_size = 4 * 1024,
235 .temp = {INV_ICM20608_TEMP_OFFSET, INV_ICM20608_TEMP_SCALE},
236 .startup_time = {INV_MPU6500_GYRO_STARTUP_TIME, INV_MPU6500_ACCEL_STARTUP_TIME},
239 .whoami = INV_ICM20689_WHOAMI_VALUE,
241 .reg = ®_set_6500,
242 .config = &chip_config_6500,
243 .fifo_size = 4 * 1024,
244 .temp = {INV_ICM20608_TEMP_OFFSET, INV_ICM20608_TEMP_SCALE},
245 .startup_time = {INV_MPU6500_GYRO_STARTUP_TIME, INV_MPU6500_ACCEL_STARTUP_TIME},
248 .whoami = INV_ICM20602_WHOAMI_VALUE,
250 .reg = ®_set_icm20602,
251 .config = &chip_config_6500,
253 .temp = {INV_ICM20608_TEMP_OFFSET, INV_ICM20608_TEMP_SCALE},
254 .startup_time = {INV_ICM20602_GYRO_STARTUP_TIME, INV_ICM20602_ACCEL_STARTUP_TIME},
257 .whoami = INV_ICM20690_WHOAMI_VALUE,
259 .reg = ®_set_6500,
260 .config = &chip_config_6500,
262 .temp = {INV_ICM20608_TEMP_OFFSET, INV_ICM20608_TEMP_SCALE},
263 .startup_time = {INV_ICM20690_GYRO_STARTUP_TIME, INV_ICM20690_ACCEL_STARTUP_TIME},
266 .whoami = INV_IAM20680_WHOAMI_VALUE,
268 .reg = ®_set_6500,
269 .config = &chip_config_6500,
271 .temp = {INV_ICM20608_TEMP_OFFSET, INV_ICM20608_TEMP_SCALE},
272 .startup_time = {INV_MPU6500_GYRO_STARTUP_TIME, INV_MPU6500_ACCEL_STARTUP_TIME},
276 static int inv_mpu6050_pwr_mgmt_1_write(struct inv_mpu6050_state *st, bool sleep,
277 int clock, int temp_dis)
282 clock = st->chip_config.clk;
284 temp_dis = !st->chip_config.temp_en;
286 val = clock & INV_MPU6050_BIT_CLK_MASK;
288 val |= INV_MPU6050_BIT_TEMP_DIS;
290 val |= INV_MPU6050_BIT_SLEEP;
292 dev_dbg(regmap_get_device(st->map), "pwr_mgmt_1: 0x%x\n", val);
293 return regmap_write(st->map, st->reg->pwr_mgmt_1, val);
296 static int inv_mpu6050_clock_switch(struct inv_mpu6050_state *st,
301 switch (st->chip_type) {
305 /* old chips: switch clock manually */
306 ret = inv_mpu6050_pwr_mgmt_1_write(st, false, clock, -1);
309 st->chip_config.clk = clock;
312 /* automatic clock switching, nothing to do */
319 int inv_mpu6050_switch_engine(struct inv_mpu6050_state *st, bool en,
323 u8 pwr_mgmt2, user_ctrl;
326 /* delete useless requests */
327 if (mask & INV_MPU6050_SENSOR_ACCL && en == st->chip_config.accl_en)
328 mask &= ~INV_MPU6050_SENSOR_ACCL;
329 if (mask & INV_MPU6050_SENSOR_GYRO && en == st->chip_config.gyro_en)
330 mask &= ~INV_MPU6050_SENSOR_GYRO;
331 if (mask & INV_MPU6050_SENSOR_TEMP && en == st->chip_config.temp_en)
332 mask &= ~INV_MPU6050_SENSOR_TEMP;
333 if (mask & INV_MPU6050_SENSOR_MAGN && en == st->chip_config.magn_en)
334 mask &= ~INV_MPU6050_SENSOR_MAGN;
338 /* turn on/off temperature sensor */
339 if (mask & INV_MPU6050_SENSOR_TEMP) {
340 ret = inv_mpu6050_pwr_mgmt_1_write(st, false, -1, !en);
343 st->chip_config.temp_en = en;
346 /* update user_crtl for driving magnetometer */
347 if (mask & INV_MPU6050_SENSOR_MAGN) {
348 user_ctrl = st->chip_config.user_ctrl;
350 user_ctrl |= INV_MPU6050_BIT_I2C_MST_EN;
352 user_ctrl &= ~INV_MPU6050_BIT_I2C_MST_EN;
353 ret = regmap_write(st->map, st->reg->user_ctrl, user_ctrl);
356 st->chip_config.user_ctrl = user_ctrl;
357 st->chip_config.magn_en = en;
360 /* manage accel & gyro engines */
361 if (mask & (INV_MPU6050_SENSOR_ACCL | INV_MPU6050_SENSOR_GYRO)) {
362 /* compute power management 2 current value */
364 if (!st->chip_config.accl_en)
365 pwr_mgmt2 |= INV_MPU6050_BIT_PWR_ACCL_STBY;
366 if (!st->chip_config.gyro_en)
367 pwr_mgmt2 |= INV_MPU6050_BIT_PWR_GYRO_STBY;
369 /* update to new requested value */
370 if (mask & INV_MPU6050_SENSOR_ACCL) {
372 pwr_mgmt2 &= ~INV_MPU6050_BIT_PWR_ACCL_STBY;
374 pwr_mgmt2 |= INV_MPU6050_BIT_PWR_ACCL_STBY;
376 if (mask & INV_MPU6050_SENSOR_GYRO) {
378 pwr_mgmt2 &= ~INV_MPU6050_BIT_PWR_GYRO_STBY;
380 pwr_mgmt2 |= INV_MPU6050_BIT_PWR_GYRO_STBY;
383 /* switch clock to internal when turning gyro off */
384 if (mask & INV_MPU6050_SENSOR_GYRO && !en) {
385 ret = inv_mpu6050_clock_switch(st, INV_CLK_INTERNAL);
390 /* update sensors engine */
391 dev_dbg(regmap_get_device(st->map), "pwr_mgmt_2: 0x%x\n",
393 ret = regmap_write(st->map, st->reg->pwr_mgmt_2, pwr_mgmt2);
396 if (mask & INV_MPU6050_SENSOR_ACCL)
397 st->chip_config.accl_en = en;
398 if (mask & INV_MPU6050_SENSOR_GYRO)
399 st->chip_config.gyro_en = en;
401 /* compute required time to have sensors stabilized */
404 if (mask & INV_MPU6050_SENSOR_ACCL) {
405 if (sleep < st->hw->startup_time.accel)
406 sleep = st->hw->startup_time.accel;
408 if (mask & INV_MPU6050_SENSOR_GYRO) {
409 if (sleep < st->hw->startup_time.gyro)
410 sleep = st->hw->startup_time.gyro;
413 if (mask & INV_MPU6050_SENSOR_GYRO) {
414 if (sleep < INV_MPU6050_GYRO_DOWN_TIME)
415 sleep = INV_MPU6050_GYRO_DOWN_TIME;
421 /* switch clock to PLL when turning gyro on */
422 if (mask & INV_MPU6050_SENSOR_GYRO && en) {
423 ret = inv_mpu6050_clock_switch(st, INV_CLK_PLL);
432 static int inv_mpu6050_set_power_itg(struct inv_mpu6050_state *st,
437 result = inv_mpu6050_pwr_mgmt_1_write(st, !power_on, -1, -1);
442 usleep_range(INV_MPU6050_REG_UP_TIME_MIN,
443 INV_MPU6050_REG_UP_TIME_MAX);
448 static int inv_mpu6050_set_gyro_fsr(struct inv_mpu6050_state *st,
449 enum inv_mpu6050_fsr_e val)
451 unsigned int gyro_shift;
454 switch (st->chip_type) {
456 gyro_shift = INV_ICM20690_GYRO_CONFIG_FSR_SHIFT;
459 gyro_shift = INV_MPU6050_GYRO_CONFIG_FSR_SHIFT;
463 data = val << gyro_shift;
464 return regmap_write(st->map, st->reg->gyro_config, data);
468 * inv_mpu6050_set_lpf_regs() - set low pass filter registers, chip dependent
470 * MPU60xx/MPU9150 use only 1 register for accelerometer + gyroscope
471 * MPU6500 and above have a dedicated register for accelerometer
473 static int inv_mpu6050_set_lpf_regs(struct inv_mpu6050_state *st,
474 enum inv_mpu6050_filter_e val)
478 result = regmap_write(st->map, st->reg->lpf, val);
483 switch (st->chip_type) {
487 /* old chips, nothing to do */
491 /* set FIFO size to maximum value */
492 val |= INV_ICM20689_BITS_FIFO_SIZE_MAX;
498 return regmap_write(st->map, st->reg->accel_lpf, val);
502 * inv_mpu6050_init_config() - Initialize hardware, disable FIFO.
504 * Initial configuration:
508 * Clock source: Gyro PLL
510 static int inv_mpu6050_init_config(struct iio_dev *indio_dev)
514 struct inv_mpu6050_state *st = iio_priv(indio_dev);
516 result = inv_mpu6050_set_gyro_fsr(st, st->chip_config.fsr);
520 result = inv_mpu6050_set_lpf_regs(st, st->chip_config.lpf);
524 d = st->chip_config.divider;
525 result = regmap_write(st->map, st->reg->sample_rate_div, d);
529 d = (st->chip_config.accl_fs << INV_MPU6050_ACCL_CONFIG_FSR_SHIFT);
530 result = regmap_write(st->map, st->reg->accl_config, d);
534 result = regmap_write(st->map, st->reg->int_pin_cfg, st->irq_mask);
539 * Internal chip period is 1ms (1kHz).
540 * Let's use at the beginning the theorical value before measuring
541 * with interrupt timestamps.
543 st->chip_period = NSEC_PER_MSEC;
545 /* magn chip init, noop if not present in the chip */
546 result = inv_mpu_magn_probe(st);
553 static int inv_mpu6050_sensor_set(struct inv_mpu6050_state *st, int reg,
557 __be16 d = cpu_to_be16(val);
559 ind = (axis - IIO_MOD_X) * 2;
560 result = regmap_bulk_write(st->map, reg + ind, &d, sizeof(d));
567 static int inv_mpu6050_sensor_show(struct inv_mpu6050_state *st, int reg,
573 ind = (axis - IIO_MOD_X) * 2;
574 result = regmap_bulk_read(st->map, reg + ind, &d, sizeof(d));
577 *val = (short)be16_to_cpup(&d);
582 static int inv_mpu6050_read_channel_data(struct iio_dev *indio_dev,
583 struct iio_chan_spec const *chan,
586 struct inv_mpu6050_state *st = iio_priv(indio_dev);
587 struct device *pdev = regmap_get_device(st->map);
588 unsigned int freq_hz, period_us, min_sleep_us, max_sleep_us;
592 /* compute sample period */
593 freq_hz = INV_MPU6050_DIVIDER_TO_FIFO_RATE(st->chip_config.divider);
594 period_us = 1000000 / freq_hz;
596 result = pm_runtime_resume_and_get(pdev);
600 switch (chan->type) {
602 if (!st->chip_config.gyro_en) {
603 result = inv_mpu6050_switch_engine(st, true,
604 INV_MPU6050_SENSOR_GYRO);
606 goto error_power_off;
607 /* need to wait 2 periods to have first valid sample */
608 min_sleep_us = 2 * period_us;
609 max_sleep_us = 2 * (period_us + period_us / 2);
610 usleep_range(min_sleep_us, max_sleep_us);
612 ret = inv_mpu6050_sensor_show(st, st->reg->raw_gyro,
613 chan->channel2, val);
616 if (!st->chip_config.accl_en) {
617 result = inv_mpu6050_switch_engine(st, true,
618 INV_MPU6050_SENSOR_ACCL);
620 goto error_power_off;
621 /* wait 1 period for first sample availability */
622 min_sleep_us = period_us;
623 max_sleep_us = period_us + period_us / 2;
624 usleep_range(min_sleep_us, max_sleep_us);
626 ret = inv_mpu6050_sensor_show(st, st->reg->raw_accl,
627 chan->channel2, val);
630 /* temperature sensor work only with accel and/or gyro */
631 if (!st->chip_config.accl_en && !st->chip_config.gyro_en) {
633 goto error_power_off;
635 if (!st->chip_config.temp_en) {
636 result = inv_mpu6050_switch_engine(st, true,
637 INV_MPU6050_SENSOR_TEMP);
639 goto error_power_off;
640 /* wait 1 period for first sample availability */
641 min_sleep_us = period_us;
642 max_sleep_us = period_us + period_us / 2;
643 usleep_range(min_sleep_us, max_sleep_us);
645 ret = inv_mpu6050_sensor_show(st, st->reg->temperature,
649 if (!st->chip_config.magn_en) {
650 result = inv_mpu6050_switch_engine(st, true,
651 INV_MPU6050_SENSOR_MAGN);
653 goto error_power_off;
654 /* frequency is limited for magnetometer */
655 if (freq_hz > INV_MPU_MAGN_FREQ_HZ_MAX) {
656 freq_hz = INV_MPU_MAGN_FREQ_HZ_MAX;
657 period_us = 1000000 / freq_hz;
659 /* need to wait 2 periods to have first valid sample */
660 min_sleep_us = 2 * period_us;
661 max_sleep_us = 2 * (period_us + period_us / 2);
662 usleep_range(min_sleep_us, max_sleep_us);
664 ret = inv_mpu_magn_read(st, chan->channel2, val);
671 pm_runtime_mark_last_busy(pdev);
672 pm_runtime_put_autosuspend(pdev);
677 pm_runtime_put_autosuspend(pdev);
682 inv_mpu6050_read_raw(struct iio_dev *indio_dev,
683 struct iio_chan_spec const *chan,
684 int *val, int *val2, long mask)
686 struct inv_mpu6050_state *st = iio_priv(indio_dev);
690 case IIO_CHAN_INFO_RAW:
691 ret = iio_device_claim_direct_mode(indio_dev);
694 mutex_lock(&st->lock);
695 ret = inv_mpu6050_read_channel_data(indio_dev, chan, val);
696 mutex_unlock(&st->lock);
697 iio_device_release_direct_mode(indio_dev);
699 case IIO_CHAN_INFO_SCALE:
700 switch (chan->type) {
702 mutex_lock(&st->lock);
704 *val2 = gyro_scale_6050[st->chip_config.fsr];
705 mutex_unlock(&st->lock);
707 return IIO_VAL_INT_PLUS_NANO;
709 mutex_lock(&st->lock);
711 *val2 = accel_scale[st->chip_config.accl_fs];
712 mutex_unlock(&st->lock);
714 return IIO_VAL_INT_PLUS_MICRO;
716 *val = st->hw->temp.scale / 1000000;
717 *val2 = st->hw->temp.scale % 1000000;
718 return IIO_VAL_INT_PLUS_MICRO;
720 return inv_mpu_magn_get_scale(st, chan, val, val2);
724 case IIO_CHAN_INFO_OFFSET:
725 switch (chan->type) {
727 *val = st->hw->temp.offset;
732 case IIO_CHAN_INFO_CALIBBIAS:
733 switch (chan->type) {
735 mutex_lock(&st->lock);
736 ret = inv_mpu6050_sensor_show(st, st->reg->gyro_offset,
737 chan->channel2, val);
738 mutex_unlock(&st->lock);
741 mutex_lock(&st->lock);
742 ret = inv_mpu6050_sensor_show(st, st->reg->accl_offset,
743 chan->channel2, val);
744 mutex_unlock(&st->lock);
755 static int inv_mpu6050_write_gyro_scale(struct inv_mpu6050_state *st, int val,
763 for (i = 0; i < ARRAY_SIZE(gyro_scale_6050); ++i) {
764 if (gyro_scale_6050[i] == val2) {
765 result = inv_mpu6050_set_gyro_fsr(st, i);
769 st->chip_config.fsr = i;
777 static int inv_write_raw_get_fmt(struct iio_dev *indio_dev,
778 struct iio_chan_spec const *chan, long mask)
781 case IIO_CHAN_INFO_SCALE:
782 switch (chan->type) {
784 return IIO_VAL_INT_PLUS_NANO;
786 return IIO_VAL_INT_PLUS_MICRO;
789 return IIO_VAL_INT_PLUS_MICRO;
795 static int inv_mpu6050_write_accel_scale(struct inv_mpu6050_state *st, int val,
804 for (i = 0; i < ARRAY_SIZE(accel_scale); ++i) {
805 if (accel_scale[i] == val2) {
806 d = (i << INV_MPU6050_ACCL_CONFIG_FSR_SHIFT);
807 result = regmap_write(st->map, st->reg->accl_config, d);
811 st->chip_config.accl_fs = i;
819 static int inv_mpu6050_write_raw(struct iio_dev *indio_dev,
820 struct iio_chan_spec const *chan,
821 int val, int val2, long mask)
823 struct inv_mpu6050_state *st = iio_priv(indio_dev);
824 struct device *pdev = regmap_get_device(st->map);
828 * we should only update scale when the chip is disabled, i.e.
831 result = iio_device_claim_direct_mode(indio_dev);
835 mutex_lock(&st->lock);
836 result = pm_runtime_resume_and_get(pdev);
838 goto error_write_raw_unlock;
841 case IIO_CHAN_INFO_SCALE:
842 switch (chan->type) {
844 result = inv_mpu6050_write_gyro_scale(st, val, val2);
847 result = inv_mpu6050_write_accel_scale(st, val, val2);
854 case IIO_CHAN_INFO_CALIBBIAS:
855 switch (chan->type) {
857 result = inv_mpu6050_sensor_set(st,
858 st->reg->gyro_offset,
859 chan->channel2, val);
862 result = inv_mpu6050_sensor_set(st,
863 st->reg->accl_offset,
864 chan->channel2, val);
876 pm_runtime_mark_last_busy(pdev);
877 pm_runtime_put_autosuspend(pdev);
878 error_write_raw_unlock:
879 mutex_unlock(&st->lock);
880 iio_device_release_direct_mode(indio_dev);
886 * inv_mpu6050_set_lpf() - set low pass filer based on fifo rate.
888 * Based on the Nyquist principle, the bandwidth of the low
889 * pass filter must not exceed the signal sampling rate divided
890 * by 2, or there would be aliasing.
891 * This function basically search for the correct low pass
892 * parameters based on the fifo rate, e.g, sampling frequency.
894 * lpf is set automatically when setting sampling rate to avoid any aliases.
896 static int inv_mpu6050_set_lpf(struct inv_mpu6050_state *st, int rate)
898 static const int hz[] = {400, 200, 90, 40, 20, 10};
899 static const int d[] = {
900 INV_MPU6050_FILTER_200HZ, INV_MPU6050_FILTER_100HZ,
901 INV_MPU6050_FILTER_45HZ, INV_MPU6050_FILTER_20HZ,
902 INV_MPU6050_FILTER_10HZ, INV_MPU6050_FILTER_5HZ
907 data = INV_MPU6050_FILTER_5HZ;
908 for (i = 0; i < ARRAY_SIZE(hz); ++i) {
914 result = inv_mpu6050_set_lpf_regs(st, data);
917 st->chip_config.lpf = data;
923 * inv_mpu6050_fifo_rate_store() - Set fifo rate.
926 inv_mpu6050_fifo_rate_store(struct device *dev, struct device_attribute *attr,
927 const char *buf, size_t count)
932 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
933 struct inv_mpu6050_state *st = iio_priv(indio_dev);
934 struct device *pdev = regmap_get_device(st->map);
936 if (kstrtoint(buf, 10, &fifo_rate))
938 if (fifo_rate < INV_MPU6050_MIN_FIFO_RATE ||
939 fifo_rate > INV_MPU6050_MAX_FIFO_RATE)
942 /* compute the chip sample rate divider */
943 d = INV_MPU6050_FIFO_RATE_TO_DIVIDER(fifo_rate);
944 /* compute back the fifo rate to handle truncation cases */
945 fifo_rate = INV_MPU6050_DIVIDER_TO_FIFO_RATE(d);
947 mutex_lock(&st->lock);
948 if (d == st->chip_config.divider) {
950 goto fifo_rate_fail_unlock;
952 result = pm_runtime_resume_and_get(pdev);
954 goto fifo_rate_fail_unlock;
956 result = regmap_write(st->map, st->reg->sample_rate_div, d);
958 goto fifo_rate_fail_power_off;
959 st->chip_config.divider = d;
961 result = inv_mpu6050_set_lpf(st, fifo_rate);
963 goto fifo_rate_fail_power_off;
965 /* update rate for magn, noop if not present in chip */
966 result = inv_mpu_magn_set_rate(st, fifo_rate);
968 goto fifo_rate_fail_power_off;
970 pm_runtime_mark_last_busy(pdev);
971 fifo_rate_fail_power_off:
972 pm_runtime_put_autosuspend(pdev);
973 fifo_rate_fail_unlock:
974 mutex_unlock(&st->lock);
982 * inv_fifo_rate_show() - Get the current sampling rate.
985 inv_fifo_rate_show(struct device *dev, struct device_attribute *attr,
988 struct inv_mpu6050_state *st = iio_priv(dev_to_iio_dev(dev));
991 mutex_lock(&st->lock);
992 fifo_rate = INV_MPU6050_DIVIDER_TO_FIFO_RATE(st->chip_config.divider);
993 mutex_unlock(&st->lock);
995 return scnprintf(buf, PAGE_SIZE, "%u\n", fifo_rate);
999 * inv_attr_show() - calling this function will show current
1002 * Deprecated in favor of IIO mounting matrix API.
1004 * See inv_get_mount_matrix()
1006 static ssize_t inv_attr_show(struct device *dev, struct device_attribute *attr,
1009 struct inv_mpu6050_state *st = iio_priv(dev_to_iio_dev(dev));
1010 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
1013 switch (this_attr->address) {
1015 * In MPU6050, the two matrix are the same because gyro and accel
1016 * are integrated in one chip
1018 case ATTR_GYRO_MATRIX:
1019 case ATTR_ACCL_MATRIX:
1020 m = st->plat_data.orientation;
1022 return scnprintf(buf, PAGE_SIZE,
1023 "%d, %d, %d; %d, %d, %d; %d, %d, %d\n",
1024 m[0], m[1], m[2], m[3], m[4], m[5], m[6], m[7], m[8]);
1031 * inv_mpu6050_validate_trigger() - validate_trigger callback for invensense
1033 * @indio_dev: The IIO device
1034 * @trig: The new trigger
1036 * Returns: 0 if the 'trig' matches the trigger registered by the MPU6050
1037 * device, -EINVAL otherwise.
1039 static int inv_mpu6050_validate_trigger(struct iio_dev *indio_dev,
1040 struct iio_trigger *trig)
1042 struct inv_mpu6050_state *st = iio_priv(indio_dev);
1044 if (st->trig != trig)
1050 static const struct iio_mount_matrix *
1051 inv_get_mount_matrix(const struct iio_dev *indio_dev,
1052 const struct iio_chan_spec *chan)
1054 struct inv_mpu6050_state *data = iio_priv(indio_dev);
1055 const struct iio_mount_matrix *matrix;
1057 if (chan->type == IIO_MAGN)
1058 matrix = &data->magn_orient;
1060 matrix = &data->orientation;
1065 static const struct iio_chan_spec_ext_info inv_ext_info[] = {
1066 IIO_MOUNT_MATRIX(IIO_SHARED_BY_TYPE, inv_get_mount_matrix),
1070 #define INV_MPU6050_CHAN(_type, _channel2, _index) \
1074 .channel2 = _channel2, \
1075 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
1076 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
1077 BIT(IIO_CHAN_INFO_CALIBBIAS), \
1078 .scan_index = _index, \
1082 .storagebits = 16, \
1084 .endianness = IIO_BE, \
1086 .ext_info = inv_ext_info, \
1089 #define INV_MPU6050_TEMP_CHAN(_index) \
1092 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) \
1093 | BIT(IIO_CHAN_INFO_OFFSET) \
1094 | BIT(IIO_CHAN_INFO_SCALE), \
1095 .scan_index = _index, \
1099 .storagebits = 16, \
1101 .endianness = IIO_BE, \
1105 static const struct iio_chan_spec inv_mpu_channels[] = {
1106 IIO_CHAN_SOFT_TIMESTAMP(INV_MPU6050_SCAN_TIMESTAMP),
1108 INV_MPU6050_TEMP_CHAN(INV_MPU6050_SCAN_TEMP),
1110 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_X, INV_MPU6050_SCAN_GYRO_X),
1111 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Y, INV_MPU6050_SCAN_GYRO_Y),
1112 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Z, INV_MPU6050_SCAN_GYRO_Z),
1114 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_X, INV_MPU6050_SCAN_ACCL_X),
1115 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Y, INV_MPU6050_SCAN_ACCL_Y),
1116 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Z, INV_MPU6050_SCAN_ACCL_Z),
1119 #define INV_MPU6050_SCAN_MASK_3AXIS_ACCEL \
1120 (BIT(INV_MPU6050_SCAN_ACCL_X) \
1121 | BIT(INV_MPU6050_SCAN_ACCL_Y) \
1122 | BIT(INV_MPU6050_SCAN_ACCL_Z))
1124 #define INV_MPU6050_SCAN_MASK_3AXIS_GYRO \
1125 (BIT(INV_MPU6050_SCAN_GYRO_X) \
1126 | BIT(INV_MPU6050_SCAN_GYRO_Y) \
1127 | BIT(INV_MPU6050_SCAN_GYRO_Z))
1129 #define INV_MPU6050_SCAN_MASK_TEMP (BIT(INV_MPU6050_SCAN_TEMP))
1131 static const unsigned long inv_mpu_scan_masks[] = {
1133 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL,
1134 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_TEMP,
1136 INV_MPU6050_SCAN_MASK_3AXIS_GYRO,
1137 INV_MPU6050_SCAN_MASK_3AXIS_GYRO | INV_MPU6050_SCAN_MASK_TEMP,
1138 /* 6-axis accel + gyro */
1139 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_3AXIS_GYRO,
1140 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_3AXIS_GYRO
1141 | INV_MPU6050_SCAN_MASK_TEMP,
1145 #define INV_MPU9X50_MAGN_CHAN(_chan2, _bits, _index) \
1149 .channel2 = _chan2, \
1150 .info_mask_separate = BIT(IIO_CHAN_INFO_SCALE) | \
1151 BIT(IIO_CHAN_INFO_RAW), \
1152 .scan_index = _index, \
1155 .realbits = _bits, \
1156 .storagebits = 16, \
1158 .endianness = IIO_BE, \
1160 .ext_info = inv_ext_info, \
1163 static const struct iio_chan_spec inv_mpu9150_channels[] = {
1164 IIO_CHAN_SOFT_TIMESTAMP(INV_MPU9X50_SCAN_TIMESTAMP),
1166 INV_MPU6050_TEMP_CHAN(INV_MPU6050_SCAN_TEMP),
1168 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_X, INV_MPU6050_SCAN_GYRO_X),
1169 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Y, INV_MPU6050_SCAN_GYRO_Y),
1170 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Z, INV_MPU6050_SCAN_GYRO_Z),
1172 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_X, INV_MPU6050_SCAN_ACCL_X),
1173 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Y, INV_MPU6050_SCAN_ACCL_Y),
1174 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Z, INV_MPU6050_SCAN_ACCL_Z),
1176 /* Magnetometer resolution is 13 bits */
1177 INV_MPU9X50_MAGN_CHAN(IIO_MOD_X, 13, INV_MPU9X50_SCAN_MAGN_X),
1178 INV_MPU9X50_MAGN_CHAN(IIO_MOD_Y, 13, INV_MPU9X50_SCAN_MAGN_Y),
1179 INV_MPU9X50_MAGN_CHAN(IIO_MOD_Z, 13, INV_MPU9X50_SCAN_MAGN_Z),
1182 static const struct iio_chan_spec inv_mpu9250_channels[] = {
1183 IIO_CHAN_SOFT_TIMESTAMP(INV_MPU9X50_SCAN_TIMESTAMP),
1185 INV_MPU6050_TEMP_CHAN(INV_MPU6050_SCAN_TEMP),
1187 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_X, INV_MPU6050_SCAN_GYRO_X),
1188 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Y, INV_MPU6050_SCAN_GYRO_Y),
1189 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Z, INV_MPU6050_SCAN_GYRO_Z),
1191 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_X, INV_MPU6050_SCAN_ACCL_X),
1192 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Y, INV_MPU6050_SCAN_ACCL_Y),
1193 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Z, INV_MPU6050_SCAN_ACCL_Z),
1195 /* Magnetometer resolution is 16 bits */
1196 INV_MPU9X50_MAGN_CHAN(IIO_MOD_X, 16, INV_MPU9X50_SCAN_MAGN_X),
1197 INV_MPU9X50_MAGN_CHAN(IIO_MOD_Y, 16, INV_MPU9X50_SCAN_MAGN_Y),
1198 INV_MPU9X50_MAGN_CHAN(IIO_MOD_Z, 16, INV_MPU9X50_SCAN_MAGN_Z),
1201 #define INV_MPU9X50_SCAN_MASK_3AXIS_MAGN \
1202 (BIT(INV_MPU9X50_SCAN_MAGN_X) \
1203 | BIT(INV_MPU9X50_SCAN_MAGN_Y) \
1204 | BIT(INV_MPU9X50_SCAN_MAGN_Z))
1206 static const unsigned long inv_mpu9x50_scan_masks[] = {
1208 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL,
1209 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_TEMP,
1211 INV_MPU6050_SCAN_MASK_3AXIS_GYRO,
1212 INV_MPU6050_SCAN_MASK_3AXIS_GYRO | INV_MPU6050_SCAN_MASK_TEMP,
1214 INV_MPU9X50_SCAN_MASK_3AXIS_MAGN,
1215 INV_MPU9X50_SCAN_MASK_3AXIS_MAGN | INV_MPU6050_SCAN_MASK_TEMP,
1216 /* 6-axis accel + gyro */
1217 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_3AXIS_GYRO,
1218 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_3AXIS_GYRO
1219 | INV_MPU6050_SCAN_MASK_TEMP,
1220 /* 6-axis accel + magn */
1221 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU9X50_SCAN_MASK_3AXIS_MAGN,
1222 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU9X50_SCAN_MASK_3AXIS_MAGN
1223 | INV_MPU6050_SCAN_MASK_TEMP,
1224 /* 6-axis gyro + magn */
1225 INV_MPU6050_SCAN_MASK_3AXIS_GYRO | INV_MPU9X50_SCAN_MASK_3AXIS_MAGN,
1226 INV_MPU6050_SCAN_MASK_3AXIS_GYRO | INV_MPU9X50_SCAN_MASK_3AXIS_MAGN
1227 | INV_MPU6050_SCAN_MASK_TEMP,
1228 /* 9-axis accel + gyro + magn */
1229 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_3AXIS_GYRO
1230 | INV_MPU9X50_SCAN_MASK_3AXIS_MAGN,
1231 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_3AXIS_GYRO
1232 | INV_MPU9X50_SCAN_MASK_3AXIS_MAGN
1233 | INV_MPU6050_SCAN_MASK_TEMP,
1237 static const unsigned long inv_icm20602_scan_masks[] = {
1238 /* 3-axis accel + temp (mandatory) */
1239 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_TEMP,
1240 /* 3-axis gyro + temp (mandatory) */
1241 INV_MPU6050_SCAN_MASK_3AXIS_GYRO | INV_MPU6050_SCAN_MASK_TEMP,
1242 /* 6-axis accel + gyro + temp (mandatory) */
1243 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_3AXIS_GYRO
1244 | INV_MPU6050_SCAN_MASK_TEMP,
1249 * The user can choose any frequency between INV_MPU6050_MIN_FIFO_RATE and
1250 * INV_MPU6050_MAX_FIFO_RATE, but only these frequencies are matched by the
1251 * low-pass filter. Specifically, each of these sampling rates are about twice
1252 * the bandwidth of a corresponding low-pass filter, which should eliminate
1253 * aliasing following the Nyquist principle. By picking a frequency different
1254 * from these, the user risks aliasing effects.
1256 static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("10 20 50 100 200 500");
1257 static IIO_CONST_ATTR(in_anglvel_scale_available,
1258 "0.000133090 0.000266181 0.000532362 0.001064724");
1259 static IIO_CONST_ATTR(in_accel_scale_available,
1260 "0.000598 0.001196 0.002392 0.004785");
1261 static IIO_DEV_ATTR_SAMP_FREQ(S_IRUGO | S_IWUSR, inv_fifo_rate_show,
1262 inv_mpu6050_fifo_rate_store);
1264 /* Deprecated: kept for userspace backward compatibility. */
1265 static IIO_DEVICE_ATTR(in_gyro_matrix, S_IRUGO, inv_attr_show, NULL,
1267 static IIO_DEVICE_ATTR(in_accel_matrix, S_IRUGO, inv_attr_show, NULL,
1270 static struct attribute *inv_attributes[] = {
1271 &iio_dev_attr_in_gyro_matrix.dev_attr.attr, /* deprecated */
1272 &iio_dev_attr_in_accel_matrix.dev_attr.attr, /* deprecated */
1273 &iio_dev_attr_sampling_frequency.dev_attr.attr,
1274 &iio_const_attr_sampling_frequency_available.dev_attr.attr,
1275 &iio_const_attr_in_accel_scale_available.dev_attr.attr,
1276 &iio_const_attr_in_anglvel_scale_available.dev_attr.attr,
1280 static const struct attribute_group inv_attribute_group = {
1281 .attrs = inv_attributes
1284 static int inv_mpu6050_reg_access(struct iio_dev *indio_dev,
1286 unsigned int writeval,
1287 unsigned int *readval)
1289 struct inv_mpu6050_state *st = iio_priv(indio_dev);
1292 mutex_lock(&st->lock);
1294 ret = regmap_read(st->map, reg, readval);
1296 ret = regmap_write(st->map, reg, writeval);
1297 mutex_unlock(&st->lock);
1302 static const struct iio_info mpu_info = {
1303 .read_raw = &inv_mpu6050_read_raw,
1304 .write_raw = &inv_mpu6050_write_raw,
1305 .write_raw_get_fmt = &inv_write_raw_get_fmt,
1306 .attrs = &inv_attribute_group,
1307 .validate_trigger = inv_mpu6050_validate_trigger,
1308 .debugfs_reg_access = &inv_mpu6050_reg_access,
1312 * inv_check_and_setup_chip() - check and setup chip.
1314 static int inv_check_and_setup_chip(struct inv_mpu6050_state *st)
1317 unsigned int regval, mask;
1320 st->hw = &hw_info[st->chip_type];
1321 st->reg = hw_info[st->chip_type].reg;
1322 memcpy(&st->chip_config, hw_info[st->chip_type].config,
1323 sizeof(st->chip_config));
1325 /* check chip self-identification */
1326 result = regmap_read(st->map, INV_MPU6050_REG_WHOAMI, ®val);
1329 if (regval != st->hw->whoami) {
1330 /* check whoami against all possible values */
1331 for (i = 0; i < INV_NUM_PARTS; ++i) {
1332 if (regval == hw_info[i].whoami) {
1333 dev_warn(regmap_get_device(st->map),
1334 "whoami mismatch got 0x%02x (%s) expected 0x%02x (%s)\n",
1335 regval, hw_info[i].name,
1336 st->hw->whoami, st->hw->name);
1340 if (i >= INV_NUM_PARTS) {
1341 dev_err(regmap_get_device(st->map),
1342 "invalid whoami 0x%02x expected 0x%02x (%s)\n",
1343 regval, st->hw->whoami, st->hw->name);
1348 /* reset to make sure previous state are not there */
1349 result = regmap_write(st->map, st->reg->pwr_mgmt_1,
1350 INV_MPU6050_BIT_H_RESET);
1353 msleep(INV_MPU6050_POWER_UP_TIME);
1354 switch (st->chip_type) {
1361 /* reset signal path (required for spi connection) */
1362 regval = INV_MPU6050_BIT_TEMP_RST | INV_MPU6050_BIT_ACCEL_RST |
1363 INV_MPU6050_BIT_GYRO_RST;
1364 result = regmap_write(st->map, INV_MPU6050_REG_SIGNAL_PATH_RESET,
1368 msleep(INV_MPU6050_POWER_UP_TIME);
1375 * Turn power on. After reset, the sleep bit could be on
1376 * or off depending on the OTP settings. Turning power on
1377 * make it in a definite state as well as making the hardware
1378 * state align with the software state
1380 result = inv_mpu6050_set_power_itg(st, true);
1383 mask = INV_MPU6050_SENSOR_ACCL | INV_MPU6050_SENSOR_GYRO |
1384 INV_MPU6050_SENSOR_TEMP | INV_MPU6050_SENSOR_MAGN;
1385 result = inv_mpu6050_switch_engine(st, false, mask);
1387 goto error_power_off;
1392 inv_mpu6050_set_power_itg(st, false);
1396 static int inv_mpu_core_enable_regulator_vddio(struct inv_mpu6050_state *st)
1400 result = regulator_enable(st->vddio_supply);
1402 dev_err(regmap_get_device(st->map),
1403 "Failed to enable vddio regulator: %d\n", result);
1405 /* Give the device a little bit of time to start up. */
1406 usleep_range(3000, 5000);
1412 static int inv_mpu_core_disable_regulator_vddio(struct inv_mpu6050_state *st)
1416 result = regulator_disable(st->vddio_supply);
1418 dev_err(regmap_get_device(st->map),
1419 "Failed to disable vddio regulator: %d\n", result);
1424 static void inv_mpu_core_disable_regulator_action(void *_data)
1426 struct inv_mpu6050_state *st = _data;
1429 result = regulator_disable(st->vdd_supply);
1431 dev_err(regmap_get_device(st->map),
1432 "Failed to disable vdd regulator: %d\n", result);
1434 inv_mpu_core_disable_regulator_vddio(st);
1437 static void inv_mpu_pm_disable(void *data)
1439 struct device *dev = data;
1441 pm_runtime_disable(dev);
1444 int inv_mpu_core_probe(struct regmap *regmap, int irq, const char *name,
1445 int (*inv_mpu_bus_setup)(struct iio_dev *), int chip_type)
1447 struct inv_mpu6050_state *st;
1448 struct iio_dev *indio_dev;
1449 struct inv_mpu6050_platform_data *pdata;
1450 struct device *dev = regmap_get_device(regmap);
1452 struct irq_data *desc;
1455 indio_dev = devm_iio_device_alloc(dev, sizeof(*st));
1459 BUILD_BUG_ON(ARRAY_SIZE(hw_info) != INV_NUM_PARTS);
1460 if (chip_type < 0 || chip_type >= INV_NUM_PARTS) {
1461 dev_err(dev, "Bad invensense chip_type=%d name=%s\n",
1465 st = iio_priv(indio_dev);
1466 mutex_init(&st->lock);
1467 st->chip_type = chip_type;
1471 pdata = dev_get_platdata(dev);
1473 result = iio_read_mount_matrix(dev, &st->orientation);
1475 dev_err(dev, "Failed to retrieve mounting matrix %d\n",
1480 st->plat_data = *pdata;
1484 desc = irq_get_irq_data(irq);
1486 dev_err(dev, "Could not find IRQ %d\n", irq);
1490 irq_type = irqd_get_trigger_type(desc);
1492 irq_type = IRQF_TRIGGER_RISING;
1494 /* Doesn't really matter, use the default */
1495 irq_type = IRQF_TRIGGER_RISING;
1498 if (irq_type & IRQF_TRIGGER_RISING) // rising or both-edge
1499 st->irq_mask = INV_MPU6050_ACTIVE_HIGH;
1500 else if (irq_type == IRQF_TRIGGER_FALLING)
1501 st->irq_mask = INV_MPU6050_ACTIVE_LOW;
1502 else if (irq_type == IRQF_TRIGGER_HIGH)
1503 st->irq_mask = INV_MPU6050_ACTIVE_HIGH |
1504 INV_MPU6050_LATCH_INT_EN;
1505 else if (irq_type == IRQF_TRIGGER_LOW)
1506 st->irq_mask = INV_MPU6050_ACTIVE_LOW |
1507 INV_MPU6050_LATCH_INT_EN;
1509 dev_err(dev, "Invalid interrupt type 0x%x specified\n",
1514 st->vdd_supply = devm_regulator_get(dev, "vdd");
1515 if (IS_ERR(st->vdd_supply))
1516 return dev_err_probe(dev, PTR_ERR(st->vdd_supply),
1517 "Failed to get vdd regulator\n");
1519 st->vddio_supply = devm_regulator_get(dev, "vddio");
1520 if (IS_ERR(st->vddio_supply))
1521 return dev_err_probe(dev, PTR_ERR(st->vddio_supply),
1522 "Failed to get vddio regulator\n");
1524 result = regulator_enable(st->vdd_supply);
1526 dev_err(dev, "Failed to enable vdd regulator: %d\n", result);
1529 msleep(INV_MPU6050_POWER_UP_TIME);
1531 result = inv_mpu_core_enable_regulator_vddio(st);
1533 regulator_disable(st->vdd_supply);
1537 result = devm_add_action_or_reset(dev, inv_mpu_core_disable_regulator_action,
1540 dev_err(dev, "Failed to setup regulator cleanup action %d\n",
1545 /* fill magnetometer orientation */
1546 result = inv_mpu_magn_set_orient(st);
1550 /* power is turned on inside check chip type*/
1551 result = inv_check_and_setup_chip(st);
1555 result = inv_mpu6050_init_config(indio_dev);
1557 dev_err(dev, "Could not initialize device.\n");
1558 goto error_power_off;
1561 dev_set_drvdata(dev, indio_dev);
1562 /* name will be NULL when enumerated via ACPI */
1564 indio_dev->name = name;
1566 indio_dev->name = dev_name(dev);
1568 /* requires parent device set in indio_dev */
1569 if (inv_mpu_bus_setup) {
1570 result = inv_mpu_bus_setup(indio_dev);
1572 goto error_power_off;
1575 /* chip init is done, turning on runtime power management */
1576 result = pm_runtime_set_active(dev);
1578 goto error_power_off;
1579 pm_runtime_get_noresume(dev);
1580 pm_runtime_enable(dev);
1581 pm_runtime_set_autosuspend_delay(dev, INV_MPU6050_SUSPEND_DELAY_MS);
1582 pm_runtime_use_autosuspend(dev);
1583 pm_runtime_put(dev);
1584 result = devm_add_action_or_reset(dev, inv_mpu_pm_disable, dev);
1588 switch (chip_type) {
1590 indio_dev->channels = inv_mpu9150_channels;
1591 indio_dev->num_channels = ARRAY_SIZE(inv_mpu9150_channels);
1592 indio_dev->available_scan_masks = inv_mpu9x50_scan_masks;
1596 indio_dev->channels = inv_mpu9250_channels;
1597 indio_dev->num_channels = ARRAY_SIZE(inv_mpu9250_channels);
1598 indio_dev->available_scan_masks = inv_mpu9x50_scan_masks;
1601 indio_dev->channels = inv_mpu_channels;
1602 indio_dev->num_channels = ARRAY_SIZE(inv_mpu_channels);
1603 indio_dev->available_scan_masks = inv_icm20602_scan_masks;
1606 indio_dev->channels = inv_mpu_channels;
1607 indio_dev->num_channels = ARRAY_SIZE(inv_mpu_channels);
1608 indio_dev->available_scan_masks = inv_mpu_scan_masks;
1612 * Use magnetometer inside the chip only if there is no i2c
1613 * auxiliary device in use. Otherwise Going back to 6-axis only.
1615 if (st->magn_disabled) {
1616 indio_dev->channels = inv_mpu_channels;
1617 indio_dev->num_channels = ARRAY_SIZE(inv_mpu_channels);
1618 indio_dev->available_scan_masks = inv_mpu_scan_masks;
1621 indio_dev->info = &mpu_info;
1625 * The driver currently only supports buffered capture with its
1626 * own trigger. So no IRQ, no trigger, no buffer
1628 result = devm_iio_triggered_buffer_setup(dev, indio_dev,
1629 iio_pollfunc_store_time,
1630 inv_mpu6050_read_fifo,
1633 dev_err(dev, "configure buffer fail %d\n", result);
1637 result = inv_mpu6050_probe_trigger(indio_dev, irq_type);
1639 dev_err(dev, "trigger probe fail %d\n", result);
1644 result = devm_iio_device_register(dev, indio_dev);
1646 dev_err(dev, "IIO register fail %d\n", result);
1653 inv_mpu6050_set_power_itg(st, false);
1656 EXPORT_SYMBOL_GPL(inv_mpu_core_probe);
1658 static int __maybe_unused inv_mpu_resume(struct device *dev)
1660 struct iio_dev *indio_dev = dev_get_drvdata(dev);
1661 struct inv_mpu6050_state *st = iio_priv(indio_dev);
1664 mutex_lock(&st->lock);
1665 result = inv_mpu_core_enable_regulator_vddio(st);
1669 result = inv_mpu6050_set_power_itg(st, true);
1673 pm_runtime_disable(dev);
1674 pm_runtime_set_active(dev);
1675 pm_runtime_enable(dev);
1677 result = inv_mpu6050_switch_engine(st, true, st->suspended_sensors);
1681 if (iio_buffer_enabled(indio_dev))
1682 result = inv_mpu6050_prepare_fifo(st, true);
1685 mutex_unlock(&st->lock);
1690 static int __maybe_unused inv_mpu_suspend(struct device *dev)
1692 struct iio_dev *indio_dev = dev_get_drvdata(dev);
1693 struct inv_mpu6050_state *st = iio_priv(indio_dev);
1696 mutex_lock(&st->lock);
1698 st->suspended_sensors = 0;
1699 if (pm_runtime_suspended(dev)) {
1704 if (iio_buffer_enabled(indio_dev)) {
1705 result = inv_mpu6050_prepare_fifo(st, false);
1710 if (st->chip_config.accl_en)
1711 st->suspended_sensors |= INV_MPU6050_SENSOR_ACCL;
1712 if (st->chip_config.gyro_en)
1713 st->suspended_sensors |= INV_MPU6050_SENSOR_GYRO;
1714 if (st->chip_config.temp_en)
1715 st->suspended_sensors |= INV_MPU6050_SENSOR_TEMP;
1716 if (st->chip_config.magn_en)
1717 st->suspended_sensors |= INV_MPU6050_SENSOR_MAGN;
1718 result = inv_mpu6050_switch_engine(st, false, st->suspended_sensors);
1722 result = inv_mpu6050_set_power_itg(st, false);
1726 inv_mpu_core_disable_regulator_vddio(st);
1728 mutex_unlock(&st->lock);
1733 static int __maybe_unused inv_mpu_runtime_suspend(struct device *dev)
1735 struct inv_mpu6050_state *st = iio_priv(dev_get_drvdata(dev));
1736 unsigned int sensors;
1739 mutex_lock(&st->lock);
1741 sensors = INV_MPU6050_SENSOR_ACCL | INV_MPU6050_SENSOR_GYRO |
1742 INV_MPU6050_SENSOR_TEMP | INV_MPU6050_SENSOR_MAGN;
1743 ret = inv_mpu6050_switch_engine(st, false, sensors);
1747 ret = inv_mpu6050_set_power_itg(st, false);
1751 inv_mpu_core_disable_regulator_vddio(st);
1754 mutex_unlock(&st->lock);
1758 static int __maybe_unused inv_mpu_runtime_resume(struct device *dev)
1760 struct inv_mpu6050_state *st = iio_priv(dev_get_drvdata(dev));
1763 ret = inv_mpu_core_enable_regulator_vddio(st);
1767 return inv_mpu6050_set_power_itg(st, true);
1770 const struct dev_pm_ops inv_mpu_pmops = {
1771 SET_SYSTEM_SLEEP_PM_OPS(inv_mpu_suspend, inv_mpu_resume)
1772 SET_RUNTIME_PM_OPS(inv_mpu_runtime_suspend, inv_mpu_runtime_resume, NULL)
1774 EXPORT_SYMBOL_GPL(inv_mpu_pmops);
1776 MODULE_AUTHOR("Invensense Corporation");
1777 MODULE_DESCRIPTION("Invensense device MPU6050 driver");
1778 MODULE_LICENSE("GPL");