1 // SPDX-License-Identifier: GPL-2.0-only
3 * AD5592R Digital <-> Analog converters driver
5 * Copyright 2014-2016 Analog Devices Inc.
6 * Author: Paul Cercueil <paul.cercueil@analog.com>
9 #include <linux/bitops.h>
10 #include <linux/delay.h>
11 #include <linux/iio/iio.h>
12 #include <linux/module.h>
13 #include <linux/mutex.h>
14 #include <linux/regulator/consumer.h>
15 #include <linux/gpio/consumer.h>
16 #include <linux/gpio/driver.h>
17 #include <linux/property.h>
19 #include <dt-bindings/iio/adi,ad5592r.h>
21 #include "ad5592r-base.h"
23 static int ad5592r_gpio_get(struct gpio_chip *chip, unsigned offset)
25 struct ad5592r_state *st = gpiochip_get_data(chip);
29 mutex_lock(&st->gpio_lock);
31 if (st->gpio_out & BIT(offset))
34 ret = st->ops->gpio_read(st, &val);
36 mutex_unlock(&st->gpio_lock);
41 return !!(val & BIT(offset));
44 static void ad5592r_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
46 struct ad5592r_state *st = gpiochip_get_data(chip);
48 mutex_lock(&st->gpio_lock);
51 st->gpio_val |= BIT(offset);
53 st->gpio_val &= ~BIT(offset);
55 st->ops->reg_write(st, AD5592R_REG_GPIO_SET, st->gpio_val);
57 mutex_unlock(&st->gpio_lock);
60 static int ad5592r_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
62 struct ad5592r_state *st = gpiochip_get_data(chip);
65 mutex_lock(&st->gpio_lock);
67 st->gpio_out &= ~BIT(offset);
68 st->gpio_in |= BIT(offset);
70 ret = st->ops->reg_write(st, AD5592R_REG_GPIO_OUT_EN, st->gpio_out);
74 ret = st->ops->reg_write(st, AD5592R_REG_GPIO_IN_EN, st->gpio_in);
77 mutex_unlock(&st->gpio_lock);
82 static int ad5592r_gpio_direction_output(struct gpio_chip *chip,
83 unsigned offset, int value)
85 struct ad5592r_state *st = gpiochip_get_data(chip);
88 mutex_lock(&st->gpio_lock);
91 st->gpio_val |= BIT(offset);
93 st->gpio_val &= ~BIT(offset);
95 st->gpio_in &= ~BIT(offset);
96 st->gpio_out |= BIT(offset);
98 ret = st->ops->reg_write(st, AD5592R_REG_GPIO_SET, st->gpio_val);
102 ret = st->ops->reg_write(st, AD5592R_REG_GPIO_OUT_EN, st->gpio_out);
106 ret = st->ops->reg_write(st, AD5592R_REG_GPIO_IN_EN, st->gpio_in);
109 mutex_unlock(&st->gpio_lock);
114 static int ad5592r_gpio_request(struct gpio_chip *chip, unsigned offset)
116 struct ad5592r_state *st = gpiochip_get_data(chip);
118 if (!(st->gpio_map & BIT(offset))) {
119 dev_err(st->dev, "GPIO %d is reserved by alternate function\n",
127 static int ad5592r_gpio_init(struct ad5592r_state *st)
132 st->gpiochip.label = dev_name(st->dev);
133 st->gpiochip.base = -1;
134 st->gpiochip.ngpio = 8;
135 st->gpiochip.parent = st->dev;
136 st->gpiochip.can_sleep = true;
137 st->gpiochip.direction_input = ad5592r_gpio_direction_input;
138 st->gpiochip.direction_output = ad5592r_gpio_direction_output;
139 st->gpiochip.get = ad5592r_gpio_get;
140 st->gpiochip.set = ad5592r_gpio_set;
141 st->gpiochip.request = ad5592r_gpio_request;
142 st->gpiochip.owner = THIS_MODULE;
144 mutex_init(&st->gpio_lock);
146 return gpiochip_add_data(&st->gpiochip, st);
149 static void ad5592r_gpio_cleanup(struct ad5592r_state *st)
152 gpiochip_remove(&st->gpiochip);
155 static int ad5592r_reset(struct ad5592r_state *st)
157 struct gpio_desc *gpio;
159 gpio = devm_gpiod_get_optional(st->dev, "reset", GPIOD_OUT_LOW);
161 return PTR_ERR(gpio);
165 gpiod_set_value(gpio, 1);
167 mutex_lock(&st->lock);
168 /* Writing this magic value resets the device */
169 st->ops->reg_write(st, AD5592R_REG_RESET, 0xdac);
170 mutex_unlock(&st->lock);
178 static int ad5592r_get_vref(struct ad5592r_state *st)
183 ret = regulator_get_voltage(st->reg);
193 static int ad5592r_set_channel_modes(struct ad5592r_state *st)
195 const struct ad5592r_rw_ops *ops = st->ops;
198 u8 pulldown = 0, tristate = 0, dac = 0, adc = 0;
201 for (i = 0; i < st->num_channels; i++) {
202 switch (st->channel_modes[i]) {
211 case CH_MODE_DAC_AND_ADC:
217 st->gpio_map |= BIT(i);
218 st->gpio_in |= BIT(i); /* Default to input */
223 switch (st->channel_offstate[i]) {
224 case CH_OFFSTATE_OUT_TRISTATE:
228 case CH_OFFSTATE_OUT_LOW:
229 st->gpio_out |= BIT(i);
232 case CH_OFFSTATE_OUT_HIGH:
233 st->gpio_out |= BIT(i);
234 st->gpio_val |= BIT(i);
237 case CH_OFFSTATE_PULLDOWN:
245 mutex_lock(&st->lock);
247 /* Pull down unused pins to GND */
248 ret = ops->reg_write(st, AD5592R_REG_PULLDOWN, pulldown);
252 ret = ops->reg_write(st, AD5592R_REG_TRISTATE, tristate);
256 /* Configure pins that we use */
257 ret = ops->reg_write(st, AD5592R_REG_DAC_EN, dac);
261 ret = ops->reg_write(st, AD5592R_REG_ADC_EN, adc);
265 ret = ops->reg_write(st, AD5592R_REG_GPIO_SET, st->gpio_val);
269 ret = ops->reg_write(st, AD5592R_REG_GPIO_OUT_EN, st->gpio_out);
273 ret = ops->reg_write(st, AD5592R_REG_GPIO_IN_EN, st->gpio_in);
277 /* Verify that we can read back at least one register */
278 ret = ops->reg_read(st, AD5592R_REG_ADC_EN, &read_back);
279 if (!ret && (read_back & 0xff) != adc)
283 mutex_unlock(&st->lock);
287 static int ad5592r_reset_channel_modes(struct ad5592r_state *st)
291 for (i = 0; i < ARRAY_SIZE(st->channel_modes); i++)
292 st->channel_modes[i] = CH_MODE_UNUSED;
294 return ad5592r_set_channel_modes(st);
297 static int ad5592r_write_raw(struct iio_dev *iio_dev,
298 struct iio_chan_spec const *chan, int val, int val2, long mask)
300 struct ad5592r_state *st = iio_priv(iio_dev);
304 case IIO_CHAN_INFO_RAW:
306 if (val >= (1 << chan->scan_type.realbits) || val < 0)
312 mutex_lock(&st->lock);
313 ret = st->ops->write_dac(st, chan->channel, val);
315 st->cached_dac[chan->channel] = val;
316 mutex_unlock(&st->lock);
318 case IIO_CHAN_INFO_SCALE:
319 if (chan->type == IIO_VOLTAGE) {
322 if (val == st->scale_avail[0][0] &&
323 val2 == st->scale_avail[0][1])
325 else if (val == st->scale_avail[1][0] &&
326 val2 == st->scale_avail[1][1])
331 mutex_lock(&st->lock);
333 ret = st->ops->reg_read(st, AD5592R_REG_CTRL,
334 &st->cached_gp_ctrl);
336 mutex_unlock(&st->lock);
342 st->cached_gp_ctrl |=
343 AD5592R_REG_CTRL_DAC_RANGE;
345 st->cached_gp_ctrl &=
346 ~AD5592R_REG_CTRL_DAC_RANGE;
349 st->cached_gp_ctrl |=
350 AD5592R_REG_CTRL_ADC_RANGE;
352 st->cached_gp_ctrl &=
353 ~AD5592R_REG_CTRL_ADC_RANGE;
356 ret = st->ops->reg_write(st, AD5592R_REG_CTRL,
358 mutex_unlock(&st->lock);
370 static int ad5592r_read_raw(struct iio_dev *iio_dev,
371 struct iio_chan_spec const *chan,
372 int *val, int *val2, long m)
374 struct ad5592r_state *st = iio_priv(iio_dev);
379 case IIO_CHAN_INFO_RAW:
381 mutex_lock(&st->lock);
382 ret = st->ops->read_adc(st, chan->channel, &read_val);
383 mutex_unlock(&st->lock);
387 if ((read_val >> 12 & 0x7) != (chan->channel & 0x7)) {
388 dev_err(st->dev, "Error while reading channel %u\n",
393 read_val &= GENMASK(11, 0);
396 mutex_lock(&st->lock);
397 read_val = st->cached_dac[chan->channel];
398 mutex_unlock(&st->lock);
401 dev_dbg(st->dev, "Channel %u read: 0x%04hX\n",
402 chan->channel, read_val);
404 *val = (int) read_val;
406 case IIO_CHAN_INFO_SCALE:
407 *val = ad5592r_get_vref(st);
409 if (chan->type == IIO_TEMP) {
410 s64 tmp = *val * (3767897513LL / 25LL);
411 *val = div_s64_rem(tmp, 1000000000LL, val2);
413 return IIO_VAL_INT_PLUS_MICRO;
416 mutex_lock(&st->lock);
419 mult = !!(st->cached_gp_ctrl &
420 AD5592R_REG_CTRL_DAC_RANGE);
422 mult = !!(st->cached_gp_ctrl &
423 AD5592R_REG_CTRL_ADC_RANGE);
425 mutex_unlock(&st->lock);
429 *val2 = chan->scan_type.realbits;
431 return IIO_VAL_FRACTIONAL_LOG2;
432 case IIO_CHAN_INFO_OFFSET:
433 ret = ad5592r_get_vref(st);
435 mutex_lock(&st->lock);
437 if (st->cached_gp_ctrl & AD5592R_REG_CTRL_ADC_RANGE)
438 *val = (-34365 * 25) / ret;
440 *val = (-75365 * 25) / ret;
442 mutex_unlock(&st->lock);
450 static int ad5592r_write_raw_get_fmt(struct iio_dev *indio_dev,
451 struct iio_chan_spec const *chan, long mask)
454 case IIO_CHAN_INFO_SCALE:
455 return IIO_VAL_INT_PLUS_NANO;
458 return IIO_VAL_INT_PLUS_MICRO;
464 static const struct iio_info ad5592r_info = {
465 .read_raw = ad5592r_read_raw,
466 .write_raw = ad5592r_write_raw,
467 .write_raw_get_fmt = ad5592r_write_raw_get_fmt,
470 static ssize_t ad5592r_show_scale_available(struct iio_dev *iio_dev,
472 const struct iio_chan_spec *chan,
475 struct ad5592r_state *st = iio_priv(iio_dev);
477 return sprintf(buf, "%d.%09u %d.%09u\n",
478 st->scale_avail[0][0], st->scale_avail[0][1],
479 st->scale_avail[1][0], st->scale_avail[1][1]);
482 static const struct iio_chan_spec_ext_info ad5592r_ext_info[] = {
484 .name = "scale_available",
485 .read = ad5592r_show_scale_available,
486 .shared = IIO_SHARED_BY_TYPE,
491 static void ad5592r_setup_channel(struct iio_dev *iio_dev,
492 struct iio_chan_spec *chan, bool output, unsigned id)
494 chan->type = IIO_VOLTAGE;
496 chan->output = output;
498 chan->info_mask_separate = BIT(IIO_CHAN_INFO_RAW);
499 chan->info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE);
500 chan->scan_type.sign = 'u';
501 chan->scan_type.realbits = 12;
502 chan->scan_type.storagebits = 16;
503 chan->ext_info = ad5592r_ext_info;
506 static int ad5592r_alloc_channels(struct iio_dev *iio_dev)
508 struct ad5592r_state *st = iio_priv(iio_dev);
509 unsigned i, curr_channel = 0,
510 num_channels = st->num_channels;
511 struct iio_chan_spec *channels;
512 struct fwnode_handle *child;
516 device_for_each_child_node(st->dev, child) {
517 ret = fwnode_property_read_u32(child, "reg", ®);
518 if (ret || reg >= ARRAY_SIZE(st->channel_modes))
521 ret = fwnode_property_read_u32(child, "adi,mode", &tmp);
523 st->channel_modes[reg] = tmp;
525 ret = fwnode_property_read_u32(child, "adi,off-state", &tmp);
527 st->channel_offstate[reg] = tmp;
530 channels = devm_kcalloc(st->dev,
531 1 + 2 * num_channels, sizeof(*channels),
536 for (i = 0; i < num_channels; i++) {
537 switch (st->channel_modes[i]) {
539 ad5592r_setup_channel(iio_dev, &channels[curr_channel],
545 ad5592r_setup_channel(iio_dev, &channels[curr_channel],
550 case CH_MODE_DAC_AND_ADC:
551 ad5592r_setup_channel(iio_dev, &channels[curr_channel],
554 ad5592r_setup_channel(iio_dev, &channels[curr_channel],
564 channels[curr_channel].type = IIO_TEMP;
565 channels[curr_channel].channel = 8;
566 channels[curr_channel].info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
567 BIT(IIO_CHAN_INFO_SCALE) |
568 BIT(IIO_CHAN_INFO_OFFSET);
571 iio_dev->num_channels = curr_channel;
572 iio_dev->channels = channels;
577 static void ad5592r_init_scales(struct ad5592r_state *st, int vref_mV)
579 s64 tmp = (s64)vref_mV * 1000000000LL >> 12;
581 st->scale_avail[0][0] =
582 div_s64_rem(tmp, 1000000000LL, &st->scale_avail[0][1]);
583 st->scale_avail[1][0] =
584 div_s64_rem(tmp * 2, 1000000000LL, &st->scale_avail[1][1]);
587 int ad5592r_probe(struct device *dev, const char *name,
588 const struct ad5592r_rw_ops *ops)
590 struct iio_dev *iio_dev;
591 struct ad5592r_state *st;
594 iio_dev = devm_iio_device_alloc(dev, sizeof(*st));
598 st = iio_priv(iio_dev);
601 st->num_channels = 8;
602 dev_set_drvdata(dev, iio_dev);
604 st->reg = devm_regulator_get_optional(dev, "vref");
605 if (IS_ERR(st->reg)) {
606 if ((PTR_ERR(st->reg) != -ENODEV) && dev->of_node)
607 return PTR_ERR(st->reg);
611 ret = regulator_enable(st->reg);
616 iio_dev->name = name;
617 iio_dev->info = &ad5592r_info;
618 iio_dev->modes = INDIO_DIRECT_MODE;
620 mutex_init(&st->lock);
622 ad5592r_init_scales(st, ad5592r_get_vref(st));
624 ret = ad5592r_reset(st);
626 goto error_disable_reg;
628 ret = ops->reg_write(st, AD5592R_REG_PD,
629 (st->reg == NULL) ? AD5592R_REG_PD_EN_REF : 0);
631 goto error_disable_reg;
633 ret = ad5592r_alloc_channels(iio_dev);
635 goto error_disable_reg;
637 ret = ad5592r_set_channel_modes(st);
639 goto error_reset_ch_modes;
641 ret = iio_device_register(iio_dev);
643 goto error_reset_ch_modes;
645 ret = ad5592r_gpio_init(st);
647 goto error_dev_unregister;
651 error_dev_unregister:
652 iio_device_unregister(iio_dev);
654 error_reset_ch_modes:
655 ad5592r_reset_channel_modes(st);
659 regulator_disable(st->reg);
663 EXPORT_SYMBOL_NS_GPL(ad5592r_probe, IIO_AD5592R);
665 void ad5592r_remove(struct device *dev)
667 struct iio_dev *iio_dev = dev_get_drvdata(dev);
668 struct ad5592r_state *st = iio_priv(iio_dev);
670 iio_device_unregister(iio_dev);
671 ad5592r_reset_channel_modes(st);
672 ad5592r_gpio_cleanup(st);
675 regulator_disable(st->reg);
677 EXPORT_SYMBOL_NS_GPL(ad5592r_remove, IIO_AD5592R);
679 MODULE_AUTHOR("Paul Cercueil <paul.cercueil@analog.com>");
680 MODULE_DESCRIPTION("Analog Devices AD5592R multi-channel converters");
681 MODULE_LICENSE("GPL v2");