drivers/iio/adc/ad7280a.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * AD7280A Lithium Ion Battery Monitoring System
   4  *
   5  * Copyright 2011 Analog Devices Inc.
   6  */
   7
   8 #include <linux/bitfield.h>
   9 #include <linux/bits.h>
  10 #include <linux/crc8.h>
  11 #include <linux/delay.h>
  12 #include <linux/device.h>
  13 #include <linux/err.h>
  14 #include <linux/interrupt.h>
  15 #include <linux/kernel.h>
  16 #include <linux/module.h>
  17 #include <linux/mod_devicetable.h>
  18 #include <linux/mutex.h>
  19 #include <linux/slab.h>
  20 #include <linux/sysfs.h>
  21 #include <linux/spi/spi.h>
  22
  23 #include <linux/iio/events.h>
  24 #include <linux/iio/iio.h>
  25
  26 /* Registers */
  27
  28 #define AD7280A_CELL_VOLTAGE_1_REG              0x0  /* D11 to D0, Read only */
  29 #define AD7280A_CELL_VOLTAGE_2_REG              0x1  /* D11 to D0, Read only */
  30 #define AD7280A_CELL_VOLTAGE_3_REG              0x2  /* D11 to D0, Read only */
  31 #define AD7280A_CELL_VOLTAGE_4_REG              0x3  /* D11 to D0, Read only */
  32 #define AD7280A_CELL_VOLTAGE_5_REG              0x4  /* D11 to D0, Read only */
  33 #define AD7280A_CELL_VOLTAGE_6_REG              0x5  /* D11 to D0, Read only */
  34 #define AD7280A_AUX_ADC_1_REG                   0x6  /* D11 to D0, Read only */
  35 #define AD7280A_AUX_ADC_2_REG                   0x7  /* D11 to D0, Read only */
  36 #define AD7280A_AUX_ADC_3_REG                   0x8  /* D11 to D0, Read only */
  37 #define AD7280A_AUX_ADC_4_REG                   0x9  /* D11 to D0, Read only */
  38 #define AD7280A_AUX_ADC_5_REG                   0xA  /* D11 to D0, Read only */
  39 #define AD7280A_AUX_ADC_6_REG                   0xB  /* D11 to D0, Read only */
  40 #define AD7280A_SELF_TEST_REG                   0xC  /* D11 to D0, Read only */
  41
  42 #define AD7280A_CTRL_HB_REG                     0xD  /* D15 to D8, Read/write */
  43 #define   AD7280A_CTRL_HB_CONV_INPUT_MSK                GENMASK(7, 6)
  44 #define     AD7280A_CTRL_HB_CONV_INPUT_ALL                      0
  45 #define     AD7280A_CTRL_HB_CONV_INPUT_6CELL_AUX1_3_5           1
  46 #define     AD7280A_CTRL_HB_CONV_INPUT_6CELL                    2
  47 #define     AD7280A_CTRL_HB_CONV_INPUT_SELF_TEST                3
  48 #define   AD7280A_CTRL_HB_CONV_RREAD_MSK                GENMASK(5, 4)
  49 #define     AD7280A_CTRL_HB_CONV_RREAD_ALL                      0
  50 #define     AD7280A_CTRL_HB_CONV_RREAD_6CELL_AUX1_3_5           1
  51 #define     AD7280A_CTRL_HB_CONV_RREAD_6CELL                    2
  52 #define     AD7280A_CTRL_HB_CONV_RREAD_NO                       3
  53 #define   AD7280A_CTRL_HB_CONV_START_MSK                BIT(3)
  54 #define     AD7280A_CTRL_HB_CONV_START_CNVST                    0
  55 #define     AD7280A_CTRL_HB_CONV_START_CS                       1
  56 #define   AD7280A_CTRL_HB_CONV_AVG_MSK                  GENMASK(2, 1)
  57 #define     AD7280A_CTRL_HB_CONV_AVG_DIS                        0
  58 #define     AD7280A_CTRL_HB_CONV_AVG_2                          1
  59 #define     AD7280A_CTRL_HB_CONV_AVG_4                          2
  60 #define     AD7280A_CTRL_HB_CONV_AVG_8                          3
  61 #define   AD7280A_CTRL_HB_PWRDN_SW                      BIT(0)
  62
  63 #define AD7280A_CTRL_LB_REG                     0xE  /* D7 to D0, Read/write */
  64 #define   AD7280A_CTRL_LB_SWRST_MSK                     BIT(7)
  65 #define   AD7280A_CTRL_LB_ACQ_TIME_MSK                  GENMASK(6, 5)
  66 #define     AD7280A_CTRL_LB_ACQ_TIME_400ns                      0
  67 #define     AD7280A_CTRL_LB_ACQ_TIME_800ns                      1
  68 #define     AD7280A_CTRL_LB_ACQ_TIME_1200ns                     2
  69 #define     AD7280A_CTRL_LB_ACQ_TIME_1600ns                     3
  70 #define   AD7280A_CTRL_LB_MUST_SET                      BIT(4)
  71 #define   AD7280A_CTRL_LB_THERMISTOR_MSK                BIT(3)
  72 #define   AD7280A_CTRL_LB_LOCK_DEV_ADDR_MSK             BIT(2)
  73 #define   AD7280A_CTRL_LB_INC_DEV_ADDR_MSK              BIT(1)
  74 #define   AD7280A_CTRL_LB_DAISY_CHAIN_RB_MSK            BIT(0)
  75
  76 #define AD7280A_CELL_OVERVOLTAGE_REG            0xF  /* D7 to D0, Read/write */
  77 #define AD7280A_CELL_UNDERVOLTAGE_REG           0x10 /* D7 to D0, Read/write */
  78 #define AD7280A_AUX_ADC_OVERVOLTAGE_REG         0x11 /* D7 to D0, Read/write */
  79 #define AD7280A_AUX_ADC_UNDERVOLTAGE_REG        0x12 /* D7 to D0, Read/write */
  80
  81 #define AD7280A_ALERT_REG                       0x13 /* D7 to D0, Read/write */
  82 #define   AD7280A_ALERT_REMOVE_MSK                      GENMASK(3, 0)
  83 #define     AD7280A_ALERT_REMOVE_AUX5                   BIT(0)
  84 #define     AD7280A_ALERT_REMOVE_AUX3_AUX5              BIT(1)
  85 #define     AD7280A_ALERT_REMOVE_VIN5                   BIT(2)
  86 #define     AD7280A_ALERT_REMOVE_VIN4_VIN5              BIT(3)
  87 #define   AD7280A_ALERT_GEN_STATIC_HIGH                 BIT(6)
  88 #define   AD7280A_ALERT_RELAY_SIG_CHAIN_DOWN            (BIT(7) | BIT(6))
  89
  90 #define AD7280A_CELL_BALANCE_REG                0x14 /* D7 to D0, Read/write */
  91 #define  AD7280A_CELL_BALANCE_CHAN_BITMAP_MSK           GENMASK(7, 2)
  92 #define AD7280A_CB1_TIMER_REG                   0x15 /* D7 to D0, Read/write */
  93 #define  AD7280A_CB_TIMER_VAL_MSK                       GENMASK(7, 3)
  94 #define AD7280A_CB2_TIMER_REG                   0x16 /* D7 to D0, Read/write */
  95 #define AD7280A_CB3_TIMER_REG                   0x17 /* D7 to D0, Read/write */
  96 #define AD7280A_CB4_TIMER_REG                   0x18 /* D7 to D0, Read/write */
  97 #define AD7280A_CB5_TIMER_REG                   0x19 /* D7 to D0, Read/write */
  98 #define AD7280A_CB6_TIMER_REG                   0x1A /* D7 to D0, Read/write */
  99 #define AD7280A_PD_TIMER_REG                    0x1B /* D7 to D0, Read/write */
 100 #define AD7280A_READ_REG                        0x1C /* D7 to D0, Read/write */
 101 #define   AD7280A_READ_ADDR_MSK                         GENMASK(7, 2)
 102 #define AD7280A_CNVST_CTRL_REG                  0x1D /* D7 to D0, Read/write */
 103
 104 /* Transfer fields */
 105 #define AD7280A_TRANS_WRITE_DEVADDR_MSK         GENMASK(31, 27)
 106 #define AD7280A_TRANS_WRITE_ADDR_MSK            GENMASK(26, 21)
 107 #define AD7280A_TRANS_WRITE_VAL_MSK             GENMASK(20, 13)
 108 #define AD7280A_TRANS_WRITE_ALL_MSK             BIT(12)
 109 #define AD7280A_TRANS_WRITE_CRC_MSK             GENMASK(10, 3)
 110 #define AD7280A_TRANS_WRITE_RES_PATTERN         0x2
 111
 112 /* Layouts differ for channel vs other registers */
 113 #define AD7280A_TRANS_READ_DEVADDR_MSK          GENMASK(31, 27)
 114 #define AD7280A_TRANS_READ_CONV_CHANADDR_MSK    GENMASK(26, 23)
 115 #define AD7280A_TRANS_READ_CONV_DATA_MSK        GENMASK(22, 11)
 116 #define AD7280A_TRANS_READ_REG_REGADDR_MSK      GENMASK(26, 21)
 117 #define AD7280A_TRANS_READ_REG_DATA_MSK         GENMASK(20, 13)
 118 #define AD7280A_TRANS_READ_WRITE_ACK_MSK        BIT(10)
 119 #define AD7280A_TRANS_READ_CRC_MSK              GENMASK(9, 2)
 120
 121 /* Magic value used to indicate this special case */
 122 #define AD7280A_ALL_CELLS                               (0xAD << 16)
 123
 124 #define AD7280A_MAX_SPI_CLK_HZ          700000 /* < 1MHz */
 125 #define AD7280A_MAX_CHAIN               8
 126 #define AD7280A_CELLS_PER_DEV           6
 127 #define AD7280A_BITS                    12
 128 #define AD7280A_NUM_CH                  (AD7280A_AUX_ADC_6_REG - \
 129                                         AD7280A_CELL_VOLTAGE_1_REG + 1)
 130
 131 #define AD7280A_CALC_VOLTAGE_CHAN_NUM(d, c) (((d) * AD7280A_CELLS_PER_DEV) + \
 132                                              (c))
 133 #define AD7280A_CALC_TEMP_CHAN_NUM(d, c)    (((d) * AD7280A_CELLS_PER_DEV) + \
 134                                              (c) - AD7280A_CELLS_PER_DEV)
 135
 136 #define AD7280A_DEVADDR_MASTER          0
 137 #define AD7280A_DEVADDR_ALL             0x1F
 138
 139 static const unsigned short ad7280a_n_avg[4] = {1, 2, 4, 8};
 140 static const unsigned short ad7280a_t_acq_ns[4] = {470, 1030, 1510, 1945};
 141
 142 /* 5-bit device address is sent LSB first */
 143 static unsigned int ad7280a_devaddr(unsigned int addr)
 144 {
 145         return ((addr & 0x1) << 4) |
 146                ((addr & 0x2) << 2) |
 147                (addr & 0x4) |
 148                ((addr & 0x8) >> 2) |
 149                ((addr & 0x10) >> 4);
 150 }
 151
 152 /*
 153  * During a read a valid write is mandatory.
 154  * So writing to the highest available address (Address 0x1F) and setting the
 155  * address all parts bit to 0 is recommended.
 156  * So the TXVAL is AD7280A_DEVADDR_ALL + CRC
 157  */
 158 #define AD7280A_READ_TXVAL      0xF800030A
 159
 160 /*
 161  * AD7280 CRC
 162  *
 163  * P(x) = x^8 + x^5 + x^3 + x^2 + x^1 + x^0 = 0b100101111 => 0x2F
 164  */
 165 #define POLYNOM         0x2F
 166
 167 struct ad7280_state {
 168         struct spi_device               *spi;
 169         struct iio_chan_spec            *channels;
 170         unsigned int                    chain_last_alert_ignore;
 171         bool                            thermistor_term_en;
 172         int                             slave_num;
 173         int                             scan_cnt;
 174         int                             readback_delay_us;
 175         unsigned char                   crc_tab[CRC8_TABLE_SIZE];
 176         u8                              oversampling_ratio;
 177         u8                              acquisition_time;
 178         unsigned char                   ctrl_lb;
 179         unsigned char                   cell_threshhigh;
 180         unsigned char                   cell_threshlow;
 181         unsigned char                   aux_threshhigh;
 182         unsigned char                   aux_threshlow;
 183         unsigned char                   cb_mask[AD7280A_MAX_CHAIN];
 184         struct mutex                    lock; /* protect sensor state */
 185
 186         __be32                          tx ____cacheline_aligned;
 187         __be32                          rx;
 188 };
 189
 190 static unsigned char ad7280_calc_crc8(unsigned char *crc_tab, unsigned int val)
 191 {
 192         unsigned char crc;
 193
 194         crc = crc_tab[val >> 16 & 0xFF];
 195         crc = crc_tab[crc ^ (val >> 8 & 0xFF)];
 196
 197         return crc ^ (val & 0xFF);
 198 }
 199
 200 static int ad7280_check_crc(struct ad7280_state *st, unsigned int val)
 201 {
 202         unsigned char crc = ad7280_calc_crc8(st->crc_tab, val >> 10);
 203
 204         if (crc != ((val >> 2) & 0xFF))
 205                 return -EIO;
 206
 207         return 0;
 208 }
 209
 210 /*
 211  * After initiating a conversion sequence we need to wait until the conversion
 212  * is done. The delay is typically in the range of 15..30us however depending on
 213  * the number of devices in the daisy chain, the number of averages taken,
 214  * conversion delays and acquisition time options it may take up to 250us, in
 215  * this case we better sleep instead of busy wait.
 216  */
 217
 218 static void ad7280_delay(struct ad7280_state *st)
 219 {
 220         if (st->readback_delay_us < 50)
 221                 udelay(st->readback_delay_us);
 222         else
 223                 usleep_range(250, 500);
 224 }
 225
 226 static int __ad7280_read32(struct ad7280_state *st, unsigned int *val)
 227 {
 228         int ret;
 229         struct spi_transfer t = {
 230                 .tx_buf = &st->tx,
 231                 .rx_buf = &st->rx,
 232                 .len = sizeof(st->tx),
 233         };
 234
 235         st->tx = cpu_to_be32(AD7280A_READ_TXVAL);
 236
 237         ret = spi_sync_transfer(st->spi, &t, 1);
 238         if (ret)
 239                 return ret;
 240
 241         *val = be32_to_cpu(st->rx);
 242
 243         return 0;
 244 }
 245
 246 static int ad7280_write(struct ad7280_state *st, unsigned int devaddr,
 247                         unsigned int addr, bool all, unsigned int val)
 248 {
 249         unsigned int reg = FIELD_PREP(AD7280A_TRANS_WRITE_DEVADDR_MSK, devaddr) |
 250                 FIELD_PREP(AD7280A_TRANS_WRITE_ADDR_MSK, addr) |
 251                 FIELD_PREP(AD7280A_TRANS_WRITE_VAL_MSK, val) |
 252                 FIELD_PREP(AD7280A_TRANS_WRITE_ALL_MSK, all);
 253
 254         reg |= FIELD_PREP(AD7280A_TRANS_WRITE_CRC_MSK,
 255                         ad7280_calc_crc8(st->crc_tab, reg >> 11));
 256         /* Reserved b010 pattern not included crc calc */
 257         reg |= AD7280A_TRANS_WRITE_RES_PATTERN;
 258
 259         st->tx = cpu_to_be32(reg);
 260
 261         return spi_write(st->spi, &st->tx, sizeof(st->tx));
 262 }
 263
 264 static int ad7280_read_reg(struct ad7280_state *st, unsigned int devaddr,
 265                            unsigned int addr)
 266 {
 267         int ret;
 268         unsigned int tmp;
 269
 270         /* turns off the read operation on all parts */
 271         ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CTRL_HB_REG, 1,
 272                            FIELD_PREP(AD7280A_CTRL_HB_CONV_INPUT_MSK,
 273                                       AD7280A_CTRL_HB_CONV_INPUT_ALL) |
 274                            FIELD_PREP(AD7280A_CTRL_HB_CONV_RREAD_MSK,
 275                                       AD7280A_CTRL_HB_CONV_RREAD_NO) |
 276                            FIELD_PREP(AD7280A_CTRL_HB_CONV_AVG_MSK,
 277                                       st->oversampling_ratio));
 278         if (ret)
 279                 return ret;
 280
 281         /* turns on the read operation on the addressed part */
 282         ret = ad7280_write(st, devaddr, AD7280A_CTRL_HB_REG, 0,
 283                            FIELD_PREP(AD7280A_CTRL_HB_CONV_INPUT_MSK,
 284                                       AD7280A_CTRL_HB_CONV_INPUT_ALL) |
 285                            FIELD_PREP(AD7280A_CTRL_HB_CONV_RREAD_MSK,
 286                                       AD7280A_CTRL_HB_CONV_RREAD_ALL) |
 287                            FIELD_PREP(AD7280A_CTRL_HB_CONV_AVG_MSK,
 288                                       st->oversampling_ratio));
 289         if (ret)
 290                 return ret;
 291
 292         /* Set register address on the part to be read from */
 293         ret = ad7280_write(st, devaddr, AD7280A_READ_REG, 0,
 294                            FIELD_PREP(AD7280A_READ_ADDR_MSK, addr));
 295         if (ret)
 296                 return ret;
 297
 298         ret = __ad7280_read32(st, &tmp);
 299         if (ret)
 300                 return ret;
 301
 302         if (ad7280_check_crc(st, tmp))
 303                 return -EIO;
 304
 305         if ((FIELD_GET(AD7280A_TRANS_READ_DEVADDR_MSK, tmp) != devaddr) ||
 306             (FIELD_GET(AD7280A_TRANS_READ_REG_REGADDR_MSK, tmp) != addr))
 307                 return -EFAULT;
 308
 309         return FIELD_GET(AD7280A_TRANS_READ_REG_DATA_MSK, tmp);
 310 }
 311
 312 static int ad7280_read_channel(struct ad7280_state *st, unsigned int devaddr,
 313                                unsigned int addr)
 314 {
 315         int ret;
 316         unsigned int tmp;
 317
 318         ret = ad7280_write(st, devaddr, AD7280A_READ_REG, 0,
 319                            FIELD_PREP(AD7280A_READ_ADDR_MSK, addr));
 320         if (ret)
 321                 return ret;
 322
 323         ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CTRL_HB_REG, 1,
 324                            FIELD_PREP(AD7280A_CTRL_HB_CONV_INPUT_MSK,
 325                                       AD7280A_CTRL_HB_CONV_INPUT_ALL) |
 326                            FIELD_PREP(AD7280A_CTRL_HB_CONV_RREAD_MSK,
 327                                       AD7280A_CTRL_HB_CONV_RREAD_NO) |
 328                            FIELD_PREP(AD7280A_CTRL_HB_CONV_AVG_MSK,
 329                                       st->oversampling_ratio));
 330         if (ret)
 331                 return ret;
 332
 333         ret = ad7280_write(st, devaddr, AD7280A_CTRL_HB_REG, 0,
 334                            FIELD_PREP(AD7280A_CTRL_HB_CONV_INPUT_MSK,
 335                                       AD7280A_CTRL_HB_CONV_INPUT_ALL) |
 336                            FIELD_PREP(AD7280A_CTRL_HB_CONV_RREAD_MSK,
 337                                       AD7280A_CTRL_HB_CONV_RREAD_ALL) |
 338                            FIELD_PREP(AD7280A_CTRL_HB_CONV_START_MSK,
 339                                       AD7280A_CTRL_HB_CONV_START_CS) |
 340                            FIELD_PREP(AD7280A_CTRL_HB_CONV_AVG_MSK,
 341                                       st->oversampling_ratio));
 342         if (ret)
 343                 return ret;
 344
 345         ad7280_delay(st);
 346
 347         ret = __ad7280_read32(st, &tmp);
 348         if (ret)
 349                 return ret;
 350
 351         if (ad7280_check_crc(st, tmp))
 352                 return -EIO;
 353
 354         if ((FIELD_GET(AD7280A_TRANS_READ_DEVADDR_MSK, tmp) != devaddr) ||
 355             (FIELD_GET(AD7280A_TRANS_READ_CONV_CHANADDR_MSK, tmp) != addr))
 356                 return -EFAULT;
 357
 358         return FIELD_GET(AD7280A_TRANS_READ_CONV_DATA_MSK, tmp);
 359 }
 360
 361 static int ad7280_read_all_channels(struct ad7280_state *st, unsigned int cnt,
 362                                     unsigned int *array)
 363 {
 364         int i, ret;
 365         unsigned int tmp, sum = 0;
 366
 367         ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_READ_REG, 1,
 368                            AD7280A_CELL_VOLTAGE_1_REG << 2);
 369         if (ret)
 370                 return ret;
 371
 372         ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CTRL_HB_REG, 1,
 373                            FIELD_PREP(AD7280A_CTRL_HB_CONV_INPUT_MSK,
 374                                       AD7280A_CTRL_HB_CONV_INPUT_ALL) |
 375                            FIELD_PREP(AD7280A_CTRL_HB_CONV_RREAD_MSK,
 376                                       AD7280A_CTRL_HB_CONV_RREAD_ALL) |
 377                            FIELD_PREP(AD7280A_CTRL_HB_CONV_START_MSK,
 378                                       AD7280A_CTRL_HB_CONV_START_CS) |
 379                            FIELD_PREP(AD7280A_CTRL_HB_CONV_AVG_MSK,
 380                                       st->oversampling_ratio));
 381         if (ret)
 382                 return ret;
 383
 384         ad7280_delay(st);
 385
 386         for (i = 0; i < cnt; i++) {
 387                 ret = __ad7280_read32(st, &tmp);
 388                 if (ret)
 389                         return ret;
 390
 391                 if (ad7280_check_crc(st, tmp))
 392                         return -EIO;
 393
 394                 if (array)
 395                         array[i] = tmp;
 396                 /* only sum cell voltages */
 397                 if (FIELD_GET(AD7280A_TRANS_READ_CONV_CHANADDR_MSK, tmp) <=
 398                     AD7280A_CELL_VOLTAGE_6_REG)
 399                         sum += FIELD_GET(AD7280A_TRANS_READ_CONV_DATA_MSK, tmp);
 400         }
 401
 402         return sum;
 403 }
 404
 405 static void ad7280_sw_power_down(void *data)
 406 {
 407         struct ad7280_state *st = data;
 408
 409         ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CTRL_HB_REG, 1,
 410                      AD7280A_CTRL_HB_PWRDN_SW |
 411                      FIELD_PREP(AD7280A_CTRL_HB_CONV_AVG_MSK, st->oversampling_ratio));
 412 }
 413
 414 static int ad7280_chain_setup(struct ad7280_state *st)
 415 {
 416         unsigned int val, n;
 417         int ret;
 418
 419         ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CTRL_LB_REG, 1,
 420                            FIELD_PREP(AD7280A_CTRL_LB_DAISY_CHAIN_RB_MSK, 1) |
 421                            FIELD_PREP(AD7280A_CTRL_LB_LOCK_DEV_ADDR_MSK, 1) |
 422                            AD7280A_CTRL_LB_MUST_SET |
 423                            FIELD_PREP(AD7280A_CTRL_LB_SWRST_MSK, 1) |
 424                            st->ctrl_lb);
 425         if (ret)
 426                 return ret;
 427
 428         ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CTRL_LB_REG, 1,
 429                            FIELD_PREP(AD7280A_CTRL_LB_DAISY_CHAIN_RB_MSK, 1) |
 430                            FIELD_PREP(AD7280A_CTRL_LB_LOCK_DEV_ADDR_MSK, 1) |
 431                            AD7280A_CTRL_LB_MUST_SET |
 432                            FIELD_PREP(AD7280A_CTRL_LB_SWRST_MSK, 0) |
 433                            st->ctrl_lb);
 434         if (ret)
 435                 goto error_power_down;
 436
 437         ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_READ_REG, 1,
 438                            FIELD_PREP(AD7280A_READ_ADDR_MSK, AD7280A_CTRL_LB_REG));
 439         if (ret)
 440                 goto error_power_down;
 441
 442         for (n = 0; n <= AD7280A_MAX_CHAIN; n++) {
 443                 ret = __ad7280_read32(st, &val);
 444                 if (ret)
 445                         goto error_power_down;
 446
 447                 if (val == 0)
 448                         return n - 1;
 449
 450                 if (ad7280_check_crc(st, val)) {
 451                         ret = -EIO;
 452                         goto error_power_down;
 453                 }
 454
 455                 if (n != ad7280a_devaddr(FIELD_GET(AD7280A_TRANS_READ_DEVADDR_MSK, val))) {
 456                         ret = -EIO;
 457                         goto error_power_down;
 458                 }
 459         }
 460         ret = -EFAULT;
 461
 462 error_power_down:
 463         ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CTRL_HB_REG, 1,
 464                      AD7280A_CTRL_HB_PWRDN_SW |
 465                      FIELD_PREP(AD7280A_CTRL_HB_CONV_AVG_MSK, st->oversampling_ratio));
 466
 467         return ret;
 468 }
 469
 470 static ssize_t ad7280_show_balance_sw(struct iio_dev *indio_dev,
 471                                       uintptr_t private,
 472                                       const struct iio_chan_spec *chan, char *buf)
 473 {
 474         struct ad7280_state *st = iio_priv(indio_dev);
 475
 476         return sysfs_emit(buf, "%d\n",
 477                           !!(st->cb_mask[chan->address >> 8] &
 478                              BIT(chan->address & 0xFF)));
 479 }
 480
 481 static ssize_t ad7280_store_balance_sw(struct iio_dev *indio_dev,
 482                                        uintptr_t private,
 483                                        const struct iio_chan_spec *chan,
 484                                        const char *buf, size_t len)
 485 {
 486         struct ad7280_state *st = iio_priv(indio_dev);
 487         unsigned int devaddr, ch;
 488         bool readin;
 489         int ret;
 490
 491         ret = strtobool(buf, &readin);
 492         if (ret)
 493                 return ret;
 494
 495         devaddr = chan->address >> 8;
 496         ch = chan->address & 0xFF;
 497
 498         mutex_lock(&st->lock);
 499         if (readin)
 500                 st->cb_mask[devaddr] |= BIT(ch);
 501         else
 502                 st->cb_mask[devaddr] &= ~BIT(ch);
 503
 504         ret = ad7280_write(st, devaddr, AD7280A_CELL_BALANCE_REG, 0,
 505                            FIELD_PREP(AD7280A_CELL_BALANCE_CHAN_BITMAP_MSK,
 506                                       st->cb_mask[devaddr]));
 507         mutex_unlock(&st->lock);
 508
 509         return ret ? ret : len;
 510 }
 511
 512 static ssize_t ad7280_show_balance_timer(struct iio_dev *indio_dev,
 513                                          uintptr_t private,
 514                                          const struct iio_chan_spec *chan,
 515                                          char *buf)
 516 {
 517         struct ad7280_state *st = iio_priv(indio_dev);
 518         unsigned int msecs;
 519         int ret;
 520
 521         mutex_lock(&st->lock);
 522         ret = ad7280_read_reg(st, chan->address >> 8,
 523                               (chan->address & 0xFF) + AD7280A_CB1_TIMER_REG);
 524         mutex_unlock(&st->lock);
 525
 526         if (ret < 0)
 527                 return ret;
 528
 529         msecs = FIELD_GET(AD7280A_CB_TIMER_VAL_MSK, ret) * 71500;
 530
 531         return sysfs_emit(buf, "%u.%u\n", msecs / 1000, msecs % 1000);
 532 }
 533
 534 static ssize_t ad7280_store_balance_timer(struct iio_dev *indio_dev,
 535                                           uintptr_t private,
 536                                           const struct iio_chan_spec *chan,
 537                                           const char *buf, size_t len)
 538 {
 539         struct ad7280_state *st = iio_priv(indio_dev);
 540         int val, val2;
 541         int ret;
 542
 543         ret = iio_str_to_fixpoint(buf, 1000, &val, &val2);
 544         if (ret)
 545                 return ret;
 546
 547         val = val * 1000 + val2;
 548         val /= 71500;
 549
 550         if (val > 31)
 551                 return -EINVAL;
 552
 553         mutex_lock(&st->lock);
 554         ret = ad7280_write(st, chan->address >> 8,
 555                            (chan->address & 0xFF) + AD7280A_CB1_TIMER_REG, 0,
 556                            FIELD_PREP(AD7280A_CB_TIMER_VAL_MSK, val));
 557         mutex_unlock(&st->lock);
 558
 559         return ret ? ret : len;
 560 }
 561
 562 static const struct iio_chan_spec_ext_info ad7280_cell_ext_info[] = {
 563         {
 564                 .name = "balance_switch_en",
 565                 .read = ad7280_show_balance_sw,
 566                 .write = ad7280_store_balance_sw,
 567                 .shared = IIO_SEPARATE,
 568         }, {
 569                 .name = "balance_switch_timer",
 570                 .read = ad7280_show_balance_timer,
 571                 .write = ad7280_store_balance_timer,
 572                 .shared = IIO_SEPARATE,
 573         },
 574         {}
 575 };
 576
 577 static const struct iio_event_spec ad7280_events[] = {
 578         {
 579                 .type = IIO_EV_TYPE_THRESH,
 580                 .dir = IIO_EV_DIR_RISING,
 581                 .mask_shared_by_type = BIT(IIO_EV_INFO_VALUE),
 582         }, {
 583                 .type = IIO_EV_TYPE_THRESH,
 584                 .dir = IIO_EV_DIR_FALLING,
 585                 .mask_shared_by_type = BIT(IIO_EV_INFO_VALUE),
 586         },
 587 };
 588
 589 static void ad7280_voltage_channel_init(struct iio_chan_spec *chan, int i,
 590                                         bool irq_present)
 591 {
 592         chan->type = IIO_VOLTAGE;
 593         chan->differential = 1;
 594         chan->channel = i;
 595         chan->channel2 = chan->channel + 1;
 596         if (irq_present) {
 597                 chan->event_spec = ad7280_events;
 598                 chan->num_event_specs = ARRAY_SIZE(ad7280_events);
 599         }
 600         chan->ext_info = ad7280_cell_ext_info;
 601 }
 602
 603 static void ad7280_temp_channel_init(struct iio_chan_spec *chan, int i,
 604                                      bool irq_present)
 605 {
 606         chan->type = IIO_TEMP;
 607         chan->channel = i;
 608         if (irq_present) {
 609                 chan->event_spec = ad7280_events;
 610                 chan->num_event_specs = ARRAY_SIZE(ad7280_events);
 611         }
 612 }
 613
 614 static void ad7280_common_fields_init(struct iio_chan_spec *chan, int addr,
 615                                       int cnt)
 616 {
 617         chan->indexed = 1;
 618         chan->info_mask_separate = BIT(IIO_CHAN_INFO_RAW);
 619         chan->info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE);
 620         chan->info_mask_shared_by_all = BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO);
 621         chan->address = addr;
 622         chan->scan_index = cnt;
 623         chan->scan_type.sign = 'u';
 624         chan->scan_type.realbits = 12;
 625         chan->scan_type.storagebits = 32;
 626 }
 627
 628 static void ad7280_total_voltage_channel_init(struct iio_chan_spec *chan,
 629                                               int cnt, int dev)
 630 {
 631         chan->type = IIO_VOLTAGE;
 632         chan->differential = 1;
 633         chan->channel = 0;
 634         chan->channel2 = dev * AD7280A_CELLS_PER_DEV;
 635         chan->address = AD7280A_ALL_CELLS;
 636         chan->indexed = 1;
 637         chan->info_mask_separate = BIT(IIO_CHAN_INFO_RAW);
 638         chan->info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE);
 639         chan->scan_index = cnt;
 640         chan->scan_type.sign = 'u';
 641         chan->scan_type.realbits = 32;
 642         chan->scan_type.storagebits = 32;
 643 }
 644
 645 static void ad7280_init_dev_channels(struct ad7280_state *st, int dev, int *cnt,
 646                                      bool irq_present)
 647 {
 648         int addr, ch, i;
 649         struct iio_chan_spec *chan;
 650
 651         for (ch = AD7280A_CELL_VOLTAGE_1_REG; ch <= AD7280A_AUX_ADC_6_REG; ch++) {
 652                 chan = &st->channels[*cnt];
 653
 654                 if (ch < AD7280A_AUX_ADC_1_REG) {
 655                         i = AD7280A_CALC_VOLTAGE_CHAN_NUM(dev, ch);
 656                         ad7280_voltage_channel_init(chan, i, irq_present);
 657                 } else {
 658                         i = AD7280A_CALC_TEMP_CHAN_NUM(dev, ch);
 659                         ad7280_temp_channel_init(chan, i, irq_present);
 660                 }
 661
 662                 addr = ad7280a_devaddr(dev) << 8 | ch;
 663                 ad7280_common_fields_init(chan, addr, *cnt);
 664
 665                 (*cnt)++;
 666         }
 667 }
 668
 669 static int ad7280_channel_init(struct ad7280_state *st, bool irq_present)
 670 {
 671         int dev, cnt = 0;
 672
 673         st->channels = devm_kcalloc(&st->spi->dev, (st->slave_num + 1) * 12 + 1,
 674                                     sizeof(*st->channels), GFP_KERNEL);
 675         if (!st->channels)
 676                 return -ENOMEM;
 677
 678         for (dev = 0; dev <= st->slave_num; dev++)
 679                 ad7280_init_dev_channels(st, dev, &cnt, irq_present);
 680
 681         ad7280_total_voltage_channel_init(&st->channels[cnt], cnt, dev);
 682
 683         return cnt + 1;
 684 }
 685
 686 static int ad7280a_read_thresh(struct iio_dev *indio_dev,
 687                                const struct iio_chan_spec *chan,
 688                                enum iio_event_type type,
 689                                enum iio_event_direction dir,
 690                                enum iio_event_info info, int *val, int *val2)
 691 {
 692         struct ad7280_state *st = iio_priv(indio_dev);
 693
 694         switch (chan->type) {
 695         case IIO_VOLTAGE:
 696                 switch (dir) {
 697                 case IIO_EV_DIR_RISING:
 698                         *val = 1000 + (st->cell_threshhigh * 1568L) / 100;
 699                         return IIO_VAL_INT;
 700                 case IIO_EV_DIR_FALLING:
 701                         *val = 1000 + (st->cell_threshlow * 1568L) / 100;
 702                         return IIO_VAL_INT;
 703                 default:
 704                         return -EINVAL;
 705                 }
 706                 break;
 707         case IIO_TEMP:
 708                 switch (dir) {
 709                 case IIO_EV_DIR_RISING:
 710                         *val = ((st->aux_threshhigh) * 196L) / 10;
 711                         return IIO_VAL_INT;
 712                 case IIO_EV_DIR_FALLING:
 713                         *val = (st->aux_threshlow * 196L) / 10;
 714                         return IIO_VAL_INT;
 715                 default:
 716                         return -EINVAL;
 717                 }
 718                 break;
 719         default:
 720                 return -EINVAL;
 721         }
 722 }
 723
 724 static int ad7280a_write_thresh(struct iio_dev *indio_dev,
 725                                 const struct iio_chan_spec *chan,
 726                                 enum iio_event_type type,
 727                                 enum iio_event_direction dir,
 728                                 enum iio_event_info info,
 729                                 int val, int val2)
 730 {
 731         struct ad7280_state *st = iio_priv(indio_dev);
 732         unsigned int addr;
 733         long value;
 734         int ret;
 735
 736         if (val2 != 0)
 737                 return -EINVAL;
 738
 739         mutex_lock(&st->lock);
 740         switch (chan->type) {
 741         case IIO_VOLTAGE:
 742                 value = ((val - 1000) * 100) / 1568; /* LSB 15.68mV */
 743                 value = clamp(value, 0L, 0xFFL);
 744                 switch (dir) {
 745                 case IIO_EV_DIR_RISING:
 746                         addr = AD7280A_CELL_OVERVOLTAGE_REG;
 747                         ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, addr,
 748                                            1, val);
 749                         if (ret)
 750                                 break;
 751                         st->cell_threshhigh = value;
 752                         break;
 753                 case IIO_EV_DIR_FALLING:
 754                         addr = AD7280A_CELL_UNDERVOLTAGE_REG;
 755                         ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, addr,
 756                                            1, val);
 757                         if (ret)
 758                                 break;
 759                         st->cell_threshlow = value;
 760                         break;
 761                 default:
 762                         ret = -EINVAL;
 763                         goto err_unlock;
 764                 }
 765                 break;
 766         case IIO_TEMP:
 767                 value = (val * 10) / 196; /* LSB 19.6mV */
 768                 value = clamp(value, 0L, 0xFFL);
 769                 switch (dir) {
 770                 case IIO_EV_DIR_RISING:
 771                         addr = AD7280A_AUX_ADC_OVERVOLTAGE_REG;
 772                         ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, addr,
 773                                            1, val);
 774                         if (ret)
 775                                 break;
 776                         st->aux_threshhigh = val;
 777                         break;
 778                 case IIO_EV_DIR_FALLING:
 779                         addr = AD7280A_AUX_ADC_UNDERVOLTAGE_REG;
 780                         ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, addr,
 781                                            1, val);
 782                         if (ret)
 783                                 break;
 784                         st->aux_threshlow = val;
 785                         break;
 786                 default:
 787                         ret = -EINVAL;
 788                         goto err_unlock;
 789                 }
 790                 break;
 791         default:
 792                 ret = -EINVAL;
 793                 goto err_unlock;
 794         }
 795
 796 err_unlock:
 797         mutex_unlock(&st->lock);
 798
 799         return ret;
 800 }
 801
 802 static irqreturn_t ad7280_event_handler(int irq, void *private)
 803 {
 804         struct iio_dev *indio_dev = private;
 805         struct ad7280_state *st = iio_priv(indio_dev);
 806         unsigned int *channels;
 807         int i, ret;
 808
 809         channels = kcalloc(st->scan_cnt, sizeof(*channels), GFP_KERNEL);
 810         if (!channels)
 811                 return IRQ_HANDLED;
 812
 813         ret = ad7280_read_all_channels(st, st->scan_cnt, channels);
 814         if (ret < 0)
 815                 goto out;
 816
 817         for (i = 0; i < st->scan_cnt; i++) {
 818                 unsigned int val;
 819
 820                 val = FIELD_GET(AD7280A_TRANS_READ_CONV_DATA_MSK, channels[i]);
 821                 if (FIELD_GET(AD7280A_TRANS_READ_CONV_CHANADDR_MSK, channels[i]) <=
 822                     AD7280A_CELL_VOLTAGE_6_REG) {
 823                         if (val >= st->cell_threshhigh) {
 824                                 u64 tmp = IIO_EVENT_CODE(IIO_VOLTAGE, 1, 0,
 825                                                          IIO_EV_DIR_RISING,
 826                                                          IIO_EV_TYPE_THRESH,
 827                                                          0, 0, 0);
 828                                 iio_push_event(indio_dev, tmp,
 829                                                iio_get_time_ns(indio_dev));
 830                         } else if (val <= st->cell_threshlow) {
 831                                 u64 tmp = IIO_EVENT_CODE(IIO_VOLTAGE, 1, 0,
 832                                                          IIO_EV_DIR_FALLING,
 833                                                          IIO_EV_TYPE_THRESH,
 834                                                          0, 0, 0);
 835                                 iio_push_event(indio_dev, tmp,
 836                                                iio_get_time_ns(indio_dev));
 837                         }
 838                 } else {
 839                         if (val >= st->aux_threshhigh) {
 840                                 u64 tmp = IIO_UNMOD_EVENT_CODE(IIO_TEMP, 0,
 841                                                         IIO_EV_TYPE_THRESH,
 842                                                         IIO_EV_DIR_RISING);
 843                                 iio_push_event(indio_dev, tmp,
 844                                                iio_get_time_ns(indio_dev));
 845                         } else if (val <= st->aux_threshlow) {
 846                                 u64 tmp = IIO_UNMOD_EVENT_CODE(IIO_TEMP, 0,
 847                                                         IIO_EV_TYPE_THRESH,
 848                                                         IIO_EV_DIR_FALLING);
 849                                 iio_push_event(indio_dev, tmp,
 850                                                iio_get_time_ns(indio_dev));
 851                         }
 852                 }
 853         }
 854
 855 out:
 856         kfree(channels);
 857
 858         return IRQ_HANDLED;
 859 }
 860
 861 static void ad7280_update_delay(struct ad7280_state *st)
 862 {
 863         /*
 864          * Total Conversion Time = ((tACQ + tCONV) *
 865          *                         (Number of Conversions per Part)) −
 866          *                         tACQ + ((N - 1) * tDELAY)
 867          *
 868          * Readback Delay = Total Conversion Time + tWAIT
 869          */
 870
 871         st->readback_delay_us =
 872                 ((ad7280a_t_acq_ns[st->acquisition_time & 0x3] + 720) *
 873                         (AD7280A_NUM_CH * ad7280a_n_avg[st->oversampling_ratio & 0x3])) -
 874                 ad7280a_t_acq_ns[st->acquisition_time & 0x3] + st->slave_num * 250;
 875
 876         /* Convert to usecs */
 877         st->readback_delay_us = DIV_ROUND_UP(st->readback_delay_us, 1000);
 878         st->readback_delay_us += 5; /* Add tWAIT */
 879 }
 880
 881 static int ad7280_read_raw(struct iio_dev *indio_dev,
 882                            struct iio_chan_spec const *chan,
 883                            int *val,
 884                            int *val2,
 885                            long m)
 886 {
 887         struct ad7280_state *st = iio_priv(indio_dev);
 888         int ret;
 889
 890         switch (m) {
 891         case IIO_CHAN_INFO_RAW:
 892                 mutex_lock(&st->lock);
 893                 if (chan->address == AD7280A_ALL_CELLS)
 894                         ret = ad7280_read_all_channels(st, st->scan_cnt, NULL);
 895                 else
 896                         ret = ad7280_read_channel(st, chan->address >> 8,
 897                                                   chan->address & 0xFF);
 898                 mutex_unlock(&st->lock);
 899
 900                 if (ret < 0)
 901                         return ret;
 902
 903                 *val = ret;
 904
 905                 return IIO_VAL_INT;
 906         case IIO_CHAN_INFO_SCALE:
 907                 if ((chan->address & 0xFF) <= AD7280A_CELL_VOLTAGE_6_REG)
 908                         *val = 4000;
 909                 else
 910                         *val = 5000;
 911
 912                 *val2 = AD7280A_BITS;
 913                 return IIO_VAL_FRACTIONAL_LOG2;
 914         case IIO_CHAN_INFO_OVERSAMPLING_RATIO:
 915                 *val = ad7280a_n_avg[st->oversampling_ratio];
 916                 return IIO_VAL_INT;
 917         }
 918         return -EINVAL;
 919 }
 920
 921 static int ad7280_write_raw(struct iio_dev *indio_dev,
 922                             struct iio_chan_spec const *chan,
 923                             int val, int val2, long mask)
 924 {
 925         struct ad7280_state *st = iio_priv(indio_dev);
 926         int i;
 927
 928         switch (mask) {
 929         case IIO_CHAN_INFO_OVERSAMPLING_RATIO:
 930                 if (val2 != 0)
 931                         return -EINVAL;
 932                 for (i = 0; i < ARRAY_SIZE(ad7280a_n_avg); i++) {
 933                         if (val == ad7280a_n_avg[i]) {
 934                                 st->oversampling_ratio = i;
 935                                 ad7280_update_delay(st);
 936                                 return 0;
 937                         }
 938                 }
 939                 return -EINVAL;
 940         default:
 941                 return -EINVAL;
 942         }
 943 }
 944
 945 static const struct iio_info ad7280_info = {
 946         .read_raw = ad7280_read_raw,
 947         .write_raw = ad7280_write_raw,
 948         .read_event_value = &ad7280a_read_thresh,
 949         .write_event_value = &ad7280a_write_thresh,
 950 };
 951
 952 static const struct iio_info ad7280_info_no_irq = {
 953         .read_raw = ad7280_read_raw,
 954         .write_raw = ad7280_write_raw,
 955 };
 956
 957 static int ad7280_probe(struct spi_device *spi)
 958 {
 959         struct device *dev = &spi->dev;
 960         struct ad7280_state *st;
 961         int ret;
 962         struct iio_dev *indio_dev;
 963
 964         indio_dev = devm_iio_device_alloc(dev, sizeof(*st));
 965         if (!indio_dev)
 966                 return -ENOMEM;
 967
 968         st = iio_priv(indio_dev);
 969         spi_set_drvdata(spi, indio_dev);
 970         st->spi = spi;
 971         mutex_init(&st->lock);
 972
 973         st->thermistor_term_en =
 974                 device_property_read_bool(dev, "adi,thermistor-termination");
 975
 976         if (device_property_present(dev, "adi,acquisition-time-ns")) {
 977                 u32 val;
 978
 979                 ret = device_property_read_u32(dev, "adi,acquisition-time-ns", &val);
 980                 if (ret)
 981                         return ret;
 982
 983                 switch (val) {
 984                 case 400:
 985                         st->acquisition_time = AD7280A_CTRL_LB_ACQ_TIME_400ns;
 986                         break;
 987                 case 800:
 988                         st->acquisition_time = AD7280A_CTRL_LB_ACQ_TIME_800ns;
 989                         break;
 990                 case 1200:
 991                         st->acquisition_time = AD7280A_CTRL_LB_ACQ_TIME_1200ns;
 992                         break;
 993                 case 1600:
 994                         st->acquisition_time = AD7280A_CTRL_LB_ACQ_TIME_1600ns;
 995                         break;
 996                 default:
 997                         dev_err(dev, "Firmware provided acquisition time is invalid\n");
 998                         return -EINVAL;
 999                 }
1000         } else {
1001                 st->acquisition_time = AD7280A_CTRL_LB_ACQ_TIME_400ns;
1002         }
1003
1004         /* Alert masks are intended for when particular inputs are not wired up */
1005         if (device_property_present(dev, "adi,voltage-alert-last-chan")) {
1006                 u32 val;
1007
1008                 ret = device_property_read_u32(dev, "adi,voltage-alert-last-chan", &val);
1009                 if (ret)
1010                         return ret;
1011
1012                 switch (val) {
1013                 case 3:
1014                         st->chain_last_alert_ignore |= AD7280A_ALERT_REMOVE_VIN4_VIN5;
1015                         break;
1016                 case 4:
1017                         st->chain_last_alert_ignore |= AD7280A_ALERT_REMOVE_VIN5;
1018                         break;
1019                 case 5:
1020                         break;
1021                 default:
1022                         dev_err(dev,
1023                                 "Firmware provided last voltage alert channel invalid\n");
1024                         break;
1025                 }
1026         }
1027         crc8_populate_msb(st->crc_tab, POLYNOM);
1028
1029         st->spi->max_speed_hz = AD7280A_MAX_SPI_CLK_HZ;
1030         st->spi->mode = SPI_MODE_1;
1031         spi_setup(st->spi);
1032
1033         st->ctrl_lb = FIELD_PREP(AD7280A_CTRL_LB_ACQ_TIME_MSK, st->acquisition_time) |
1034                 FIELD_PREP(AD7280A_CTRL_LB_THERMISTOR_MSK, st->thermistor_term_en);
1035         st->oversampling_ratio = 0; /* No oversampling */
1036
1037         ret = ad7280_chain_setup(st);
1038         if (ret < 0)
1039                 return ret;
1040
1041         st->slave_num = ret;
1042         st->scan_cnt = (st->slave_num + 1) * AD7280A_NUM_CH;
1043         st->cell_threshhigh = 0xFF;
1044         st->aux_threshhigh = 0xFF;
1045
1046         ret = devm_add_action_or_reset(dev, ad7280_sw_power_down, st);
1047         if (ret)
1048                 return ret;
1049
1050         ad7280_update_delay(st);
1051
1052         indio_dev->name = spi_get_device_id(spi)->name;
1053         indio_dev->modes = INDIO_DIRECT_MODE;
1054
1055         ret = ad7280_channel_init(st, spi->irq > 0);
1056         if (ret < 0)
1057                 return ret;
1058
1059         indio_dev->num_channels = ret;
1060         indio_dev->channels = st->channels;
1061         if (spi->irq > 0) {
1062                 ret = ad7280_write(st, AD7280A_DEVADDR_MASTER,
1063                                    AD7280A_ALERT_REG, 1,
1064                                    AD7280A_ALERT_RELAY_SIG_CHAIN_DOWN);
1065                 if (ret)
1066                         return ret;
1067
1068                 ret = ad7280_write(st, ad7280a_devaddr(st->slave_num),
1069                                    AD7280A_ALERT_REG, 0,
1070                                    AD7280A_ALERT_GEN_STATIC_HIGH |
1071                                    FIELD_PREP(AD7280A_ALERT_REMOVE_MSK,
1072                                               st->chain_last_alert_ignore));
1073                 if (ret)
1074                         return ret;
1075
1076                 ret = devm_request_threaded_irq(dev, spi->irq,
1077                                                 NULL,
1078                                                 ad7280_event_handler,
1079                                                 IRQF_TRIGGER_FALLING |
1080                                                 IRQF_ONESHOT,
1081                                                 indio_dev->name,
1082                                                 indio_dev);
1083                 if (ret)
1084                         return ret;
1085
1086                 indio_dev->info = &ad7280_info;
1087         } else {
1088                 indio_dev->info = &ad7280_info_no_irq;
1089         }
1090
1091         return devm_iio_device_register(dev, indio_dev);
1092 }
1093
1094 static const struct spi_device_id ad7280_id[] = {
1095         {"ad7280a", 0},
1096         {}
1097 };
1098 MODULE_DEVICE_TABLE(spi, ad7280_id);
1099
1100 static struct spi_driver ad7280_driver = {
1101         .driver = {
1102                 .name   = "ad7280",
1103         },
1104         .probe          = ad7280_probe,
1105         .id_table       = ad7280_id,
1106 };
1107 module_spi_driver(ad7280_driver);
1108
1109 MODULE_AUTHOR("Michael Hennerich <michael.hennerich@analog.com>");
1110 MODULE_DESCRIPTION("Analog Devices AD7280A");
1111 MODULE_LICENSE("GPL v2");