drivers/hwmon/w83627ehf.c

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2 /*
   3  *  w83627ehf - Driver for the hardware monitoring functionality of
   4  *              the Winbond W83627EHF Super-I/O chip
   5  *  Copyright (C) 2005-2012  Jean Delvare <jdelvare@suse.de>
   6  *  Copyright (C) 2006  Yuan Mu (Winbond),
   7  *                      Rudolf Marek <r.marek@assembler.cz>
   8  *                      David Hubbard <david.c.hubbard@gmail.com>
   9  *                      Daniel J Blueman <daniel.blueman@gmail.com>
  10  *  Copyright (C) 2010  Sheng-Yuan Huang (Nuvoton) (PS00)
  11  *
  12  *  Shamelessly ripped from the w83627hf driver
  13  *  Copyright (C) 2003  Mark Studebaker
  14  *
  15  *  Thanks to Leon Moonen, Steve Cliffe and Grant Coady for their help
  16  *  in testing and debugging this driver.
  17  *
  18  *  This driver also supports the W83627EHG, which is the lead-free
  19  *  version of the W83627EHF.
  20  *
  21  *  Supports the following chips:
  22  *
  23  *  Chip        #vin    #fan    #pwm    #temp  chip IDs       man ID
  24  *  w83627ehf   10      5       4       3      0x8850 0x88    0x5ca3
  25  *                                             0x8860 0xa1
  26  *  w83627dhg    9      5       4       3      0xa020 0xc1    0x5ca3
  27  *  w83627dhg-p  9      5       4       3      0xb070 0xc1    0x5ca3
  28  *  w83627uhg    8      2       2       3      0xa230 0xc1    0x5ca3
  29  *  w83667hg     9      5       3       3      0xa510 0xc1    0x5ca3
  30  *  w83667hg-b   9      5       3       4      0xb350 0xc1    0x5ca3
  31  */
  32
  33 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  34
  35 #include <linux/module.h>
  36 #include <linux/init.h>
  37 #include <linux/slab.h>
  38 #include <linux/jiffies.h>
  39 #include <linux/platform_device.h>
  40 #include <linux/hwmon.h>
  41 #include <linux/hwmon-sysfs.h>
  42 #include <linux/hwmon-vid.h>
  43 #include <linux/err.h>
  44 #include <linux/mutex.h>
  45 #include <linux/acpi.h>
  46 #include <linux/io.h>
  47 #include "lm75.h"
  48
  49 enum kinds {
  50         w83627ehf, w83627dhg, w83627dhg_p, w83627uhg,
  51         w83667hg, w83667hg_b,
  52 };
  53
  54 /* used to set data->name = w83627ehf_device_names[data->sio_kind] */
  55 static const char * const w83627ehf_device_names[] = {
  56         "w83627ehf",
  57         "w83627dhg",
  58         "w83627dhg",
  59         "w83627uhg",
  60         "w83667hg",
  61         "w83667hg",
  62 };
  63
  64 static unsigned short force_id;
  65 module_param(force_id, ushort, 0);
  66 MODULE_PARM_DESC(force_id, "Override the detected device ID");
  67
  68 #define DRVNAME "w83627ehf"
  69
  70 /*
  71  * Super-I/O constants and functions
  72  */
  73
  74 #define W83627EHF_LD_HWM        0x0b
  75 #define W83667HG_LD_VID         0x0d
  76
  77 #define SIO_REG_LDSEL           0x07    /* Logical device select */
  78 #define SIO_REG_DEVID           0x20    /* Device ID (2 bytes) */
  79 #define SIO_REG_EN_VRM10        0x2C    /* GPIO3, GPIO4 selection */
  80 #define SIO_REG_ENABLE          0x30    /* Logical device enable */
  81 #define SIO_REG_ADDR            0x60    /* Logical device address (2 bytes) */
  82 #define SIO_REG_VID_CTRL        0xF0    /* VID control */
  83 #define SIO_REG_VID_DATA        0xF1    /* VID data */
  84
  85 #define SIO_W83627EHF_ID        0x8850
  86 #define SIO_W83627EHG_ID        0x8860
  87 #define SIO_W83627DHG_ID        0xa020
  88 #define SIO_W83627DHG_P_ID      0xb070
  89 #define SIO_W83627UHG_ID        0xa230
  90 #define SIO_W83667HG_ID         0xa510
  91 #define SIO_W83667HG_B_ID       0xb350
  92 #define SIO_ID_MASK             0xFFF0
  93
  94 static inline void
  95 superio_outb(int ioreg, int reg, int val)
  96 {
  97         outb(reg, ioreg);
  98         outb(val, ioreg + 1);
  99 }
 100
 101 static inline int
 102 superio_inb(int ioreg, int reg)
 103 {
 104         outb(reg, ioreg);
 105         return inb(ioreg + 1);
 106 }
 107
 108 static inline void
 109 superio_select(int ioreg, int ld)
 110 {
 111         outb(SIO_REG_LDSEL, ioreg);
 112         outb(ld, ioreg + 1);
 113 }
 114
 115 static inline int
 116 superio_enter(int ioreg)
 117 {
 118         if (!request_muxed_region(ioreg, 2, DRVNAME))
 119                 return -EBUSY;
 120
 121         outb(0x87, ioreg);
 122         outb(0x87, ioreg);
 123
 124         return 0;
 125 }
 126
 127 static inline void
 128 superio_exit(int ioreg)
 129 {
 130         outb(0xaa, ioreg);
 131         outb(0x02, ioreg);
 132         outb(0x02, ioreg + 1);
 133         release_region(ioreg, 2);
 134 }
 135
 136 /*
 137  * ISA constants
 138  */
 139
 140 #define IOREGION_ALIGNMENT      (~7)
 141 #define IOREGION_OFFSET         5
 142 #define IOREGION_LENGTH         2
 143 #define ADDR_REG_OFFSET         0
 144 #define DATA_REG_OFFSET         1
 145
 146 #define W83627EHF_REG_BANK              0x4E
 147 #define W83627EHF_REG_CONFIG            0x40
 148
 149 /*
 150  * Not currently used:
 151  * REG_MAN_ID has the value 0x5ca3 for all supported chips.
 152  * REG_CHIP_ID == 0x88/0xa1/0xc1 depending on chip model.
 153  * REG_MAN_ID is at port 0x4f
 154  * REG_CHIP_ID is at port 0x58
 155  */
 156
 157 static const u16 W83627EHF_REG_FAN[] = { 0x28, 0x29, 0x2a, 0x3f, 0x553 };
 158 static const u16 W83627EHF_REG_FAN_MIN[] = { 0x3b, 0x3c, 0x3d, 0x3e, 0x55c };
 159
 160 /* The W83627EHF registers for nr=7,8,9 are in bank 5 */
 161 #define W83627EHF_REG_IN_MAX(nr)        ((nr < 7) ? (0x2b + (nr) * 2) : \
 162                                          (0x554 + (((nr) - 7) * 2)))
 163 #define W83627EHF_REG_IN_MIN(nr)        ((nr < 7) ? (0x2c + (nr) * 2) : \
 164                                          (0x555 + (((nr) - 7) * 2)))
 165 #define W83627EHF_REG_IN(nr)            ((nr < 7) ? (0x20 + (nr)) : \
 166                                          (0x550 + (nr) - 7))
 167
 168 static const u16 W83627EHF_REG_TEMP[] = { 0x27, 0x150, 0x250, 0x7e };
 169 static const u16 W83627EHF_REG_TEMP_HYST[] = { 0x3a, 0x153, 0x253, 0 };
 170 static const u16 W83627EHF_REG_TEMP_OVER[] = { 0x39, 0x155, 0x255, 0 };
 171 static const u16 W83627EHF_REG_TEMP_CONFIG[] = { 0, 0x152, 0x252, 0 };
 172
 173 /* Fan clock dividers are spread over the following five registers */
 174 #define W83627EHF_REG_FANDIV1           0x47
 175 #define W83627EHF_REG_FANDIV2           0x4B
 176 #define W83627EHF_REG_VBAT              0x5D
 177 #define W83627EHF_REG_DIODE             0x59
 178 #define W83627EHF_REG_SMI_OVT           0x4C
 179
 180 #define W83627EHF_REG_ALARM1            0x459
 181 #define W83627EHF_REG_ALARM2            0x45A
 182 #define W83627EHF_REG_ALARM3            0x45B
 183
 184 #define W83627EHF_REG_CASEOPEN_DET      0x42 /* SMI STATUS #2 */
 185 #define W83627EHF_REG_CASEOPEN_CLR      0x46 /* SMI MASK #3 */
 186
 187 /* SmartFan registers */
 188 #define W83627EHF_REG_FAN_STEPUP_TIME 0x0f
 189 #define W83627EHF_REG_FAN_STEPDOWN_TIME 0x0e
 190
 191 /* DC or PWM output fan configuration */
 192 static const u8 W83627EHF_REG_PWM_ENABLE[] = {
 193         0x04,                   /* SYS FAN0 output mode and PWM mode */
 194         0x04,                   /* CPU FAN0 output mode and PWM mode */
 195         0x12,                   /* AUX FAN mode */
 196         0x62,                   /* CPU FAN1 mode */
 197 };
 198
 199 static const u8 W83627EHF_PWM_MODE_SHIFT[] = { 0, 1, 0, 6 };
 200 static const u8 W83627EHF_PWM_ENABLE_SHIFT[] = { 2, 4, 1, 4 };
 201
 202 /* FAN Duty Cycle, be used to control */
 203 static const u16 W83627EHF_REG_PWM[] = { 0x01, 0x03, 0x11, 0x61 };
 204 static const u16 W83627EHF_REG_TARGET[] = { 0x05, 0x06, 0x13, 0x63 };
 205 static const u8 W83627EHF_REG_TOLERANCE[] = { 0x07, 0x07, 0x14, 0x62 };
 206
 207 /* Advanced Fan control, some values are common for all fans */
 208 static const u16 W83627EHF_REG_FAN_START_OUTPUT[] = { 0x0a, 0x0b, 0x16, 0x65 };
 209 static const u16 W83627EHF_REG_FAN_STOP_OUTPUT[] = { 0x08, 0x09, 0x15, 0x64 };
 210 static const u16 W83627EHF_REG_FAN_STOP_TIME[] = { 0x0c, 0x0d, 0x17, 0x66 };
 211
 212 static const u16 W83627EHF_REG_FAN_MAX_OUTPUT_COMMON[]
 213                                                 = { 0xff, 0x67, 0xff, 0x69 };
 214 static const u16 W83627EHF_REG_FAN_STEP_OUTPUT_COMMON[]
 215                                                 = { 0xff, 0x68, 0xff, 0x6a };
 216
 217 static const u16 W83627EHF_REG_FAN_MAX_OUTPUT_W83667_B[] = { 0x67, 0x69, 0x6b };
 218 static const u16 W83627EHF_REG_FAN_STEP_OUTPUT_W83667_B[]
 219                                                 = { 0x68, 0x6a, 0x6c };
 220
 221 static const u16 W83627EHF_REG_TEMP_OFFSET[] = { 0x454, 0x455, 0x456 };
 222
 223 static const char *const w83667hg_b_temp_label[] = {
 224         "SYSTIN",
 225         "CPUTIN",
 226         "AUXTIN",
 227         "AMDTSI",
 228         "PECI Agent 1",
 229         "PECI Agent 2",
 230         "PECI Agent 3",
 231         "PECI Agent 4"
 232 };
 233
 234 #define NUM_REG_TEMP    ARRAY_SIZE(W83627EHF_REG_TEMP)
 235
 236 static int is_word_sized(u16 reg)
 237 {
 238         return ((((reg & 0xff00) == 0x100
 239               || (reg & 0xff00) == 0x200)
 240              && ((reg & 0x00ff) == 0x50
 241               || (reg & 0x00ff) == 0x53
 242               || (reg & 0x00ff) == 0x55))
 243              || (reg & 0xfff0) == 0x630
 244              || reg == 0x640 || reg == 0x642
 245              || ((reg & 0xfff0) == 0x650
 246                  && (reg & 0x000f) >= 0x06)
 247              || reg == 0x73 || reg == 0x75 || reg == 0x77
 248                 );
 249 }
 250
 251 /*
 252  * Conversions
 253  */
 254
 255 /* 1 is PWM mode, output in ms */
 256 static inline unsigned int step_time_from_reg(u8 reg, u8 mode)
 257 {
 258         return mode ? 100 * reg : 400 * reg;
 259 }
 260
 261 static inline u8 step_time_to_reg(unsigned int msec, u8 mode)
 262 {
 263         return clamp_val((mode ? (msec + 50) / 100 : (msec + 200) / 400),
 264                          1, 255);
 265 }
 266
 267 static unsigned int fan_from_reg8(u16 reg, unsigned int divreg)
 268 {
 269         if (reg == 0 || reg == 255)
 270                 return 0;
 271         return 1350000U / (reg << divreg);
 272 }
 273
 274 static inline unsigned int
 275 div_from_reg(u8 reg)
 276 {
 277         return 1 << reg;
 278 }
 279
 280 /*
 281  * Some of the voltage inputs have internal scaling, the tables below
 282  * contain 8 (the ADC LSB in mV) * scaling factor * 100
 283  */
 284 static const u16 scale_in_common[10] = {
 285         800, 800, 1600, 1600, 800, 800, 800, 1600, 1600, 800
 286 };
 287 static const u16 scale_in_w83627uhg[9] = {
 288         800, 800, 3328, 3424, 800, 800, 0, 3328, 3400
 289 };
 290
 291 static inline long in_from_reg(u8 reg, u8 nr, const u16 *scale_in)
 292 {
 293         return DIV_ROUND_CLOSEST(reg * scale_in[nr], 100);
 294 }
 295
 296 static inline u8 in_to_reg(u32 val, u8 nr, const u16 *scale_in)
 297 {
 298         return clamp_val(DIV_ROUND_CLOSEST(val * 100, scale_in[nr]), 0, 255);
 299 }
 300
 301 /*
 302  * Data structures and manipulation thereof
 303  */
 304
 305 struct w83627ehf_data {
 306         int addr;       /* IO base of hw monitor block */
 307         const char *name;
 308
 309         struct mutex lock;
 310
 311         u16 reg_temp[NUM_REG_TEMP];
 312         u16 reg_temp_over[NUM_REG_TEMP];
 313         u16 reg_temp_hyst[NUM_REG_TEMP];
 314         u16 reg_temp_config[NUM_REG_TEMP];
 315         u8 temp_src[NUM_REG_TEMP];
 316         const char * const *temp_label;
 317
 318         const u16 *REG_FAN_MAX_OUTPUT;
 319         const u16 *REG_FAN_STEP_OUTPUT;
 320         const u16 *scale_in;
 321
 322         struct mutex update_lock;
 323         char valid;             /* !=0 if following fields are valid */
 324         unsigned long last_updated;     /* In jiffies */
 325
 326         /* Register values */
 327         u8 bank;                /* current register bank */
 328         u8 in_num;              /* number of in inputs we have */
 329         u8 in[10];              /* Register value */
 330         u8 in_max[10];          /* Register value */
 331         u8 in_min[10];          /* Register value */
 332         unsigned int rpm[5];
 333         u16 fan_min[5];
 334         u8 fan_div[5];
 335         u8 has_fan;             /* some fan inputs can be disabled */
 336         u8 has_fan_min;         /* some fans don't have min register */
 337         u8 temp_type[3];
 338         s8 temp_offset[3];
 339         s16 temp[9];
 340         s16 temp_max[9];
 341         s16 temp_max_hyst[9];
 342         u32 alarms;
 343         u8 caseopen;
 344
 345         u8 pwm_mode[4]; /* 0->DC variable voltage, 1->PWM variable duty cycle */
 346         u8 pwm_enable[4]; /* 1->manual
 347                            * 2->thermal cruise mode (also called SmartFan I)
 348                            * 3->fan speed cruise mode
 349                            * 4->variable thermal cruise (also called
 350                            * SmartFan III)
 351                            * 5->enhanced variable thermal cruise (also called
 352                            * SmartFan IV)
 353                            */
 354         u8 pwm_enable_orig[4];  /* original value of pwm_enable */
 355         u8 pwm_num;             /* number of pwm */
 356         u8 pwm[4];
 357         u8 target_temp[4];
 358         u8 tolerance[4];
 359
 360         u8 fan_start_output[4]; /* minimum fan speed when spinning up */
 361         u8 fan_stop_output[4]; /* minimum fan speed when spinning down */
 362         u8 fan_stop_time[4]; /* time at minimum before disabling fan */
 363         u8 fan_max_output[4]; /* maximum fan speed */
 364         u8 fan_step_output[4]; /* rate of change output value */
 365
 366         u8 vid;
 367         u8 vrm;
 368
 369         u16 have_temp;
 370         u16 have_temp_offset;
 371         u8 in6_skip:1;
 372         u8 temp3_val_only:1;
 373         u8 have_vid:1;
 374
 375 #ifdef CONFIG_PM
 376         /* Remember extra register values over suspend/resume */
 377         u8 vbat;
 378         u8 fandiv1;
 379         u8 fandiv2;
 380 #endif
 381 };
 382
 383 struct w83627ehf_sio_data {
 384         int sioreg;
 385         enum kinds kind;
 386 };
 387
 388 /*
 389  * On older chips, only registers 0x50-0x5f are banked.
 390  * On more recent chips, all registers are banked.
 391  * Assume that is the case and set the bank number for each access.
 392  * Cache the bank number so it only needs to be set if it changes.
 393  */
 394 static inline void w83627ehf_set_bank(struct w83627ehf_data *data, u16 reg)
 395 {
 396         u8 bank = reg >> 8;
 397         if (data->bank != bank) {
 398                 outb_p(W83627EHF_REG_BANK, data->addr + ADDR_REG_OFFSET);
 399                 outb_p(bank, data->addr + DATA_REG_OFFSET);
 400                 data->bank = bank;
 401         }
 402 }
 403
 404 static u16 w83627ehf_read_value(struct w83627ehf_data *data, u16 reg)
 405 {
 406         int res, word_sized = is_word_sized(reg);
 407
 408         mutex_lock(&data->lock);
 409
 410         w83627ehf_set_bank(data, reg);
 411         outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
 412         res = inb_p(data->addr + DATA_REG_OFFSET);
 413         if (word_sized) {
 414                 outb_p((reg & 0xff) + 1,
 415                        data->addr + ADDR_REG_OFFSET);
 416                 res = (res << 8) + inb_p(data->addr + DATA_REG_OFFSET);
 417         }
 418
 419         mutex_unlock(&data->lock);
 420         return res;
 421 }
 422
 423 static int w83627ehf_write_value(struct w83627ehf_data *data, u16 reg,
 424                                  u16 value)
 425 {
 426         int word_sized = is_word_sized(reg);
 427
 428         mutex_lock(&data->lock);
 429
 430         w83627ehf_set_bank(data, reg);
 431         outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
 432         if (word_sized) {
 433                 outb_p(value >> 8, data->addr + DATA_REG_OFFSET);
 434                 outb_p((reg & 0xff) + 1,
 435                        data->addr + ADDR_REG_OFFSET);
 436         }
 437         outb_p(value & 0xff, data->addr + DATA_REG_OFFSET);
 438
 439         mutex_unlock(&data->lock);
 440         return 0;
 441 }
 442
 443 /* We left-align 8-bit temperature values to make the code simpler */
 444 static u16 w83627ehf_read_temp(struct w83627ehf_data *data, u16 reg)
 445 {
 446         u16 res;
 447
 448         res = w83627ehf_read_value(data, reg);
 449         if (!is_word_sized(reg))
 450                 res <<= 8;
 451
 452         return res;
 453 }
 454
 455 static int w83627ehf_write_temp(struct w83627ehf_data *data, u16 reg,
 456                                        u16 value)
 457 {
 458         if (!is_word_sized(reg))
 459                 value >>= 8;
 460         return w83627ehf_write_value(data, reg, value);
 461 }
 462
 463 /* This function assumes that the caller holds data->update_lock */
 464 static void w83627ehf_write_fan_div(struct w83627ehf_data *data, int nr)
 465 {
 466         u8 reg;
 467
 468         switch (nr) {
 469         case 0:
 470                 reg = (w83627ehf_read_value(data, W83627EHF_REG_FANDIV1) & 0xcf)
 471                     | ((data->fan_div[0] & 0x03) << 4);
 472                 /* fan5 input control bit is write only, compute the value */
 473                 reg |= (data->has_fan & (1 << 4)) ? 1 : 0;
 474                 w83627ehf_write_value(data, W83627EHF_REG_FANDIV1, reg);
 475                 reg = (w83627ehf_read_value(data, W83627EHF_REG_VBAT) & 0xdf)
 476                     | ((data->fan_div[0] & 0x04) << 3);
 477                 w83627ehf_write_value(data, W83627EHF_REG_VBAT, reg);
 478                 break;
 479         case 1:
 480                 reg = (w83627ehf_read_value(data, W83627EHF_REG_FANDIV1) & 0x3f)
 481                     | ((data->fan_div[1] & 0x03) << 6);
 482                 /* fan5 input control bit is write only, compute the value */
 483                 reg |= (data->has_fan & (1 << 4)) ? 1 : 0;
 484                 w83627ehf_write_value(data, W83627EHF_REG_FANDIV1, reg);
 485                 reg = (w83627ehf_read_value(data, W83627EHF_REG_VBAT) & 0xbf)
 486                     | ((data->fan_div[1] & 0x04) << 4);
 487                 w83627ehf_write_value(data, W83627EHF_REG_VBAT, reg);
 488                 break;
 489         case 2:
 490                 reg = (w83627ehf_read_value(data, W83627EHF_REG_FANDIV2) & 0x3f)
 491                     | ((data->fan_div[2] & 0x03) << 6);
 492                 w83627ehf_write_value(data, W83627EHF_REG_FANDIV2, reg);
 493                 reg = (w83627ehf_read_value(data, W83627EHF_REG_VBAT) & 0x7f)
 494                     | ((data->fan_div[2] & 0x04) << 5);
 495                 w83627ehf_write_value(data, W83627EHF_REG_VBAT, reg);
 496                 break;
 497         case 3:
 498                 reg = (w83627ehf_read_value(data, W83627EHF_REG_DIODE) & 0xfc)
 499                     | (data->fan_div[3] & 0x03);
 500                 w83627ehf_write_value(data, W83627EHF_REG_DIODE, reg);
 501                 reg = (w83627ehf_read_value(data, W83627EHF_REG_SMI_OVT) & 0x7f)
 502                     | ((data->fan_div[3] & 0x04) << 5);
 503                 w83627ehf_write_value(data, W83627EHF_REG_SMI_OVT, reg);
 504                 break;
 505         case 4:
 506                 reg = (w83627ehf_read_value(data, W83627EHF_REG_DIODE) & 0x73)
 507                     | ((data->fan_div[4] & 0x03) << 2)
 508                     | ((data->fan_div[4] & 0x04) << 5);
 509                 w83627ehf_write_value(data, W83627EHF_REG_DIODE, reg);
 510                 break;
 511         }
 512 }
 513
 514 static void w83627ehf_update_fan_div(struct w83627ehf_data *data)
 515 {
 516         int i;
 517
 518         i = w83627ehf_read_value(data, W83627EHF_REG_FANDIV1);
 519         data->fan_div[0] = (i >> 4) & 0x03;
 520         data->fan_div[1] = (i >> 6) & 0x03;
 521         i = w83627ehf_read_value(data, W83627EHF_REG_FANDIV2);
 522         data->fan_div[2] = (i >> 6) & 0x03;
 523         i = w83627ehf_read_value(data, W83627EHF_REG_VBAT);
 524         data->fan_div[0] |= (i >> 3) & 0x04;
 525         data->fan_div[1] |= (i >> 4) & 0x04;
 526         data->fan_div[2] |= (i >> 5) & 0x04;
 527         if (data->has_fan & ((1 << 3) | (1 << 4))) {
 528                 i = w83627ehf_read_value(data, W83627EHF_REG_DIODE);
 529                 data->fan_div[3] = i & 0x03;
 530                 data->fan_div[4] = ((i >> 2) & 0x03)
 531                                  | ((i >> 5) & 0x04);
 532         }
 533         if (data->has_fan & (1 << 3)) {
 534                 i = w83627ehf_read_value(data, W83627EHF_REG_SMI_OVT);
 535                 data->fan_div[3] |= (i >> 5) & 0x04;
 536         }
 537 }
 538
 539 static void w83627ehf_update_pwm(struct w83627ehf_data *data)
 540 {
 541         int i;
 542         int pwmcfg = 0, tolerance = 0; /* shut up the compiler */
 543
 544         for (i = 0; i < data->pwm_num; i++) {
 545                 if (!(data->has_fan & (1 << i)))
 546                         continue;
 547
 548                 /* pwmcfg, tolerance mapped for i=0, i=1 to same reg */
 549                 if (i != 1) {
 550                         pwmcfg = w83627ehf_read_value(data,
 551                                         W83627EHF_REG_PWM_ENABLE[i]);
 552                         tolerance = w83627ehf_read_value(data,
 553                                         W83627EHF_REG_TOLERANCE[i]);
 554                 }
 555                 data->pwm_mode[i] =
 556                         ((pwmcfg >> W83627EHF_PWM_MODE_SHIFT[i]) & 1) ? 0 : 1;
 557                 data->pwm_enable[i] = ((pwmcfg >> W83627EHF_PWM_ENABLE_SHIFT[i])
 558                                        & 3) + 1;
 559                 data->pwm[i] = w83627ehf_read_value(data, W83627EHF_REG_PWM[i]);
 560
 561                 data->tolerance[i] = (tolerance >> (i == 1 ? 4 : 0)) & 0x0f;
 562         }
 563 }
 564
 565 static struct w83627ehf_data *w83627ehf_update_device(struct device *dev)
 566 {
 567         struct w83627ehf_data *data = dev_get_drvdata(dev);
 568         int i;
 569
 570         mutex_lock(&data->update_lock);
 571
 572         if (time_after(jiffies, data->last_updated + HZ + HZ/2)
 573          || !data->valid) {
 574                 /* Fan clock dividers */
 575                 w83627ehf_update_fan_div(data);
 576
 577                 /* Measured voltages and limits */
 578                 for (i = 0; i < data->in_num; i++) {
 579                         if ((i == 6) && data->in6_skip)
 580                                 continue;
 581
 582                         data->in[i] = w83627ehf_read_value(data,
 583                                       W83627EHF_REG_IN(i));
 584                         data->in_min[i] = w83627ehf_read_value(data,
 585                                           W83627EHF_REG_IN_MIN(i));
 586                         data->in_max[i] = w83627ehf_read_value(data,
 587                                           W83627EHF_REG_IN_MAX(i));
 588                 }
 589
 590                 /* Measured fan speeds and limits */
 591                 for (i = 0; i < 5; i++) {
 592                         u16 reg;
 593
 594                         if (!(data->has_fan & (1 << i)))
 595                                 continue;
 596
 597                         reg = w83627ehf_read_value(data, W83627EHF_REG_FAN[i]);
 598                         data->rpm[i] = fan_from_reg8(reg, data->fan_div[i]);
 599
 600                         if (data->has_fan_min & (1 << i))
 601                                 data->fan_min[i] = w83627ehf_read_value(data,
 602                                            W83627EHF_REG_FAN_MIN[i]);
 603
 604                         /*
 605                          * If we failed to measure the fan speed and clock
 606                          * divider can be increased, let's try that for next
 607                          * time
 608                          */
 609                         if (reg >= 0xff && data->fan_div[i] < 0x07) {
 610                                 dev_dbg(dev,
 611                                         "Increasing fan%d clock divider from %u to %u\n",
 612                                         i + 1, div_from_reg(data->fan_div[i]),
 613                                         div_from_reg(data->fan_div[i] + 1));
 614                                 data->fan_div[i]++;
 615                                 w83627ehf_write_fan_div(data, i);
 616                                 /* Preserve min limit if possible */
 617                                 if ((data->has_fan_min & (1 << i))
 618                                  && data->fan_min[i] >= 2
 619                                  && data->fan_min[i] != 255)
 620                                         w83627ehf_write_value(data,
 621                                                 W83627EHF_REG_FAN_MIN[i],
 622                                                 (data->fan_min[i] /= 2));
 623                         }
 624                 }
 625
 626                 w83627ehf_update_pwm(data);
 627
 628                 for (i = 0; i < data->pwm_num; i++) {
 629                         if (!(data->has_fan & (1 << i)))
 630                                 continue;
 631
 632                         data->fan_start_output[i] =
 633                           w83627ehf_read_value(data,
 634                                              W83627EHF_REG_FAN_START_OUTPUT[i]);
 635                         data->fan_stop_output[i] =
 636                           w83627ehf_read_value(data,
 637                                              W83627EHF_REG_FAN_STOP_OUTPUT[i]);
 638                         data->fan_stop_time[i] =
 639                           w83627ehf_read_value(data,
 640                                                W83627EHF_REG_FAN_STOP_TIME[i]);
 641
 642                         if (data->REG_FAN_MAX_OUTPUT &&
 643                             data->REG_FAN_MAX_OUTPUT[i] != 0xff)
 644                                 data->fan_max_output[i] =
 645                                   w83627ehf_read_value(data,
 646                                                 data->REG_FAN_MAX_OUTPUT[i]);
 647
 648                         if (data->REG_FAN_STEP_OUTPUT &&
 649                             data->REG_FAN_STEP_OUTPUT[i] != 0xff)
 650                                 data->fan_step_output[i] =
 651                                   w83627ehf_read_value(data,
 652                                                 data->REG_FAN_STEP_OUTPUT[i]);
 653
 654                         data->target_temp[i] =
 655                                 w83627ehf_read_value(data,
 656                                         W83627EHF_REG_TARGET[i]) &
 657                                         (data->pwm_mode[i] == 1 ? 0x7f : 0xff);
 658                 }
 659
 660                 /* Measured temperatures and limits */
 661                 for (i = 0; i < NUM_REG_TEMP; i++) {
 662                         if (!(data->have_temp & (1 << i)))
 663                                 continue;
 664                         data->temp[i] = w83627ehf_read_temp(data,
 665                                                 data->reg_temp[i]);
 666                         if (data->reg_temp_over[i])
 667                                 data->temp_max[i]
 668                                   = w83627ehf_read_temp(data,
 669                                                 data->reg_temp_over[i]);
 670                         if (data->reg_temp_hyst[i])
 671                                 data->temp_max_hyst[i]
 672                                   = w83627ehf_read_temp(data,
 673                                                 data->reg_temp_hyst[i]);
 674                         if (i > 2)
 675                                 continue;
 676                         if (data->have_temp_offset & (1 << i))
 677                                 data->temp_offset[i]
 678                                   = w83627ehf_read_value(data,
 679                                                 W83627EHF_REG_TEMP_OFFSET[i]);
 680                 }
 681
 682                 data->alarms = w83627ehf_read_value(data,
 683                                         W83627EHF_REG_ALARM1) |
 684                                (w83627ehf_read_value(data,
 685                                         W83627EHF_REG_ALARM2) << 8) |
 686                                (w83627ehf_read_value(data,
 687                                         W83627EHF_REG_ALARM3) << 16);
 688
 689                 data->caseopen = w83627ehf_read_value(data,
 690                                                 W83627EHF_REG_CASEOPEN_DET);
 691
 692                 data->last_updated = jiffies;
 693                 data->valid = 1;
 694         }
 695
 696         mutex_unlock(&data->update_lock);
 697         return data;
 698 }
 699
 700 #define store_in_reg(REG, reg) \
 701 static int \
 702 store_in_##reg(struct device *dev, struct w83627ehf_data *data, int channel, \
 703                long val) \
 704 { \
 705         if (val < 0) \
 706                 return -EINVAL; \
 707         mutex_lock(&data->update_lock); \
 708         data->in_##reg[channel] = in_to_reg(val, channel, data->scale_in); \
 709         w83627ehf_write_value(data, W83627EHF_REG_IN_##REG(channel), \
 710                               data->in_##reg[channel]); \
 711         mutex_unlock(&data->update_lock); \
 712         return 0; \
 713 }
 714
 715 store_in_reg(MIN, min)
 716 store_in_reg(MAX, max)
 717
 718 static int
 719 store_fan_min(struct device *dev, struct w83627ehf_data *data, int channel,
 720               long val)
 721 {
 722         unsigned int reg;
 723         u8 new_div;
 724
 725         if (val < 0)
 726                 return -EINVAL;
 727
 728         mutex_lock(&data->update_lock);
 729         if (!val) {
 730                 /* No min limit, alarm disabled */
 731                 data->fan_min[channel] = 255;
 732                 new_div = data->fan_div[channel]; /* No change */
 733                 dev_info(dev, "fan%u low limit and alarm disabled\n",
 734                          channel + 1);
 735         } else if ((reg = 1350000U / val) >= 128 * 255) {
 736                 /*
 737                  * Speed below this value cannot possibly be represented,
 738                  * even with the highest divider (128)
 739                  */
 740                 data->fan_min[channel] = 254;
 741                 new_div = 7; /* 128 == (1 << 7) */
 742                 dev_warn(dev,
 743                          "fan%u low limit %lu below minimum %u, set to minimum\n",
 744                          channel + 1, val, fan_from_reg8(254, 7));
 745         } else if (!reg) {
 746                 /*
 747                  * Speed above this value cannot possibly be represented,
 748                  * even with the lowest divider (1)
 749                  */
 750                 data->fan_min[channel] = 1;
 751                 new_div = 0; /* 1 == (1 << 0) */
 752                 dev_warn(dev,
 753                          "fan%u low limit %lu above maximum %u, set to maximum\n",
 754                          channel + 1, val, fan_from_reg8(1, 0));
 755         } else {
 756                 /*
 757                  * Automatically pick the best divider, i.e. the one such
 758                  * that the min limit will correspond to a register value
 759                  * in the 96..192 range
 760                  */
 761                 new_div = 0;
 762                 while (reg > 192 && new_div < 7) {
 763                         reg >>= 1;
 764                         new_div++;
 765                 }
 766                 data->fan_min[channel] = reg;
 767         }
 768
 769         /*
 770          * Write both the fan clock divider (if it changed) and the new
 771          * fan min (unconditionally)
 772          */
 773         if (new_div != data->fan_div[channel]) {
 774                 dev_dbg(dev, "fan%u clock divider changed from %u to %u\n",
 775                         channel + 1, div_from_reg(data->fan_div[channel]),
 776                         div_from_reg(new_div));
 777                 data->fan_div[channel] = new_div;
 778                 w83627ehf_write_fan_div(data, channel);
 779                 /* Give the chip time to sample a new speed value */
 780                 data->last_updated = jiffies;
 781         }
 782
 783         w83627ehf_write_value(data, W83627EHF_REG_FAN_MIN[channel],
 784                               data->fan_min[channel]);
 785         mutex_unlock(&data->update_lock);
 786
 787         return 0;
 788 }
 789
 790 #define store_temp_reg(addr, reg) \
 791 static int \
 792 store_##reg(struct device *dev, struct w83627ehf_data *data, int channel, \
 793             long val) \
 794 { \
 795         mutex_lock(&data->update_lock); \
 796         data->reg[channel] = LM75_TEMP_TO_REG(val); \
 797         w83627ehf_write_temp(data, data->addr[channel], data->reg[channel]); \
 798         mutex_unlock(&data->update_lock); \
 799         return 0; \
 800 }
 801 store_temp_reg(reg_temp_over, temp_max);
 802 store_temp_reg(reg_temp_hyst, temp_max_hyst);
 803
 804 static int
 805 store_temp_offset(struct device *dev, struct w83627ehf_data *data, int channel,
 806                   long val)
 807 {
 808         val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), -128, 127);
 809
 810         mutex_lock(&data->update_lock);
 811         data->temp_offset[channel] = val;
 812         w83627ehf_write_value(data, W83627EHF_REG_TEMP_OFFSET[channel], val);
 813         mutex_unlock(&data->update_lock);
 814         return 0;
 815 }
 816
 817 static int
 818 store_pwm_mode(struct device *dev, struct w83627ehf_data *data, int channel,
 819                long val)
 820 {
 821         u16 reg;
 822
 823         if (val < 0 || val > 1)
 824                 return -EINVAL;
 825
 826         mutex_lock(&data->update_lock);
 827         reg = w83627ehf_read_value(data, W83627EHF_REG_PWM_ENABLE[channel]);
 828         data->pwm_mode[channel] = val;
 829         reg &= ~(1 << W83627EHF_PWM_MODE_SHIFT[channel]);
 830         if (!val)
 831                 reg |= 1 << W83627EHF_PWM_MODE_SHIFT[channel];
 832         w83627ehf_write_value(data, W83627EHF_REG_PWM_ENABLE[channel], reg);
 833         mutex_unlock(&data->update_lock);
 834         return 0;
 835 }
 836
 837 static int
 838 store_pwm(struct device *dev, struct w83627ehf_data *data, int channel,
 839           long val)
 840 {
 841         val = clamp_val(val, 0, 255);
 842
 843         mutex_lock(&data->update_lock);
 844         data->pwm[channel] = val;
 845         w83627ehf_write_value(data, W83627EHF_REG_PWM[channel], val);
 846         mutex_unlock(&data->update_lock);
 847         return 0;
 848 }
 849
 850 static int
 851 store_pwm_enable(struct device *dev, struct w83627ehf_data *data, int channel,
 852                  long val)
 853 {
 854         u16 reg;
 855
 856         if (!val || val < 0 ||
 857             (val > 4 && val != data->pwm_enable_orig[channel]))
 858                 return -EINVAL;
 859
 860         mutex_lock(&data->update_lock);
 861         data->pwm_enable[channel] = val;
 862         reg = w83627ehf_read_value(data,
 863                                    W83627EHF_REG_PWM_ENABLE[channel]);
 864         reg &= ~(0x03 << W83627EHF_PWM_ENABLE_SHIFT[channel]);
 865         reg |= (val - 1) << W83627EHF_PWM_ENABLE_SHIFT[channel];
 866         w83627ehf_write_value(data, W83627EHF_REG_PWM_ENABLE[channel],
 867                               reg);
 868         mutex_unlock(&data->update_lock);
 869         return 0;
 870 }
 871
 872 #define show_tol_temp(reg) \
 873 static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \
 874                                 char *buf) \
 875 { \
 876         struct w83627ehf_data *data = w83627ehf_update_device(dev->parent); \
 877         struct sensor_device_attribute *sensor_attr = \
 878                 to_sensor_dev_attr(attr); \
 879         int nr = sensor_attr->index; \
 880         return sprintf(buf, "%d\n", data->reg[nr] * 1000); \
 881 }
 882
 883 show_tol_temp(tolerance)
 884 show_tol_temp(target_temp)
 885
 886 static ssize_t
 887 store_target_temp(struct device *dev, struct device_attribute *attr,
 888                         const char *buf, size_t count)
 889 {
 890         struct w83627ehf_data *data = dev_get_drvdata(dev);
 891         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
 892         int nr = sensor_attr->index;
 893         long val;
 894         int err;
 895
 896         err = kstrtol(buf, 10, &val);
 897         if (err < 0)
 898                 return err;
 899
 900         val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, 127);
 901
 902         mutex_lock(&data->update_lock);
 903         data->target_temp[nr] = val;
 904         w83627ehf_write_value(data, W83627EHF_REG_TARGET[nr], val);
 905         mutex_unlock(&data->update_lock);
 906         return count;
 907 }
 908
 909 static ssize_t
 910 store_tolerance(struct device *dev, struct device_attribute *attr,
 911                         const char *buf, size_t count)
 912 {
 913         struct w83627ehf_data *data = dev_get_drvdata(dev);
 914         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
 915         int nr = sensor_attr->index;
 916         u16 reg;
 917         long val;
 918         int err;
 919
 920         err = kstrtol(buf, 10, &val);
 921         if (err < 0)
 922                 return err;
 923
 924         /* Limit the temp to 0C - 15C */
 925         val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, 15);
 926
 927         mutex_lock(&data->update_lock);
 928         reg = w83627ehf_read_value(data, W83627EHF_REG_TOLERANCE[nr]);
 929         if (nr == 1)
 930                 reg = (reg & 0x0f) | (val << 4);
 931         else
 932                 reg = (reg & 0xf0) | val;
 933         w83627ehf_write_value(data, W83627EHF_REG_TOLERANCE[nr], reg);
 934         data->tolerance[nr] = val;
 935         mutex_unlock(&data->update_lock);
 936         return count;
 937 }
 938
 939 static SENSOR_DEVICE_ATTR(pwm1_target, 0644, show_target_temp,
 940             store_target_temp, 0);
 941 static SENSOR_DEVICE_ATTR(pwm2_target, 0644, show_target_temp,
 942             store_target_temp, 1);
 943 static SENSOR_DEVICE_ATTR(pwm3_target, 0644, show_target_temp,
 944             store_target_temp, 2);
 945 static SENSOR_DEVICE_ATTR(pwm4_target, 0644, show_target_temp,
 946             store_target_temp, 3);
 947
 948 static SENSOR_DEVICE_ATTR(pwm1_tolerance, 0644, show_tolerance,
 949             store_tolerance, 0);
 950 static SENSOR_DEVICE_ATTR(pwm2_tolerance, 0644, show_tolerance,
 951             store_tolerance, 1);
 952 static SENSOR_DEVICE_ATTR(pwm3_tolerance, 0644, show_tolerance,
 953             store_tolerance, 2);
 954 static SENSOR_DEVICE_ATTR(pwm4_tolerance, 0644, show_tolerance,
 955             store_tolerance, 3);
 956
 957 /* Smart Fan registers */
 958
 959 #define fan_functions(reg, REG) \
 960 static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \
 961                        char *buf) \
 962 { \
 963         struct w83627ehf_data *data = w83627ehf_update_device(dev->parent); \
 964         struct sensor_device_attribute *sensor_attr = \
 965                 to_sensor_dev_attr(attr); \
 966         int nr = sensor_attr->index; \
 967         return sprintf(buf, "%d\n", data->reg[nr]); \
 968 } \
 969 static ssize_t \
 970 store_##reg(struct device *dev, struct device_attribute *attr, \
 971                             const char *buf, size_t count) \
 972 { \
 973         struct w83627ehf_data *data = dev_get_drvdata(dev); \
 974         struct sensor_device_attribute *sensor_attr = \
 975                 to_sensor_dev_attr(attr); \
 976         int nr = sensor_attr->index; \
 977         unsigned long val; \
 978         int err; \
 979         err = kstrtoul(buf, 10, &val); \
 980         if (err < 0) \
 981                 return err; \
 982         val = clamp_val(val, 1, 255); \
 983         mutex_lock(&data->update_lock); \
 984         data->reg[nr] = val; \
 985         w83627ehf_write_value(data, REG[nr], val); \
 986         mutex_unlock(&data->update_lock); \
 987         return count; \
 988 }
 989
 990 fan_functions(fan_start_output, W83627EHF_REG_FAN_START_OUTPUT)
 991 fan_functions(fan_stop_output, W83627EHF_REG_FAN_STOP_OUTPUT)
 992 fan_functions(fan_max_output, data->REG_FAN_MAX_OUTPUT)
 993 fan_functions(fan_step_output, data->REG_FAN_STEP_OUTPUT)
 994
 995 #define fan_time_functions(reg, REG) \
 996 static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \
 997                                 char *buf) \
 998 { \
 999         struct w83627ehf_data *data = w83627ehf_update_device(dev->parent); \
1000         struct sensor_device_attribute *sensor_attr = \
1001                 to_sensor_dev_attr(attr); \
1002         int nr = sensor_attr->index; \
1003         return sprintf(buf, "%d\n", \
1004                         step_time_from_reg(data->reg[nr], \
1005                                            data->pwm_mode[nr])); \
1006 } \
1007 \
1008 static ssize_t \
1009 store_##reg(struct device *dev, struct device_attribute *attr, \
1010                         const char *buf, size_t count) \
1011 { \
1012         struct w83627ehf_data *data = dev_get_drvdata(dev); \
1013         struct sensor_device_attribute *sensor_attr = \
1014                 to_sensor_dev_attr(attr); \
1015         int nr = sensor_attr->index; \
1016         unsigned long val; \
1017         int err; \
1018         err = kstrtoul(buf, 10, &val); \
1019         if (err < 0) \
1020                 return err; \
1021         val = step_time_to_reg(val, data->pwm_mode[nr]); \
1022         mutex_lock(&data->update_lock); \
1023         data->reg[nr] = val; \
1024         w83627ehf_write_value(data, REG[nr], val); \
1025         mutex_unlock(&data->update_lock); \
1026         return count; \
1027 } \
1028
1029 fan_time_functions(fan_stop_time, W83627EHF_REG_FAN_STOP_TIME)
1030
1031 static SENSOR_DEVICE_ATTR(pwm4_stop_time, 0644, show_fan_stop_time,
1032             store_fan_stop_time, 3);
1033 static SENSOR_DEVICE_ATTR(pwm4_start_output, 0644, show_fan_start_output,
1034             store_fan_start_output, 3);
1035 static SENSOR_DEVICE_ATTR(pwm4_stop_output, 0644, show_fan_stop_output,
1036             store_fan_stop_output, 3);
1037 static SENSOR_DEVICE_ATTR(pwm4_max_output, 0644, show_fan_max_output,
1038             store_fan_max_output, 3);
1039 static SENSOR_DEVICE_ATTR(pwm4_step_output, 0644, show_fan_step_output,
1040             store_fan_step_output, 3);
1041
1042 static SENSOR_DEVICE_ATTR(pwm3_stop_time, 0644, show_fan_stop_time,
1043             store_fan_stop_time, 2);
1044 static SENSOR_DEVICE_ATTR(pwm3_start_output, 0644, show_fan_start_output,
1045             store_fan_start_output, 2);
1046 static SENSOR_DEVICE_ATTR(pwm3_stop_output, 0644, show_fan_stop_output,
1047                     store_fan_stop_output, 2);
1048
1049 static SENSOR_DEVICE_ATTR(pwm1_stop_time, 0644, show_fan_stop_time,
1050             store_fan_stop_time, 0);
1051 static SENSOR_DEVICE_ATTR(pwm2_stop_time, 0644, show_fan_stop_time,
1052             store_fan_stop_time, 1);
1053 static SENSOR_DEVICE_ATTR(pwm1_start_output, 0644, show_fan_start_output,
1054             store_fan_start_output, 0);
1055 static SENSOR_DEVICE_ATTR(pwm2_start_output, 0644, show_fan_start_output,
1056             store_fan_start_output, 1);
1057 static SENSOR_DEVICE_ATTR(pwm1_stop_output, 0644, show_fan_stop_output,
1058             store_fan_stop_output, 0);
1059 static SENSOR_DEVICE_ATTR(pwm2_stop_output, 0644, show_fan_stop_output,
1060             store_fan_stop_output, 1);
1061
1062
1063 /*
1064  * pwm1 and pwm3 don't support max and step settings on all chips.
1065  * Need to check support while generating/removing attribute files.
1066  */
1067 static SENSOR_DEVICE_ATTR(pwm1_max_output, 0644, show_fan_max_output,
1068             store_fan_max_output, 0);
1069 static SENSOR_DEVICE_ATTR(pwm1_step_output, 0644, show_fan_step_output,
1070             store_fan_step_output, 0);
1071 static SENSOR_DEVICE_ATTR(pwm2_max_output, 0644, show_fan_max_output,
1072             store_fan_max_output, 1);
1073 static SENSOR_DEVICE_ATTR(pwm2_step_output, 0644, show_fan_step_output,
1074             store_fan_step_output, 1);
1075 static SENSOR_DEVICE_ATTR(pwm3_max_output, 0644, show_fan_max_output,
1076             store_fan_max_output, 2);
1077 static SENSOR_DEVICE_ATTR(pwm3_step_output, 0644, show_fan_step_output,
1078             store_fan_step_output, 2);
1079
1080 static ssize_t
1081 cpu0_vid_show(struct device *dev, struct device_attribute *attr, char *buf)
1082 {
1083         struct w83627ehf_data *data = dev_get_drvdata(dev);
1084         return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm));
1085 }
1086 DEVICE_ATTR_RO(cpu0_vid);
1087
1088
1089 /* Case open detection */
1090 static int
1091 clear_caseopen(struct device *dev, struct w83627ehf_data *data, int channel,
1092                long val)
1093 {
1094         const u16 mask = 0x80;
1095         u16 reg;
1096
1097         if (val != 0 || channel != 0)
1098                 return -EINVAL;
1099
1100         mutex_lock(&data->update_lock);
1101         reg = w83627ehf_read_value(data, W83627EHF_REG_CASEOPEN_CLR);
1102         w83627ehf_write_value(data, W83627EHF_REG_CASEOPEN_CLR, reg | mask);
1103         w83627ehf_write_value(data, W83627EHF_REG_CASEOPEN_CLR, reg & ~mask);
1104         data->valid = 0;        /* Force cache refresh */
1105         mutex_unlock(&data->update_lock);
1106
1107         return 0;
1108 }
1109
1110 static umode_t w83627ehf_attrs_visible(struct kobject *kobj,
1111                                        struct attribute *a, int n)
1112 {
1113         struct device *dev = kobj_to_dev(kobj);
1114         struct w83627ehf_data *data = dev_get_drvdata(dev);
1115         struct device_attribute *devattr;
1116         struct sensor_device_attribute *sda;
1117
1118         devattr = container_of(a, struct device_attribute, attr);
1119
1120         /* Not sensor */
1121         if (devattr->show == cpu0_vid_show && data->have_vid)
1122                 return a->mode;
1123
1124         sda = (struct sensor_device_attribute *)devattr;
1125
1126         if (sda->index < 2 &&
1127                 (devattr->show == show_fan_stop_time ||
1128                  devattr->show == show_fan_start_output ||
1129                  devattr->show == show_fan_stop_output))
1130                 return a->mode;
1131
1132         if (sda->index < 3 &&
1133                 (devattr->show == show_fan_max_output ||
1134                  devattr->show == show_fan_step_output) &&
1135                 data->REG_FAN_STEP_OUTPUT &&
1136                 data->REG_FAN_STEP_OUTPUT[sda->index] != 0xff)
1137                 return a->mode;
1138
1139         /* if fan3 and fan4 are enabled create the files for them */
1140         if (sda->index == 2 &&
1141                 (data->has_fan & (1 << 2)) && data->pwm_num >= 3 &&
1142                 (devattr->show == show_fan_stop_time ||
1143                  devattr->show == show_fan_start_output ||
1144                  devattr->show == show_fan_stop_output))
1145                 return a->mode;
1146
1147         if (sda->index == 3 &&
1148                 (data->has_fan & (1 << 3)) && data->pwm_num >= 4 &&
1149                 (devattr->show == show_fan_stop_time ||
1150                  devattr->show == show_fan_start_output ||
1151                  devattr->show == show_fan_stop_output ||
1152                  devattr->show == show_fan_max_output ||
1153                  devattr->show == show_fan_step_output))
1154                 return a->mode;
1155
1156         if ((devattr->show == show_target_temp ||
1157             devattr->show == show_tolerance) &&
1158             (data->has_fan & (1 << sda->index)) &&
1159             sda->index < data->pwm_num)
1160                 return a->mode;
1161
1162         return 0;
1163 }
1164
1165 /* These groups handle non-standard attributes used in this device */
1166 static struct attribute *w83627ehf_attrs[] = {
1167
1168         &sensor_dev_attr_pwm1_stop_time.dev_attr.attr,
1169         &sensor_dev_attr_pwm1_start_output.dev_attr.attr,
1170         &sensor_dev_attr_pwm1_stop_output.dev_attr.attr,
1171         &sensor_dev_attr_pwm1_max_output.dev_attr.attr,
1172         &sensor_dev_attr_pwm1_step_output.dev_attr.attr,
1173         &sensor_dev_attr_pwm1_target.dev_attr.attr,
1174         &sensor_dev_attr_pwm1_tolerance.dev_attr.attr,
1175
1176         &sensor_dev_attr_pwm2_stop_time.dev_attr.attr,
1177         &sensor_dev_attr_pwm2_start_output.dev_attr.attr,
1178         &sensor_dev_attr_pwm2_stop_output.dev_attr.attr,
1179         &sensor_dev_attr_pwm2_max_output.dev_attr.attr,
1180         &sensor_dev_attr_pwm2_step_output.dev_attr.attr,
1181         &sensor_dev_attr_pwm2_target.dev_attr.attr,
1182         &sensor_dev_attr_pwm2_tolerance.dev_attr.attr,
1183
1184         &sensor_dev_attr_pwm3_stop_time.dev_attr.attr,
1185         &sensor_dev_attr_pwm3_start_output.dev_attr.attr,
1186         &sensor_dev_attr_pwm3_stop_output.dev_attr.attr,
1187         &sensor_dev_attr_pwm3_max_output.dev_attr.attr,
1188         &sensor_dev_attr_pwm3_step_output.dev_attr.attr,
1189         &sensor_dev_attr_pwm3_target.dev_attr.attr,
1190         &sensor_dev_attr_pwm3_tolerance.dev_attr.attr,
1191
1192         &sensor_dev_attr_pwm4_stop_time.dev_attr.attr,
1193         &sensor_dev_attr_pwm4_start_output.dev_attr.attr,
1194         &sensor_dev_attr_pwm4_stop_output.dev_attr.attr,
1195         &sensor_dev_attr_pwm4_max_output.dev_attr.attr,
1196         &sensor_dev_attr_pwm4_step_output.dev_attr.attr,
1197         &sensor_dev_attr_pwm4_target.dev_attr.attr,
1198         &sensor_dev_attr_pwm4_tolerance.dev_attr.attr,
1199
1200         &dev_attr_cpu0_vid.attr,
1201         NULL
1202 };
1203
1204 static const struct attribute_group w83627ehf_group = {
1205         .attrs = w83627ehf_attrs,
1206         .is_visible = w83627ehf_attrs_visible,
1207 };
1208
1209 static const struct attribute_group *w83627ehf_groups[] = {
1210         &w83627ehf_group,
1211         NULL
1212 };
1213
1214 /*
1215  * Driver and device management
1216  */
1217
1218 /* Get the monitoring functions started */
1219 static inline void w83627ehf_init_device(struct w83627ehf_data *data,
1220                                                    enum kinds kind)
1221 {
1222         int i;
1223         u8 tmp, diode;
1224
1225         /* Start monitoring is needed */
1226         tmp = w83627ehf_read_value(data, W83627EHF_REG_CONFIG);
1227         if (!(tmp & 0x01))
1228                 w83627ehf_write_value(data, W83627EHF_REG_CONFIG,
1229                                       tmp | 0x01);
1230
1231         /* Enable temperature sensors if needed */
1232         for (i = 0; i < NUM_REG_TEMP; i++) {
1233                 if (!(data->have_temp & (1 << i)))
1234                         continue;
1235                 if (!data->reg_temp_config[i])
1236                         continue;
1237                 tmp = w83627ehf_read_value(data,
1238                                            data->reg_temp_config[i]);
1239                 if (tmp & 0x01)
1240                         w83627ehf_write_value(data,
1241                                               data->reg_temp_config[i],
1242                                               tmp & 0xfe);
1243         }
1244
1245         /* Enable VBAT monitoring if needed */
1246         tmp = w83627ehf_read_value(data, W83627EHF_REG_VBAT);
1247         if (!(tmp & 0x01))
1248                 w83627ehf_write_value(data, W83627EHF_REG_VBAT, tmp | 0x01);
1249
1250         /* Get thermal sensor types */
1251         switch (kind) {
1252         case w83627ehf:
1253                 diode = w83627ehf_read_value(data, W83627EHF_REG_DIODE);
1254                 break;
1255         case w83627uhg:
1256                 diode = 0x00;
1257                 break;
1258         default:
1259                 diode = 0x70;
1260         }
1261         for (i = 0; i < 3; i++) {
1262                 const char *label = NULL;
1263
1264                 if (data->temp_label)
1265                         label = data->temp_label[data->temp_src[i]];
1266
1267                 /* Digital source overrides analog type */
1268                 if (label && strncmp(label, "PECI", 4) == 0)
1269                         data->temp_type[i] = 6;
1270                 else if (label && strncmp(label, "AMD", 3) == 0)
1271                         data->temp_type[i] = 5;
1272                 else if ((tmp & (0x02 << i)))
1273                         data->temp_type[i] = (diode & (0x10 << i)) ? 1 : 3;
1274                 else
1275                         data->temp_type[i] = 4; /* thermistor */
1276         }
1277 }
1278
1279 static void
1280 w83627ehf_set_temp_reg_ehf(struct w83627ehf_data *data, int n_temp)
1281 {
1282         int i;
1283
1284         for (i = 0; i < n_temp; i++) {
1285                 data->reg_temp[i] = W83627EHF_REG_TEMP[i];
1286                 data->reg_temp_over[i] = W83627EHF_REG_TEMP_OVER[i];
1287                 data->reg_temp_hyst[i] = W83627EHF_REG_TEMP_HYST[i];
1288                 data->reg_temp_config[i] = W83627EHF_REG_TEMP_CONFIG[i];
1289         }
1290 }
1291
1292 static void
1293 w83627ehf_check_fan_inputs(const struct w83627ehf_sio_data *sio_data,
1294                            struct w83627ehf_data *data)
1295 {
1296         int fan3pin, fan4pin, fan5pin, regval;
1297
1298         /* The W83627UHG is simple, only two fan inputs, no config */
1299         if (sio_data->kind == w83627uhg) {
1300                 data->has_fan = 0x03; /* fan1 and fan2 */
1301                 data->has_fan_min = 0x03;
1302                 return;
1303         }
1304
1305         /* fan4 and fan5 share some pins with the GPIO and serial flash */
1306         if (sio_data->kind == w83667hg || sio_data->kind == w83667hg_b) {
1307                 fan3pin = 1;
1308                 fan4pin = superio_inb(sio_data->sioreg, 0x27) & 0x40;
1309                 fan5pin = superio_inb(sio_data->sioreg, 0x27) & 0x20;
1310         } else {
1311                 fan3pin = 1;
1312                 fan4pin = !(superio_inb(sio_data->sioreg, 0x29) & 0x06);
1313                 fan5pin = !(superio_inb(sio_data->sioreg, 0x24) & 0x02);
1314         }
1315
1316         data->has_fan = data->has_fan_min = 0x03; /* fan1 and fan2 */
1317         data->has_fan |= (fan3pin << 2);
1318         data->has_fan_min |= (fan3pin << 2);
1319
1320         /*
1321          * It looks like fan4 and fan5 pins can be alternatively used
1322          * as fan on/off switches, but fan5 control is write only :/
1323          * We assume that if the serial interface is disabled, designers
1324          * connected fan5 as input unless they are emitting log 1, which
1325          * is not the default.
1326          */
1327         regval = w83627ehf_read_value(data, W83627EHF_REG_FANDIV1);
1328         if ((regval & (1 << 2)) && fan4pin) {
1329                 data->has_fan |= (1 << 3);
1330                 data->has_fan_min |= (1 << 3);
1331         }
1332         if (!(regval & (1 << 1)) && fan5pin) {
1333                 data->has_fan |= (1 << 4);
1334                 data->has_fan_min |= (1 << 4);
1335         }
1336 }
1337
1338 static umode_t
1339 w83627ehf_is_visible(const void *drvdata, enum hwmon_sensor_types type,
1340                      u32 attr, int channel)
1341 {
1342         const struct w83627ehf_data *data = drvdata;
1343
1344         switch (type) {
1345         case hwmon_temp:
1346                 /* channel 0.., name 1.. */
1347                 if (!(data->have_temp & (1 << channel)))
1348                         return 0;
1349                 if (attr == hwmon_temp_input)
1350                         return 0444;
1351                 if (attr == hwmon_temp_label) {
1352                         if (data->temp_label)
1353                                 return 0444;
1354                         return 0;
1355                 }
1356                 if (channel == 2 && data->temp3_val_only)
1357                         return 0;
1358                 if (attr == hwmon_temp_max) {
1359                         if (data->reg_temp_over[channel])
1360                                 return 0644;
1361                         else
1362                                 return 0;
1363                 }
1364                 if (attr == hwmon_temp_max_hyst) {
1365                         if (data->reg_temp_hyst[channel])
1366                                 return 0644;
1367                         else
1368                                 return 0;
1369                 }
1370                 if (channel > 2)
1371                         return 0;
1372                 if (attr == hwmon_temp_alarm || attr == hwmon_temp_type)
1373                         return 0444;
1374                 if (attr == hwmon_temp_offset) {
1375                         if (data->have_temp_offset & (1 << channel))
1376                                 return 0644;
1377                         else
1378                                 return 0;
1379                 }
1380                 break;
1381
1382         case hwmon_fan:
1383                 /* channel 0.., name 1.. */
1384                 if (!(data->has_fan & (1 << channel)))
1385                         return 0;
1386                 if (attr == hwmon_fan_input || attr == hwmon_fan_alarm)
1387                         return 0444;
1388                 if (attr == hwmon_fan_div) {
1389                         return 0444;
1390                 }
1391                 if (attr == hwmon_fan_min) {
1392                         if (data->has_fan_min & (1 << channel))
1393                                 return 0644;
1394                         else
1395                                 return 0;
1396                 }
1397                 break;
1398
1399         case hwmon_in:
1400                 /* channel 0.., name 0.. */
1401                 if (channel >= data->in_num)
1402                         return 0;
1403                 if (channel == 6 && data->in6_skip)
1404                         return 0;
1405                 if (attr == hwmon_in_alarm || attr == hwmon_in_input)
1406                         return 0444;
1407                 if (attr == hwmon_in_min || attr == hwmon_in_max)
1408                         return 0644;
1409                 break;
1410
1411         case hwmon_pwm:
1412                 /* channel 0.., name 1.. */
1413                 if (!(data->has_fan & (1 << channel)) ||
1414                     channel >= data->pwm_num)
1415                         return 0;
1416                 if (attr == hwmon_pwm_mode || attr == hwmon_pwm_enable ||
1417                     attr == hwmon_pwm_input)
1418                         return 0644;
1419                 break;
1420
1421         case hwmon_intrusion:
1422                 return 0644;
1423
1424         default: /* Shouldn't happen */
1425                 return 0;
1426         }
1427
1428         return 0; /* Shouldn't happen */
1429 }
1430
1431 static int
1432 w83627ehf_do_read_temp(struct w83627ehf_data *data, u32 attr,
1433                        int channel, long *val)
1434 {
1435         switch (attr) {
1436         case hwmon_temp_input:
1437                 *val = LM75_TEMP_FROM_REG(data->temp[channel]);
1438                 return 0;
1439         case hwmon_temp_max:
1440                 *val = LM75_TEMP_FROM_REG(data->temp_max[channel]);
1441                 return 0;
1442         case hwmon_temp_max_hyst:
1443                 *val = LM75_TEMP_FROM_REG(data->temp_max_hyst[channel]);
1444                 return 0;
1445         case hwmon_temp_offset:
1446                 *val = data->temp_offset[channel] * 1000;
1447                 return 0;
1448         case hwmon_temp_type:
1449                 *val = (int)data->temp_type[channel];
1450                 return 0;
1451         case hwmon_temp_alarm:
1452                 if (channel < 3) {
1453                         int bit[] = { 4, 5, 13 };
1454                         *val = (data->alarms >> bit[channel]) & 1;
1455                         return 0;
1456                 }
1457                 break;
1458
1459         default:
1460                 break;
1461         }
1462
1463         return -EOPNOTSUPP;
1464 }
1465
1466 static int
1467 w83627ehf_do_read_in(struct w83627ehf_data *data, u32 attr,
1468                      int channel, long *val)
1469 {
1470         switch (attr) {
1471         case hwmon_in_input:
1472                 *val = in_from_reg(data->in[channel], channel, data->scale_in);
1473                 return 0;
1474         case hwmon_in_min:
1475                 *val = in_from_reg(data->in_min[channel], channel,
1476                                    data->scale_in);
1477                 return 0;
1478         case hwmon_in_max:
1479                 *val = in_from_reg(data->in_max[channel], channel,
1480                                    data->scale_in);
1481                 return 0;
1482         case hwmon_in_alarm:
1483                 if (channel < 10) {
1484                         int bit[] = { 0, 1, 2, 3, 8, 21, 20, 16, 17, 19 };
1485                         *val = (data->alarms >> bit[channel]) & 1;
1486                         return 0;
1487                 }
1488                 break;
1489         default:
1490                 break;
1491         }
1492         return -EOPNOTSUPP;
1493 }
1494
1495 static int
1496 w83627ehf_do_read_fan(struct w83627ehf_data *data, u32 attr,
1497                       int channel, long *val)
1498 {
1499         switch (attr) {
1500         case hwmon_fan_input:
1501                 *val = data->rpm[channel];
1502                 return 0;
1503         case hwmon_fan_min:
1504                 *val = fan_from_reg8(data->fan_min[channel],
1505                                      data->fan_div[channel]);
1506                 return 0;
1507         case hwmon_fan_div:
1508                 *val = div_from_reg(data->fan_div[channel]);
1509                 return 0;
1510         case hwmon_fan_alarm:
1511                 if (channel < 5) {
1512                         int bit[] = { 6, 7, 11, 10, 23 };
1513                         *val = (data->alarms >> bit[channel]) & 1;
1514                         return 0;
1515                 }
1516                 break;
1517         default:
1518                 break;
1519         }
1520         return -EOPNOTSUPP;
1521 }
1522
1523 static int
1524 w83627ehf_do_read_pwm(struct w83627ehf_data *data, u32 attr,
1525                       int channel, long *val)
1526 {
1527         switch (attr) {
1528         case hwmon_pwm_input:
1529                 *val = data->pwm[channel];
1530                 return 0;
1531         case hwmon_pwm_enable:
1532                 *val = data->pwm_enable[channel];
1533                 return 0;
1534         case hwmon_pwm_mode:
1535                 *val = data->pwm_enable[channel];
1536                 return 0;
1537         default:
1538                 break;
1539         }
1540         return -EOPNOTSUPP;
1541 }
1542
1543 static int
1544 w83627ehf_do_read_intrusion(struct w83627ehf_data *data, u32 attr,
1545                             int channel, long *val)
1546 {
1547         if (attr != hwmon_intrusion_alarm || channel != 0)
1548                 return -EOPNOTSUPP; /* shouldn't happen */
1549
1550         *val = !!(data->caseopen & 0x10);
1551         return 0;
1552 }
1553
1554 static int
1555 w83627ehf_read(struct device *dev, enum hwmon_sensor_types type,
1556                         u32 attr, int channel, long *val)
1557 {
1558         struct w83627ehf_data *data = w83627ehf_update_device(dev->parent);
1559
1560         switch (type) {
1561         case hwmon_fan:
1562                 return w83627ehf_do_read_fan(data, attr, channel, val);
1563
1564         case hwmon_in:
1565                 return w83627ehf_do_read_in(data, attr, channel, val);
1566
1567         case hwmon_pwm:
1568                 return w83627ehf_do_read_pwm(data, attr, channel, val);
1569
1570         case hwmon_temp:
1571                 return w83627ehf_do_read_temp(data, attr, channel, val);
1572
1573         case hwmon_intrusion:
1574                 return w83627ehf_do_read_intrusion(data, attr, channel, val);
1575
1576         default:
1577                 break;
1578         }
1579
1580         return -EOPNOTSUPP;
1581 }
1582
1583 static int
1584 w83627ehf_read_string(struct device *dev, enum hwmon_sensor_types type,
1585                       u32 attr, int channel, const char **str)
1586 {
1587         struct w83627ehf_data *data = dev_get_drvdata(dev);
1588
1589         switch (type) {
1590         case hwmon_temp:
1591                 if (attr == hwmon_temp_label) {
1592                         *str = data->temp_label[data->temp_src[channel]];
1593                         return 0;
1594                 }
1595                 break;
1596
1597         default:
1598                 break;
1599         }
1600         /* Nothing else should be read as a string */
1601         return -EOPNOTSUPP;
1602 }
1603
1604 static int
1605 w83627ehf_write(struct device *dev, enum hwmon_sensor_types type,
1606                         u32 attr, int channel, long val)
1607 {
1608         struct w83627ehf_data *data = dev_get_drvdata(dev);
1609
1610         if (type == hwmon_in && attr == hwmon_in_min)
1611                 return store_in_min(dev, data, channel, val);
1612         if (type == hwmon_in && attr == hwmon_in_max)
1613                 return store_in_max(dev, data, channel, val);
1614
1615         if (type == hwmon_fan && attr == hwmon_fan_min)
1616                 return store_fan_min(dev, data, channel, val);
1617
1618         if (type == hwmon_temp && attr == hwmon_temp_max)
1619                 return store_temp_max(dev, data, channel, val);
1620         if (type == hwmon_temp && attr == hwmon_temp_max_hyst)
1621                 return store_temp_max_hyst(dev, data, channel, val);
1622         if (type == hwmon_temp && attr == hwmon_temp_offset)
1623                 return store_temp_offset(dev, data, channel, val);
1624
1625         if (type == hwmon_pwm && attr == hwmon_pwm_mode)
1626                 return store_pwm_mode(dev, data, channel, val);
1627         if (type == hwmon_pwm && attr == hwmon_pwm_enable)
1628                 return store_pwm_enable(dev, data, channel, val);
1629         if (type == hwmon_pwm && attr == hwmon_pwm_input)
1630                 return store_pwm(dev, data, channel, val);
1631
1632         if (type == hwmon_intrusion && attr == hwmon_intrusion_alarm)
1633                 return clear_caseopen(dev, data, channel, val);
1634
1635         return -EOPNOTSUPP;
1636 }
1637
1638 static const struct hwmon_ops w83627ehf_ops = {
1639         .is_visible = w83627ehf_is_visible,
1640         .read = w83627ehf_read,
1641         .read_string = w83627ehf_read_string,
1642         .write = w83627ehf_write,
1643 };
1644
1645 static const struct hwmon_channel_info *w83627ehf_info[] = {
1646         HWMON_CHANNEL_INFO(fan,
1647                 HWMON_F_ALARM | HWMON_F_DIV | HWMON_F_INPUT | HWMON_F_MIN,
1648                 HWMON_F_ALARM | HWMON_F_DIV | HWMON_F_INPUT | HWMON_F_MIN,
1649                 HWMON_F_ALARM | HWMON_F_DIV | HWMON_F_INPUT | HWMON_F_MIN,
1650                 HWMON_F_ALARM | HWMON_F_DIV | HWMON_F_INPUT | HWMON_F_MIN,
1651                 HWMON_F_ALARM | HWMON_F_DIV | HWMON_F_INPUT | HWMON_F_MIN),
1652         HWMON_CHANNEL_INFO(in,
1653                 HWMON_I_ALARM | HWMON_I_INPUT | HWMON_I_MAX | HWMON_I_MIN,
1654                 HWMON_I_ALARM | HWMON_I_INPUT | HWMON_I_MAX | HWMON_I_MIN,
1655                 HWMON_I_ALARM | HWMON_I_INPUT | HWMON_I_MAX | HWMON_I_MIN,
1656                 HWMON_I_ALARM | HWMON_I_INPUT | HWMON_I_MAX | HWMON_I_MIN,
1657                 HWMON_I_ALARM | HWMON_I_INPUT | HWMON_I_MAX | HWMON_I_MIN,
1658                 HWMON_I_ALARM | HWMON_I_INPUT | HWMON_I_MAX | HWMON_I_MIN,
1659                 HWMON_I_ALARM | HWMON_I_INPUT | HWMON_I_MAX | HWMON_I_MIN,
1660                 HWMON_I_ALARM | HWMON_I_INPUT | HWMON_I_MAX | HWMON_I_MIN,
1661                 HWMON_I_ALARM | HWMON_I_INPUT | HWMON_I_MAX | HWMON_I_MIN,
1662                 HWMON_I_ALARM | HWMON_I_INPUT | HWMON_I_MAX | HWMON_I_MIN),
1663         HWMON_CHANNEL_INFO(pwm,
1664                 HWMON_PWM_ENABLE | HWMON_PWM_INPUT | HWMON_PWM_MODE,
1665                 HWMON_PWM_ENABLE | HWMON_PWM_INPUT | HWMON_PWM_MODE,
1666                 HWMON_PWM_ENABLE | HWMON_PWM_INPUT | HWMON_PWM_MODE,
1667                 HWMON_PWM_ENABLE | HWMON_PWM_INPUT | HWMON_PWM_MODE),
1668         HWMON_CHANNEL_INFO(temp,
1669                 HWMON_T_ALARM | HWMON_T_INPUT | HWMON_T_LABEL | HWMON_T_MAX |
1670                         HWMON_T_MAX_HYST | HWMON_T_OFFSET | HWMON_T_TYPE,
1671                 HWMON_T_ALARM | HWMON_T_INPUT | HWMON_T_LABEL | HWMON_T_MAX |
1672                         HWMON_T_MAX_HYST | HWMON_T_OFFSET | HWMON_T_TYPE,
1673                 HWMON_T_ALARM | HWMON_T_INPUT | HWMON_T_LABEL | HWMON_T_MAX |
1674                         HWMON_T_MAX_HYST | HWMON_T_OFFSET | HWMON_T_TYPE,
1675                 HWMON_T_ALARM | HWMON_T_INPUT | HWMON_T_LABEL | HWMON_T_MAX |
1676                         HWMON_T_MAX_HYST | HWMON_T_OFFSET | HWMON_T_TYPE,
1677                 HWMON_T_ALARM | HWMON_T_INPUT | HWMON_T_LABEL | HWMON_T_MAX |
1678                         HWMON_T_MAX_HYST | HWMON_T_OFFSET | HWMON_T_TYPE,
1679                 HWMON_T_ALARM | HWMON_T_INPUT | HWMON_T_LABEL | HWMON_T_MAX |
1680                         HWMON_T_MAX_HYST | HWMON_T_OFFSET | HWMON_T_TYPE,
1681                 HWMON_T_ALARM | HWMON_T_INPUT | HWMON_T_LABEL | HWMON_T_MAX |
1682                         HWMON_T_MAX_HYST | HWMON_T_OFFSET | HWMON_T_TYPE,
1683                 HWMON_T_ALARM | HWMON_T_INPUT | HWMON_T_LABEL | HWMON_T_MAX |
1684                         HWMON_T_MAX_HYST | HWMON_T_OFFSET | HWMON_T_TYPE,
1685                 HWMON_T_ALARM | HWMON_T_INPUT | HWMON_T_LABEL | HWMON_T_MAX |
1686                         HWMON_T_MAX_HYST | HWMON_T_OFFSET | HWMON_T_TYPE),
1687         HWMON_CHANNEL_INFO(intrusion,
1688                 HWMON_INTRUSION_ALARM),
1689         NULL
1690 };
1691
1692 static const struct hwmon_chip_info w83627ehf_chip_info = {
1693         .ops = &w83627ehf_ops,
1694         .info = w83627ehf_info,
1695 };
1696
1697 static int w83627ehf_probe(struct platform_device *pdev)
1698 {
1699         struct device *dev = &pdev->dev;
1700         struct w83627ehf_sio_data *sio_data = dev_get_platdata(dev);
1701         struct w83627ehf_data *data;
1702         struct resource *res;
1703         u8 en_vrm10;
1704         int i, err = 0;
1705         struct device *hwmon_dev;
1706
1707         res = platform_get_resource(pdev, IORESOURCE_IO, 0);
1708         if (!request_region(res->start, IOREGION_LENGTH, DRVNAME)) {
1709                 err = -EBUSY;
1710                 dev_err(dev, "Failed to request region 0x%lx-0x%lx\n",
1711                         (unsigned long)res->start,
1712                         (unsigned long)res->start + IOREGION_LENGTH - 1);
1713                 goto exit;
1714         }
1715
1716         data = devm_kzalloc(&pdev->dev, sizeof(struct w83627ehf_data),
1717                             GFP_KERNEL);
1718         if (!data) {
1719                 err = -ENOMEM;
1720                 goto exit_release;
1721         }
1722
1723         data->addr = res->start;
1724         mutex_init(&data->lock);
1725         mutex_init(&data->update_lock);
1726         data->name = w83627ehf_device_names[sio_data->kind];
1727         data->bank = 0xff;              /* Force initial bank selection */
1728         platform_set_drvdata(pdev, data);
1729
1730         /* 627EHG and 627EHF have 10 voltage inputs; 627DHG and 667HG have 9 */
1731         data->in_num = (sio_data->kind == w83627ehf) ? 10 : 9;
1732         /* 667HG has 3 pwms, and 627UHG has only 2 */
1733         switch (sio_data->kind) {
1734         default:
1735                 data->pwm_num = 4;
1736                 break;
1737         case w83667hg:
1738         case w83667hg_b:
1739                 data->pwm_num = 3;
1740                 break;
1741         case w83627uhg:
1742                 data->pwm_num = 2;
1743                 break;
1744         }
1745
1746         /* Default to 3 temperature inputs, code below will adjust as needed */
1747         data->have_temp = 0x07;
1748
1749         /* Deal with temperature register setup first. */
1750         if (sio_data->kind == w83667hg_b) {
1751                 u8 reg;
1752
1753                 w83627ehf_set_temp_reg_ehf(data, 4);
1754
1755                 /*
1756                  * Temperature sources are selected with bank 0, registers 0x49
1757                  * and 0x4a.
1758                  */
1759                 reg = w83627ehf_read_value(data, 0x4a);
1760                 data->temp_src[0] = reg >> 5;
1761                 reg = w83627ehf_read_value(data, 0x49);
1762                 data->temp_src[1] = reg & 0x07;
1763                 data->temp_src[2] = (reg >> 4) & 0x07;
1764
1765                 /*
1766                  * W83667HG-B has another temperature register at 0x7e.
1767                  * The temperature source is selected with register 0x7d.
1768                  * Support it if the source differs from already reported
1769                  * sources.
1770                  */
1771                 reg = w83627ehf_read_value(data, 0x7d);
1772                 reg &= 0x07;
1773                 if (reg != data->temp_src[0] && reg != data->temp_src[1]
1774                     && reg != data->temp_src[2]) {
1775                         data->temp_src[3] = reg;
1776                         data->have_temp |= 1 << 3;
1777                 }
1778
1779                 /*
1780                  * Chip supports either AUXTIN or VIN3. Try to find out which
1781                  * one.
1782                  */
1783                 reg = w83627ehf_read_value(data, W83627EHF_REG_TEMP_CONFIG[2]);
1784                 if (data->temp_src[2] == 2 && (reg & 0x01))
1785                         data->have_temp &= ~(1 << 2);
1786
1787                 if ((data->temp_src[2] == 2 && (data->have_temp & (1 << 2)))
1788                     || (data->temp_src[3] == 2 && (data->have_temp & (1 << 3))))
1789                         data->in6_skip = 1;
1790
1791                 data->temp_label = w83667hg_b_temp_label;
1792                 data->have_temp_offset = data->have_temp & 0x07;
1793                 for (i = 0; i < 3; i++) {
1794                         if (data->temp_src[i] > 2)
1795                                 data->have_temp_offset &= ~(1 << i);
1796                 }
1797         } else if (sio_data->kind == w83627uhg) {
1798                 u8 reg;
1799
1800                 w83627ehf_set_temp_reg_ehf(data, 3);
1801
1802                 /*
1803                  * Temperature sources for temp2 and temp3 are selected with
1804                  * bank 0, registers 0x49 and 0x4a.
1805                  */
1806                 data->temp_src[0] = 0;  /* SYSTIN */
1807                 reg = w83627ehf_read_value(data, 0x49) & 0x07;
1808                 /* Adjust to have the same mapping as other source registers */
1809                 if (reg == 0)
1810                         data->temp_src[1] = 1;
1811                 else if (reg >= 2 && reg <= 5)
1812                         data->temp_src[1] = reg + 2;
1813                 else    /* should never happen */
1814                         data->have_temp &= ~(1 << 1);
1815                 reg = w83627ehf_read_value(data, 0x4a);
1816                 data->temp_src[2] = reg >> 5;
1817
1818                 /*
1819                  * Skip temp3 if source is invalid or the same as temp1
1820                  * or temp2.
1821                  */
1822                 if (data->temp_src[2] == 2 || data->temp_src[2] == 3 ||
1823                     data->temp_src[2] == data->temp_src[0] ||
1824                     ((data->have_temp & (1 << 1)) &&
1825                      data->temp_src[2] == data->temp_src[1]))
1826                         data->have_temp &= ~(1 << 2);
1827                 else
1828                         data->temp3_val_only = 1;       /* No limit regs */
1829
1830                 data->in6_skip = 1;                     /* No VIN3 */
1831
1832                 data->temp_label = w83667hg_b_temp_label;
1833                 data->have_temp_offset = data->have_temp & 0x03;
1834                 for (i = 0; i < 3; i++) {
1835                         if (data->temp_src[i] > 1)
1836                                 data->have_temp_offset &= ~(1 << i);
1837                 }
1838         } else {
1839                 w83627ehf_set_temp_reg_ehf(data, 3);
1840
1841                 /* Temperature sources are fixed */
1842
1843                 if (sio_data->kind == w83667hg) {
1844                         u8 reg;
1845
1846                         /*
1847                          * Chip supports either AUXTIN or VIN3. Try to find
1848                          * out which one.
1849                          */
1850                         reg = w83627ehf_read_value(data,
1851                                                 W83627EHF_REG_TEMP_CONFIG[2]);
1852                         if (reg & 0x01)
1853                                 data->have_temp &= ~(1 << 2);
1854                         else
1855                                 data->in6_skip = 1;
1856                 }
1857                 data->have_temp_offset = data->have_temp & 0x07;
1858         }
1859
1860         if (sio_data->kind == w83667hg_b) {
1861                 data->REG_FAN_MAX_OUTPUT =
1862                   W83627EHF_REG_FAN_MAX_OUTPUT_W83667_B;
1863                 data->REG_FAN_STEP_OUTPUT =
1864                   W83627EHF_REG_FAN_STEP_OUTPUT_W83667_B;
1865         } else {
1866                 data->REG_FAN_MAX_OUTPUT =
1867                   W83627EHF_REG_FAN_MAX_OUTPUT_COMMON;
1868                 data->REG_FAN_STEP_OUTPUT =
1869                   W83627EHF_REG_FAN_STEP_OUTPUT_COMMON;
1870         }
1871
1872         /* Setup input voltage scaling factors */
1873         if (sio_data->kind == w83627uhg)
1874                 data->scale_in = scale_in_w83627uhg;
1875         else
1876                 data->scale_in = scale_in_common;
1877
1878         /* Initialize the chip */
1879         w83627ehf_init_device(data, sio_data->kind);
1880
1881         data->vrm = vid_which_vrm();
1882
1883         err = superio_enter(sio_data->sioreg);
1884         if (err)
1885                 goto exit_release;
1886
1887         /* Read VID value */
1888         if (sio_data->kind == w83667hg || sio_data->kind == w83667hg_b) {
1889                 /*
1890                  * W83667HG has different pins for VID input and output, so
1891                  * we can get the VID input values directly at logical device D
1892                  * 0xe3.
1893                  */
1894                 superio_select(sio_data->sioreg, W83667HG_LD_VID);
1895                 data->vid = superio_inb(sio_data->sioreg, 0xe3);
1896                 data->have_vid = true;
1897         } else if (sio_data->kind != w83627uhg) {
1898                 superio_select(sio_data->sioreg, W83627EHF_LD_HWM);
1899                 if (superio_inb(sio_data->sioreg, SIO_REG_VID_CTRL) & 0x80) {
1900                         /*
1901                          * Set VID input sensibility if needed. In theory the
1902                          * BIOS should have set it, but in practice it's not
1903                          * always the case. We only do it for the W83627EHF/EHG
1904                          * because the W83627DHG is more complex in this
1905                          * respect.
1906                          */
1907                         if (sio_data->kind == w83627ehf) {
1908                                 en_vrm10 = superio_inb(sio_data->sioreg,
1909                                                        SIO_REG_EN_VRM10);
1910                                 if ((en_vrm10 & 0x08) && data->vrm == 90) {
1911                                         dev_warn(dev,
1912                                                  "Setting VID input voltage to TTL\n");
1913                                         superio_outb(sio_data->sioreg,
1914                                                      SIO_REG_EN_VRM10,
1915                                                      en_vrm10 & ~0x08);
1916                                 } else if (!(en_vrm10 & 0x08)
1917                                            && data->vrm == 100) {
1918                                         dev_warn(dev,
1919                                                  "Setting VID input voltage to VRM10\n");
1920                                         superio_outb(sio_data->sioreg,
1921                                                      SIO_REG_EN_VRM10,
1922                                                      en_vrm10 | 0x08);
1923                                 }
1924                         }
1925
1926                         data->vid = superio_inb(sio_data->sioreg,
1927                                                 SIO_REG_VID_DATA);
1928                         if (sio_data->kind == w83627ehf) /* 6 VID pins only */
1929                                 data->vid &= 0x3f;
1930                         data->have_vid = true;
1931                 } else {
1932                         dev_info(dev,
1933                                  "VID pins in output mode, CPU VID not available\n");
1934                 }
1935         }
1936
1937         w83627ehf_check_fan_inputs(sio_data, data);
1938
1939         superio_exit(sio_data->sioreg);
1940
1941         /* Read fan clock dividers immediately */
1942         w83627ehf_update_fan_div(data);
1943
1944         /* Read pwm data to save original values */
1945         w83627ehf_update_pwm(data);
1946         for (i = 0; i < data->pwm_num; i++)
1947                 data->pwm_enable_orig[i] = data->pwm_enable[i];
1948
1949         hwmon_dev = devm_hwmon_device_register_with_info(&pdev->dev,
1950                                                          data->name,
1951                                                          data,
1952                                                          &w83627ehf_chip_info,
1953                                                          w83627ehf_groups);
1954         if (IS_ERR(hwmon_dev)) {
1955                 err = PTR_ERR(hwmon_dev);
1956                 goto exit_release;
1957         }
1958
1959         return 0;
1960
1961 exit_release:
1962         release_region(res->start, IOREGION_LENGTH);
1963 exit:
1964         return err;
1965 }
1966
1967 static int w83627ehf_remove(struct platform_device *pdev)
1968 {
1969         struct w83627ehf_data *data = platform_get_drvdata(pdev);
1970
1971         release_region(data->addr, IOREGION_LENGTH);
1972
1973         return 0;
1974 }
1975
1976 #ifdef CONFIG_PM
1977 static int w83627ehf_suspend(struct device *dev)
1978 {
1979         struct w83627ehf_data *data = w83627ehf_update_device(dev);
1980
1981         mutex_lock(&data->update_lock);
1982         data->vbat = w83627ehf_read_value(data, W83627EHF_REG_VBAT);
1983         mutex_unlock(&data->update_lock);
1984
1985         return 0;
1986 }
1987
1988 static int w83627ehf_resume(struct device *dev)
1989 {
1990         struct w83627ehf_data *data = dev_get_drvdata(dev);
1991         int i;
1992
1993         mutex_lock(&data->update_lock);
1994         data->bank = 0xff;              /* Force initial bank selection */
1995
1996         /* Restore limits */
1997         for (i = 0; i < data->in_num; i++) {
1998                 if ((i == 6) && data->in6_skip)
1999                         continue;
2000
2001                 w83627ehf_write_value(data, W83627EHF_REG_IN_MIN(i),
2002                                       data->in_min[i]);
2003                 w83627ehf_write_value(data, W83627EHF_REG_IN_MAX(i),
2004                                       data->in_max[i]);
2005         }
2006
2007         for (i = 0; i < 5; i++) {
2008                 if (!(data->has_fan_min & (1 << i)))
2009                         continue;
2010
2011                 w83627ehf_write_value(data, W83627EHF_REG_FAN_MIN[i],
2012                                       data->fan_min[i]);
2013         }
2014
2015         for (i = 0; i < NUM_REG_TEMP; i++) {
2016                 if (!(data->have_temp & (1 << i)))
2017                         continue;
2018
2019                 if (data->reg_temp_over[i])
2020                         w83627ehf_write_temp(data, data->reg_temp_over[i],
2021                                              data->temp_max[i]);
2022                 if (data->reg_temp_hyst[i])
2023                         w83627ehf_write_temp(data, data->reg_temp_hyst[i],
2024                                              data->temp_max_hyst[i]);
2025                 if (i > 2)
2026                         continue;
2027                 if (data->have_temp_offset & (1 << i))
2028                         w83627ehf_write_value(data,
2029                                               W83627EHF_REG_TEMP_OFFSET[i],
2030                                               data->temp_offset[i]);
2031         }
2032
2033         /* Restore other settings */
2034         w83627ehf_write_value(data, W83627EHF_REG_VBAT, data->vbat);
2035
2036         /* Force re-reading all values */
2037         data->valid = 0;
2038         mutex_unlock(&data->update_lock);
2039
2040         return 0;
2041 }
2042
2043 static const struct dev_pm_ops w83627ehf_dev_pm_ops = {
2044         .suspend = w83627ehf_suspend,
2045         .resume = w83627ehf_resume,
2046         .freeze = w83627ehf_suspend,
2047         .restore = w83627ehf_resume,
2048 };
2049
2050 #define W83627EHF_DEV_PM_OPS    (&w83627ehf_dev_pm_ops)
2051 #else
2052 #define W83627EHF_DEV_PM_OPS    NULL
2053 #endif /* CONFIG_PM */
2054
2055 static struct platform_driver w83627ehf_driver = {
2056         .driver = {
2057                 .name   = DRVNAME,
2058                 .pm     = W83627EHF_DEV_PM_OPS,
2059         },
2060         .probe          = w83627ehf_probe,
2061         .remove         = w83627ehf_remove,
2062 };
2063
2064 /* w83627ehf_find() looks for a '627 in the Super-I/O config space */
2065 static int __init w83627ehf_find(int sioaddr, unsigned short *addr,
2066                                  struct w83627ehf_sio_data *sio_data)
2067 {
2068         static const char sio_name_W83627EHF[] __initconst = "W83627EHF";
2069         static const char sio_name_W83627EHG[] __initconst = "W83627EHG";
2070         static const char sio_name_W83627DHG[] __initconst = "W83627DHG";
2071         static const char sio_name_W83627DHG_P[] __initconst = "W83627DHG-P";
2072         static const char sio_name_W83627UHG[] __initconst = "W83627UHG";
2073         static const char sio_name_W83667HG[] __initconst = "W83667HG";
2074         static const char sio_name_W83667HG_B[] __initconst = "W83667HG-B";
2075
2076         u16 val;
2077         const char *sio_name;
2078         int err;
2079
2080         err = superio_enter(sioaddr);
2081         if (err)
2082                 return err;
2083
2084         if (force_id)
2085                 val = force_id;
2086         else
2087                 val = (superio_inb(sioaddr, SIO_REG_DEVID) << 8)
2088                     | superio_inb(sioaddr, SIO_REG_DEVID + 1);
2089         switch (val & SIO_ID_MASK) {
2090         case SIO_W83627EHF_ID:
2091                 sio_data->kind = w83627ehf;
2092                 sio_name = sio_name_W83627EHF;
2093                 break;
2094         case SIO_W83627EHG_ID:
2095                 sio_data->kind = w83627ehf;
2096                 sio_name = sio_name_W83627EHG;
2097                 break;
2098         case SIO_W83627DHG_ID:
2099                 sio_data->kind = w83627dhg;
2100                 sio_name = sio_name_W83627DHG;
2101                 break;
2102         case SIO_W83627DHG_P_ID:
2103                 sio_data->kind = w83627dhg_p;
2104                 sio_name = sio_name_W83627DHG_P;
2105                 break;
2106         case SIO_W83627UHG_ID:
2107                 sio_data->kind = w83627uhg;
2108                 sio_name = sio_name_W83627UHG;
2109                 break;
2110         case SIO_W83667HG_ID:
2111                 sio_data->kind = w83667hg;
2112                 sio_name = sio_name_W83667HG;
2113                 break;
2114         case SIO_W83667HG_B_ID:
2115                 sio_data->kind = w83667hg_b;
2116                 sio_name = sio_name_W83667HG_B;
2117                 break;
2118         default:
2119                 if (val != 0xffff)
2120                         pr_debug("unsupported chip ID: 0x%04x\n", val);
2121                 superio_exit(sioaddr);
2122                 return -ENODEV;
2123         }
2124
2125         /* We have a known chip, find the HWM I/O address */
2126         superio_select(sioaddr, W83627EHF_LD_HWM);
2127         val = (superio_inb(sioaddr, SIO_REG_ADDR) << 8)
2128             | superio_inb(sioaddr, SIO_REG_ADDR + 1);
2129         *addr = val & IOREGION_ALIGNMENT;
2130         if (*addr == 0) {
2131                 pr_err("Refusing to enable a Super-I/O device with a base I/O port 0\n");
2132                 superio_exit(sioaddr);
2133                 return -ENODEV;
2134         }
2135
2136         /* Activate logical device if needed */
2137         val = superio_inb(sioaddr, SIO_REG_ENABLE);
2138         if (!(val & 0x01)) {
2139                 pr_warn("Forcibly enabling Super-I/O. Sensor is probably unusable.\n");
2140                 superio_outb(sioaddr, SIO_REG_ENABLE, val | 0x01);
2141         }
2142
2143         superio_exit(sioaddr);
2144         pr_info("Found %s chip at %#x\n", sio_name, *addr);
2145         sio_data->sioreg = sioaddr;
2146
2147         return 0;
2148 }
2149
2150 /*
2151  * when Super-I/O functions move to a separate file, the Super-I/O
2152  * bus will manage the lifetime of the device and this module will only keep
2153  * track of the w83627ehf driver. But since we platform_device_alloc(), we
2154  * must keep track of the device
2155  */
2156 static struct platform_device *pdev;
2157
2158 static int __init sensors_w83627ehf_init(void)
2159 {
2160         int err;
2161         unsigned short address;
2162         struct resource res;
2163         struct w83627ehf_sio_data sio_data;
2164
2165         /*
2166          * initialize sio_data->kind and sio_data->sioreg.
2167          *
2168          * when Super-I/O functions move to a separate file, the Super-I/O
2169          * driver will probe 0x2e and 0x4e and auto-detect the presence of a
2170          * w83627ehf hardware monitor, and call probe()
2171          */
2172         if (w83627ehf_find(0x2e, &address, &sio_data) &&
2173             w83627ehf_find(0x4e, &address, &sio_data))
2174                 return -ENODEV;
2175
2176         err = platform_driver_register(&w83627ehf_driver);
2177         if (err)
2178                 goto exit;
2179
2180         pdev = platform_device_alloc(DRVNAME, address);
2181         if (!pdev) {
2182                 err = -ENOMEM;
2183                 pr_err("Device allocation failed\n");
2184                 goto exit_unregister;
2185         }
2186
2187         err = platform_device_add_data(pdev, &sio_data,
2188                                        sizeof(struct w83627ehf_sio_data));
2189         if (err) {
2190                 pr_err("Platform data allocation failed\n");
2191                 goto exit_device_put;
2192         }
2193
2194         memset(&res, 0, sizeof(res));
2195         res.name = DRVNAME;
2196         res.start = address + IOREGION_OFFSET;
2197         res.end = address + IOREGION_OFFSET + IOREGION_LENGTH - 1;
2198         res.flags = IORESOURCE_IO;
2199
2200         err = acpi_check_resource_conflict(&res);
2201         if (err)
2202                 goto exit_device_put;
2203
2204         err = platform_device_add_resources(pdev, &res, 1);
2205         if (err) {
2206                 pr_err("Device resource addition failed (%d)\n", err);
2207                 goto exit_device_put;
2208         }
2209
2210         /* platform_device_add calls probe() */
2211         err = platform_device_add(pdev);
2212         if (err) {
2213                 pr_err("Device addition failed (%d)\n", err);
2214                 goto exit_device_put;
2215         }
2216
2217         return 0;
2218
2219 exit_device_put:
2220         platform_device_put(pdev);
2221 exit_unregister:
2222         platform_driver_unregister(&w83627ehf_driver);
2223 exit:
2224         return err;
2225 }
2226
2227 static void __exit sensors_w83627ehf_exit(void)
2228 {
2229         platform_device_unregister(pdev);
2230         platform_driver_unregister(&w83627ehf_driver);
2231 }
2232
2233 MODULE_AUTHOR("Jean Delvare <jdelvare@suse.de>");
2234 MODULE_DESCRIPTION("W83627EHF driver");
2235 MODULE_LICENSE("GPL");
2236
2237 module_init(sensors_w83627ehf_init);
2238 module_exit(sensors_w83627ehf_exit);