drivers/gpu/drm/tilcdc/tilcdc_drv.c

   1 /*
   2  * Copyright (C) 2012 Texas Instruments
   3  * Author: Rob Clark <robdclark@gmail.com>
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 as published by
   7  * the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program.  If not, see <http://www.gnu.org/licenses/>.
  16  */
  17
  18 /* LCDC DRM driver, based on da8xx-fb */
  19
  20 #include <linux/component.h>
  21 #include <linux/mod_devicetable.h>
  22 #include <linux/module.h>
  23 #include <linux/pinctrl/consumer.h>
  24 #include <linux/platform_device.h>
  25 #include <linux/pm_runtime.h>
  26
  27 #include <drm/drm_atomic_helper.h>
  28 #include <drm/drm_debugfs.h>
  29 #include <drm/drm_drv.h>
  30 #include <drm/drm_fb_helper.h>
  31 #include <drm/drm_fourcc.h>
  32 #include <drm/drm_gem_cma_helper.h>
  33 #include <drm/drm_gem_framebuffer_helper.h>
  34 #include <drm/drm_irq.h>
  35 #include <drm/drm_mm.h>
  36 #include <drm/drm_probe_helper.h>
  37 #include <drm/drm_vblank.h>
  38
  39
  40 #include "tilcdc_drv.h"
  41 #include "tilcdc_external.h"
  42 #include "tilcdc_panel.h"
  43 #include "tilcdc_regs.h"
  44 #include "tilcdc_tfp410.h"
  45
  46 static LIST_HEAD(module_list);
  47
  48 static const u32 tilcdc_rev1_formats[] = { DRM_FORMAT_RGB565 };
  49
  50 static const u32 tilcdc_straight_formats[] = { DRM_FORMAT_RGB565,
  51                                                DRM_FORMAT_BGR888,
  52                                                DRM_FORMAT_XBGR8888 };
  53
  54 static const u32 tilcdc_crossed_formats[] = { DRM_FORMAT_BGR565,
  55                                               DRM_FORMAT_RGB888,
  56                                               DRM_FORMAT_XRGB8888 };
  57
  58 static const u32 tilcdc_legacy_formats[] = { DRM_FORMAT_RGB565,
  59                                              DRM_FORMAT_RGB888,
  60                                              DRM_FORMAT_XRGB8888 };
  61
  62 void tilcdc_module_init(struct tilcdc_module *mod, const char *name,
  63                 const struct tilcdc_module_ops *funcs)
  64 {
  65         mod->name = name;
  66         mod->funcs = funcs;
  67         INIT_LIST_HEAD(&mod->list);
  68         list_add(&mod->list, &module_list);
  69 }
  70
  71 void tilcdc_module_cleanup(struct tilcdc_module *mod)
  72 {
  73         list_del(&mod->list);
  74 }
  75
  76 static struct of_device_id tilcdc_of_match[];
  77
  78 static struct drm_framebuffer *tilcdc_fb_create(struct drm_device *dev,
  79                 struct drm_file *file_priv, const struct drm_mode_fb_cmd2 *mode_cmd)
  80 {
  81         return drm_gem_fb_create(dev, file_priv, mode_cmd);
  82 }
  83
  84 static int tilcdc_atomic_check(struct drm_device *dev,
  85                                struct drm_atomic_state *state)
  86 {
  87         int ret;
  88
  89         ret = drm_atomic_helper_check_modeset(dev, state);
  90         if (ret)
  91                 return ret;
  92
  93         ret = drm_atomic_helper_check_planes(dev, state);
  94         if (ret)
  95                 return ret;
  96
  97         /*
  98          * tilcdc ->atomic_check can update ->mode_changed if pixel format
  99          * changes, hence will we check modeset changes again.
 100          */
 101         ret = drm_atomic_helper_check_modeset(dev, state);
 102         if (ret)
 103                 return ret;
 104
 105         return ret;
 106 }
 107
 108 static int tilcdc_commit(struct drm_device *dev,
 109                   struct drm_atomic_state *state,
 110                   bool async)
 111 {
 112         int ret;
 113
 114         ret = drm_atomic_helper_prepare_planes(dev, state);
 115         if (ret)
 116                 return ret;
 117
 118         ret = drm_atomic_helper_swap_state(state, true);
 119         if (ret) {
 120                 drm_atomic_helper_cleanup_planes(dev, state);
 121                 return ret;
 122         }
 123
 124         /*
 125          * Everything below can be run asynchronously without the need to grab
 126          * any modeset locks at all under one condition: It must be guaranteed
 127          * that the asynchronous work has either been cancelled (if the driver
 128          * supports it, which at least requires that the framebuffers get
 129          * cleaned up with drm_atomic_helper_cleanup_planes()) or completed
 130          * before the new state gets committed on the software side with
 131          * drm_atomic_helper_swap_state().
 132          *
 133          * This scheme allows new atomic state updates to be prepared and
 134          * checked in parallel to the asynchronous completion of the previous
 135          * update. Which is important since compositors need to figure out the
 136          * composition of the next frame right after having submitted the
 137          * current layout.
 138          */
 139
 140         drm_atomic_helper_commit_modeset_disables(dev, state);
 141
 142         drm_atomic_helper_commit_planes(dev, state, 0);
 143
 144         drm_atomic_helper_commit_modeset_enables(dev, state);
 145
 146         drm_atomic_helper_wait_for_vblanks(dev, state);
 147
 148         drm_atomic_helper_cleanup_planes(dev, state);
 149
 150         return 0;
 151 }
 152
 153 static const struct drm_mode_config_funcs mode_config_funcs = {
 154         .fb_create = tilcdc_fb_create,
 155         .atomic_check = tilcdc_atomic_check,
 156         .atomic_commit = tilcdc_commit,
 157 };
 158
 159 static void modeset_init(struct drm_device *dev)
 160 {
 161         struct tilcdc_drm_private *priv = dev->dev_private;
 162         struct tilcdc_module *mod;
 163
 164         list_for_each_entry(mod, &module_list, list) {
 165                 DBG("loading module: %s", mod->name);
 166                 mod->funcs->modeset_init(mod, dev);
 167         }
 168
 169         dev->mode_config.min_width = 0;
 170         dev->mode_config.min_height = 0;
 171         dev->mode_config.max_width = tilcdc_crtc_max_width(priv->crtc);
 172         dev->mode_config.max_height = 2048;
 173         dev->mode_config.funcs = &mode_config_funcs;
 174 }
 175
 176 #ifdef CONFIG_CPU_FREQ
 177 static int cpufreq_transition(struct notifier_block *nb,
 178                                      unsigned long val, void *data)
 179 {
 180         struct tilcdc_drm_private *priv = container_of(nb,
 181                         struct tilcdc_drm_private, freq_transition);
 182
 183         if (val == CPUFREQ_POSTCHANGE)
 184                 tilcdc_crtc_update_clk(priv->crtc);
 185
 186         return 0;
 187 }
 188 #endif
 189
 190 /*
 191  * DRM operations:
 192  */
 193
 194 static void tilcdc_fini(struct drm_device *dev)
 195 {
 196         struct tilcdc_drm_private *priv = dev->dev_private;
 197
 198 #ifdef CONFIG_CPU_FREQ
 199         if (priv->freq_transition.notifier_call)
 200                 cpufreq_unregister_notifier(&priv->freq_transition,
 201                                             CPUFREQ_TRANSITION_NOTIFIER);
 202 #endif
 203
 204         if (priv->crtc)
 205                 tilcdc_crtc_shutdown(priv->crtc);
 206
 207         if (priv->is_registered)
 208                 drm_dev_unregister(dev);
 209
 210         drm_kms_helper_poll_fini(dev);
 211         drm_irq_uninstall(dev);
 212         drm_mode_config_cleanup(dev);
 213         tilcdc_remove_external_device(dev);
 214
 215         if (priv->clk)
 216                 clk_put(priv->clk);
 217
 218         if (priv->mmio)
 219                 iounmap(priv->mmio);
 220
 221         if (priv->wq) {
 222                 flush_workqueue(priv->wq);
 223                 destroy_workqueue(priv->wq);
 224         }
 225
 226         dev->dev_private = NULL;
 227
 228         pm_runtime_disable(dev->dev);
 229
 230         drm_dev_put(dev);
 231 }
 232
 233 static int tilcdc_init(struct drm_driver *ddrv, struct device *dev)
 234 {
 235         struct drm_device *ddev;
 236         struct platform_device *pdev = to_platform_device(dev);
 237         struct device_node *node = dev->of_node;
 238         struct tilcdc_drm_private *priv;
 239         struct resource *res;
 240         u32 bpp = 0;
 241         int ret;
 242
 243         priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
 244         if (!priv)
 245                 return -ENOMEM;
 246
 247         ddev = drm_dev_alloc(ddrv, dev);
 248         if (IS_ERR(ddev))
 249                 return PTR_ERR(ddev);
 250
 251         ddev->dev_private = priv;
 252         platform_set_drvdata(pdev, ddev);
 253         drm_mode_config_init(ddev);
 254
 255         priv->is_componentized =
 256                 tilcdc_get_external_components(dev, NULL) > 0;
 257
 258         priv->wq = alloc_ordered_workqueue("tilcdc", 0);
 259         if (!priv->wq) {
 260                 ret = -ENOMEM;
 261                 goto init_failed;
 262         }
 263
 264         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 265         if (!res) {
 266                 dev_err(dev, "failed to get memory resource\n");
 267                 ret = -EINVAL;
 268                 goto init_failed;
 269         }
 270
 271         priv->mmio = ioremap_nocache(res->start, resource_size(res));
 272         if (!priv->mmio) {
 273                 dev_err(dev, "failed to ioremap\n");
 274                 ret = -ENOMEM;
 275                 goto init_failed;
 276         }
 277
 278         priv->clk = clk_get(dev, "fck");
 279         if (IS_ERR(priv->clk)) {
 280                 dev_err(dev, "failed to get functional clock\n");
 281                 ret = -ENODEV;
 282                 goto init_failed;
 283         }
 284
 285         if (of_property_read_u32(node, "max-bandwidth", &priv->max_bandwidth))
 286                 priv->max_bandwidth = TILCDC_DEFAULT_MAX_BANDWIDTH;
 287
 288         DBG("Maximum Bandwidth Value %d", priv->max_bandwidth);
 289
 290         if (of_property_read_u32(node, "max-width", &priv->max_width))
 291                 priv->max_width = TILCDC_DEFAULT_MAX_WIDTH;
 292
 293         DBG("Maximum Horizontal Pixel Width Value %dpixels", priv->max_width);
 294
 295         if (of_property_read_u32(node, "max-pixelclock",
 296                                         &priv->max_pixelclock))
 297                 priv->max_pixelclock = TILCDC_DEFAULT_MAX_PIXELCLOCK;
 298
 299         DBG("Maximum Pixel Clock Value %dKHz", priv->max_pixelclock);
 300
 301         pm_runtime_enable(dev);
 302
 303         /* Determine LCD IP Version */
 304         pm_runtime_get_sync(dev);
 305         switch (tilcdc_read(ddev, LCDC_PID_REG)) {
 306         case 0x4c100102:
 307                 priv->rev = 1;
 308                 break;
 309         case 0x4f200800:
 310         case 0x4f201000:
 311                 priv->rev = 2;
 312                 break;
 313         default:
 314                 dev_warn(dev, "Unknown PID Reg value 0x%08x, "
 315                         "defaulting to LCD revision 1\n",
 316                         tilcdc_read(ddev, LCDC_PID_REG));
 317                 priv->rev = 1;
 318                 break;
 319         }
 320
 321         pm_runtime_put_sync(dev);
 322
 323         if (priv->rev == 1) {
 324                 DBG("Revision 1 LCDC supports only RGB565 format");
 325                 priv->pixelformats = tilcdc_rev1_formats;
 326                 priv->num_pixelformats = ARRAY_SIZE(tilcdc_rev1_formats);
 327                 bpp = 16;
 328         } else {
 329                 const char *str = "\0";
 330
 331                 of_property_read_string(node, "blue-and-red-wiring", &str);
 332                 if (0 == strcmp(str, "crossed")) {
 333                         DBG("Configured for crossed blue and red wires");
 334                         priv->pixelformats = tilcdc_crossed_formats;
 335                         priv->num_pixelformats =
 336                                 ARRAY_SIZE(tilcdc_crossed_formats);
 337                         bpp = 32; /* Choose bpp with RGB support for fbdef */
 338                 } else if (0 == strcmp(str, "straight")) {
 339                         DBG("Configured for straight blue and red wires");
 340                         priv->pixelformats = tilcdc_straight_formats;
 341                         priv->num_pixelformats =
 342                                 ARRAY_SIZE(tilcdc_straight_formats);
 343                         bpp = 16; /* Choose bpp with RGB support for fbdef */
 344                 } else {
 345                         DBG("Blue and red wiring '%s' unknown, use legacy mode",
 346                             str);
 347                         priv->pixelformats = tilcdc_legacy_formats;
 348                         priv->num_pixelformats =
 349                                 ARRAY_SIZE(tilcdc_legacy_formats);
 350                         bpp = 16; /* This is just a guess */
 351                 }
 352         }
 353
 354         ret = tilcdc_crtc_create(ddev);
 355         if (ret < 0) {
 356                 dev_err(dev, "failed to create crtc\n");
 357                 goto init_failed;
 358         }
 359         modeset_init(ddev);
 360
 361 #ifdef CONFIG_CPU_FREQ
 362         priv->freq_transition.notifier_call = cpufreq_transition;
 363         ret = cpufreq_register_notifier(&priv->freq_transition,
 364                         CPUFREQ_TRANSITION_NOTIFIER);
 365         if (ret) {
 366                 dev_err(dev, "failed to register cpufreq notifier\n");
 367                 priv->freq_transition.notifier_call = NULL;
 368                 goto init_failed;
 369         }
 370 #endif
 371
 372         if (priv->is_componentized) {
 373                 ret = component_bind_all(dev, ddev);
 374                 if (ret < 0)
 375                         goto init_failed;
 376
 377                 ret = tilcdc_add_component_encoder(ddev);
 378                 if (ret < 0)
 379                         goto init_failed;
 380         } else {
 381                 ret = tilcdc_attach_external_device(ddev);
 382                 if (ret)
 383                         goto init_failed;
 384         }
 385
 386         if (!priv->external_connector &&
 387             ((priv->num_encoders == 0) || (priv->num_connectors == 0))) {
 388                 dev_err(dev, "no encoders/connectors found\n");
 389                 ret = -EPROBE_DEFER;
 390                 goto init_failed;
 391         }
 392
 393         ret = drm_vblank_init(ddev, 1);
 394         if (ret < 0) {
 395                 dev_err(dev, "failed to initialize vblank\n");
 396                 goto init_failed;
 397         }
 398
 399         ret = drm_irq_install(ddev, platform_get_irq(pdev, 0));
 400         if (ret < 0) {
 401                 dev_err(dev, "failed to install IRQ handler\n");
 402                 goto init_failed;
 403         }
 404
 405         drm_mode_config_reset(ddev);
 406
 407         drm_kms_helper_poll_init(ddev);
 408
 409         ret = drm_dev_register(ddev, 0);
 410         if (ret)
 411                 goto init_failed;
 412
 413         drm_fbdev_generic_setup(ddev, bpp);
 414
 415         priv->is_registered = true;
 416         return 0;
 417
 418 init_failed:
 419         tilcdc_fini(ddev);
 420
 421         return ret;
 422 }
 423
 424 static irqreturn_t tilcdc_irq(int irq, void *arg)
 425 {
 426         struct drm_device *dev = arg;
 427         struct tilcdc_drm_private *priv = dev->dev_private;
 428         return tilcdc_crtc_irq(priv->crtc);
 429 }
 430
 431 #if defined(CONFIG_DEBUG_FS)
 432 static const struct {
 433         const char *name;
 434         uint8_t  rev;
 435         uint8_t  save;
 436         uint32_t reg;
 437 } registers[] =         {
 438 #define REG(rev, save, reg) { #reg, rev, save, reg }
 439                 /* exists in revision 1: */
 440                 REG(1, false, LCDC_PID_REG),
 441                 REG(1, true,  LCDC_CTRL_REG),
 442                 REG(1, false, LCDC_STAT_REG),
 443                 REG(1, true,  LCDC_RASTER_CTRL_REG),
 444                 REG(1, true,  LCDC_RASTER_TIMING_0_REG),
 445                 REG(1, true,  LCDC_RASTER_TIMING_1_REG),
 446                 REG(1, true,  LCDC_RASTER_TIMING_2_REG),
 447                 REG(1, true,  LCDC_DMA_CTRL_REG),
 448                 REG(1, true,  LCDC_DMA_FB_BASE_ADDR_0_REG),
 449                 REG(1, true,  LCDC_DMA_FB_CEILING_ADDR_0_REG),
 450                 REG(1, true,  LCDC_DMA_FB_BASE_ADDR_1_REG),
 451                 REG(1, true,  LCDC_DMA_FB_CEILING_ADDR_1_REG),
 452                 /* new in revision 2: */
 453                 REG(2, false, LCDC_RAW_STAT_REG),
 454                 REG(2, false, LCDC_MASKED_STAT_REG),
 455                 REG(2, true, LCDC_INT_ENABLE_SET_REG),
 456                 REG(2, false, LCDC_INT_ENABLE_CLR_REG),
 457                 REG(2, false, LCDC_END_OF_INT_IND_REG),
 458                 REG(2, true,  LCDC_CLK_ENABLE_REG),
 459 #undef REG
 460 };
 461
 462 #endif
 463
 464 #ifdef CONFIG_DEBUG_FS
 465 static int tilcdc_regs_show(struct seq_file *m, void *arg)
 466 {
 467         struct drm_info_node *node = (struct drm_info_node *) m->private;
 468         struct drm_device *dev = node->minor->dev;
 469         struct tilcdc_drm_private *priv = dev->dev_private;
 470         unsigned i;
 471
 472         pm_runtime_get_sync(dev->dev);
 473
 474         seq_printf(m, "revision: %d\n", priv->rev);
 475
 476         for (i = 0; i < ARRAY_SIZE(registers); i++)
 477                 if (priv->rev >= registers[i].rev)
 478                         seq_printf(m, "%s:\t %08x\n", registers[i].name,
 479                                         tilcdc_read(dev, registers[i].reg));
 480
 481         pm_runtime_put_sync(dev->dev);
 482
 483         return 0;
 484 }
 485
 486 static int tilcdc_mm_show(struct seq_file *m, void *arg)
 487 {
 488         struct drm_info_node *node = (struct drm_info_node *) m->private;
 489         struct drm_device *dev = node->minor->dev;
 490         struct drm_printer p = drm_seq_file_printer(m);
 491         drm_mm_print(&dev->vma_offset_manager->vm_addr_space_mm, &p);
 492         return 0;
 493 }
 494
 495 static struct drm_info_list tilcdc_debugfs_list[] = {
 496                 { "regs", tilcdc_regs_show, 0 },
 497                 { "mm",   tilcdc_mm_show,   0 },
 498 };
 499
 500 static int tilcdc_debugfs_init(struct drm_minor *minor)
 501 {
 502         struct drm_device *dev = minor->dev;
 503         struct tilcdc_module *mod;
 504         int ret;
 505
 506         ret = drm_debugfs_create_files(tilcdc_debugfs_list,
 507                         ARRAY_SIZE(tilcdc_debugfs_list),
 508                         minor->debugfs_root, minor);
 509
 510         list_for_each_entry(mod, &module_list, list)
 511                 if (mod->funcs->debugfs_init)
 512                         mod->funcs->debugfs_init(mod, minor);
 513
 514         if (ret) {
 515                 dev_err(dev->dev, "could not install tilcdc_debugfs_list\n");
 516                 return ret;
 517         }
 518
 519         return ret;
 520 }
 521 #endif
 522
 523 DEFINE_DRM_GEM_CMA_FOPS(fops);
 524
 525 static struct drm_driver tilcdc_driver = {
 526         .driver_features    = DRIVER_GEM | DRIVER_MODESET | DRIVER_ATOMIC,
 527         .irq_handler        = tilcdc_irq,
 528         .gem_free_object_unlocked = drm_gem_cma_free_object,
 529         .gem_print_info     = drm_gem_cma_print_info,
 530         .gem_vm_ops         = &drm_gem_cma_vm_ops,
 531         .dumb_create        = drm_gem_cma_dumb_create,
 532
 533         .prime_handle_to_fd     = drm_gem_prime_handle_to_fd,
 534         .prime_fd_to_handle     = drm_gem_prime_fd_to_handle,
 535         .gem_prime_get_sg_table = drm_gem_cma_prime_get_sg_table,
 536         .gem_prime_import_sg_table = drm_gem_cma_prime_import_sg_table,
 537         .gem_prime_vmap         = drm_gem_cma_prime_vmap,
 538         .gem_prime_vunmap       = drm_gem_cma_prime_vunmap,
 539         .gem_prime_mmap         = drm_gem_cma_prime_mmap,
 540 #ifdef CONFIG_DEBUG_FS
 541         .debugfs_init       = tilcdc_debugfs_init,
 542 #endif
 543         .fops               = &fops,
 544         .name               = "tilcdc",
 545         .desc               = "TI LCD Controller DRM",
 546         .date               = "20121205",
 547         .major              = 1,
 548         .minor              = 0,
 549 };
 550
 551 /*
 552  * Power management:
 553  */
 554
 555 #ifdef CONFIG_PM_SLEEP
 556 static int tilcdc_pm_suspend(struct device *dev)
 557 {
 558         struct drm_device *ddev = dev_get_drvdata(dev);
 559         int ret = 0;
 560
 561         ret = drm_mode_config_helper_suspend(ddev);
 562
 563         /* Select sleep pin state */
 564         pinctrl_pm_select_sleep_state(dev);
 565
 566         return ret;
 567 }
 568
 569 static int tilcdc_pm_resume(struct device *dev)
 570 {
 571         struct drm_device *ddev = dev_get_drvdata(dev);
 572
 573         /* Select default pin state */
 574         pinctrl_pm_select_default_state(dev);
 575         return  drm_mode_config_helper_resume(ddev);
 576 }
 577 #endif
 578
 579 static const struct dev_pm_ops tilcdc_pm_ops = {
 580         SET_SYSTEM_SLEEP_PM_OPS(tilcdc_pm_suspend, tilcdc_pm_resume)
 581 };
 582
 583 /*
 584  * Platform driver:
 585  */
 586 static int tilcdc_bind(struct device *dev)
 587 {
 588         return tilcdc_init(&tilcdc_driver, dev);
 589 }
 590
 591 static void tilcdc_unbind(struct device *dev)
 592 {
 593         struct drm_device *ddev = dev_get_drvdata(dev);
 594
 595         /* Check if a subcomponent has already triggered the unloading. */
 596         if (!ddev->dev_private)
 597                 return;
 598
 599         tilcdc_fini(dev_get_drvdata(dev));
 600 }
 601
 602 static const struct component_master_ops tilcdc_comp_ops = {
 603         .bind = tilcdc_bind,
 604         .unbind = tilcdc_unbind,
 605 };
 606
 607 static int tilcdc_pdev_probe(struct platform_device *pdev)
 608 {
 609         struct component_match *match = NULL;
 610         int ret;
 611
 612         /* bail out early if no DT data: */
 613         if (!pdev->dev.of_node) {
 614                 dev_err(&pdev->dev, "device-tree data is missing\n");
 615                 return -ENXIO;
 616         }
 617
 618         ret = tilcdc_get_external_components(&pdev->dev, &match);
 619         if (ret < 0)
 620                 return ret;
 621         else if (ret == 0)
 622                 return tilcdc_init(&tilcdc_driver, &pdev->dev);
 623         else
 624                 return component_master_add_with_match(&pdev->dev,
 625                                                        &tilcdc_comp_ops,
 626                                                        match);
 627 }
 628
 629 static int tilcdc_pdev_remove(struct platform_device *pdev)
 630 {
 631         int ret;
 632
 633         ret = tilcdc_get_external_components(&pdev->dev, NULL);
 634         if (ret < 0)
 635                 return ret;
 636         else if (ret == 0)
 637                 tilcdc_fini(platform_get_drvdata(pdev));
 638         else
 639                 component_master_del(&pdev->dev, &tilcdc_comp_ops);
 640
 641         return 0;
 642 }
 643
 644 static struct of_device_id tilcdc_of_match[] = {
 645                 { .compatible = "ti,am33xx-tilcdc", },
 646                 { .compatible = "ti,da850-tilcdc", },
 647                 { },
 648 };
 649 MODULE_DEVICE_TABLE(of, tilcdc_of_match);
 650
 651 static struct platform_driver tilcdc_platform_driver = {
 652         .probe      = tilcdc_pdev_probe,
 653         .remove     = tilcdc_pdev_remove,
 654         .driver     = {
 655                 .name   = "tilcdc",
 656                 .pm     = &tilcdc_pm_ops,
 657                 .of_match_table = tilcdc_of_match,
 658         },
 659 };
 660
 661 static int __init tilcdc_drm_init(void)
 662 {
 663         DBG("init");
 664         tilcdc_tfp410_init();
 665         tilcdc_panel_init();
 666         return platform_driver_register(&tilcdc_platform_driver);
 667 }
 668
 669 static void __exit tilcdc_drm_fini(void)
 670 {
 671         DBG("fini");
 672         platform_driver_unregister(&tilcdc_platform_driver);
 673         tilcdc_panel_fini();
 674         tilcdc_tfp410_fini();
 675 }
 676
 677 module_init(tilcdc_drm_init);
 678 module_exit(tilcdc_drm_fini);
 679
 680 MODULE_AUTHOR("Rob Clark <robdclark@gmail.com");
 681 MODULE_DESCRIPTION("TI LCD Controller DRM Driver");
 682 MODULE_LICENSE("GPL");