drm/radeon: fix check order in radeon_bo_move
[linux-2.6-microblaze.git] / drivers / gpu / drm / radeon / radeon_ttm.c
1 /*
2  * Copyright 2009 Jerome Glisse.
3  * All Rights Reserved.
4  *
5  * Permission is hereby granted, free of charge, to any person obtaining a
6  * copy of this software and associated documentation files (the
7  * "Software"), to deal in the Software without restriction, including
8  * without limitation the rights to use, copy, modify, merge, publish,
9  * distribute, sub license, and/or sell copies of the Software, and to
10  * permit persons to whom the Software is furnished to do so, subject to
11  * the following conditions:
12  *
13  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
14  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
15  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
16  * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
17  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
18  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
19  * USE OR OTHER DEALINGS IN THE SOFTWARE.
20  *
21  * The above copyright notice and this permission notice (including the
22  * next paragraph) shall be included in all copies or substantial portions
23  * of the Software.
24  *
25  */
26 /*
27  * Authors:
28  *    Jerome Glisse <glisse@freedesktop.org>
29  *    Thomas Hellstrom <thomas-at-tungstengraphics-dot-com>
30  *    Dave Airlie
31  */
32
33 #include <linux/dma-mapping.h>
34 #include <linux/pagemap.h>
35 #include <linux/pci.h>
36 #include <linux/seq_file.h>
37 #include <linux/slab.h>
38 #include <linux/swap.h>
39 #include <linux/swiotlb.h>
40
41 #include <drm/drm_agpsupport.h>
42 #include <drm/drm_debugfs.h>
43 #include <drm/drm_device.h>
44 #include <drm/drm_file.h>
45 #include <drm/drm_prime.h>
46 #include <drm/radeon_drm.h>
47 #include <drm/ttm/ttm_bo_api.h>
48 #include <drm/ttm/ttm_bo_driver.h>
49 #include <drm/ttm/ttm_module.h>
50 #include <drm/ttm/ttm_placement.h>
51
52 #include "radeon_reg.h"
53 #include "radeon.h"
54
55 static int radeon_ttm_debugfs_init(struct radeon_device *rdev);
56 static void radeon_ttm_debugfs_fini(struct radeon_device *rdev);
57
58 static int radeon_ttm_tt_bind(struct ttm_bo_device *bdev,
59                               struct ttm_tt *ttm,
60                               struct ttm_resource *bo_mem);
61 static void radeon_ttm_tt_unbind(struct ttm_bo_device *bdev,
62                                  struct ttm_tt *ttm);
63
64 struct radeon_device *radeon_get_rdev(struct ttm_bo_device *bdev)
65 {
66         struct radeon_mman *mman;
67         struct radeon_device *rdev;
68
69         mman = container_of(bdev, struct radeon_mman, bdev);
70         rdev = container_of(mman, struct radeon_device, mman);
71         return rdev;
72 }
73
74 static int radeon_ttm_init_vram(struct radeon_device *rdev)
75 {
76         return ttm_range_man_init(&rdev->mman.bdev, TTM_PL_VRAM,
77                                   false, rdev->mc.real_vram_size >> PAGE_SHIFT);
78 }
79
80 static int radeon_ttm_init_gtt(struct radeon_device *rdev)
81 {
82         return ttm_range_man_init(&rdev->mman.bdev, TTM_PL_TT,
83                                   true, rdev->mc.gtt_size >> PAGE_SHIFT);
84 }
85
86 static void radeon_evict_flags(struct ttm_buffer_object *bo,
87                                 struct ttm_placement *placement)
88 {
89         static const struct ttm_place placements = {
90                 .fpfn = 0,
91                 .lpfn = 0,
92                 .mem_type = TTM_PL_SYSTEM,
93                 .flags = 0
94         };
95
96         struct radeon_bo *rbo;
97
98         if (!radeon_ttm_bo_is_radeon_bo(bo)) {
99                 placement->placement = &placements;
100                 placement->busy_placement = &placements;
101                 placement->num_placement = 1;
102                 placement->num_busy_placement = 1;
103                 return;
104         }
105         rbo = container_of(bo, struct radeon_bo, tbo);
106         switch (bo->mem.mem_type) {
107         case TTM_PL_VRAM:
108                 if (rbo->rdev->ring[radeon_copy_ring_index(rbo->rdev)].ready == false)
109                         radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_CPU);
110                 else if (rbo->rdev->mc.visible_vram_size < rbo->rdev->mc.real_vram_size &&
111                          bo->mem.start < (rbo->rdev->mc.visible_vram_size >> PAGE_SHIFT)) {
112                         unsigned fpfn = rbo->rdev->mc.visible_vram_size >> PAGE_SHIFT;
113                         int i;
114
115                         /* Try evicting to the CPU inaccessible part of VRAM
116                          * first, but only set GTT as busy placement, so this
117                          * BO will be evicted to GTT rather than causing other
118                          * BOs to be evicted from VRAM
119                          */
120                         radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_VRAM |
121                                                          RADEON_GEM_DOMAIN_GTT);
122                         rbo->placement.num_busy_placement = 0;
123                         for (i = 0; i < rbo->placement.num_placement; i++) {
124                                 if (rbo->placements[i].mem_type == TTM_PL_VRAM) {
125                                         if (rbo->placements[i].fpfn < fpfn)
126                                                 rbo->placements[i].fpfn = fpfn;
127                                 } else {
128                                         rbo->placement.busy_placement =
129                                                 &rbo->placements[i];
130                                         rbo->placement.num_busy_placement = 1;
131                                 }
132                         }
133                 } else
134                         radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_GTT);
135                 break;
136         case TTM_PL_TT:
137         default:
138                 radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_CPU);
139         }
140         *placement = rbo->placement;
141 }
142
143 static int radeon_verify_access(struct ttm_buffer_object *bo, struct file *filp)
144 {
145         struct radeon_bo *rbo = container_of(bo, struct radeon_bo, tbo);
146         struct radeon_device *rdev = radeon_get_rdev(bo->bdev);
147
148         if (radeon_ttm_tt_has_userptr(rdev, bo->ttm))
149                 return -EPERM;
150         return drm_vma_node_verify_access(&rbo->tbo.base.vma_node,
151                                           filp->private_data);
152 }
153
154 static int radeon_move_blit(struct ttm_buffer_object *bo,
155                         bool evict,
156                         struct ttm_resource *new_mem,
157                         struct ttm_resource *old_mem)
158 {
159         struct radeon_device *rdev;
160         uint64_t old_start, new_start;
161         struct radeon_fence *fence;
162         unsigned num_pages;
163         int r, ridx;
164
165         rdev = radeon_get_rdev(bo->bdev);
166         ridx = radeon_copy_ring_index(rdev);
167         old_start = (u64)old_mem->start << PAGE_SHIFT;
168         new_start = (u64)new_mem->start << PAGE_SHIFT;
169
170         switch (old_mem->mem_type) {
171         case TTM_PL_VRAM:
172                 old_start += rdev->mc.vram_start;
173                 break;
174         case TTM_PL_TT:
175                 old_start += rdev->mc.gtt_start;
176                 break;
177         default:
178                 DRM_ERROR("Unknown placement %d\n", old_mem->mem_type);
179                 return -EINVAL;
180         }
181         switch (new_mem->mem_type) {
182         case TTM_PL_VRAM:
183                 new_start += rdev->mc.vram_start;
184                 break;
185         case TTM_PL_TT:
186                 new_start += rdev->mc.gtt_start;
187                 break;
188         default:
189                 DRM_ERROR("Unknown placement %d\n", old_mem->mem_type);
190                 return -EINVAL;
191         }
192         if (!rdev->ring[ridx].ready) {
193                 DRM_ERROR("Trying to move memory with ring turned off.\n");
194                 return -EINVAL;
195         }
196
197         BUILD_BUG_ON((PAGE_SIZE % RADEON_GPU_PAGE_SIZE) != 0);
198
199         num_pages = new_mem->num_pages * (PAGE_SIZE / RADEON_GPU_PAGE_SIZE);
200         fence = radeon_copy(rdev, old_start, new_start, num_pages, bo->base.resv);
201         if (IS_ERR(fence))
202                 return PTR_ERR(fence);
203
204         r = ttm_bo_move_accel_cleanup(bo, &fence->base, evict, false, new_mem);
205         radeon_fence_unref(&fence);
206         return r;
207 }
208
209 static int radeon_bo_move(struct ttm_buffer_object *bo, bool evict,
210                           struct ttm_operation_ctx *ctx,
211                           struct ttm_resource *new_mem,
212                           struct ttm_place *hop)
213 {
214         struct radeon_device *rdev;
215         struct radeon_bo *rbo;
216         struct ttm_resource *old_mem = &bo->mem;
217         int r;
218
219         if (new_mem->mem_type == TTM_PL_TT) {
220                 r = radeon_ttm_tt_bind(bo->bdev, bo->ttm, new_mem);
221                 if (r)
222                         return r;
223         }
224
225         r = ttm_bo_wait_ctx(bo, ctx);
226         if (r)
227                 return r;
228
229         /* Can't move a pinned BO */
230         rbo = container_of(bo, struct radeon_bo, tbo);
231         if (WARN_ON_ONCE(rbo->tbo.pin_count > 0))
232                 return -EINVAL;
233
234         rdev = radeon_get_rdev(bo->bdev);
235         if (old_mem->mem_type == TTM_PL_SYSTEM && bo->ttm == NULL) {
236                 ttm_bo_move_null(bo, new_mem);
237                 goto out;
238         }
239         if (old_mem->mem_type == TTM_PL_SYSTEM &&
240             new_mem->mem_type == TTM_PL_TT) {
241                 ttm_bo_move_null(bo, new_mem);
242                 goto out;
243         }
244
245         if (old_mem->mem_type == TTM_PL_TT &&
246             new_mem->mem_type == TTM_PL_SYSTEM) {
247                 radeon_ttm_tt_unbind(bo->bdev, bo->ttm);
248                 ttm_resource_free(bo, &bo->mem);
249                 ttm_bo_assign_mem(bo, new_mem);
250                 goto out;
251         }
252         if (rdev->ring[radeon_copy_ring_index(rdev)].ready &&
253             rdev->asic->copy.copy != NULL) {
254                 if ((old_mem->mem_type == TTM_PL_SYSTEM &&
255                      new_mem->mem_type == TTM_PL_VRAM) ||
256                     (old_mem->mem_type == TTM_PL_VRAM &&
257                      new_mem->mem_type == TTM_PL_SYSTEM)) {
258                         hop->fpfn = 0;
259                         hop->lpfn = 0;
260                         hop->mem_type = TTM_PL_TT;
261                         hop->flags = 0;
262                         return -EMULTIHOP;
263                 }
264
265                 r = radeon_move_blit(bo, evict, new_mem, old_mem);
266         } else {
267                 r = -ENODEV;
268         }
269
270         if (r) {
271                 r = ttm_bo_move_memcpy(bo, ctx, new_mem);
272                 if (r)
273                         return r;
274         }
275
276 out:
277         /* update statistics */
278         atomic64_add((u64)bo->num_pages << PAGE_SHIFT, &rdev->num_bytes_moved);
279         radeon_bo_move_notify(bo, evict, new_mem);
280         return 0;
281 }
282
283 static int radeon_ttm_io_mem_reserve(struct ttm_bo_device *bdev, struct ttm_resource *mem)
284 {
285         struct radeon_device *rdev = radeon_get_rdev(bdev);
286         size_t bus_size = (size_t)mem->num_pages << PAGE_SHIFT;
287
288         switch (mem->mem_type) {
289         case TTM_PL_SYSTEM:
290                 /* system memory */
291                 return 0;
292         case TTM_PL_TT:
293 #if IS_ENABLED(CONFIG_AGP)
294                 if (rdev->flags & RADEON_IS_AGP) {
295                         /* RADEON_IS_AGP is set only if AGP is active */
296                         mem->bus.offset = (mem->start << PAGE_SHIFT) +
297                                 rdev->mc.agp_base;
298                         mem->bus.is_iomem = !rdev->ddev->agp->cant_use_aperture;
299                         mem->bus.caching = ttm_write_combined;
300                 }
301 #endif
302                 break;
303         case TTM_PL_VRAM:
304                 mem->bus.offset = mem->start << PAGE_SHIFT;
305                 /* check if it's visible */
306                 if ((mem->bus.offset + bus_size) > rdev->mc.visible_vram_size)
307                         return -EINVAL;
308                 mem->bus.offset += rdev->mc.aper_base;
309                 mem->bus.is_iomem = true;
310                 mem->bus.caching = ttm_write_combined;
311 #ifdef __alpha__
312                 /*
313                  * Alpha: use bus.addr to hold the ioremap() return,
314                  * so we can modify bus.base below.
315                  */
316                 mem->bus.addr = ioremap_wc(mem->bus.offset, bus_size);
317                 if (!mem->bus.addr)
318                         return -ENOMEM;
319
320                 /*
321                  * Alpha: Use just the bus offset plus
322                  * the hose/domain memory base for bus.base.
323                  * It then can be used to build PTEs for VRAM
324                  * access, as done in ttm_bo_vm_fault().
325                  */
326                 mem->bus.offset = (mem->bus.offset & 0x0ffffffffUL) +
327                         rdev->ddev->hose->dense_mem_base;
328 #endif
329                 break;
330         default:
331                 return -EINVAL;
332         }
333         return 0;
334 }
335
336 /*
337  * TTM backend functions.
338  */
339 struct radeon_ttm_tt {
340         struct ttm_tt           ttm;
341         u64                             offset;
342
343         uint64_t                        userptr;
344         struct mm_struct                *usermm;
345         uint32_t                        userflags;
346         bool bound;
347 };
348
349 /* prepare the sg table with the user pages */
350 static int radeon_ttm_tt_pin_userptr(struct ttm_bo_device *bdev, struct ttm_tt *ttm)
351 {
352         struct radeon_device *rdev = radeon_get_rdev(bdev);
353         struct radeon_ttm_tt *gtt = (void *)ttm;
354         unsigned pinned = 0;
355         int r;
356
357         int write = !(gtt->userflags & RADEON_GEM_USERPTR_READONLY);
358         enum dma_data_direction direction = write ?
359                 DMA_BIDIRECTIONAL : DMA_TO_DEVICE;
360
361         if (current->mm != gtt->usermm)
362                 return -EPERM;
363
364         if (gtt->userflags & RADEON_GEM_USERPTR_ANONONLY) {
365                 /* check that we only pin down anonymous memory
366                    to prevent problems with writeback */
367                 unsigned long end = gtt->userptr + ttm->num_pages * PAGE_SIZE;
368                 struct vm_area_struct *vma;
369                 vma = find_vma(gtt->usermm, gtt->userptr);
370                 if (!vma || vma->vm_file || vma->vm_end < end)
371                         return -EPERM;
372         }
373
374         do {
375                 unsigned num_pages = ttm->num_pages - pinned;
376                 uint64_t userptr = gtt->userptr + pinned * PAGE_SIZE;
377                 struct page **pages = ttm->pages + pinned;
378
379                 r = get_user_pages(userptr, num_pages, write ? FOLL_WRITE : 0,
380                                    pages, NULL);
381                 if (r < 0)
382                         goto release_pages;
383
384                 pinned += r;
385
386         } while (pinned < ttm->num_pages);
387
388         r = sg_alloc_table_from_pages(ttm->sg, ttm->pages, ttm->num_pages, 0,
389                                       ttm->num_pages << PAGE_SHIFT,
390                                       GFP_KERNEL);
391         if (r)
392                 goto release_sg;
393
394         r = dma_map_sgtable(rdev->dev, ttm->sg, direction, 0);
395         if (r)
396                 goto release_sg;
397
398         drm_prime_sg_to_page_addr_arrays(ttm->sg, ttm->pages,
399                                          gtt->ttm.dma_address, ttm->num_pages);
400
401         return 0;
402
403 release_sg:
404         kfree(ttm->sg);
405
406 release_pages:
407         release_pages(ttm->pages, pinned);
408         return r;
409 }
410
411 static void radeon_ttm_tt_unpin_userptr(struct ttm_bo_device *bdev, struct ttm_tt *ttm)
412 {
413         struct radeon_device *rdev = radeon_get_rdev(bdev);
414         struct radeon_ttm_tt *gtt = (void *)ttm;
415         struct sg_page_iter sg_iter;
416
417         int write = !(gtt->userflags & RADEON_GEM_USERPTR_READONLY);
418         enum dma_data_direction direction = write ?
419                 DMA_BIDIRECTIONAL : DMA_TO_DEVICE;
420
421         /* double check that we don't free the table twice */
422         if (!ttm->sg->sgl)
423                 return;
424
425         /* free the sg table and pages again */
426         dma_unmap_sgtable(rdev->dev, ttm->sg, direction, 0);
427
428         for_each_sgtable_page(ttm->sg, &sg_iter, 0) {
429                 struct page *page = sg_page_iter_page(&sg_iter);
430                 if (!(gtt->userflags & RADEON_GEM_USERPTR_READONLY))
431                         set_page_dirty(page);
432
433                 mark_page_accessed(page);
434                 put_page(page);
435         }
436
437         sg_free_table(ttm->sg);
438 }
439
440 static bool radeon_ttm_backend_is_bound(struct ttm_tt *ttm)
441 {
442         struct radeon_ttm_tt *gtt = (void*)ttm;
443
444         return (gtt->bound);
445 }
446
447 static int radeon_ttm_backend_bind(struct ttm_bo_device *bdev,
448                                    struct ttm_tt *ttm,
449                                    struct ttm_resource *bo_mem)
450 {
451         struct radeon_ttm_tt *gtt = (void*)ttm;
452         struct radeon_device *rdev = radeon_get_rdev(bdev);
453         uint32_t flags = RADEON_GART_PAGE_VALID | RADEON_GART_PAGE_READ |
454                 RADEON_GART_PAGE_WRITE;
455         int r;
456
457         if (gtt->bound)
458                 return 0;
459
460         if (gtt->userptr) {
461                 radeon_ttm_tt_pin_userptr(bdev, ttm);
462                 flags &= ~RADEON_GART_PAGE_WRITE;
463         }
464
465         gtt->offset = (unsigned long)(bo_mem->start << PAGE_SHIFT);
466         if (!ttm->num_pages) {
467                 WARN(1, "nothing to bind %u pages for mreg %p back %p!\n",
468                      ttm->num_pages, bo_mem, ttm);
469         }
470         if (ttm->caching == ttm_cached)
471                 flags |= RADEON_GART_PAGE_SNOOP;
472         r = radeon_gart_bind(rdev, gtt->offset, ttm->num_pages,
473                              ttm->pages, gtt->ttm.dma_address, flags);
474         if (r) {
475                 DRM_ERROR("failed to bind %u pages at 0x%08X\n",
476                           ttm->num_pages, (unsigned)gtt->offset);
477                 return r;
478         }
479         gtt->bound = true;
480         return 0;
481 }
482
483 static void radeon_ttm_backend_unbind(struct ttm_bo_device *bdev, struct ttm_tt *ttm)
484 {
485         struct radeon_ttm_tt *gtt = (void *)ttm;
486         struct radeon_device *rdev = radeon_get_rdev(bdev);
487
488         if (!gtt->bound)
489                 return;
490
491         radeon_gart_unbind(rdev, gtt->offset, ttm->num_pages);
492
493         if (gtt->userptr)
494                 radeon_ttm_tt_unpin_userptr(bdev, ttm);
495         gtt->bound = false;
496 }
497
498 static void radeon_ttm_backend_destroy(struct ttm_bo_device *bdev, struct ttm_tt *ttm)
499 {
500         struct radeon_ttm_tt *gtt = (void *)ttm;
501
502         radeon_ttm_backend_unbind(bdev, ttm);
503         ttm_tt_destroy_common(bdev, ttm);
504
505         ttm_tt_fini(&gtt->ttm);
506         kfree(gtt);
507 }
508
509 static struct ttm_tt *radeon_ttm_tt_create(struct ttm_buffer_object *bo,
510                                            uint32_t page_flags)
511 {
512         struct radeon_device *rdev;
513         struct radeon_ttm_tt *gtt;
514         enum ttm_caching caching;
515         struct radeon_bo *rbo;
516
517         rbo = container_of(bo, struct radeon_bo, tbo);
518
519         rdev = radeon_get_rdev(bo->bdev);
520 #if IS_ENABLED(CONFIG_AGP)
521         if (rdev->flags & RADEON_IS_AGP) {
522                 return ttm_agp_tt_create(bo, rdev->ddev->agp->bridge,
523                                          page_flags);
524         }
525 #endif
526
527         gtt = kzalloc(sizeof(struct radeon_ttm_tt), GFP_KERNEL);
528         if (gtt == NULL) {
529                 return NULL;
530         }
531
532         if (rbo->flags & RADEON_GEM_GTT_UC)
533                 caching = ttm_uncached;
534         else if (rbo->flags & RADEON_GEM_GTT_WC)
535                 caching = ttm_write_combined;
536         else
537                 caching = ttm_cached;
538
539         if (ttm_dma_tt_init(&gtt->ttm, bo, page_flags, caching)) {
540                 kfree(gtt);
541                 return NULL;
542         }
543         return &gtt->ttm;
544 }
545
546 static struct radeon_ttm_tt *radeon_ttm_tt_to_gtt(struct radeon_device *rdev,
547                                                   struct ttm_tt *ttm)
548 {
549 #if IS_ENABLED(CONFIG_AGP)
550         if (rdev->flags & RADEON_IS_AGP)
551                 return NULL;
552 #endif
553
554         if (!ttm)
555                 return NULL;
556         return container_of(ttm, struct radeon_ttm_tt, ttm);
557 }
558
559 static int radeon_ttm_tt_populate(struct ttm_bo_device *bdev,
560                                   struct ttm_tt *ttm,
561                                   struct ttm_operation_ctx *ctx)
562 {
563         struct radeon_device *rdev = radeon_get_rdev(bdev);
564         struct radeon_ttm_tt *gtt = radeon_ttm_tt_to_gtt(rdev, ttm);
565         bool slave = !!(ttm->page_flags & TTM_PAGE_FLAG_SG);
566
567         if (gtt && gtt->userptr) {
568                 ttm->sg = kzalloc(sizeof(struct sg_table), GFP_KERNEL);
569                 if (!ttm->sg)
570                         return -ENOMEM;
571
572                 ttm->page_flags |= TTM_PAGE_FLAG_SG;
573                 return 0;
574         }
575
576         if (slave && ttm->sg) {
577                 drm_prime_sg_to_page_addr_arrays(ttm->sg, ttm->pages,
578                                                  gtt->ttm.dma_address, ttm->num_pages);
579                 return 0;
580         }
581
582         return ttm_pool_alloc(&rdev->mman.bdev.pool, ttm, ctx);
583 }
584
585 static void radeon_ttm_tt_unpopulate(struct ttm_bo_device *bdev, struct ttm_tt *ttm)
586 {
587         struct radeon_device *rdev = radeon_get_rdev(bdev);
588         struct radeon_ttm_tt *gtt = radeon_ttm_tt_to_gtt(rdev, ttm);
589         bool slave = !!(ttm->page_flags & TTM_PAGE_FLAG_SG);
590
591         if (gtt && gtt->userptr) {
592                 kfree(ttm->sg);
593                 ttm->page_flags &= ~TTM_PAGE_FLAG_SG;
594                 return;
595         }
596
597         if (slave)
598                 return;
599
600         return ttm_pool_free(&rdev->mman.bdev.pool, ttm);
601 }
602
603 int radeon_ttm_tt_set_userptr(struct radeon_device *rdev,
604                               struct ttm_tt *ttm, uint64_t addr,
605                               uint32_t flags)
606 {
607         struct radeon_ttm_tt *gtt = radeon_ttm_tt_to_gtt(rdev, ttm);
608
609         if (gtt == NULL)
610                 return -EINVAL;
611
612         gtt->userptr = addr;
613         gtt->usermm = current->mm;
614         gtt->userflags = flags;
615         return 0;
616 }
617
618 bool radeon_ttm_tt_is_bound(struct ttm_bo_device *bdev,
619                             struct ttm_tt *ttm)
620 {
621 #if IS_ENABLED(CONFIG_AGP)
622         struct radeon_device *rdev = radeon_get_rdev(bdev);
623         if (rdev->flags & RADEON_IS_AGP)
624                 return ttm_agp_is_bound(ttm);
625 #endif
626         return radeon_ttm_backend_is_bound(ttm);
627 }
628
629 static int radeon_ttm_tt_bind(struct ttm_bo_device *bdev,
630                               struct ttm_tt *ttm,
631                               struct ttm_resource *bo_mem)
632 {
633 #if IS_ENABLED(CONFIG_AGP)
634         struct radeon_device *rdev = radeon_get_rdev(bdev);
635 #endif
636
637         if (!bo_mem)
638                 return -EINVAL;
639 #if IS_ENABLED(CONFIG_AGP)
640         if (rdev->flags & RADEON_IS_AGP)
641                 return ttm_agp_bind(ttm, bo_mem);
642 #endif
643
644         return radeon_ttm_backend_bind(bdev, ttm, bo_mem);
645 }
646
647 static void radeon_ttm_tt_unbind(struct ttm_bo_device *bdev,
648                                  struct ttm_tt *ttm)
649 {
650 #if IS_ENABLED(CONFIG_AGP)
651         struct radeon_device *rdev = radeon_get_rdev(bdev);
652
653         if (rdev->flags & RADEON_IS_AGP) {
654                 ttm_agp_unbind(ttm);
655                 return;
656         }
657 #endif
658         radeon_ttm_backend_unbind(bdev, ttm);
659 }
660
661 static void radeon_ttm_tt_destroy(struct ttm_bo_device *bdev,
662                                   struct ttm_tt *ttm)
663 {
664 #if IS_ENABLED(CONFIG_AGP)
665         struct radeon_device *rdev = radeon_get_rdev(bdev);
666
667         if (rdev->flags & RADEON_IS_AGP) {
668                 ttm_agp_unbind(ttm);
669                 ttm_tt_destroy_common(bdev, ttm);
670                 ttm_agp_destroy(ttm);
671                 return;
672         }
673 #endif
674         radeon_ttm_backend_destroy(bdev, ttm);
675 }
676
677 bool radeon_ttm_tt_has_userptr(struct radeon_device *rdev,
678                                struct ttm_tt *ttm)
679 {
680         struct radeon_ttm_tt *gtt = radeon_ttm_tt_to_gtt(rdev, ttm);
681
682         if (gtt == NULL)
683                 return false;
684
685         return !!gtt->userptr;
686 }
687
688 bool radeon_ttm_tt_is_readonly(struct radeon_device *rdev,
689                                struct ttm_tt *ttm)
690 {
691         struct radeon_ttm_tt *gtt = radeon_ttm_tt_to_gtt(rdev, ttm);
692
693         if (gtt == NULL)
694                 return false;
695
696         return !!(gtt->userflags & RADEON_GEM_USERPTR_READONLY);
697 }
698
699 static void
700 radeon_bo_delete_mem_notify(struct ttm_buffer_object *bo)
701 {
702         radeon_bo_move_notify(bo, false, NULL);
703 }
704
705 static struct ttm_bo_driver radeon_bo_driver = {
706         .ttm_tt_create = &radeon_ttm_tt_create,
707         .ttm_tt_populate = &radeon_ttm_tt_populate,
708         .ttm_tt_unpopulate = &radeon_ttm_tt_unpopulate,
709         .ttm_tt_destroy = &radeon_ttm_tt_destroy,
710         .eviction_valuable = ttm_bo_eviction_valuable,
711         .evict_flags = &radeon_evict_flags,
712         .move = &radeon_bo_move,
713         .verify_access = &radeon_verify_access,
714         .delete_mem_notify = &radeon_bo_delete_mem_notify,
715         .io_mem_reserve = &radeon_ttm_io_mem_reserve,
716 };
717
718 int radeon_ttm_init(struct radeon_device *rdev)
719 {
720         int r;
721
722         /* No others user of address space so set it to 0 */
723         r = ttm_bo_device_init(&rdev->mman.bdev, &radeon_bo_driver, rdev->dev,
724                                rdev->ddev->anon_inode->i_mapping,
725                                rdev->ddev->vma_offset_manager,
726                                rdev->need_swiotlb,
727                                dma_addressing_limited(&rdev->pdev->dev));
728         if (r) {
729                 DRM_ERROR("failed initializing buffer object driver(%d).\n", r);
730                 return r;
731         }
732         rdev->mman.initialized = true;
733
734         ttm_pool_init(&rdev->mman.bdev.pool, rdev->dev, rdev->need_swiotlb,
735                       dma_addressing_limited(&rdev->pdev->dev));
736
737         r = radeon_ttm_init_vram(rdev);
738         if (r) {
739                 DRM_ERROR("Failed initializing VRAM heap.\n");
740                 return r;
741         }
742         /* Change the size here instead of the init above so only lpfn is affected */
743         radeon_ttm_set_active_vram_size(rdev, rdev->mc.visible_vram_size);
744
745         r = radeon_bo_create(rdev, 256 * 1024, PAGE_SIZE, true,
746                              RADEON_GEM_DOMAIN_VRAM, 0, NULL,
747                              NULL, &rdev->stolen_vga_memory);
748         if (r) {
749                 return r;
750         }
751         r = radeon_bo_reserve(rdev->stolen_vga_memory, false);
752         if (r)
753                 return r;
754         r = radeon_bo_pin(rdev->stolen_vga_memory, RADEON_GEM_DOMAIN_VRAM, NULL);
755         radeon_bo_unreserve(rdev->stolen_vga_memory);
756         if (r) {
757                 radeon_bo_unref(&rdev->stolen_vga_memory);
758                 return r;
759         }
760         DRM_INFO("radeon: %uM of VRAM memory ready\n",
761                  (unsigned) (rdev->mc.real_vram_size / (1024 * 1024)));
762
763         r = radeon_ttm_init_gtt(rdev);
764         if (r) {
765                 DRM_ERROR("Failed initializing GTT heap.\n");
766                 return r;
767         }
768         DRM_INFO("radeon: %uM of GTT memory ready.\n",
769                  (unsigned)(rdev->mc.gtt_size / (1024 * 1024)));
770
771         r = radeon_ttm_debugfs_init(rdev);
772         if (r) {
773                 DRM_ERROR("Failed to init debugfs\n");
774                 return r;
775         }
776         return 0;
777 }
778
779 void radeon_ttm_fini(struct radeon_device *rdev)
780 {
781         int r;
782
783         if (!rdev->mman.initialized)
784                 return;
785         radeon_ttm_debugfs_fini(rdev);
786         if (rdev->stolen_vga_memory) {
787                 r = radeon_bo_reserve(rdev->stolen_vga_memory, false);
788                 if (r == 0) {
789                         radeon_bo_unpin(rdev->stolen_vga_memory);
790                         radeon_bo_unreserve(rdev->stolen_vga_memory);
791                 }
792                 radeon_bo_unref(&rdev->stolen_vga_memory);
793         }
794         ttm_range_man_fini(&rdev->mman.bdev, TTM_PL_VRAM);
795         ttm_range_man_fini(&rdev->mman.bdev, TTM_PL_TT);
796         ttm_bo_device_release(&rdev->mman.bdev);
797         radeon_gart_fini(rdev);
798         rdev->mman.initialized = false;
799         DRM_INFO("radeon: ttm finalized\n");
800 }
801
802 /* this should only be called at bootup or when userspace
803  * isn't running */
804 void radeon_ttm_set_active_vram_size(struct radeon_device *rdev, u64 size)
805 {
806         struct ttm_resource_manager *man;
807
808         if (!rdev->mman.initialized)
809                 return;
810
811         man = ttm_manager_type(&rdev->mman.bdev, TTM_PL_VRAM);
812         /* this just adjusts TTM size idea, which sets lpfn to the correct value */
813         man->size = size >> PAGE_SHIFT;
814 }
815
816 static vm_fault_t radeon_ttm_fault(struct vm_fault *vmf)
817 {
818         struct ttm_buffer_object *bo = vmf->vma->vm_private_data;
819         struct radeon_device *rdev = radeon_get_rdev(bo->bdev);
820         vm_fault_t ret;
821
822         down_read(&rdev->pm.mclk_lock);
823
824         ret = ttm_bo_vm_reserve(bo, vmf);
825         if (ret)
826                 goto unlock_mclk;
827
828         ret = radeon_bo_fault_reserve_notify(bo);
829         if (ret)
830                 goto unlock_resv;
831
832         ret = ttm_bo_vm_fault_reserved(vmf, vmf->vma->vm_page_prot,
833                                        TTM_BO_VM_NUM_PREFAULT, 1);
834         if (ret == VM_FAULT_RETRY && !(vmf->flags & FAULT_FLAG_RETRY_NOWAIT))
835                 goto unlock_mclk;
836
837 unlock_resv:
838         dma_resv_unlock(bo->base.resv);
839
840 unlock_mclk:
841         up_read(&rdev->pm.mclk_lock);
842         return ret;
843 }
844
845 static struct vm_operations_struct radeon_ttm_vm_ops = {
846         .fault = radeon_ttm_fault,
847         .open = ttm_bo_vm_open,
848         .close = ttm_bo_vm_close,
849         .access = ttm_bo_vm_access
850 };
851
852 int radeon_mmap(struct file *filp, struct vm_area_struct *vma)
853 {
854         int r;
855         struct drm_file *file_priv = filp->private_data;
856         struct radeon_device *rdev = file_priv->minor->dev->dev_private;
857
858         if (rdev == NULL)
859                 return -EINVAL;
860
861         r = ttm_bo_mmap(filp, vma, &rdev->mman.bdev);
862         if (unlikely(r != 0))
863                 return r;
864
865         vma->vm_ops = &radeon_ttm_vm_ops;
866         return 0;
867 }
868
869 #if defined(CONFIG_DEBUG_FS)
870
871 static int radeon_mm_dump_table(struct seq_file *m, void *data)
872 {
873         struct drm_info_node *node = (struct drm_info_node *)m->private;
874         unsigned ttm_pl = *(int*)node->info_ent->data;
875         struct drm_device *dev = node->minor->dev;
876         struct radeon_device *rdev = dev->dev_private;
877         struct ttm_resource_manager *man = ttm_manager_type(&rdev->mman.bdev, ttm_pl);
878         struct drm_printer p = drm_seq_file_printer(m);
879
880         man->func->debug(man, &p);
881         return 0;
882 }
883
884 static int radeon_ttm_pool_debugfs(struct seq_file *m, void *data)
885 {
886         struct drm_info_node *node = (struct drm_info_node *)m->private;
887         struct drm_device *dev = node->minor->dev;
888         struct radeon_device *rdev = dev->dev_private;
889
890         return ttm_pool_debugfs(&rdev->mman.bdev.pool, m);
891 }
892
893 static int ttm_pl_vram = TTM_PL_VRAM;
894 static int ttm_pl_tt = TTM_PL_TT;
895
896 static struct drm_info_list radeon_ttm_debugfs_list[] = {
897         {"radeon_vram_mm", radeon_mm_dump_table, 0, &ttm_pl_vram},
898         {"radeon_gtt_mm", radeon_mm_dump_table, 0, &ttm_pl_tt},
899         {"ttm_page_pool", radeon_ttm_pool_debugfs, 0, NULL}
900 };
901
902 static int radeon_ttm_vram_open(struct inode *inode, struct file *filep)
903 {
904         struct radeon_device *rdev = inode->i_private;
905         i_size_write(inode, rdev->mc.mc_vram_size);
906         filep->private_data = inode->i_private;
907         return 0;
908 }
909
910 static ssize_t radeon_ttm_vram_read(struct file *f, char __user *buf,
911                                     size_t size, loff_t *pos)
912 {
913         struct radeon_device *rdev = f->private_data;
914         ssize_t result = 0;
915         int r;
916
917         if (size & 0x3 || *pos & 0x3)
918                 return -EINVAL;
919
920         while (size) {
921                 unsigned long flags;
922                 uint32_t value;
923
924                 if (*pos >= rdev->mc.mc_vram_size)
925                         return result;
926
927                 spin_lock_irqsave(&rdev->mmio_idx_lock, flags);
928                 WREG32(RADEON_MM_INDEX, ((uint32_t)*pos) | 0x80000000);
929                 if (rdev->family >= CHIP_CEDAR)
930                         WREG32(EVERGREEN_MM_INDEX_HI, *pos >> 31);
931                 value = RREG32(RADEON_MM_DATA);
932                 spin_unlock_irqrestore(&rdev->mmio_idx_lock, flags);
933
934                 r = put_user(value, (uint32_t *)buf);
935                 if (r)
936                         return r;
937
938                 result += 4;
939                 buf += 4;
940                 *pos += 4;
941                 size -= 4;
942         }
943
944         return result;
945 }
946
947 static const struct file_operations radeon_ttm_vram_fops = {
948         .owner = THIS_MODULE,
949         .open = radeon_ttm_vram_open,
950         .read = radeon_ttm_vram_read,
951         .llseek = default_llseek
952 };
953
954 static int radeon_ttm_gtt_open(struct inode *inode, struct file *filep)
955 {
956         struct radeon_device *rdev = inode->i_private;
957         i_size_write(inode, rdev->mc.gtt_size);
958         filep->private_data = inode->i_private;
959         return 0;
960 }
961
962 static ssize_t radeon_ttm_gtt_read(struct file *f, char __user *buf,
963                                    size_t size, loff_t *pos)
964 {
965         struct radeon_device *rdev = f->private_data;
966         ssize_t result = 0;
967         int r;
968
969         while (size) {
970                 loff_t p = *pos / PAGE_SIZE;
971                 unsigned off = *pos & ~PAGE_MASK;
972                 size_t cur_size = min_t(size_t, size, PAGE_SIZE - off);
973                 struct page *page;
974                 void *ptr;
975
976                 if (p >= rdev->gart.num_cpu_pages)
977                         return result;
978
979                 page = rdev->gart.pages[p];
980                 if (page) {
981                         ptr = kmap(page);
982                         ptr += off;
983
984                         r = copy_to_user(buf, ptr, cur_size);
985                         kunmap(rdev->gart.pages[p]);
986                 } else
987                         r = clear_user(buf, cur_size);
988
989                 if (r)
990                         return -EFAULT;
991
992                 result += cur_size;
993                 buf += cur_size;
994                 *pos += cur_size;
995                 size -= cur_size;
996         }
997
998         return result;
999 }
1000
1001 static const struct file_operations radeon_ttm_gtt_fops = {
1002         .owner = THIS_MODULE,
1003         .open = radeon_ttm_gtt_open,
1004         .read = radeon_ttm_gtt_read,
1005         .llseek = default_llseek
1006 };
1007
1008 #endif
1009
1010 static int radeon_ttm_debugfs_init(struct radeon_device *rdev)
1011 {
1012 #if defined(CONFIG_DEBUG_FS)
1013         unsigned count;
1014
1015         struct drm_minor *minor = rdev->ddev->primary;
1016         struct dentry *root = minor->debugfs_root;
1017
1018         rdev->mman.vram = debugfs_create_file("radeon_vram", S_IFREG | S_IRUGO,
1019                                               root, rdev,
1020                                               &radeon_ttm_vram_fops);
1021
1022         rdev->mman.gtt = debugfs_create_file("radeon_gtt", S_IFREG | S_IRUGO,
1023                                              root, rdev, &radeon_ttm_gtt_fops);
1024
1025         count = ARRAY_SIZE(radeon_ttm_debugfs_list);
1026
1027         return radeon_debugfs_add_files(rdev, radeon_ttm_debugfs_list, count);
1028 #else
1029
1030         return 0;
1031 #endif
1032 }
1033
1034 static void radeon_ttm_debugfs_fini(struct radeon_device *rdev)
1035 {
1036 #if defined(CONFIG_DEBUG_FS)
1037
1038         debugfs_remove(rdev->mman.vram);
1039         rdev->mman.vram = NULL;
1040
1041         debugfs_remove(rdev->mman.gtt);
1042         rdev->mman.gtt = NULL;
1043 #endif
1044 }