drivers/gpu/drm/nouveau/nouveau_bo.c

   1 /*
   2  * Copyright 2007 Dave Airlied
   3  * All Rights Reserved.
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   9  * and/or sell copies of the Software, and to permit persons to whom the
  10  * Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
  20  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  22  * OTHER DEALINGS IN THE SOFTWARE.
  23  */
  24 /*
  25  * Authors: Dave Airlied <airlied@linux.ie>
  26  *          Ben Skeggs   <darktama@iinet.net.au>
  27  *          Jeremy Kolb  <jkolb@brandeis.edu>
  28  */
  29
  30 #include <linux/dma-mapping.h>
  31
  32 #include "nouveau_drv.h"
  33 #include "nouveau_chan.h"
  34 #include "nouveau_fence.h"
  35
  36 #include "nouveau_bo.h"
  37 #include "nouveau_ttm.h"
  38 #include "nouveau_gem.h"
  39 #include "nouveau_mem.h"
  40 #include "nouveau_vmm.h"
  41
  42 #include <nvif/class.h>
  43 #include <nvif/if500b.h>
  44 #include <nvif/if900b.h>
  45
  46 static int nouveau_ttm_tt_bind(struct ttm_device *bdev, struct ttm_tt *ttm,
  47                                struct ttm_resource *reg);
  48 static void nouveau_ttm_tt_unbind(struct ttm_device *bdev, struct ttm_tt *ttm);
  49
  50 /*
  51  * NV10-NV40 tiling helpers
  52  */
  53
  54 static void
  55 nv10_bo_update_tile_region(struct drm_device *dev, struct nouveau_drm_tile *reg,
  56                            u32 addr, u32 size, u32 pitch, u32 flags)
  57 {
  58         struct nouveau_drm *drm = nouveau_drm(dev);
  59         int i = reg - drm->tile.reg;
  60         struct nvkm_fb *fb = nvxx_fb(&drm->client.device);
  61         struct nvkm_fb_tile *tile = &fb->tile.region[i];
  62
  63         nouveau_fence_unref(&reg->fence);
  64
  65         if (tile->pitch)
  66                 nvkm_fb_tile_fini(fb, i, tile);
  67
  68         if (pitch)
  69                 nvkm_fb_tile_init(fb, i, addr, size, pitch, flags, tile);
  70
  71         nvkm_fb_tile_prog(fb, i, tile);
  72 }
  73
  74 static struct nouveau_drm_tile *
  75 nv10_bo_get_tile_region(struct drm_device *dev, int i)
  76 {
  77         struct nouveau_drm *drm = nouveau_drm(dev);
  78         struct nouveau_drm_tile *tile = &drm->tile.reg[i];
  79
  80         spin_lock(&drm->tile.lock);
  81
  82         if (!tile->used &&
  83             (!tile->fence || nouveau_fence_done(tile->fence)))
  84                 tile->used = true;
  85         else
  86                 tile = NULL;
  87
  88         spin_unlock(&drm->tile.lock);
  89         return tile;
  90 }
  91
  92 static void
  93 nv10_bo_put_tile_region(struct drm_device *dev, struct nouveau_drm_tile *tile,
  94                         struct dma_fence *fence)
  95 {
  96         struct nouveau_drm *drm = nouveau_drm(dev);
  97
  98         if (tile) {
  99                 spin_lock(&drm->tile.lock);
 100                 tile->fence = (struct nouveau_fence *)dma_fence_get(fence);
 101                 tile->used = false;
 102                 spin_unlock(&drm->tile.lock);
 103         }
 104 }
 105
 106 static struct nouveau_drm_tile *
 107 nv10_bo_set_tiling(struct drm_device *dev, u32 addr,
 108                    u32 size, u32 pitch, u32 zeta)
 109 {
 110         struct nouveau_drm *drm = nouveau_drm(dev);
 111         struct nvkm_fb *fb = nvxx_fb(&drm->client.device);
 112         struct nouveau_drm_tile *tile, *found = NULL;
 113         int i;
 114
 115         for (i = 0; i < fb->tile.regions; i++) {
 116                 tile = nv10_bo_get_tile_region(dev, i);
 117
 118                 if (pitch && !found) {
 119                         found = tile;
 120                         continue;
 121
 122                 } else if (tile && fb->tile.region[i].pitch) {
 123                         /* Kill an unused tile region. */
 124                         nv10_bo_update_tile_region(dev, tile, 0, 0, 0, 0);
 125                 }
 126
 127                 nv10_bo_put_tile_region(dev, tile, NULL);
 128         }
 129
 130         if (found)
 131                 nv10_bo_update_tile_region(dev, found, addr, size, pitch, zeta);
 132         return found;
 133 }
 134
 135 static void
 136 nouveau_bo_del_ttm(struct ttm_buffer_object *bo)
 137 {
 138         struct nouveau_drm *drm = nouveau_bdev(bo->bdev);
 139         struct drm_device *dev = drm->dev;
 140         struct nouveau_bo *nvbo = nouveau_bo(bo);
 141
 142         WARN_ON(nvbo->bo.pin_count > 0);
 143         nouveau_bo_del_io_reserve_lru(bo);
 144         nv10_bo_put_tile_region(dev, nvbo->tile, NULL);
 145
 146         /*
 147          * If nouveau_bo_new() allocated this buffer, the GEM object was never
 148          * initialized, so don't attempt to release it.
 149          */
 150         if (bo->base.dev)
 151                 drm_gem_object_release(&bo->base);
 152
 153         kfree(nvbo);
 154 }
 155
 156 static inline u64
 157 roundup_64(u64 x, u32 y)
 158 {
 159         x += y - 1;
 160         do_div(x, y);
 161         return x * y;
 162 }
 163
 164 static void
 165 nouveau_bo_fixup_align(struct nouveau_bo *nvbo, int *align, u64 *size)
 166 {
 167         struct nouveau_drm *drm = nouveau_bdev(nvbo->bo.bdev);
 168         struct nvif_device *device = &drm->client.device;
 169
 170         if (device->info.family < NV_DEVICE_INFO_V0_TESLA) {
 171                 if (nvbo->mode) {
 172                         if (device->info.chipset >= 0x40) {
 173                                 *align = 65536;
 174                                 *size = roundup_64(*size, 64 * nvbo->mode);
 175
 176                         } else if (device->info.chipset >= 0x30) {
 177                                 *align = 32768;
 178                                 *size = roundup_64(*size, 64 * nvbo->mode);
 179
 180                         } else if (device->info.chipset >= 0x20) {
 181                                 *align = 16384;
 182                                 *size = roundup_64(*size, 64 * nvbo->mode);
 183
 184                         } else if (device->info.chipset >= 0x10) {
 185                                 *align = 16384;
 186                                 *size = roundup_64(*size, 32 * nvbo->mode);
 187                         }
 188                 }
 189         } else {
 190                 *size = roundup_64(*size, (1 << nvbo->page));
 191                 *align = max((1 <<  nvbo->page), *align);
 192         }
 193
 194         *size = roundup_64(*size, PAGE_SIZE);
 195 }
 196
 197 struct nouveau_bo *
 198 nouveau_bo_alloc(struct nouveau_cli *cli, u64 *size, int *align, u32 domain,
 199                  u32 tile_mode, u32 tile_flags)
 200 {
 201         struct nouveau_drm *drm = cli->drm;
 202         struct nouveau_bo *nvbo;
 203         struct nvif_mmu *mmu = &cli->mmu;
 204         struct nvif_vmm *vmm = cli->svm.cli ? &cli->svm.vmm : &cli->vmm.vmm;
 205         int i, pi = -1;
 206
 207         if (!*size) {
 208                 NV_WARN(drm, "skipped size %016llx\n", *size);
 209                 return ERR_PTR(-EINVAL);
 210         }
 211
 212         nvbo = kzalloc(sizeof(struct nouveau_bo), GFP_KERNEL);
 213         if (!nvbo)
 214                 return ERR_PTR(-ENOMEM);
 215         INIT_LIST_HEAD(&nvbo->head);
 216         INIT_LIST_HEAD(&nvbo->entry);
 217         INIT_LIST_HEAD(&nvbo->vma_list);
 218         nvbo->bo.bdev = &drm->ttm.bdev;
 219
 220         /* This is confusing, and doesn't actually mean we want an uncached
 221          * mapping, but is what NOUVEAU_GEM_DOMAIN_COHERENT gets translated
 222          * into in nouveau_gem_new().
 223          */
 224         if (domain & NOUVEAU_GEM_DOMAIN_COHERENT) {
 225                 /* Determine if we can get a cache-coherent map, forcing
 226                  * uncached mapping if we can't.
 227                  */
 228                 if (!nouveau_drm_use_coherent_gpu_mapping(drm))
 229                         nvbo->force_coherent = true;
 230         }
 231
 232         if (cli->device.info.family >= NV_DEVICE_INFO_V0_FERMI) {
 233                 nvbo->kind = (tile_flags & 0x0000ff00) >> 8;
 234                 if (!nvif_mmu_kind_valid(mmu, nvbo->kind)) {
 235                         kfree(nvbo);
 236                         return ERR_PTR(-EINVAL);
 237                 }
 238
 239                 nvbo->comp = mmu->kind[nvbo->kind] != nvbo->kind;
 240         } else
 241         if (cli->device.info.family >= NV_DEVICE_INFO_V0_TESLA) {
 242                 nvbo->kind = (tile_flags & 0x00007f00) >> 8;
 243                 nvbo->comp = (tile_flags & 0x00030000) >> 16;
 244                 if (!nvif_mmu_kind_valid(mmu, nvbo->kind)) {
 245                         kfree(nvbo);
 246                         return ERR_PTR(-EINVAL);
 247                 }
 248         } else {
 249                 nvbo->zeta = (tile_flags & 0x00000007);
 250         }
 251         nvbo->mode = tile_mode;
 252         nvbo->contig = !(tile_flags & NOUVEAU_GEM_TILE_NONCONTIG);
 253
 254         /* Determine the desirable target GPU page size for the buffer. */
 255         for (i = 0; i < vmm->page_nr; i++) {
 256                 /* Because we cannot currently allow VMM maps to fail
 257                  * during buffer migration, we need to determine page
 258                  * size for the buffer up-front, and pre-allocate its
 259                  * page tables.
 260                  *
 261                  * Skip page sizes that can't support needed domains.
 262                  */
 263                 if (cli->device.info.family > NV_DEVICE_INFO_V0_CURIE &&
 264                     (domain & NOUVEAU_GEM_DOMAIN_VRAM) && !vmm->page[i].vram)
 265                         continue;
 266                 if ((domain & NOUVEAU_GEM_DOMAIN_GART) &&
 267                     (!vmm->page[i].host || vmm->page[i].shift > PAGE_SHIFT))
 268                         continue;
 269
 270                 /* Select this page size if it's the first that supports
 271                  * the potential memory domains, or when it's compatible
 272                  * with the requested compression settings.
 273                  */
 274                 if (pi < 0 || !nvbo->comp || vmm->page[i].comp)
 275                         pi = i;
 276
 277                 /* Stop once the buffer is larger than the current page size. */
 278                 if (*size >= 1ULL << vmm->page[i].shift)
 279                         break;
 280         }
 281
 282         if (WARN_ON(pi < 0))
 283                 return ERR_PTR(-EINVAL);
 284
 285         /* Disable compression if suitable settings couldn't be found. */
 286         if (nvbo->comp && !vmm->page[pi].comp) {
 287                 if (mmu->object.oclass >= NVIF_CLASS_MMU_GF100)
 288                         nvbo->kind = mmu->kind[nvbo->kind];
 289                 nvbo->comp = 0;
 290         }
 291         nvbo->page = vmm->page[pi].shift;
 292
 293         nouveau_bo_fixup_align(nvbo, align, size);
 294
 295         return nvbo;
 296 }
 297
 298 int
 299 nouveau_bo_init(struct nouveau_bo *nvbo, u64 size, int align, u32 domain,
 300                 struct sg_table *sg, struct dma_resv *robj)
 301 {
 302         int type = sg ? ttm_bo_type_sg : ttm_bo_type_device;
 303         size_t acc_size;
 304         int ret;
 305
 306         acc_size = ttm_bo_dma_acc_size(nvbo->bo.bdev, size, sizeof(*nvbo));
 307
 308         nvbo->bo.mem.num_pages = size >> PAGE_SHIFT;
 309         nouveau_bo_placement_set(nvbo, domain, 0);
 310         INIT_LIST_HEAD(&nvbo->io_reserve_lru);
 311
 312         ret = ttm_bo_init(nvbo->bo.bdev, &nvbo->bo, size, type,
 313                           &nvbo->placement, align >> PAGE_SHIFT, false,
 314                           acc_size, sg, robj, nouveau_bo_del_ttm);
 315         if (ret) {
 316                 /* ttm will call nouveau_bo_del_ttm if it fails.. */
 317                 return ret;
 318         }
 319
 320         return 0;
 321 }
 322
 323 int
 324 nouveau_bo_new(struct nouveau_cli *cli, u64 size, int align,
 325                uint32_t domain, uint32_t tile_mode, uint32_t tile_flags,
 326                struct sg_table *sg, struct dma_resv *robj,
 327                struct nouveau_bo **pnvbo)
 328 {
 329         struct nouveau_bo *nvbo;
 330         int ret;
 331
 332         nvbo = nouveau_bo_alloc(cli, &size, &align, domain, tile_mode,
 333                                 tile_flags);
 334         if (IS_ERR(nvbo))
 335                 return PTR_ERR(nvbo);
 336
 337         ret = nouveau_bo_init(nvbo, size, align, domain, sg, robj);
 338         if (ret)
 339                 return ret;
 340
 341         *pnvbo = nvbo;
 342         return 0;
 343 }
 344
 345 static void
 346 set_placement_list(struct ttm_place *pl, unsigned *n, uint32_t domain)
 347 {
 348         *n = 0;
 349
 350         if (domain & NOUVEAU_GEM_DOMAIN_VRAM) {
 351                 pl[*n].mem_type = TTM_PL_VRAM;
 352                 pl[*n].flags = 0;
 353                 (*n)++;
 354         }
 355         if (domain & NOUVEAU_GEM_DOMAIN_GART) {
 356                 pl[*n].mem_type = TTM_PL_TT;
 357                 pl[*n].flags = 0;
 358                 (*n)++;
 359         }
 360         if (domain & NOUVEAU_GEM_DOMAIN_CPU) {
 361                 pl[*n].mem_type = TTM_PL_SYSTEM;
 362                 pl[(*n)++].flags = 0;
 363         }
 364 }
 365
 366 static void
 367 set_placement_range(struct nouveau_bo *nvbo, uint32_t domain)
 368 {
 369         struct nouveau_drm *drm = nouveau_bdev(nvbo->bo.bdev);
 370         u32 vram_pages = drm->client.device.info.ram_size >> PAGE_SHIFT;
 371         unsigned i, fpfn, lpfn;
 372
 373         if (drm->client.device.info.family == NV_DEVICE_INFO_V0_CELSIUS &&
 374             nvbo->mode && (domain & NOUVEAU_GEM_DOMAIN_VRAM) &&
 375             nvbo->bo.mem.num_pages < vram_pages / 4) {
 376                 /*
 377                  * Make sure that the color and depth buffers are handled
 378                  * by independent memory controller units. Up to a 9x
 379                  * speed up when alpha-blending and depth-test are enabled
 380                  * at the same time.
 381                  */
 382                 if (nvbo->zeta) {
 383                         fpfn = vram_pages / 2;
 384                         lpfn = ~0;
 385                 } else {
 386                         fpfn = 0;
 387                         lpfn = vram_pages / 2;
 388                 }
 389                 for (i = 0; i < nvbo->placement.num_placement; ++i) {
 390                         nvbo->placements[i].fpfn = fpfn;
 391                         nvbo->placements[i].lpfn = lpfn;
 392                 }
 393                 for (i = 0; i < nvbo->placement.num_busy_placement; ++i) {
 394                         nvbo->busy_placements[i].fpfn = fpfn;
 395                         nvbo->busy_placements[i].lpfn = lpfn;
 396                 }
 397         }
 398 }
 399
 400 void
 401 nouveau_bo_placement_set(struct nouveau_bo *nvbo, uint32_t domain,
 402                          uint32_t busy)
 403 {
 404         struct ttm_placement *pl = &nvbo->placement;
 405
 406         pl->placement = nvbo->placements;
 407         set_placement_list(nvbo->placements, &pl->num_placement, domain);
 408
 409         pl->busy_placement = nvbo->busy_placements;
 410         set_placement_list(nvbo->busy_placements, &pl->num_busy_placement,
 411                            domain | busy);
 412
 413         set_placement_range(nvbo, domain);
 414 }
 415
 416 int
 417 nouveau_bo_pin(struct nouveau_bo *nvbo, uint32_t domain, bool contig)
 418 {
 419         struct nouveau_drm *drm = nouveau_bdev(nvbo->bo.bdev);
 420         struct ttm_buffer_object *bo = &nvbo->bo;
 421         bool force = false, evict = false;
 422         int ret;
 423
 424         ret = ttm_bo_reserve(bo, false, false, NULL);
 425         if (ret)
 426                 return ret;
 427
 428         if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_TESLA &&
 429             domain == NOUVEAU_GEM_DOMAIN_VRAM && contig) {
 430                 if (!nvbo->contig) {
 431                         nvbo->contig = true;
 432                         force = true;
 433                         evict = true;
 434                 }
 435         }
 436
 437         if (nvbo->bo.pin_count) {
 438                 bool error = evict;
 439
 440                 switch (bo->mem.mem_type) {
 441                 case TTM_PL_VRAM:
 442                         error |= !(domain & NOUVEAU_GEM_DOMAIN_VRAM);
 443                         break;
 444                 case TTM_PL_TT:
 445                         error |= !(domain & NOUVEAU_GEM_DOMAIN_GART);
 446                 default:
 447                         break;
 448                 }
 449
 450                 if (error) {
 451                         NV_ERROR(drm, "bo %p pinned elsewhere: "
 452                                       "0x%08x vs 0x%08x\n", bo,
 453                                  bo->mem.mem_type, domain);
 454                         ret = -EBUSY;
 455                 }
 456                 ttm_bo_pin(&nvbo->bo);
 457                 goto out;
 458         }
 459
 460         if (evict) {
 461                 nouveau_bo_placement_set(nvbo, NOUVEAU_GEM_DOMAIN_GART, 0);
 462                 ret = nouveau_bo_validate(nvbo, false, false);
 463                 if (ret)
 464                         goto out;
 465         }
 466
 467         nouveau_bo_placement_set(nvbo, domain, 0);
 468         ret = nouveau_bo_validate(nvbo, false, false);
 469         if (ret)
 470                 goto out;
 471
 472         ttm_bo_pin(&nvbo->bo);
 473
 474         switch (bo->mem.mem_type) {
 475         case TTM_PL_VRAM:
 476                 drm->gem.vram_available -= bo->base.size;
 477                 break;
 478         case TTM_PL_TT:
 479                 drm->gem.gart_available -= bo->base.size;
 480                 break;
 481         default:
 482                 break;
 483         }
 484
 485 out:
 486         if (force && ret)
 487                 nvbo->contig = false;
 488         ttm_bo_unreserve(bo);
 489         return ret;
 490 }
 491
 492 int
 493 nouveau_bo_unpin(struct nouveau_bo *nvbo)
 494 {
 495         struct nouveau_drm *drm = nouveau_bdev(nvbo->bo.bdev);
 496         struct ttm_buffer_object *bo = &nvbo->bo;
 497         int ret;
 498
 499         ret = ttm_bo_reserve(bo, false, false, NULL);
 500         if (ret)
 501                 return ret;
 502
 503         ttm_bo_unpin(&nvbo->bo);
 504         if (!nvbo->bo.pin_count) {
 505                 switch (bo->mem.mem_type) {
 506                 case TTM_PL_VRAM:
 507                         drm->gem.vram_available += bo->base.size;
 508                         break;
 509                 case TTM_PL_TT:
 510                         drm->gem.gart_available += bo->base.size;
 511                         break;
 512                 default:
 513                         break;
 514                 }
 515         }
 516
 517         ttm_bo_unreserve(bo);
 518         return 0;
 519 }
 520
 521 int
 522 nouveau_bo_map(struct nouveau_bo *nvbo)
 523 {
 524         int ret;
 525
 526         ret = ttm_bo_reserve(&nvbo->bo, false, false, NULL);
 527         if (ret)
 528                 return ret;
 529
 530         ret = ttm_bo_kmap(&nvbo->bo, 0, nvbo->bo.mem.num_pages, &nvbo->kmap);
 531
 532         ttm_bo_unreserve(&nvbo->bo);
 533         return ret;
 534 }
 535
 536 void
 537 nouveau_bo_unmap(struct nouveau_bo *nvbo)
 538 {
 539         if (!nvbo)
 540                 return;
 541
 542         ttm_bo_kunmap(&nvbo->kmap);
 543 }
 544
 545 void
 546 nouveau_bo_sync_for_device(struct nouveau_bo *nvbo)
 547 {
 548         struct nouveau_drm *drm = nouveau_bdev(nvbo->bo.bdev);
 549         struct ttm_tt *ttm_dma = (struct ttm_tt *)nvbo->bo.ttm;
 550         int i;
 551
 552         if (!ttm_dma)
 553                 return;
 554
 555         /* Don't waste time looping if the object is coherent */
 556         if (nvbo->force_coherent)
 557                 return;
 558
 559         for (i = 0; i < ttm_dma->num_pages; i++)
 560                 dma_sync_single_for_device(drm->dev->dev,
 561                                            ttm_dma->dma_address[i],
 562                                            PAGE_SIZE, DMA_TO_DEVICE);
 563 }
 564
 565 void
 566 nouveau_bo_sync_for_cpu(struct nouveau_bo *nvbo)
 567 {
 568         struct nouveau_drm *drm = nouveau_bdev(nvbo->bo.bdev);
 569         struct ttm_tt *ttm_dma = (struct ttm_tt *)nvbo->bo.ttm;
 570         int i;
 571
 572         if (!ttm_dma)
 573                 return;
 574
 575         /* Don't waste time looping if the object is coherent */
 576         if (nvbo->force_coherent)
 577                 return;
 578
 579         for (i = 0; i < ttm_dma->num_pages; i++)
 580                 dma_sync_single_for_cpu(drm->dev->dev, ttm_dma->dma_address[i],
 581                                         PAGE_SIZE, DMA_FROM_DEVICE);
 582 }
 583
 584 void nouveau_bo_add_io_reserve_lru(struct ttm_buffer_object *bo)
 585 {
 586         struct nouveau_drm *drm = nouveau_bdev(bo->bdev);
 587         struct nouveau_bo *nvbo = nouveau_bo(bo);
 588
 589         mutex_lock(&drm->ttm.io_reserve_mutex);
 590         list_move_tail(&nvbo->io_reserve_lru, &drm->ttm.io_reserve_lru);
 591         mutex_unlock(&drm->ttm.io_reserve_mutex);
 592 }
 593
 594 void nouveau_bo_del_io_reserve_lru(struct ttm_buffer_object *bo)
 595 {
 596         struct nouveau_drm *drm = nouveau_bdev(bo->bdev);
 597         struct nouveau_bo *nvbo = nouveau_bo(bo);
 598
 599         mutex_lock(&drm->ttm.io_reserve_mutex);
 600         list_del_init(&nvbo->io_reserve_lru);
 601         mutex_unlock(&drm->ttm.io_reserve_mutex);
 602 }
 603
 604 int
 605 nouveau_bo_validate(struct nouveau_bo *nvbo, bool interruptible,
 606                     bool no_wait_gpu)
 607 {
 608         struct ttm_operation_ctx ctx = { interruptible, no_wait_gpu };
 609         int ret;
 610
 611         ret = ttm_bo_validate(&nvbo->bo, &nvbo->placement, &ctx);
 612         if (ret)
 613                 return ret;
 614
 615         nouveau_bo_sync_for_device(nvbo);
 616
 617         return 0;
 618 }
 619
 620 void
 621 nouveau_bo_wr16(struct nouveau_bo *nvbo, unsigned index, u16 val)
 622 {
 623         bool is_iomem;
 624         u16 *mem = ttm_kmap_obj_virtual(&nvbo->kmap, &is_iomem);
 625
 626         mem += index;
 627
 628         if (is_iomem)
 629                 iowrite16_native(val, (void __force __iomem *)mem);
 630         else
 631                 *mem = val;
 632 }
 633
 634 u32
 635 nouveau_bo_rd32(struct nouveau_bo *nvbo, unsigned index)
 636 {
 637         bool is_iomem;
 638         u32 *mem = ttm_kmap_obj_virtual(&nvbo->kmap, &is_iomem);
 639
 640         mem += index;
 641
 642         if (is_iomem)
 643                 return ioread32_native((void __force __iomem *)mem);
 644         else
 645                 return *mem;
 646 }
 647
 648 void
 649 nouveau_bo_wr32(struct nouveau_bo *nvbo, unsigned index, u32 val)
 650 {
 651         bool is_iomem;
 652         u32 *mem = ttm_kmap_obj_virtual(&nvbo->kmap, &is_iomem);
 653
 654         mem += index;
 655
 656         if (is_iomem)
 657                 iowrite32_native(val, (void __force __iomem *)mem);
 658         else
 659                 *mem = val;
 660 }
 661
 662 static struct ttm_tt *
 663 nouveau_ttm_tt_create(struct ttm_buffer_object *bo, uint32_t page_flags)
 664 {
 665 #if IS_ENABLED(CONFIG_AGP)
 666         struct nouveau_drm *drm = nouveau_bdev(bo->bdev);
 667
 668         if (drm->agp.bridge) {
 669                 return ttm_agp_tt_create(bo, drm->agp.bridge, page_flags);
 670         }
 671 #endif
 672
 673         return nouveau_sgdma_create_ttm(bo, page_flags);
 674 }
 675
 676 static int
 677 nouveau_ttm_tt_bind(struct ttm_device *bdev, struct ttm_tt *ttm,
 678                     struct ttm_resource *reg)
 679 {
 680 #if IS_ENABLED(CONFIG_AGP)
 681         struct nouveau_drm *drm = nouveau_bdev(bdev);
 682 #endif
 683         if (!reg)
 684                 return -EINVAL;
 685 #if IS_ENABLED(CONFIG_AGP)
 686         if (drm->agp.bridge)
 687                 return ttm_agp_bind(ttm, reg);
 688 #endif
 689         return nouveau_sgdma_bind(bdev, ttm, reg);
 690 }
 691
 692 static void
 693 nouveau_ttm_tt_unbind(struct ttm_device *bdev, struct ttm_tt *ttm)
 694 {
 695 #if IS_ENABLED(CONFIG_AGP)
 696         struct nouveau_drm *drm = nouveau_bdev(bdev);
 697
 698         if (drm->agp.bridge) {
 699                 ttm_agp_unbind(ttm);
 700                 return;
 701         }
 702 #endif
 703         nouveau_sgdma_unbind(bdev, ttm);
 704 }
 705
 706 static void
 707 nouveau_bo_evict_flags(struct ttm_buffer_object *bo, struct ttm_placement *pl)
 708 {
 709         struct nouveau_bo *nvbo = nouveau_bo(bo);
 710
 711         switch (bo->mem.mem_type) {
 712         case TTM_PL_VRAM:
 713                 nouveau_bo_placement_set(nvbo, NOUVEAU_GEM_DOMAIN_GART,
 714                                          NOUVEAU_GEM_DOMAIN_CPU);
 715                 break;
 716         default:
 717                 nouveau_bo_placement_set(nvbo, NOUVEAU_GEM_DOMAIN_CPU, 0);
 718                 break;
 719         }
 720
 721         *pl = nvbo->placement;
 722 }
 723
 724 static int
 725 nouveau_bo_move_prep(struct nouveau_drm *drm, struct ttm_buffer_object *bo,
 726                      struct ttm_resource *reg)
 727 {
 728         struct nouveau_mem *old_mem = nouveau_mem(&bo->mem);
 729         struct nouveau_mem *new_mem = nouveau_mem(reg);
 730         struct nvif_vmm *vmm = &drm->client.vmm.vmm;
 731         int ret;
 732
 733         ret = nvif_vmm_get(vmm, LAZY, false, old_mem->mem.page, 0,
 734                            old_mem->mem.size, &old_mem->vma[0]);
 735         if (ret)
 736                 return ret;
 737
 738         ret = nvif_vmm_get(vmm, LAZY, false, new_mem->mem.page, 0,
 739                            new_mem->mem.size, &old_mem->vma[1]);
 740         if (ret)
 741                 goto done;
 742
 743         ret = nouveau_mem_map(old_mem, vmm, &old_mem->vma[0]);
 744         if (ret)
 745                 goto done;
 746
 747         ret = nouveau_mem_map(new_mem, vmm, &old_mem->vma[1]);
 748 done:
 749         if (ret) {
 750                 nvif_vmm_put(vmm, &old_mem->vma[1]);
 751                 nvif_vmm_put(vmm, &old_mem->vma[0]);
 752         }
 753         return 0;
 754 }
 755
 756 static int
 757 nouveau_bo_move_m2mf(struct ttm_buffer_object *bo, int evict,
 758                      struct ttm_operation_ctx *ctx,
 759                      struct ttm_resource *new_reg)
 760 {
 761         struct nouveau_drm *drm = nouveau_bdev(bo->bdev);
 762         struct nouveau_channel *chan = drm->ttm.chan;
 763         struct nouveau_cli *cli = (void *)chan->user.client;
 764         struct nouveau_fence *fence;
 765         int ret;
 766
 767         /* create temporary vmas for the transfer and attach them to the
 768          * old nvkm_mem node, these will get cleaned up after ttm has
 769          * destroyed the ttm_resource
 770          */
 771         if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_TESLA) {
 772                 ret = nouveau_bo_move_prep(drm, bo, new_reg);
 773                 if (ret)
 774                         return ret;
 775         }
 776
 777         if (drm_drv_uses_atomic_modeset(drm->dev))
 778                 mutex_lock(&cli->mutex);
 779         else
 780                 mutex_lock_nested(&cli->mutex, SINGLE_DEPTH_NESTING);
 781         ret = nouveau_fence_sync(nouveau_bo(bo), chan, true, ctx->interruptible);
 782         if (ret == 0) {
 783                 ret = drm->ttm.move(chan, bo, &bo->mem, new_reg);
 784                 if (ret == 0) {
 785                         ret = nouveau_fence_new(chan, false, &fence);
 786                         if (ret == 0) {
 787                                 ret = ttm_bo_move_accel_cleanup(bo,
 788                                                                 &fence->base,
 789                                                                 evict, false,
 790                                                                 new_reg);
 791                                 nouveau_fence_unref(&fence);
 792                         }
 793                 }
 794         }
 795         mutex_unlock(&cli->mutex);
 796         return ret;
 797 }
 798
 799 void
 800 nouveau_bo_move_init(struct nouveau_drm *drm)
 801 {
 802         static const struct _method_table {
 803                 const char *name;
 804                 int engine;
 805                 s32 oclass;
 806                 int (*exec)(struct nouveau_channel *,
 807                             struct ttm_buffer_object *,
 808                             struct ttm_resource *, struct ttm_resource *);
 809                 int (*init)(struct nouveau_channel *, u32 handle);
 810         } _methods[] = {
 811                 {  "COPY", 4, 0xc5b5, nve0_bo_move_copy, nve0_bo_move_init },
 812                 {  "GRCE", 0, 0xc5b5, nve0_bo_move_copy, nvc0_bo_move_init },
 813                 {  "COPY", 4, 0xc3b5, nve0_bo_move_copy, nve0_bo_move_init },
 814                 {  "GRCE", 0, 0xc3b5, nve0_bo_move_copy, nvc0_bo_move_init },
 815                 {  "COPY", 4, 0xc1b5, nve0_bo_move_copy, nve0_bo_move_init },
 816                 {  "GRCE", 0, 0xc1b5, nve0_bo_move_copy, nvc0_bo_move_init },
 817                 {  "COPY", 4, 0xc0b5, nve0_bo_move_copy, nve0_bo_move_init },
 818                 {  "GRCE", 0, 0xc0b5, nve0_bo_move_copy, nvc0_bo_move_init },
 819                 {  "COPY", 4, 0xb0b5, nve0_bo_move_copy, nve0_bo_move_init },
 820                 {  "GRCE", 0, 0xb0b5, nve0_bo_move_copy, nvc0_bo_move_init },
 821                 {  "COPY", 4, 0xa0b5, nve0_bo_move_copy, nve0_bo_move_init },
 822                 {  "GRCE", 0, 0xa0b5, nve0_bo_move_copy, nvc0_bo_move_init },
 823                 { "COPY1", 5, 0x90b8, nvc0_bo_move_copy, nvc0_bo_move_init },
 824                 { "COPY0", 4, 0x90b5, nvc0_bo_move_copy, nvc0_bo_move_init },
 825                 {  "COPY", 0, 0x85b5, nva3_bo_move_copy, nv50_bo_move_init },
 826                 { "CRYPT", 0, 0x74c1, nv84_bo_move_exec, nv50_bo_move_init },
 827                 {  "M2MF", 0, 0x9039, nvc0_bo_move_m2mf, nvc0_bo_move_init },
 828                 {  "M2MF", 0, 0x5039, nv50_bo_move_m2mf, nv50_bo_move_init },
 829                 {  "M2MF", 0, 0x0039, nv04_bo_move_m2mf, nv04_bo_move_init },
 830                 {},
 831         };
 832         const struct _method_table *mthd = _methods;
 833         const char *name = "CPU";
 834         int ret;
 835
 836         do {
 837                 struct nouveau_channel *chan;
 838
 839                 if (mthd->engine)
 840                         chan = drm->cechan;
 841                 else
 842                         chan = drm->channel;
 843                 if (chan == NULL)
 844                         continue;
 845
 846                 ret = nvif_object_ctor(&chan->user, "ttmBoMove",
 847                                        mthd->oclass | (mthd->engine << 16),
 848                                        mthd->oclass, NULL, 0,
 849                                        &drm->ttm.copy);
 850                 if (ret == 0) {
 851                         ret = mthd->init(chan, drm->ttm.copy.handle);
 852                         if (ret) {
 853                                 nvif_object_dtor(&drm->ttm.copy);
 854                                 continue;
 855                         }
 856
 857                         drm->ttm.move = mthd->exec;
 858                         drm->ttm.chan = chan;
 859                         name = mthd->name;
 860                         break;
 861                 }
 862         } while ((++mthd)->exec);
 863
 864         NV_INFO(drm, "MM: using %s for buffer copies\n", name);
 865 }
 866
 867 static void
 868 nouveau_bo_move_ntfy(struct ttm_buffer_object *bo, bool evict,
 869                      struct ttm_resource *new_reg)
 870 {
 871         struct nouveau_mem *mem = new_reg ? nouveau_mem(new_reg) : NULL;
 872         struct nouveau_bo *nvbo = nouveau_bo(bo);
 873         struct nouveau_vma *vma;
 874
 875         /* ttm can now (stupidly) pass the driver bos it didn't create... */
 876         if (bo->destroy != nouveau_bo_del_ttm)
 877                 return;
 878
 879         nouveau_bo_del_io_reserve_lru(bo);
 880
 881         if (mem && new_reg->mem_type != TTM_PL_SYSTEM &&
 882             mem->mem.page == nvbo->page) {
 883                 list_for_each_entry(vma, &nvbo->vma_list, head) {
 884                         nouveau_vma_map(vma, mem);
 885                 }
 886         } else {
 887                 list_for_each_entry(vma, &nvbo->vma_list, head) {
 888                         WARN_ON(ttm_bo_wait(bo, false, false));
 889                         nouveau_vma_unmap(vma);
 890                 }
 891         }
 892
 893         if (new_reg) {
 894                 if (new_reg->mm_node)
 895                         nvbo->offset = (new_reg->start << PAGE_SHIFT);
 896                 else
 897                         nvbo->offset = 0;
 898         }
 899
 900 }
 901
 902 static int
 903 nouveau_bo_vm_bind(struct ttm_buffer_object *bo, struct ttm_resource *new_reg,
 904                    struct nouveau_drm_tile **new_tile)
 905 {
 906         struct nouveau_drm *drm = nouveau_bdev(bo->bdev);
 907         struct drm_device *dev = drm->dev;
 908         struct nouveau_bo *nvbo = nouveau_bo(bo);
 909         u64 offset = new_reg->start << PAGE_SHIFT;
 910
 911         *new_tile = NULL;
 912         if (new_reg->mem_type != TTM_PL_VRAM)
 913                 return 0;
 914
 915         if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_CELSIUS) {
 916                 *new_tile = nv10_bo_set_tiling(dev, offset, bo->base.size,
 917                                                nvbo->mode, nvbo->zeta);
 918         }
 919
 920         return 0;
 921 }
 922
 923 static void
 924 nouveau_bo_vm_cleanup(struct ttm_buffer_object *bo,
 925                       struct nouveau_drm_tile *new_tile,
 926                       struct nouveau_drm_tile **old_tile)
 927 {
 928         struct nouveau_drm *drm = nouveau_bdev(bo->bdev);
 929         struct drm_device *dev = drm->dev;
 930         struct dma_fence *fence = dma_resv_get_excl(bo->base.resv);
 931
 932         nv10_bo_put_tile_region(dev, *old_tile, fence);
 933         *old_tile = new_tile;
 934 }
 935
 936 static int
 937 nouveau_bo_move(struct ttm_buffer_object *bo, bool evict,
 938                 struct ttm_operation_ctx *ctx,
 939                 struct ttm_resource *new_reg,
 940                 struct ttm_place *hop)
 941 {
 942         struct nouveau_drm *drm = nouveau_bdev(bo->bdev);
 943         struct nouveau_bo *nvbo = nouveau_bo(bo);
 944         struct ttm_resource *old_reg = &bo->mem;
 945         struct nouveau_drm_tile *new_tile = NULL;
 946         int ret = 0;
 947
 948
 949         if (new_reg->mem_type == TTM_PL_TT) {
 950                 ret = nouveau_ttm_tt_bind(bo->bdev, bo->ttm, new_reg);
 951                 if (ret)
 952                         return ret;
 953         }
 954
 955         nouveau_bo_move_ntfy(bo, evict, new_reg);
 956         ret = ttm_bo_wait_ctx(bo, ctx);
 957         if (ret)
 958                 goto out_ntfy;
 959
 960         if (nvbo->bo.pin_count)
 961                 NV_WARN(drm, "Moving pinned object %p!\n", nvbo);
 962
 963         if (drm->client.device.info.family < NV_DEVICE_INFO_V0_TESLA) {
 964                 ret = nouveau_bo_vm_bind(bo, new_reg, &new_tile);
 965                 if (ret)
 966                         goto out_ntfy;
 967         }
 968
 969         /* Fake bo copy. */
 970         if (old_reg->mem_type == TTM_PL_SYSTEM && !bo->ttm) {
 971                 ttm_bo_move_null(bo, new_reg);
 972                 goto out;
 973         }
 974
 975         if (old_reg->mem_type == TTM_PL_SYSTEM &&
 976             new_reg->mem_type == TTM_PL_TT) {
 977                 ttm_bo_move_null(bo, new_reg);
 978                 goto out;
 979         }
 980
 981         if (old_reg->mem_type == TTM_PL_TT &&
 982             new_reg->mem_type == TTM_PL_SYSTEM) {
 983                 nouveau_ttm_tt_unbind(bo->bdev, bo->ttm);
 984                 ttm_resource_free(bo, &bo->mem);
 985                 ttm_bo_assign_mem(bo, new_reg);
 986                 goto out;
 987         }
 988
 989         /* Hardware assisted copy. */
 990         if (drm->ttm.move) {
 991                 if ((old_reg->mem_type == TTM_PL_SYSTEM &&
 992                      new_reg->mem_type == TTM_PL_VRAM) ||
 993                     (old_reg->mem_type == TTM_PL_VRAM &&
 994                      new_reg->mem_type == TTM_PL_SYSTEM)) {
 995                         hop->fpfn = 0;
 996                         hop->lpfn = 0;
 997                         hop->mem_type = TTM_PL_TT;
 998                         hop->flags = 0;
 999                         return -EMULTIHOP;
1000                 }
1001                 ret = nouveau_bo_move_m2mf(bo, evict, ctx,
1002                                            new_reg);
1003         } else
1004                 ret = -ENODEV;
1005
1006         if (ret) {
1007                 /* Fallback to software copy. */
1008                 ret = ttm_bo_move_memcpy(bo, ctx, new_reg);
1009         }
1010
1011 out:
1012         if (drm->client.device.info.family < NV_DEVICE_INFO_V0_TESLA) {
1013                 if (ret)
1014                         nouveau_bo_vm_cleanup(bo, NULL, &new_tile);
1015                 else
1016                         nouveau_bo_vm_cleanup(bo, new_tile, &nvbo->tile);
1017         }
1018 out_ntfy:
1019         if (ret) {
1020                 swap(*new_reg, bo->mem);
1021                 nouveau_bo_move_ntfy(bo, false, new_reg);
1022                 swap(*new_reg, bo->mem);
1023         }
1024         return ret;
1025 }
1026
1027 static int
1028 nouveau_bo_verify_access(struct ttm_buffer_object *bo, struct file *filp)
1029 {
1030         struct nouveau_bo *nvbo = nouveau_bo(bo);
1031
1032         return drm_vma_node_verify_access(&nvbo->bo.base.vma_node,
1033                                           filp->private_data);
1034 }
1035
1036 static void
1037 nouveau_ttm_io_mem_free_locked(struct nouveau_drm *drm,
1038                                struct ttm_resource *reg)
1039 {
1040         struct nouveau_mem *mem = nouveau_mem(reg);
1041
1042         if (drm->client.mem->oclass >= NVIF_CLASS_MEM_NV50) {
1043                 switch (reg->mem_type) {
1044                 case TTM_PL_TT:
1045                         if (mem->kind)
1046                                 nvif_object_unmap_handle(&mem->mem.object);
1047                         break;
1048                 case TTM_PL_VRAM:
1049                         nvif_object_unmap_handle(&mem->mem.object);
1050                         break;
1051                 default:
1052                         break;
1053                 }
1054         }
1055 }
1056
1057 static int
1058 nouveau_ttm_io_mem_reserve(struct ttm_device *bdev, struct ttm_resource *reg)
1059 {
1060         struct nouveau_drm *drm = nouveau_bdev(bdev);
1061         struct nvkm_device *device = nvxx_device(&drm->client.device);
1062         struct nouveau_mem *mem = nouveau_mem(reg);
1063         struct nvif_mmu *mmu = &drm->client.mmu;
1064         int ret;
1065
1066         mutex_lock(&drm->ttm.io_reserve_mutex);
1067 retry:
1068         switch (reg->mem_type) {
1069         case TTM_PL_SYSTEM:
1070                 /* System memory */
1071                 ret = 0;
1072                 goto out;
1073         case TTM_PL_TT:
1074 #if IS_ENABLED(CONFIG_AGP)
1075                 if (drm->agp.bridge) {
1076                         reg->bus.offset = (reg->start << PAGE_SHIFT) +
1077                                 drm->agp.base;
1078                         reg->bus.is_iomem = !drm->agp.cma;
1079                         reg->bus.caching = ttm_write_combined;
1080                 }
1081 #endif
1082                 if (drm->client.mem->oclass < NVIF_CLASS_MEM_NV50 ||
1083                     !mem->kind) {
1084                         /* untiled */
1085                         ret = 0;
1086                         break;
1087                 }
1088                 fallthrough;    /* tiled memory */
1089         case TTM_PL_VRAM:
1090                 reg->bus.offset = (reg->start << PAGE_SHIFT) +
1091                         device->func->resource_addr(device, 1);
1092                 reg->bus.is_iomem = true;
1093
1094                 /* Some BARs do not support being ioremapped WC */
1095                 if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_TESLA &&
1096                     mmu->type[drm->ttm.type_vram].type & NVIF_MEM_UNCACHED)
1097                         reg->bus.caching = ttm_uncached;
1098                 else
1099                         reg->bus.caching = ttm_write_combined;
1100
1101                 if (drm->client.mem->oclass >= NVIF_CLASS_MEM_NV50) {
1102                         union {
1103                                 struct nv50_mem_map_v0 nv50;
1104                                 struct gf100_mem_map_v0 gf100;
1105                         } args;
1106                         u64 handle, length;
1107                         u32 argc = 0;
1108
1109                         switch (mem->mem.object.oclass) {
1110                         case NVIF_CLASS_MEM_NV50:
1111                                 args.nv50.version = 0;
1112                                 args.nv50.ro = 0;
1113                                 args.nv50.kind = mem->kind;
1114                                 args.nv50.comp = mem->comp;
1115                                 argc = sizeof(args.nv50);
1116                                 break;
1117                         case NVIF_CLASS_MEM_GF100:
1118                                 args.gf100.version = 0;
1119                                 args.gf100.ro = 0;
1120                                 args.gf100.kind = mem->kind;
1121                                 argc = sizeof(args.gf100);
1122                                 break;
1123                         default:
1124                                 WARN_ON(1);
1125                                 break;
1126                         }
1127
1128                         ret = nvif_object_map_handle(&mem->mem.object,
1129                                                      &args, argc,
1130                                                      &handle, &length);
1131                         if (ret != 1) {
1132                                 if (WARN_ON(ret == 0))
1133                                         ret = -EINVAL;
1134                                 goto out;
1135                         }
1136
1137                         reg->bus.offset = handle;
1138                 }
1139                 ret = 0;
1140                 break;
1141         default:
1142                 ret = -EINVAL;
1143         }
1144
1145 out:
1146         if (ret == -ENOSPC) {
1147                 struct nouveau_bo *nvbo;
1148
1149                 nvbo = list_first_entry_or_null(&drm->ttm.io_reserve_lru,
1150                                                 typeof(*nvbo),
1151                                                 io_reserve_lru);
1152                 if (nvbo) {
1153                         list_del_init(&nvbo->io_reserve_lru);
1154                         drm_vma_node_unmap(&nvbo->bo.base.vma_node,
1155                                            bdev->dev_mapping);
1156                         nouveau_ttm_io_mem_free_locked(drm, &nvbo->bo.mem);
1157                         goto retry;
1158                 }
1159
1160         }
1161         mutex_unlock(&drm->ttm.io_reserve_mutex);
1162         return ret;
1163 }
1164
1165 static void
1166 nouveau_ttm_io_mem_free(struct ttm_device *bdev, struct ttm_resource *reg)
1167 {
1168         struct nouveau_drm *drm = nouveau_bdev(bdev);
1169
1170         mutex_lock(&drm->ttm.io_reserve_mutex);
1171         nouveau_ttm_io_mem_free_locked(drm, reg);
1172         mutex_unlock(&drm->ttm.io_reserve_mutex);
1173 }
1174
1175 vm_fault_t nouveau_ttm_fault_reserve_notify(struct ttm_buffer_object *bo)
1176 {
1177         struct nouveau_drm *drm = nouveau_bdev(bo->bdev);
1178         struct nouveau_bo *nvbo = nouveau_bo(bo);
1179         struct nvkm_device *device = nvxx_device(&drm->client.device);
1180         u32 mappable = device->func->resource_size(device, 1) >> PAGE_SHIFT;
1181         int i, ret;
1182
1183         /* as long as the bo isn't in vram, and isn't tiled, we've got
1184          * nothing to do here.
1185          */
1186         if (bo->mem.mem_type != TTM_PL_VRAM) {
1187                 if (drm->client.device.info.family < NV_DEVICE_INFO_V0_TESLA ||
1188                     !nvbo->kind)
1189                         return 0;
1190
1191                 if (bo->mem.mem_type != TTM_PL_SYSTEM)
1192                         return 0;
1193
1194                 nouveau_bo_placement_set(nvbo, NOUVEAU_GEM_DOMAIN_GART, 0);
1195
1196         } else {
1197                 /* make sure bo is in mappable vram */
1198                 if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_TESLA ||
1199                     bo->mem.start + bo->mem.num_pages < mappable)
1200                         return 0;
1201
1202                 for (i = 0; i < nvbo->placement.num_placement; ++i) {
1203                         nvbo->placements[i].fpfn = 0;
1204                         nvbo->placements[i].lpfn = mappable;
1205                 }
1206
1207                 for (i = 0; i < nvbo->placement.num_busy_placement; ++i) {
1208                         nvbo->busy_placements[i].fpfn = 0;
1209                         nvbo->busy_placements[i].lpfn = mappable;
1210                 }
1211
1212                 nouveau_bo_placement_set(nvbo, NOUVEAU_GEM_DOMAIN_VRAM, 0);
1213         }
1214
1215         ret = nouveau_bo_validate(nvbo, false, false);
1216         if (unlikely(ret == -EBUSY || ret == -ERESTARTSYS))
1217                 return VM_FAULT_NOPAGE;
1218         else if (unlikely(ret))
1219                 return VM_FAULT_SIGBUS;
1220
1221         ttm_bo_move_to_lru_tail_unlocked(bo);
1222         return 0;
1223 }
1224
1225 static int
1226 nouveau_ttm_tt_populate(struct ttm_device *bdev,
1227                         struct ttm_tt *ttm, struct ttm_operation_ctx *ctx)
1228 {
1229         struct ttm_tt *ttm_dma = (void *)ttm;
1230         struct nouveau_drm *drm;
1231         struct device *dev;
1232         bool slave = !!(ttm->page_flags & TTM_PAGE_FLAG_SG);
1233
1234         if (ttm_tt_is_populated(ttm))
1235                 return 0;
1236
1237         if (slave && ttm->sg) {
1238                 drm_prime_sg_to_dma_addr_array(ttm->sg, ttm_dma->dma_address,
1239                                                ttm->num_pages);
1240                 return 0;
1241         }
1242
1243         drm = nouveau_bdev(bdev);
1244         dev = drm->dev->dev;
1245
1246         return ttm_pool_alloc(&drm->ttm.bdev.pool, ttm, ctx);
1247 }
1248
1249 static void
1250 nouveau_ttm_tt_unpopulate(struct ttm_device *bdev,
1251                           struct ttm_tt *ttm)
1252 {
1253         struct nouveau_drm *drm;
1254         struct device *dev;
1255         bool slave = !!(ttm->page_flags & TTM_PAGE_FLAG_SG);
1256
1257         if (slave)
1258                 return;
1259
1260         drm = nouveau_bdev(bdev);
1261         dev = drm->dev->dev;
1262
1263         return ttm_pool_free(&drm->ttm.bdev.pool, ttm);
1264 }
1265
1266 static void
1267 nouveau_ttm_tt_destroy(struct ttm_device *bdev,
1268                        struct ttm_tt *ttm)
1269 {
1270 #if IS_ENABLED(CONFIG_AGP)
1271         struct nouveau_drm *drm = nouveau_bdev(bdev);
1272         if (drm->agp.bridge) {
1273                 ttm_agp_unbind(ttm);
1274                 ttm_tt_destroy_common(bdev, ttm);
1275                 ttm_agp_destroy(ttm);
1276                 return;
1277         }
1278 #endif
1279         nouveau_sgdma_destroy(bdev, ttm);
1280 }
1281
1282 void
1283 nouveau_bo_fence(struct nouveau_bo *nvbo, struct nouveau_fence *fence, bool exclusive)
1284 {
1285         struct dma_resv *resv = nvbo->bo.base.resv;
1286
1287         if (exclusive)
1288                 dma_resv_add_excl_fence(resv, &fence->base);
1289         else if (fence)
1290                 dma_resv_add_shared_fence(resv, &fence->base);
1291 }
1292
1293 static void
1294 nouveau_bo_delete_mem_notify(struct ttm_buffer_object *bo)
1295 {
1296         nouveau_bo_move_ntfy(bo, false, NULL);
1297 }
1298
1299 struct ttm_device_funcs nouveau_bo_driver = {
1300         .ttm_tt_create = &nouveau_ttm_tt_create,
1301         .ttm_tt_populate = &nouveau_ttm_tt_populate,
1302         .ttm_tt_unpopulate = &nouveau_ttm_tt_unpopulate,
1303         .ttm_tt_destroy = &nouveau_ttm_tt_destroy,
1304         .eviction_valuable = ttm_bo_eviction_valuable,
1305         .evict_flags = nouveau_bo_evict_flags,
1306         .delete_mem_notify = nouveau_bo_delete_mem_notify,
1307         .move = nouveau_bo_move,
1308         .verify_access = nouveau_bo_verify_access,
1309         .io_mem_reserve = &nouveau_ttm_io_mem_reserve,
1310         .io_mem_free = &nouveau_ttm_io_mem_free,
1311 };