1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright © 2019 Intel Corporation
6 #include "i915_selftest.h"
7 #include "intel_engine_heartbeat.h"
8 #include "intel_engine_pm.h"
11 #include "gem/selftests/mock_context.h"
12 #include "selftests/igt_flush_test.h"
13 #include "selftests/mock_drm.h"
15 static int request_sync(struct i915_request *rq)
17 struct intel_timeline *tl = i915_request_timeline(rq);
21 intel_timeline_get(tl);
24 /* Opencode i915_request_add() so we can keep the timeline locked. */
25 __i915_request_commit(rq);
26 rq->sched.attr.priority = I915_PRIORITY_BARRIER;
27 __i915_request_queue_bh(rq);
29 timeout = i915_request_wait(rq, 0, HZ / 10);
33 i915_request_retire_upto(rq);
35 lockdep_unpin_lock(&tl->mutex, rq->cookie);
36 mutex_unlock(&tl->mutex);
39 intel_timeline_put(tl);
44 static int context_sync(struct intel_context *ce)
46 struct intel_timeline *tl = ce->timeline;
49 mutex_lock(&tl->mutex);
51 struct i915_request *rq;
54 if (list_empty(&tl->requests))
57 rq = list_last_entry(&tl->requests, typeof(*rq), link);
60 timeout = i915_request_wait(rq, 0, HZ / 10);
64 i915_request_retire_upto(rq);
68 mutex_unlock(&tl->mutex);
70 /* Wait for all barriers to complete (remote CPU) before we check */
71 i915_active_unlock_wait(&ce->active);
75 static int __live_context_size(struct intel_engine_cs *engine)
77 struct intel_context *ce;
78 struct i915_request *rq;
82 ce = intel_context_create(engine);
86 err = intel_context_pin(ce);
90 vaddr = i915_gem_object_pin_map_unlocked(ce->state->obj,
91 i915_coherent_map_type(engine->i915));
94 intel_context_unpin(ce);
99 * Note that execlists also applies a redzone which it checks on
100 * context unpin when debugging. We are using the same location
101 * and same poison value so that our checks overlap. Despite the
102 * redundancy, we want to keep this little selftest so that we
103 * get coverage of any and all submission backends, and we can
104 * always extend this test to ensure we trick the HW into a
105 * compromising position wrt to the various sections that need
106 * to be written into the context state.
108 * TLDR; this overlaps with the execlists redzone.
110 vaddr += engine->context_size - I915_GTT_PAGE_SIZE;
111 memset(vaddr, POISON_INUSE, I915_GTT_PAGE_SIZE);
113 rq = intel_context_create_request(ce);
114 intel_context_unpin(ce);
120 err = request_sync(rq);
124 /* Force the context switch */
125 rq = intel_engine_create_kernel_request(engine);
130 err = request_sync(rq);
134 if (memchr_inv(vaddr, POISON_INUSE, I915_GTT_PAGE_SIZE)) {
135 pr_err("%s context overwrote trailing red-zone!", engine->name);
140 i915_gem_object_unpin_map(ce->state->obj);
142 intel_context_put(ce);
146 static int live_context_size(void *arg)
148 struct intel_gt *gt = arg;
149 struct intel_engine_cs *engine;
150 enum intel_engine_id id;
154 * Check that our context sizes are correct by seeing if the
155 * HW tries to write past the end of one.
158 for_each_engine(engine, gt, id) {
161 if (!engine->context_size)
164 intel_engine_pm_get(engine);
167 * Hide the old default state -- we lie about the context size
168 * and get confused when the default state is smaller than
169 * expected. For our do nothing request, inheriting the
170 * active state is sufficient, we are only checking that we
171 * don't use more than we planned.
173 saved = fetch_and_zero(&engine->default_state);
175 /* Overlaps with the execlists redzone */
176 engine->context_size += I915_GTT_PAGE_SIZE;
178 err = __live_context_size(engine);
180 engine->context_size -= I915_GTT_PAGE_SIZE;
182 engine->default_state = saved;
184 intel_engine_pm_put(engine);
193 static int __live_active_context(struct intel_engine_cs *engine)
195 unsigned long saved_heartbeat;
196 struct intel_context *ce;
201 * We keep active contexts alive until after a subsequent context
202 * switch as the final write from the context-save will be after
203 * we retire the final request. We track when we unpin the context,
204 * under the presumption that the final pin is from the last request,
205 * and instead of immediately unpinning the context, we add a task
206 * to unpin the context from the next idle-barrier.
208 * This test makes sure that the context is kept alive until a
209 * subsequent idle-barrier (emitted when the engine wakeref hits 0
210 * with no more outstanding requests).
213 if (intel_engine_pm_is_awake(engine)) {
214 pr_err("%s is awake before starting %s!\n",
215 engine->name, __func__);
219 ce = intel_context_create(engine);
223 saved_heartbeat = engine->props.heartbeat_interval_ms;
224 engine->props.heartbeat_interval_ms = 0;
226 for (pass = 0; pass <= 2; pass++) {
227 struct i915_request *rq;
229 intel_engine_pm_get(engine);
231 rq = intel_context_create_request(ce);
237 err = request_sync(rq);
241 /* Context will be kept active until after an idle-barrier. */
242 if (i915_active_is_idle(&ce->active)) {
243 pr_err("context is not active; expected idle-barrier (%s pass %d)\n",
249 if (!intel_engine_pm_is_awake(engine)) {
250 pr_err("%s is asleep before idle-barrier\n",
257 intel_engine_pm_put(engine);
262 /* Now make sure our idle-barriers are flushed */
263 err = intel_engine_flush_barriers(engine);
267 /* Wait for the barrier and in the process wait for engine to park */
268 err = context_sync(engine->kernel_context);
272 if (!i915_active_is_idle(&ce->active)) {
273 pr_err("context is still active!");
277 intel_engine_pm_flush(engine);
279 if (intel_engine_pm_is_awake(engine)) {
280 struct drm_printer p = drm_debug_printer(__func__);
282 intel_engine_dump(engine, &p,
283 "%s is still awake:%d after idle-barriers\n",
285 atomic_read(&engine->wakeref.count));
293 engine->props.heartbeat_interval_ms = saved_heartbeat;
294 intel_context_put(ce);
298 static int live_active_context(void *arg)
300 struct intel_gt *gt = arg;
301 struct intel_engine_cs *engine;
302 enum intel_engine_id id;
305 for_each_engine(engine, gt, id) {
306 err = __live_active_context(engine);
310 err = igt_flush_test(gt->i915);
318 static int __remote_sync(struct intel_context *ce, struct intel_context *remote)
320 struct i915_request *rq;
323 err = intel_context_pin(remote);
327 rq = intel_context_create_request(ce);
333 err = intel_context_prepare_remote_request(remote, rq);
335 i915_request_add(rq);
339 err = request_sync(rq);
342 intel_context_unpin(remote);
346 static int __live_remote_context(struct intel_engine_cs *engine)
348 struct intel_context *local, *remote;
349 unsigned long saved_heartbeat;
354 * Check that our idle barriers do not interfere with normal
355 * activity tracking. In particular, check that operating
356 * on the context image remotely (intel_context_prepare_remote_request),
357 * which inserts foreign fences into intel_context.active, does not
358 * clobber the idle-barrier.
361 if (intel_engine_pm_is_awake(engine)) {
362 pr_err("%s is awake before starting %s!\n",
363 engine->name, __func__);
367 remote = intel_context_create(engine);
369 return PTR_ERR(remote);
371 local = intel_context_create(engine);
373 err = PTR_ERR(local);
377 saved_heartbeat = engine->props.heartbeat_interval_ms;
378 engine->props.heartbeat_interval_ms = 0;
379 intel_engine_pm_get(engine);
381 for (pass = 0; pass <= 2; pass++) {
382 err = __remote_sync(local, remote);
386 err = __remote_sync(engine->kernel_context, remote);
390 if (i915_active_is_idle(&remote->active)) {
391 pr_err("remote context is not active; expected idle-barrier (%s pass %d)\n",
398 intel_engine_pm_put(engine);
399 engine->props.heartbeat_interval_ms = saved_heartbeat;
401 intel_context_put(local);
403 intel_context_put(remote);
407 static int live_remote_context(void *arg)
409 struct intel_gt *gt = arg;
410 struct intel_engine_cs *engine;
411 enum intel_engine_id id;
414 for_each_engine(engine, gt, id) {
415 err = __live_remote_context(engine);
419 err = igt_flush_test(gt->i915);
427 int intel_context_live_selftests(struct drm_i915_private *i915)
429 static const struct i915_subtest tests[] = {
430 SUBTEST(live_context_size),
431 SUBTEST(live_active_context),
432 SUBTEST(live_remote_context),
434 struct intel_gt *gt = &i915->gt;
436 if (intel_gt_is_wedged(gt))
439 return intel_gt_live_subtests(tests, gt);