Merge tag 'for-5.18/drivers-2022-04-02' of git://git.kernel.dk/linux-block
[linux-2.6-microblaze.git] / drivers / gpu / drm / i915 / gem / i915_gem_execbuffer.c
1 /*
2  * SPDX-License-Identifier: MIT
3  *
4  * Copyright © 2008,2010 Intel Corporation
5  */
6
7 #include <linux/intel-iommu.h>
8 #include <linux/dma-resv.h>
9 #include <linux/sync_file.h>
10 #include <linux/uaccess.h>
11
12 #include <drm/drm_syncobj.h>
13
14 #include "display/intel_frontbuffer.h"
15
16 #include "gem/i915_gem_ioctls.h"
17 #include "gt/intel_context.h"
18 #include "gt/intel_gpu_commands.h"
19 #include "gt/intel_gt.h"
20 #include "gt/intel_gt_buffer_pool.h"
21 #include "gt/intel_gt_pm.h"
22 #include "gt/intel_ring.h"
23
24 #include "pxp/intel_pxp.h"
25
26 #include "i915_cmd_parser.h"
27 #include "i915_drv.h"
28 #include "i915_file_private.h"
29 #include "i915_gem_clflush.h"
30 #include "i915_gem_context.h"
31 #include "i915_gem_evict.h"
32 #include "i915_gem_ioctls.h"
33 #include "i915_trace.h"
34 #include "i915_user_extensions.h"
35
36 struct eb_vma {
37         struct i915_vma *vma;
38         unsigned int flags;
39
40         /** This vma's place in the execbuf reservation list */
41         struct drm_i915_gem_exec_object2 *exec;
42         struct list_head bind_link;
43         struct list_head reloc_link;
44
45         struct hlist_node node;
46         u32 handle;
47 };
48
49 enum {
50         FORCE_CPU_RELOC = 1,
51         FORCE_GTT_RELOC,
52         FORCE_GPU_RELOC,
53 #define DBG_FORCE_RELOC 0 /* choose one of the above! */
54 };
55
56 /* __EXEC_OBJECT_NO_RESERVE is BIT(31), defined in i915_vma.h */
57 #define __EXEC_OBJECT_HAS_PIN           BIT(30)
58 #define __EXEC_OBJECT_HAS_FENCE         BIT(29)
59 #define __EXEC_OBJECT_USERPTR_INIT      BIT(28)
60 #define __EXEC_OBJECT_NEEDS_MAP         BIT(27)
61 #define __EXEC_OBJECT_NEEDS_BIAS        BIT(26)
62 #define __EXEC_OBJECT_INTERNAL_FLAGS    (~0u << 26) /* all of the above + */
63 #define __EXEC_OBJECT_RESERVED (__EXEC_OBJECT_HAS_PIN | __EXEC_OBJECT_HAS_FENCE)
64
65 #define __EXEC_HAS_RELOC        BIT(31)
66 #define __EXEC_ENGINE_PINNED    BIT(30)
67 #define __EXEC_USERPTR_USED     BIT(29)
68 #define __EXEC_INTERNAL_FLAGS   (~0u << 29)
69 #define UPDATE                  PIN_OFFSET_FIXED
70
71 #define BATCH_OFFSET_BIAS (256*1024)
72
73 #define __I915_EXEC_ILLEGAL_FLAGS \
74         (__I915_EXEC_UNKNOWN_FLAGS | \
75          I915_EXEC_CONSTANTS_MASK  | \
76          I915_EXEC_RESOURCE_STREAMER)
77
78 /* Catch emission of unexpected errors for CI! */
79 #if IS_ENABLED(CONFIG_DRM_I915_DEBUG_GEM)
80 #undef EINVAL
81 #define EINVAL ({ \
82         DRM_DEBUG_DRIVER("EINVAL at %s:%d\n", __func__, __LINE__); \
83         22; \
84 })
85 #endif
86
87 /**
88  * DOC: User command execution
89  *
90  * Userspace submits commands to be executed on the GPU as an instruction
91  * stream within a GEM object we call a batchbuffer. This instructions may
92  * refer to other GEM objects containing auxiliary state such as kernels,
93  * samplers, render targets and even secondary batchbuffers. Userspace does
94  * not know where in the GPU memory these objects reside and so before the
95  * batchbuffer is passed to the GPU for execution, those addresses in the
96  * batchbuffer and auxiliary objects are updated. This is known as relocation,
97  * or patching. To try and avoid having to relocate each object on the next
98  * execution, userspace is told the location of those objects in this pass,
99  * but this remains just a hint as the kernel may choose a new location for
100  * any object in the future.
101  *
102  * At the level of talking to the hardware, submitting a batchbuffer for the
103  * GPU to execute is to add content to a buffer from which the HW
104  * command streamer is reading.
105  *
106  * 1. Add a command to load the HW context. For Logical Ring Contexts, i.e.
107  *    Execlists, this command is not placed on the same buffer as the
108  *    remaining items.
109  *
110  * 2. Add a command to invalidate caches to the buffer.
111  *
112  * 3. Add a batchbuffer start command to the buffer; the start command is
113  *    essentially a token together with the GPU address of the batchbuffer
114  *    to be executed.
115  *
116  * 4. Add a pipeline flush to the buffer.
117  *
118  * 5. Add a memory write command to the buffer to record when the GPU
119  *    is done executing the batchbuffer. The memory write writes the
120  *    global sequence number of the request, ``i915_request::global_seqno``;
121  *    the i915 driver uses the current value in the register to determine
122  *    if the GPU has completed the batchbuffer.
123  *
124  * 6. Add a user interrupt command to the buffer. This command instructs
125  *    the GPU to issue an interrupt when the command, pipeline flush and
126  *    memory write are completed.
127  *
128  * 7. Inform the hardware of the additional commands added to the buffer
129  *    (by updating the tail pointer).
130  *
131  * Processing an execbuf ioctl is conceptually split up into a few phases.
132  *
133  * 1. Validation - Ensure all the pointers, handles and flags are valid.
134  * 2. Reservation - Assign GPU address space for every object
135  * 3. Relocation - Update any addresses to point to the final locations
136  * 4. Serialisation - Order the request with respect to its dependencies
137  * 5. Construction - Construct a request to execute the batchbuffer
138  * 6. Submission (at some point in the future execution)
139  *
140  * Reserving resources for the execbuf is the most complicated phase. We
141  * neither want to have to migrate the object in the address space, nor do
142  * we want to have to update any relocations pointing to this object. Ideally,
143  * we want to leave the object where it is and for all the existing relocations
144  * to match. If the object is given a new address, or if userspace thinks the
145  * object is elsewhere, we have to parse all the relocation entries and update
146  * the addresses. Userspace can set the I915_EXEC_NORELOC flag to hint that
147  * all the target addresses in all of its objects match the value in the
148  * relocation entries and that they all match the presumed offsets given by the
149  * list of execbuffer objects. Using this knowledge, we know that if we haven't
150  * moved any buffers, all the relocation entries are valid and we can skip
151  * the update. (If userspace is wrong, the likely outcome is an impromptu GPU
152  * hang.) The requirement for using I915_EXEC_NO_RELOC are:
153  *
154  *      The addresses written in the objects must match the corresponding
155  *      reloc.presumed_offset which in turn must match the corresponding
156  *      execobject.offset.
157  *
158  *      Any render targets written to in the batch must be flagged with
159  *      EXEC_OBJECT_WRITE.
160  *
161  *      To avoid stalling, execobject.offset should match the current
162  *      address of that object within the active context.
163  *
164  * The reservation is done is multiple phases. First we try and keep any
165  * object already bound in its current location - so as long as meets the
166  * constraints imposed by the new execbuffer. Any object left unbound after the
167  * first pass is then fitted into any available idle space. If an object does
168  * not fit, all objects are removed from the reservation and the process rerun
169  * after sorting the objects into a priority order (more difficult to fit
170  * objects are tried first). Failing that, the entire VM is cleared and we try
171  * to fit the execbuf once last time before concluding that it simply will not
172  * fit.
173  *
174  * A small complication to all of this is that we allow userspace not only to
175  * specify an alignment and a size for the object in the address space, but
176  * we also allow userspace to specify the exact offset. This objects are
177  * simpler to place (the location is known a priori) all we have to do is make
178  * sure the space is available.
179  *
180  * Once all the objects are in place, patching up the buried pointers to point
181  * to the final locations is a fairly simple job of walking over the relocation
182  * entry arrays, looking up the right address and rewriting the value into
183  * the object. Simple! ... The relocation entries are stored in user memory
184  * and so to access them we have to copy them into a local buffer. That copy
185  * has to avoid taking any pagefaults as they may lead back to a GEM object
186  * requiring the struct_mutex (i.e. recursive deadlock). So once again we split
187  * the relocation into multiple passes. First we try to do everything within an
188  * atomic context (avoid the pagefaults) which requires that we never wait. If
189  * we detect that we may wait, or if we need to fault, then we have to fallback
190  * to a slower path. The slowpath has to drop the mutex. (Can you hear alarm
191  * bells yet?) Dropping the mutex means that we lose all the state we have
192  * built up so far for the execbuf and we must reset any global data. However,
193  * we do leave the objects pinned in their final locations - which is a
194  * potential issue for concurrent execbufs. Once we have left the mutex, we can
195  * allocate and copy all the relocation entries into a large array at our
196  * leisure, reacquire the mutex, reclaim all the objects and other state and
197  * then proceed to update any incorrect addresses with the objects.
198  *
199  * As we process the relocation entries, we maintain a record of whether the
200  * object is being written to. Using NORELOC, we expect userspace to provide
201  * this information instead. We also check whether we can skip the relocation
202  * by comparing the expected value inside the relocation entry with the target's
203  * final address. If they differ, we have to map the current object and rewrite
204  * the 4 or 8 byte pointer within.
205  *
206  * Serialising an execbuf is quite simple according to the rules of the GEM
207  * ABI. Execution within each context is ordered by the order of submission.
208  * Writes to any GEM object are in order of submission and are exclusive. Reads
209  * from a GEM object are unordered with respect to other reads, but ordered by
210  * writes. A write submitted after a read cannot occur before the read, and
211  * similarly any read submitted after a write cannot occur before the write.
212  * Writes are ordered between engines such that only one write occurs at any
213  * time (completing any reads beforehand) - using semaphores where available
214  * and CPU serialisation otherwise. Other GEM access obey the same rules, any
215  * write (either via mmaps using set-domain, or via pwrite) must flush all GPU
216  * reads before starting, and any read (either using set-domain or pread) must
217  * flush all GPU writes before starting. (Note we only employ a barrier before,
218  * we currently rely on userspace not concurrently starting a new execution
219  * whilst reading or writing to an object. This may be an advantage or not
220  * depending on how much you trust userspace not to shoot themselves in the
221  * foot.) Serialisation may just result in the request being inserted into
222  * a DAG awaiting its turn, but most simple is to wait on the CPU until
223  * all dependencies are resolved.
224  *
225  * After all of that, is just a matter of closing the request and handing it to
226  * the hardware (well, leaving it in a queue to be executed). However, we also
227  * offer the ability for batchbuffers to be run with elevated privileges so
228  * that they access otherwise hidden registers. (Used to adjust L3 cache etc.)
229  * Before any batch is given extra privileges we first must check that it
230  * contains no nefarious instructions, we check that each instruction is from
231  * our whitelist and all registers are also from an allowed list. We first
232  * copy the user's batchbuffer to a shadow (so that the user doesn't have
233  * access to it, either by the CPU or GPU as we scan it) and then parse each
234  * instruction. If everything is ok, we set a flag telling the hardware to run
235  * the batchbuffer in trusted mode, otherwise the ioctl is rejected.
236  */
237
238 struct eb_fence {
239         struct drm_syncobj *syncobj; /* Use with ptr_mask_bits() */
240         struct dma_fence *dma_fence;
241         u64 value;
242         struct dma_fence_chain *chain_fence;
243 };
244
245 struct i915_execbuffer {
246         struct drm_i915_private *i915; /** i915 backpointer */
247         struct drm_file *file; /** per-file lookup tables and limits */
248         struct drm_i915_gem_execbuffer2 *args; /** ioctl parameters */
249         struct drm_i915_gem_exec_object2 *exec; /** ioctl execobj[] */
250         struct eb_vma *vma;
251
252         struct intel_gt *gt; /* gt for the execbuf */
253         struct intel_context *context; /* logical state for the request */
254         struct i915_gem_context *gem_context; /** caller's context */
255
256         /** our requests to build */
257         struct i915_request *requests[MAX_ENGINE_INSTANCE + 1];
258         /** identity of the batch obj/vma */
259         struct eb_vma *batches[MAX_ENGINE_INSTANCE + 1];
260         struct i915_vma *trampoline; /** trampoline used for chaining */
261
262         /** used for excl fence in dma_resv objects when > 1 BB submitted */
263         struct dma_fence *composite_fence;
264
265         /** actual size of execobj[] as we may extend it for the cmdparser */
266         unsigned int buffer_count;
267
268         /* number of batches in execbuf IOCTL */
269         unsigned int num_batches;
270
271         /** list of vma not yet bound during reservation phase */
272         struct list_head unbound;
273
274         /** list of vma that have execobj.relocation_count */
275         struct list_head relocs;
276
277         struct i915_gem_ww_ctx ww;
278
279         /**
280          * Track the most recently used object for relocations, as we
281          * frequently have to perform multiple relocations within the same
282          * obj/page
283          */
284         struct reloc_cache {
285                 struct drm_mm_node node; /** temporary GTT binding */
286                 unsigned long vaddr; /** Current kmap address */
287                 unsigned long page; /** Currently mapped page index */
288                 unsigned int graphics_ver; /** Cached value of GRAPHICS_VER */
289                 bool use_64bit_reloc : 1;
290                 bool has_llc : 1;
291                 bool has_fence : 1;
292                 bool needs_unfenced : 1;
293         } reloc_cache;
294
295         u64 invalid_flags; /** Set of execobj.flags that are invalid */
296
297         /** Length of batch within object */
298         u64 batch_len[MAX_ENGINE_INSTANCE + 1];
299         u32 batch_start_offset; /** Location within object of batch */
300         u32 batch_flags; /** Flags composed for emit_bb_start() */
301         struct intel_gt_buffer_pool_node *batch_pool; /** pool node for batch buffer */
302
303         /**
304          * Indicate either the size of the hastable used to resolve
305          * relocation handles, or if negative that we are using a direct
306          * index into the execobj[].
307          */
308         int lut_size;
309         struct hlist_head *buckets; /** ht for relocation handles */
310
311         struct eb_fence *fences;
312         unsigned long num_fences;
313 #if IS_ENABLED(CONFIG_DRM_I915_CAPTURE_ERROR)
314         struct i915_capture_list *capture_lists[MAX_ENGINE_INSTANCE + 1];
315 #endif
316 };
317
318 static int eb_parse(struct i915_execbuffer *eb);
319 static int eb_pin_engine(struct i915_execbuffer *eb, bool throttle);
320 static void eb_unpin_engine(struct i915_execbuffer *eb);
321 static void eb_capture_release(struct i915_execbuffer *eb);
322
323 static inline bool eb_use_cmdparser(const struct i915_execbuffer *eb)
324 {
325         return intel_engine_requires_cmd_parser(eb->context->engine) ||
326                 (intel_engine_using_cmd_parser(eb->context->engine) &&
327                  eb->args->batch_len);
328 }
329
330 static int eb_create(struct i915_execbuffer *eb)
331 {
332         if (!(eb->args->flags & I915_EXEC_HANDLE_LUT)) {
333                 unsigned int size = 1 + ilog2(eb->buffer_count);
334
335                 /*
336                  * Without a 1:1 association between relocation handles and
337                  * the execobject[] index, we instead create a hashtable.
338                  * We size it dynamically based on available memory, starting
339                  * first with 1:1 assocative hash and scaling back until
340                  * the allocation succeeds.
341                  *
342                  * Later on we use a positive lut_size to indicate we are
343                  * using this hashtable, and a negative value to indicate a
344                  * direct lookup.
345                  */
346                 do {
347                         gfp_t flags;
348
349                         /* While we can still reduce the allocation size, don't
350                          * raise a warning and allow the allocation to fail.
351                          * On the last pass though, we want to try as hard
352                          * as possible to perform the allocation and warn
353                          * if it fails.
354                          */
355                         flags = GFP_KERNEL;
356                         if (size > 1)
357                                 flags |= __GFP_NORETRY | __GFP_NOWARN;
358
359                         eb->buckets = kzalloc(sizeof(struct hlist_head) << size,
360                                               flags);
361                         if (eb->buckets)
362                                 break;
363                 } while (--size);
364
365                 if (unlikely(!size))
366                         return -ENOMEM;
367
368                 eb->lut_size = size;
369         } else {
370                 eb->lut_size = -eb->buffer_count;
371         }
372
373         return 0;
374 }
375
376 static bool
377 eb_vma_misplaced(const struct drm_i915_gem_exec_object2 *entry,
378                  const struct i915_vma *vma,
379                  unsigned int flags)
380 {
381         if (vma->node.size < entry->pad_to_size)
382                 return true;
383
384         if (entry->alignment && !IS_ALIGNED(vma->node.start, entry->alignment))
385                 return true;
386
387         if (flags & EXEC_OBJECT_PINNED &&
388             vma->node.start != entry->offset)
389                 return true;
390
391         if (flags & __EXEC_OBJECT_NEEDS_BIAS &&
392             vma->node.start < BATCH_OFFSET_BIAS)
393                 return true;
394
395         if (!(flags & EXEC_OBJECT_SUPPORTS_48B_ADDRESS) &&
396             (vma->node.start + vma->node.size + 4095) >> 32)
397                 return true;
398
399         if (flags & __EXEC_OBJECT_NEEDS_MAP &&
400             !i915_vma_is_map_and_fenceable(vma))
401                 return true;
402
403         return false;
404 }
405
406 static u64 eb_pin_flags(const struct drm_i915_gem_exec_object2 *entry,
407                         unsigned int exec_flags)
408 {
409         u64 pin_flags = 0;
410
411         if (exec_flags & EXEC_OBJECT_NEEDS_GTT)
412                 pin_flags |= PIN_GLOBAL;
413
414         /*
415          * Wa32bitGeneralStateOffset & Wa32bitInstructionBaseOffset,
416          * limit address to the first 4GBs for unflagged objects.
417          */
418         if (!(exec_flags & EXEC_OBJECT_SUPPORTS_48B_ADDRESS))
419                 pin_flags |= PIN_ZONE_4G;
420
421         if (exec_flags & __EXEC_OBJECT_NEEDS_MAP)
422                 pin_flags |= PIN_MAPPABLE;
423
424         if (exec_flags & EXEC_OBJECT_PINNED)
425                 pin_flags |= entry->offset | PIN_OFFSET_FIXED;
426         else if (exec_flags & __EXEC_OBJECT_NEEDS_BIAS)
427                 pin_flags |= BATCH_OFFSET_BIAS | PIN_OFFSET_BIAS;
428
429         return pin_flags;
430 }
431
432 static inline int
433 eb_pin_vma(struct i915_execbuffer *eb,
434            const struct drm_i915_gem_exec_object2 *entry,
435            struct eb_vma *ev)
436 {
437         struct i915_vma *vma = ev->vma;
438         u64 pin_flags;
439         int err;
440
441         if (vma->node.size)
442                 pin_flags = vma->node.start;
443         else
444                 pin_flags = entry->offset & PIN_OFFSET_MASK;
445
446         pin_flags |= PIN_USER | PIN_NOEVICT | PIN_OFFSET_FIXED | PIN_VALIDATE;
447         if (unlikely(ev->flags & EXEC_OBJECT_NEEDS_GTT))
448                 pin_flags |= PIN_GLOBAL;
449
450         /* Attempt to reuse the current location if available */
451         err = i915_vma_pin_ww(vma, &eb->ww, 0, 0, pin_flags);
452         if (err == -EDEADLK)
453                 return err;
454
455         if (unlikely(err)) {
456                 if (entry->flags & EXEC_OBJECT_PINNED)
457                         return err;
458
459                 /* Failing that pick any _free_ space if suitable */
460                 err = i915_vma_pin_ww(vma, &eb->ww,
461                                              entry->pad_to_size,
462                                              entry->alignment,
463                                              eb_pin_flags(entry, ev->flags) |
464                                              PIN_USER | PIN_NOEVICT | PIN_VALIDATE);
465                 if (unlikely(err))
466                         return err;
467         }
468
469         if (unlikely(ev->flags & EXEC_OBJECT_NEEDS_FENCE)) {
470                 err = i915_vma_pin_fence(vma);
471                 if (unlikely(err))
472                         return err;
473
474                 if (vma->fence)
475                         ev->flags |= __EXEC_OBJECT_HAS_FENCE;
476         }
477
478         ev->flags |= __EXEC_OBJECT_HAS_PIN;
479         if (eb_vma_misplaced(entry, vma, ev->flags))
480                 return -EBADSLT;
481
482         return 0;
483 }
484
485 static inline void
486 eb_unreserve_vma(struct eb_vma *ev)
487 {
488         if (unlikely(ev->flags & __EXEC_OBJECT_HAS_FENCE))
489                 __i915_vma_unpin_fence(ev->vma);
490
491         ev->flags &= ~__EXEC_OBJECT_RESERVED;
492 }
493
494 static int
495 eb_validate_vma(struct i915_execbuffer *eb,
496                 struct drm_i915_gem_exec_object2 *entry,
497                 struct i915_vma *vma)
498 {
499         /* Relocations are disallowed for all platforms after TGL-LP.  This
500          * also covers all platforms with local memory.
501          */
502         if (entry->relocation_count &&
503             GRAPHICS_VER(eb->i915) >= 12 && !IS_TIGERLAKE(eb->i915))
504                 return -EINVAL;
505
506         if (unlikely(entry->flags & eb->invalid_flags))
507                 return -EINVAL;
508
509         if (unlikely(entry->alignment &&
510                      !is_power_of_2_u64(entry->alignment)))
511                 return -EINVAL;
512
513         /*
514          * Offset can be used as input (EXEC_OBJECT_PINNED), reject
515          * any non-page-aligned or non-canonical addresses.
516          */
517         if (unlikely(entry->flags & EXEC_OBJECT_PINNED &&
518                      entry->offset != gen8_canonical_addr(entry->offset & I915_GTT_PAGE_MASK)))
519                 return -EINVAL;
520
521         /* pad_to_size was once a reserved field, so sanitize it */
522         if (entry->flags & EXEC_OBJECT_PAD_TO_SIZE) {
523                 if (unlikely(offset_in_page(entry->pad_to_size)))
524                         return -EINVAL;
525         } else {
526                 entry->pad_to_size = 0;
527         }
528         /*
529          * From drm_mm perspective address space is continuous,
530          * so from this point we're always using non-canonical
531          * form internally.
532          */
533         entry->offset = gen8_noncanonical_addr(entry->offset);
534
535         if (!eb->reloc_cache.has_fence) {
536                 entry->flags &= ~EXEC_OBJECT_NEEDS_FENCE;
537         } else {
538                 if ((entry->flags & EXEC_OBJECT_NEEDS_FENCE ||
539                      eb->reloc_cache.needs_unfenced) &&
540                     i915_gem_object_is_tiled(vma->obj))
541                         entry->flags |= EXEC_OBJECT_NEEDS_GTT | __EXEC_OBJECT_NEEDS_MAP;
542         }
543
544         return 0;
545 }
546
547 static inline bool
548 is_batch_buffer(struct i915_execbuffer *eb, unsigned int buffer_idx)
549 {
550         return eb->args->flags & I915_EXEC_BATCH_FIRST ?
551                 buffer_idx < eb->num_batches :
552                 buffer_idx >= eb->args->buffer_count - eb->num_batches;
553 }
554
555 static int
556 eb_add_vma(struct i915_execbuffer *eb,
557            unsigned int *current_batch,
558            unsigned int i,
559            struct i915_vma *vma)
560 {
561         struct drm_i915_private *i915 = eb->i915;
562         struct drm_i915_gem_exec_object2 *entry = &eb->exec[i];
563         struct eb_vma *ev = &eb->vma[i];
564
565         ev->vma = vma;
566         ev->exec = entry;
567         ev->flags = entry->flags;
568
569         if (eb->lut_size > 0) {
570                 ev->handle = entry->handle;
571                 hlist_add_head(&ev->node,
572                                &eb->buckets[hash_32(entry->handle,
573                                                     eb->lut_size)]);
574         }
575
576         if (entry->relocation_count)
577                 list_add_tail(&ev->reloc_link, &eb->relocs);
578
579         /*
580          * SNA is doing fancy tricks with compressing batch buffers, which leads
581          * to negative relocation deltas. Usually that works out ok since the
582          * relocate address is still positive, except when the batch is placed
583          * very low in the GTT. Ensure this doesn't happen.
584          *
585          * Note that actual hangs have only been observed on gen7, but for
586          * paranoia do it everywhere.
587          */
588         if (is_batch_buffer(eb, i)) {
589                 if (entry->relocation_count &&
590                     !(ev->flags & EXEC_OBJECT_PINNED))
591                         ev->flags |= __EXEC_OBJECT_NEEDS_BIAS;
592                 if (eb->reloc_cache.has_fence)
593                         ev->flags |= EXEC_OBJECT_NEEDS_FENCE;
594
595                 eb->batches[*current_batch] = ev;
596
597                 if (unlikely(ev->flags & EXEC_OBJECT_WRITE)) {
598                         drm_dbg(&i915->drm,
599                                 "Attempting to use self-modifying batch buffer\n");
600                         return -EINVAL;
601                 }
602
603                 if (range_overflows_t(u64,
604                                       eb->batch_start_offset,
605                                       eb->args->batch_len,
606                                       ev->vma->size)) {
607                         drm_dbg(&i915->drm, "Attempting to use out-of-bounds batch\n");
608                         return -EINVAL;
609                 }
610
611                 if (eb->args->batch_len == 0)
612                         eb->batch_len[*current_batch] = ev->vma->size -
613                                 eb->batch_start_offset;
614                 else
615                         eb->batch_len[*current_batch] = eb->args->batch_len;
616                 if (unlikely(eb->batch_len[*current_batch] == 0)) { /* impossible! */
617                         drm_dbg(&i915->drm, "Invalid batch length\n");
618                         return -EINVAL;
619                 }
620
621                 ++*current_batch;
622         }
623
624         return 0;
625 }
626
627 static inline int use_cpu_reloc(const struct reloc_cache *cache,
628                                 const struct drm_i915_gem_object *obj)
629 {
630         if (!i915_gem_object_has_struct_page(obj))
631                 return false;
632
633         if (DBG_FORCE_RELOC == FORCE_CPU_RELOC)
634                 return true;
635
636         if (DBG_FORCE_RELOC == FORCE_GTT_RELOC)
637                 return false;
638
639         return (cache->has_llc ||
640                 obj->cache_dirty ||
641                 obj->cache_level != I915_CACHE_NONE);
642 }
643
644 static int eb_reserve_vma(struct i915_execbuffer *eb,
645                           struct eb_vma *ev,
646                           u64 pin_flags)
647 {
648         struct drm_i915_gem_exec_object2 *entry = ev->exec;
649         struct i915_vma *vma = ev->vma;
650         int err;
651
652         if (drm_mm_node_allocated(&vma->node) &&
653             eb_vma_misplaced(entry, vma, ev->flags)) {
654                 err = i915_vma_unbind(vma);
655                 if (err)
656                         return err;
657         }
658
659         err = i915_vma_pin_ww(vma, &eb->ww,
660                            entry->pad_to_size, entry->alignment,
661                            eb_pin_flags(entry, ev->flags) | pin_flags);
662         if (err)
663                 return err;
664
665         if (entry->offset != vma->node.start) {
666                 entry->offset = vma->node.start | UPDATE;
667                 eb->args->flags |= __EXEC_HAS_RELOC;
668         }
669
670         if (unlikely(ev->flags & EXEC_OBJECT_NEEDS_FENCE)) {
671                 err = i915_vma_pin_fence(vma);
672                 if (unlikely(err))
673                         return err;
674
675                 if (vma->fence)
676                         ev->flags |= __EXEC_OBJECT_HAS_FENCE;
677         }
678
679         ev->flags |= __EXEC_OBJECT_HAS_PIN;
680         GEM_BUG_ON(eb_vma_misplaced(entry, vma, ev->flags));
681
682         return 0;
683 }
684
685 static bool eb_unbind(struct i915_execbuffer *eb, bool force)
686 {
687         const unsigned int count = eb->buffer_count;
688         unsigned int i;
689         struct list_head last;
690         bool unpinned = false;
691
692         /* Resort *all* the objects into priority order */
693         INIT_LIST_HEAD(&eb->unbound);
694         INIT_LIST_HEAD(&last);
695
696         for (i = 0; i < count; i++) {
697                 struct eb_vma *ev = &eb->vma[i];
698                 unsigned int flags = ev->flags;
699
700                 if (!force && flags & EXEC_OBJECT_PINNED &&
701                     flags & __EXEC_OBJECT_HAS_PIN)
702                         continue;
703
704                 unpinned = true;
705                 eb_unreserve_vma(ev);
706
707                 if (flags & EXEC_OBJECT_PINNED)
708                         /* Pinned must have their slot */
709                         list_add(&ev->bind_link, &eb->unbound);
710                 else if (flags & __EXEC_OBJECT_NEEDS_MAP)
711                         /* Map require the lowest 256MiB (aperture) */
712                         list_add_tail(&ev->bind_link, &eb->unbound);
713                 else if (!(flags & EXEC_OBJECT_SUPPORTS_48B_ADDRESS))
714                         /* Prioritise 4GiB region for restricted bo */
715                         list_add(&ev->bind_link, &last);
716                 else
717                         list_add_tail(&ev->bind_link, &last);
718         }
719
720         list_splice_tail(&last, &eb->unbound);
721         return unpinned;
722 }
723
724 static int eb_reserve(struct i915_execbuffer *eb)
725 {
726         struct eb_vma *ev;
727         unsigned int pass;
728         int err = 0;
729         bool unpinned;
730
731         /*
732          * Attempt to pin all of the buffers into the GTT.
733          * This is done in 2 phases:
734          *
735          * 1. Unbind all objects that do not match the GTT constraints for
736          *    the execbuffer (fenceable, mappable, alignment etc).
737          * 2. Bind new objects.
738          *
739          * This avoid unnecessary unbinding of later objects in order to make
740          * room for the earlier objects *unless* we need to defragment.
741          *
742          * Defragmenting is skipped if all objects are pinned at a fixed location.
743          */
744         for (pass = 0; pass <= 2; pass++) {
745                 int pin_flags = PIN_USER | PIN_VALIDATE;
746
747                 if (pass == 0)
748                         pin_flags |= PIN_NONBLOCK;
749
750                 if (pass >= 1)
751                         unpinned = eb_unbind(eb, pass == 2);
752
753                 if (pass == 2) {
754                         err = mutex_lock_interruptible(&eb->context->vm->mutex);
755                         if (!err) {
756                                 err = i915_gem_evict_vm(eb->context->vm, &eb->ww);
757                                 mutex_unlock(&eb->context->vm->mutex);
758                         }
759                         if (err)
760                                 return err;
761                 }
762
763                 list_for_each_entry(ev, &eb->unbound, bind_link) {
764                         err = eb_reserve_vma(eb, ev, pin_flags);
765                         if (err)
766                                 break;
767                 }
768
769                 if (err != -ENOSPC)
770                         break;
771         }
772
773         return err;
774 }
775
776 static int eb_select_context(struct i915_execbuffer *eb)
777 {
778         struct i915_gem_context *ctx;
779
780         ctx = i915_gem_context_lookup(eb->file->driver_priv, eb->args->rsvd1);
781         if (unlikely(IS_ERR(ctx)))
782                 return PTR_ERR(ctx);
783
784         eb->gem_context = ctx;
785         if (i915_gem_context_has_full_ppgtt(ctx))
786                 eb->invalid_flags |= EXEC_OBJECT_NEEDS_GTT;
787
788         return 0;
789 }
790
791 static int __eb_add_lut(struct i915_execbuffer *eb,
792                         u32 handle, struct i915_vma *vma)
793 {
794         struct i915_gem_context *ctx = eb->gem_context;
795         struct i915_lut_handle *lut;
796         int err;
797
798         lut = i915_lut_handle_alloc();
799         if (unlikely(!lut))
800                 return -ENOMEM;
801
802         i915_vma_get(vma);
803         if (!atomic_fetch_inc(&vma->open_count))
804                 i915_vma_reopen(vma);
805         lut->handle = handle;
806         lut->ctx = ctx;
807
808         /* Check that the context hasn't been closed in the meantime */
809         err = -EINTR;
810         if (!mutex_lock_interruptible(&ctx->lut_mutex)) {
811                 if (likely(!i915_gem_context_is_closed(ctx)))
812                         err = radix_tree_insert(&ctx->handles_vma, handle, vma);
813                 else
814                         err = -ENOENT;
815                 if (err == 0) { /* And nor has this handle */
816                         struct drm_i915_gem_object *obj = vma->obj;
817
818                         spin_lock(&obj->lut_lock);
819                         if (idr_find(&eb->file->object_idr, handle) == obj) {
820                                 list_add(&lut->obj_link, &obj->lut_list);
821                         } else {
822                                 radix_tree_delete(&ctx->handles_vma, handle);
823                                 err = -ENOENT;
824                         }
825                         spin_unlock(&obj->lut_lock);
826                 }
827                 mutex_unlock(&ctx->lut_mutex);
828         }
829         if (unlikely(err))
830                 goto err;
831
832         return 0;
833
834 err:
835         i915_vma_close(vma);
836         i915_vma_put(vma);
837         i915_lut_handle_free(lut);
838         return err;
839 }
840
841 static struct i915_vma *eb_lookup_vma(struct i915_execbuffer *eb, u32 handle)
842 {
843         struct i915_address_space *vm = eb->context->vm;
844
845         do {
846                 struct drm_i915_gem_object *obj;
847                 struct i915_vma *vma;
848                 int err;
849
850                 rcu_read_lock();
851                 vma = radix_tree_lookup(&eb->gem_context->handles_vma, handle);
852                 if (likely(vma && vma->vm == vm))
853                         vma = i915_vma_tryget(vma);
854                 rcu_read_unlock();
855                 if (likely(vma))
856                         return vma;
857
858                 obj = i915_gem_object_lookup(eb->file, handle);
859                 if (unlikely(!obj))
860                         return ERR_PTR(-ENOENT);
861
862                 /*
863                  * If the user has opted-in for protected-object tracking, make
864                  * sure the object encryption can be used.
865                  * We only need to do this when the object is first used with
866                  * this context, because the context itself will be banned when
867                  * the protected objects become invalid.
868                  */
869                 if (i915_gem_context_uses_protected_content(eb->gem_context) &&
870                     i915_gem_object_is_protected(obj)) {
871                         err = intel_pxp_key_check(&vm->gt->pxp, obj, true);
872                         if (err) {
873                                 i915_gem_object_put(obj);
874                                 return ERR_PTR(err);
875                         }
876                 }
877
878                 vma = i915_vma_instance(obj, vm, NULL);
879                 if (IS_ERR(vma)) {
880                         i915_gem_object_put(obj);
881                         return vma;
882                 }
883
884                 err = __eb_add_lut(eb, handle, vma);
885                 if (likely(!err))
886                         return vma;
887
888                 i915_gem_object_put(obj);
889                 if (err != -EEXIST)
890                         return ERR_PTR(err);
891         } while (1);
892 }
893
894 static int eb_lookup_vmas(struct i915_execbuffer *eb)
895 {
896         unsigned int i, current_batch = 0;
897         int err = 0;
898
899         INIT_LIST_HEAD(&eb->relocs);
900
901         for (i = 0; i < eb->buffer_count; i++) {
902                 struct i915_vma *vma;
903
904                 vma = eb_lookup_vma(eb, eb->exec[i].handle);
905                 if (IS_ERR(vma)) {
906                         err = PTR_ERR(vma);
907                         goto err;
908                 }
909
910                 err = eb_validate_vma(eb, &eb->exec[i], vma);
911                 if (unlikely(err)) {
912                         i915_vma_put(vma);
913                         goto err;
914                 }
915
916                 err = eb_add_vma(eb, &current_batch, i, vma);
917                 if (err)
918                         return err;
919
920                 if (i915_gem_object_is_userptr(vma->obj)) {
921                         err = i915_gem_object_userptr_submit_init(vma->obj);
922                         if (err) {
923                                 if (i + 1 < eb->buffer_count) {
924                                         /*
925                                          * Execbuffer code expects last vma entry to be NULL,
926                                          * since we already initialized this entry,
927                                          * set the next value to NULL or we mess up
928                                          * cleanup handling.
929                                          */
930                                         eb->vma[i + 1].vma = NULL;
931                                 }
932
933                                 return err;
934                         }
935
936                         eb->vma[i].flags |= __EXEC_OBJECT_USERPTR_INIT;
937                         eb->args->flags |= __EXEC_USERPTR_USED;
938                 }
939         }
940
941         return 0;
942
943 err:
944         eb->vma[i].vma = NULL;
945         return err;
946 }
947
948 static int eb_lock_vmas(struct i915_execbuffer *eb)
949 {
950         unsigned int i;
951         int err;
952
953         for (i = 0; i < eb->buffer_count; i++) {
954                 struct eb_vma *ev = &eb->vma[i];
955                 struct i915_vma *vma = ev->vma;
956
957                 err = i915_gem_object_lock(vma->obj, &eb->ww);
958                 if (err)
959                         return err;
960         }
961
962         return 0;
963 }
964
965 static int eb_validate_vmas(struct i915_execbuffer *eb)
966 {
967         unsigned int i;
968         int err;
969
970         INIT_LIST_HEAD(&eb->unbound);
971
972         err = eb_lock_vmas(eb);
973         if (err)
974                 return err;
975
976         for (i = 0; i < eb->buffer_count; i++) {
977                 struct drm_i915_gem_exec_object2 *entry = &eb->exec[i];
978                 struct eb_vma *ev = &eb->vma[i];
979                 struct i915_vma *vma = ev->vma;
980
981                 err = eb_pin_vma(eb, entry, ev);
982                 if (err == -EDEADLK)
983                         return err;
984
985                 if (!err) {
986                         if (entry->offset != vma->node.start) {
987                                 entry->offset = vma->node.start | UPDATE;
988                                 eb->args->flags |= __EXEC_HAS_RELOC;
989                         }
990                 } else {
991                         eb_unreserve_vma(ev);
992
993                         list_add_tail(&ev->bind_link, &eb->unbound);
994                         if (drm_mm_node_allocated(&vma->node)) {
995                                 err = i915_vma_unbind(vma);
996                                 if (err)
997                                         return err;
998                         }
999                 }
1000
1001                 if (!(ev->flags & EXEC_OBJECT_WRITE)) {
1002                         err = dma_resv_reserve_shared(vma->obj->base.resv, 1);
1003                         if (err)
1004                                 return err;
1005                 }
1006
1007                 GEM_BUG_ON(drm_mm_node_allocated(&vma->node) &&
1008                            eb_vma_misplaced(&eb->exec[i], vma, ev->flags));
1009         }
1010
1011         if (!list_empty(&eb->unbound))
1012                 return eb_reserve(eb);
1013
1014         return 0;
1015 }
1016
1017 static struct eb_vma *
1018 eb_get_vma(const struct i915_execbuffer *eb, unsigned long handle)
1019 {
1020         if (eb->lut_size < 0) {
1021                 if (handle >= -eb->lut_size)
1022                         return NULL;
1023                 return &eb->vma[handle];
1024         } else {
1025                 struct hlist_head *head;
1026                 struct eb_vma *ev;
1027
1028                 head = &eb->buckets[hash_32(handle, eb->lut_size)];
1029                 hlist_for_each_entry(ev, head, node) {
1030                         if (ev->handle == handle)
1031                                 return ev;
1032                 }
1033                 return NULL;
1034         }
1035 }
1036
1037 static void eb_release_vmas(struct i915_execbuffer *eb, bool final)
1038 {
1039         const unsigned int count = eb->buffer_count;
1040         unsigned int i;
1041
1042         for (i = 0; i < count; i++) {
1043                 struct eb_vma *ev = &eb->vma[i];
1044                 struct i915_vma *vma = ev->vma;
1045
1046                 if (!vma)
1047                         break;
1048
1049                 eb_unreserve_vma(ev);
1050
1051                 if (final)
1052                         i915_vma_put(vma);
1053         }
1054
1055         eb_capture_release(eb);
1056         eb_unpin_engine(eb);
1057 }
1058
1059 static void eb_destroy(const struct i915_execbuffer *eb)
1060 {
1061         if (eb->lut_size > 0)
1062                 kfree(eb->buckets);
1063 }
1064
1065 static inline u64
1066 relocation_target(const struct drm_i915_gem_relocation_entry *reloc,
1067                   const struct i915_vma *target)
1068 {
1069         return gen8_canonical_addr((int)reloc->delta + target->node.start);
1070 }
1071
1072 static void reloc_cache_init(struct reloc_cache *cache,
1073                              struct drm_i915_private *i915)
1074 {
1075         cache->page = -1;
1076         cache->vaddr = 0;
1077         /* Must be a variable in the struct to allow GCC to unroll. */
1078         cache->graphics_ver = GRAPHICS_VER(i915);
1079         cache->has_llc = HAS_LLC(i915);
1080         cache->use_64bit_reloc = HAS_64BIT_RELOC(i915);
1081         cache->has_fence = cache->graphics_ver < 4;
1082         cache->needs_unfenced = INTEL_INFO(i915)->unfenced_needs_alignment;
1083         cache->node.flags = 0;
1084 }
1085
1086 static inline void *unmask_page(unsigned long p)
1087 {
1088         return (void *)(uintptr_t)(p & PAGE_MASK);
1089 }
1090
1091 static inline unsigned int unmask_flags(unsigned long p)
1092 {
1093         return p & ~PAGE_MASK;
1094 }
1095
1096 #define KMAP 0x4 /* after CLFLUSH_FLAGS */
1097
1098 static inline struct i915_ggtt *cache_to_ggtt(struct reloc_cache *cache)
1099 {
1100         struct drm_i915_private *i915 =
1101                 container_of(cache, struct i915_execbuffer, reloc_cache)->i915;
1102         return to_gt(i915)->ggtt;
1103 }
1104
1105 static void reloc_cache_unmap(struct reloc_cache *cache)
1106 {
1107         void *vaddr;
1108
1109         if (!cache->vaddr)
1110                 return;
1111
1112         vaddr = unmask_page(cache->vaddr);
1113         if (cache->vaddr & KMAP)
1114                 kunmap_atomic(vaddr);
1115         else
1116                 io_mapping_unmap_atomic((void __iomem *)vaddr);
1117 }
1118
1119 static void reloc_cache_remap(struct reloc_cache *cache,
1120                               struct drm_i915_gem_object *obj)
1121 {
1122         void *vaddr;
1123
1124         if (!cache->vaddr)
1125                 return;
1126
1127         if (cache->vaddr & KMAP) {
1128                 struct page *page = i915_gem_object_get_page(obj, cache->page);
1129
1130                 vaddr = kmap_atomic(page);
1131                 cache->vaddr = unmask_flags(cache->vaddr) |
1132                         (unsigned long)vaddr;
1133         } else {
1134                 struct i915_ggtt *ggtt = cache_to_ggtt(cache);
1135                 unsigned long offset;
1136
1137                 offset = cache->node.start;
1138                 if (!drm_mm_node_allocated(&cache->node))
1139                         offset += cache->page << PAGE_SHIFT;
1140
1141                 cache->vaddr = (unsigned long)
1142                         io_mapping_map_atomic_wc(&ggtt->iomap, offset);
1143         }
1144 }
1145
1146 static void reloc_cache_reset(struct reloc_cache *cache, struct i915_execbuffer *eb)
1147 {
1148         void *vaddr;
1149
1150         if (!cache->vaddr)
1151                 return;
1152
1153         vaddr = unmask_page(cache->vaddr);
1154         if (cache->vaddr & KMAP) {
1155                 struct drm_i915_gem_object *obj =
1156                         (struct drm_i915_gem_object *)cache->node.mm;
1157                 if (cache->vaddr & CLFLUSH_AFTER)
1158                         mb();
1159
1160                 kunmap_atomic(vaddr);
1161                 i915_gem_object_finish_access(obj);
1162         } else {
1163                 struct i915_ggtt *ggtt = cache_to_ggtt(cache);
1164
1165                 intel_gt_flush_ggtt_writes(ggtt->vm.gt);
1166                 io_mapping_unmap_atomic((void __iomem *)vaddr);
1167
1168                 if (drm_mm_node_allocated(&cache->node)) {
1169                         ggtt->vm.clear_range(&ggtt->vm,
1170                                              cache->node.start,
1171                                              cache->node.size);
1172                         mutex_lock(&ggtt->vm.mutex);
1173                         drm_mm_remove_node(&cache->node);
1174                         mutex_unlock(&ggtt->vm.mutex);
1175                 } else {
1176                         i915_vma_unpin((struct i915_vma *)cache->node.mm);
1177                 }
1178         }
1179
1180         cache->vaddr = 0;
1181         cache->page = -1;
1182 }
1183
1184 static void *reloc_kmap(struct drm_i915_gem_object *obj,
1185                         struct reloc_cache *cache,
1186                         unsigned long pageno)
1187 {
1188         void *vaddr;
1189         struct page *page;
1190
1191         if (cache->vaddr) {
1192                 kunmap_atomic(unmask_page(cache->vaddr));
1193         } else {
1194                 unsigned int flushes;
1195                 int err;
1196
1197                 err = i915_gem_object_prepare_write(obj, &flushes);
1198                 if (err)
1199                         return ERR_PTR(err);
1200
1201                 BUILD_BUG_ON(KMAP & CLFLUSH_FLAGS);
1202                 BUILD_BUG_ON((KMAP | CLFLUSH_FLAGS) & PAGE_MASK);
1203
1204                 cache->vaddr = flushes | KMAP;
1205                 cache->node.mm = (void *)obj;
1206                 if (flushes)
1207                         mb();
1208         }
1209
1210         page = i915_gem_object_get_page(obj, pageno);
1211         if (!obj->mm.dirty)
1212                 set_page_dirty(page);
1213
1214         vaddr = kmap_atomic(page);
1215         cache->vaddr = unmask_flags(cache->vaddr) | (unsigned long)vaddr;
1216         cache->page = pageno;
1217
1218         return vaddr;
1219 }
1220
1221 static void *reloc_iomap(struct i915_vma *batch,
1222                          struct i915_execbuffer *eb,
1223                          unsigned long page)
1224 {
1225         struct drm_i915_gem_object *obj = batch->obj;
1226         struct reloc_cache *cache = &eb->reloc_cache;
1227         struct i915_ggtt *ggtt = cache_to_ggtt(cache);
1228         unsigned long offset;
1229         void *vaddr;
1230
1231         if (cache->vaddr) {
1232                 intel_gt_flush_ggtt_writes(ggtt->vm.gt);
1233                 io_mapping_unmap_atomic((void __force __iomem *) unmask_page(cache->vaddr));
1234         } else {
1235                 struct i915_vma *vma = ERR_PTR(-ENODEV);
1236                 int err;
1237
1238                 if (i915_gem_object_is_tiled(obj))
1239                         return ERR_PTR(-EINVAL);
1240
1241                 if (use_cpu_reloc(cache, obj))
1242                         return NULL;
1243
1244                 err = i915_gem_object_set_to_gtt_domain(obj, true);
1245                 if (err)
1246                         return ERR_PTR(err);
1247
1248                 /*
1249                  * i915_gem_object_ggtt_pin_ww may attempt to remove the batch
1250                  * VMA from the object list because we no longer pin.
1251                  *
1252                  * Only attempt to pin the batch buffer to ggtt if the current batch
1253                  * is not inside ggtt, or the batch buffer is not misplaced.
1254                  */
1255                 if (!i915_is_ggtt(batch->vm)) {
1256                         vma = i915_gem_object_ggtt_pin_ww(obj, &eb->ww, NULL, 0, 0,
1257                                                           PIN_MAPPABLE |
1258                                                           PIN_NONBLOCK /* NOWARN */ |
1259                                                           PIN_NOEVICT);
1260                 } else if (i915_vma_is_map_and_fenceable(batch)) {
1261                         __i915_vma_pin(batch);
1262                         vma = batch;
1263                 }
1264
1265                 if (vma == ERR_PTR(-EDEADLK))
1266                         return vma;
1267
1268                 if (IS_ERR(vma)) {
1269                         memset(&cache->node, 0, sizeof(cache->node));
1270                         mutex_lock(&ggtt->vm.mutex);
1271                         err = drm_mm_insert_node_in_range
1272                                 (&ggtt->vm.mm, &cache->node,
1273                                  PAGE_SIZE, 0, I915_COLOR_UNEVICTABLE,
1274                                  0, ggtt->mappable_end,
1275                                  DRM_MM_INSERT_LOW);
1276                         mutex_unlock(&ggtt->vm.mutex);
1277                         if (err) /* no inactive aperture space, use cpu reloc */
1278                                 return NULL;
1279                 } else {
1280                         cache->node.start = vma->node.start;
1281                         cache->node.mm = (void *)vma;
1282                 }
1283         }
1284
1285         offset = cache->node.start;
1286         if (drm_mm_node_allocated(&cache->node)) {
1287                 ggtt->vm.insert_page(&ggtt->vm,
1288                                      i915_gem_object_get_dma_address(obj, page),
1289                                      offset, I915_CACHE_NONE, 0);
1290         } else {
1291                 offset += page << PAGE_SHIFT;
1292         }
1293
1294         vaddr = (void __force *)io_mapping_map_atomic_wc(&ggtt->iomap,
1295                                                          offset);
1296         cache->page = page;
1297         cache->vaddr = (unsigned long)vaddr;
1298
1299         return vaddr;
1300 }
1301
1302 static void *reloc_vaddr(struct i915_vma *vma,
1303                          struct i915_execbuffer *eb,
1304                          unsigned long page)
1305 {
1306         struct reloc_cache *cache = &eb->reloc_cache;
1307         void *vaddr;
1308
1309         if (cache->page == page) {
1310                 vaddr = unmask_page(cache->vaddr);
1311         } else {
1312                 vaddr = NULL;
1313                 if ((cache->vaddr & KMAP) == 0)
1314                         vaddr = reloc_iomap(vma, eb, page);
1315                 if (!vaddr)
1316                         vaddr = reloc_kmap(vma->obj, cache, page);
1317         }
1318
1319         return vaddr;
1320 }
1321
1322 static void clflush_write32(u32 *addr, u32 value, unsigned int flushes)
1323 {
1324         if (unlikely(flushes & (CLFLUSH_BEFORE | CLFLUSH_AFTER))) {
1325                 if (flushes & CLFLUSH_BEFORE) {
1326                         clflushopt(addr);
1327                         mb();
1328                 }
1329
1330                 *addr = value;
1331
1332                 /*
1333                  * Writes to the same cacheline are serialised by the CPU
1334                  * (including clflush). On the write path, we only require
1335                  * that it hits memory in an orderly fashion and place
1336                  * mb barriers at the start and end of the relocation phase
1337                  * to ensure ordering of clflush wrt to the system.
1338                  */
1339                 if (flushes & CLFLUSH_AFTER)
1340                         clflushopt(addr);
1341         } else
1342                 *addr = value;
1343 }
1344
1345 static u64
1346 relocate_entry(struct i915_vma *vma,
1347                const struct drm_i915_gem_relocation_entry *reloc,
1348                struct i915_execbuffer *eb,
1349                const struct i915_vma *target)
1350 {
1351         u64 target_addr = relocation_target(reloc, target);
1352         u64 offset = reloc->offset;
1353         bool wide = eb->reloc_cache.use_64bit_reloc;
1354         void *vaddr;
1355
1356 repeat:
1357         vaddr = reloc_vaddr(vma, eb,
1358                             offset >> PAGE_SHIFT);
1359         if (IS_ERR(vaddr))
1360                 return PTR_ERR(vaddr);
1361
1362         GEM_BUG_ON(!IS_ALIGNED(offset, sizeof(u32)));
1363         clflush_write32(vaddr + offset_in_page(offset),
1364                         lower_32_bits(target_addr),
1365                         eb->reloc_cache.vaddr);
1366
1367         if (wide) {
1368                 offset += sizeof(u32);
1369                 target_addr >>= 32;
1370                 wide = false;
1371                 goto repeat;
1372         }
1373
1374         return target->node.start | UPDATE;
1375 }
1376
1377 static u64
1378 eb_relocate_entry(struct i915_execbuffer *eb,
1379                   struct eb_vma *ev,
1380                   const struct drm_i915_gem_relocation_entry *reloc)
1381 {
1382         struct drm_i915_private *i915 = eb->i915;
1383         struct eb_vma *target;
1384         int err;
1385
1386         /* we've already hold a reference to all valid objects */
1387         target = eb_get_vma(eb, reloc->target_handle);
1388         if (unlikely(!target))
1389                 return -ENOENT;
1390
1391         /* Validate that the target is in a valid r/w GPU domain */
1392         if (unlikely(reloc->write_domain & (reloc->write_domain - 1))) {
1393                 drm_dbg(&i915->drm, "reloc with multiple write domains: "
1394                           "target %d offset %d "
1395                           "read %08x write %08x",
1396                           reloc->target_handle,
1397                           (int) reloc->offset,
1398                           reloc->read_domains,
1399                           reloc->write_domain);
1400                 return -EINVAL;
1401         }
1402         if (unlikely((reloc->write_domain | reloc->read_domains)
1403                      & ~I915_GEM_GPU_DOMAINS)) {
1404                 drm_dbg(&i915->drm, "reloc with read/write non-GPU domains: "
1405                           "target %d offset %d "
1406                           "read %08x write %08x",
1407                           reloc->target_handle,
1408                           (int) reloc->offset,
1409                           reloc->read_domains,
1410                           reloc->write_domain);
1411                 return -EINVAL;
1412         }
1413
1414         if (reloc->write_domain) {
1415                 target->flags |= EXEC_OBJECT_WRITE;
1416
1417                 /*
1418                  * Sandybridge PPGTT errata: We need a global gtt mapping
1419                  * for MI and pipe_control writes because the gpu doesn't
1420                  * properly redirect them through the ppgtt for non_secure
1421                  * batchbuffers.
1422                  */
1423                 if (reloc->write_domain == I915_GEM_DOMAIN_INSTRUCTION &&
1424                     GRAPHICS_VER(eb->i915) == 6 &&
1425                     !i915_vma_is_bound(target->vma, I915_VMA_GLOBAL_BIND)) {
1426                         struct i915_vma *vma = target->vma;
1427
1428                         reloc_cache_unmap(&eb->reloc_cache);
1429                         mutex_lock(&vma->vm->mutex);
1430                         err = i915_vma_bind(target->vma,
1431                                             target->vma->obj->cache_level,
1432                                             PIN_GLOBAL, NULL, NULL);
1433                         mutex_unlock(&vma->vm->mutex);
1434                         reloc_cache_remap(&eb->reloc_cache, ev->vma->obj);
1435                         if (err)
1436                                 return err;
1437                 }
1438         }
1439
1440         /*
1441          * If the relocation already has the right value in it, no
1442          * more work needs to be done.
1443          */
1444         if (!DBG_FORCE_RELOC &&
1445             gen8_canonical_addr(target->vma->node.start) == reloc->presumed_offset)
1446                 return 0;
1447
1448         /* Check that the relocation address is valid... */
1449         if (unlikely(reloc->offset >
1450                      ev->vma->size - (eb->reloc_cache.use_64bit_reloc ? 8 : 4))) {
1451                 drm_dbg(&i915->drm, "Relocation beyond object bounds: "
1452                           "target %d offset %d size %d.\n",
1453                           reloc->target_handle,
1454                           (int)reloc->offset,
1455                           (int)ev->vma->size);
1456                 return -EINVAL;
1457         }
1458         if (unlikely(reloc->offset & 3)) {
1459                 drm_dbg(&i915->drm, "Relocation not 4-byte aligned: "
1460                           "target %d offset %d.\n",
1461                           reloc->target_handle,
1462                           (int)reloc->offset);
1463                 return -EINVAL;
1464         }
1465
1466         /*
1467          * If we write into the object, we need to force the synchronisation
1468          * barrier, either with an asynchronous clflush or if we executed the
1469          * patching using the GPU (though that should be serialised by the
1470          * timeline). To be completely sure, and since we are required to
1471          * do relocations we are already stalling, disable the user's opt
1472          * out of our synchronisation.
1473          */
1474         ev->flags &= ~EXEC_OBJECT_ASYNC;
1475
1476         /* and update the user's relocation entry */
1477         return relocate_entry(ev->vma, reloc, eb, target->vma);
1478 }
1479
1480 static int eb_relocate_vma(struct i915_execbuffer *eb, struct eb_vma *ev)
1481 {
1482 #define N_RELOC(x) ((x) / sizeof(struct drm_i915_gem_relocation_entry))
1483         struct drm_i915_gem_relocation_entry stack[N_RELOC(512)];
1484         const struct drm_i915_gem_exec_object2 *entry = ev->exec;
1485         struct drm_i915_gem_relocation_entry __user *urelocs =
1486                 u64_to_user_ptr(entry->relocs_ptr);
1487         unsigned long remain = entry->relocation_count;
1488
1489         if (unlikely(remain > N_RELOC(ULONG_MAX)))
1490                 return -EINVAL;
1491
1492         /*
1493          * We must check that the entire relocation array is safe
1494          * to read. However, if the array is not writable the user loses
1495          * the updated relocation values.
1496          */
1497         if (unlikely(!access_ok(urelocs, remain * sizeof(*urelocs))))
1498                 return -EFAULT;
1499
1500         do {
1501                 struct drm_i915_gem_relocation_entry *r = stack;
1502                 unsigned int count =
1503                         min_t(unsigned long, remain, ARRAY_SIZE(stack));
1504                 unsigned int copied;
1505
1506                 /*
1507                  * This is the fast path and we cannot handle a pagefault
1508                  * whilst holding the struct mutex lest the user pass in the
1509                  * relocations contained within a mmaped bo. For in such a case
1510                  * we, the page fault handler would call i915_gem_fault() and
1511                  * we would try to acquire the struct mutex again. Obviously
1512                  * this is bad and so lockdep complains vehemently.
1513                  */
1514                 pagefault_disable();
1515                 copied = __copy_from_user_inatomic(r, urelocs, count * sizeof(r[0]));
1516                 pagefault_enable();
1517                 if (unlikely(copied)) {
1518                         remain = -EFAULT;
1519                         goto out;
1520                 }
1521
1522                 remain -= count;
1523                 do {
1524                         u64 offset = eb_relocate_entry(eb, ev, r);
1525
1526                         if (likely(offset == 0)) {
1527                         } else if ((s64)offset < 0) {
1528                                 remain = (int)offset;
1529                                 goto out;
1530                         } else {
1531                                 /*
1532                                  * Note that reporting an error now
1533                                  * leaves everything in an inconsistent
1534                                  * state as we have *already* changed
1535                                  * the relocation value inside the
1536                                  * object. As we have not changed the
1537                                  * reloc.presumed_offset or will not
1538                                  * change the execobject.offset, on the
1539                                  * call we may not rewrite the value
1540                                  * inside the object, leaving it
1541                                  * dangling and causing a GPU hang. Unless
1542                                  * userspace dynamically rebuilds the
1543                                  * relocations on each execbuf rather than
1544                                  * presume a static tree.
1545                                  *
1546                                  * We did previously check if the relocations
1547                                  * were writable (access_ok), an error now
1548                                  * would be a strange race with mprotect,
1549                                  * having already demonstrated that we
1550                                  * can read from this userspace address.
1551                                  */
1552                                 offset = gen8_canonical_addr(offset & ~UPDATE);
1553                                 __put_user(offset,
1554                                            &urelocs[r - stack].presumed_offset);
1555                         }
1556                 } while (r++, --count);
1557                 urelocs += ARRAY_SIZE(stack);
1558         } while (remain);
1559 out:
1560         reloc_cache_reset(&eb->reloc_cache, eb);
1561         return remain;
1562 }
1563
1564 static int
1565 eb_relocate_vma_slow(struct i915_execbuffer *eb, struct eb_vma *ev)
1566 {
1567         const struct drm_i915_gem_exec_object2 *entry = ev->exec;
1568         struct drm_i915_gem_relocation_entry *relocs =
1569                 u64_to_ptr(typeof(*relocs), entry->relocs_ptr);
1570         unsigned int i;
1571         int err;
1572
1573         for (i = 0; i < entry->relocation_count; i++) {
1574                 u64 offset = eb_relocate_entry(eb, ev, &relocs[i]);
1575
1576                 if ((s64)offset < 0) {
1577                         err = (int)offset;
1578                         goto err;
1579                 }
1580         }
1581         err = 0;
1582 err:
1583         reloc_cache_reset(&eb->reloc_cache, eb);
1584         return err;
1585 }
1586
1587 static int check_relocations(const struct drm_i915_gem_exec_object2 *entry)
1588 {
1589         const char __user *addr, *end;
1590         unsigned long size;
1591         char __maybe_unused c;
1592
1593         size = entry->relocation_count;
1594         if (size == 0)
1595                 return 0;
1596
1597         if (size > N_RELOC(ULONG_MAX))
1598                 return -EINVAL;
1599
1600         addr = u64_to_user_ptr(entry->relocs_ptr);
1601         size *= sizeof(struct drm_i915_gem_relocation_entry);
1602         if (!access_ok(addr, size))
1603                 return -EFAULT;
1604
1605         end = addr + size;
1606         for (; addr < end; addr += PAGE_SIZE) {
1607                 int err = __get_user(c, addr);
1608                 if (err)
1609                         return err;
1610         }
1611         return __get_user(c, end - 1);
1612 }
1613
1614 static int eb_copy_relocations(const struct i915_execbuffer *eb)
1615 {
1616         struct drm_i915_gem_relocation_entry *relocs;
1617         const unsigned int count = eb->buffer_count;
1618         unsigned int i;
1619         int err;
1620
1621         for (i = 0; i < count; i++) {
1622                 const unsigned int nreloc = eb->exec[i].relocation_count;
1623                 struct drm_i915_gem_relocation_entry __user *urelocs;
1624                 unsigned long size;
1625                 unsigned long copied;
1626
1627                 if (nreloc == 0)
1628                         continue;
1629
1630                 err = check_relocations(&eb->exec[i]);
1631                 if (err)
1632                         goto err;
1633
1634                 urelocs = u64_to_user_ptr(eb->exec[i].relocs_ptr);
1635                 size = nreloc * sizeof(*relocs);
1636
1637                 relocs = kvmalloc_array(size, 1, GFP_KERNEL);
1638                 if (!relocs) {
1639                         err = -ENOMEM;
1640                         goto err;
1641                 }
1642
1643                 /* copy_from_user is limited to < 4GiB */
1644                 copied = 0;
1645                 do {
1646                         unsigned int len =
1647                                 min_t(u64, BIT_ULL(31), size - copied);
1648
1649                         if (__copy_from_user((char *)relocs + copied,
1650                                              (char __user *)urelocs + copied,
1651                                              len))
1652                                 goto end;
1653
1654                         copied += len;
1655                 } while (copied < size);
1656
1657                 /*
1658                  * As we do not update the known relocation offsets after
1659                  * relocating (due to the complexities in lock handling),
1660                  * we need to mark them as invalid now so that we force the
1661                  * relocation processing next time. Just in case the target
1662                  * object is evicted and then rebound into its old
1663                  * presumed_offset before the next execbuffer - if that
1664                  * happened we would make the mistake of assuming that the
1665                  * relocations were valid.
1666                  */
1667                 if (!user_access_begin(urelocs, size))
1668                         goto end;
1669
1670                 for (copied = 0; copied < nreloc; copied++)
1671                         unsafe_put_user(-1,
1672                                         &urelocs[copied].presumed_offset,
1673                                         end_user);
1674                 user_access_end();
1675
1676                 eb->exec[i].relocs_ptr = (uintptr_t)relocs;
1677         }
1678
1679         return 0;
1680
1681 end_user:
1682         user_access_end();
1683 end:
1684         kvfree(relocs);
1685         err = -EFAULT;
1686 err:
1687         while (i--) {
1688                 relocs = u64_to_ptr(typeof(*relocs), eb->exec[i].relocs_ptr);
1689                 if (eb->exec[i].relocation_count)
1690                         kvfree(relocs);
1691         }
1692         return err;
1693 }
1694
1695 static int eb_prefault_relocations(const struct i915_execbuffer *eb)
1696 {
1697         const unsigned int count = eb->buffer_count;
1698         unsigned int i;
1699
1700         for (i = 0; i < count; i++) {
1701                 int err;
1702
1703                 err = check_relocations(&eb->exec[i]);
1704                 if (err)
1705                         return err;
1706         }
1707
1708         return 0;
1709 }
1710
1711 static int eb_reinit_userptr(struct i915_execbuffer *eb)
1712 {
1713         const unsigned int count = eb->buffer_count;
1714         unsigned int i;
1715         int ret;
1716
1717         if (likely(!(eb->args->flags & __EXEC_USERPTR_USED)))
1718                 return 0;
1719
1720         for (i = 0; i < count; i++) {
1721                 struct eb_vma *ev = &eb->vma[i];
1722
1723                 if (!i915_gem_object_is_userptr(ev->vma->obj))
1724                         continue;
1725
1726                 ret = i915_gem_object_userptr_submit_init(ev->vma->obj);
1727                 if (ret)
1728                         return ret;
1729
1730                 ev->flags |= __EXEC_OBJECT_USERPTR_INIT;
1731         }
1732
1733         return 0;
1734 }
1735
1736 static noinline int eb_relocate_parse_slow(struct i915_execbuffer *eb)
1737 {
1738         bool have_copy = false;
1739         struct eb_vma *ev;
1740         int err = 0;
1741
1742 repeat:
1743         if (signal_pending(current)) {
1744                 err = -ERESTARTSYS;
1745                 goto out;
1746         }
1747
1748         /* We may process another execbuffer during the unlock... */
1749         eb_release_vmas(eb, false);
1750         i915_gem_ww_ctx_fini(&eb->ww);
1751
1752         /*
1753          * We take 3 passes through the slowpatch.
1754          *
1755          * 1 - we try to just prefault all the user relocation entries and
1756          * then attempt to reuse the atomic pagefault disabled fast path again.
1757          *
1758          * 2 - we copy the user entries to a local buffer here outside of the
1759          * local and allow ourselves to wait upon any rendering before
1760          * relocations
1761          *
1762          * 3 - we already have a local copy of the relocation entries, but
1763          * were interrupted (EAGAIN) whilst waiting for the objects, try again.
1764          */
1765         if (!err) {
1766                 err = eb_prefault_relocations(eb);
1767         } else if (!have_copy) {
1768                 err = eb_copy_relocations(eb);
1769                 have_copy = err == 0;
1770         } else {
1771                 cond_resched();
1772                 err = 0;
1773         }
1774
1775         if (!err)
1776                 err = eb_reinit_userptr(eb);
1777
1778         i915_gem_ww_ctx_init(&eb->ww, true);
1779         if (err)
1780                 goto out;
1781
1782         /* reacquire the objects */
1783 repeat_validate:
1784         err = eb_pin_engine(eb, false);
1785         if (err)
1786                 goto err;
1787
1788         err = eb_validate_vmas(eb);
1789         if (err)
1790                 goto err;
1791
1792         GEM_BUG_ON(!eb->batches[0]);
1793
1794         list_for_each_entry(ev, &eb->relocs, reloc_link) {
1795                 if (!have_copy) {
1796                         err = eb_relocate_vma(eb, ev);
1797                         if (err)
1798                                 break;
1799                 } else {
1800                         err = eb_relocate_vma_slow(eb, ev);
1801                         if (err)
1802                                 break;
1803                 }
1804         }
1805
1806         if (err == -EDEADLK)
1807                 goto err;
1808
1809         if (err && !have_copy)
1810                 goto repeat;
1811
1812         if (err)
1813                 goto err;
1814
1815         /* as last step, parse the command buffer */
1816         err = eb_parse(eb);
1817         if (err)
1818                 goto err;
1819
1820         /*
1821          * Leave the user relocations as are, this is the painfully slow path,
1822          * and we want to avoid the complication of dropping the lock whilst
1823          * having buffers reserved in the aperture and so causing spurious
1824          * ENOSPC for random operations.
1825          */
1826
1827 err:
1828         if (err == -EDEADLK) {
1829                 eb_release_vmas(eb, false);
1830                 err = i915_gem_ww_ctx_backoff(&eb->ww);
1831                 if (!err)
1832                         goto repeat_validate;
1833         }
1834
1835         if (err == -EAGAIN)
1836                 goto repeat;
1837
1838 out:
1839         if (have_copy) {
1840                 const unsigned int count = eb->buffer_count;
1841                 unsigned int i;
1842
1843                 for (i = 0; i < count; i++) {
1844                         const struct drm_i915_gem_exec_object2 *entry =
1845                                 &eb->exec[i];
1846                         struct drm_i915_gem_relocation_entry *relocs;
1847
1848                         if (!entry->relocation_count)
1849                                 continue;
1850
1851                         relocs = u64_to_ptr(typeof(*relocs), entry->relocs_ptr);
1852                         kvfree(relocs);
1853                 }
1854         }
1855
1856         return err;
1857 }
1858
1859 static int eb_relocate_parse(struct i915_execbuffer *eb)
1860 {
1861         int err;
1862         bool throttle = true;
1863
1864 retry:
1865         err = eb_pin_engine(eb, throttle);
1866         if (err) {
1867                 if (err != -EDEADLK)
1868                         return err;
1869
1870                 goto err;
1871         }
1872
1873         /* only throttle once, even if we didn't need to throttle */
1874         throttle = false;
1875
1876         err = eb_validate_vmas(eb);
1877         if (err == -EAGAIN)
1878                 goto slow;
1879         else if (err)
1880                 goto err;
1881
1882         /* The objects are in their final locations, apply the relocations. */
1883         if (eb->args->flags & __EXEC_HAS_RELOC) {
1884                 struct eb_vma *ev;
1885
1886                 list_for_each_entry(ev, &eb->relocs, reloc_link) {
1887                         err = eb_relocate_vma(eb, ev);
1888                         if (err)
1889                                 break;
1890                 }
1891
1892                 if (err == -EDEADLK)
1893                         goto err;
1894                 else if (err)
1895                         goto slow;
1896         }
1897
1898         if (!err)
1899                 err = eb_parse(eb);
1900
1901 err:
1902         if (err == -EDEADLK) {
1903                 eb_release_vmas(eb, false);
1904                 err = i915_gem_ww_ctx_backoff(&eb->ww);
1905                 if (!err)
1906                         goto retry;
1907         }
1908
1909         return err;
1910
1911 slow:
1912         err = eb_relocate_parse_slow(eb);
1913         if (err)
1914                 /*
1915                  * If the user expects the execobject.offset and
1916                  * reloc.presumed_offset to be an exact match,
1917                  * as for using NO_RELOC, then we cannot update
1918                  * the execobject.offset until we have completed
1919                  * relocation.
1920                  */
1921                 eb->args->flags &= ~__EXEC_HAS_RELOC;
1922
1923         return err;
1924 }
1925
1926 /*
1927  * Using two helper loops for the order of which requests / batches are created
1928  * and added the to backend. Requests are created in order from the parent to
1929  * the last child. Requests are added in the reverse order, from the last child
1930  * to parent. This is done for locking reasons as the timeline lock is acquired
1931  * during request creation and released when the request is added to the
1932  * backend. To make lockdep happy (see intel_context_timeline_lock) this must be
1933  * the ordering.
1934  */
1935 #define for_each_batch_create_order(_eb, _i) \
1936         for ((_i) = 0; (_i) < (_eb)->num_batches; ++(_i))
1937 #define for_each_batch_add_order(_eb, _i) \
1938         BUILD_BUG_ON(!typecheck(int, _i)); \
1939         for ((_i) = (_eb)->num_batches - 1; (_i) >= 0; --(_i))
1940
1941 static struct i915_request *
1942 eb_find_first_request_added(struct i915_execbuffer *eb)
1943 {
1944         int i;
1945
1946         for_each_batch_add_order(eb, i)
1947                 if (eb->requests[i])
1948                         return eb->requests[i];
1949
1950         GEM_BUG_ON("Request not found");
1951
1952         return NULL;
1953 }
1954
1955 #if IS_ENABLED(CONFIG_DRM_I915_CAPTURE_ERROR)
1956
1957 /* Stage with GFP_KERNEL allocations before we enter the signaling critical path */
1958 static void eb_capture_stage(struct i915_execbuffer *eb)
1959 {
1960         const unsigned int count = eb->buffer_count;
1961         unsigned int i = count, j;
1962
1963         while (i--) {
1964                 struct eb_vma *ev = &eb->vma[i];
1965                 struct i915_vma *vma = ev->vma;
1966                 unsigned int flags = ev->flags;
1967
1968                 if (!(flags & EXEC_OBJECT_CAPTURE))
1969                         continue;
1970
1971                 for_each_batch_create_order(eb, j) {
1972                         struct i915_capture_list *capture;
1973
1974                         capture = kmalloc(sizeof(*capture), GFP_KERNEL);
1975                         if (!capture)
1976                                 continue;
1977
1978                         capture->next = eb->capture_lists[j];
1979                         capture->vma_res = i915_vma_resource_get(vma->resource);
1980                         eb->capture_lists[j] = capture;
1981                 }
1982         }
1983 }
1984
1985 /* Commit once we're in the critical path */
1986 static void eb_capture_commit(struct i915_execbuffer *eb)
1987 {
1988         unsigned int j;
1989
1990         for_each_batch_create_order(eb, j) {
1991                 struct i915_request *rq = eb->requests[j];
1992
1993                 if (!rq)
1994                         break;
1995
1996                 rq->capture_list = eb->capture_lists[j];
1997                 eb->capture_lists[j] = NULL;
1998         }
1999 }
2000
2001 /*
2002  * Release anything that didn't get committed due to errors.
2003  * The capture_list will otherwise be freed at request retire.
2004  */
2005 static void eb_capture_release(struct i915_execbuffer *eb)
2006 {
2007         unsigned int j;
2008
2009         for_each_batch_create_order(eb, j) {
2010                 if (eb->capture_lists[j]) {
2011                         i915_request_free_capture_list(eb->capture_lists[j]);
2012                         eb->capture_lists[j] = NULL;
2013                 }
2014         }
2015 }
2016
2017 static void eb_capture_list_clear(struct i915_execbuffer *eb)
2018 {
2019         memset(eb->capture_lists, 0, sizeof(eb->capture_lists));
2020 }
2021
2022 #else
2023
2024 static void eb_capture_stage(struct i915_execbuffer *eb)
2025 {
2026 }
2027
2028 static void eb_capture_commit(struct i915_execbuffer *eb)
2029 {
2030 }
2031
2032 static void eb_capture_release(struct i915_execbuffer *eb)
2033 {
2034 }
2035
2036 static void eb_capture_list_clear(struct i915_execbuffer *eb)
2037 {
2038 }
2039
2040 #endif
2041
2042 static int eb_move_to_gpu(struct i915_execbuffer *eb)
2043 {
2044         const unsigned int count = eb->buffer_count;
2045         unsigned int i = count;
2046         int err = 0, j;
2047
2048         while (i--) {
2049                 struct eb_vma *ev = &eb->vma[i];
2050                 struct i915_vma *vma = ev->vma;
2051                 unsigned int flags = ev->flags;
2052                 struct drm_i915_gem_object *obj = vma->obj;
2053
2054                 assert_vma_held(vma);
2055
2056                 /*
2057                  * If the GPU is not _reading_ through the CPU cache, we need
2058                  * to make sure that any writes (both previous GPU writes from
2059                  * before a change in snooping levels and normal CPU writes)
2060                  * caught in that cache are flushed to main memory.
2061                  *
2062                  * We want to say
2063                  *   obj->cache_dirty &&
2064                  *   !(obj->cache_coherent & I915_BO_CACHE_COHERENT_FOR_READ)
2065                  * but gcc's optimiser doesn't handle that as well and emits
2066                  * two jumps instead of one. Maybe one day...
2067                  *
2068                  * FIXME: There is also sync flushing in set_pages(), which
2069                  * serves a different purpose(some of the time at least).
2070                  *
2071                  * We should consider:
2072                  *
2073                  *   1. Rip out the async flush code.
2074                  *
2075                  *   2. Or make the sync flushing use the async clflush path
2076                  *   using mandatory fences underneath. Currently the below
2077                  *   async flush happens after we bind the object.
2078                  */
2079                 if (unlikely(obj->cache_dirty & ~obj->cache_coherent)) {
2080                         if (i915_gem_clflush_object(obj, 0))
2081                                 flags &= ~EXEC_OBJECT_ASYNC;
2082                 }
2083
2084                 /* We only need to await on the first request */
2085                 if (err == 0 && !(flags & EXEC_OBJECT_ASYNC)) {
2086                         err = i915_request_await_object
2087                                 (eb_find_first_request_added(eb), obj,
2088                                  flags & EXEC_OBJECT_WRITE);
2089                 }
2090
2091                 for_each_batch_add_order(eb, j) {
2092                         if (err)
2093                                 break;
2094                         if (!eb->requests[j])
2095                                 continue;
2096
2097                         err = _i915_vma_move_to_active(vma, eb->requests[j],
2098                                                        j ? NULL :
2099                                                        eb->composite_fence ?
2100                                                        eb->composite_fence :
2101                                                        &eb->requests[j]->fence,
2102                                                        flags | __EXEC_OBJECT_NO_RESERVE);
2103                 }
2104         }
2105
2106 #ifdef CONFIG_MMU_NOTIFIER
2107         if (!err && (eb->args->flags & __EXEC_USERPTR_USED)) {
2108                 read_lock(&eb->i915->mm.notifier_lock);
2109
2110                 /*
2111                  * count is always at least 1, otherwise __EXEC_USERPTR_USED
2112                  * could not have been set
2113                  */
2114                 for (i = 0; i < count; i++) {
2115                         struct eb_vma *ev = &eb->vma[i];
2116                         struct drm_i915_gem_object *obj = ev->vma->obj;
2117
2118                         if (!i915_gem_object_is_userptr(obj))
2119                                 continue;
2120
2121                         err = i915_gem_object_userptr_submit_done(obj);
2122                         if (err)
2123                                 break;
2124                 }
2125
2126                 read_unlock(&eb->i915->mm.notifier_lock);
2127         }
2128 #endif
2129
2130         if (unlikely(err))
2131                 goto err_skip;
2132
2133         /* Unconditionally flush any chipset caches (for streaming writes). */
2134         intel_gt_chipset_flush(eb->gt);
2135         eb_capture_commit(eb);
2136
2137         return 0;
2138
2139 err_skip:
2140         for_each_batch_create_order(eb, j) {
2141                 if (!eb->requests[j])
2142                         break;
2143
2144                 i915_request_set_error_once(eb->requests[j], err);
2145         }
2146         return err;
2147 }
2148
2149 static int i915_gem_check_execbuffer(struct drm_i915_gem_execbuffer2 *exec)
2150 {
2151         if (exec->flags & __I915_EXEC_ILLEGAL_FLAGS)
2152                 return -EINVAL;
2153
2154         /* Kernel clipping was a DRI1 misfeature */
2155         if (!(exec->flags & (I915_EXEC_FENCE_ARRAY |
2156                              I915_EXEC_USE_EXTENSIONS))) {
2157                 if (exec->num_cliprects || exec->cliprects_ptr)
2158                         return -EINVAL;
2159         }
2160
2161         if (exec->DR4 == 0xffffffff) {
2162                 DRM_DEBUG("UXA submitting garbage DR4, fixing up\n");
2163                 exec->DR4 = 0;
2164         }
2165         if (exec->DR1 || exec->DR4)
2166                 return -EINVAL;
2167
2168         if ((exec->batch_start_offset | exec->batch_len) & 0x7)
2169                 return -EINVAL;
2170
2171         return 0;
2172 }
2173
2174 static int i915_reset_gen7_sol_offsets(struct i915_request *rq)
2175 {
2176         u32 *cs;
2177         int i;
2178
2179         if (GRAPHICS_VER(rq->engine->i915) != 7 || rq->engine->id != RCS0) {
2180                 drm_dbg(&rq->engine->i915->drm, "sol reset is gen7/rcs only\n");
2181                 return -EINVAL;
2182         }
2183
2184         cs = intel_ring_begin(rq, 4 * 2 + 2);
2185         if (IS_ERR(cs))
2186                 return PTR_ERR(cs);
2187
2188         *cs++ = MI_LOAD_REGISTER_IMM(4);
2189         for (i = 0; i < 4; i++) {
2190                 *cs++ = i915_mmio_reg_offset(GEN7_SO_WRITE_OFFSET(i));
2191                 *cs++ = 0;
2192         }
2193         *cs++ = MI_NOOP;
2194         intel_ring_advance(rq, cs);
2195
2196         return 0;
2197 }
2198
2199 static struct i915_vma *
2200 shadow_batch_pin(struct i915_execbuffer *eb,
2201                  struct drm_i915_gem_object *obj,
2202                  struct i915_address_space *vm,
2203                  unsigned int flags)
2204 {
2205         struct i915_vma *vma;
2206         int err;
2207
2208         vma = i915_vma_instance(obj, vm, NULL);
2209         if (IS_ERR(vma))
2210                 return vma;
2211
2212         err = i915_vma_pin_ww(vma, &eb->ww, 0, 0, flags | PIN_VALIDATE);
2213         if (err)
2214                 return ERR_PTR(err);
2215
2216         return vma;
2217 }
2218
2219 static struct i915_vma *eb_dispatch_secure(struct i915_execbuffer *eb, struct i915_vma *vma)
2220 {
2221         /*
2222          * snb/ivb/vlv conflate the "batch in ppgtt" bit with the "non-secure
2223          * batch" bit. Hence we need to pin secure batches into the global gtt.
2224          * hsw should have this fixed, but bdw mucks it up again. */
2225         if (eb->batch_flags & I915_DISPATCH_SECURE)
2226                 return i915_gem_object_ggtt_pin_ww(vma->obj, &eb->ww, NULL, 0, 0, PIN_VALIDATE);
2227
2228         return NULL;
2229 }
2230
2231 static int eb_parse(struct i915_execbuffer *eb)
2232 {
2233         struct drm_i915_private *i915 = eb->i915;
2234         struct intel_gt_buffer_pool_node *pool = eb->batch_pool;
2235         struct i915_vma *shadow, *trampoline, *batch;
2236         unsigned long len;
2237         int err;
2238
2239         if (!eb_use_cmdparser(eb)) {
2240                 batch = eb_dispatch_secure(eb, eb->batches[0]->vma);
2241                 if (IS_ERR(batch))
2242                         return PTR_ERR(batch);
2243
2244                 goto secure_batch;
2245         }
2246
2247         if (intel_context_is_parallel(eb->context))
2248                 return -EINVAL;
2249
2250         len = eb->batch_len[0];
2251         if (!CMDPARSER_USES_GGTT(eb->i915)) {
2252                 /*
2253                  * ppGTT backed shadow buffers must be mapped RO, to prevent
2254                  * post-scan tampering
2255                  */
2256                 if (!eb->context->vm->has_read_only) {
2257                         drm_dbg(&i915->drm,
2258                                 "Cannot prevent post-scan tampering without RO capable vm\n");
2259                         return -EINVAL;
2260                 }
2261         } else {
2262                 len += I915_CMD_PARSER_TRAMPOLINE_SIZE;
2263         }
2264         if (unlikely(len < eb->batch_len[0])) /* last paranoid check of overflow */
2265                 return -EINVAL;
2266
2267         if (!pool) {
2268                 pool = intel_gt_get_buffer_pool(eb->gt, len,
2269                                                 I915_MAP_WB);
2270                 if (IS_ERR(pool))
2271                         return PTR_ERR(pool);
2272                 eb->batch_pool = pool;
2273         }
2274
2275         err = i915_gem_object_lock(pool->obj, &eb->ww);
2276         if (err)
2277                 return err;
2278
2279         shadow = shadow_batch_pin(eb, pool->obj, eb->context->vm, PIN_USER);
2280         if (IS_ERR(shadow))
2281                 return PTR_ERR(shadow);
2282
2283         intel_gt_buffer_pool_mark_used(pool);
2284         i915_gem_object_set_readonly(shadow->obj);
2285         shadow->private = pool;
2286
2287         trampoline = NULL;
2288         if (CMDPARSER_USES_GGTT(eb->i915)) {
2289                 trampoline = shadow;
2290
2291                 shadow = shadow_batch_pin(eb, pool->obj,
2292                                           &eb->gt->ggtt->vm,
2293                                           PIN_GLOBAL);
2294                 if (IS_ERR(shadow))
2295                         return PTR_ERR(shadow);
2296
2297                 shadow->private = pool;
2298
2299                 eb->batch_flags |= I915_DISPATCH_SECURE;
2300         }
2301
2302         batch = eb_dispatch_secure(eb, shadow);
2303         if (IS_ERR(batch))
2304                 return PTR_ERR(batch);
2305
2306         err = dma_resv_reserve_shared(shadow->obj->base.resv, 1);
2307         if (err)
2308                 return err;
2309
2310         err = intel_engine_cmd_parser(eb->context->engine,
2311                                       eb->batches[0]->vma,
2312                                       eb->batch_start_offset,
2313                                       eb->batch_len[0],
2314                                       shadow, trampoline);
2315         if (err)
2316                 return err;
2317
2318         eb->batches[0] = &eb->vma[eb->buffer_count++];
2319         eb->batches[0]->vma = i915_vma_get(shadow);
2320         eb->batches[0]->flags = __EXEC_OBJECT_HAS_PIN;
2321
2322         eb->trampoline = trampoline;
2323         eb->batch_start_offset = 0;
2324
2325 secure_batch:
2326         if (batch) {
2327                 if (intel_context_is_parallel(eb->context))
2328                         return -EINVAL;
2329
2330                 eb->batches[0] = &eb->vma[eb->buffer_count++];
2331                 eb->batches[0]->flags = __EXEC_OBJECT_HAS_PIN;
2332                 eb->batches[0]->vma = i915_vma_get(batch);
2333         }
2334         return 0;
2335 }
2336
2337 static int eb_request_submit(struct i915_execbuffer *eb,
2338                              struct i915_request *rq,
2339                              struct i915_vma *batch,
2340                              u64 batch_len)
2341 {
2342         int err;
2343
2344         if (intel_context_nopreempt(rq->context))
2345                 __set_bit(I915_FENCE_FLAG_NOPREEMPT, &rq->fence.flags);
2346
2347         if (eb->args->flags & I915_EXEC_GEN7_SOL_RESET) {
2348                 err = i915_reset_gen7_sol_offsets(rq);
2349                 if (err)
2350                         return err;
2351         }
2352
2353         /*
2354          * After we completed waiting for other engines (using HW semaphores)
2355          * then we can signal that this request/batch is ready to run. This
2356          * allows us to determine if the batch is still waiting on the GPU
2357          * or actually running by checking the breadcrumb.
2358          */
2359         if (rq->context->engine->emit_init_breadcrumb) {
2360                 err = rq->context->engine->emit_init_breadcrumb(rq);
2361                 if (err)
2362                         return err;
2363         }
2364
2365         err = rq->context->engine->emit_bb_start(rq,
2366                                                  batch->node.start +
2367                                                  eb->batch_start_offset,
2368                                                  batch_len,
2369                                                  eb->batch_flags);
2370         if (err)
2371                 return err;
2372
2373         if (eb->trampoline) {
2374                 GEM_BUG_ON(intel_context_is_parallel(rq->context));
2375                 GEM_BUG_ON(eb->batch_start_offset);
2376                 err = rq->context->engine->emit_bb_start(rq,
2377                                                          eb->trampoline->node.start +
2378                                                          batch_len, 0, 0);
2379                 if (err)
2380                         return err;
2381         }
2382
2383         return 0;
2384 }
2385
2386 static int eb_submit(struct i915_execbuffer *eb)
2387 {
2388         unsigned int i;
2389         int err;
2390
2391         err = eb_move_to_gpu(eb);
2392
2393         for_each_batch_create_order(eb, i) {
2394                 if (!eb->requests[i])
2395                         break;
2396
2397                 trace_i915_request_queue(eb->requests[i], eb->batch_flags);
2398                 if (!err)
2399                         err = eb_request_submit(eb, eb->requests[i],
2400                                                 eb->batches[i]->vma,
2401                                                 eb->batch_len[i]);
2402         }
2403
2404         return err;
2405 }
2406
2407 static int num_vcs_engines(struct drm_i915_private *i915)
2408 {
2409         return hweight_long(VDBOX_MASK(to_gt(i915)));
2410 }
2411
2412 /*
2413  * Find one BSD ring to dispatch the corresponding BSD command.
2414  * The engine index is returned.
2415  */
2416 static unsigned int
2417 gen8_dispatch_bsd_engine(struct drm_i915_private *dev_priv,
2418                          struct drm_file *file)
2419 {
2420         struct drm_i915_file_private *file_priv = file->driver_priv;
2421
2422         /* Check whether the file_priv has already selected one ring. */
2423         if ((int)file_priv->bsd_engine < 0)
2424                 file_priv->bsd_engine =
2425                         get_random_int() % num_vcs_engines(dev_priv);
2426
2427         return file_priv->bsd_engine;
2428 }
2429
2430 static const enum intel_engine_id user_ring_map[] = {
2431         [I915_EXEC_DEFAULT]     = RCS0,
2432         [I915_EXEC_RENDER]      = RCS0,
2433         [I915_EXEC_BLT]         = BCS0,
2434         [I915_EXEC_BSD]         = VCS0,
2435         [I915_EXEC_VEBOX]       = VECS0
2436 };
2437
2438 static struct i915_request *eb_throttle(struct i915_execbuffer *eb, struct intel_context *ce)
2439 {
2440         struct intel_ring *ring = ce->ring;
2441         struct intel_timeline *tl = ce->timeline;
2442         struct i915_request *rq;
2443
2444         /*
2445          * Completely unscientific finger-in-the-air estimates for suitable
2446          * maximum user request size (to avoid blocking) and then backoff.
2447          */
2448         if (intel_ring_update_space(ring) >= PAGE_SIZE)
2449                 return NULL;
2450
2451         /*
2452          * Find a request that after waiting upon, there will be at least half
2453          * the ring available. The hysteresis allows us to compete for the
2454          * shared ring and should mean that we sleep less often prior to
2455          * claiming our resources, but not so long that the ring completely
2456          * drains before we can submit our next request.
2457          */
2458         list_for_each_entry(rq, &tl->requests, link) {
2459                 if (rq->ring != ring)
2460                         continue;
2461
2462                 if (__intel_ring_space(rq->postfix,
2463                                        ring->emit, ring->size) > ring->size / 2)
2464                         break;
2465         }
2466         if (&rq->link == &tl->requests)
2467                 return NULL; /* weird, we will check again later for real */
2468
2469         return i915_request_get(rq);
2470 }
2471
2472 static int eb_pin_timeline(struct i915_execbuffer *eb, struct intel_context *ce,
2473                            bool throttle)
2474 {
2475         struct intel_timeline *tl;
2476         struct i915_request *rq = NULL;
2477
2478         /*
2479          * Take a local wakeref for preparing to dispatch the execbuf as
2480          * we expect to access the hardware fairly frequently in the
2481          * process, and require the engine to be kept awake between accesses.
2482          * Upon dispatch, we acquire another prolonged wakeref that we hold
2483          * until the timeline is idle, which in turn releases the wakeref
2484          * taken on the engine, and the parent device.
2485          */
2486         tl = intel_context_timeline_lock(ce);
2487         if (IS_ERR(tl))
2488                 return PTR_ERR(tl);
2489
2490         intel_context_enter(ce);
2491         if (throttle)
2492                 rq = eb_throttle(eb, ce);
2493         intel_context_timeline_unlock(tl);
2494
2495         if (rq) {
2496                 bool nonblock = eb->file->filp->f_flags & O_NONBLOCK;
2497                 long timeout = nonblock ? 0 : MAX_SCHEDULE_TIMEOUT;
2498
2499                 if (i915_request_wait(rq, I915_WAIT_INTERRUPTIBLE,
2500                                       timeout) < 0) {
2501                         i915_request_put(rq);
2502
2503                         /*
2504                          * Error path, cannot use intel_context_timeline_lock as
2505                          * that is user interruptable and this clean up step
2506                          * must be done.
2507                          */
2508                         mutex_lock(&ce->timeline->mutex);
2509                         intel_context_exit(ce);
2510                         mutex_unlock(&ce->timeline->mutex);
2511
2512                         if (nonblock)
2513                                 return -EWOULDBLOCK;
2514                         else
2515                                 return -EINTR;
2516                 }
2517                 i915_request_put(rq);
2518         }
2519
2520         return 0;
2521 }
2522
2523 static int eb_pin_engine(struct i915_execbuffer *eb, bool throttle)
2524 {
2525         struct intel_context *ce = eb->context, *child;
2526         int err;
2527         int i = 0, j = 0;
2528
2529         GEM_BUG_ON(eb->args->flags & __EXEC_ENGINE_PINNED);
2530
2531         if (unlikely(intel_context_is_banned(ce)))
2532                 return -EIO;
2533
2534         /*
2535          * Pinning the contexts may generate requests in order to acquire
2536          * GGTT space, so do this first before we reserve a seqno for
2537          * ourselves.
2538          */
2539         err = intel_context_pin_ww(ce, &eb->ww);
2540         if (err)
2541                 return err;
2542         for_each_child(ce, child) {
2543                 err = intel_context_pin_ww(child, &eb->ww);
2544                 GEM_BUG_ON(err);        /* perma-pinned should incr a counter */
2545         }
2546
2547         for_each_child(ce, child) {
2548                 err = eb_pin_timeline(eb, child, throttle);
2549                 if (err)
2550                         goto unwind;
2551                 ++i;
2552         }
2553         err = eb_pin_timeline(eb, ce, throttle);
2554         if (err)
2555                 goto unwind;
2556
2557         eb->args->flags |= __EXEC_ENGINE_PINNED;
2558         return 0;
2559
2560 unwind:
2561         for_each_child(ce, child) {
2562                 if (j++ < i) {
2563                         mutex_lock(&child->timeline->mutex);
2564                         intel_context_exit(child);
2565                         mutex_unlock(&child->timeline->mutex);
2566                 }
2567         }
2568         for_each_child(ce, child)
2569                 intel_context_unpin(child);
2570         intel_context_unpin(ce);
2571         return err;
2572 }
2573
2574 static void eb_unpin_engine(struct i915_execbuffer *eb)
2575 {
2576         struct intel_context *ce = eb->context, *child;
2577
2578         if (!(eb->args->flags & __EXEC_ENGINE_PINNED))
2579                 return;
2580
2581         eb->args->flags &= ~__EXEC_ENGINE_PINNED;
2582
2583         for_each_child(ce, child) {
2584                 mutex_lock(&child->timeline->mutex);
2585                 intel_context_exit(child);
2586                 mutex_unlock(&child->timeline->mutex);
2587
2588                 intel_context_unpin(child);
2589         }
2590
2591         mutex_lock(&ce->timeline->mutex);
2592         intel_context_exit(ce);
2593         mutex_unlock(&ce->timeline->mutex);
2594
2595         intel_context_unpin(ce);
2596 }
2597
2598 static unsigned int
2599 eb_select_legacy_ring(struct i915_execbuffer *eb)
2600 {
2601         struct drm_i915_private *i915 = eb->i915;
2602         struct drm_i915_gem_execbuffer2 *args = eb->args;
2603         unsigned int user_ring_id = args->flags & I915_EXEC_RING_MASK;
2604
2605         if (user_ring_id != I915_EXEC_BSD &&
2606             (args->flags & I915_EXEC_BSD_MASK)) {
2607                 drm_dbg(&i915->drm,
2608                         "execbuf with non bsd ring but with invalid "
2609                         "bsd dispatch flags: %d\n", (int)(args->flags));
2610                 return -1;
2611         }
2612
2613         if (user_ring_id == I915_EXEC_BSD && num_vcs_engines(i915) > 1) {
2614                 unsigned int bsd_idx = args->flags & I915_EXEC_BSD_MASK;
2615
2616                 if (bsd_idx == I915_EXEC_BSD_DEFAULT) {
2617                         bsd_idx = gen8_dispatch_bsd_engine(i915, eb->file);
2618                 } else if (bsd_idx >= I915_EXEC_BSD_RING1 &&
2619                            bsd_idx <= I915_EXEC_BSD_RING2) {
2620                         bsd_idx >>= I915_EXEC_BSD_SHIFT;
2621                         bsd_idx--;
2622                 } else {
2623                         drm_dbg(&i915->drm,
2624                                 "execbuf with unknown bsd ring: %u\n",
2625                                 bsd_idx);
2626                         return -1;
2627                 }
2628
2629                 return _VCS(bsd_idx);
2630         }
2631
2632         if (user_ring_id >= ARRAY_SIZE(user_ring_map)) {
2633                 drm_dbg(&i915->drm, "execbuf with unknown ring: %u\n",
2634                         user_ring_id);
2635                 return -1;
2636         }
2637
2638         return user_ring_map[user_ring_id];
2639 }
2640
2641 static int
2642 eb_select_engine(struct i915_execbuffer *eb)
2643 {
2644         struct intel_context *ce, *child;
2645         unsigned int idx;
2646         int err;
2647
2648         if (i915_gem_context_user_engines(eb->gem_context))
2649                 idx = eb->args->flags & I915_EXEC_RING_MASK;
2650         else
2651                 idx = eb_select_legacy_ring(eb);
2652
2653         ce = i915_gem_context_get_engine(eb->gem_context, idx);
2654         if (IS_ERR(ce))
2655                 return PTR_ERR(ce);
2656
2657         if (intel_context_is_parallel(ce)) {
2658                 if (eb->buffer_count < ce->parallel.number_children + 1) {
2659                         intel_context_put(ce);
2660                         return -EINVAL;
2661                 }
2662                 if (eb->batch_start_offset || eb->args->batch_len) {
2663                         intel_context_put(ce);
2664                         return -EINVAL;
2665                 }
2666         }
2667         eb->num_batches = ce->parallel.number_children + 1;
2668
2669         for_each_child(ce, child)
2670                 intel_context_get(child);
2671         intel_gt_pm_get(ce->engine->gt);
2672
2673         if (!test_bit(CONTEXT_ALLOC_BIT, &ce->flags)) {
2674                 err = intel_context_alloc_state(ce);
2675                 if (err)
2676                         goto err;
2677         }
2678         for_each_child(ce, child) {
2679                 if (!test_bit(CONTEXT_ALLOC_BIT, &child->flags)) {
2680                         err = intel_context_alloc_state(child);
2681                         if (err)
2682                                 goto err;
2683                 }
2684         }
2685
2686         /*
2687          * ABI: Before userspace accesses the GPU (e.g. execbuffer), report
2688          * EIO if the GPU is already wedged.
2689          */
2690         err = intel_gt_terminally_wedged(ce->engine->gt);
2691         if (err)
2692                 goto err;
2693
2694         eb->context = ce;
2695         eb->gt = ce->engine->gt;
2696
2697         /*
2698          * Make sure engine pool stays alive even if we call intel_context_put
2699          * during ww handling. The pool is destroyed when last pm reference
2700          * is dropped, which breaks our -EDEADLK handling.
2701          */
2702         return err;
2703
2704 err:
2705         intel_gt_pm_put(ce->engine->gt);
2706         for_each_child(ce, child)
2707                 intel_context_put(child);
2708         intel_context_put(ce);
2709         return err;
2710 }
2711
2712 static void
2713 eb_put_engine(struct i915_execbuffer *eb)
2714 {
2715         struct intel_context *child;
2716
2717         intel_gt_pm_put(eb->gt);
2718         for_each_child(eb->context, child)
2719                 intel_context_put(child);
2720         intel_context_put(eb->context);
2721 }
2722
2723 static void
2724 __free_fence_array(struct eb_fence *fences, unsigned int n)
2725 {
2726         while (n--) {
2727                 drm_syncobj_put(ptr_mask_bits(fences[n].syncobj, 2));
2728                 dma_fence_put(fences[n].dma_fence);
2729                 dma_fence_chain_free(fences[n].chain_fence);
2730         }
2731         kvfree(fences);
2732 }
2733
2734 static int
2735 add_timeline_fence_array(struct i915_execbuffer *eb,
2736                          const struct drm_i915_gem_execbuffer_ext_timeline_fences *timeline_fences)
2737 {
2738         struct drm_i915_gem_exec_fence __user *user_fences;
2739         u64 __user *user_values;
2740         struct eb_fence *f;
2741         u64 nfences;
2742         int err = 0;
2743
2744         nfences = timeline_fences->fence_count;
2745         if (!nfences)
2746                 return 0;
2747
2748         /* Check multiplication overflow for access_ok() and kvmalloc_array() */
2749         BUILD_BUG_ON(sizeof(size_t) > sizeof(unsigned long));
2750         if (nfences > min_t(unsigned long,
2751                             ULONG_MAX / sizeof(*user_fences),
2752                             SIZE_MAX / sizeof(*f)) - eb->num_fences)
2753                 return -EINVAL;
2754
2755         user_fences = u64_to_user_ptr(timeline_fences->handles_ptr);
2756         if (!access_ok(user_fences, nfences * sizeof(*user_fences)))
2757                 return -EFAULT;
2758
2759         user_values = u64_to_user_ptr(timeline_fences->values_ptr);
2760         if (!access_ok(user_values, nfences * sizeof(*user_values)))
2761                 return -EFAULT;
2762
2763         f = krealloc(eb->fences,
2764                      (eb->num_fences + nfences) * sizeof(*f),
2765                      __GFP_NOWARN | GFP_KERNEL);
2766         if (!f)
2767                 return -ENOMEM;
2768
2769         eb->fences = f;
2770         f += eb->num_fences;
2771
2772         BUILD_BUG_ON(~(ARCH_KMALLOC_MINALIGN - 1) &
2773                      ~__I915_EXEC_FENCE_UNKNOWN_FLAGS);
2774
2775         while (nfences--) {
2776                 struct drm_i915_gem_exec_fence user_fence;
2777                 struct drm_syncobj *syncobj;
2778                 struct dma_fence *fence = NULL;
2779                 u64 point;
2780
2781                 if (__copy_from_user(&user_fence,
2782                                      user_fences++,
2783                                      sizeof(user_fence)))
2784                         return -EFAULT;
2785
2786                 if (user_fence.flags & __I915_EXEC_FENCE_UNKNOWN_FLAGS)
2787                         return -EINVAL;
2788
2789                 if (__get_user(point, user_values++))
2790                         return -EFAULT;
2791
2792                 syncobj = drm_syncobj_find(eb->file, user_fence.handle);
2793                 if (!syncobj) {
2794                         DRM_DEBUG("Invalid syncobj handle provided\n");
2795                         return -ENOENT;
2796                 }
2797
2798                 fence = drm_syncobj_fence_get(syncobj);
2799
2800                 if (!fence && user_fence.flags &&
2801                     !(user_fence.flags & I915_EXEC_FENCE_SIGNAL)) {
2802                         DRM_DEBUG("Syncobj handle has no fence\n");
2803                         drm_syncobj_put(syncobj);
2804                         return -EINVAL;
2805                 }
2806
2807                 if (fence)
2808                         err = dma_fence_chain_find_seqno(&fence, point);
2809
2810                 if (err && !(user_fence.flags & I915_EXEC_FENCE_SIGNAL)) {
2811                         DRM_DEBUG("Syncobj handle missing requested point %llu\n", point);
2812                         dma_fence_put(fence);
2813                         drm_syncobj_put(syncobj);
2814                         return err;
2815                 }
2816
2817                 /*
2818                  * A point might have been signaled already and
2819                  * garbage collected from the timeline. In this case
2820                  * just ignore the point and carry on.
2821                  */
2822                 if (!fence && !(user_fence.flags & I915_EXEC_FENCE_SIGNAL)) {
2823                         drm_syncobj_put(syncobj);
2824                         continue;
2825                 }
2826
2827                 /*
2828                  * For timeline syncobjs we need to preallocate chains for
2829                  * later signaling.
2830                  */
2831                 if (point != 0 && user_fence.flags & I915_EXEC_FENCE_SIGNAL) {
2832                         /*
2833                          * Waiting and signaling the same point (when point !=
2834                          * 0) would break the timeline.
2835                          */
2836                         if (user_fence.flags & I915_EXEC_FENCE_WAIT) {
2837                                 DRM_DEBUG("Trying to wait & signal the same timeline point.\n");
2838                                 dma_fence_put(fence);
2839                                 drm_syncobj_put(syncobj);
2840                                 return -EINVAL;
2841                         }
2842
2843                         f->chain_fence = dma_fence_chain_alloc();
2844                         if (!f->chain_fence) {
2845                                 drm_syncobj_put(syncobj);
2846                                 dma_fence_put(fence);
2847                                 return -ENOMEM;
2848                         }
2849                 } else {
2850                         f->chain_fence = NULL;
2851                 }
2852
2853                 f->syncobj = ptr_pack_bits(syncobj, user_fence.flags, 2);
2854                 f->dma_fence = fence;
2855                 f->value = point;
2856                 f++;
2857                 eb->num_fences++;
2858         }
2859
2860         return 0;
2861 }
2862
2863 static int add_fence_array(struct i915_execbuffer *eb)
2864 {
2865         struct drm_i915_gem_execbuffer2 *args = eb->args;
2866         struct drm_i915_gem_exec_fence __user *user;
2867         unsigned long num_fences = args->num_cliprects;
2868         struct eb_fence *f;
2869
2870         if (!(args->flags & I915_EXEC_FENCE_ARRAY))
2871                 return 0;
2872
2873         if (!num_fences)
2874                 return 0;
2875
2876         /* Check multiplication overflow for access_ok() and kvmalloc_array() */
2877         BUILD_BUG_ON(sizeof(size_t) > sizeof(unsigned long));
2878         if (num_fences > min_t(unsigned long,
2879                                ULONG_MAX / sizeof(*user),
2880                                SIZE_MAX / sizeof(*f) - eb->num_fences))
2881                 return -EINVAL;
2882
2883         user = u64_to_user_ptr(args->cliprects_ptr);
2884         if (!access_ok(user, num_fences * sizeof(*user)))
2885                 return -EFAULT;
2886
2887         f = krealloc(eb->fences,
2888                      (eb->num_fences + num_fences) * sizeof(*f),
2889                      __GFP_NOWARN | GFP_KERNEL);
2890         if (!f)
2891                 return -ENOMEM;
2892
2893         eb->fences = f;
2894         f += eb->num_fences;
2895         while (num_fences--) {
2896                 struct drm_i915_gem_exec_fence user_fence;
2897                 struct drm_syncobj *syncobj;
2898                 struct dma_fence *fence = NULL;
2899
2900                 if (__copy_from_user(&user_fence, user++, sizeof(user_fence)))
2901                         return -EFAULT;
2902
2903                 if (user_fence.flags & __I915_EXEC_FENCE_UNKNOWN_FLAGS)
2904                         return -EINVAL;
2905
2906                 syncobj = drm_syncobj_find(eb->file, user_fence.handle);
2907                 if (!syncobj) {
2908                         DRM_DEBUG("Invalid syncobj handle provided\n");
2909                         return -ENOENT;
2910                 }
2911
2912                 if (user_fence.flags & I915_EXEC_FENCE_WAIT) {
2913                         fence = drm_syncobj_fence_get(syncobj);
2914                         if (!fence) {
2915                                 DRM_DEBUG("Syncobj handle has no fence\n");
2916                                 drm_syncobj_put(syncobj);
2917                                 return -EINVAL;
2918                         }
2919                 }
2920
2921                 BUILD_BUG_ON(~(ARCH_KMALLOC_MINALIGN - 1) &
2922                              ~__I915_EXEC_FENCE_UNKNOWN_FLAGS);
2923
2924                 f->syncobj = ptr_pack_bits(syncobj, user_fence.flags, 2);
2925                 f->dma_fence = fence;
2926                 f->value = 0;
2927                 f->chain_fence = NULL;
2928                 f++;
2929                 eb->num_fences++;
2930         }
2931
2932         return 0;
2933 }
2934
2935 static void put_fence_array(struct eb_fence *fences, int num_fences)
2936 {
2937         if (fences)
2938                 __free_fence_array(fences, num_fences);
2939 }
2940
2941 static int
2942 await_fence_array(struct i915_execbuffer *eb,
2943                   struct i915_request *rq)
2944 {
2945         unsigned int n;
2946         int err;
2947
2948         for (n = 0; n < eb->num_fences; n++) {
2949                 struct drm_syncobj *syncobj;
2950                 unsigned int flags;
2951
2952                 syncobj = ptr_unpack_bits(eb->fences[n].syncobj, &flags, 2);
2953
2954                 if (!eb->fences[n].dma_fence)
2955                         continue;
2956
2957                 err = i915_request_await_dma_fence(rq, eb->fences[n].dma_fence);
2958                 if (err < 0)
2959                         return err;
2960         }
2961
2962         return 0;
2963 }
2964
2965 static void signal_fence_array(const struct i915_execbuffer *eb,
2966                                struct dma_fence * const fence)
2967 {
2968         unsigned int n;
2969
2970         for (n = 0; n < eb->num_fences; n++) {
2971                 struct drm_syncobj *syncobj;
2972                 unsigned int flags;
2973
2974                 syncobj = ptr_unpack_bits(eb->fences[n].syncobj, &flags, 2);
2975                 if (!(flags & I915_EXEC_FENCE_SIGNAL))
2976                         continue;
2977
2978                 if (eb->fences[n].chain_fence) {
2979                         drm_syncobj_add_point(syncobj,
2980                                               eb->fences[n].chain_fence,
2981                                               fence,
2982                                               eb->fences[n].value);
2983                         /*
2984                          * The chain's ownership is transferred to the
2985                          * timeline.
2986                          */
2987                         eb->fences[n].chain_fence = NULL;
2988                 } else {
2989                         drm_syncobj_replace_fence(syncobj, fence);
2990                 }
2991         }
2992 }
2993
2994 static int
2995 parse_timeline_fences(struct i915_user_extension __user *ext, void *data)
2996 {
2997         struct i915_execbuffer *eb = data;
2998         struct drm_i915_gem_execbuffer_ext_timeline_fences timeline_fences;
2999
3000         if (copy_from_user(&timeline_fences, ext, sizeof(timeline_fences)))
3001                 return -EFAULT;
3002
3003         return add_timeline_fence_array(eb, &timeline_fences);
3004 }
3005
3006 static void retire_requests(struct intel_timeline *tl, struct i915_request *end)
3007 {
3008         struct i915_request *rq, *rn;
3009
3010         list_for_each_entry_safe(rq, rn, &tl->requests, link)
3011                 if (rq == end || !i915_request_retire(rq))
3012                         break;
3013 }
3014
3015 static int eb_request_add(struct i915_execbuffer *eb, struct i915_request *rq,
3016                           int err, bool last_parallel)
3017 {
3018         struct intel_timeline * const tl = i915_request_timeline(rq);
3019         struct i915_sched_attr attr = {};
3020         struct i915_request *prev;
3021
3022         lockdep_assert_held(&tl->mutex);
3023         lockdep_unpin_lock(&tl->mutex, rq->cookie);
3024
3025         trace_i915_request_add(rq);
3026
3027         prev = __i915_request_commit(rq);
3028
3029         /* Check that the context wasn't destroyed before submission */
3030         if (likely(!intel_context_is_closed(eb->context))) {
3031                 attr = eb->gem_context->sched;
3032         } else {
3033                 /* Serialise with context_close via the add_to_timeline */
3034                 i915_request_set_error_once(rq, -ENOENT);
3035                 __i915_request_skip(rq);
3036                 err = -ENOENT; /* override any transient errors */
3037         }
3038
3039         if (intel_context_is_parallel(eb->context)) {
3040                 if (err) {
3041                         __i915_request_skip(rq);
3042                         set_bit(I915_FENCE_FLAG_SKIP_PARALLEL,
3043                                 &rq->fence.flags);
3044                 }
3045                 if (last_parallel)
3046                         set_bit(I915_FENCE_FLAG_SUBMIT_PARALLEL,
3047                                 &rq->fence.flags);
3048         }
3049
3050         __i915_request_queue(rq, &attr);
3051
3052         /* Try to clean up the client's timeline after submitting the request */
3053         if (prev)
3054                 retire_requests(tl, prev);
3055
3056         mutex_unlock(&tl->mutex);
3057
3058         return err;
3059 }
3060
3061 static int eb_requests_add(struct i915_execbuffer *eb, int err)
3062 {
3063         int i;
3064
3065         /*
3066          * We iterate in reverse order of creation to release timeline mutexes in
3067          * same order.
3068          */
3069         for_each_batch_add_order(eb, i) {
3070                 struct i915_request *rq = eb->requests[i];
3071
3072                 if (!rq)
3073                         continue;
3074                 err |= eb_request_add(eb, rq, err, i == 0);
3075         }
3076
3077         return err;
3078 }
3079
3080 static const i915_user_extension_fn execbuf_extensions[] = {
3081         [DRM_I915_GEM_EXECBUFFER_EXT_TIMELINE_FENCES] = parse_timeline_fences,
3082 };
3083
3084 static int
3085 parse_execbuf2_extensions(struct drm_i915_gem_execbuffer2 *args,
3086                           struct i915_execbuffer *eb)
3087 {
3088         if (!(args->flags & I915_EXEC_USE_EXTENSIONS))
3089                 return 0;
3090
3091         /* The execbuf2 extension mechanism reuses cliprects_ptr. So we cannot
3092          * have another flag also using it at the same time.
3093          */
3094         if (eb->args->flags & I915_EXEC_FENCE_ARRAY)
3095                 return -EINVAL;
3096
3097         if (args->num_cliprects != 0)
3098                 return -EINVAL;
3099
3100         return i915_user_extensions(u64_to_user_ptr(args->cliprects_ptr),
3101                                     execbuf_extensions,
3102                                     ARRAY_SIZE(execbuf_extensions),
3103                                     eb);
3104 }
3105
3106 static void eb_requests_get(struct i915_execbuffer *eb)
3107 {
3108         unsigned int i;
3109
3110         for_each_batch_create_order(eb, i) {
3111                 if (!eb->requests[i])
3112                         break;
3113
3114                 i915_request_get(eb->requests[i]);
3115         }
3116 }
3117
3118 static void eb_requests_put(struct i915_execbuffer *eb)
3119 {
3120         unsigned int i;
3121
3122         for_each_batch_create_order(eb, i) {
3123                 if (!eb->requests[i])
3124                         break;
3125
3126                 i915_request_put(eb->requests[i]);
3127         }
3128 }
3129
3130 static struct sync_file *
3131 eb_composite_fence_create(struct i915_execbuffer *eb, int out_fence_fd)
3132 {
3133         struct sync_file *out_fence = NULL;
3134         struct dma_fence_array *fence_array;
3135         struct dma_fence **fences;
3136         unsigned int i;
3137
3138         GEM_BUG_ON(!intel_context_is_parent(eb->context));
3139
3140         fences = kmalloc_array(eb->num_batches, sizeof(*fences), GFP_KERNEL);
3141         if (!fences)
3142                 return ERR_PTR(-ENOMEM);
3143
3144         for_each_batch_create_order(eb, i) {
3145                 fences[i] = &eb->requests[i]->fence;
3146                 __set_bit(I915_FENCE_FLAG_COMPOSITE,
3147                           &eb->requests[i]->fence.flags);
3148         }
3149
3150         fence_array = dma_fence_array_create(eb->num_batches,
3151                                              fences,
3152                                              eb->context->parallel.fence_context,
3153                                              eb->context->parallel.seqno++,
3154                                              false);
3155         if (!fence_array) {
3156                 kfree(fences);
3157                 return ERR_PTR(-ENOMEM);
3158         }
3159
3160         /* Move ownership to the dma_fence_array created above */
3161         for_each_batch_create_order(eb, i)
3162                 dma_fence_get(fences[i]);
3163
3164         if (out_fence_fd != -1) {
3165                 out_fence = sync_file_create(&fence_array->base);
3166                 /* sync_file now owns fence_arry, drop creation ref */
3167                 dma_fence_put(&fence_array->base);
3168                 if (!out_fence)
3169                         return ERR_PTR(-ENOMEM);
3170         }
3171
3172         eb->composite_fence = &fence_array->base;
3173
3174         return out_fence;
3175 }
3176
3177 static struct sync_file *
3178 eb_fences_add(struct i915_execbuffer *eb, struct i915_request *rq,
3179               struct dma_fence *in_fence, int out_fence_fd)
3180 {
3181         struct sync_file *out_fence = NULL;
3182         int err;
3183
3184         if (unlikely(eb->gem_context->syncobj)) {
3185                 struct dma_fence *fence;
3186
3187                 fence = drm_syncobj_fence_get(eb->gem_context->syncobj);
3188                 err = i915_request_await_dma_fence(rq, fence);
3189                 dma_fence_put(fence);
3190                 if (err)
3191                         return ERR_PTR(err);
3192         }
3193
3194         if (in_fence) {
3195                 if (eb->args->flags & I915_EXEC_FENCE_SUBMIT)
3196                         err = i915_request_await_execution(rq, in_fence);
3197                 else
3198                         err = i915_request_await_dma_fence(rq, in_fence);
3199                 if (err < 0)
3200                         return ERR_PTR(err);
3201         }
3202
3203         if (eb->fences) {
3204                 err = await_fence_array(eb, rq);
3205                 if (err)
3206                         return ERR_PTR(err);
3207         }
3208
3209         if (intel_context_is_parallel(eb->context)) {
3210                 out_fence = eb_composite_fence_create(eb, out_fence_fd);
3211                 if (IS_ERR(out_fence))
3212                         return ERR_PTR(-ENOMEM);
3213         } else if (out_fence_fd != -1) {
3214                 out_fence = sync_file_create(&rq->fence);
3215                 if (!out_fence)
3216                         return ERR_PTR(-ENOMEM);
3217         }
3218
3219         return out_fence;
3220 }
3221
3222 static struct intel_context *
3223 eb_find_context(struct i915_execbuffer *eb, unsigned int context_number)
3224 {
3225         struct intel_context *child;
3226
3227         if (likely(context_number == 0))
3228                 return eb->context;
3229
3230         for_each_child(eb->context, child)
3231                 if (!--context_number)
3232                         return child;
3233
3234         GEM_BUG_ON("Context not found");
3235
3236         return NULL;
3237 }
3238
3239 static struct sync_file *
3240 eb_requests_create(struct i915_execbuffer *eb, struct dma_fence *in_fence,
3241                    int out_fence_fd)
3242 {
3243         struct sync_file *out_fence = NULL;
3244         unsigned int i;
3245
3246         for_each_batch_create_order(eb, i) {
3247                 /* Allocate a request for this batch buffer nice and early. */
3248                 eb->requests[i] = i915_request_create(eb_find_context(eb, i));
3249                 if (IS_ERR(eb->requests[i])) {
3250                         out_fence = ERR_CAST(eb->requests[i]);
3251                         eb->requests[i] = NULL;
3252                         return out_fence;
3253                 }
3254
3255                 /*
3256                  * Only the first request added (committed to backend) has to
3257                  * take the in fences into account as all subsequent requests
3258                  * will have fences inserted inbetween them.
3259                  */
3260                 if (i + 1 == eb->num_batches) {
3261                         out_fence = eb_fences_add(eb, eb->requests[i],
3262                                                   in_fence, out_fence_fd);
3263                         if (IS_ERR(out_fence))
3264                                 return out_fence;
3265                 }
3266
3267                 /*
3268                  * Not really on stack, but we don't want to call
3269                  * kfree on the batch_snapshot when we put it, so use the
3270                  * _onstack interface.
3271                  */
3272                 if (eb->batches[i]->vma)
3273                         eb->requests[i]->batch_res =
3274                                 i915_vma_resource_get(eb->batches[i]->vma->resource);
3275                 if (eb->batch_pool) {
3276                         GEM_BUG_ON(intel_context_is_parallel(eb->context));
3277                         intel_gt_buffer_pool_mark_active(eb->batch_pool,
3278                                                          eb->requests[i]);
3279                 }
3280         }
3281
3282         return out_fence;
3283 }
3284
3285 static int
3286 i915_gem_do_execbuffer(struct drm_device *dev,
3287                        struct drm_file *file,
3288                        struct drm_i915_gem_execbuffer2 *args,
3289                        struct drm_i915_gem_exec_object2 *exec)
3290 {
3291         struct drm_i915_private *i915 = to_i915(dev);
3292         struct i915_execbuffer eb;
3293         struct dma_fence *in_fence = NULL;
3294         struct sync_file *out_fence = NULL;
3295         int out_fence_fd = -1;
3296         int err;
3297
3298         BUILD_BUG_ON(__EXEC_INTERNAL_FLAGS & ~__I915_EXEC_ILLEGAL_FLAGS);
3299         BUILD_BUG_ON(__EXEC_OBJECT_INTERNAL_FLAGS &
3300                      ~__EXEC_OBJECT_UNKNOWN_FLAGS);
3301
3302         eb.i915 = i915;
3303         eb.file = file;
3304         eb.args = args;
3305         if (DBG_FORCE_RELOC || !(args->flags & I915_EXEC_NO_RELOC))
3306                 args->flags |= __EXEC_HAS_RELOC;
3307
3308         eb.exec = exec;
3309         eb.vma = (struct eb_vma *)(exec + args->buffer_count + 1);
3310         eb.vma[0].vma = NULL;
3311         eb.batch_pool = NULL;
3312
3313         eb.invalid_flags = __EXEC_OBJECT_UNKNOWN_FLAGS;
3314         reloc_cache_init(&eb.reloc_cache, eb.i915);
3315
3316         eb.buffer_count = args->buffer_count;
3317         eb.batch_start_offset = args->batch_start_offset;
3318         eb.trampoline = NULL;
3319
3320         eb.fences = NULL;
3321         eb.num_fences = 0;
3322
3323         eb_capture_list_clear(&eb);
3324
3325         memset(eb.requests, 0, sizeof(struct i915_request *) *
3326                ARRAY_SIZE(eb.requests));
3327         eb.composite_fence = NULL;
3328
3329         eb.batch_flags = 0;
3330         if (args->flags & I915_EXEC_SECURE) {
3331                 if (GRAPHICS_VER(i915) >= 11)
3332                         return -ENODEV;
3333
3334                 /* Return -EPERM to trigger fallback code on old binaries. */
3335                 if (!HAS_SECURE_BATCHES(i915))
3336                         return -EPERM;
3337
3338                 if (!drm_is_current_master(file) || !capable(CAP_SYS_ADMIN))
3339                         return -EPERM;
3340
3341                 eb.batch_flags |= I915_DISPATCH_SECURE;
3342         }
3343         if (args->flags & I915_EXEC_IS_PINNED)
3344                 eb.batch_flags |= I915_DISPATCH_PINNED;
3345
3346         err = parse_execbuf2_extensions(args, &eb);
3347         if (err)
3348                 goto err_ext;
3349
3350         err = add_fence_array(&eb);
3351         if (err)
3352                 goto err_ext;
3353
3354 #define IN_FENCES (I915_EXEC_FENCE_IN | I915_EXEC_FENCE_SUBMIT)
3355         if (args->flags & IN_FENCES) {
3356                 if ((args->flags & IN_FENCES) == IN_FENCES)
3357                         return -EINVAL;
3358
3359                 in_fence = sync_file_get_fence(lower_32_bits(args->rsvd2));
3360                 if (!in_fence) {
3361                         err = -EINVAL;
3362                         goto err_ext;
3363                 }
3364         }
3365 #undef IN_FENCES
3366
3367         if (args->flags & I915_EXEC_FENCE_OUT) {
3368                 out_fence_fd = get_unused_fd_flags(O_CLOEXEC);
3369                 if (out_fence_fd < 0) {
3370                         err = out_fence_fd;
3371                         goto err_in_fence;
3372                 }
3373         }
3374
3375         err = eb_create(&eb);
3376         if (err)
3377                 goto err_out_fence;
3378
3379         GEM_BUG_ON(!eb.lut_size);
3380
3381         err = eb_select_context(&eb);
3382         if (unlikely(err))
3383                 goto err_destroy;
3384
3385         err = eb_select_engine(&eb);
3386         if (unlikely(err))
3387                 goto err_context;
3388
3389         err = eb_lookup_vmas(&eb);
3390         if (err) {
3391                 eb_release_vmas(&eb, true);
3392                 goto err_engine;
3393         }
3394
3395         i915_gem_ww_ctx_init(&eb.ww, true);
3396
3397         err = eb_relocate_parse(&eb);
3398         if (err) {
3399                 /*
3400                  * If the user expects the execobject.offset and
3401                  * reloc.presumed_offset to be an exact match,
3402                  * as for using NO_RELOC, then we cannot update
3403                  * the execobject.offset until we have completed
3404                  * relocation.
3405                  */
3406                 args->flags &= ~__EXEC_HAS_RELOC;
3407                 goto err_vma;
3408         }
3409
3410         ww_acquire_done(&eb.ww.ctx);
3411         eb_capture_stage(&eb);
3412
3413         out_fence = eb_requests_create(&eb, in_fence, out_fence_fd);
3414         if (IS_ERR(out_fence)) {
3415                 err = PTR_ERR(out_fence);
3416                 out_fence = NULL;
3417                 if (eb.requests[0])
3418                         goto err_request;
3419                 else
3420                         goto err_vma;
3421         }
3422
3423         err = eb_submit(&eb);
3424
3425 err_request:
3426         eb_requests_get(&eb);
3427         err = eb_requests_add(&eb, err);
3428
3429         if (eb.fences)
3430                 signal_fence_array(&eb, eb.composite_fence ?
3431                                    eb.composite_fence :
3432                                    &eb.requests[0]->fence);
3433
3434         if (out_fence) {
3435                 if (err == 0) {
3436                         fd_install(out_fence_fd, out_fence->file);
3437                         args->rsvd2 &= GENMASK_ULL(31, 0); /* keep in-fence */
3438                         args->rsvd2 |= (u64)out_fence_fd << 32;
3439                         out_fence_fd = -1;
3440                 } else {
3441                         fput(out_fence->file);
3442                 }
3443         }
3444
3445         if (unlikely(eb.gem_context->syncobj)) {
3446                 drm_syncobj_replace_fence(eb.gem_context->syncobj,
3447                                           eb.composite_fence ?
3448                                           eb.composite_fence :
3449                                           &eb.requests[0]->fence);
3450         }
3451
3452         if (!out_fence && eb.composite_fence)
3453                 dma_fence_put(eb.composite_fence);
3454
3455         eb_requests_put(&eb);
3456
3457 err_vma:
3458         eb_release_vmas(&eb, true);
3459         WARN_ON(err == -EDEADLK);
3460         i915_gem_ww_ctx_fini(&eb.ww);
3461
3462         if (eb.batch_pool)
3463                 intel_gt_buffer_pool_put(eb.batch_pool);
3464 err_engine:
3465         eb_put_engine(&eb);
3466 err_context:
3467         i915_gem_context_put(eb.gem_context);
3468 err_destroy:
3469         eb_destroy(&eb);
3470 err_out_fence:
3471         if (out_fence_fd != -1)
3472                 put_unused_fd(out_fence_fd);
3473 err_in_fence:
3474         dma_fence_put(in_fence);
3475 err_ext:
3476         put_fence_array(eb.fences, eb.num_fences);
3477         return err;
3478 }
3479
3480 static size_t eb_element_size(void)
3481 {
3482         return sizeof(struct drm_i915_gem_exec_object2) + sizeof(struct eb_vma);
3483 }
3484
3485 static bool check_buffer_count(size_t count)
3486 {
3487         const size_t sz = eb_element_size();
3488
3489         /*
3490          * When using LUT_HANDLE, we impose a limit of INT_MAX for the lookup
3491          * array size (see eb_create()). Otherwise, we can accept an array as
3492          * large as can be addressed (though use large arrays at your peril)!
3493          */
3494
3495         return !(count < 1 || count > INT_MAX || count > SIZE_MAX / sz - 1);
3496 }
3497
3498 int
3499 i915_gem_execbuffer2_ioctl(struct drm_device *dev, void *data,
3500                            struct drm_file *file)
3501 {
3502         struct drm_i915_private *i915 = to_i915(dev);
3503         struct drm_i915_gem_execbuffer2 *args = data;
3504         struct drm_i915_gem_exec_object2 *exec2_list;
3505         const size_t count = args->buffer_count;
3506         int err;
3507
3508         if (!check_buffer_count(count)) {
3509                 drm_dbg(&i915->drm, "execbuf2 with %zd buffers\n", count);
3510                 return -EINVAL;
3511         }
3512
3513         err = i915_gem_check_execbuffer(args);
3514         if (err)
3515                 return err;
3516
3517         /* Allocate extra slots for use by the command parser */
3518         exec2_list = kvmalloc_array(count + 2, eb_element_size(),
3519                                     __GFP_NOWARN | GFP_KERNEL);
3520         if (exec2_list == NULL) {
3521                 drm_dbg(&i915->drm, "Failed to allocate exec list for %zd buffers\n",
3522                         count);
3523                 return -ENOMEM;
3524         }
3525         if (copy_from_user(exec2_list,
3526                            u64_to_user_ptr(args->buffers_ptr),
3527                            sizeof(*exec2_list) * count)) {
3528                 drm_dbg(&i915->drm, "copy %zd exec entries failed\n", count);
3529                 kvfree(exec2_list);
3530                 return -EFAULT;
3531         }
3532
3533         err = i915_gem_do_execbuffer(dev, file, args, exec2_list);
3534
3535         /*
3536          * Now that we have begun execution of the batchbuffer, we ignore
3537          * any new error after this point. Also given that we have already
3538          * updated the associated relocations, we try to write out the current
3539          * object locations irrespective of any error.
3540          */
3541         if (args->flags & __EXEC_HAS_RELOC) {
3542                 struct drm_i915_gem_exec_object2 __user *user_exec_list =
3543                         u64_to_user_ptr(args->buffers_ptr);
3544                 unsigned int i;
3545
3546                 /* Copy the new buffer offsets back to the user's exec list. */
3547                 /*
3548                  * Note: count * sizeof(*user_exec_list) does not overflow,
3549                  * because we checked 'count' in check_buffer_count().
3550                  *
3551                  * And this range already got effectively checked earlier
3552                  * when we did the "copy_from_user()" above.
3553                  */
3554                 if (!user_write_access_begin(user_exec_list,
3555                                              count * sizeof(*user_exec_list)))
3556                         goto end;
3557
3558                 for (i = 0; i < args->buffer_count; i++) {
3559                         if (!(exec2_list[i].offset & UPDATE))
3560                                 continue;
3561
3562                         exec2_list[i].offset =
3563                                 gen8_canonical_addr(exec2_list[i].offset & PIN_OFFSET_MASK);
3564                         unsafe_put_user(exec2_list[i].offset,
3565                                         &user_exec_list[i].offset,
3566                                         end_user);
3567                 }
3568 end_user:
3569                 user_write_access_end();
3570 end:;
3571         }
3572
3573         args->flags &= ~__I915_EXEC_UNKNOWN_FLAGS;
3574         kvfree(exec2_list);
3575         return err;
3576 }