drivers/gpu/drm/gma500/psb_intel_sdvo.c

   1 /*
   2  * Copyright 2006 Dave Airlie <airlied@linux.ie>
   3  * Copyright © 2006-2007 Intel Corporation
   4  *   Jesse Barnes <jesse.barnes@intel.com>
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the "Software"),
   8  * to deal in the Software without restriction, including without limitation
   9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10  * and/or sell copies of the Software, and to permit persons to whom the
  11  * Software is furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice (including the next
  14  * paragraph) shall be included in all copies or substantial portions of the
  15  * Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  22  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  23  * DEALINGS IN THE SOFTWARE.
  24  *
  25  * Authors:
  26  *      Eric Anholt <eric@anholt.net>
  27  */
  28
  29 #include <linux/delay.h>
  30 #include <linux/i2c.h>
  31 #include <linux/kernel.h>
  32 #include <linux/module.h>
  33 #include <linux/slab.h>
  34
  35 #include <drm/drm_crtc.h>
  36 #include <drm/drm_edid.h>
  37
  38 #include "psb_drv.h"
  39 #include "psb_intel_drv.h"
  40 #include "psb_intel_reg.h"
  41 #include "psb_intel_sdvo_regs.h"
  42
  43 #define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)
  44 #define SDVO_RGB_MASK  (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)
  45 #define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)
  46 #define SDVO_TV_MASK   (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0)
  47
  48 #define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\
  49                          SDVO_TV_MASK)
  50
  51 #define IS_TV(c)        (c->output_flag & SDVO_TV_MASK)
  52 #define IS_TMDS(c)      (c->output_flag & SDVO_TMDS_MASK)
  53 #define IS_LVDS(c)      (c->output_flag & SDVO_LVDS_MASK)
  54 #define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
  55
  56
  57 static const char *tv_format_names[] = {
  58         "NTSC_M"   , "NTSC_J"  , "NTSC_443",
  59         "PAL_B"    , "PAL_D"   , "PAL_G"   ,
  60         "PAL_H"    , "PAL_I"   , "PAL_M"   ,
  61         "PAL_N"    , "PAL_NC"  , "PAL_60"  ,
  62         "SECAM_B"  , "SECAM_D" , "SECAM_G" ,
  63         "SECAM_K"  , "SECAM_K1", "SECAM_L" ,
  64         "SECAM_60"
  65 };
  66
  67 struct psb_intel_sdvo {
  68         struct gma_encoder base;
  69
  70         struct i2c_adapter *i2c;
  71         u8 slave_addr;
  72
  73         struct i2c_adapter ddc;
  74
  75         /* Register for the SDVO device: SDVOB or SDVOC */
  76         int sdvo_reg;
  77
  78         /* Active outputs controlled by this SDVO output */
  79         uint16_t controlled_output;
  80
  81         /*
  82          * Capabilities of the SDVO device returned by
  83          * i830_sdvo_get_capabilities()
  84          */
  85         struct psb_intel_sdvo_caps caps;
  86
  87         /* Pixel clock limitations reported by the SDVO device, in kHz */
  88         int pixel_clock_min, pixel_clock_max;
  89
  90         /*
  91         * For multiple function SDVO device,
  92         * this is for current attached outputs.
  93         */
  94         uint16_t attached_output;
  95
  96         /**
  97          * This is used to select the color range of RBG outputs in HDMI mode.
  98          * It is only valid when using TMDS encoding and 8 bit per color mode.
  99          */
 100         uint32_t color_range;
 101
 102         /**
 103          * This is set if we're going to treat the device as TV-out.
 104          *
 105          * While we have these nice friendly flags for output types that ought
 106          * to decide this for us, the S-Video output on our HDMI+S-Video card
 107          * shows up as RGB1 (VGA).
 108          */
 109         bool is_tv;
 110
 111         /* This is for current tv format name */
 112         int tv_format_index;
 113
 114         /**
 115          * This is set if we treat the device as HDMI, instead of DVI.
 116          */
 117         bool is_hdmi;
 118         bool has_hdmi_monitor;
 119         bool has_hdmi_audio;
 120
 121         /**
 122          * This is set if we detect output of sdvo device as LVDS and
 123          * have a valid fixed mode to use with the panel.
 124          */
 125         bool is_lvds;
 126
 127         /**
 128          * This is sdvo fixed pannel mode pointer
 129          */
 130         struct drm_display_mode *sdvo_lvds_fixed_mode;
 131
 132         /* DDC bus used by this SDVO encoder */
 133         uint8_t ddc_bus;
 134
 135         /* Input timings for adjusted_mode */
 136         struct psb_intel_sdvo_dtd input_dtd;
 137
 138         /* Saved SDVO output states */
 139         uint32_t saveSDVO; /* Can be SDVOB or SDVOC depending on sdvo_reg */
 140 };
 141
 142 struct psb_intel_sdvo_connector {
 143         struct gma_connector base;
 144
 145         /* Mark the type of connector */
 146         uint16_t output_flag;
 147
 148         int force_audio;
 149
 150         /* This contains all current supported TV format */
 151         u8 tv_format_supported[ARRAY_SIZE(tv_format_names)];
 152         int   format_supported_num;
 153         struct drm_property *tv_format;
 154
 155         /* add the property for the SDVO-TV */
 156         struct drm_property *left;
 157         struct drm_property *right;
 158         struct drm_property *top;
 159         struct drm_property *bottom;
 160         struct drm_property *hpos;
 161         struct drm_property *vpos;
 162         struct drm_property *contrast;
 163         struct drm_property *saturation;
 164         struct drm_property *hue;
 165         struct drm_property *sharpness;
 166         struct drm_property *flicker_filter;
 167         struct drm_property *flicker_filter_adaptive;
 168         struct drm_property *flicker_filter_2d;
 169         struct drm_property *tv_chroma_filter;
 170         struct drm_property *tv_luma_filter;
 171         struct drm_property *dot_crawl;
 172
 173         /* add the property for the SDVO-TV/LVDS */
 174         struct drm_property *brightness;
 175
 176         /* Add variable to record current setting for the above property */
 177         u32     left_margin, right_margin, top_margin, bottom_margin;
 178
 179         /* this is to get the range of margin.*/
 180         u32     max_hscan,  max_vscan;
 181         u32     max_hpos, cur_hpos;
 182         u32     max_vpos, cur_vpos;
 183         u32     cur_brightness, max_brightness;
 184         u32     cur_contrast,   max_contrast;
 185         u32     cur_saturation, max_saturation;
 186         u32     cur_hue,        max_hue;
 187         u32     cur_sharpness,  max_sharpness;
 188         u32     cur_flicker_filter,             max_flicker_filter;
 189         u32     cur_flicker_filter_adaptive,    max_flicker_filter_adaptive;
 190         u32     cur_flicker_filter_2d,          max_flicker_filter_2d;
 191         u32     cur_tv_chroma_filter,   max_tv_chroma_filter;
 192         u32     cur_tv_luma_filter,     max_tv_luma_filter;
 193         u32     cur_dot_crawl,  max_dot_crawl;
 194 };
 195
 196 static struct psb_intel_sdvo *to_psb_intel_sdvo(struct drm_encoder *encoder)
 197 {
 198         return container_of(encoder, struct psb_intel_sdvo, base.base);
 199 }
 200
 201 static struct psb_intel_sdvo *intel_attached_sdvo(struct drm_connector *connector)
 202 {
 203         return container_of(gma_attached_encoder(connector),
 204                             struct psb_intel_sdvo, base);
 205 }
 206
 207 static struct psb_intel_sdvo_connector *to_psb_intel_sdvo_connector(struct drm_connector *connector)
 208 {
 209         return container_of(to_gma_connector(connector), struct psb_intel_sdvo_connector, base);
 210 }
 211
 212 static bool
 213 psb_intel_sdvo_output_setup(struct psb_intel_sdvo *psb_intel_sdvo, uint16_t flags);
 214 static bool
 215 psb_intel_sdvo_tv_create_property(struct psb_intel_sdvo *psb_intel_sdvo,
 216                               struct psb_intel_sdvo_connector *psb_intel_sdvo_connector,
 217                               int type);
 218 static bool
 219 psb_intel_sdvo_create_enhance_property(struct psb_intel_sdvo *psb_intel_sdvo,
 220                                    struct psb_intel_sdvo_connector *psb_intel_sdvo_connector);
 221
 222 /**
 223  * Writes the SDVOB or SDVOC with the given value, but always writes both
 224  * SDVOB and SDVOC to work around apparent hardware issues (according to
 225  * comments in the BIOS).
 226  */
 227 static void psb_intel_sdvo_write_sdvox(struct psb_intel_sdvo *psb_intel_sdvo, u32 val)
 228 {
 229         struct drm_device *dev = psb_intel_sdvo->base.base.dev;
 230         u32 bval = val, cval = val;
 231         int i, j;
 232         int need_aux = IS_MRST(dev) ? 1 : 0;
 233
 234         for (j = 0; j <= need_aux; j++) {
 235                 if (psb_intel_sdvo->sdvo_reg == SDVOB)
 236                         cval = REG_READ_WITH_AUX(SDVOC, j);
 237                 else
 238                         bval = REG_READ_WITH_AUX(SDVOB, j);
 239
 240                 /*
 241                 * Write the registers twice for luck. Sometimes,
 242                 * writing them only once doesn't appear to 'stick'.
 243                 * The BIOS does this too. Yay, magic
 244                 */
 245                 for (i = 0; i < 2; i++) {
 246                         REG_WRITE_WITH_AUX(SDVOB, bval, j);
 247                         REG_READ_WITH_AUX(SDVOB, j);
 248                         REG_WRITE_WITH_AUX(SDVOC, cval, j);
 249                         REG_READ_WITH_AUX(SDVOC, j);
 250                 }
 251         }
 252 }
 253
 254 static bool psb_intel_sdvo_read_byte(struct psb_intel_sdvo *psb_intel_sdvo, u8 addr, u8 *ch)
 255 {
 256         struct i2c_msg msgs[] = {
 257                 {
 258                         .addr = psb_intel_sdvo->slave_addr,
 259                         .flags = 0,
 260                         .len = 1,
 261                         .buf = &addr,
 262                 },
 263                 {
 264                         .addr = psb_intel_sdvo->slave_addr,
 265                         .flags = I2C_M_RD,
 266                         .len = 1,
 267                         .buf = ch,
 268                 }
 269         };
 270         int ret;
 271
 272         if ((ret = i2c_transfer(psb_intel_sdvo->i2c, msgs, 2)) == 2)
 273                 return true;
 274
 275         DRM_DEBUG_KMS("i2c transfer returned %d\n", ret);
 276         return false;
 277 }
 278
 279 #define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd}
 280 /** Mapping of command numbers to names, for debug output */
 281 static const struct _sdvo_cmd_name {
 282         u8 cmd;
 283         const char *name;
 284 } sdvo_cmd_names[] = {
 285     SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET),
 286     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS),
 287     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV),
 288     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS),
 289     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS),
 290     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS),
 291     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP),
 292     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP),
 293     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS),
 294     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT),
 295     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG),
 296     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG),
 297     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE),
 298     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT),
 299     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT),
 300     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1),
 301     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2),
 302     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
 303     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2),
 304     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
 305     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1),
 306     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2),
 307     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1),
 308     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2),
 309     SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING),
 310     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1),
 311     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2),
 312     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE),
 313     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE),
 314     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS),
 315     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT),
 316     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT),
 317     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS),
 318     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT),
 319     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT),
 320     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES),
 321     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE),
 322     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE),
 323     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE),
 324     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH),
 325     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT),
 326     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT),
 327     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS),
 328
 329     /* Add the op code for SDVO enhancements */
 330     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS),
 331     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS),
 332     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS),
 333     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS),
 334     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS),
 335     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS),
 336     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION),
 337     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION),
 338     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION),
 339     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE),
 340     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE),
 341     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE),
 342     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST),
 343     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST),
 344     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST),
 345     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS),
 346     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS),
 347     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS),
 348     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H),
 349     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H),
 350     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H),
 351     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V),
 352     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V),
 353     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V),
 354     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER),
 355     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER),
 356     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER),
 357     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE),
 358     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE),
 359     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE),
 360     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D),
 361     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D),
 362     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D),
 363     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS),
 364     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS),
 365     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS),
 366     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL),
 367     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL),
 368     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER),
 369     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER),
 370     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER),
 371     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER),
 372     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER),
 373     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER),
 374
 375     /* HDMI op code */
 376     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE),
 377     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE),
 378     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE),
 379     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI),
 380     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI),
 381     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP),
 382     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY),
 383     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY),
 384     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER),
 385     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT),
 386     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT),
 387     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX),
 388     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX),
 389     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO),
 390     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT),
 391     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT),
 392     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE),
 393     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE),
 394     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA),
 395     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA),
 396 };
 397
 398 #define IS_SDVOB(reg)   (reg == SDVOB)
 399 #define SDVO_NAME(svdo) (IS_SDVOB((svdo)->sdvo_reg) ? "SDVOB" : "SDVOC")
 400
 401 static void psb_intel_sdvo_debug_write(struct psb_intel_sdvo *psb_intel_sdvo, u8 cmd,
 402                                    const void *args, int args_len)
 403 {
 404         int i;
 405
 406         DRM_DEBUG_KMS("%s: W: %02X ",
 407                                 SDVO_NAME(psb_intel_sdvo), cmd);
 408         for (i = 0; i < args_len; i++)
 409                 DRM_DEBUG_KMS("%02X ", ((u8 *)args)[i]);
 410         for (; i < 8; i++)
 411                 DRM_DEBUG_KMS("   ");
 412         for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) {
 413                 if (cmd == sdvo_cmd_names[i].cmd) {
 414                         DRM_DEBUG_KMS("(%s)", sdvo_cmd_names[i].name);
 415                         break;
 416                 }
 417         }
 418         if (i == ARRAY_SIZE(sdvo_cmd_names))
 419                 DRM_DEBUG_KMS("(%02X)", cmd);
 420         DRM_DEBUG_KMS("\n");
 421 }
 422
 423 static const char *cmd_status_names[] = {
 424         "Power on",
 425         "Success",
 426         "Not supported",
 427         "Invalid arg",
 428         "Pending",
 429         "Target not specified",
 430         "Scaling not supported"
 431 };
 432
 433 #define MAX_ARG_LEN 32
 434
 435 static bool psb_intel_sdvo_write_cmd(struct psb_intel_sdvo *psb_intel_sdvo, u8 cmd,
 436                                  const void *args, int args_len)
 437 {
 438         u8 buf[MAX_ARG_LEN*2 + 2], status;
 439         struct i2c_msg msgs[MAX_ARG_LEN + 3];
 440         int i, ret;
 441
 442         if (args_len > MAX_ARG_LEN) {
 443                 DRM_ERROR("Need to increase arg length\n");
 444                 return false;
 445         }
 446
 447         psb_intel_sdvo_debug_write(psb_intel_sdvo, cmd, args, args_len);
 448
 449         for (i = 0; i < args_len; i++) {
 450                 msgs[i].addr = psb_intel_sdvo->slave_addr;
 451                 msgs[i].flags = 0;
 452                 msgs[i].len = 2;
 453                 msgs[i].buf = buf + 2 *i;
 454                 buf[2*i + 0] = SDVO_I2C_ARG_0 - i;
 455                 buf[2*i + 1] = ((u8*)args)[i];
 456         }
 457         msgs[i].addr = psb_intel_sdvo->slave_addr;
 458         msgs[i].flags = 0;
 459         msgs[i].len = 2;
 460         msgs[i].buf = buf + 2*i;
 461         buf[2*i + 0] = SDVO_I2C_OPCODE;
 462         buf[2*i + 1] = cmd;
 463
 464         /* the following two are to read the response */
 465         status = SDVO_I2C_CMD_STATUS;
 466         msgs[i+1].addr = psb_intel_sdvo->slave_addr;
 467         msgs[i+1].flags = 0;
 468         msgs[i+1].len = 1;
 469         msgs[i+1].buf = &status;
 470
 471         msgs[i+2].addr = psb_intel_sdvo->slave_addr;
 472         msgs[i+2].flags = I2C_M_RD;
 473         msgs[i+2].len = 1;
 474         msgs[i+2].buf = &status;
 475
 476         ret = i2c_transfer(psb_intel_sdvo->i2c, msgs, i+3);
 477         if (ret < 0) {
 478                 DRM_DEBUG_KMS("I2c transfer returned %d\n", ret);
 479                 return false;
 480         }
 481         if (ret != i+3) {
 482                 /* failure in I2C transfer */
 483                 DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3);
 484                 return false;
 485         }
 486
 487         return true;
 488 }
 489
 490 static bool psb_intel_sdvo_read_response(struct psb_intel_sdvo *psb_intel_sdvo,
 491                                      void *response, int response_len)
 492 {
 493         u8 retry = 5;
 494         u8 status;
 495         int i;
 496
 497         DRM_DEBUG_KMS("%s: R: ", SDVO_NAME(psb_intel_sdvo));
 498
 499         /*
 500          * The documentation states that all commands will be
 501          * processed within 15µs, and that we need only poll
 502          * the status byte a maximum of 3 times in order for the
 503          * command to be complete.
 504          *
 505          * Check 5 times in case the hardware failed to read the docs.
 506          */
 507         if (!psb_intel_sdvo_read_byte(psb_intel_sdvo,
 508                                   SDVO_I2C_CMD_STATUS,
 509                                   &status))
 510                 goto log_fail;
 511
 512         while ((status == SDVO_CMD_STATUS_PENDING ||
 513                 status == SDVO_CMD_STATUS_TARGET_NOT_SPECIFIED) && retry--) {
 514                 udelay(15);
 515                 if (!psb_intel_sdvo_read_byte(psb_intel_sdvo,
 516                                           SDVO_I2C_CMD_STATUS,
 517                                           &status))
 518                         goto log_fail;
 519         }
 520
 521         if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP)
 522                 DRM_DEBUG_KMS("(%s)", cmd_status_names[status]);
 523         else
 524                 DRM_DEBUG_KMS("(??? %d)", status);
 525
 526         if (status != SDVO_CMD_STATUS_SUCCESS)
 527                 goto log_fail;
 528
 529         /* Read the command response */
 530         for (i = 0; i < response_len; i++) {
 531                 if (!psb_intel_sdvo_read_byte(psb_intel_sdvo,
 532                                           SDVO_I2C_RETURN_0 + i,
 533                                           &((u8 *)response)[i]))
 534                         goto log_fail;
 535                 DRM_DEBUG_KMS(" %02X", ((u8 *)response)[i]);
 536         }
 537         DRM_DEBUG_KMS("\n");
 538         return true;
 539
 540 log_fail:
 541         DRM_DEBUG_KMS("... failed\n");
 542         return false;
 543 }
 544
 545 static int psb_intel_sdvo_get_pixel_multiplier(struct drm_display_mode *mode)
 546 {
 547         if (mode->clock >= 100000)
 548                 return 1;
 549         else if (mode->clock >= 50000)
 550                 return 2;
 551         else
 552                 return 4;
 553 }
 554
 555 static bool psb_intel_sdvo_set_control_bus_switch(struct psb_intel_sdvo *psb_intel_sdvo,
 556                                               u8 ddc_bus)
 557 {
 558         /* This must be the immediately preceding write before the i2c xfer */
 559         return psb_intel_sdvo_write_cmd(psb_intel_sdvo,
 560                                     SDVO_CMD_SET_CONTROL_BUS_SWITCH,
 561                                     &ddc_bus, 1);
 562 }
 563
 564 static bool psb_intel_sdvo_set_value(struct psb_intel_sdvo *psb_intel_sdvo, u8 cmd, const void *data, int len)
 565 {
 566         if (!psb_intel_sdvo_write_cmd(psb_intel_sdvo, cmd, data, len))
 567                 return false;
 568
 569         return psb_intel_sdvo_read_response(psb_intel_sdvo, NULL, 0);
 570 }
 571
 572 static bool
 573 psb_intel_sdvo_get_value(struct psb_intel_sdvo *psb_intel_sdvo, u8 cmd, void *value, int len)
 574 {
 575         if (!psb_intel_sdvo_write_cmd(psb_intel_sdvo, cmd, NULL, 0))
 576                 return false;
 577
 578         return psb_intel_sdvo_read_response(psb_intel_sdvo, value, len);
 579 }
 580
 581 static bool psb_intel_sdvo_set_target_input(struct psb_intel_sdvo *psb_intel_sdvo)
 582 {
 583         struct psb_intel_sdvo_set_target_input_args targets = {0};
 584         return psb_intel_sdvo_set_value(psb_intel_sdvo,
 585                                     SDVO_CMD_SET_TARGET_INPUT,
 586                                     &targets, sizeof(targets));
 587 }
 588
 589 /**
 590  * Return whether each input is trained.
 591  *
 592  * This function is making an assumption about the layout of the response,
 593  * which should be checked against the docs.
 594  */
 595 static bool psb_intel_sdvo_get_trained_inputs(struct psb_intel_sdvo *psb_intel_sdvo, bool *input_1, bool *input_2)
 596 {
 597         struct psb_intel_sdvo_get_trained_inputs_response response;
 598
 599         BUILD_BUG_ON(sizeof(response) != 1);
 600         if (!psb_intel_sdvo_get_value(psb_intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS,
 601                                   &response, sizeof(response)))
 602                 return false;
 603
 604         *input_1 = response.input0_trained;
 605         *input_2 = response.input1_trained;
 606         return true;
 607 }
 608
 609 static bool psb_intel_sdvo_set_active_outputs(struct psb_intel_sdvo *psb_intel_sdvo,
 610                                           u16 outputs)
 611 {
 612         return psb_intel_sdvo_set_value(psb_intel_sdvo,
 613                                     SDVO_CMD_SET_ACTIVE_OUTPUTS,
 614                                     &outputs, sizeof(outputs));
 615 }
 616
 617 static bool psb_intel_sdvo_set_encoder_power_state(struct psb_intel_sdvo *psb_intel_sdvo,
 618                                                int mode)
 619 {
 620         u8 state = SDVO_ENCODER_STATE_ON;
 621
 622         switch (mode) {
 623         case DRM_MODE_DPMS_ON:
 624                 state = SDVO_ENCODER_STATE_ON;
 625                 break;
 626         case DRM_MODE_DPMS_STANDBY:
 627                 state = SDVO_ENCODER_STATE_STANDBY;
 628                 break;
 629         case DRM_MODE_DPMS_SUSPEND:
 630                 state = SDVO_ENCODER_STATE_SUSPEND;
 631                 break;
 632         case DRM_MODE_DPMS_OFF:
 633                 state = SDVO_ENCODER_STATE_OFF;
 634                 break;
 635         }
 636
 637         return psb_intel_sdvo_set_value(psb_intel_sdvo,
 638                                     SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state));
 639 }
 640
 641 static bool psb_intel_sdvo_get_input_pixel_clock_range(struct psb_intel_sdvo *psb_intel_sdvo,
 642                                                    int *clock_min,
 643                                                    int *clock_max)
 644 {
 645         struct psb_intel_sdvo_pixel_clock_range clocks;
 646
 647         BUILD_BUG_ON(sizeof(clocks) != 4);
 648         if (!psb_intel_sdvo_get_value(psb_intel_sdvo,
 649                                   SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE,
 650                                   &clocks, sizeof(clocks)))
 651                 return false;
 652
 653         /* Convert the values from units of 10 kHz to kHz. */
 654         *clock_min = clocks.min * 10;
 655         *clock_max = clocks.max * 10;
 656         return true;
 657 }
 658
 659 static bool psb_intel_sdvo_set_target_output(struct psb_intel_sdvo *psb_intel_sdvo,
 660                                          u16 outputs)
 661 {
 662         return psb_intel_sdvo_set_value(psb_intel_sdvo,
 663                                     SDVO_CMD_SET_TARGET_OUTPUT,
 664                                     &outputs, sizeof(outputs));
 665 }
 666
 667 static bool psb_intel_sdvo_set_timing(struct psb_intel_sdvo *psb_intel_sdvo, u8 cmd,
 668                                   struct psb_intel_sdvo_dtd *dtd)
 669 {
 670         return psb_intel_sdvo_set_value(psb_intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
 671                 psb_intel_sdvo_set_value(psb_intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
 672 }
 673
 674 static bool psb_intel_sdvo_set_input_timing(struct psb_intel_sdvo *psb_intel_sdvo,
 675                                          struct psb_intel_sdvo_dtd *dtd)
 676 {
 677         return psb_intel_sdvo_set_timing(psb_intel_sdvo,
 678                                      SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd);
 679 }
 680
 681 static bool psb_intel_sdvo_set_output_timing(struct psb_intel_sdvo *psb_intel_sdvo,
 682                                          struct psb_intel_sdvo_dtd *dtd)
 683 {
 684         return psb_intel_sdvo_set_timing(psb_intel_sdvo,
 685                                      SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd);
 686 }
 687
 688 static bool
 689 psb_intel_sdvo_create_preferred_input_timing(struct psb_intel_sdvo *psb_intel_sdvo,
 690                                          uint16_t clock,
 691                                          uint16_t width,
 692                                          uint16_t height)
 693 {
 694         struct psb_intel_sdvo_preferred_input_timing_args args;
 695
 696         memset(&args, 0, sizeof(args));
 697         args.clock = clock;
 698         args.width = width;
 699         args.height = height;
 700         args.interlace = 0;
 701
 702         if (psb_intel_sdvo->is_lvds &&
 703            (psb_intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width ||
 704             psb_intel_sdvo->sdvo_lvds_fixed_mode->vdisplay != height))
 705                 args.scaled = 1;
 706
 707         return psb_intel_sdvo_set_value(psb_intel_sdvo,
 708                                     SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING,
 709                                     &args, sizeof(args));
 710 }
 711
 712 static bool psb_intel_sdvo_get_preferred_input_timing(struct psb_intel_sdvo *psb_intel_sdvo,
 713                                                   struct psb_intel_sdvo_dtd *dtd)
 714 {
 715         BUILD_BUG_ON(sizeof(dtd->part1) != 8);
 716         BUILD_BUG_ON(sizeof(dtd->part2) != 8);
 717         return psb_intel_sdvo_get_value(psb_intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1,
 718                                     &dtd->part1, sizeof(dtd->part1)) &&
 719                 psb_intel_sdvo_get_value(psb_intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2,
 720                                      &dtd->part2, sizeof(dtd->part2));
 721 }
 722
 723 static bool psb_intel_sdvo_set_clock_rate_mult(struct psb_intel_sdvo *psb_intel_sdvo, u8 val)
 724 {
 725         return psb_intel_sdvo_set_value(psb_intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1);
 726 }
 727
 728 static void psb_intel_sdvo_get_dtd_from_mode(struct psb_intel_sdvo_dtd *dtd,
 729                                          const struct drm_display_mode *mode)
 730 {
 731         uint16_t width, height;
 732         uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len;
 733         uint16_t h_sync_offset, v_sync_offset;
 734
 735         width = mode->crtc_hdisplay;
 736         height = mode->crtc_vdisplay;
 737
 738         /* do some mode translations */
 739         h_blank_len = mode->crtc_hblank_end - mode->crtc_hblank_start;
 740         h_sync_len = mode->crtc_hsync_end - mode->crtc_hsync_start;
 741
 742         v_blank_len = mode->crtc_vblank_end - mode->crtc_vblank_start;
 743         v_sync_len = mode->crtc_vsync_end - mode->crtc_vsync_start;
 744
 745         h_sync_offset = mode->crtc_hsync_start - mode->crtc_hblank_start;
 746         v_sync_offset = mode->crtc_vsync_start - mode->crtc_vblank_start;
 747
 748         dtd->part1.clock = mode->clock / 10;
 749         dtd->part1.h_active = width & 0xff;
 750         dtd->part1.h_blank = h_blank_len & 0xff;
 751         dtd->part1.h_high = (((width >> 8) & 0xf) << 4) |
 752                 ((h_blank_len >> 8) & 0xf);
 753         dtd->part1.v_active = height & 0xff;
 754         dtd->part1.v_blank = v_blank_len & 0xff;
 755         dtd->part1.v_high = (((height >> 8) & 0xf) << 4) |
 756                 ((v_blank_len >> 8) & 0xf);
 757
 758         dtd->part2.h_sync_off = h_sync_offset & 0xff;
 759         dtd->part2.h_sync_width = h_sync_len & 0xff;
 760         dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 |
 761                 (v_sync_len & 0xf);
 762         dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) |
 763                 ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) |
 764                 ((v_sync_len & 0x30) >> 4);
 765
 766         dtd->part2.dtd_flags = 0x18;
 767         if (mode->flags & DRM_MODE_FLAG_PHSYNC)
 768                 dtd->part2.dtd_flags |= 0x2;
 769         if (mode->flags & DRM_MODE_FLAG_PVSYNC)
 770                 dtd->part2.dtd_flags |= 0x4;
 771
 772         dtd->part2.sdvo_flags = 0;
 773         dtd->part2.v_sync_off_high = v_sync_offset & 0xc0;
 774         dtd->part2.reserved = 0;
 775 }
 776
 777 static void psb_intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode,
 778                                          const struct psb_intel_sdvo_dtd *dtd)
 779 {
 780         mode->hdisplay = dtd->part1.h_active;
 781         mode->hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
 782         mode->hsync_start = mode->hdisplay + dtd->part2.h_sync_off;
 783         mode->hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2;
 784         mode->hsync_end = mode->hsync_start + dtd->part2.h_sync_width;
 785         mode->hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4;
 786         mode->htotal = mode->hdisplay + dtd->part1.h_blank;
 787         mode->htotal += (dtd->part1.h_high & 0xf) << 8;
 788
 789         mode->vdisplay = dtd->part1.v_active;
 790         mode->vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
 791         mode->vsync_start = mode->vdisplay;
 792         mode->vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf;
 793         mode->vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2;
 794         mode->vsync_start += dtd->part2.v_sync_off_high & 0xc0;
 795         mode->vsync_end = mode->vsync_start +
 796                 (dtd->part2.v_sync_off_width & 0xf);
 797         mode->vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4;
 798         mode->vtotal = mode->vdisplay + dtd->part1.v_blank;
 799         mode->vtotal += (dtd->part1.v_high & 0xf) << 8;
 800
 801         mode->clock = dtd->part1.clock * 10;
 802
 803         mode->flags &= ~(DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC);
 804         if (dtd->part2.dtd_flags & 0x2)
 805                 mode->flags |= DRM_MODE_FLAG_PHSYNC;
 806         if (dtd->part2.dtd_flags & 0x4)
 807                 mode->flags |= DRM_MODE_FLAG_PVSYNC;
 808 }
 809
 810 static bool psb_intel_sdvo_check_supp_encode(struct psb_intel_sdvo *psb_intel_sdvo)
 811 {
 812         struct psb_intel_sdvo_encode encode;
 813
 814         BUILD_BUG_ON(sizeof(encode) != 2);
 815         return psb_intel_sdvo_get_value(psb_intel_sdvo,
 816                                   SDVO_CMD_GET_SUPP_ENCODE,
 817                                   &encode, sizeof(encode));
 818 }
 819
 820 static bool psb_intel_sdvo_set_encode(struct psb_intel_sdvo *psb_intel_sdvo,
 821                                   uint8_t mode)
 822 {
 823         return psb_intel_sdvo_set_value(psb_intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1);
 824 }
 825
 826 static bool psb_intel_sdvo_set_colorimetry(struct psb_intel_sdvo *psb_intel_sdvo,
 827                                        uint8_t mode)
 828 {
 829         return psb_intel_sdvo_set_value(psb_intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1);
 830 }
 831
 832 #if 0
 833 static void psb_intel_sdvo_dump_hdmi_buf(struct psb_intel_sdvo *psb_intel_sdvo)
 834 {
 835         int i, j;
 836         uint8_t set_buf_index[2];
 837         uint8_t av_split;
 838         uint8_t buf_size;
 839         uint8_t buf[48];
 840         uint8_t *pos;
 841
 842         psb_intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1);
 843
 844         for (i = 0; i <= av_split; i++) {
 845                 set_buf_index[0] = i; set_buf_index[1] = 0;
 846                 psb_intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX,
 847                                      set_buf_index, 2);
 848                 psb_intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0);
 849                 psb_intel_sdvo_read_response(encoder, &buf_size, 1);
 850
 851                 pos = buf;
 852                 for (j = 0; j <= buf_size; j += 8) {
 853                         psb_intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA,
 854                                              NULL, 0);
 855                         psb_intel_sdvo_read_response(encoder, pos, 8);
 856                         pos += 8;
 857                 }
 858         }
 859 }
 860 #endif
 861
 862 static bool psb_intel_sdvo_set_avi_infoframe(struct psb_intel_sdvo *psb_intel_sdvo)
 863 {
 864         DRM_INFO("HDMI is not supported yet");
 865
 866         return false;
 867 #if 0
 868         struct dip_infoframe avi_if = {
 869                 .type = DIP_TYPE_AVI,
 870                 .ver = DIP_VERSION_AVI,
 871                 .len = DIP_LEN_AVI,
 872         };
 873         uint8_t tx_rate = SDVO_HBUF_TX_VSYNC;
 874         uint8_t set_buf_index[2] = { 1, 0 };
 875         uint64_t *data = (uint64_t *)&avi_if;
 876         unsigned i;
 877
 878         intel_dip_infoframe_csum(&avi_if);
 879
 880         if (!psb_intel_sdvo_set_value(psb_intel_sdvo,
 881                                   SDVO_CMD_SET_HBUF_INDEX,
 882                                   set_buf_index, 2))
 883                 return false;
 884
 885         for (i = 0; i < sizeof(avi_if); i += 8) {
 886                 if (!psb_intel_sdvo_set_value(psb_intel_sdvo,
 887                                           SDVO_CMD_SET_HBUF_DATA,
 888                                           data, 8))
 889                         return false;
 890                 data++;
 891         }
 892
 893         return psb_intel_sdvo_set_value(psb_intel_sdvo,
 894                                     SDVO_CMD_SET_HBUF_TXRATE,
 895                                     &tx_rate, 1);
 896 #endif
 897 }
 898
 899 static bool psb_intel_sdvo_set_tv_format(struct psb_intel_sdvo *psb_intel_sdvo)
 900 {
 901         struct psb_intel_sdvo_tv_format format;
 902         uint32_t format_map;
 903
 904         format_map = 1 << psb_intel_sdvo->tv_format_index;
 905         memset(&format, 0, sizeof(format));
 906         memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map)));
 907
 908         BUILD_BUG_ON(sizeof(format) != 6);
 909         return psb_intel_sdvo_set_value(psb_intel_sdvo,
 910                                     SDVO_CMD_SET_TV_FORMAT,
 911                                     &format, sizeof(format));
 912 }
 913
 914 static bool
 915 psb_intel_sdvo_set_output_timings_from_mode(struct psb_intel_sdvo *psb_intel_sdvo,
 916                                         const struct drm_display_mode *mode)
 917 {
 918         struct psb_intel_sdvo_dtd output_dtd;
 919
 920         if (!psb_intel_sdvo_set_target_output(psb_intel_sdvo,
 921                                           psb_intel_sdvo->attached_output))
 922                 return false;
 923
 924         psb_intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
 925         if (!psb_intel_sdvo_set_output_timing(psb_intel_sdvo, &output_dtd))
 926                 return false;
 927
 928         return true;
 929 }
 930
 931 static bool
 932 psb_intel_sdvo_set_input_timings_for_mode(struct psb_intel_sdvo *psb_intel_sdvo,
 933                                         const struct drm_display_mode *mode,
 934                                         struct drm_display_mode *adjusted_mode)
 935 {
 936         /* Reset the input timing to the screen. Assume always input 0. */
 937         if (!psb_intel_sdvo_set_target_input(psb_intel_sdvo))
 938                 return false;
 939
 940         if (!psb_intel_sdvo_create_preferred_input_timing(psb_intel_sdvo,
 941                                                       mode->clock / 10,
 942                                                       mode->hdisplay,
 943                                                       mode->vdisplay))
 944                 return false;
 945
 946         if (!psb_intel_sdvo_get_preferred_input_timing(psb_intel_sdvo,
 947                                                    &psb_intel_sdvo->input_dtd))
 948                 return false;
 949
 950         psb_intel_sdvo_get_mode_from_dtd(adjusted_mode, &psb_intel_sdvo->input_dtd);
 951
 952         drm_mode_set_crtcinfo(adjusted_mode, 0);
 953         return true;
 954 }
 955
 956 static bool psb_intel_sdvo_mode_fixup(struct drm_encoder *encoder,
 957                                   const struct drm_display_mode *mode,
 958                                   struct drm_display_mode *adjusted_mode)
 959 {
 960         struct psb_intel_sdvo *psb_intel_sdvo = to_psb_intel_sdvo(encoder);
 961         int multiplier;
 962
 963         /* We need to construct preferred input timings based on our
 964          * output timings.  To do that, we have to set the output
 965          * timings, even though this isn't really the right place in
 966          * the sequence to do it. Oh well.
 967          */
 968         if (psb_intel_sdvo->is_tv) {
 969                 if (!psb_intel_sdvo_set_output_timings_from_mode(psb_intel_sdvo, mode))
 970                         return false;
 971
 972                 (void) psb_intel_sdvo_set_input_timings_for_mode(psb_intel_sdvo,
 973                                                              mode,
 974                                                              adjusted_mode);
 975         } else if (psb_intel_sdvo->is_lvds) {
 976                 if (!psb_intel_sdvo_set_output_timings_from_mode(psb_intel_sdvo,
 977                                                              psb_intel_sdvo->sdvo_lvds_fixed_mode))
 978                         return false;
 979
 980                 (void) psb_intel_sdvo_set_input_timings_for_mode(psb_intel_sdvo,
 981                                                              mode,
 982                                                              adjusted_mode);
 983         }
 984
 985         /* Make the CRTC code factor in the SDVO pixel multiplier.  The
 986          * SDVO device will factor out the multiplier during mode_set.
 987          */
 988         multiplier = psb_intel_sdvo_get_pixel_multiplier(adjusted_mode);
 989         psb_intel_mode_set_pixel_multiplier(adjusted_mode, multiplier);
 990
 991         return true;
 992 }
 993
 994 static void psb_intel_sdvo_mode_set(struct drm_encoder *encoder,
 995                                 struct drm_display_mode *mode,
 996                                 struct drm_display_mode *adjusted_mode)
 997 {
 998         struct drm_device *dev = encoder->dev;
 999         struct drm_crtc *crtc = encoder->crtc;
1000         struct gma_crtc *gma_crtc = to_gma_crtc(crtc);
1001         struct psb_intel_sdvo *psb_intel_sdvo = to_psb_intel_sdvo(encoder);
1002         u32 sdvox;
1003         struct psb_intel_sdvo_in_out_map in_out;
1004         struct psb_intel_sdvo_dtd input_dtd;
1005         int pixel_multiplier = psb_intel_mode_get_pixel_multiplier(adjusted_mode);
1006         int rate;
1007         int need_aux = IS_MRST(dev) ? 1 : 0;
1008
1009         if (!mode)
1010                 return;
1011
1012         /* First, set the input mapping for the first input to our controlled
1013          * output. This is only correct if we're a single-input device, in
1014          * which case the first input is the output from the appropriate SDVO
1015          * channel on the motherboard.  In a two-input device, the first input
1016          * will be SDVOB and the second SDVOC.
1017          */
1018         in_out.in0 = psb_intel_sdvo->attached_output;
1019         in_out.in1 = 0;
1020
1021         psb_intel_sdvo_set_value(psb_intel_sdvo,
1022                              SDVO_CMD_SET_IN_OUT_MAP,
1023                              &in_out, sizeof(in_out));
1024
1025         /* Set the output timings to the screen */
1026         if (!psb_intel_sdvo_set_target_output(psb_intel_sdvo,
1027                                           psb_intel_sdvo->attached_output))
1028                 return;
1029
1030         /* We have tried to get input timing in mode_fixup, and filled into
1031          * adjusted_mode.
1032          */
1033         if (psb_intel_sdvo->is_tv || psb_intel_sdvo->is_lvds) {
1034                 input_dtd = psb_intel_sdvo->input_dtd;
1035         } else {
1036                 /* Set the output timing to the screen */
1037                 if (!psb_intel_sdvo_set_target_output(psb_intel_sdvo,
1038                                                   psb_intel_sdvo->attached_output))
1039                         return;
1040
1041                 psb_intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
1042                 (void) psb_intel_sdvo_set_output_timing(psb_intel_sdvo, &input_dtd);
1043         }
1044
1045         /* Set the input timing to the screen. Assume always input 0. */
1046         if (!psb_intel_sdvo_set_target_input(psb_intel_sdvo))
1047                 return;
1048
1049         if (psb_intel_sdvo->has_hdmi_monitor) {
1050                 psb_intel_sdvo_set_encode(psb_intel_sdvo, SDVO_ENCODE_HDMI);
1051                 psb_intel_sdvo_set_colorimetry(psb_intel_sdvo,
1052                                            SDVO_COLORIMETRY_RGB256);
1053                 psb_intel_sdvo_set_avi_infoframe(psb_intel_sdvo);
1054         } else
1055                 psb_intel_sdvo_set_encode(psb_intel_sdvo, SDVO_ENCODE_DVI);
1056
1057         if (psb_intel_sdvo->is_tv &&
1058             !psb_intel_sdvo_set_tv_format(psb_intel_sdvo))
1059                 return;
1060
1061         (void) psb_intel_sdvo_set_input_timing(psb_intel_sdvo, &input_dtd);
1062
1063         switch (pixel_multiplier) {
1064         default:
1065         case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
1066         case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;
1067         case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;
1068         }
1069         if (!psb_intel_sdvo_set_clock_rate_mult(psb_intel_sdvo, rate))
1070                 return;
1071
1072         /* Set the SDVO control regs. */
1073         if (need_aux)
1074                 sdvox = REG_READ_AUX(psb_intel_sdvo->sdvo_reg);
1075         else
1076                 sdvox = REG_READ(psb_intel_sdvo->sdvo_reg);
1077
1078         switch (psb_intel_sdvo->sdvo_reg) {
1079         case SDVOB:
1080                 sdvox &= SDVOB_PRESERVE_MASK;
1081                 break;
1082         case SDVOC:
1083                 sdvox &= SDVOC_PRESERVE_MASK;
1084                 break;
1085         }
1086         sdvox |= (9 << 19) | SDVO_BORDER_ENABLE;
1087
1088         if (gma_crtc->pipe == 1)
1089                 sdvox |= SDVO_PIPE_B_SELECT;
1090         if (psb_intel_sdvo->has_hdmi_audio)
1091                 sdvox |= SDVO_AUDIO_ENABLE;
1092
1093         /* FIXME: Check if this is needed for PSB
1094         sdvox |= (pixel_multiplier - 1) << SDVO_PORT_MULTIPLY_SHIFT;
1095         */
1096
1097         if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL)
1098                 sdvox |= SDVO_STALL_SELECT;
1099         psb_intel_sdvo_write_sdvox(psb_intel_sdvo, sdvox);
1100 }
1101
1102 static void psb_intel_sdvo_dpms(struct drm_encoder *encoder, int mode)
1103 {
1104         struct drm_device *dev = encoder->dev;
1105         struct psb_intel_sdvo *psb_intel_sdvo = to_psb_intel_sdvo(encoder);
1106         u32 temp;
1107         int i;
1108         int need_aux = IS_MRST(dev) ? 1 : 0;
1109
1110         switch (mode) {
1111         case DRM_MODE_DPMS_ON:
1112                 DRM_DEBUG("DPMS_ON");
1113                 break;
1114         case DRM_MODE_DPMS_OFF:
1115                 DRM_DEBUG("DPMS_OFF");
1116                 break;
1117         default:
1118                 DRM_DEBUG("DPMS: %d", mode);
1119         }
1120
1121         if (mode != DRM_MODE_DPMS_ON) {
1122                 psb_intel_sdvo_set_active_outputs(psb_intel_sdvo, 0);
1123                 if (0)
1124                         psb_intel_sdvo_set_encoder_power_state(psb_intel_sdvo, mode);
1125
1126                 if (mode == DRM_MODE_DPMS_OFF) {
1127                         if (need_aux)
1128                                 temp = REG_READ_AUX(psb_intel_sdvo->sdvo_reg);
1129                         else
1130                                 temp = REG_READ(psb_intel_sdvo->sdvo_reg);
1131
1132                         if ((temp & SDVO_ENABLE) != 0) {
1133                                 psb_intel_sdvo_write_sdvox(psb_intel_sdvo, temp & ~SDVO_ENABLE);
1134                         }
1135                 }
1136         } else {
1137                 bool input1, input2;
1138                 u8 status;
1139
1140                 if (need_aux)
1141                         temp = REG_READ_AUX(psb_intel_sdvo->sdvo_reg);
1142                 else
1143                         temp = REG_READ(psb_intel_sdvo->sdvo_reg);
1144
1145                 if ((temp & SDVO_ENABLE) == 0)
1146                         psb_intel_sdvo_write_sdvox(psb_intel_sdvo, temp | SDVO_ENABLE);
1147
1148                 for (i = 0; i < 2; i++)
1149                         gma_wait_for_vblank(dev);
1150
1151                 status = psb_intel_sdvo_get_trained_inputs(psb_intel_sdvo, &input1, &input2);
1152                 /* Warn if the device reported failure to sync.
1153                  * A lot of SDVO devices fail to notify of sync, but it's
1154                  * a given it the status is a success, we succeeded.
1155                  */
1156                 if (status == SDVO_CMD_STATUS_SUCCESS && !input1) {
1157                         DRM_DEBUG_KMS("First %s output reported failure to "
1158                                         "sync\n", SDVO_NAME(psb_intel_sdvo));
1159                 }
1160
1161                 if (0)
1162                         psb_intel_sdvo_set_encoder_power_state(psb_intel_sdvo, mode);
1163                 psb_intel_sdvo_set_active_outputs(psb_intel_sdvo, psb_intel_sdvo->attached_output);
1164         }
1165         return;
1166 }
1167
1168 static enum drm_mode_status psb_intel_sdvo_mode_valid(struct drm_connector *connector,
1169                                  struct drm_display_mode *mode)
1170 {
1171         struct psb_intel_sdvo *psb_intel_sdvo = intel_attached_sdvo(connector);
1172
1173         if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
1174                 return MODE_NO_DBLESCAN;
1175
1176         if (psb_intel_sdvo->pixel_clock_min > mode->clock)
1177                 return MODE_CLOCK_LOW;
1178
1179         if (psb_intel_sdvo->pixel_clock_max < mode->clock)
1180                 return MODE_CLOCK_HIGH;
1181
1182         if (psb_intel_sdvo->is_lvds) {
1183                 if (mode->hdisplay > psb_intel_sdvo->sdvo_lvds_fixed_mode->hdisplay)
1184                         return MODE_PANEL;
1185
1186                 if (mode->vdisplay > psb_intel_sdvo->sdvo_lvds_fixed_mode->vdisplay)
1187                         return MODE_PANEL;
1188         }
1189
1190         return MODE_OK;
1191 }
1192
1193 static bool psb_intel_sdvo_get_capabilities(struct psb_intel_sdvo *psb_intel_sdvo, struct psb_intel_sdvo_caps *caps)
1194 {
1195         BUILD_BUG_ON(sizeof(*caps) != 8);
1196         if (!psb_intel_sdvo_get_value(psb_intel_sdvo,
1197                                   SDVO_CMD_GET_DEVICE_CAPS,
1198                                   caps, sizeof(*caps)))
1199                 return false;
1200
1201         DRM_DEBUG_KMS("SDVO capabilities:\n"
1202                       "  vendor_id: %d\n"
1203                       "  device_id: %d\n"
1204                       "  device_rev_id: %d\n"
1205                       "  sdvo_version_major: %d\n"
1206                       "  sdvo_version_minor: %d\n"
1207                       "  sdvo_inputs_mask: %d\n"
1208                       "  smooth_scaling: %d\n"
1209                       "  sharp_scaling: %d\n"
1210                       "  up_scaling: %d\n"
1211                       "  down_scaling: %d\n"
1212                       "  stall_support: %d\n"
1213                       "  output_flags: %d\n",
1214                       caps->vendor_id,
1215                       caps->device_id,
1216                       caps->device_rev_id,
1217                       caps->sdvo_version_major,
1218                       caps->sdvo_version_minor,
1219                       caps->sdvo_inputs_mask,
1220                       caps->smooth_scaling,
1221                       caps->sharp_scaling,
1222                       caps->up_scaling,
1223                       caps->down_scaling,
1224                       caps->stall_support,
1225                       caps->output_flags);
1226
1227         return true;
1228 }
1229
1230 /* No use! */
1231 #if 0
1232 struct drm_connector* psb_intel_sdvo_find(struct drm_device *dev, int sdvoB)
1233 {
1234         struct drm_connector *connector = NULL;
1235         struct psb_intel_sdvo *iout = NULL;
1236         struct psb_intel_sdvo *sdvo;
1237
1238         /* find the sdvo connector */
1239         list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
1240                 iout = to_psb_intel_sdvo(connector);
1241
1242                 if (iout->type != INTEL_OUTPUT_SDVO)
1243                         continue;
1244
1245                 sdvo = iout->dev_priv;
1246
1247                 if (sdvo->sdvo_reg == SDVOB && sdvoB)
1248                         return connector;
1249
1250                 if (sdvo->sdvo_reg == SDVOC && !sdvoB)
1251                         return connector;
1252
1253         }
1254
1255         return NULL;
1256 }
1257
1258 int psb_intel_sdvo_supports_hotplug(struct drm_connector *connector)
1259 {
1260         u8 response[2];
1261         u8 status;
1262         struct psb_intel_sdvo *psb_intel_sdvo;
1263         DRM_DEBUG_KMS("\n");
1264
1265         if (!connector)
1266                 return 0;
1267
1268         psb_intel_sdvo = to_psb_intel_sdvo(connector);
1269
1270         return psb_intel_sdvo_get_value(psb_intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT,
1271                                     &response, 2) && response[0];
1272 }
1273
1274 void psb_intel_sdvo_set_hotplug(struct drm_connector *connector, int on)
1275 {
1276         u8 response[2];
1277         u8 status;
1278         struct psb_intel_sdvo *psb_intel_sdvo = to_psb_intel_sdvo(connector);
1279
1280         psb_intel_sdvo_write_cmd(psb_intel_sdvo, SDVO_CMD_GET_ACTIVE_HOT_PLUG, NULL, 0);
1281         psb_intel_sdvo_read_response(psb_intel_sdvo, &response, 2);
1282
1283         if (on) {
1284                 psb_intel_sdvo_write_cmd(psb_intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT, NULL, 0);
1285                 status = psb_intel_sdvo_read_response(psb_intel_sdvo, &response, 2);
1286
1287                 psb_intel_sdvo_write_cmd(psb_intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG, &response, 2);
1288         } else {
1289                 response[0] = 0;
1290                 response[1] = 0;
1291                 psb_intel_sdvo_write_cmd(psb_intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG, &response, 2);
1292         }
1293
1294         psb_intel_sdvo_write_cmd(psb_intel_sdvo, SDVO_CMD_GET_ACTIVE_HOT_PLUG, NULL, 0);
1295         psb_intel_sdvo_read_response(psb_intel_sdvo, &response, 2);
1296 }
1297 #endif
1298
1299 static bool
1300 psb_intel_sdvo_multifunc_encoder(struct psb_intel_sdvo *psb_intel_sdvo)
1301 {
1302         /* Is there more than one type of output? */
1303         int caps = psb_intel_sdvo->caps.output_flags & 0xf;
1304         return caps & -caps;
1305 }
1306
1307 static struct edid *
1308 psb_intel_sdvo_get_edid(struct drm_connector *connector)
1309 {
1310         struct psb_intel_sdvo *sdvo = intel_attached_sdvo(connector);
1311         return drm_get_edid(connector, &sdvo->ddc);
1312 }
1313
1314 /* Mac mini hack -- use the same DDC as the analog connector */
1315 static struct edid *
1316 psb_intel_sdvo_get_analog_edid(struct drm_connector *connector)
1317 {
1318         struct drm_psb_private *dev_priv = connector->dev->dev_private;
1319
1320         return drm_get_edid(connector,
1321                             &dev_priv->gmbus[dev_priv->crt_ddc_pin].adapter);
1322 }
1323
1324 static enum drm_connector_status
1325 psb_intel_sdvo_hdmi_sink_detect(struct drm_connector *connector)
1326 {
1327         struct psb_intel_sdvo *psb_intel_sdvo = intel_attached_sdvo(connector);
1328         enum drm_connector_status status;
1329         struct edid *edid;
1330
1331         edid = psb_intel_sdvo_get_edid(connector);
1332
1333         if (edid == NULL && psb_intel_sdvo_multifunc_encoder(psb_intel_sdvo)) {
1334                 u8 ddc, saved_ddc = psb_intel_sdvo->ddc_bus;
1335
1336                 /*
1337                  * Don't use the 1 as the argument of DDC bus switch to get
1338                  * the EDID. It is used for SDVO SPD ROM.
1339                  */
1340                 for (ddc = psb_intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) {
1341                         psb_intel_sdvo->ddc_bus = ddc;
1342                         edid = psb_intel_sdvo_get_edid(connector);
1343                         if (edid)
1344                                 break;
1345                 }
1346                 /*
1347                  * If we found the EDID on the other bus,
1348                  * assume that is the correct DDC bus.
1349                  */
1350                 if (edid == NULL)
1351                         psb_intel_sdvo->ddc_bus = saved_ddc;
1352         }
1353
1354         /*
1355          * When there is no edid and no monitor is connected with VGA
1356          * port, try to use the CRT ddc to read the EDID for DVI-connector.
1357          */
1358         if (edid == NULL)
1359                 edid = psb_intel_sdvo_get_analog_edid(connector);
1360
1361         status = connector_status_unknown;
1362         if (edid != NULL) {
1363                 /* DDC bus is shared, match EDID to connector type */
1364                 if (edid->input & DRM_EDID_INPUT_DIGITAL) {
1365                         status = connector_status_connected;
1366                         if (psb_intel_sdvo->is_hdmi) {
1367                                 psb_intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid);
1368                                 psb_intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid);
1369                         }
1370                 } else
1371                         status = connector_status_disconnected;
1372                 kfree(edid);
1373         }
1374
1375         if (status == connector_status_connected) {
1376                 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector = to_psb_intel_sdvo_connector(connector);
1377                 if (psb_intel_sdvo_connector->force_audio)
1378                         psb_intel_sdvo->has_hdmi_audio = psb_intel_sdvo_connector->force_audio > 0;
1379         }
1380
1381         return status;
1382 }
1383
1384 static enum drm_connector_status
1385 psb_intel_sdvo_detect(struct drm_connector *connector, bool force)
1386 {
1387         uint16_t response;
1388         struct psb_intel_sdvo *psb_intel_sdvo = intel_attached_sdvo(connector);
1389         struct psb_intel_sdvo_connector *psb_intel_sdvo_connector = to_psb_intel_sdvo_connector(connector);
1390         enum drm_connector_status ret;
1391
1392         if (!psb_intel_sdvo_write_cmd(psb_intel_sdvo,
1393                                   SDVO_CMD_GET_ATTACHED_DISPLAYS, NULL, 0))
1394                 return connector_status_unknown;
1395
1396         /* add 30ms delay when the output type might be TV */
1397         if (psb_intel_sdvo->caps.output_flags &
1398             (SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_CVBS0))
1399                 mdelay(30);
1400
1401         if (!psb_intel_sdvo_read_response(psb_intel_sdvo, &response, 2))
1402                 return connector_status_unknown;
1403
1404         DRM_DEBUG_KMS("SDVO response %d %d [%x]\n",
1405                       response & 0xff, response >> 8,
1406                       psb_intel_sdvo_connector->output_flag);
1407
1408         if (response == 0)
1409                 return connector_status_disconnected;
1410
1411         psb_intel_sdvo->attached_output = response;
1412
1413         psb_intel_sdvo->has_hdmi_monitor = false;
1414         psb_intel_sdvo->has_hdmi_audio = false;
1415
1416         if ((psb_intel_sdvo_connector->output_flag & response) == 0)
1417                 ret = connector_status_disconnected;
1418         else if (IS_TMDS(psb_intel_sdvo_connector))
1419                 ret = psb_intel_sdvo_hdmi_sink_detect(connector);
1420         else {
1421                 struct edid *edid;
1422
1423                 /* if we have an edid check it matches the connection */
1424                 edid = psb_intel_sdvo_get_edid(connector);
1425                 if (edid == NULL)
1426                         edid = psb_intel_sdvo_get_analog_edid(connector);
1427                 if (edid != NULL) {
1428                         if (edid->input & DRM_EDID_INPUT_DIGITAL)
1429                                 ret = connector_status_disconnected;
1430                         else
1431                                 ret = connector_status_connected;
1432                         kfree(edid);
1433                 } else
1434                         ret = connector_status_connected;
1435         }
1436
1437         /* May update encoder flag for like clock for SDVO TV, etc.*/
1438         if (ret == connector_status_connected) {
1439                 psb_intel_sdvo->is_tv = false;
1440                 psb_intel_sdvo->is_lvds = false;
1441                 psb_intel_sdvo->base.needs_tv_clock = false;
1442
1443                 if (response & SDVO_TV_MASK) {
1444                         psb_intel_sdvo->is_tv = true;
1445                         psb_intel_sdvo->base.needs_tv_clock = true;
1446                 }
1447                 if (response & SDVO_LVDS_MASK)
1448                         psb_intel_sdvo->is_lvds = psb_intel_sdvo->sdvo_lvds_fixed_mode != NULL;
1449         }
1450
1451         return ret;
1452 }
1453
1454 static void psb_intel_sdvo_get_ddc_modes(struct drm_connector *connector)
1455 {
1456         struct edid *edid;
1457
1458         /* set the bus switch and get the modes */
1459         edid = psb_intel_sdvo_get_edid(connector);
1460
1461         /*
1462          * Mac mini hack.  On this device, the DVI-I connector shares one DDC
1463          * link between analog and digital outputs. So, if the regular SDVO
1464          * DDC fails, check to see if the analog output is disconnected, in
1465          * which case we'll look there for the digital DDC data.
1466          */
1467         if (edid == NULL)
1468                 edid = psb_intel_sdvo_get_analog_edid(connector);
1469
1470         if (edid != NULL) {
1471                 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector = to_psb_intel_sdvo_connector(connector);
1472                 bool monitor_is_digital = !!(edid->input & DRM_EDID_INPUT_DIGITAL);
1473                 bool connector_is_digital = !!IS_TMDS(psb_intel_sdvo_connector);
1474
1475                 if (connector_is_digital == monitor_is_digital) {
1476                         drm_connector_update_edid_property(connector, edid);
1477                         drm_add_edid_modes(connector, edid);
1478                 }
1479
1480                 kfree(edid);
1481         }
1482 }
1483
1484 /*
1485  * Set of SDVO TV modes.
1486  * Note!  This is in reply order (see loop in get_tv_modes).
1487  * XXX: all 60Hz refresh?
1488  */
1489 static const struct drm_display_mode sdvo_tv_modes[] = {
1490         { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384,
1491                    416, 0, 200, 201, 232, 233, 0,
1492                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1493         { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384,
1494                    416, 0, 240, 241, 272, 273, 0,
1495                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1496         { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464,
1497                    496, 0, 300, 301, 332, 333, 0,
1498                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1499         { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704,
1500                    736, 0, 350, 351, 382, 383, 0,
1501                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1502         { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704,
1503                    736, 0, 400, 401, 432, 433, 0,
1504                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1505         { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704,
1506                    736, 0, 480, 481, 512, 513, 0,
1507                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1508         { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768,
1509                    800, 0, 480, 481, 512, 513, 0,
1510                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1511         { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768,
1512                    800, 0, 576, 577, 608, 609, 0,
1513                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1514         { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784,
1515                    816, 0, 350, 351, 382, 383, 0,
1516                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1517         { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784,
1518                    816, 0, 400, 401, 432, 433, 0,
1519                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1520         { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784,
1521                    816, 0, 480, 481, 512, 513, 0,
1522                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1523         { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784,
1524                    816, 0, 540, 541, 572, 573, 0,
1525                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1526         { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784,
1527                    816, 0, 576, 577, 608, 609, 0,
1528                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1529         { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832,
1530                    864, 0, 576, 577, 608, 609, 0,
1531                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1532         { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864,
1533                    896, 0, 600, 601, 632, 633, 0,
1534                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1535         { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896,
1536                    928, 0, 624, 625, 656, 657, 0,
1537                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1538         { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984,
1539                    1016, 0, 766, 767, 798, 799, 0,
1540                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1541         { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088,
1542                    1120, 0, 768, 769, 800, 801, 0,
1543                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1544         { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344,
1545                    1376, 0, 1024, 1025, 1056, 1057, 0,
1546                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1547 };
1548
1549 static void psb_intel_sdvo_get_tv_modes(struct drm_connector *connector)
1550 {
1551         struct psb_intel_sdvo *psb_intel_sdvo = intel_attached_sdvo(connector);
1552         struct psb_intel_sdvo_sdtv_resolution_request tv_res;
1553         uint32_t reply = 0, format_map = 0;
1554         int i;
1555
1556         /* Read the list of supported input resolutions for the selected TV
1557          * format.
1558          */
1559         format_map = 1 << psb_intel_sdvo->tv_format_index;
1560         memcpy(&tv_res, &format_map,
1561                min(sizeof(format_map), sizeof(struct psb_intel_sdvo_sdtv_resolution_request)));
1562
1563         if (!psb_intel_sdvo_set_target_output(psb_intel_sdvo, psb_intel_sdvo->attached_output))
1564                 return;
1565
1566         BUILD_BUG_ON(sizeof(tv_res) != 3);
1567         if (!psb_intel_sdvo_write_cmd(psb_intel_sdvo,
1568                                   SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT,
1569                                   &tv_res, sizeof(tv_res)))
1570                 return;
1571         if (!psb_intel_sdvo_read_response(psb_intel_sdvo, &reply, 3))
1572                 return;
1573
1574         for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++)
1575                 if (reply & (1 << i)) {
1576                         struct drm_display_mode *nmode;
1577                         nmode = drm_mode_duplicate(connector->dev,
1578                                                    &sdvo_tv_modes[i]);
1579                         if (nmode)
1580                                 drm_mode_probed_add(connector, nmode);
1581                 }
1582 }
1583
1584 static void psb_intel_sdvo_get_lvds_modes(struct drm_connector *connector)
1585 {
1586         struct psb_intel_sdvo *psb_intel_sdvo = intel_attached_sdvo(connector);
1587         struct drm_psb_private *dev_priv = connector->dev->dev_private;
1588         struct drm_display_mode *newmode;
1589
1590         /*
1591          * Attempt to get the mode list from DDC.
1592          * Assume that the preferred modes are
1593          * arranged in priority order.
1594          */
1595         psb_intel_ddc_get_modes(connector, psb_intel_sdvo->i2c);
1596         if (list_empty(&connector->probed_modes) == false)
1597                 goto end;
1598
1599         /* Fetch modes from VBT */
1600         if (dev_priv->sdvo_lvds_vbt_mode != NULL) {
1601                 newmode = drm_mode_duplicate(connector->dev,
1602                                              dev_priv->sdvo_lvds_vbt_mode);
1603                 if (newmode != NULL) {
1604                         /* Guarantee the mode is preferred */
1605                         newmode->type = (DRM_MODE_TYPE_PREFERRED |
1606                                          DRM_MODE_TYPE_DRIVER);
1607                         drm_mode_probed_add(connector, newmode);
1608                 }
1609         }
1610
1611 end:
1612         list_for_each_entry(newmode, &connector->probed_modes, head) {
1613                 if (newmode->type & DRM_MODE_TYPE_PREFERRED) {
1614                         psb_intel_sdvo->sdvo_lvds_fixed_mode =
1615                                 drm_mode_duplicate(connector->dev, newmode);
1616
1617                         drm_mode_set_crtcinfo(psb_intel_sdvo->sdvo_lvds_fixed_mode,
1618                                               0);
1619
1620                         psb_intel_sdvo->is_lvds = true;
1621                         break;
1622                 }
1623         }
1624
1625 }
1626
1627 static int psb_intel_sdvo_get_modes(struct drm_connector *connector)
1628 {
1629         struct psb_intel_sdvo_connector *psb_intel_sdvo_connector = to_psb_intel_sdvo_connector(connector);
1630
1631         if (IS_TV(psb_intel_sdvo_connector))
1632                 psb_intel_sdvo_get_tv_modes(connector);
1633         else if (IS_LVDS(psb_intel_sdvo_connector))
1634                 psb_intel_sdvo_get_lvds_modes(connector);
1635         else
1636                 psb_intel_sdvo_get_ddc_modes(connector);
1637
1638         return !list_empty(&connector->probed_modes);
1639 }
1640
1641 static void psb_intel_sdvo_destroy(struct drm_connector *connector)
1642 {
1643         drm_connector_unregister(connector);
1644         drm_connector_cleanup(connector);
1645         kfree(connector);
1646 }
1647
1648 static bool psb_intel_sdvo_detect_hdmi_audio(struct drm_connector *connector)
1649 {
1650         struct psb_intel_sdvo *psb_intel_sdvo = intel_attached_sdvo(connector);
1651         struct edid *edid;
1652         bool has_audio = false;
1653
1654         if (!psb_intel_sdvo->is_hdmi)
1655                 return false;
1656
1657         edid = psb_intel_sdvo_get_edid(connector);
1658         if (edid != NULL && edid->input & DRM_EDID_INPUT_DIGITAL)
1659                 has_audio = drm_detect_monitor_audio(edid);
1660
1661         return has_audio;
1662 }
1663
1664 static int
1665 psb_intel_sdvo_set_property(struct drm_connector *connector,
1666                         struct drm_property *property,
1667                         uint64_t val)
1668 {
1669         struct psb_intel_sdvo *psb_intel_sdvo = intel_attached_sdvo(connector);
1670         struct psb_intel_sdvo_connector *psb_intel_sdvo_connector = to_psb_intel_sdvo_connector(connector);
1671         struct drm_psb_private *dev_priv = connector->dev->dev_private;
1672         uint16_t temp_value;
1673         uint8_t cmd;
1674         int ret;
1675
1676         ret = drm_object_property_set_value(&connector->base, property, val);
1677         if (ret)
1678                 return ret;
1679
1680         if (property == dev_priv->force_audio_property) {
1681                 int i = val;
1682                 bool has_audio;
1683
1684                 if (i == psb_intel_sdvo_connector->force_audio)
1685                         return 0;
1686
1687                 psb_intel_sdvo_connector->force_audio = i;
1688
1689                 if (i == 0)
1690                         has_audio = psb_intel_sdvo_detect_hdmi_audio(connector);
1691                 else
1692                         has_audio = i > 0;
1693
1694                 if (has_audio == psb_intel_sdvo->has_hdmi_audio)
1695                         return 0;
1696
1697                 psb_intel_sdvo->has_hdmi_audio = has_audio;
1698                 goto done;
1699         }
1700
1701         if (property == dev_priv->broadcast_rgb_property) {
1702                 if (val == !!psb_intel_sdvo->color_range)
1703                         return 0;
1704
1705                 psb_intel_sdvo->color_range = val ? SDVO_COLOR_RANGE_16_235 : 0;
1706                 goto done;
1707         }
1708
1709 #define CHECK_PROPERTY(name, NAME) \
1710         if (psb_intel_sdvo_connector->name == property) { \
1711                 if (psb_intel_sdvo_connector->cur_##name == temp_value) return 0; \
1712                 if (psb_intel_sdvo_connector->max_##name < temp_value) return -EINVAL; \
1713                 cmd = SDVO_CMD_SET_##NAME; \
1714                 psb_intel_sdvo_connector->cur_##name = temp_value; \
1715                 goto set_value; \
1716         }
1717
1718         if (property == psb_intel_sdvo_connector->tv_format) {
1719                 if (val >= ARRAY_SIZE(tv_format_names))
1720                         return -EINVAL;
1721
1722                 if (psb_intel_sdvo->tv_format_index ==
1723                     psb_intel_sdvo_connector->tv_format_supported[val])
1724                         return 0;
1725
1726                 psb_intel_sdvo->tv_format_index = psb_intel_sdvo_connector->tv_format_supported[val];
1727                 goto done;
1728         } else if (IS_TV_OR_LVDS(psb_intel_sdvo_connector)) {
1729                 temp_value = val;
1730                 if (psb_intel_sdvo_connector->left == property) {
1731                         drm_object_property_set_value(&connector->base,
1732                                                          psb_intel_sdvo_connector->right, val);
1733                         if (psb_intel_sdvo_connector->left_margin == temp_value)
1734                                 return 0;
1735
1736                         psb_intel_sdvo_connector->left_margin = temp_value;
1737                         psb_intel_sdvo_connector->right_margin = temp_value;
1738                         temp_value = psb_intel_sdvo_connector->max_hscan -
1739                                 psb_intel_sdvo_connector->left_margin;
1740                         cmd = SDVO_CMD_SET_OVERSCAN_H;
1741                         goto set_value;
1742                 } else if (psb_intel_sdvo_connector->right == property) {
1743                         drm_object_property_set_value(&connector->base,
1744                                                          psb_intel_sdvo_connector->left, val);
1745                         if (psb_intel_sdvo_connector->right_margin == temp_value)
1746                                 return 0;
1747
1748                         psb_intel_sdvo_connector->left_margin = temp_value;
1749                         psb_intel_sdvo_connector->right_margin = temp_value;
1750                         temp_value = psb_intel_sdvo_connector->max_hscan -
1751                                 psb_intel_sdvo_connector->left_margin;
1752                         cmd = SDVO_CMD_SET_OVERSCAN_H;
1753                         goto set_value;
1754                 } else if (psb_intel_sdvo_connector->top == property) {
1755                         drm_object_property_set_value(&connector->base,
1756                                                          psb_intel_sdvo_connector->bottom, val);
1757                         if (psb_intel_sdvo_connector->top_margin == temp_value)
1758                                 return 0;
1759
1760                         psb_intel_sdvo_connector->top_margin = temp_value;
1761                         psb_intel_sdvo_connector->bottom_margin = temp_value;
1762                         temp_value = psb_intel_sdvo_connector->max_vscan -
1763                                 psb_intel_sdvo_connector->top_margin;
1764                         cmd = SDVO_CMD_SET_OVERSCAN_V;
1765                         goto set_value;
1766                 } else if (psb_intel_sdvo_connector->bottom == property) {
1767                         drm_object_property_set_value(&connector->base,
1768                                                          psb_intel_sdvo_connector->top, val);
1769                         if (psb_intel_sdvo_connector->bottom_margin == temp_value)
1770                                 return 0;
1771
1772                         psb_intel_sdvo_connector->top_margin = temp_value;
1773                         psb_intel_sdvo_connector->bottom_margin = temp_value;
1774                         temp_value = psb_intel_sdvo_connector->max_vscan -
1775                                 psb_intel_sdvo_connector->top_margin;
1776                         cmd = SDVO_CMD_SET_OVERSCAN_V;
1777                         goto set_value;
1778                 }
1779                 CHECK_PROPERTY(hpos, HPOS)
1780                 CHECK_PROPERTY(vpos, VPOS)
1781                 CHECK_PROPERTY(saturation, SATURATION)
1782                 CHECK_PROPERTY(contrast, CONTRAST)
1783                 CHECK_PROPERTY(hue, HUE)
1784                 CHECK_PROPERTY(brightness, BRIGHTNESS)
1785                 CHECK_PROPERTY(sharpness, SHARPNESS)
1786                 CHECK_PROPERTY(flicker_filter, FLICKER_FILTER)
1787                 CHECK_PROPERTY(flicker_filter_2d, FLICKER_FILTER_2D)
1788                 CHECK_PROPERTY(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE)
1789                 CHECK_PROPERTY(tv_chroma_filter, TV_CHROMA_FILTER)
1790                 CHECK_PROPERTY(tv_luma_filter, TV_LUMA_FILTER)
1791                 CHECK_PROPERTY(dot_crawl, DOT_CRAWL)
1792         }
1793
1794         return -EINVAL; /* unknown property */
1795
1796 set_value:
1797         if (!psb_intel_sdvo_set_value(psb_intel_sdvo, cmd, &temp_value, 2))
1798                 return -EIO;
1799
1800
1801 done:
1802         if (psb_intel_sdvo->base.base.crtc) {
1803                 struct drm_crtc *crtc = psb_intel_sdvo->base.base.crtc;
1804                 drm_crtc_helper_set_mode(crtc, &crtc->mode, crtc->x,
1805                                          crtc->y, crtc->primary->fb);
1806         }
1807
1808         return 0;
1809 #undef CHECK_PROPERTY
1810 }
1811
1812 static void psb_intel_sdvo_save(struct drm_connector *connector)
1813 {
1814         struct drm_device *dev = connector->dev;
1815         struct gma_encoder *gma_encoder = gma_attached_encoder(connector);
1816         struct psb_intel_sdvo *sdvo = to_psb_intel_sdvo(&gma_encoder->base);
1817
1818         sdvo->saveSDVO = REG_READ(sdvo->sdvo_reg);
1819 }
1820
1821 static void psb_intel_sdvo_restore(struct drm_connector *connector)
1822 {
1823         struct drm_device *dev = connector->dev;
1824         struct drm_encoder *encoder = &gma_attached_encoder(connector)->base;
1825         struct psb_intel_sdvo *sdvo = to_psb_intel_sdvo(encoder);
1826         struct drm_crtc *crtc = encoder->crtc;
1827
1828         REG_WRITE(sdvo->sdvo_reg, sdvo->saveSDVO);
1829
1830         /* Force a full mode set on the crtc. We're supposed to have the
1831            mode_config lock already. */
1832         if (connector->status == connector_status_connected)
1833                 drm_crtc_helper_set_mode(crtc, &crtc->mode, crtc->x, crtc->y,
1834                                          NULL);
1835 }
1836
1837 static const struct drm_encoder_helper_funcs psb_intel_sdvo_helper_funcs = {
1838         .dpms = psb_intel_sdvo_dpms,
1839         .mode_fixup = psb_intel_sdvo_mode_fixup,
1840         .prepare = gma_encoder_prepare,
1841         .mode_set = psb_intel_sdvo_mode_set,
1842         .commit = gma_encoder_commit,
1843 };
1844
1845 static const struct drm_connector_funcs psb_intel_sdvo_connector_funcs = {
1846         .dpms = drm_helper_connector_dpms,
1847         .detect = psb_intel_sdvo_detect,
1848         .fill_modes = drm_helper_probe_single_connector_modes,
1849         .set_property = psb_intel_sdvo_set_property,
1850         .destroy = psb_intel_sdvo_destroy,
1851 };
1852
1853 static const struct drm_connector_helper_funcs psb_intel_sdvo_connector_helper_funcs = {
1854         .get_modes = psb_intel_sdvo_get_modes,
1855         .mode_valid = psb_intel_sdvo_mode_valid,
1856         .best_encoder = gma_best_encoder,
1857 };
1858
1859 static void psb_intel_sdvo_enc_destroy(struct drm_encoder *encoder)
1860 {
1861         struct psb_intel_sdvo *psb_intel_sdvo = to_psb_intel_sdvo(encoder);
1862
1863         if (psb_intel_sdvo->sdvo_lvds_fixed_mode != NULL)
1864                 drm_mode_destroy(encoder->dev,
1865                                  psb_intel_sdvo->sdvo_lvds_fixed_mode);
1866
1867         i2c_del_adapter(&psb_intel_sdvo->ddc);
1868         gma_encoder_destroy(encoder);
1869 }
1870
1871 static const struct drm_encoder_funcs psb_intel_sdvo_enc_funcs = {
1872         .destroy = psb_intel_sdvo_enc_destroy,
1873 };
1874
1875 static void
1876 psb_intel_sdvo_guess_ddc_bus(struct psb_intel_sdvo *sdvo)
1877 {
1878         /* FIXME: At the moment, ddc_bus = 2 is the only thing that works.
1879          * We need to figure out if this is true for all available poulsbo
1880          * hardware, or if we need to fiddle with the guessing code above.
1881          * The problem might go away if we can parse sdvo mappings from bios */
1882         sdvo->ddc_bus = 2;
1883
1884 #if 0
1885         uint16_t mask = 0;
1886         unsigned int num_bits;
1887
1888         /* Make a mask of outputs less than or equal to our own priority in the
1889          * list.
1890          */
1891         switch (sdvo->controlled_output) {
1892         case SDVO_OUTPUT_LVDS1:
1893                 mask |= SDVO_OUTPUT_LVDS1;
1894         case SDVO_OUTPUT_LVDS0:
1895                 mask |= SDVO_OUTPUT_LVDS0;
1896         case SDVO_OUTPUT_TMDS1:
1897                 mask |= SDVO_OUTPUT_TMDS1;
1898         case SDVO_OUTPUT_TMDS0:
1899                 mask |= SDVO_OUTPUT_TMDS0;
1900         case SDVO_OUTPUT_RGB1:
1901                 mask |= SDVO_OUTPUT_RGB1;
1902         case SDVO_OUTPUT_RGB0:
1903                 mask |= SDVO_OUTPUT_RGB0;
1904                 break;
1905         }
1906
1907         /* Count bits to find what number we are in the priority list. */
1908         mask &= sdvo->caps.output_flags;
1909         num_bits = hweight16(mask);
1910         /* If more than 3 outputs, default to DDC bus 3 for now. */
1911         if (num_bits > 3)
1912                 num_bits = 3;
1913
1914         /* Corresponds to SDVO_CONTROL_BUS_DDCx */
1915         sdvo->ddc_bus = 1 << num_bits;
1916 #endif
1917 }
1918
1919 /**
1920  * Choose the appropriate DDC bus for control bus switch command for this
1921  * SDVO output based on the controlled output.
1922  *
1923  * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
1924  * outputs, then LVDS outputs.
1925  */
1926 static void
1927 psb_intel_sdvo_select_ddc_bus(struct drm_psb_private *dev_priv,
1928                           struct psb_intel_sdvo *sdvo, u32 reg)
1929 {
1930         struct sdvo_device_mapping *mapping;
1931
1932         if (IS_SDVOB(reg))
1933                 mapping = &(dev_priv->sdvo_mappings[0]);
1934         else
1935                 mapping = &(dev_priv->sdvo_mappings[1]);
1936
1937         if (mapping->initialized)
1938                 sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4);
1939         else
1940                 psb_intel_sdvo_guess_ddc_bus(sdvo);
1941 }
1942
1943 static void
1944 psb_intel_sdvo_select_i2c_bus(struct drm_psb_private *dev_priv,
1945                           struct psb_intel_sdvo *sdvo, u32 reg)
1946 {
1947         struct sdvo_device_mapping *mapping;
1948         u8 pin, speed;
1949
1950         if (IS_SDVOB(reg))
1951                 mapping = &dev_priv->sdvo_mappings[0];
1952         else
1953                 mapping = &dev_priv->sdvo_mappings[1];
1954
1955         pin = GMBUS_PORT_DPB;
1956         speed = GMBUS_RATE_1MHZ >> 8;
1957         if (mapping->initialized) {
1958                 pin = mapping->i2c_pin;
1959                 speed = mapping->i2c_speed;
1960         }
1961
1962         if (pin < GMBUS_NUM_PORTS) {
1963                 sdvo->i2c = &dev_priv->gmbus[pin].adapter;
1964                 gma_intel_gmbus_set_speed(sdvo->i2c, speed);
1965                 gma_intel_gmbus_force_bit(sdvo->i2c, true);
1966         } else
1967                 sdvo->i2c = &dev_priv->gmbus[GMBUS_PORT_DPB].adapter;
1968 }
1969
1970 static bool
1971 psb_intel_sdvo_is_hdmi_connector(struct psb_intel_sdvo *psb_intel_sdvo, int device)
1972 {
1973         return psb_intel_sdvo_check_supp_encode(psb_intel_sdvo);
1974 }
1975
1976 static u8
1977 psb_intel_sdvo_get_slave_addr(struct drm_device *dev, int sdvo_reg)
1978 {
1979         struct drm_psb_private *dev_priv = dev->dev_private;
1980         struct sdvo_device_mapping *my_mapping, *other_mapping;
1981
1982         if (IS_SDVOB(sdvo_reg)) {
1983                 my_mapping = &dev_priv->sdvo_mappings[0];
1984                 other_mapping = &dev_priv->sdvo_mappings[1];
1985         } else {
1986                 my_mapping = &dev_priv->sdvo_mappings[1];
1987                 other_mapping = &dev_priv->sdvo_mappings[0];
1988         }
1989
1990         /* If the BIOS described our SDVO device, take advantage of it. */
1991         if (my_mapping->slave_addr)
1992                 return my_mapping->slave_addr;
1993
1994         /* If the BIOS only described a different SDVO device, use the
1995          * address that it isn't using.
1996          */
1997         if (other_mapping->slave_addr) {
1998                 if (other_mapping->slave_addr == 0x70)
1999                         return 0x72;
2000                 else
2001                         return 0x70;
2002         }
2003
2004         /* No SDVO device info is found for another DVO port,
2005          * so use mapping assumption we had before BIOS parsing.
2006          */
2007         if (IS_SDVOB(sdvo_reg))
2008                 return 0x70;
2009         else
2010                 return 0x72;
2011 }
2012
2013 static void
2014 psb_intel_sdvo_connector_init(struct psb_intel_sdvo_connector *connector,
2015                           struct psb_intel_sdvo *encoder)
2016 {
2017         drm_connector_init(encoder->base.base.dev,
2018                            &connector->base.base,
2019                            &psb_intel_sdvo_connector_funcs,
2020                            connector->base.base.connector_type);
2021
2022         drm_connector_helper_add(&connector->base.base,
2023                                  &psb_intel_sdvo_connector_helper_funcs);
2024
2025         connector->base.base.interlace_allowed = 0;
2026         connector->base.base.doublescan_allowed = 0;
2027         connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB;
2028
2029         connector->base.save = psb_intel_sdvo_save;
2030         connector->base.restore = psb_intel_sdvo_restore;
2031
2032         gma_connector_attach_encoder(&connector->base, &encoder->base);
2033         drm_connector_register(&connector->base.base);
2034 }
2035
2036 static void
2037 psb_intel_sdvo_add_hdmi_properties(struct psb_intel_sdvo_connector *connector)
2038 {
2039         /* FIXME: We don't support HDMI at the moment
2040         struct drm_device *dev = connector->base.base.dev;
2041
2042         intel_attach_force_audio_property(&connector->base.base);
2043         intel_attach_broadcast_rgb_property(&connector->base.base);
2044         */
2045 }
2046
2047 static bool
2048 psb_intel_sdvo_dvi_init(struct psb_intel_sdvo *psb_intel_sdvo, int device)
2049 {
2050         struct drm_encoder *encoder = &psb_intel_sdvo->base.base;
2051         struct drm_connector *connector;
2052         struct gma_connector *intel_connector;
2053         struct psb_intel_sdvo_connector *psb_intel_sdvo_connector;
2054
2055         psb_intel_sdvo_connector = kzalloc(sizeof(struct psb_intel_sdvo_connector), GFP_KERNEL);
2056         if (!psb_intel_sdvo_connector)
2057                 return false;
2058
2059         if (device == 0) {
2060                 psb_intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0;
2061                 psb_intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0;
2062         } else if (device == 1) {
2063                 psb_intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1;
2064                 psb_intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1;
2065         }
2066
2067         intel_connector = &psb_intel_sdvo_connector->base;
2068         connector = &intel_connector->base;
2069         // connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT;
2070         encoder->encoder_type = DRM_MODE_ENCODER_TMDS;
2071         connector->connector_type = DRM_MODE_CONNECTOR_DVID;
2072
2073         if (psb_intel_sdvo_is_hdmi_connector(psb_intel_sdvo, device)) {
2074                 connector->connector_type = DRM_MODE_CONNECTOR_HDMIA;
2075                 psb_intel_sdvo->is_hdmi = true;
2076         }
2077         psb_intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
2078                                        (1 << INTEL_ANALOG_CLONE_BIT));
2079
2080         psb_intel_sdvo_connector_init(psb_intel_sdvo_connector, psb_intel_sdvo);
2081         if (psb_intel_sdvo->is_hdmi)
2082                 psb_intel_sdvo_add_hdmi_properties(psb_intel_sdvo_connector);
2083
2084         return true;
2085 }
2086
2087 static bool
2088 psb_intel_sdvo_tv_init(struct psb_intel_sdvo *psb_intel_sdvo, int type)
2089 {
2090         struct drm_encoder *encoder = &psb_intel_sdvo->base.base;
2091         struct drm_connector *connector;
2092         struct gma_connector *intel_connector;
2093         struct psb_intel_sdvo_connector *psb_intel_sdvo_connector;
2094
2095         psb_intel_sdvo_connector = kzalloc(sizeof(struct psb_intel_sdvo_connector), GFP_KERNEL);
2096         if (!psb_intel_sdvo_connector)
2097                 return false;
2098
2099         intel_connector = &psb_intel_sdvo_connector->base;
2100         connector = &intel_connector->base;
2101         encoder->encoder_type = DRM_MODE_ENCODER_TVDAC;
2102         connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO;
2103
2104         psb_intel_sdvo->controlled_output |= type;
2105         psb_intel_sdvo_connector->output_flag = type;
2106
2107         psb_intel_sdvo->is_tv = true;
2108         psb_intel_sdvo->base.needs_tv_clock = true;
2109         psb_intel_sdvo->base.clone_mask = 1 << INTEL_SDVO_TV_CLONE_BIT;
2110
2111         psb_intel_sdvo_connector_init(psb_intel_sdvo_connector, psb_intel_sdvo);
2112
2113         if (!psb_intel_sdvo_tv_create_property(psb_intel_sdvo, psb_intel_sdvo_connector, type))
2114                 goto err;
2115
2116         if (!psb_intel_sdvo_create_enhance_property(psb_intel_sdvo, psb_intel_sdvo_connector))
2117                 goto err;
2118
2119         return true;
2120
2121 err:
2122         psb_intel_sdvo_destroy(connector);
2123         return false;
2124 }
2125
2126 static bool
2127 psb_intel_sdvo_analog_init(struct psb_intel_sdvo *psb_intel_sdvo, int device)
2128 {
2129         struct drm_encoder *encoder = &psb_intel_sdvo->base.base;
2130         struct drm_connector *connector;
2131         struct gma_connector *intel_connector;
2132         struct psb_intel_sdvo_connector *psb_intel_sdvo_connector;
2133
2134         psb_intel_sdvo_connector = kzalloc(sizeof(struct psb_intel_sdvo_connector), GFP_KERNEL);
2135         if (!psb_intel_sdvo_connector)
2136                 return false;
2137
2138         intel_connector = &psb_intel_sdvo_connector->base;
2139         connector = &intel_connector->base;
2140         connector->polled = DRM_CONNECTOR_POLL_CONNECT;
2141         encoder->encoder_type = DRM_MODE_ENCODER_DAC;
2142         connector->connector_type = DRM_MODE_CONNECTOR_VGA;
2143
2144         if (device == 0) {
2145                 psb_intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0;
2146                 psb_intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0;
2147         } else if (device == 1) {
2148                 psb_intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1;
2149                 psb_intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1;
2150         }
2151
2152         psb_intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
2153                                        (1 << INTEL_ANALOG_CLONE_BIT));
2154
2155         psb_intel_sdvo_connector_init(psb_intel_sdvo_connector,
2156                                   psb_intel_sdvo);
2157         return true;
2158 }
2159
2160 static bool
2161 psb_intel_sdvo_lvds_init(struct psb_intel_sdvo *psb_intel_sdvo, int device)
2162 {
2163         struct drm_encoder *encoder = &psb_intel_sdvo->base.base;
2164         struct drm_connector *connector;
2165         struct gma_connector *intel_connector;
2166         struct psb_intel_sdvo_connector *psb_intel_sdvo_connector;
2167
2168         psb_intel_sdvo_connector = kzalloc(sizeof(struct psb_intel_sdvo_connector), GFP_KERNEL);
2169         if (!psb_intel_sdvo_connector)
2170                 return false;
2171
2172         intel_connector = &psb_intel_sdvo_connector->base;
2173         connector = &intel_connector->base;
2174         encoder->encoder_type = DRM_MODE_ENCODER_LVDS;
2175         connector->connector_type = DRM_MODE_CONNECTOR_LVDS;
2176
2177         if (device == 0) {
2178                 psb_intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0;
2179                 psb_intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0;
2180         } else if (device == 1) {
2181                 psb_intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1;
2182                 psb_intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1;
2183         }
2184
2185         psb_intel_sdvo->base.clone_mask = ((1 << INTEL_ANALOG_CLONE_BIT) |
2186                                        (1 << INTEL_SDVO_LVDS_CLONE_BIT));
2187
2188         psb_intel_sdvo_connector_init(psb_intel_sdvo_connector, psb_intel_sdvo);
2189         if (!psb_intel_sdvo_create_enhance_property(psb_intel_sdvo, psb_intel_sdvo_connector))
2190                 goto err;
2191
2192         return true;
2193
2194 err:
2195         psb_intel_sdvo_destroy(connector);
2196         return false;
2197 }
2198
2199 static bool
2200 psb_intel_sdvo_output_setup(struct psb_intel_sdvo *psb_intel_sdvo, uint16_t flags)
2201 {
2202         psb_intel_sdvo->is_tv = false;
2203         psb_intel_sdvo->base.needs_tv_clock = false;
2204         psb_intel_sdvo->is_lvds = false;
2205
2206         /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
2207
2208         if (flags & SDVO_OUTPUT_TMDS0)
2209                 if (!psb_intel_sdvo_dvi_init(psb_intel_sdvo, 0))
2210                         return false;
2211
2212         if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK)
2213                 if (!psb_intel_sdvo_dvi_init(psb_intel_sdvo, 1))
2214                         return false;
2215
2216         /* TV has no XXX1 function block */
2217         if (flags & SDVO_OUTPUT_SVID0)
2218                 if (!psb_intel_sdvo_tv_init(psb_intel_sdvo, SDVO_OUTPUT_SVID0))
2219                         return false;
2220
2221         if (flags & SDVO_OUTPUT_CVBS0)
2222                 if (!psb_intel_sdvo_tv_init(psb_intel_sdvo, SDVO_OUTPUT_CVBS0))
2223                         return false;
2224
2225         if (flags & SDVO_OUTPUT_RGB0)
2226                 if (!psb_intel_sdvo_analog_init(psb_intel_sdvo, 0))
2227                         return false;
2228
2229         if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK)
2230                 if (!psb_intel_sdvo_analog_init(psb_intel_sdvo, 1))
2231                         return false;
2232
2233         if (flags & SDVO_OUTPUT_LVDS0)
2234                 if (!psb_intel_sdvo_lvds_init(psb_intel_sdvo, 0))
2235                         return false;
2236
2237         if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK)
2238                 if (!psb_intel_sdvo_lvds_init(psb_intel_sdvo, 1))
2239                         return false;
2240
2241         if ((flags & SDVO_OUTPUT_MASK) == 0) {
2242                 unsigned char bytes[2];
2243
2244                 psb_intel_sdvo->controlled_output = 0;
2245                 memcpy(bytes, &psb_intel_sdvo->caps.output_flags, 2);
2246                 DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n",
2247                               SDVO_NAME(psb_intel_sdvo),
2248                               bytes[0], bytes[1]);
2249                 return false;
2250         }
2251         psb_intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1);
2252
2253         return true;
2254 }
2255
2256 static bool psb_intel_sdvo_tv_create_property(struct psb_intel_sdvo *psb_intel_sdvo,
2257                                           struct psb_intel_sdvo_connector *psb_intel_sdvo_connector,
2258                                           int type)
2259 {
2260         struct drm_device *dev = psb_intel_sdvo->base.base.dev;
2261         struct psb_intel_sdvo_tv_format format;
2262         uint32_t format_map, i;
2263
2264         if (!psb_intel_sdvo_set_target_output(psb_intel_sdvo, type))
2265                 return false;
2266
2267         BUILD_BUG_ON(sizeof(format) != 6);
2268         if (!psb_intel_sdvo_get_value(psb_intel_sdvo,
2269                                   SDVO_CMD_GET_SUPPORTED_TV_FORMATS,
2270                                   &format, sizeof(format)))
2271                 return false;
2272
2273         memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format)));
2274
2275         if (format_map == 0)
2276                 return false;
2277
2278         psb_intel_sdvo_connector->format_supported_num = 0;
2279         for (i = 0 ; i < ARRAY_SIZE(tv_format_names); i++)
2280                 if (format_map & (1 << i))
2281                         psb_intel_sdvo_connector->tv_format_supported[psb_intel_sdvo_connector->format_supported_num++] = i;
2282
2283
2284         psb_intel_sdvo_connector->tv_format =
2285                         drm_property_create(dev, DRM_MODE_PROP_ENUM,
2286                                             "mode", psb_intel_sdvo_connector->format_supported_num);
2287         if (!psb_intel_sdvo_connector->tv_format)
2288                 return false;
2289
2290         for (i = 0; i < psb_intel_sdvo_connector->format_supported_num; i++)
2291                 drm_property_add_enum(
2292                                 psb_intel_sdvo_connector->tv_format,
2293                                 i, tv_format_names[psb_intel_sdvo_connector->tv_format_supported[i]]);
2294
2295         psb_intel_sdvo->tv_format_index = psb_intel_sdvo_connector->tv_format_supported[0];
2296         drm_object_attach_property(&psb_intel_sdvo_connector->base.base.base,
2297                                       psb_intel_sdvo_connector->tv_format, 0);
2298         return true;
2299
2300 }
2301
2302 #define ENHANCEMENT(name, NAME) do { \
2303         if (enhancements.name) { \
2304                 if (!psb_intel_sdvo_get_value(psb_intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \
2305                     !psb_intel_sdvo_get_value(psb_intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \
2306                         return false; \
2307                 psb_intel_sdvo_connector->max_##name = data_value[0]; \
2308                 psb_intel_sdvo_connector->cur_##name = response; \
2309                 psb_intel_sdvo_connector->name = \
2310                         drm_property_create_range(dev, 0, #name, 0, data_value[0]); \
2311                 if (!psb_intel_sdvo_connector->name) return false; \
2312                 drm_object_attach_property(&connector->base, \
2313                                               psb_intel_sdvo_connector->name, \
2314                                               psb_intel_sdvo_connector->cur_##name); \
2315                 DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \
2316                               data_value[0], data_value[1], response); \
2317         } \
2318 } while(0)
2319
2320 static bool
2321 psb_intel_sdvo_create_enhance_property_tv(struct psb_intel_sdvo *psb_intel_sdvo,
2322                                       struct psb_intel_sdvo_connector *psb_intel_sdvo_connector,
2323                                       struct psb_intel_sdvo_enhancements_reply enhancements)
2324 {
2325         struct drm_device *dev = psb_intel_sdvo->base.base.dev;
2326         struct drm_connector *connector = &psb_intel_sdvo_connector->base.base;
2327         uint16_t response, data_value[2];
2328
2329         /* when horizontal overscan is supported, Add the left/right  property */
2330         if (enhancements.overscan_h) {
2331                 if (!psb_intel_sdvo_get_value(psb_intel_sdvo,
2332                                           SDVO_CMD_GET_MAX_OVERSCAN_H,
2333                                           &data_value, 4))
2334                         return false;
2335
2336                 if (!psb_intel_sdvo_get_value(psb_intel_sdvo,
2337                                           SDVO_CMD_GET_OVERSCAN_H,
2338                                           &response, 2))
2339                         return false;
2340
2341                 psb_intel_sdvo_connector->max_hscan = data_value[0];
2342                 psb_intel_sdvo_connector->left_margin = data_value[0] - response;
2343                 psb_intel_sdvo_connector->right_margin = psb_intel_sdvo_connector->left_margin;
2344                 psb_intel_sdvo_connector->left =
2345                         drm_property_create_range(dev, 0, "left_margin", 0, data_value[0]);
2346                 if (!psb_intel_sdvo_connector->left)
2347                         return false;
2348
2349                 drm_object_attach_property(&connector->base,
2350                                               psb_intel_sdvo_connector->left,
2351                                               psb_intel_sdvo_connector->left_margin);
2352
2353                 psb_intel_sdvo_connector->right =
2354                         drm_property_create_range(dev, 0, "right_margin", 0, data_value[0]);
2355                 if (!psb_intel_sdvo_connector->right)
2356                         return false;
2357
2358                 drm_object_attach_property(&connector->base,
2359                                               psb_intel_sdvo_connector->right,
2360                                               psb_intel_sdvo_connector->right_margin);
2361                 DRM_DEBUG_KMS("h_overscan: max %d, "
2362                               "default %d, current %d\n",
2363                               data_value[0], data_value[1], response);
2364         }
2365
2366         if (enhancements.overscan_v) {
2367                 if (!psb_intel_sdvo_get_value(psb_intel_sdvo,
2368                                           SDVO_CMD_GET_MAX_OVERSCAN_V,
2369                                           &data_value, 4))
2370                         return false;
2371
2372                 if (!psb_intel_sdvo_get_value(psb_intel_sdvo,
2373                                           SDVO_CMD_GET_OVERSCAN_V,
2374                                           &response, 2))
2375                         return false;
2376
2377                 psb_intel_sdvo_connector->max_vscan = data_value[0];
2378                 psb_intel_sdvo_connector->top_margin = data_value[0] - response;
2379                 psb_intel_sdvo_connector->bottom_margin = psb_intel_sdvo_connector->top_margin;
2380                 psb_intel_sdvo_connector->top =
2381                         drm_property_create_range(dev, 0, "top_margin", 0, data_value[0]);
2382                 if (!psb_intel_sdvo_connector->top)
2383                         return false;
2384
2385                 drm_object_attach_property(&connector->base,
2386                                               psb_intel_sdvo_connector->top,
2387                                               psb_intel_sdvo_connector->top_margin);
2388
2389                 psb_intel_sdvo_connector->bottom =
2390                         drm_property_create_range(dev, 0, "bottom_margin", 0, data_value[0]);
2391                 if (!psb_intel_sdvo_connector->bottom)
2392                         return false;
2393
2394                 drm_object_attach_property(&connector->base,
2395                                               psb_intel_sdvo_connector->bottom,
2396                                               psb_intel_sdvo_connector->bottom_margin);
2397                 DRM_DEBUG_KMS("v_overscan: max %d, "
2398                               "default %d, current %d\n",
2399                               data_value[0], data_value[1], response);
2400         }
2401
2402         ENHANCEMENT(hpos, HPOS);
2403         ENHANCEMENT(vpos, VPOS);
2404         ENHANCEMENT(saturation, SATURATION);
2405         ENHANCEMENT(contrast, CONTRAST);
2406         ENHANCEMENT(hue, HUE);
2407         ENHANCEMENT(sharpness, SHARPNESS);
2408         ENHANCEMENT(brightness, BRIGHTNESS);
2409         ENHANCEMENT(flicker_filter, FLICKER_FILTER);
2410         ENHANCEMENT(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
2411         ENHANCEMENT(flicker_filter_2d, FLICKER_FILTER_2D);
2412         ENHANCEMENT(tv_chroma_filter, TV_CHROMA_FILTER);
2413         ENHANCEMENT(tv_luma_filter, TV_LUMA_FILTER);
2414
2415         if (enhancements.dot_crawl) {
2416                 if (!psb_intel_sdvo_get_value(psb_intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2))
2417                         return false;
2418
2419                 psb_intel_sdvo_connector->max_dot_crawl = 1;
2420                 psb_intel_sdvo_connector->cur_dot_crawl = response & 0x1;
2421                 psb_intel_sdvo_connector->dot_crawl =
2422                         drm_property_create_range(dev, 0, "dot_crawl", 0, 1);
2423                 if (!psb_intel_sdvo_connector->dot_crawl)
2424                         return false;
2425
2426                 drm_object_attach_property(&connector->base,
2427                                               psb_intel_sdvo_connector->dot_crawl,
2428                                               psb_intel_sdvo_connector->cur_dot_crawl);
2429                 DRM_DEBUG_KMS("dot crawl: current %d\n", response);
2430         }
2431
2432         return true;
2433 }
2434
2435 static bool
2436 psb_intel_sdvo_create_enhance_property_lvds(struct psb_intel_sdvo *psb_intel_sdvo,
2437                                         struct psb_intel_sdvo_connector *psb_intel_sdvo_connector,
2438                                         struct psb_intel_sdvo_enhancements_reply enhancements)
2439 {
2440         struct drm_device *dev = psb_intel_sdvo->base.base.dev;
2441         struct drm_connector *connector = &psb_intel_sdvo_connector->base.base;
2442         uint16_t response, data_value[2];
2443
2444         ENHANCEMENT(brightness, BRIGHTNESS);
2445
2446         return true;
2447 }
2448 #undef ENHANCEMENT
2449
2450 static bool psb_intel_sdvo_create_enhance_property(struct psb_intel_sdvo *psb_intel_sdvo,
2451                                                struct psb_intel_sdvo_connector *psb_intel_sdvo_connector)
2452 {
2453         union {
2454                 struct psb_intel_sdvo_enhancements_reply reply;
2455                 uint16_t response;
2456         } enhancements;
2457
2458         BUILD_BUG_ON(sizeof(enhancements) != 2);
2459
2460         enhancements.response = 0;
2461         psb_intel_sdvo_get_value(psb_intel_sdvo,
2462                              SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS,
2463                              &enhancements, sizeof(enhancements));
2464         if (enhancements.response == 0) {
2465                 DRM_DEBUG_KMS("No enhancement is supported\n");
2466                 return true;
2467         }
2468
2469         if (IS_TV(psb_intel_sdvo_connector))
2470                 return psb_intel_sdvo_create_enhance_property_tv(psb_intel_sdvo, psb_intel_sdvo_connector, enhancements.reply);
2471         else if(IS_LVDS(psb_intel_sdvo_connector))
2472                 return psb_intel_sdvo_create_enhance_property_lvds(psb_intel_sdvo, psb_intel_sdvo_connector, enhancements.reply);
2473         else
2474                 return true;
2475 }
2476
2477 static int psb_intel_sdvo_ddc_proxy_xfer(struct i2c_adapter *adapter,
2478                                      struct i2c_msg *msgs,
2479                                      int num)
2480 {
2481         struct psb_intel_sdvo *sdvo = adapter->algo_data;
2482
2483         if (!psb_intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus))
2484                 return -EIO;
2485
2486         return sdvo->i2c->algo->master_xfer(sdvo->i2c, msgs, num);
2487 }
2488
2489 static u32 psb_intel_sdvo_ddc_proxy_func(struct i2c_adapter *adapter)
2490 {
2491         struct psb_intel_sdvo *sdvo = adapter->algo_data;
2492         return sdvo->i2c->algo->functionality(sdvo->i2c);
2493 }
2494
2495 static const struct i2c_algorithm psb_intel_sdvo_ddc_proxy = {
2496         .master_xfer    = psb_intel_sdvo_ddc_proxy_xfer,
2497         .functionality  = psb_intel_sdvo_ddc_proxy_func
2498 };
2499
2500 static bool
2501 psb_intel_sdvo_init_ddc_proxy(struct psb_intel_sdvo *sdvo,
2502                           struct drm_device *dev)
2503 {
2504         sdvo->ddc.owner = THIS_MODULE;
2505         sdvo->ddc.class = I2C_CLASS_DDC;
2506         snprintf(sdvo->ddc.name, I2C_NAME_SIZE, "SDVO DDC proxy");
2507         sdvo->ddc.dev.parent = &dev->pdev->dev;
2508         sdvo->ddc.algo_data = sdvo;
2509         sdvo->ddc.algo = &psb_intel_sdvo_ddc_proxy;
2510
2511         return i2c_add_adapter(&sdvo->ddc) == 0;
2512 }
2513
2514 bool psb_intel_sdvo_init(struct drm_device *dev, int sdvo_reg)
2515 {
2516         struct drm_psb_private *dev_priv = dev->dev_private;
2517         struct gma_encoder *gma_encoder;
2518         struct psb_intel_sdvo *psb_intel_sdvo;
2519         int i;
2520
2521         psb_intel_sdvo = kzalloc(sizeof(struct psb_intel_sdvo), GFP_KERNEL);
2522         if (!psb_intel_sdvo)
2523                 return false;
2524
2525         psb_intel_sdvo->sdvo_reg = sdvo_reg;
2526         psb_intel_sdvo->slave_addr = psb_intel_sdvo_get_slave_addr(dev, sdvo_reg) >> 1;
2527         psb_intel_sdvo_select_i2c_bus(dev_priv, psb_intel_sdvo, sdvo_reg);
2528         if (!psb_intel_sdvo_init_ddc_proxy(psb_intel_sdvo, dev)) {
2529                 kfree(psb_intel_sdvo);
2530                 return false;
2531         }
2532
2533         /* encoder type will be decided later */
2534         gma_encoder = &psb_intel_sdvo->base;
2535         gma_encoder->type = INTEL_OUTPUT_SDVO;
2536         drm_encoder_init(dev, &gma_encoder->base, &psb_intel_sdvo_enc_funcs,
2537                          0, NULL);
2538
2539         /* Read the regs to test if we can talk to the device */
2540         for (i = 0; i < 0x40; i++) {
2541                 u8 byte;
2542
2543                 if (!psb_intel_sdvo_read_byte(psb_intel_sdvo, i, &byte)) {
2544                         DRM_DEBUG_KMS("No SDVO device found on SDVO%c\n",
2545                                       IS_SDVOB(sdvo_reg) ? 'B' : 'C');
2546                         goto err;
2547                 }
2548         }
2549
2550         if (IS_SDVOB(sdvo_reg))
2551                 dev_priv->hotplug_supported_mask |= SDVOB_HOTPLUG_INT_STATUS;
2552         else
2553                 dev_priv->hotplug_supported_mask |= SDVOC_HOTPLUG_INT_STATUS;
2554
2555         drm_encoder_helper_add(&gma_encoder->base, &psb_intel_sdvo_helper_funcs);
2556
2557         /* In default case sdvo lvds is false */
2558         if (!psb_intel_sdvo_get_capabilities(psb_intel_sdvo, &psb_intel_sdvo->caps))
2559                 goto err;
2560
2561         if (psb_intel_sdvo_output_setup(psb_intel_sdvo,
2562                                     psb_intel_sdvo->caps.output_flags) != true) {
2563                 DRM_DEBUG_KMS("SDVO output failed to setup on SDVO%c\n",
2564                               IS_SDVOB(sdvo_reg) ? 'B' : 'C');
2565                 goto err;
2566         }
2567
2568         psb_intel_sdvo_select_ddc_bus(dev_priv, psb_intel_sdvo, sdvo_reg);
2569
2570         /* Set the input timing to the screen. Assume always input 0. */
2571         if (!psb_intel_sdvo_set_target_input(psb_intel_sdvo))
2572                 goto err;
2573
2574         if (!psb_intel_sdvo_get_input_pixel_clock_range(psb_intel_sdvo,
2575                                                     &psb_intel_sdvo->pixel_clock_min,
2576                                                     &psb_intel_sdvo->pixel_clock_max))
2577                 goto err;
2578
2579         DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, "
2580                         "clock range %dMHz - %dMHz, "
2581                         "input 1: %c, input 2: %c, "
2582                         "output 1: %c, output 2: %c\n",
2583                         SDVO_NAME(psb_intel_sdvo),
2584                         psb_intel_sdvo->caps.vendor_id, psb_intel_sdvo->caps.device_id,
2585                         psb_intel_sdvo->caps.device_rev_id,
2586                         psb_intel_sdvo->pixel_clock_min / 1000,
2587                         psb_intel_sdvo->pixel_clock_max / 1000,
2588                         (psb_intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N',
2589                         (psb_intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N',
2590                         /* check currently supported outputs */
2591                         psb_intel_sdvo->caps.output_flags &
2592                         (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N',
2593                         psb_intel_sdvo->caps.output_flags &
2594                         (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N');
2595         return true;
2596
2597 err:
2598         drm_encoder_cleanup(&gma_encoder->base);
2599         i2c_del_adapter(&psb_intel_sdvo->ddc);
2600         kfree(psb_intel_sdvo);
2601
2602         return false;
2603 }