681db997a532390a570c0bd58a5a4af54ba6199a
[linux-2.6-microblaze.git] / drivers / gpu / drm / amd / display / dc / dcn10 / dcn10_init.c
1 /*
2  * Copyright 2016 Advanced Micro Devices, Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * Authors: AMD
23  *
24  */
25
26 #include "hw_sequencer_private.h"
27 #include "dce110/dce110_hw_sequencer.h"
28 #include "dcn10_hw_sequencer.h"
29
30 static const struct hw_sequencer_funcs dcn10_funcs = {
31         .program_gamut_remap = dcn10_program_gamut_remap,
32         .init_hw = dcn10_init_hw,
33         .apply_ctx_to_hw = dce110_apply_ctx_to_hw,
34         .apply_ctx_for_surface = dcn10_apply_ctx_for_surface,
35         .post_unlock_program_front_end = dcn10_post_unlock_program_front_end,
36         .update_plane_addr = dcn10_update_plane_addr,
37         .update_dchub = dcn10_update_dchub,
38         .update_pending_status = dcn10_update_pending_status,
39         .program_output_csc = dcn10_program_output_csc,
40         .enable_accelerated_mode = dce110_enable_accelerated_mode,
41         .enable_timing_synchronization = dcn10_enable_timing_synchronization,
42         .enable_per_frame_crtc_position_reset = dcn10_enable_per_frame_crtc_position_reset,
43         .update_info_frame = dce110_update_info_frame,
44         .send_immediate_sdp_message = dcn10_send_immediate_sdp_message,
45         .enable_stream = dce110_enable_stream,
46         .disable_stream = dce110_disable_stream,
47         .unblank_stream = dcn10_unblank_stream,
48         .blank_stream = dce110_blank_stream,
49         .enable_audio_stream = dce110_enable_audio_stream,
50         .disable_audio_stream = dce110_disable_audio_stream,
51         .disable_plane = dcn10_disable_plane,
52         .pipe_control_lock = dcn10_pipe_control_lock,
53         .prepare_bandwidth = dcn10_prepare_bandwidth,
54         .optimize_bandwidth = dcn10_optimize_bandwidth,
55         .set_drr = dcn10_set_drr,
56         .get_position = dcn10_get_position,
57         .set_static_screen_control = dcn10_set_static_screen_control,
58         .setup_stereo = dcn10_setup_stereo,
59         .set_avmute = dce110_set_avmute,
60         .log_hw_state = dcn10_log_hw_state,
61         .get_hw_state = dcn10_get_hw_state,
62         .clear_status_bits = dcn10_clear_status_bits,
63         .wait_for_mpcc_disconnect = dcn10_wait_for_mpcc_disconnect,
64         .edp_power_control = dce110_edp_power_control,
65         .edp_wait_for_hpd_ready = dce110_edp_wait_for_hpd_ready,
66         .set_cursor_position = dcn10_set_cursor_position,
67         .set_cursor_attribute = dcn10_set_cursor_attribute,
68         .set_cursor_sdr_white_level = dcn10_set_cursor_sdr_white_level,
69         .setup_periodic_interrupt = dcn10_setup_periodic_interrupt,
70         .set_clock = dcn10_set_clock,
71         .get_clock = dcn10_get_clock,
72         .get_vupdate_offset_from_vsync = dcn10_get_vupdate_offset_from_vsync,
73 };
74
75 static const struct hwseq_private_funcs dcn10_private_funcs = {
76         .init_pipes = dcn10_init_pipes,
77         .update_plane_addr = dcn10_update_plane_addr,
78         .plane_atomic_disconnect = dcn10_plane_atomic_disconnect,
79         .program_pipe = dcn10_program_pipe,
80         .update_mpcc = dcn10_update_mpcc,
81         .set_input_transfer_func = dcn10_set_input_transfer_func,
82         .set_output_transfer_func = dcn10_set_output_transfer_func,
83         .power_down = dce110_power_down,
84         .enable_display_power_gating = dcn10_dummy_display_power_gating,
85         .blank_pixel_data = dcn10_blank_pixel_data,
86         .reset_hw_ctx_wrap = dcn10_reset_hw_ctx_wrap,
87         .enable_stream_timing = dcn10_enable_stream_timing,
88         .edp_backlight_control = dce110_edp_backlight_control,
89         .disable_stream_gating = NULL,
90         .enable_stream_gating = NULL,
91         .setup_vupdate_interrupt = dcn10_setup_vupdate_interrupt,
92         .did_underflow_occur = dcn10_did_underflow_occur,
93         .init_blank = NULL,
94         .disable_vga = dcn10_disable_vga,
95         .bios_golden_init = dcn10_bios_golden_init,
96         .plane_atomic_disable = dcn10_plane_atomic_disable,
97         .plane_atomic_power_down = dcn10_plane_atomic_power_down,
98         .enable_power_gating_plane = dcn10_enable_power_gating_plane,
99         .dpp_pg_control = dcn10_dpp_pg_control,
100         .hubp_pg_control = dcn10_hubp_pg_control,
101         .dsc_pg_control = NULL,
102         .get_surface_visual_confirm_color = dcn10_get_surface_visual_confirm_color,
103         .get_hdr_visual_confirm_color = dcn10_get_hdr_visual_confirm_color,
104         .set_hdr_multiplier = dcn10_set_hdr_multiplier,
105         .verify_allow_pstate_change_high = dcn10_verify_allow_pstate_change_high,
106 };
107
108 void dcn10_hw_sequencer_construct(struct dc *dc)
109 {
110         dc->hwss = dcn10_funcs;
111         dc->hwseq->funcs = dcn10_private_funcs;
112 }