drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

   1 /*
   2  * Copyright 2012-15 Advanced Micro Devices, Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  * Authors: AMD
  23  *
  24  */
  25
  26 #include <linux/version.h>
  27 #include <drm/drm_atomic_helper.h>
  28 #include "dm_services.h"
  29 #include "amdgpu.h"
  30 #include "amdgpu_dm.h"
  31 #include "amdgpu_dm_mst_types.h"
  32
  33 #include "dc.h"
  34 #include "dm_helpers.h"
  35
  36 #include "dc_link_ddc.h"
  37
  38 #include "i2caux_interface.h"
  39
  40 /* #define TRACE_DPCD */
  41
  42 #ifdef TRACE_DPCD
  43 #define SIDE_BAND_MSG(address) (address >= DP_SIDEBAND_MSG_DOWN_REQ_BASE && address < DP_SINK_COUNT_ESI)
  44
  45 static inline char *side_band_msg_type_to_str(uint32_t address)
  46 {
  47         static char str[10] = {0};
  48
  49         if (address < DP_SIDEBAND_MSG_UP_REP_BASE)
  50                 strcpy(str, "DOWN_REQ");
  51         else if (address < DP_SIDEBAND_MSG_DOWN_REP_BASE)
  52                 strcpy(str, "UP_REP");
  53         else if (address < DP_SIDEBAND_MSG_UP_REQ_BASE)
  54                 strcpy(str, "DOWN_REP");
  55         else
  56                 strcpy(str, "UP_REQ");
  57
  58         return str;
  59 }
  60
  61 static void log_dpcd(uint8_t type,
  62                      uint32_t address,
  63                      uint8_t *data,
  64                      uint32_t size,
  65                      bool res)
  66 {
  67         DRM_DEBUG_KMS("Op: %s, addr: %04x, SideBand Msg: %s, Op res: %s\n",
  68                         (type == DP_AUX_NATIVE_READ) ||
  69                         (type == DP_AUX_I2C_READ) ?
  70                                         "Read" : "Write",
  71                         address,
  72                         SIDE_BAND_MSG(address) ?
  73                                         side_band_msg_type_to_str(address) : "Nop",
  74                         res ? "OK" : "Fail");
  75
  76         if (res) {
  77                 print_hex_dump(KERN_INFO, "Body: ", DUMP_PREFIX_NONE, 16, 1, data, size, false);
  78         }
  79 }
  80 #endif
  81
  82 static ssize_t dm_dp_aux_transfer(struct drm_dp_aux *aux,
  83                                   struct drm_dp_aux_msg *msg)
  84 {
  85         ssize_t result = 0;
  86         struct aux_payload payload;
  87         enum aux_channel_operation_result operation_result;
  88
  89         if (WARN_ON(msg->size > 16))
  90                 return -E2BIG;
  91
  92         payload.address = msg->address;
  93         payload.data = msg->buffer;
  94         payload.length = msg->size;
  95         payload.reply = &msg->reply;
  96         payload.i2c_over_aux = (msg->request & DP_AUX_NATIVE_WRITE) == 0;
  97         payload.write = (msg->request & DP_AUX_I2C_READ) == 0;
  98         payload.mot = (msg->request & DP_AUX_I2C_MOT) != 0;
  99         payload.defer_delay = 0;
 100
 101         result = dc_link_aux_transfer_raw(TO_DM_AUX(aux)->ddc_service, &payload,
 102                                       &operation_result);
 103
 104         if (payload.write)
 105                 result = msg->size;
 106
 107         if (result < 0)
 108                 switch (operation_result) {
 109                 case AUX_CHANNEL_OPERATION_SUCCEEDED:
 110                         break;
 111                 case AUX_CHANNEL_OPERATION_FAILED_HPD_DISCON:
 112                 case AUX_CHANNEL_OPERATION_FAILED_REASON_UNKNOWN:
 113                         result = -EIO;
 114                         break;
 115                 case AUX_CHANNEL_OPERATION_FAILED_INVALID_REPLY:
 116                         result = -EBUSY;
 117                         break;
 118                 case AUX_CHANNEL_OPERATION_FAILED_TIMEOUT:
 119                         result = -ETIMEDOUT;
 120                         break;
 121                 }
 122
 123         return result;
 124 }
 125
 126 static enum drm_connector_status
 127 dm_dp_mst_detect(struct drm_connector *connector, bool force)
 128 {
 129         struct amdgpu_dm_connector *aconnector = to_amdgpu_dm_connector(connector);
 130         struct amdgpu_dm_connector *master = aconnector->mst_port;
 131
 132         enum drm_connector_status status =
 133                 drm_dp_mst_detect_port(
 134                         connector,
 135                         &master->mst_mgr,
 136                         aconnector->port);
 137
 138         return status;
 139 }
 140
 141 static void
 142 dm_dp_mst_connector_destroy(struct drm_connector *connector)
 143 {
 144         struct amdgpu_dm_connector *amdgpu_dm_connector = to_amdgpu_dm_connector(connector);
 145         struct amdgpu_encoder *amdgpu_encoder = amdgpu_dm_connector->mst_encoder;
 146
 147         if (amdgpu_dm_connector->edid) {
 148                 kfree(amdgpu_dm_connector->edid);
 149                 amdgpu_dm_connector->edid = NULL;
 150         }
 151
 152         drm_encoder_cleanup(&amdgpu_encoder->base);
 153         kfree(amdgpu_encoder);
 154         drm_connector_cleanup(connector);
 155         drm_dp_mst_put_port_malloc(amdgpu_dm_connector->port);
 156         kfree(amdgpu_dm_connector);
 157 }
 158
 159 static int
 160 amdgpu_dm_mst_connector_late_register(struct drm_connector *connector)
 161 {
 162         struct amdgpu_dm_connector *amdgpu_dm_connector =
 163                 to_amdgpu_dm_connector(connector);
 164         struct drm_dp_mst_port *port = amdgpu_dm_connector->port;
 165
 166         return drm_dp_mst_connector_late_register(connector, port);
 167 }
 168
 169 static void
 170 amdgpu_dm_mst_connector_early_unregister(struct drm_connector *connector)
 171 {
 172         struct amdgpu_dm_connector *amdgpu_dm_connector =
 173                 to_amdgpu_dm_connector(connector);
 174         struct drm_dp_mst_port *port = amdgpu_dm_connector->port;
 175
 176         drm_dp_mst_connector_early_unregister(connector, port);
 177 }
 178
 179 static const struct drm_connector_funcs dm_dp_mst_connector_funcs = {
 180         .detect = dm_dp_mst_detect,
 181         .fill_modes = drm_helper_probe_single_connector_modes,
 182         .destroy = dm_dp_mst_connector_destroy,
 183         .reset = amdgpu_dm_connector_funcs_reset,
 184         .atomic_duplicate_state = amdgpu_dm_connector_atomic_duplicate_state,
 185         .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
 186         .atomic_set_property = amdgpu_dm_connector_atomic_set_property,
 187         .atomic_get_property = amdgpu_dm_connector_atomic_get_property,
 188         .late_register = amdgpu_dm_mst_connector_late_register,
 189         .early_unregister = amdgpu_dm_mst_connector_early_unregister,
 190 };
 191
 192 static int dm_dp_mst_get_modes(struct drm_connector *connector)
 193 {
 194         struct amdgpu_dm_connector *aconnector = to_amdgpu_dm_connector(connector);
 195         int ret = 0;
 196
 197         if (!aconnector)
 198                 return drm_add_edid_modes(connector, NULL);
 199
 200         if (!aconnector->edid) {
 201                 struct edid *edid;
 202                 edid = drm_dp_mst_get_edid(connector, &aconnector->mst_port->mst_mgr, aconnector->port);
 203
 204                 if (!edid) {
 205                         drm_connector_update_edid_property(
 206                                 &aconnector->base,
 207                                 NULL);
 208                         return ret;
 209                 }
 210
 211                 aconnector->edid = edid;
 212         }
 213
 214         if (aconnector->dc_sink && aconnector->dc_sink->sink_signal == SIGNAL_TYPE_VIRTUAL) {
 215                 dc_sink_release(aconnector->dc_sink);
 216                 aconnector->dc_sink = NULL;
 217         }
 218
 219         if (!aconnector->dc_sink) {
 220                 struct dc_sink *dc_sink;
 221                 struct dc_sink_init_data init_params = {
 222                                 .link = aconnector->dc_link,
 223                                 .sink_signal = SIGNAL_TYPE_DISPLAY_PORT_MST };
 224                 dc_sink = dc_link_add_remote_sink(
 225                         aconnector->dc_link,
 226                         (uint8_t *)aconnector->edid,
 227                         (aconnector->edid->extensions + 1) * EDID_LENGTH,
 228                         &init_params);
 229
 230                 dc_sink->priv = aconnector;
 231                 /* dc_link_add_remote_sink returns a new reference */
 232                 aconnector->dc_sink = dc_sink;
 233
 234                 if (aconnector->dc_sink)
 235                         amdgpu_dm_update_freesync_caps(
 236                                         connector, aconnector->edid);
 237
 238         }
 239
 240         drm_connector_update_edid_property(
 241                                         &aconnector->base, aconnector->edid);
 242
 243         ret = drm_add_edid_modes(connector, aconnector->edid);
 244
 245         return ret;
 246 }
 247
 248 static struct drm_encoder *dm_mst_best_encoder(struct drm_connector *connector)
 249 {
 250         struct amdgpu_dm_connector *amdgpu_dm_connector = to_amdgpu_dm_connector(connector);
 251
 252         return &amdgpu_dm_connector->mst_encoder->base;
 253 }
 254
 255 static const struct drm_connector_helper_funcs dm_dp_mst_connector_helper_funcs = {
 256         .get_modes = dm_dp_mst_get_modes,
 257         .mode_valid = amdgpu_dm_connector_mode_valid,
 258         .best_encoder = dm_mst_best_encoder,
 259 };
 260
 261 static void amdgpu_dm_encoder_destroy(struct drm_encoder *encoder)
 262 {
 263         drm_encoder_cleanup(encoder);
 264         kfree(encoder);
 265 }
 266
 267 static const struct drm_encoder_funcs amdgpu_dm_encoder_funcs = {
 268         .destroy = amdgpu_dm_encoder_destroy,
 269 };
 270
 271 static struct amdgpu_encoder *
 272 dm_dp_create_fake_mst_encoder(struct amdgpu_dm_connector *connector)
 273 {
 274         struct drm_device *dev = connector->base.dev;
 275         struct amdgpu_device *adev = dev->dev_private;
 276         struct amdgpu_encoder *amdgpu_encoder;
 277         struct drm_encoder *encoder;
 278
 279         amdgpu_encoder = kzalloc(sizeof(*amdgpu_encoder), GFP_KERNEL);
 280         if (!amdgpu_encoder)
 281                 return NULL;
 282
 283         encoder = &amdgpu_encoder->base;
 284         encoder->possible_crtcs = amdgpu_dm_get_encoder_crtc_mask(adev);
 285
 286         drm_encoder_init(
 287                 dev,
 288                 &amdgpu_encoder->base,
 289                 &amdgpu_dm_encoder_funcs,
 290                 DRM_MODE_ENCODER_DPMST,
 291                 NULL);
 292
 293         drm_encoder_helper_add(encoder, &amdgpu_dm_encoder_helper_funcs);
 294
 295         return amdgpu_encoder;
 296 }
 297
 298 static struct drm_connector *
 299 dm_dp_add_mst_connector(struct drm_dp_mst_topology_mgr *mgr,
 300                         struct drm_dp_mst_port *port,
 301                         const char *pathprop)
 302 {
 303         struct amdgpu_dm_connector *master = container_of(mgr, struct amdgpu_dm_connector, mst_mgr);
 304         struct drm_device *dev = master->base.dev;
 305         struct amdgpu_device *adev = dev->dev_private;
 306         struct amdgpu_dm_connector *aconnector;
 307         struct drm_connector *connector;
 308
 309         aconnector = kzalloc(sizeof(*aconnector), GFP_KERNEL);
 310         if (!aconnector)
 311                 return NULL;
 312
 313         connector = &aconnector->base;
 314         aconnector->port = port;
 315         aconnector->mst_port = master;
 316
 317         if (drm_connector_init(
 318                 dev,
 319                 connector,
 320                 &dm_dp_mst_connector_funcs,
 321                 DRM_MODE_CONNECTOR_DisplayPort)) {
 322                 kfree(aconnector);
 323                 return NULL;
 324         }
 325         drm_connector_helper_add(connector, &dm_dp_mst_connector_helper_funcs);
 326
 327         amdgpu_dm_connector_init_helper(
 328                 &adev->dm,
 329                 aconnector,
 330                 DRM_MODE_CONNECTOR_DisplayPort,
 331                 master->dc_link,
 332                 master->connector_id);
 333
 334         aconnector->mst_encoder = dm_dp_create_fake_mst_encoder(master);
 335         drm_connector_attach_encoder(&aconnector->base,
 336                                      &aconnector->mst_encoder->base);
 337
 338         drm_object_attach_property(
 339                 &connector->base,
 340                 dev->mode_config.path_property,
 341                 0);
 342         drm_object_attach_property(
 343                 &connector->base,
 344                 dev->mode_config.tile_property,
 345                 0);
 346
 347         drm_connector_set_path_property(connector, pathprop);
 348
 349         /*
 350          * Initialize connector state before adding the connectror to drm and
 351          * framebuffer lists
 352          */
 353         amdgpu_dm_connector_funcs_reset(connector);
 354
 355         DRM_INFO("DM_MST: added connector: %p [id: %d] [master: %p]\n",
 356                  aconnector, connector->base.id, aconnector->mst_port);
 357
 358         drm_dp_mst_get_port_malloc(port);
 359
 360         DRM_DEBUG_KMS(":%d\n", connector->base.id);
 361
 362         return connector;
 363 }
 364
 365 static void dm_dp_destroy_mst_connector(struct drm_dp_mst_topology_mgr *mgr,
 366                                         struct drm_connector *connector)
 367 {
 368         struct amdgpu_dm_connector *master = container_of(mgr, struct amdgpu_dm_connector, mst_mgr);
 369         struct drm_device *dev = master->base.dev;
 370         struct amdgpu_device *adev = dev->dev_private;
 371         struct amdgpu_dm_connector *aconnector = to_amdgpu_dm_connector(connector);
 372
 373         DRM_INFO("DM_MST: Disabling connector: %p [id: %d] [master: %p]\n",
 374                  aconnector, connector->base.id, aconnector->mst_port);
 375
 376         if (aconnector->dc_sink) {
 377                 amdgpu_dm_update_freesync_caps(connector, NULL);
 378                 dc_link_remove_remote_sink(aconnector->dc_link,
 379                                            aconnector->dc_sink);
 380                 dc_sink_release(aconnector->dc_sink);
 381                 aconnector->dc_sink = NULL;
 382         }
 383
 384         drm_connector_unregister(connector);
 385         if (adev->mode_info.rfbdev)
 386                 drm_fb_helper_remove_one_connector(&adev->mode_info.rfbdev->helper, connector);
 387         drm_connector_put(connector);
 388 }
 389
 390 static void dm_dp_mst_register_connector(struct drm_connector *connector)
 391 {
 392         struct drm_device *dev = connector->dev;
 393         struct amdgpu_device *adev = dev->dev_private;
 394
 395         if (adev->mode_info.rfbdev)
 396                 drm_fb_helper_add_one_connector(&adev->mode_info.rfbdev->helper, connector);
 397         else
 398                 DRM_ERROR("adev->mode_info.rfbdev is NULL\n");
 399
 400         drm_connector_register(connector);
 401 }
 402
 403 static const struct drm_dp_mst_topology_cbs dm_mst_cbs = {
 404         .add_connector = dm_dp_add_mst_connector,
 405         .destroy_connector = dm_dp_destroy_mst_connector,
 406         .register_connector = dm_dp_mst_register_connector
 407 };
 408
 409 void amdgpu_dm_initialize_dp_connector(struct amdgpu_display_manager *dm,
 410                                        struct amdgpu_dm_connector *aconnector)
 411 {
 412         aconnector->dm_dp_aux.aux.name = "dmdc";
 413         aconnector->dm_dp_aux.aux.dev = aconnector->base.kdev;
 414         aconnector->dm_dp_aux.aux.transfer = dm_dp_aux_transfer;
 415         aconnector->dm_dp_aux.ddc_service = aconnector->dc_link->ddc;
 416
 417         drm_dp_aux_register(&aconnector->dm_dp_aux.aux);
 418         drm_dp_cec_register_connector(&aconnector->dm_dp_aux.aux,
 419                                       aconnector->base.name, dm->adev->dev);
 420         aconnector->mst_mgr.cbs = &dm_mst_cbs;
 421         drm_dp_mst_topology_mgr_init(
 422                 &aconnector->mst_mgr,
 423                 dm->adev->ddev,
 424                 &aconnector->dm_dp_aux.aux,
 425                 16,
 426                 4,
 427                 aconnector->connector_id);
 428 }
 429