drivers/gpio/gpio-pca953x.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  *  PCA953x 4/8/16/24/40 bit I/O ports
   4  *
   5  *  Copyright (C) 2005 Ben Gardner <bgardner@wabtec.com>
   6  *  Copyright (C) 2007 Marvell International Ltd.
   7  *
   8  *  Derived from drivers/i2c/chips/pca9539.c
   9  */
  10
  11 #include <linux/acpi.h>
  12 #include <linux/bitmap.h>
  13 #include <linux/gpio/driver.h>
  14 #include <linux/gpio/consumer.h>
  15 #include <linux/i2c.h>
  16 #include <linux/init.h>
  17 #include <linux/interrupt.h>
  18 #include <linux/module.h>
  19 #include <linux/of_platform.h>
  20 #include <linux/platform_data/pca953x.h>
  21 #include <linux/regmap.h>
  22 #include <linux/regulator/consumer.h>
  23 #include <linux/slab.h>
  24
  25 #include <asm/unaligned.h>
  26
  27 #define PCA953X_INPUT           0x00
  28 #define PCA953X_OUTPUT          0x01
  29 #define PCA953X_INVERT          0x02
  30 #define PCA953X_DIRECTION       0x03
  31
  32 #define REG_ADDR_MASK           GENMASK(5, 0)
  33 #define REG_ADDR_EXT            BIT(6)
  34 #define REG_ADDR_AI             BIT(7)
  35
  36 #define PCA957X_IN              0x00
  37 #define PCA957X_INVRT           0x01
  38 #define PCA957X_BKEN            0x02
  39 #define PCA957X_PUPD            0x03
  40 #define PCA957X_CFG             0x04
  41 #define PCA957X_OUT             0x05
  42 #define PCA957X_MSK             0x06
  43 #define PCA957X_INTS            0x07
  44
  45 #define PCAL953X_OUT_STRENGTH   0x20
  46 #define PCAL953X_IN_LATCH       0x22
  47 #define PCAL953X_PULL_EN        0x23
  48 #define PCAL953X_PULL_SEL       0x24
  49 #define PCAL953X_INT_MASK       0x25
  50 #define PCAL953X_INT_STAT       0x26
  51 #define PCAL953X_OUT_CONF       0x27
  52
  53 #define PCAL6524_INT_EDGE       0x28
  54 #define PCAL6524_INT_CLR        0x2a
  55 #define PCAL6524_IN_STATUS      0x2b
  56 #define PCAL6524_OUT_INDCONF    0x2c
  57 #define PCAL6524_DEBOUNCE       0x2d
  58
  59 #define PCA_GPIO_MASK           GENMASK(7, 0)
  60
  61 #define PCAL_GPIO_MASK          GENMASK(4, 0)
  62 #define PCAL_PINCTRL_MASK       GENMASK(6, 5)
  63
  64 #define PCA_INT                 BIT(8)
  65 #define PCA_PCAL                BIT(9)
  66 #define PCA_LATCH_INT           (PCA_PCAL | PCA_INT)
  67 #define PCA953X_TYPE            BIT(12)
  68 #define PCA957X_TYPE            BIT(13)
  69 #define PCA_TYPE_MASK           GENMASK(15, 12)
  70
  71 #define PCA_CHIP_TYPE(x)        ((x) & PCA_TYPE_MASK)
  72
  73 static const struct i2c_device_id pca953x_id[] = {
  74         { "pca6416", 16 | PCA953X_TYPE | PCA_INT, },
  75         { "pca9505", 40 | PCA953X_TYPE | PCA_INT, },
  76         { "pca9506", 40 | PCA953X_TYPE | PCA_INT, },
  77         { "pca9534", 8  | PCA953X_TYPE | PCA_INT, },
  78         { "pca9535", 16 | PCA953X_TYPE | PCA_INT, },
  79         { "pca9536", 4  | PCA953X_TYPE, },
  80         { "pca9537", 4  | PCA953X_TYPE | PCA_INT, },
  81         { "pca9538", 8  | PCA953X_TYPE | PCA_INT, },
  82         { "pca9539", 16 | PCA953X_TYPE | PCA_INT, },
  83         { "pca9554", 8  | PCA953X_TYPE | PCA_INT, },
  84         { "pca9555", 16 | PCA953X_TYPE | PCA_INT, },
  85         { "pca9556", 8  | PCA953X_TYPE, },
  86         { "pca9557", 8  | PCA953X_TYPE, },
  87         { "pca9574", 8  | PCA957X_TYPE | PCA_INT, },
  88         { "pca9575", 16 | PCA957X_TYPE | PCA_INT, },
  89         { "pca9698", 40 | PCA953X_TYPE, },
  90
  91         { "pcal6416", 16 | PCA953X_TYPE | PCA_LATCH_INT, },
  92         { "pcal6524", 24 | PCA953X_TYPE | PCA_LATCH_INT, },
  93         { "pcal9535", 16 | PCA953X_TYPE | PCA_LATCH_INT, },
  94         { "pcal9554b", 8  | PCA953X_TYPE | PCA_LATCH_INT, },
  95         { "pcal9555a", 16 | PCA953X_TYPE | PCA_LATCH_INT, },
  96
  97         { "max7310", 8  | PCA953X_TYPE, },
  98         { "max7312", 16 | PCA953X_TYPE | PCA_INT, },
  99         { "max7313", 16 | PCA953X_TYPE | PCA_INT, },
 100         { "max7315", 8  | PCA953X_TYPE | PCA_INT, },
 101         { "max7318", 16 | PCA953X_TYPE | PCA_INT, },
 102         { "pca6107", 8  | PCA953X_TYPE | PCA_INT, },
 103         { "tca6408", 8  | PCA953X_TYPE | PCA_INT, },
 104         { "tca6416", 16 | PCA953X_TYPE | PCA_INT, },
 105         { "tca6424", 24 | PCA953X_TYPE | PCA_INT, },
 106         { "tca9539", 16 | PCA953X_TYPE | PCA_INT, },
 107         { "tca9554", 8  | PCA953X_TYPE | PCA_INT, },
 108         { "xra1202", 8  | PCA953X_TYPE },
 109         { }
 110 };
 111 MODULE_DEVICE_TABLE(i2c, pca953x_id);
 112
 113 #ifdef CONFIG_GPIO_PCA953X_IRQ
 114
 115 #include <linux/dmi.h>
 116
 117 static const struct acpi_gpio_params pca953x_irq_gpios = { 0, 0, true };
 118
 119 static const struct acpi_gpio_mapping pca953x_acpi_irq_gpios[] = {
 120         { "irq-gpios", &pca953x_irq_gpios, 1, ACPI_GPIO_QUIRK_ABSOLUTE_NUMBER },
 121         { }
 122 };
 123
 124 static int pca953x_acpi_get_irq(struct device *dev)
 125 {
 126         int ret;
 127
 128         ret = devm_acpi_dev_add_driver_gpios(dev, pca953x_acpi_irq_gpios);
 129         if (ret)
 130                 dev_warn(dev, "can't add GPIO ACPI mapping\n");
 131
 132         ret = acpi_dev_gpio_irq_get_by(ACPI_COMPANION(dev), "irq-gpios", 0);
 133         if (ret < 0)
 134                 return ret;
 135
 136         dev_info(dev, "ACPI interrupt quirk (IRQ %d)\n", ret);
 137         return ret;
 138 }
 139
 140 static const struct dmi_system_id pca953x_dmi_acpi_irq_info[] = {
 141         {
 142                 /*
 143                  * On Intel Galileo Gen 2 board the IRQ pin of one of
 144                  * the I²C GPIO expanders, which has GpioInt() resource,
 145                  * is provided as an absolute number instead of being
 146                  * relative. Since first controller (gpio-sch.c) and
 147                  * second (gpio-dwapb.c) are at the fixed bases, we may
 148                  * safely refer to the number in the global space to get
 149                  * an IRQ out of it.
 150                  */
 151                 .matches = {
 152                         DMI_EXACT_MATCH(DMI_BOARD_NAME, "GalileoGen2"),
 153                 },
 154         },
 155         {}
 156 };
 157 #endif
 158
 159 static const struct acpi_device_id pca953x_acpi_ids[] = {
 160         { "INT3491", 16 | PCA953X_TYPE | PCA_LATCH_INT, },
 161         { }
 162 };
 163 MODULE_DEVICE_TABLE(acpi, pca953x_acpi_ids);
 164
 165 #define MAX_BANK 5
 166 #define BANK_SZ 8
 167 #define MAX_LINE        (MAX_BANK * BANK_SZ)
 168
 169 #define NBANK(chip) DIV_ROUND_UP(chip->gpio_chip.ngpio, BANK_SZ)
 170
 171 struct pca953x_reg_config {
 172         int direction;
 173         int output;
 174         int input;
 175         int invert;
 176 };
 177
 178 static const struct pca953x_reg_config pca953x_regs = {
 179         .direction = PCA953X_DIRECTION,
 180         .output = PCA953X_OUTPUT,
 181         .input = PCA953X_INPUT,
 182         .invert = PCA953X_INVERT,
 183 };
 184
 185 static const struct pca953x_reg_config pca957x_regs = {
 186         .direction = PCA957X_CFG,
 187         .output = PCA957X_OUT,
 188         .input = PCA957X_IN,
 189         .invert = PCA957X_INVRT,
 190 };
 191
 192 struct pca953x_chip {
 193         unsigned gpio_start;
 194         struct mutex i2c_lock;
 195         struct regmap *regmap;
 196
 197 #ifdef CONFIG_GPIO_PCA953X_IRQ
 198         struct mutex irq_lock;
 199         DECLARE_BITMAP(irq_mask, MAX_LINE);
 200         DECLARE_BITMAP(irq_stat, MAX_LINE);
 201         DECLARE_BITMAP(irq_trig_raise, MAX_LINE);
 202         DECLARE_BITMAP(irq_trig_fall, MAX_LINE);
 203         struct irq_chip irq_chip;
 204 #endif
 205         atomic_t wakeup_path;
 206
 207         struct i2c_client *client;
 208         struct gpio_chip gpio_chip;
 209         const char *const *names;
 210         unsigned long driver_data;
 211         struct regulator *regulator;
 212
 213         const struct pca953x_reg_config *regs;
 214 };
 215
 216 static int pca953x_bank_shift(struct pca953x_chip *chip)
 217 {
 218         return fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
 219 }
 220
 221 #define PCA953x_BANK_INPUT      BIT(0)
 222 #define PCA953x_BANK_OUTPUT     BIT(1)
 223 #define PCA953x_BANK_POLARITY   BIT(2)
 224 #define PCA953x_BANK_CONFIG     BIT(3)
 225
 226 #define PCA957x_BANK_INPUT      BIT(0)
 227 #define PCA957x_BANK_POLARITY   BIT(1)
 228 #define PCA957x_BANK_BUSHOLD    BIT(2)
 229 #define PCA957x_BANK_CONFIG     BIT(4)
 230 #define PCA957x_BANK_OUTPUT     BIT(5)
 231
 232 #define PCAL9xxx_BANK_IN_LATCH  BIT(8 + 2)
 233 #define PCAL9xxx_BANK_PULL_EN   BIT(8 + 3)
 234 #define PCAL9xxx_BANK_PULL_SEL  BIT(8 + 4)
 235 #define PCAL9xxx_BANK_IRQ_MASK  BIT(8 + 5)
 236 #define PCAL9xxx_BANK_IRQ_STAT  BIT(8 + 6)
 237
 238 /*
 239  * We care about the following registers:
 240  * - Standard set, below 0x40, each port can be replicated up to 8 times
 241  *   - PCA953x standard
 242  *     Input port                       0x00 + 0 * bank_size    R
 243  *     Output port                      0x00 + 1 * bank_size    RW
 244  *     Polarity Inversion port          0x00 + 2 * bank_size    RW
 245  *     Configuration port               0x00 + 3 * bank_size    RW
 246  *   - PCA957x with mixed up registers
 247  *     Input port                       0x00 + 0 * bank_size    R
 248  *     Polarity Inversion port          0x00 + 1 * bank_size    RW
 249  *     Bus hold port                    0x00 + 2 * bank_size    RW
 250  *     Configuration port               0x00 + 4 * bank_size    RW
 251  *     Output port                      0x00 + 5 * bank_size    RW
 252  *
 253  * - Extended set, above 0x40, often chip specific.
 254  *   - PCAL6524/PCAL9555A with custom PCAL IRQ handling:
 255  *     Input latch register             0x40 + 2 * bank_size    RW
 256  *     Pull-up/pull-down enable reg     0x40 + 3 * bank_size    RW
 257  *     Pull-up/pull-down select reg     0x40 + 4 * bank_size    RW
 258  *     Interrupt mask register          0x40 + 5 * bank_size    RW
 259  *     Interrupt status register        0x40 + 6 * bank_size    R
 260  *
 261  * - Registers with bit 0x80 set, the AI bit
 262  *   The bit is cleared and the registers fall into one of the
 263  *   categories above.
 264  */
 265
 266 static bool pca953x_check_register(struct pca953x_chip *chip, unsigned int reg,
 267                                    u32 checkbank)
 268 {
 269         int bank_shift = pca953x_bank_shift(chip);
 270         int bank = (reg & REG_ADDR_MASK) >> bank_shift;
 271         int offset = reg & (BIT(bank_shift) - 1);
 272
 273         /* Special PCAL extended register check. */
 274         if (reg & REG_ADDR_EXT) {
 275                 if (!(chip->driver_data & PCA_PCAL))
 276                         return false;
 277                 bank += 8;
 278         }
 279
 280         /* Register is not in the matching bank. */
 281         if (!(BIT(bank) & checkbank))
 282                 return false;
 283
 284         /* Register is not within allowed range of bank. */
 285         if (offset >= NBANK(chip))
 286                 return false;
 287
 288         return true;
 289 }
 290
 291 static bool pca953x_readable_register(struct device *dev, unsigned int reg)
 292 {
 293         struct pca953x_chip *chip = dev_get_drvdata(dev);
 294         u32 bank;
 295
 296         if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE) {
 297                 bank = PCA953x_BANK_INPUT | PCA953x_BANK_OUTPUT |
 298                        PCA953x_BANK_POLARITY | PCA953x_BANK_CONFIG;
 299         } else {
 300                 bank = PCA957x_BANK_INPUT | PCA957x_BANK_OUTPUT |
 301                        PCA957x_BANK_POLARITY | PCA957x_BANK_CONFIG |
 302                        PCA957x_BANK_BUSHOLD;
 303         }
 304
 305         if (chip->driver_data & PCA_PCAL) {
 306                 bank |= PCAL9xxx_BANK_IN_LATCH | PCAL9xxx_BANK_PULL_EN |
 307                         PCAL9xxx_BANK_PULL_SEL | PCAL9xxx_BANK_IRQ_MASK |
 308                         PCAL9xxx_BANK_IRQ_STAT;
 309         }
 310
 311         return pca953x_check_register(chip, reg, bank);
 312 }
 313
 314 static bool pca953x_writeable_register(struct device *dev, unsigned int reg)
 315 {
 316         struct pca953x_chip *chip = dev_get_drvdata(dev);
 317         u32 bank;
 318
 319         if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE) {
 320                 bank = PCA953x_BANK_OUTPUT | PCA953x_BANK_POLARITY |
 321                         PCA953x_BANK_CONFIG;
 322         } else {
 323                 bank = PCA957x_BANK_OUTPUT | PCA957x_BANK_POLARITY |
 324                         PCA957x_BANK_CONFIG | PCA957x_BANK_BUSHOLD;
 325         }
 326
 327         if (chip->driver_data & PCA_PCAL)
 328                 bank |= PCAL9xxx_BANK_IN_LATCH | PCAL9xxx_BANK_PULL_EN |
 329                         PCAL9xxx_BANK_PULL_SEL | PCAL9xxx_BANK_IRQ_MASK;
 330
 331         return pca953x_check_register(chip, reg, bank);
 332 }
 333
 334 static bool pca953x_volatile_register(struct device *dev, unsigned int reg)
 335 {
 336         struct pca953x_chip *chip = dev_get_drvdata(dev);
 337         u32 bank;
 338
 339         if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE)
 340                 bank = PCA953x_BANK_INPUT;
 341         else
 342                 bank = PCA957x_BANK_INPUT;
 343
 344         if (chip->driver_data & PCA_PCAL)
 345                 bank |= PCAL9xxx_BANK_IRQ_STAT;
 346
 347         return pca953x_check_register(chip, reg, bank);
 348 }
 349
 350 static const struct regmap_config pca953x_i2c_regmap = {
 351         .reg_bits = 8,
 352         .val_bits = 8,
 353
 354         .readable_reg = pca953x_readable_register,
 355         .writeable_reg = pca953x_writeable_register,
 356         .volatile_reg = pca953x_volatile_register,
 357
 358         .disable_locking = true,
 359         .cache_type = REGCACHE_RBTREE,
 360         .max_register = 0x7f,
 361 };
 362
 363 static const struct regmap_config pca953x_ai_i2c_regmap = {
 364         .reg_bits = 8,
 365         .val_bits = 8,
 366
 367         .read_flag_mask = REG_ADDR_AI,
 368         .write_flag_mask = REG_ADDR_AI,
 369
 370         .readable_reg = pca953x_readable_register,
 371         .writeable_reg = pca953x_writeable_register,
 372         .volatile_reg = pca953x_volatile_register,
 373
 374         .disable_locking = true,
 375         .cache_type = REGCACHE_RBTREE,
 376         .max_register = 0x7f,
 377 };
 378
 379 static u8 pca953x_recalc_addr(struct pca953x_chip *chip, int reg, int off)
 380 {
 381         int bank_shift = pca953x_bank_shift(chip);
 382         int addr = (reg & PCAL_GPIO_MASK) << bank_shift;
 383         int pinctrl = (reg & PCAL_PINCTRL_MASK) << 1;
 384         u8 regaddr = pinctrl | addr | (off / BANK_SZ);
 385
 386         return regaddr;
 387 }
 388
 389 static int pca953x_write_regs(struct pca953x_chip *chip, int reg, unsigned long *val)
 390 {
 391         u8 regaddr = pca953x_recalc_addr(chip, reg, 0);
 392         u8 value[MAX_BANK];
 393         int i, ret;
 394
 395         for (i = 0; i < NBANK(chip); i++)
 396                 value[i] = bitmap_get_value8(val, i * BANK_SZ);
 397
 398         ret = regmap_bulk_write(chip->regmap, regaddr, value, NBANK(chip));
 399         if (ret < 0) {
 400                 dev_err(&chip->client->dev, "failed writing register\n");
 401                 return ret;
 402         }
 403
 404         return 0;
 405 }
 406
 407 static int pca953x_read_regs(struct pca953x_chip *chip, int reg, unsigned long *val)
 408 {
 409         u8 regaddr = pca953x_recalc_addr(chip, reg, 0);
 410         u8 value[MAX_BANK];
 411         int i, ret;
 412
 413         ret = regmap_bulk_read(chip->regmap, regaddr, value, NBANK(chip));
 414         if (ret < 0) {
 415                 dev_err(&chip->client->dev, "failed reading register\n");
 416                 return ret;
 417         }
 418
 419         for (i = 0; i < NBANK(chip); i++)
 420                 bitmap_set_value8(val, value[i], i * BANK_SZ);
 421
 422         return 0;
 423 }
 424
 425 static int pca953x_gpio_direction_input(struct gpio_chip *gc, unsigned off)
 426 {
 427         struct pca953x_chip *chip = gpiochip_get_data(gc);
 428         u8 dirreg = pca953x_recalc_addr(chip, chip->regs->direction, off);
 429         u8 bit = BIT(off % BANK_SZ);
 430         int ret;
 431
 432         mutex_lock(&chip->i2c_lock);
 433         ret = regmap_write_bits(chip->regmap, dirreg, bit, bit);
 434         mutex_unlock(&chip->i2c_lock);
 435         return ret;
 436 }
 437
 438 static int pca953x_gpio_direction_output(struct gpio_chip *gc,
 439                 unsigned off, int val)
 440 {
 441         struct pca953x_chip *chip = gpiochip_get_data(gc);
 442         u8 dirreg = pca953x_recalc_addr(chip, chip->regs->direction, off);
 443         u8 outreg = pca953x_recalc_addr(chip, chip->regs->output, off);
 444         u8 bit = BIT(off % BANK_SZ);
 445         int ret;
 446
 447         mutex_lock(&chip->i2c_lock);
 448         /* set output level */
 449         ret = regmap_write_bits(chip->regmap, outreg, bit, val ? bit : 0);
 450         if (ret)
 451                 goto exit;
 452
 453         /* then direction */
 454         ret = regmap_write_bits(chip->regmap, dirreg, bit, 0);
 455 exit:
 456         mutex_unlock(&chip->i2c_lock);
 457         return ret;
 458 }
 459
 460 static int pca953x_gpio_get_value(struct gpio_chip *gc, unsigned off)
 461 {
 462         struct pca953x_chip *chip = gpiochip_get_data(gc);
 463         u8 inreg = pca953x_recalc_addr(chip, chip->regs->input, off);
 464         u8 bit = BIT(off % BANK_SZ);
 465         u32 reg_val;
 466         int ret;
 467
 468         mutex_lock(&chip->i2c_lock);
 469         ret = regmap_read(chip->regmap, inreg, &reg_val);
 470         mutex_unlock(&chip->i2c_lock);
 471         if (ret < 0) {
 472                 /*
 473                  * NOTE:
 474                  * diagnostic already emitted; that's all we should
 475                  * do unless gpio_*_value_cansleep() calls become different
 476                  * from their nonsleeping siblings (and report faults).
 477                  */
 478                 return 0;
 479         }
 480
 481         return !!(reg_val & bit);
 482 }
 483
 484 static void pca953x_gpio_set_value(struct gpio_chip *gc, unsigned off, int val)
 485 {
 486         struct pca953x_chip *chip = gpiochip_get_data(gc);
 487         u8 outreg = pca953x_recalc_addr(chip, chip->regs->output, off);
 488         u8 bit = BIT(off % BANK_SZ);
 489
 490         mutex_lock(&chip->i2c_lock);
 491         regmap_write_bits(chip->regmap, outreg, bit, val ? bit : 0);
 492         mutex_unlock(&chip->i2c_lock);
 493 }
 494
 495 static int pca953x_gpio_get_direction(struct gpio_chip *gc, unsigned off)
 496 {
 497         struct pca953x_chip *chip = gpiochip_get_data(gc);
 498         u8 dirreg = pca953x_recalc_addr(chip, chip->regs->direction, off);
 499         u8 bit = BIT(off % BANK_SZ);
 500         u32 reg_val;
 501         int ret;
 502
 503         mutex_lock(&chip->i2c_lock);
 504         ret = regmap_read(chip->regmap, dirreg, &reg_val);
 505         mutex_unlock(&chip->i2c_lock);
 506         if (ret < 0)
 507                 return ret;
 508
 509         if (reg_val & bit)
 510                 return GPIO_LINE_DIRECTION_IN;
 511
 512         return GPIO_LINE_DIRECTION_OUT;
 513 }
 514
 515 static int pca953x_gpio_get_multiple(struct gpio_chip *gc,
 516                                      unsigned long *mask, unsigned long *bits)
 517 {
 518         struct pca953x_chip *chip = gpiochip_get_data(gc);
 519         DECLARE_BITMAP(reg_val, MAX_LINE);
 520         int ret;
 521
 522         mutex_lock(&chip->i2c_lock);
 523         ret = pca953x_read_regs(chip, chip->regs->input, reg_val);
 524         mutex_unlock(&chip->i2c_lock);
 525         if (ret)
 526                 return ret;
 527
 528         bitmap_replace(bits, bits, reg_val, mask, gc->ngpio);
 529         return 0;
 530 }
 531
 532 static void pca953x_gpio_set_multiple(struct gpio_chip *gc,
 533                                       unsigned long *mask, unsigned long *bits)
 534 {
 535         struct pca953x_chip *chip = gpiochip_get_data(gc);
 536         DECLARE_BITMAP(reg_val, MAX_LINE);
 537         int ret;
 538
 539         mutex_lock(&chip->i2c_lock);
 540         ret = pca953x_read_regs(chip, chip->regs->output, reg_val);
 541         if (ret)
 542                 goto exit;
 543
 544         bitmap_replace(reg_val, reg_val, bits, mask, gc->ngpio);
 545
 546         pca953x_write_regs(chip, chip->regs->output, reg_val);
 547 exit:
 548         mutex_unlock(&chip->i2c_lock);
 549 }
 550
 551 static int pca953x_gpio_set_pull_up_down(struct pca953x_chip *chip,
 552                                          unsigned int offset,
 553                                          unsigned long config)
 554 {
 555         u8 pull_en_reg = pca953x_recalc_addr(chip, PCAL953X_PULL_EN, offset);
 556         u8 pull_sel_reg = pca953x_recalc_addr(chip, PCAL953X_PULL_SEL, offset);
 557         u8 bit = BIT(offset % BANK_SZ);
 558         int ret;
 559
 560         /*
 561          * pull-up/pull-down configuration requires PCAL extended
 562          * registers
 563          */
 564         if (!(chip->driver_data & PCA_PCAL))
 565                 return -ENOTSUPP;
 566
 567         mutex_lock(&chip->i2c_lock);
 568
 569         /* Disable pull-up/pull-down */
 570         ret = regmap_write_bits(chip->regmap, pull_en_reg, bit, 0);
 571         if (ret)
 572                 goto exit;
 573
 574         /* Configure pull-up/pull-down */
 575         if (config == PIN_CONFIG_BIAS_PULL_UP)
 576                 ret = regmap_write_bits(chip->regmap, pull_sel_reg, bit, bit);
 577         else if (config == PIN_CONFIG_BIAS_PULL_DOWN)
 578                 ret = regmap_write_bits(chip->regmap, pull_sel_reg, bit, 0);
 579         if (ret)
 580                 goto exit;
 581
 582         /* Enable pull-up/pull-down */
 583         ret = regmap_write_bits(chip->regmap, pull_en_reg, bit, bit);
 584
 585 exit:
 586         mutex_unlock(&chip->i2c_lock);
 587         return ret;
 588 }
 589
 590 static int pca953x_gpio_set_config(struct gpio_chip *gc, unsigned int offset,
 591                                    unsigned long config)
 592 {
 593         struct pca953x_chip *chip = gpiochip_get_data(gc);
 594
 595         switch (pinconf_to_config_param(config)) {
 596         case PIN_CONFIG_BIAS_PULL_UP:
 597         case PIN_CONFIG_BIAS_PULL_DOWN:
 598                 return pca953x_gpio_set_pull_up_down(chip, offset, config);
 599         default:
 600                 return -ENOTSUPP;
 601         }
 602 }
 603
 604 static void pca953x_setup_gpio(struct pca953x_chip *chip, int gpios)
 605 {
 606         struct gpio_chip *gc;
 607
 608         gc = &chip->gpio_chip;
 609
 610         gc->direction_input  = pca953x_gpio_direction_input;
 611         gc->direction_output = pca953x_gpio_direction_output;
 612         gc->get = pca953x_gpio_get_value;
 613         gc->set = pca953x_gpio_set_value;
 614         gc->get_direction = pca953x_gpio_get_direction;
 615         gc->get_multiple = pca953x_gpio_get_multiple;
 616         gc->set_multiple = pca953x_gpio_set_multiple;
 617         gc->set_config = pca953x_gpio_set_config;
 618         gc->can_sleep = true;
 619
 620         gc->base = chip->gpio_start;
 621         gc->ngpio = gpios;
 622         gc->label = dev_name(&chip->client->dev);
 623         gc->parent = &chip->client->dev;
 624         gc->owner = THIS_MODULE;
 625         gc->names = chip->names;
 626 }
 627
 628 #ifdef CONFIG_GPIO_PCA953X_IRQ
 629 static void pca953x_irq_mask(struct irq_data *d)
 630 {
 631         struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
 632         struct pca953x_chip *chip = gpiochip_get_data(gc);
 633         irq_hw_number_t hwirq = irqd_to_hwirq(d);
 634
 635         clear_bit(hwirq, chip->irq_mask);
 636 }
 637
 638 static void pca953x_irq_unmask(struct irq_data *d)
 639 {
 640         struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
 641         struct pca953x_chip *chip = gpiochip_get_data(gc);
 642         irq_hw_number_t hwirq = irqd_to_hwirq(d);
 643
 644         set_bit(hwirq, chip->irq_mask);
 645 }
 646
 647 static int pca953x_irq_set_wake(struct irq_data *d, unsigned int on)
 648 {
 649         struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
 650         struct pca953x_chip *chip = gpiochip_get_data(gc);
 651
 652         if (on)
 653                 atomic_inc(&chip->wakeup_path);
 654         else
 655                 atomic_dec(&chip->wakeup_path);
 656
 657         return irq_set_irq_wake(chip->client->irq, on);
 658 }
 659
 660 static void pca953x_irq_bus_lock(struct irq_data *d)
 661 {
 662         struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
 663         struct pca953x_chip *chip = gpiochip_get_data(gc);
 664
 665         mutex_lock(&chip->irq_lock);
 666 }
 667
 668 static void pca953x_irq_bus_sync_unlock(struct irq_data *d)
 669 {
 670         struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
 671         struct pca953x_chip *chip = gpiochip_get_data(gc);
 672         DECLARE_BITMAP(irq_mask, MAX_LINE);
 673         DECLARE_BITMAP(reg_direction, MAX_LINE);
 674         int level;
 675
 676         if (chip->driver_data & PCA_PCAL) {
 677                 /* Enable latch on interrupt-enabled inputs */
 678                 pca953x_write_regs(chip, PCAL953X_IN_LATCH, chip->irq_mask);
 679
 680                 bitmap_complement(irq_mask, chip->irq_mask, gc->ngpio);
 681
 682                 /* Unmask enabled interrupts */
 683                 pca953x_write_regs(chip, PCAL953X_INT_MASK, irq_mask);
 684         }
 685
 686         /* Switch direction to input if needed */
 687         pca953x_read_regs(chip, chip->regs->direction, reg_direction);
 688
 689         bitmap_or(irq_mask, chip->irq_trig_fall, chip->irq_trig_raise, gc->ngpio);
 690         bitmap_complement(reg_direction, reg_direction, gc->ngpio);
 691         bitmap_and(irq_mask, irq_mask, reg_direction, gc->ngpio);
 692
 693         /* Look for any newly setup interrupt */
 694         for_each_set_bit(level, irq_mask, gc->ngpio)
 695                 pca953x_gpio_direction_input(&chip->gpio_chip, level);
 696
 697         mutex_unlock(&chip->irq_lock);
 698 }
 699
 700 static int pca953x_irq_set_type(struct irq_data *d, unsigned int type)
 701 {
 702         struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
 703         struct pca953x_chip *chip = gpiochip_get_data(gc);
 704         irq_hw_number_t hwirq = irqd_to_hwirq(d);
 705
 706         if (!(type & IRQ_TYPE_EDGE_BOTH)) {
 707                 dev_err(&chip->client->dev, "irq %d: unsupported type %d\n",
 708                         d->irq, type);
 709                 return -EINVAL;
 710         }
 711
 712         assign_bit(hwirq, chip->irq_trig_fall, type & IRQ_TYPE_EDGE_FALLING);
 713         assign_bit(hwirq, chip->irq_trig_raise, type & IRQ_TYPE_EDGE_RISING);
 714
 715         return 0;
 716 }
 717
 718 static void pca953x_irq_shutdown(struct irq_data *d)
 719 {
 720         struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
 721         struct pca953x_chip *chip = gpiochip_get_data(gc);
 722         irq_hw_number_t hwirq = irqd_to_hwirq(d);
 723
 724         clear_bit(hwirq, chip->irq_trig_raise);
 725         clear_bit(hwirq, chip->irq_trig_fall);
 726 }
 727
 728 static bool pca953x_irq_pending(struct pca953x_chip *chip, unsigned long *pending)
 729 {
 730         struct gpio_chip *gc = &chip->gpio_chip;
 731         DECLARE_BITMAP(reg_direction, MAX_LINE);
 732         DECLARE_BITMAP(old_stat, MAX_LINE);
 733         DECLARE_BITMAP(cur_stat, MAX_LINE);
 734         DECLARE_BITMAP(new_stat, MAX_LINE);
 735         DECLARE_BITMAP(trigger, MAX_LINE);
 736         int ret;
 737
 738         if (chip->driver_data & PCA_PCAL) {
 739                 /* Read the current interrupt status from the device */
 740                 ret = pca953x_read_regs(chip, PCAL953X_INT_STAT, trigger);
 741                 if (ret)
 742                         return false;
 743
 744                 /* Check latched inputs and clear interrupt status */
 745                 ret = pca953x_read_regs(chip, chip->regs->input, cur_stat);
 746                 if (ret)
 747                         return false;
 748
 749                 /* Apply filter for rising/falling edge selection */
 750                 bitmap_replace(new_stat, chip->irq_trig_fall, chip->irq_trig_raise, cur_stat, gc->ngpio);
 751
 752                 bitmap_and(pending, new_stat, trigger, gc->ngpio);
 753
 754                 return !bitmap_empty(pending, gc->ngpio);
 755         }
 756
 757         ret = pca953x_read_regs(chip, chip->regs->input, cur_stat);
 758         if (ret)
 759                 return false;
 760
 761         /* Remove output pins from the equation */
 762         pca953x_read_regs(chip, chip->regs->direction, reg_direction);
 763
 764         bitmap_copy(old_stat, chip->irq_stat, gc->ngpio);
 765
 766         bitmap_and(new_stat, cur_stat, reg_direction, gc->ngpio);
 767         bitmap_xor(cur_stat, new_stat, old_stat, gc->ngpio);
 768         bitmap_and(trigger, cur_stat, chip->irq_mask, gc->ngpio);
 769
 770         if (bitmap_empty(trigger, gc->ngpio))
 771                 return false;
 772
 773         bitmap_copy(chip->irq_stat, new_stat, gc->ngpio);
 774
 775         bitmap_and(cur_stat, chip->irq_trig_fall, old_stat, gc->ngpio);
 776         bitmap_and(old_stat, chip->irq_trig_raise, new_stat, gc->ngpio);
 777         bitmap_or(new_stat, old_stat, cur_stat, gc->ngpio);
 778         bitmap_and(pending, new_stat, trigger, gc->ngpio);
 779
 780         return !bitmap_empty(pending, gc->ngpio);
 781 }
 782
 783 static irqreturn_t pca953x_irq_handler(int irq, void *devid)
 784 {
 785         struct pca953x_chip *chip = devid;
 786         struct gpio_chip *gc = &chip->gpio_chip;
 787         DECLARE_BITMAP(pending, MAX_LINE);
 788         int level;
 789         bool ret;
 790
 791         bitmap_zero(pending, MAX_LINE);
 792
 793         mutex_lock(&chip->i2c_lock);
 794         ret = pca953x_irq_pending(chip, pending);
 795         mutex_unlock(&chip->i2c_lock);
 796
 797         if (ret) {
 798                 ret = 0;
 799
 800                 for_each_set_bit(level, pending, gc->ngpio) {
 801                         int nested_irq = irq_find_mapping(gc->irq.domain, level);
 802
 803                         if (unlikely(nested_irq <= 0)) {
 804                                 dev_warn_ratelimited(gc->parent, "unmapped interrupt %d\n", level);
 805                                 continue;
 806                         }
 807
 808                         handle_nested_irq(nested_irq);
 809                         ret = 1;
 810                 }
 811         }
 812
 813         return IRQ_RETVAL(ret);
 814 }
 815
 816 static int pca953x_irq_setup(struct pca953x_chip *chip, int irq_base)
 817 {
 818         struct i2c_client *client = chip->client;
 819         struct irq_chip *irq_chip = &chip->irq_chip;
 820         DECLARE_BITMAP(reg_direction, MAX_LINE);
 821         DECLARE_BITMAP(irq_stat, MAX_LINE);
 822         struct gpio_irq_chip *girq;
 823         int ret;
 824
 825         if (dmi_first_match(pca953x_dmi_acpi_irq_info)) {
 826                 ret = pca953x_acpi_get_irq(&client->dev);
 827                 if (ret > 0)
 828                         client->irq = ret;
 829         }
 830
 831         if (!client->irq)
 832                 return 0;
 833
 834         if (irq_base == -1)
 835                 return 0;
 836
 837         if (!(chip->driver_data & PCA_INT))
 838                 return 0;
 839
 840         ret = pca953x_read_regs(chip, chip->regs->input, irq_stat);
 841         if (ret)
 842                 return ret;
 843
 844         /*
 845          * There is no way to know which GPIO line generated the
 846          * interrupt.  We have to rely on the previous read for
 847          * this purpose.
 848          */
 849         pca953x_read_regs(chip, chip->regs->direction, reg_direction);
 850         bitmap_and(chip->irq_stat, irq_stat, reg_direction, chip->gpio_chip.ngpio);
 851         mutex_init(&chip->irq_lock);
 852
 853         irq_chip->name = dev_name(&client->dev);
 854         irq_chip->irq_mask = pca953x_irq_mask;
 855         irq_chip->irq_unmask = pca953x_irq_unmask;
 856         irq_chip->irq_set_wake = pca953x_irq_set_wake;
 857         irq_chip->irq_bus_lock = pca953x_irq_bus_lock;
 858         irq_chip->irq_bus_sync_unlock = pca953x_irq_bus_sync_unlock;
 859         irq_chip->irq_set_type = pca953x_irq_set_type;
 860         irq_chip->irq_shutdown = pca953x_irq_shutdown;
 861
 862         girq = &chip->gpio_chip.irq;
 863         girq->chip = irq_chip;
 864         /* This will let us handle the parent IRQ in the driver */
 865         girq->parent_handler = NULL;
 866         girq->num_parents = 0;
 867         girq->parents = NULL;
 868         girq->default_type = IRQ_TYPE_NONE;
 869         girq->handler = handle_simple_irq;
 870         girq->threaded = true;
 871         girq->first = irq_base; /* FIXME: get rid of this */
 872
 873         ret = devm_request_threaded_irq(&client->dev, client->irq,
 874                                         NULL, pca953x_irq_handler,
 875                                         IRQF_ONESHOT | IRQF_SHARED,
 876                                         dev_name(&client->dev), chip);
 877         if (ret) {
 878                 dev_err(&client->dev, "failed to request irq %d\n",
 879                         client->irq);
 880                 return ret;
 881         }
 882
 883         return 0;
 884 }
 885
 886 #else /* CONFIG_GPIO_PCA953X_IRQ */
 887 static int pca953x_irq_setup(struct pca953x_chip *chip,
 888                              int irq_base)
 889 {
 890         struct i2c_client *client = chip->client;
 891
 892         if (client->irq && irq_base != -1 && (chip->driver_data & PCA_INT))
 893                 dev_warn(&client->dev, "interrupt support not compiled in\n");
 894
 895         return 0;
 896 }
 897 #endif
 898
 899 static int device_pca95xx_init(struct pca953x_chip *chip, u32 invert)
 900 {
 901         DECLARE_BITMAP(val, MAX_LINE);
 902         int ret;
 903
 904         ret = regcache_sync_region(chip->regmap, chip->regs->output,
 905                                    chip->regs->output + NBANK(chip));
 906         if (ret)
 907                 goto out;
 908
 909         ret = regcache_sync_region(chip->regmap, chip->regs->direction,
 910                                    chip->regs->direction + NBANK(chip));
 911         if (ret)
 912                 goto out;
 913
 914         /* set platform specific polarity inversion */
 915         if (invert)
 916                 bitmap_fill(val, MAX_LINE);
 917         else
 918                 bitmap_zero(val, MAX_LINE);
 919
 920         ret = pca953x_write_regs(chip, chip->regs->invert, val);
 921 out:
 922         return ret;
 923 }
 924
 925 static int device_pca957x_init(struct pca953x_chip *chip, u32 invert)
 926 {
 927         DECLARE_BITMAP(val, MAX_LINE);
 928         unsigned int i;
 929         int ret;
 930
 931         ret = device_pca95xx_init(chip, invert);
 932         if (ret)
 933                 goto out;
 934
 935         /* To enable register 6, 7 to control pull up and pull down */
 936         for (i = 0; i < NBANK(chip); i++)
 937                 bitmap_set_value8(val, 0x02, i * BANK_SZ);
 938
 939         ret = pca953x_write_regs(chip, PCA957X_BKEN, val);
 940         if (ret)
 941                 goto out;
 942
 943         return 0;
 944 out:
 945         return ret;
 946 }
 947
 948 static int pca953x_probe(struct i2c_client *client,
 949                          const struct i2c_device_id *i2c_id)
 950 {
 951         struct pca953x_platform_data *pdata;
 952         struct pca953x_chip *chip;
 953         int irq_base = 0;
 954         int ret;
 955         u32 invert = 0;
 956         struct regulator *reg;
 957         const struct regmap_config *regmap_config;
 958
 959         chip = devm_kzalloc(&client->dev, sizeof(*chip), GFP_KERNEL);
 960         if (chip == NULL)
 961                 return -ENOMEM;
 962
 963         pdata = dev_get_platdata(&client->dev);
 964         if (pdata) {
 965                 irq_base = pdata->irq_base;
 966                 chip->gpio_start = pdata->gpio_base;
 967                 invert = pdata->invert;
 968                 chip->names = pdata->names;
 969         } else {
 970                 struct gpio_desc *reset_gpio;
 971
 972                 chip->gpio_start = -1;
 973                 irq_base = 0;
 974
 975                 /*
 976                  * See if we need to de-assert a reset pin.
 977                  *
 978                  * There is no known ACPI-enabled platforms that are
 979                  * using "reset" GPIO. Otherwise any of those platform
 980                  * must use _DSD method with corresponding property.
 981                  */
 982                 reset_gpio = devm_gpiod_get_optional(&client->dev, "reset",
 983                                                      GPIOD_OUT_LOW);
 984                 if (IS_ERR(reset_gpio))
 985                         return PTR_ERR(reset_gpio);
 986         }
 987
 988         chip->client = client;
 989
 990         reg = devm_regulator_get(&client->dev, "vcc");
 991         if (IS_ERR(reg))
 992                 return dev_err_probe(&client->dev, PTR_ERR(reg), "reg get err\n");
 993
 994         ret = regulator_enable(reg);
 995         if (ret) {
 996                 dev_err(&client->dev, "reg en err: %d\n", ret);
 997                 return ret;
 998         }
 999         chip->regulator = reg;
1000
1001         if (i2c_id) {
1002                 chip->driver_data = i2c_id->driver_data;
1003         } else {
1004                 const void *match;
1005
1006                 match = device_get_match_data(&client->dev);
1007                 if (!match) {
1008                         ret = -ENODEV;
1009                         goto err_exit;
1010                 }
1011
1012                 chip->driver_data = (uintptr_t)match;
1013         }
1014
1015         i2c_set_clientdata(client, chip);
1016
1017         pca953x_setup_gpio(chip, chip->driver_data & PCA_GPIO_MASK);
1018
1019         if (NBANK(chip) > 2 || PCA_CHIP_TYPE(chip->driver_data) == PCA957X_TYPE) {
1020                 dev_info(&client->dev, "using AI\n");
1021                 regmap_config = &pca953x_ai_i2c_regmap;
1022         } else {
1023                 dev_info(&client->dev, "using no AI\n");
1024                 regmap_config = &pca953x_i2c_regmap;
1025         }
1026
1027         chip->regmap = devm_regmap_init_i2c(client, regmap_config);
1028         if (IS_ERR(chip->regmap)) {
1029                 ret = PTR_ERR(chip->regmap);
1030                 goto err_exit;
1031         }
1032
1033         regcache_mark_dirty(chip->regmap);
1034
1035         mutex_init(&chip->i2c_lock);
1036         /*
1037          * In case we have an i2c-mux controlled by a GPIO provided by an
1038          * expander using the same driver higher on the device tree, read the
1039          * i2c adapter nesting depth and use the retrieved value as lockdep
1040          * subclass for chip->i2c_lock.
1041          *
1042          * REVISIT: This solution is not complete. It protects us from lockdep
1043          * false positives when the expander controlling the i2c-mux is on
1044          * a different level on the device tree, but not when it's on the same
1045          * level on a different branch (in which case the subclass number
1046          * would be the same).
1047          *
1048          * TODO: Once a correct solution is developed, a similar fix should be
1049          * applied to all other i2c-controlled GPIO expanders (and potentially
1050          * regmap-i2c).
1051          */
1052         lockdep_set_subclass(&chip->i2c_lock,
1053                              i2c_adapter_depth(client->adapter));
1054
1055         /* initialize cached registers from their original values.
1056          * we can't share this chip with another i2c master.
1057          */
1058
1059         if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE) {
1060                 chip->regs = &pca953x_regs;
1061                 ret = device_pca95xx_init(chip, invert);
1062         } else {
1063                 chip->regs = &pca957x_regs;
1064                 ret = device_pca957x_init(chip, invert);
1065         }
1066         if (ret)
1067                 goto err_exit;
1068
1069         ret = pca953x_irq_setup(chip, irq_base);
1070         if (ret)
1071                 goto err_exit;
1072
1073         ret = devm_gpiochip_add_data(&client->dev, &chip->gpio_chip, chip);
1074         if (ret)
1075                 goto err_exit;
1076
1077         if (pdata && pdata->setup) {
1078                 ret = pdata->setup(client, chip->gpio_chip.base,
1079                                    chip->gpio_chip.ngpio, pdata->context);
1080                 if (ret < 0)
1081                         dev_warn(&client->dev, "setup failed, %d\n", ret);
1082         }
1083
1084         return 0;
1085
1086 err_exit:
1087         regulator_disable(chip->regulator);
1088         return ret;
1089 }
1090
1091 static int pca953x_remove(struct i2c_client *client)
1092 {
1093         struct pca953x_platform_data *pdata = dev_get_platdata(&client->dev);
1094         struct pca953x_chip *chip = i2c_get_clientdata(client);
1095         int ret;
1096
1097         if (pdata && pdata->teardown) {
1098                 ret = pdata->teardown(client, chip->gpio_chip.base,
1099                                       chip->gpio_chip.ngpio, pdata->context);
1100                 if (ret < 0)
1101                         dev_err(&client->dev, "teardown failed, %d\n", ret);
1102         } else {
1103                 ret = 0;
1104         }
1105
1106         regulator_disable(chip->regulator);
1107
1108         return ret;
1109 }
1110
1111 #ifdef CONFIG_PM_SLEEP
1112 static int pca953x_regcache_sync(struct device *dev)
1113 {
1114         struct pca953x_chip *chip = dev_get_drvdata(dev);
1115         int ret;
1116
1117         /*
1118          * The ordering between direction and output is important,
1119          * sync these registers first and only then sync the rest.
1120          */
1121         ret = regcache_sync_region(chip->regmap, chip->regs->direction,
1122                                    chip->regs->direction + NBANK(chip));
1123         if (ret) {
1124                 dev_err(dev, "Failed to sync GPIO dir registers: %d\n", ret);
1125                 return ret;
1126         }
1127
1128         ret = regcache_sync_region(chip->regmap, chip->regs->output,
1129                                    chip->regs->output + NBANK(chip));
1130         if (ret) {
1131                 dev_err(dev, "Failed to sync GPIO out registers: %d\n", ret);
1132                 return ret;
1133         }
1134
1135 #ifdef CONFIG_GPIO_PCA953X_IRQ
1136         if (chip->driver_data & PCA_PCAL) {
1137                 ret = regcache_sync_region(chip->regmap, PCAL953X_IN_LATCH,
1138                                            PCAL953X_IN_LATCH + NBANK(chip));
1139                 if (ret) {
1140                         dev_err(dev, "Failed to sync INT latch registers: %d\n",
1141                                 ret);
1142                         return ret;
1143                 }
1144
1145                 ret = regcache_sync_region(chip->regmap, PCAL953X_INT_MASK,
1146                                            PCAL953X_INT_MASK + NBANK(chip));
1147                 if (ret) {
1148                         dev_err(dev, "Failed to sync INT mask registers: %d\n",
1149                                 ret);
1150                         return ret;
1151                 }
1152         }
1153 #endif
1154
1155         return 0;
1156 }
1157
1158 static int pca953x_suspend(struct device *dev)
1159 {
1160         struct pca953x_chip *chip = dev_get_drvdata(dev);
1161
1162         regcache_cache_only(chip->regmap, true);
1163
1164         if (atomic_read(&chip->wakeup_path))
1165                 device_set_wakeup_path(dev);
1166         else
1167                 regulator_disable(chip->regulator);
1168
1169         return 0;
1170 }
1171
1172 static int pca953x_resume(struct device *dev)
1173 {
1174         struct pca953x_chip *chip = dev_get_drvdata(dev);
1175         int ret;
1176
1177         if (!atomic_read(&chip->wakeup_path)) {
1178                 ret = regulator_enable(chip->regulator);
1179                 if (ret) {
1180                         dev_err(dev, "Failed to enable regulator: %d\n", ret);
1181                         return 0;
1182                 }
1183         }
1184
1185         regcache_cache_only(chip->regmap, false);
1186         regcache_mark_dirty(chip->regmap);
1187         ret = pca953x_regcache_sync(dev);
1188         if (ret)
1189                 return ret;
1190
1191         ret = regcache_sync(chip->regmap);
1192         if (ret) {
1193                 dev_err(dev, "Failed to restore register map: %d\n", ret);
1194                 return ret;
1195         }
1196
1197         return 0;
1198 }
1199 #endif
1200
1201 /* convenience to stop overlong match-table lines */
1202 #define OF_953X(__nrgpio, __int) (void *)(__nrgpio | PCA953X_TYPE | __int)
1203 #define OF_957X(__nrgpio, __int) (void *)(__nrgpio | PCA957X_TYPE | __int)
1204
1205 static const struct of_device_id pca953x_dt_ids[] = {
1206         { .compatible = "nxp,pca6416", .data = OF_953X(16, PCA_INT), },
1207         { .compatible = "nxp,pca9505", .data = OF_953X(40, PCA_INT), },
1208         { .compatible = "nxp,pca9506", .data = OF_953X(40, PCA_INT), },
1209         { .compatible = "nxp,pca9534", .data = OF_953X( 8, PCA_INT), },
1210         { .compatible = "nxp,pca9535", .data = OF_953X(16, PCA_INT), },
1211         { .compatible = "nxp,pca9536", .data = OF_953X( 4, 0), },
1212         { .compatible = "nxp,pca9537", .data = OF_953X( 4, PCA_INT), },
1213         { .compatible = "nxp,pca9538", .data = OF_953X( 8, PCA_INT), },
1214         { .compatible = "nxp,pca9539", .data = OF_953X(16, PCA_INT), },
1215         { .compatible = "nxp,pca9554", .data = OF_953X( 8, PCA_INT), },
1216         { .compatible = "nxp,pca9555", .data = OF_953X(16, PCA_INT), },
1217         { .compatible = "nxp,pca9556", .data = OF_953X( 8, 0), },
1218         { .compatible = "nxp,pca9557", .data = OF_953X( 8, 0), },
1219         { .compatible = "nxp,pca9574", .data = OF_957X( 8, PCA_INT), },
1220         { .compatible = "nxp,pca9575", .data = OF_957X(16, PCA_INT), },
1221         { .compatible = "nxp,pca9698", .data = OF_953X(40, 0), },
1222
1223         { .compatible = "nxp,pcal6416", .data = OF_953X(16, PCA_LATCH_INT), },
1224         { .compatible = "nxp,pcal6524", .data = OF_953X(24, PCA_LATCH_INT), },
1225         { .compatible = "nxp,pcal9535", .data = OF_953X(16, PCA_LATCH_INT), },
1226         { .compatible = "nxp,pcal9554b", .data = OF_953X( 8, PCA_LATCH_INT), },
1227         { .compatible = "nxp,pcal9555a", .data = OF_953X(16, PCA_LATCH_INT), },
1228
1229         { .compatible = "maxim,max7310", .data = OF_953X( 8, 0), },
1230         { .compatible = "maxim,max7312", .data = OF_953X(16, PCA_INT), },
1231         { .compatible = "maxim,max7313", .data = OF_953X(16, PCA_INT), },
1232         { .compatible = "maxim,max7315", .data = OF_953X( 8, PCA_INT), },
1233         { .compatible = "maxim,max7318", .data = OF_953X(16, PCA_INT), },
1234
1235         { .compatible = "ti,pca6107", .data = OF_953X( 8, PCA_INT), },
1236         { .compatible = "ti,pca9536", .data = OF_953X( 4, 0), },
1237         { .compatible = "ti,tca6408", .data = OF_953X( 8, PCA_INT), },
1238         { .compatible = "ti,tca6416", .data = OF_953X(16, PCA_INT), },
1239         { .compatible = "ti,tca6424", .data = OF_953X(24, PCA_INT), },
1240         { .compatible = "ti,tca9539", .data = OF_953X(16, PCA_INT), },
1241
1242         { .compatible = "onnn,cat9554", .data = OF_953X( 8, PCA_INT), },
1243         { .compatible = "onnn,pca9654", .data = OF_953X( 8, PCA_INT), },
1244         { .compatible = "onnn,pca9655", .data = OF_953X(16, PCA_INT), },
1245
1246         { .compatible = "exar,xra1202", .data = OF_953X( 8, 0), },
1247         { }
1248 };
1249
1250 MODULE_DEVICE_TABLE(of, pca953x_dt_ids);
1251
1252 static SIMPLE_DEV_PM_OPS(pca953x_pm_ops, pca953x_suspend, pca953x_resume);
1253
1254 static struct i2c_driver pca953x_driver = {
1255         .driver = {
1256                 .name   = "pca953x",
1257                 .pm     = &pca953x_pm_ops,
1258                 .of_match_table = pca953x_dt_ids,
1259                 .acpi_match_table = pca953x_acpi_ids,
1260         },
1261         .probe          = pca953x_probe,
1262         .remove         = pca953x_remove,
1263         .id_table       = pca953x_id,
1264 };
1265
1266 static int __init pca953x_init(void)
1267 {
1268         return i2c_add_driver(&pca953x_driver);
1269 }
1270 /* register after i2c postcore initcall and before
1271  * subsys initcalls that may rely on these GPIOs
1272  */
1273 subsys_initcall(pca953x_init);
1274
1275 static void __exit pca953x_exit(void)
1276 {
1277         i2c_del_driver(&pca953x_driver);
1278 }
1279 module_exit(pca953x_exit);
1280
1281 MODULE_AUTHOR("eric miao <eric.miao@marvell.com>");
1282 MODULE_DESCRIPTION("GPIO expander driver for PCA953x");
1283 MODULE_LICENSE("GPL");