drivers/dma/ti/k3-psil-j721e.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  *  Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com
   4  *  Author: Peter Ujfalusi <peter.ujfalusi@ti.com>
   5  */
   6
   7 #include <linux/kernel.h>
   8
   9 #include "k3-psil-priv.h"
  10
  11 #define PSIL_PDMA_XY_TR(x)                              \
  12         {                                               \
  13                 .thread_id = x,                         \
  14                 .ep_config = {                          \
  15                         .ep_type = PSIL_EP_PDMA_XY,     \
  16                 },                                      \
  17         }
  18
  19 #define PSIL_PDMA_XY_PKT(x)                             \
  20         {                                               \
  21                 .thread_id = x,                         \
  22                 .ep_config = {                          \
  23                         .ep_type = PSIL_EP_PDMA_XY,     \
  24                         .pkt_mode = 1,                  \
  25                 },                                      \
  26         }
  27
  28 #define PSIL_PDMA_MCASP(x)                              \
  29         {                                               \
  30                 .thread_id = x,                         \
  31                 .ep_config = {                          \
  32                         .ep_type = PSIL_EP_PDMA_XY,     \
  33                         .pdma_acc32 = 1,                \
  34                         .pdma_burst = 1,                \
  35                 },                                      \
  36         }
  37
  38 #define PSIL_ETHERNET(x)                                \
  39         {                                               \
  40                 .thread_id = x,                         \
  41                 .ep_config = {                          \
  42                         .ep_type = PSIL_EP_NATIVE,      \
  43                         .pkt_mode = 1,                  \
  44                         .needs_epib = 1,                \
  45                         .psd_size = 16,                 \
  46                 },                                      \
  47         }
  48
  49 #define PSIL_SA2UL(x, tx)                               \
  50         {                                               \
  51                 .thread_id = x,                         \
  52                 .ep_config = {                          \
  53                         .ep_type = PSIL_EP_NATIVE,      \
  54                         .pkt_mode = 1,                  \
  55                         .needs_epib = 1,                \
  56                         .psd_size = 64,                 \
  57                         .notdpkt = tx,                  \
  58                 },                                      \
  59         }
  60
  61 /* PSI-L source thread IDs, used for RX (DMA_DEV_TO_MEM) */
  62 static struct psil_ep j721e_src_ep_map[] = {
  63         /* SA2UL */
  64         PSIL_SA2UL(0x4000, 0),
  65         PSIL_SA2UL(0x4001, 0),
  66         PSIL_SA2UL(0x4002, 0),
  67         PSIL_SA2UL(0x4003, 0),
  68         /* PRU_ICSSG0 */
  69         PSIL_ETHERNET(0x4100),
  70         PSIL_ETHERNET(0x4101),
  71         PSIL_ETHERNET(0x4102),
  72         PSIL_ETHERNET(0x4103),
  73         /* PRU_ICSSG1 */
  74         PSIL_ETHERNET(0x4200),
  75         PSIL_ETHERNET(0x4201),
  76         PSIL_ETHERNET(0x4202),
  77         PSIL_ETHERNET(0x4203),
  78         /* PDMA6 (PSIL_PDMA_MCASP_G0) - McASP0-2 */
  79         PSIL_PDMA_MCASP(0x4400),
  80         PSIL_PDMA_MCASP(0x4401),
  81         PSIL_PDMA_MCASP(0x4402),
  82         /* PDMA7 (PSIL_PDMA_MCASP_G1) - McASP3-11 */
  83         PSIL_PDMA_MCASP(0x4500),
  84         PSIL_PDMA_MCASP(0x4501),
  85         PSIL_PDMA_MCASP(0x4502),
  86         PSIL_PDMA_MCASP(0x4503),
  87         PSIL_PDMA_MCASP(0x4504),
  88         PSIL_PDMA_MCASP(0x4505),
  89         PSIL_PDMA_MCASP(0x4506),
  90         PSIL_PDMA_MCASP(0x4507),
  91         PSIL_PDMA_MCASP(0x4508),
  92         /* PDMA8 (PDMA_MISC_G0) - SPI0-1 */
  93         PSIL_PDMA_XY_PKT(0x4600),
  94         PSIL_PDMA_XY_PKT(0x4601),
  95         PSIL_PDMA_XY_PKT(0x4602),
  96         PSIL_PDMA_XY_PKT(0x4603),
  97         PSIL_PDMA_XY_PKT(0x4604),
  98         PSIL_PDMA_XY_PKT(0x4605),
  99         PSIL_PDMA_XY_PKT(0x4606),
 100         PSIL_PDMA_XY_PKT(0x4607),
 101         /* PDMA9 (PDMA_MISC_G1) - SPI2-3 */
 102         PSIL_PDMA_XY_PKT(0x460c),
 103         PSIL_PDMA_XY_PKT(0x460d),
 104         PSIL_PDMA_XY_PKT(0x460e),
 105         PSIL_PDMA_XY_PKT(0x460f),
 106         PSIL_PDMA_XY_PKT(0x4610),
 107         PSIL_PDMA_XY_PKT(0x4611),
 108         PSIL_PDMA_XY_PKT(0x4612),
 109         PSIL_PDMA_XY_PKT(0x4613),
 110         /* PDMA10 (PDMA_MISC_G2) - SPI4-5 */
 111         PSIL_PDMA_XY_PKT(0x4618),
 112         PSIL_PDMA_XY_PKT(0x4619),
 113         PSIL_PDMA_XY_PKT(0x461a),
 114         PSIL_PDMA_XY_PKT(0x461b),
 115         PSIL_PDMA_XY_PKT(0x461c),
 116         PSIL_PDMA_XY_PKT(0x461d),
 117         PSIL_PDMA_XY_PKT(0x461e),
 118         PSIL_PDMA_XY_PKT(0x461f),
 119         /* PDMA11 (PDMA_MISC_G3) */
 120         PSIL_PDMA_XY_PKT(0x4624),
 121         PSIL_PDMA_XY_PKT(0x4625),
 122         PSIL_PDMA_XY_PKT(0x4626),
 123         PSIL_PDMA_XY_PKT(0x4627),
 124         PSIL_PDMA_XY_PKT(0x4628),
 125         PSIL_PDMA_XY_PKT(0x4629),
 126         PSIL_PDMA_XY_PKT(0x4630),
 127         PSIL_PDMA_XY_PKT(0x463a),
 128         /* PDMA13 (PDMA_USART_G0) - UART0-1 */
 129         PSIL_PDMA_XY_PKT(0x4700),
 130         PSIL_PDMA_XY_PKT(0x4701),
 131         /* PDMA14 (PDMA_USART_G1) - UART2-3 */
 132         PSIL_PDMA_XY_PKT(0x4702),
 133         PSIL_PDMA_XY_PKT(0x4703),
 134         /* PDMA15 (PDMA_USART_G2) - UART4-9 */
 135         PSIL_PDMA_XY_PKT(0x4704),
 136         PSIL_PDMA_XY_PKT(0x4705),
 137         PSIL_PDMA_XY_PKT(0x4706),
 138         PSIL_PDMA_XY_PKT(0x4707),
 139         PSIL_PDMA_XY_PKT(0x4708),
 140         PSIL_PDMA_XY_PKT(0x4709),
 141         /* CPSW9 */
 142         PSIL_ETHERNET(0x4a00),
 143         /* CPSW0 */
 144         PSIL_ETHERNET(0x7000),
 145         /* MCU_PDMA0 (MCU_PDMA_MISC_G0) - SPI0 */
 146         PSIL_PDMA_XY_PKT(0x7100),
 147         PSIL_PDMA_XY_PKT(0x7101),
 148         PSIL_PDMA_XY_PKT(0x7102),
 149         PSIL_PDMA_XY_PKT(0x7103),
 150         /* MCU_PDMA1 (MCU_PDMA_MISC_G1) - SPI1-2 */
 151         PSIL_PDMA_XY_PKT(0x7200),
 152         PSIL_PDMA_XY_PKT(0x7201),
 153         PSIL_PDMA_XY_PKT(0x7202),
 154         PSIL_PDMA_XY_PKT(0x7203),
 155         PSIL_PDMA_XY_PKT(0x7204),
 156         PSIL_PDMA_XY_PKT(0x7205),
 157         PSIL_PDMA_XY_PKT(0x7206),
 158         PSIL_PDMA_XY_PKT(0x7207),
 159         /* MCU_PDMA2 (MCU_PDMA_MISC_G2) - UART0 */
 160         PSIL_PDMA_XY_PKT(0x7300),
 161         /* MCU_PDMA_ADC - ADC0-1 */
 162         PSIL_PDMA_XY_TR(0x7400),
 163         PSIL_PDMA_XY_TR(0x7401),
 164         PSIL_PDMA_XY_TR(0x7402),
 165         PSIL_PDMA_XY_TR(0x7403),
 166         /* SA2UL */
 167         PSIL_SA2UL(0x7500, 0),
 168         PSIL_SA2UL(0x7501, 0),
 169         PSIL_SA2UL(0x7502, 0),
 170         PSIL_SA2UL(0x7503, 0),
 171 };
 172
 173 /* PSI-L destination thread IDs, used for TX (DMA_MEM_TO_DEV) */
 174 static struct psil_ep j721e_dst_ep_map[] = {
 175         /* SA2UL */
 176         PSIL_SA2UL(0xc000, 1),
 177         PSIL_SA2UL(0xc001, 1),
 178         /* PRU_ICSSG0 */
 179         PSIL_ETHERNET(0xc100),
 180         PSIL_ETHERNET(0xc101),
 181         PSIL_ETHERNET(0xc102),
 182         PSIL_ETHERNET(0xc103),
 183         PSIL_ETHERNET(0xc104),
 184         PSIL_ETHERNET(0xc105),
 185         PSIL_ETHERNET(0xc106),
 186         PSIL_ETHERNET(0xc107),
 187         /* PRU_ICSSG1 */
 188         PSIL_ETHERNET(0xc200),
 189         PSIL_ETHERNET(0xc201),
 190         PSIL_ETHERNET(0xc202),
 191         PSIL_ETHERNET(0xc203),
 192         PSIL_ETHERNET(0xc204),
 193         PSIL_ETHERNET(0xc205),
 194         PSIL_ETHERNET(0xc206),
 195         PSIL_ETHERNET(0xc207),
 196         /* CPSW9 */
 197         PSIL_ETHERNET(0xca00),
 198         PSIL_ETHERNET(0xca01),
 199         PSIL_ETHERNET(0xca02),
 200         PSIL_ETHERNET(0xca03),
 201         PSIL_ETHERNET(0xca04),
 202         PSIL_ETHERNET(0xca05),
 203         PSIL_ETHERNET(0xca06),
 204         PSIL_ETHERNET(0xca07),
 205         /* CPSW0 */
 206         PSIL_ETHERNET(0xf000),
 207         PSIL_ETHERNET(0xf001),
 208         PSIL_ETHERNET(0xf002),
 209         PSIL_ETHERNET(0xf003),
 210         PSIL_ETHERNET(0xf004),
 211         PSIL_ETHERNET(0xf005),
 212         PSIL_ETHERNET(0xf006),
 213         PSIL_ETHERNET(0xf007),
 214         /* SA2UL */
 215         PSIL_SA2UL(0xf500, 1),
 216         PSIL_SA2UL(0xf501, 1),
 217 };
 218
 219 struct psil_ep_map j721e_ep_map = {
 220         .name = "j721e",
 221         .src = j721e_src_ep_map,
 222         .src_count = ARRAY_SIZE(j721e_src_ep_map),
 223         .dst = j721e_dst_ep_map,
 224         .dst_count = ARRAY_SIZE(j721e_dst_ep_map),
 225 };