Merge branch 'dmi-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jdelvar...
[linux-2.6-microblaze.git] / drivers / crypto / qat / qat_common / adf_sriov.c
1 // SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0-only)
2 /* Copyright(c) 2015 - 2020 Intel Corporation */
3 #include <linux/workqueue.h>
4 #include <linux/pci.h>
5 #include <linux/device.h>
6 #include <linux/iommu.h>
7 #include "adf_common_drv.h"
8 #include "adf_cfg.h"
9 #include "adf_pf2vf_msg.h"
10
11 static struct workqueue_struct *pf2vf_resp_wq;
12
13 struct adf_pf2vf_resp {
14         struct work_struct pf2vf_resp_work;
15         struct adf_accel_vf_info *vf_info;
16 };
17
18 static void adf_iov_send_resp(struct work_struct *work)
19 {
20         struct adf_pf2vf_resp *pf2vf_resp =
21                 container_of(work, struct adf_pf2vf_resp, pf2vf_resp_work);
22
23         adf_vf2pf_req_hndl(pf2vf_resp->vf_info);
24         kfree(pf2vf_resp);
25 }
26
27 static void adf_vf2pf_bh_handler(void *data)
28 {
29         struct adf_accel_vf_info *vf_info = (struct adf_accel_vf_info *)data;
30         struct adf_pf2vf_resp *pf2vf_resp;
31
32         pf2vf_resp = kzalloc(sizeof(*pf2vf_resp), GFP_ATOMIC);
33         if (!pf2vf_resp)
34                 return;
35
36         pf2vf_resp->vf_info = vf_info;
37         INIT_WORK(&pf2vf_resp->pf2vf_resp_work, adf_iov_send_resp);
38         queue_work(pf2vf_resp_wq, &pf2vf_resp->pf2vf_resp_work);
39 }
40
41 static int adf_enable_sriov(struct adf_accel_dev *accel_dev)
42 {
43         struct pci_dev *pdev = accel_to_pci_dev(accel_dev);
44         int totalvfs = pci_sriov_get_totalvfs(pdev);
45         struct adf_hw_device_data *hw_data = accel_dev->hw_device;
46         struct adf_accel_vf_info *vf_info;
47         int i;
48
49         for (i = 0, vf_info = accel_dev->pf.vf_info; i < totalvfs;
50              i++, vf_info++) {
51                 /* This ptr will be populated when VFs will be created */
52                 vf_info->accel_dev = accel_dev;
53                 vf_info->vf_nr = i;
54
55                 tasklet_init(&vf_info->vf2pf_bh_tasklet,
56                              (void *)adf_vf2pf_bh_handler,
57                              (unsigned long)vf_info);
58                 mutex_init(&vf_info->pf2vf_lock);
59                 ratelimit_state_init(&vf_info->vf2pf_ratelimit,
60                                      DEFAULT_RATELIMIT_INTERVAL,
61                                      DEFAULT_RATELIMIT_BURST);
62         }
63
64         /* Set Valid bits in AE Thread to PCIe Function Mapping */
65         if (hw_data->configure_iov_threads)
66                 hw_data->configure_iov_threads(accel_dev, true);
67
68         /* Enable VF to PF interrupts for all VFs */
69         if (hw_data->get_pf2vf_offset)
70                 adf_enable_vf2pf_interrupts(accel_dev, BIT_ULL(totalvfs) - 1);
71
72         /*
73          * Due to the hardware design, when SR-IOV and the ring arbiter
74          * are enabled all the VFs supported in hardware must be enabled in
75          * order for all the hardware resources (i.e. bundles) to be usable.
76          * When SR-IOV is enabled, each of the VFs will own one bundle.
77          */
78         return pci_enable_sriov(pdev, totalvfs);
79 }
80
81 /**
82  * adf_disable_sriov() - Disable SRIOV for the device
83  * @accel_dev:  Pointer to accel device.
84  *
85  * Function disables SRIOV for the accel device.
86  *
87  * Return: 0 on success, error code otherwise.
88  */
89 void adf_disable_sriov(struct adf_accel_dev *accel_dev)
90 {
91         struct adf_hw_device_data *hw_data = accel_dev->hw_device;
92         int totalvfs = pci_sriov_get_totalvfs(accel_to_pci_dev(accel_dev));
93         struct adf_accel_vf_info *vf;
94         int i;
95
96         if (!accel_dev->pf.vf_info)
97                 return;
98
99         if (hw_data->get_pf2vf_offset)
100                 adf_pf2vf_notify_restarting(accel_dev);
101
102         pci_disable_sriov(accel_to_pci_dev(accel_dev));
103
104         /* Disable VF to PF interrupts */
105         if (hw_data->get_pf2vf_offset)
106                 adf_disable_vf2pf_interrupts(accel_dev, GENMASK(31, 0));
107
108         /* Clear Valid bits in AE Thread to PCIe Function Mapping */
109         if (hw_data->configure_iov_threads)
110                 hw_data->configure_iov_threads(accel_dev, false);
111
112         for (i = 0, vf = accel_dev->pf.vf_info; i < totalvfs; i++, vf++) {
113                 tasklet_disable(&vf->vf2pf_bh_tasklet);
114                 tasklet_kill(&vf->vf2pf_bh_tasklet);
115                 mutex_destroy(&vf->pf2vf_lock);
116         }
117
118         kfree(accel_dev->pf.vf_info);
119         accel_dev->pf.vf_info = NULL;
120 }
121 EXPORT_SYMBOL_GPL(adf_disable_sriov);
122
123 /**
124  * adf_sriov_configure() - Enable SRIOV for the device
125  * @pdev:  Pointer to PCI device.
126  * @numvfs: Number of virtual functions (VFs) to enable.
127  *
128  * Note that the @numvfs parameter is ignored and all VFs supported by the
129  * device are enabled due to the design of the hardware.
130  *
131  * Function enables SRIOV for the PCI device.
132  *
133  * Return: number of VFs enabled on success, error code otherwise.
134  */
135 int adf_sriov_configure(struct pci_dev *pdev, int numvfs)
136 {
137         struct adf_accel_dev *accel_dev = adf_devmgr_pci_to_accel_dev(pdev);
138         int totalvfs = pci_sriov_get_totalvfs(pdev);
139         unsigned long val;
140         int ret;
141
142         if (!accel_dev) {
143                 dev_err(&pdev->dev, "Failed to find accel_dev\n");
144                 return -EFAULT;
145         }
146
147         if (!iommu_present(&pci_bus_type))
148                 dev_warn(&pdev->dev, "IOMMU should be enabled for SR-IOV to work correctly\n");
149
150         if (accel_dev->pf.vf_info) {
151                 dev_info(&pdev->dev, "Already enabled for this device\n");
152                 return -EINVAL;
153         }
154
155         if (adf_dev_started(accel_dev)) {
156                 if (adf_devmgr_in_reset(accel_dev) ||
157                     adf_dev_in_use(accel_dev)) {
158                         dev_err(&GET_DEV(accel_dev), "Device busy\n");
159                         return -EBUSY;
160                 }
161
162                 adf_dev_stop(accel_dev);
163                 adf_dev_shutdown(accel_dev);
164         }
165
166         if (adf_cfg_section_add(accel_dev, ADF_KERNEL_SEC))
167                 return -EFAULT;
168         val = 0;
169         if (adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC,
170                                         ADF_NUM_CY, (void *)&val, ADF_DEC))
171                 return -EFAULT;
172
173         set_bit(ADF_STATUS_CONFIGURED, &accel_dev->status);
174
175         /* Allocate memory for VF info structs */
176         accel_dev->pf.vf_info = kcalloc(totalvfs,
177                                         sizeof(struct adf_accel_vf_info),
178                                         GFP_KERNEL);
179         if (!accel_dev->pf.vf_info)
180                 return -ENOMEM;
181
182         if (adf_dev_init(accel_dev)) {
183                 dev_err(&GET_DEV(accel_dev), "Failed to init qat_dev%d\n",
184                         accel_dev->accel_id);
185                 return -EFAULT;
186         }
187
188         if (adf_dev_start(accel_dev)) {
189                 dev_err(&GET_DEV(accel_dev), "Failed to start qat_dev%d\n",
190                         accel_dev->accel_id);
191                 return -EFAULT;
192         }
193
194         ret = adf_enable_sriov(accel_dev);
195         if (ret)
196                 return ret;
197
198         return numvfs;
199 }
200 EXPORT_SYMBOL_GPL(adf_sriov_configure);
201
202 int __init adf_init_pf_wq(void)
203 {
204         /* Workqueue for PF2VF responses */
205         pf2vf_resp_wq = alloc_workqueue("qat_pf2vf_resp_wq", WQ_MEM_RECLAIM, 0);
206
207         return !pf2vf_resp_wq ? -ENOMEM : 0;
208 }
209
210 void adf_exit_pf_wq(void)
211 {
212         if (pf2vf_resp_wq) {
213                 destroy_workqueue(pf2vf_resp_wq);
214                 pf2vf_resp_wq = NULL;
215         }
216 }