arch/x86/kvm/x86.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Kernel-based Virtual Machine driver for Linux
   4  *
   5  * derived from drivers/kvm/kvm_main.c
   6  *
   7  * Copyright (C) 2006 Qumranet, Inc.
   8  * Copyright (C) 2008 Qumranet, Inc.
   9  * Copyright IBM Corporation, 2008
  10  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  11  *
  12  * Authors:
  13  *   Avi Kivity   <avi@qumranet.com>
  14  *   Yaniv Kamay  <yaniv@qumranet.com>
  15  *   Amit Shah    <amit.shah@qumranet.com>
  16  *   Ben-Ami Yassour <benami@il.ibm.com>
  17  */
  18
  19 #include <linux/kvm_host.h>
  20 #include "irq.h"
  21 #include "ioapic.h"
  22 #include "mmu.h"
  23 #include "i8254.h"
  24 #include "tss.h"
  25 #include "kvm_cache_regs.h"
  26 #include "kvm_emulate.h"
  27 #include "x86.h"
  28 #include "cpuid.h"
  29 #include "pmu.h"
  30 #include "hyperv.h"
  31 #include "lapic.h"
  32 #include "xen.h"
  33
  34 #include <linux/clocksource.h>
  35 #include <linux/interrupt.h>
  36 #include <linux/kvm.h>
  37 #include <linux/fs.h>
  38 #include <linux/vmalloc.h>
  39 #include <linux/export.h>
  40 #include <linux/moduleparam.h>
  41 #include <linux/mman.h>
  42 #include <linux/highmem.h>
  43 #include <linux/iommu.h>
  44 #include <linux/intel-iommu.h>
  45 #include <linux/cpufreq.h>
  46 #include <linux/user-return-notifier.h>
  47 #include <linux/srcu.h>
  48 #include <linux/slab.h>
  49 #include <linux/perf_event.h>
  50 #include <linux/uaccess.h>
  51 #include <linux/hash.h>
  52 #include <linux/pci.h>
  53 #include <linux/timekeeper_internal.h>
  54 #include <linux/pvclock_gtod.h>
  55 #include <linux/kvm_irqfd.h>
  56 #include <linux/irqbypass.h>
  57 #include <linux/sched/stat.h>
  58 #include <linux/sched/isolation.h>
  59 #include <linux/mem_encrypt.h>
  60 #include <linux/entry-kvm.h>
  61
  62 #include <trace/events/kvm.h>
  63
  64 #include <asm/debugreg.h>
  65 #include <asm/msr.h>
  66 #include <asm/desc.h>
  67 #include <asm/mce.h>
  68 #include <linux/kernel_stat.h>
  69 #include <asm/fpu/internal.h> /* Ugh! */
  70 #include <asm/pvclock.h>
  71 #include <asm/div64.h>
  72 #include <asm/irq_remapping.h>
  73 #include <asm/mshyperv.h>
  74 #include <asm/hypervisor.h>
  75 #include <asm/tlbflush.h>
  76 #include <asm/intel_pt.h>
  77 #include <asm/emulate_prefix.h>
  78 #include <asm/sgx.h>
  79 #include <clocksource/hyperv_timer.h>
  80
  81 #define CREATE_TRACE_POINTS
  82 #include "trace.h"
  83
  84 #define MAX_IO_MSRS 256
  85 #define KVM_MAX_MCE_BANKS 32
  86 u64 __read_mostly kvm_mce_cap_supported = MCG_CTL_P | MCG_SER_P;
  87 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported);
  88
  89 #define emul_to_vcpu(ctxt) \
  90         ((struct kvm_vcpu *)(ctxt)->vcpu)
  91
  92 /* EFER defaults:
  93  * - enable syscall per default because its emulated by KVM
  94  * - enable LME and LMA per default on 64 bit KVM
  95  */
  96 #ifdef CONFIG_X86_64
  97 static
  98 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  99 #else
 100 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
 101 #endif
 102
 103 static u64 __read_mostly cr4_reserved_bits = CR4_RESERVED_BITS;
 104
 105 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
 106                                     KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
 107
 108 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
 109 static void process_nmi(struct kvm_vcpu *vcpu);
 110 static void process_smi(struct kvm_vcpu *vcpu);
 111 static void enter_smm(struct kvm_vcpu *vcpu);
 112 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
 113 static void store_regs(struct kvm_vcpu *vcpu);
 114 static int sync_regs(struct kvm_vcpu *vcpu);
 115
 116 struct kvm_x86_ops kvm_x86_ops __read_mostly;
 117 EXPORT_SYMBOL_GPL(kvm_x86_ops);
 118
 119 #define KVM_X86_OP(func)                                             \
 120         DEFINE_STATIC_CALL_NULL(kvm_x86_##func,                      \
 121                                 *(((struct kvm_x86_ops *)0)->func));
 122 #define KVM_X86_OP_NULL KVM_X86_OP
 123 #include <asm/kvm-x86-ops.h>
 124 EXPORT_STATIC_CALL_GPL(kvm_x86_get_cs_db_l_bits);
 125 EXPORT_STATIC_CALL_GPL(kvm_x86_cache_reg);
 126 EXPORT_STATIC_CALL_GPL(kvm_x86_tlb_flush_current);
 127
 128 static bool __read_mostly ignore_msrs = 0;
 129 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
 130
 131 bool __read_mostly report_ignored_msrs = true;
 132 module_param(report_ignored_msrs, bool, S_IRUGO | S_IWUSR);
 133 EXPORT_SYMBOL_GPL(report_ignored_msrs);
 134
 135 unsigned int min_timer_period_us = 200;
 136 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
 137
 138 static bool __read_mostly kvmclock_periodic_sync = true;
 139 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
 140
 141 bool __read_mostly kvm_has_tsc_control;
 142 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
 143 u32  __read_mostly kvm_max_guest_tsc_khz;
 144 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 145 u8   __read_mostly kvm_tsc_scaling_ratio_frac_bits;
 146 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits);
 147 u64  __read_mostly kvm_max_tsc_scaling_ratio;
 148 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio);
 149 u64 __read_mostly kvm_default_tsc_scaling_ratio;
 150 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio);
 151 bool __read_mostly kvm_has_bus_lock_exit;
 152 EXPORT_SYMBOL_GPL(kvm_has_bus_lock_exit);
 153
 154 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 155 static u32 __read_mostly tsc_tolerance_ppm = 250;
 156 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 157
 158 /*
 159  * lapic timer advance (tscdeadline mode only) in nanoseconds.  '-1' enables
 160  * adaptive tuning starting from default advancment of 1000ns.  '0' disables
 161  * advancement entirely.  Any other value is used as-is and disables adaptive
 162  * tuning, i.e. allows priveleged userspace to set an exact advancement time.
 163  */
 164 static int __read_mostly lapic_timer_advance_ns = -1;
 165 module_param(lapic_timer_advance_ns, int, S_IRUGO | S_IWUSR);
 166
 167 static bool __read_mostly vector_hashing = true;
 168 module_param(vector_hashing, bool, S_IRUGO);
 169
 170 bool __read_mostly enable_vmware_backdoor = false;
 171 module_param(enable_vmware_backdoor, bool, S_IRUGO);
 172 EXPORT_SYMBOL_GPL(enable_vmware_backdoor);
 173
 174 static bool __read_mostly force_emulation_prefix = false;
 175 module_param(force_emulation_prefix, bool, S_IRUGO);
 176
 177 int __read_mostly pi_inject_timer = -1;
 178 module_param(pi_inject_timer, bint, S_IRUGO | S_IWUSR);
 179
 180 /*
 181  * Restoring the host value for MSRs that are only consumed when running in
 182  * usermode, e.g. SYSCALL MSRs and TSC_AUX, can be deferred until the CPU
 183  * returns to userspace, i.e. the kernel can run with the guest's value.
 184  */
 185 #define KVM_MAX_NR_USER_RETURN_MSRS 16
 186
 187 struct kvm_user_return_msrs_global {
 188         int nr;
 189         u32 msrs[KVM_MAX_NR_USER_RETURN_MSRS];
 190 };
 191
 192 struct kvm_user_return_msrs {
 193         struct user_return_notifier urn;
 194         bool registered;
 195         struct kvm_user_return_msr_values {
 196                 u64 host;
 197                 u64 curr;
 198         } values[KVM_MAX_NR_USER_RETURN_MSRS];
 199 };
 200
 201 static struct kvm_user_return_msrs_global __read_mostly user_return_msrs_global;
 202 static struct kvm_user_return_msrs __percpu *user_return_msrs;
 203
 204 #define KVM_SUPPORTED_XCR0     (XFEATURE_MASK_FP | XFEATURE_MASK_SSE \
 205                                 | XFEATURE_MASK_YMM | XFEATURE_MASK_BNDREGS \
 206                                 | XFEATURE_MASK_BNDCSR | XFEATURE_MASK_AVX512 \
 207                                 | XFEATURE_MASK_PKRU)
 208
 209 u64 __read_mostly host_efer;
 210 EXPORT_SYMBOL_GPL(host_efer);
 211
 212 bool __read_mostly allow_smaller_maxphyaddr = 0;
 213 EXPORT_SYMBOL_GPL(allow_smaller_maxphyaddr);
 214
 215 u64 __read_mostly host_xss;
 216 EXPORT_SYMBOL_GPL(host_xss);
 217 u64 __read_mostly supported_xss;
 218 EXPORT_SYMBOL_GPL(supported_xss);
 219
 220 struct kvm_stats_debugfs_item debugfs_entries[] = {
 221         VCPU_STAT("pf_fixed", pf_fixed),
 222         VCPU_STAT("pf_guest", pf_guest),
 223         VCPU_STAT("tlb_flush", tlb_flush),
 224         VCPU_STAT("invlpg", invlpg),
 225         VCPU_STAT("exits", exits),
 226         VCPU_STAT("io_exits", io_exits),
 227         VCPU_STAT("mmio_exits", mmio_exits),
 228         VCPU_STAT("signal_exits", signal_exits),
 229         VCPU_STAT("irq_window", irq_window_exits),
 230         VCPU_STAT("nmi_window", nmi_window_exits),
 231         VCPU_STAT("halt_exits", halt_exits),
 232         VCPU_STAT("halt_successful_poll", halt_successful_poll),
 233         VCPU_STAT("halt_attempted_poll", halt_attempted_poll),
 234         VCPU_STAT("halt_poll_invalid", halt_poll_invalid),
 235         VCPU_STAT("halt_wakeup", halt_wakeup),
 236         VCPU_STAT("hypercalls", hypercalls),
 237         VCPU_STAT("request_irq", request_irq_exits),
 238         VCPU_STAT("irq_exits", irq_exits),
 239         VCPU_STAT("host_state_reload", host_state_reload),
 240         VCPU_STAT("fpu_reload", fpu_reload),
 241         VCPU_STAT("insn_emulation", insn_emulation),
 242         VCPU_STAT("insn_emulation_fail", insn_emulation_fail),
 243         VCPU_STAT("irq_injections", irq_injections),
 244         VCPU_STAT("nmi_injections", nmi_injections),
 245         VCPU_STAT("req_event", req_event),
 246         VCPU_STAT("l1d_flush", l1d_flush),
 247         VCPU_STAT("halt_poll_success_ns", halt_poll_success_ns),
 248         VCPU_STAT("halt_poll_fail_ns", halt_poll_fail_ns),
 249         VCPU_STAT("nested_run", nested_run),
 250         VCPU_STAT("directed_yield_attempted", directed_yield_attempted),
 251         VCPU_STAT("directed_yield_successful", directed_yield_successful),
 252         VM_STAT("mmu_shadow_zapped", mmu_shadow_zapped),
 253         VM_STAT("mmu_pte_write", mmu_pte_write),
 254         VM_STAT("mmu_pde_zapped", mmu_pde_zapped),
 255         VM_STAT("mmu_flooded", mmu_flooded),
 256         VM_STAT("mmu_recycled", mmu_recycled),
 257         VM_STAT("mmu_cache_miss", mmu_cache_miss),
 258         VM_STAT("mmu_unsync", mmu_unsync),
 259         VM_STAT("remote_tlb_flush", remote_tlb_flush),
 260         VM_STAT("largepages", lpages, .mode = 0444),
 261         VM_STAT("nx_largepages_splitted", nx_lpage_splits, .mode = 0444),
 262         VM_STAT("max_mmu_page_hash_collisions", max_mmu_page_hash_collisions),
 263         { NULL }
 264 };
 265
 266 u64 __read_mostly host_xcr0;
 267 u64 __read_mostly supported_xcr0;
 268 EXPORT_SYMBOL_GPL(supported_xcr0);
 269
 270 static struct kmem_cache *x86_fpu_cache;
 271
 272 static struct kmem_cache *x86_emulator_cache;
 273
 274 /*
 275  * When called, it means the previous get/set msr reached an invalid msr.
 276  * Return true if we want to ignore/silent this failed msr access.
 277  */
 278 static bool kvm_msr_ignored_check(struct kvm_vcpu *vcpu, u32 msr,
 279                                   u64 data, bool write)
 280 {
 281         const char *op = write ? "wrmsr" : "rdmsr";
 282
 283         if (ignore_msrs) {
 284                 if (report_ignored_msrs)
 285                         kvm_pr_unimpl("ignored %s: 0x%x data 0x%llx\n",
 286                                       op, msr, data);
 287                 /* Mask the error */
 288                 return true;
 289         } else {
 290                 kvm_debug_ratelimited("unhandled %s: 0x%x data 0x%llx\n",
 291                                       op, msr, data);
 292                 return false;
 293         }
 294 }
 295
 296 static struct kmem_cache *kvm_alloc_emulator_cache(void)
 297 {
 298         unsigned int useroffset = offsetof(struct x86_emulate_ctxt, src);
 299         unsigned int size = sizeof(struct x86_emulate_ctxt);
 300
 301         return kmem_cache_create_usercopy("x86_emulator", size,
 302                                           __alignof__(struct x86_emulate_ctxt),
 303                                           SLAB_ACCOUNT, useroffset,
 304                                           size - useroffset, NULL);
 305 }
 306
 307 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 308
 309 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 310 {
 311         int i;
 312         for (i = 0; i < ASYNC_PF_PER_VCPU; i++)
 313                 vcpu->arch.apf.gfns[i] = ~0;
 314 }
 315
 316 static void kvm_on_user_return(struct user_return_notifier *urn)
 317 {
 318         unsigned slot;
 319         struct kvm_user_return_msrs *msrs
 320                 = container_of(urn, struct kvm_user_return_msrs, urn);
 321         struct kvm_user_return_msr_values *values;
 322         unsigned long flags;
 323
 324         /*
 325          * Disabling irqs at this point since the following code could be
 326          * interrupted and executed through kvm_arch_hardware_disable()
 327          */
 328         local_irq_save(flags);
 329         if (msrs->registered) {
 330                 msrs->registered = false;
 331                 user_return_notifier_unregister(urn);
 332         }
 333         local_irq_restore(flags);
 334         for (slot = 0; slot < user_return_msrs_global.nr; ++slot) {
 335                 values = &msrs->values[slot];
 336                 if (values->host != values->curr) {
 337                         wrmsrl(user_return_msrs_global.msrs[slot], values->host);
 338                         values->curr = values->host;
 339                 }
 340         }
 341 }
 342
 343 void kvm_define_user_return_msr(unsigned slot, u32 msr)
 344 {
 345         BUG_ON(slot >= KVM_MAX_NR_USER_RETURN_MSRS);
 346         user_return_msrs_global.msrs[slot] = msr;
 347         if (slot >= user_return_msrs_global.nr)
 348                 user_return_msrs_global.nr = slot + 1;
 349 }
 350 EXPORT_SYMBOL_GPL(kvm_define_user_return_msr);
 351
 352 static void kvm_user_return_msr_cpu_online(void)
 353 {
 354         unsigned int cpu = smp_processor_id();
 355         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 356         u64 value;
 357         int i;
 358
 359         for (i = 0; i < user_return_msrs_global.nr; ++i) {
 360                 rdmsrl_safe(user_return_msrs_global.msrs[i], &value);
 361                 msrs->values[i].host = value;
 362                 msrs->values[i].curr = value;
 363         }
 364 }
 365
 366 int kvm_set_user_return_msr(unsigned slot, u64 value, u64 mask)
 367 {
 368         unsigned int cpu = smp_processor_id();
 369         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 370         int err;
 371
 372         value = (value & mask) | (msrs->values[slot].host & ~mask);
 373         if (value == msrs->values[slot].curr)
 374                 return 0;
 375         err = wrmsrl_safe(user_return_msrs_global.msrs[slot], value);
 376         if (err)
 377                 return 1;
 378
 379         msrs->values[slot].curr = value;
 380         if (!msrs->registered) {
 381                 msrs->urn.on_user_return = kvm_on_user_return;
 382                 user_return_notifier_register(&msrs->urn);
 383                 msrs->registered = true;
 384         }
 385         return 0;
 386 }
 387 EXPORT_SYMBOL_GPL(kvm_set_user_return_msr);
 388
 389 static void drop_user_return_notifiers(void)
 390 {
 391         unsigned int cpu = smp_processor_id();
 392         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 393
 394         if (msrs->registered)
 395                 kvm_on_user_return(&msrs->urn);
 396 }
 397
 398 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 399 {
 400         return vcpu->arch.apic_base;
 401 }
 402 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 403
 404 enum lapic_mode kvm_get_apic_mode(struct kvm_vcpu *vcpu)
 405 {
 406         return kvm_apic_mode(kvm_get_apic_base(vcpu));
 407 }
 408 EXPORT_SYMBOL_GPL(kvm_get_apic_mode);
 409
 410 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 411 {
 412         enum lapic_mode old_mode = kvm_get_apic_mode(vcpu);
 413         enum lapic_mode new_mode = kvm_apic_mode(msr_info->data);
 414         u64 reserved_bits = kvm_vcpu_reserved_gpa_bits_raw(vcpu) | 0x2ff |
 415                 (guest_cpuid_has(vcpu, X86_FEATURE_X2APIC) ? 0 : X2APIC_ENABLE);
 416
 417         if ((msr_info->data & reserved_bits) != 0 || new_mode == LAPIC_MODE_INVALID)
 418                 return 1;
 419         if (!msr_info->host_initiated) {
 420                 if (old_mode == LAPIC_MODE_X2APIC && new_mode == LAPIC_MODE_XAPIC)
 421                         return 1;
 422                 if (old_mode == LAPIC_MODE_DISABLED && new_mode == LAPIC_MODE_X2APIC)
 423                         return 1;
 424         }
 425
 426         kvm_lapic_set_base(vcpu, msr_info->data);
 427         kvm_recalculate_apic_map(vcpu->kvm);
 428         return 0;
 429 }
 430 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 431
 432 asmlinkage __visible noinstr void kvm_spurious_fault(void)
 433 {
 434         /* Fault while not rebooting.  We want the trace. */
 435         BUG_ON(!kvm_rebooting);
 436 }
 437 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 438
 439 #define EXCPT_BENIGN            0
 440 #define EXCPT_CONTRIBUTORY      1
 441 #define EXCPT_PF                2
 442
 443 static int exception_class(int vector)
 444 {
 445         switch (vector) {
 446         case PF_VECTOR:
 447                 return EXCPT_PF;
 448         case DE_VECTOR:
 449         case TS_VECTOR:
 450         case NP_VECTOR:
 451         case SS_VECTOR:
 452         case GP_VECTOR:
 453                 return EXCPT_CONTRIBUTORY;
 454         default:
 455                 break;
 456         }
 457         return EXCPT_BENIGN;
 458 }
 459
 460 #define EXCPT_FAULT             0
 461 #define EXCPT_TRAP              1
 462 #define EXCPT_ABORT             2
 463 #define EXCPT_INTERRUPT         3
 464
 465 static int exception_type(int vector)
 466 {
 467         unsigned int mask;
 468
 469         if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
 470                 return EXCPT_INTERRUPT;
 471
 472         mask = 1 << vector;
 473
 474         /* #DB is trap, as instruction watchpoints are handled elsewhere */
 475         if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
 476                 return EXCPT_TRAP;
 477
 478         if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
 479                 return EXCPT_ABORT;
 480
 481         /* Reserved exceptions will result in fault */
 482         return EXCPT_FAULT;
 483 }
 484
 485 void kvm_deliver_exception_payload(struct kvm_vcpu *vcpu)
 486 {
 487         unsigned nr = vcpu->arch.exception.nr;
 488         bool has_payload = vcpu->arch.exception.has_payload;
 489         unsigned long payload = vcpu->arch.exception.payload;
 490
 491         if (!has_payload)
 492                 return;
 493
 494         switch (nr) {
 495         case DB_VECTOR:
 496                 /*
 497                  * "Certain debug exceptions may clear bit 0-3.  The
 498                  * remaining contents of the DR6 register are never
 499                  * cleared by the processor".
 500                  */
 501                 vcpu->arch.dr6 &= ~DR_TRAP_BITS;
 502                 /*
 503                  * In order to reflect the #DB exception payload in guest
 504                  * dr6, three components need to be considered: active low
 505                  * bit, FIXED_1 bits and active high bits (e.g. DR6_BD,
 506                  * DR6_BS and DR6_BT)
 507                  * DR6_ACTIVE_LOW contains the FIXED_1 and active low bits.
 508                  * In the target guest dr6:
 509                  * FIXED_1 bits should always be set.
 510                  * Active low bits should be cleared if 1-setting in payload.
 511                  * Active high bits should be set if 1-setting in payload.
 512                  *
 513                  * Note, the payload is compatible with the pending debug
 514                  * exceptions/exit qualification under VMX, that active_low bits
 515                  * are active high in payload.
 516                  * So they need to be flipped for DR6.
 517                  */
 518                 vcpu->arch.dr6 |= DR6_ACTIVE_LOW;
 519                 vcpu->arch.dr6 |= payload;
 520                 vcpu->arch.dr6 ^= payload & DR6_ACTIVE_LOW;
 521
 522                 /*
 523                  * The #DB payload is defined as compatible with the 'pending
 524                  * debug exceptions' field under VMX, not DR6. While bit 12 is
 525                  * defined in the 'pending debug exceptions' field (enabled
 526                  * breakpoint), it is reserved and must be zero in DR6.
 527                  */
 528                 vcpu->arch.dr6 &= ~BIT(12);
 529                 break;
 530         case PF_VECTOR:
 531                 vcpu->arch.cr2 = payload;
 532                 break;
 533         }
 534
 535         vcpu->arch.exception.has_payload = false;
 536         vcpu->arch.exception.payload = 0;
 537 }
 538 EXPORT_SYMBOL_GPL(kvm_deliver_exception_payload);
 539
 540 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 541                 unsigned nr, bool has_error, u32 error_code,
 542                 bool has_payload, unsigned long payload, bool reinject)
 543 {
 544         u32 prev_nr;
 545         int class1, class2;
 546
 547         kvm_make_request(KVM_REQ_EVENT, vcpu);
 548
 549         if (!vcpu->arch.exception.pending && !vcpu->arch.exception.injected) {
 550         queue:
 551                 if (reinject) {
 552                         /*
 553                          * On vmentry, vcpu->arch.exception.pending is only
 554                          * true if an event injection was blocked by
 555                          * nested_run_pending.  In that case, however,
 556                          * vcpu_enter_guest requests an immediate exit,
 557                          * and the guest shouldn't proceed far enough to
 558                          * need reinjection.
 559                          */
 560                         WARN_ON_ONCE(vcpu->arch.exception.pending);
 561                         vcpu->arch.exception.injected = true;
 562                         if (WARN_ON_ONCE(has_payload)) {
 563                                 /*
 564                                  * A reinjected event has already
 565                                  * delivered its payload.
 566                                  */
 567                                 has_payload = false;
 568                                 payload = 0;
 569                         }
 570                 } else {
 571                         vcpu->arch.exception.pending = true;
 572                         vcpu->arch.exception.injected = false;
 573                 }
 574                 vcpu->arch.exception.has_error_code = has_error;
 575                 vcpu->arch.exception.nr = nr;
 576                 vcpu->arch.exception.error_code = error_code;
 577                 vcpu->arch.exception.has_payload = has_payload;
 578                 vcpu->arch.exception.payload = payload;
 579                 if (!is_guest_mode(vcpu))
 580                         kvm_deliver_exception_payload(vcpu);
 581                 return;
 582         }
 583
 584         /* to check exception */
 585         prev_nr = vcpu->arch.exception.nr;
 586         if (prev_nr == DF_VECTOR) {
 587                 /* triple fault -> shutdown */
 588                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 589                 return;
 590         }
 591         class1 = exception_class(prev_nr);
 592         class2 = exception_class(nr);
 593         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 594                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 595                 /*
 596                  * Generate double fault per SDM Table 5-5.  Set
 597                  * exception.pending = true so that the double fault
 598                  * can trigger a nested vmexit.
 599                  */
 600                 vcpu->arch.exception.pending = true;
 601                 vcpu->arch.exception.injected = false;
 602                 vcpu->arch.exception.has_error_code = true;
 603                 vcpu->arch.exception.nr = DF_VECTOR;
 604                 vcpu->arch.exception.error_code = 0;
 605                 vcpu->arch.exception.has_payload = false;
 606                 vcpu->arch.exception.payload = 0;
 607         } else
 608                 /* replace previous exception with a new one in a hope
 609                    that instruction re-execution will regenerate lost
 610                    exception */
 611                 goto queue;
 612 }
 613
 614 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 615 {
 616         kvm_multiple_exception(vcpu, nr, false, 0, false, 0, false);
 617 }
 618 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 619
 620 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 621 {
 622         kvm_multiple_exception(vcpu, nr, false, 0, false, 0, true);
 623 }
 624 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 625
 626 void kvm_queue_exception_p(struct kvm_vcpu *vcpu, unsigned nr,
 627                            unsigned long payload)
 628 {
 629         kvm_multiple_exception(vcpu, nr, false, 0, true, payload, false);
 630 }
 631 EXPORT_SYMBOL_GPL(kvm_queue_exception_p);
 632
 633 static void kvm_queue_exception_e_p(struct kvm_vcpu *vcpu, unsigned nr,
 634                                     u32 error_code, unsigned long payload)
 635 {
 636         kvm_multiple_exception(vcpu, nr, true, error_code,
 637                                true, payload, false);
 638 }
 639
 640 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 641 {
 642         if (err)
 643                 kvm_inject_gp(vcpu, 0);
 644         else
 645                 return kvm_skip_emulated_instruction(vcpu);
 646
 647         return 1;
 648 }
 649 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 650
 651 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 652 {
 653         ++vcpu->stat.pf_guest;
 654         vcpu->arch.exception.nested_apf =
 655                 is_guest_mode(vcpu) && fault->async_page_fault;
 656         if (vcpu->arch.exception.nested_apf) {
 657                 vcpu->arch.apf.nested_apf_token = fault->address;
 658                 kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 659         } else {
 660                 kvm_queue_exception_e_p(vcpu, PF_VECTOR, fault->error_code,
 661                                         fault->address);
 662         }
 663 }
 664 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 665
 666 bool kvm_inject_emulated_page_fault(struct kvm_vcpu *vcpu,
 667                                     struct x86_exception *fault)
 668 {
 669         struct kvm_mmu *fault_mmu;
 670         WARN_ON_ONCE(fault->vector != PF_VECTOR);
 671
 672         fault_mmu = fault->nested_page_fault ? vcpu->arch.mmu :
 673                                                vcpu->arch.walk_mmu;
 674
 675         /*
 676          * Invalidate the TLB entry for the faulting address, if it exists,
 677          * else the access will fault indefinitely (and to emulate hardware).
 678          */
 679         if ((fault->error_code & PFERR_PRESENT_MASK) &&
 680             !(fault->error_code & PFERR_RSVD_MASK))
 681                 kvm_mmu_invalidate_gva(vcpu, fault_mmu, fault->address,
 682                                        fault_mmu->root_hpa);
 683
 684         fault_mmu->inject_page_fault(vcpu, fault);
 685         return fault->nested_page_fault;
 686 }
 687 EXPORT_SYMBOL_GPL(kvm_inject_emulated_page_fault);
 688
 689 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 690 {
 691         atomic_inc(&vcpu->arch.nmi_queued);
 692         kvm_make_request(KVM_REQ_NMI, vcpu);
 693 }
 694 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 695
 696 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 697 {
 698         kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, false);
 699 }
 700 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 701
 702 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 703 {
 704         kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, true);
 705 }
 706 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 707
 708 /*
 709  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 710  * a #GP and return false.
 711  */
 712 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 713 {
 714         if (static_call(kvm_x86_get_cpl)(vcpu) <= required_cpl)
 715                 return true;
 716         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 717         return false;
 718 }
 719 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 720
 721 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
 722 {
 723         if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 724                 return true;
 725
 726         kvm_queue_exception(vcpu, UD_VECTOR);
 727         return false;
 728 }
 729 EXPORT_SYMBOL_GPL(kvm_require_dr);
 730
 731 /*
 732  * This function will be used to read from the physical memory of the currently
 733  * running guest. The difference to kvm_vcpu_read_guest_page is that this function
 734  * can read from guest physical or from the guest's guest physical memory.
 735  */
 736 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 737                             gfn_t ngfn, void *data, int offset, int len,
 738                             u32 access)
 739 {
 740         struct x86_exception exception;
 741         gfn_t real_gfn;
 742         gpa_t ngpa;
 743
 744         ngpa     = gfn_to_gpa(ngfn);
 745         real_gfn = mmu->translate_gpa(vcpu, ngpa, access, &exception);
 746         if (real_gfn == UNMAPPED_GVA)
 747                 return -EFAULT;
 748
 749         real_gfn = gpa_to_gfn(real_gfn);
 750
 751         return kvm_vcpu_read_guest_page(vcpu, real_gfn, data, offset, len);
 752 }
 753 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 754
 755 static int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 756                                void *data, int offset, int len, u32 access)
 757 {
 758         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 759                                        data, offset, len, access);
 760 }
 761
 762 static inline u64 pdptr_rsvd_bits(struct kvm_vcpu *vcpu)
 763 {
 764         return vcpu->arch.reserved_gpa_bits | rsvd_bits(5, 8) | rsvd_bits(1, 2);
 765 }
 766
 767 /*
 768  * Load the pae pdptrs.  Return 1 if they are all valid, 0 otherwise.
 769  */
 770 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 771 {
 772         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 773         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 774         int i;
 775         int ret;
 776         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 777
 778         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 779                                       offset * sizeof(u64), sizeof(pdpte),
 780                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 781         if (ret < 0) {
 782                 ret = 0;
 783                 goto out;
 784         }
 785         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 786                 if ((pdpte[i] & PT_PRESENT_MASK) &&
 787                     (pdpte[i] & pdptr_rsvd_bits(vcpu))) {
 788                         ret = 0;
 789                         goto out;
 790                 }
 791         }
 792         ret = 1;
 793
 794         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 795         kvm_register_mark_dirty(vcpu, VCPU_EXREG_PDPTR);
 796
 797 out:
 798
 799         return ret;
 800 }
 801 EXPORT_SYMBOL_GPL(load_pdptrs);
 802
 803 bool pdptrs_changed(struct kvm_vcpu *vcpu)
 804 {
 805         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 806         int offset;
 807         gfn_t gfn;
 808         int r;
 809
 810         if (!is_pae_paging(vcpu))
 811                 return false;
 812
 813         if (!kvm_register_is_available(vcpu, VCPU_EXREG_PDPTR))
 814                 return true;
 815
 816         gfn = (kvm_read_cr3(vcpu) & 0xffffffe0ul) >> PAGE_SHIFT;
 817         offset = (kvm_read_cr3(vcpu) & 0xffffffe0ul) & (PAGE_SIZE - 1);
 818         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 819                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 820         if (r < 0)
 821                 return true;
 822
 823         return memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 824 }
 825 EXPORT_SYMBOL_GPL(pdptrs_changed);
 826
 827 void kvm_post_set_cr0(struct kvm_vcpu *vcpu, unsigned long old_cr0, unsigned long cr0)
 828 {
 829         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP;
 830
 831         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 832                 kvm_clear_async_pf_completion_queue(vcpu);
 833                 kvm_async_pf_hash_reset(vcpu);
 834         }
 835
 836         if ((cr0 ^ old_cr0) & update_bits)
 837                 kvm_mmu_reset_context(vcpu);
 838
 839         if (((cr0 ^ old_cr0) & X86_CR0_CD) &&
 840             kvm_arch_has_noncoherent_dma(vcpu->kvm) &&
 841             !kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
 842                 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
 843 }
 844 EXPORT_SYMBOL_GPL(kvm_post_set_cr0);
 845
 846 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 847 {
 848         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 849         unsigned long pdptr_bits = X86_CR0_CD | X86_CR0_NW | X86_CR0_PG;
 850
 851         cr0 |= X86_CR0_ET;
 852
 853 #ifdef CONFIG_X86_64
 854         if (cr0 & 0xffffffff00000000UL)
 855                 return 1;
 856 #endif
 857
 858         cr0 &= ~CR0_RESERVED_BITS;
 859
 860         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 861                 return 1;
 862
 863         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 864                 return 1;
 865
 866 #ifdef CONFIG_X86_64
 867         if ((vcpu->arch.efer & EFER_LME) && !is_paging(vcpu) &&
 868             (cr0 & X86_CR0_PG)) {
 869                 int cs_db, cs_l;
 870
 871                 if (!is_pae(vcpu))
 872                         return 1;
 873                 static_call(kvm_x86_get_cs_db_l_bits)(vcpu, &cs_db, &cs_l);
 874                 if (cs_l)
 875                         return 1;
 876         }
 877 #endif
 878         if (!(vcpu->arch.efer & EFER_LME) && (cr0 & X86_CR0_PG) &&
 879             is_pae(vcpu) && ((cr0 ^ old_cr0) & pdptr_bits) &&
 880             !load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu)))
 881                 return 1;
 882
 883         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
 884                 return 1;
 885
 886         static_call(kvm_x86_set_cr0)(vcpu, cr0);
 887
 888         kvm_post_set_cr0(vcpu, old_cr0, cr0);
 889
 890         return 0;
 891 }
 892 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 893
 894 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 895 {
 896         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 897 }
 898 EXPORT_SYMBOL_GPL(kvm_lmsw);
 899
 900 void kvm_load_guest_xsave_state(struct kvm_vcpu *vcpu)
 901 {
 902         if (vcpu->arch.guest_state_protected)
 903                 return;
 904
 905         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE)) {
 906
 907                 if (vcpu->arch.xcr0 != host_xcr0)
 908                         xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 909
 910                 if (vcpu->arch.xsaves_enabled &&
 911                     vcpu->arch.ia32_xss != host_xss)
 912                         wrmsrl(MSR_IA32_XSS, vcpu->arch.ia32_xss);
 913         }
 914
 915         if (static_cpu_has(X86_FEATURE_PKU) &&
 916             (kvm_read_cr4_bits(vcpu, X86_CR4_PKE) ||
 917              (vcpu->arch.xcr0 & XFEATURE_MASK_PKRU)) &&
 918             vcpu->arch.pkru != vcpu->arch.host_pkru)
 919                 __write_pkru(vcpu->arch.pkru);
 920 }
 921 EXPORT_SYMBOL_GPL(kvm_load_guest_xsave_state);
 922
 923 void kvm_load_host_xsave_state(struct kvm_vcpu *vcpu)
 924 {
 925         if (vcpu->arch.guest_state_protected)
 926                 return;
 927
 928         if (static_cpu_has(X86_FEATURE_PKU) &&
 929             (kvm_read_cr4_bits(vcpu, X86_CR4_PKE) ||
 930              (vcpu->arch.xcr0 & XFEATURE_MASK_PKRU))) {
 931                 vcpu->arch.pkru = rdpkru();
 932                 if (vcpu->arch.pkru != vcpu->arch.host_pkru)
 933                         __write_pkru(vcpu->arch.host_pkru);
 934         }
 935
 936         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE)) {
 937
 938                 if (vcpu->arch.xcr0 != host_xcr0)
 939                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
 940
 941                 if (vcpu->arch.xsaves_enabled &&
 942                     vcpu->arch.ia32_xss != host_xss)
 943                         wrmsrl(MSR_IA32_XSS, host_xss);
 944         }
 945
 946 }
 947 EXPORT_SYMBOL_GPL(kvm_load_host_xsave_state);
 948
 949 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 950 {
 951         u64 xcr0 = xcr;
 952         u64 old_xcr0 = vcpu->arch.xcr0;
 953         u64 valid_bits;
 954
 955         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 956         if (index != XCR_XFEATURE_ENABLED_MASK)
 957                 return 1;
 958         if (!(xcr0 & XFEATURE_MASK_FP))
 959                 return 1;
 960         if ((xcr0 & XFEATURE_MASK_YMM) && !(xcr0 & XFEATURE_MASK_SSE))
 961                 return 1;
 962
 963         /*
 964          * Do not allow the guest to set bits that we do not support
 965          * saving.  However, xcr0 bit 0 is always set, even if the
 966          * emulated CPU does not support XSAVE (see fx_init).
 967          */
 968         valid_bits = vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FP;
 969         if (xcr0 & ~valid_bits)
 970                 return 1;
 971
 972         if ((!(xcr0 & XFEATURE_MASK_BNDREGS)) !=
 973             (!(xcr0 & XFEATURE_MASK_BNDCSR)))
 974                 return 1;
 975
 976         if (xcr0 & XFEATURE_MASK_AVX512) {
 977                 if (!(xcr0 & XFEATURE_MASK_YMM))
 978                         return 1;
 979                 if ((xcr0 & XFEATURE_MASK_AVX512) != XFEATURE_MASK_AVX512)
 980                         return 1;
 981         }
 982         vcpu->arch.xcr0 = xcr0;
 983
 984         if ((xcr0 ^ old_xcr0) & XFEATURE_MASK_EXTEND)
 985                 kvm_update_cpuid_runtime(vcpu);
 986         return 0;
 987 }
 988
 989 int kvm_emulate_xsetbv(struct kvm_vcpu *vcpu)
 990 {
 991         if (static_call(kvm_x86_get_cpl)(vcpu) != 0 ||
 992             __kvm_set_xcr(vcpu, kvm_rcx_read(vcpu), kvm_read_edx_eax(vcpu))) {
 993                 kvm_inject_gp(vcpu, 0);
 994                 return 1;
 995         }
 996
 997         return kvm_skip_emulated_instruction(vcpu);
 998 }
 999 EXPORT_SYMBOL_GPL(kvm_emulate_xsetbv);
1000
1001 bool kvm_is_valid_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
1002 {
1003         if (cr4 & cr4_reserved_bits)
1004                 return false;
1005
1006         if (cr4 & vcpu->arch.cr4_guest_rsvd_bits)
1007                 return false;
1008
1009         return static_call(kvm_x86_is_valid_cr4)(vcpu, cr4);
1010 }
1011 EXPORT_SYMBOL_GPL(kvm_is_valid_cr4);
1012
1013 void kvm_post_set_cr4(struct kvm_vcpu *vcpu, unsigned long old_cr4, unsigned long cr4)
1014 {
1015         unsigned long mmu_role_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
1016                                       X86_CR4_SMEP | X86_CR4_SMAP | X86_CR4_PKE;
1017
1018         if (((cr4 ^ old_cr4) & mmu_role_bits) ||
1019             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
1020                 kvm_mmu_reset_context(vcpu);
1021 }
1022 EXPORT_SYMBOL_GPL(kvm_post_set_cr4);
1023
1024 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
1025 {
1026         unsigned long old_cr4 = kvm_read_cr4(vcpu);
1027         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
1028                                    X86_CR4_SMEP;
1029
1030         if (!kvm_is_valid_cr4(vcpu, cr4))
1031                 return 1;
1032
1033         if (is_long_mode(vcpu)) {
1034                 if (!(cr4 & X86_CR4_PAE))
1035                         return 1;
1036                 if ((cr4 ^ old_cr4) & X86_CR4_LA57)
1037                         return 1;
1038         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
1039                    && ((cr4 ^ old_cr4) & pdptr_bits)
1040                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
1041                                    kvm_read_cr3(vcpu)))
1042                 return 1;
1043
1044         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
1045                 if (!guest_cpuid_has(vcpu, X86_FEATURE_PCID))
1046                         return 1;
1047
1048                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
1049                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
1050                         return 1;
1051         }
1052
1053         static_call(kvm_x86_set_cr4)(vcpu, cr4);
1054
1055         kvm_post_set_cr4(vcpu, old_cr4, cr4);
1056
1057         return 0;
1058 }
1059 EXPORT_SYMBOL_GPL(kvm_set_cr4);
1060
1061 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
1062 {
1063         bool skip_tlb_flush = false;
1064 #ifdef CONFIG_X86_64
1065         bool pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
1066
1067         if (pcid_enabled) {
1068                 skip_tlb_flush = cr3 & X86_CR3_PCID_NOFLUSH;
1069                 cr3 &= ~X86_CR3_PCID_NOFLUSH;
1070         }
1071 #endif
1072
1073         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
1074                 if (!skip_tlb_flush) {
1075                         kvm_mmu_sync_roots(vcpu);
1076                         kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
1077                 }
1078                 return 0;
1079         }
1080
1081         if (is_long_mode(vcpu) && kvm_vcpu_is_illegal_gpa(vcpu, cr3))
1082                 return 1;
1083         else if (is_pae_paging(vcpu) &&
1084                  !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
1085                 return 1;
1086
1087         kvm_mmu_new_pgd(vcpu, cr3, skip_tlb_flush, skip_tlb_flush);
1088         vcpu->arch.cr3 = cr3;
1089         kvm_register_mark_available(vcpu, VCPU_EXREG_CR3);
1090
1091         return 0;
1092 }
1093 EXPORT_SYMBOL_GPL(kvm_set_cr3);
1094
1095 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
1096 {
1097         if (cr8 & CR8_RESERVED_BITS)
1098                 return 1;
1099         if (lapic_in_kernel(vcpu))
1100                 kvm_lapic_set_tpr(vcpu, cr8);
1101         else
1102                 vcpu->arch.cr8 = cr8;
1103         return 0;
1104 }
1105 EXPORT_SYMBOL_GPL(kvm_set_cr8);
1106
1107 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
1108 {
1109         if (lapic_in_kernel(vcpu))
1110                 return kvm_lapic_get_cr8(vcpu);
1111         else
1112                 return vcpu->arch.cr8;
1113 }
1114 EXPORT_SYMBOL_GPL(kvm_get_cr8);
1115
1116 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
1117 {
1118         int i;
1119
1120         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
1121                 for (i = 0; i < KVM_NR_DB_REGS; i++)
1122                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
1123                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_RELOAD;
1124         }
1125 }
1126
1127 void kvm_update_dr7(struct kvm_vcpu *vcpu)
1128 {
1129         unsigned long dr7;
1130
1131         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
1132                 dr7 = vcpu->arch.guest_debug_dr7;
1133         else
1134                 dr7 = vcpu->arch.dr7;
1135         static_call(kvm_x86_set_dr7)(vcpu, dr7);
1136         vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
1137         if (dr7 & DR7_BP_EN_MASK)
1138                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
1139 }
1140 EXPORT_SYMBOL_GPL(kvm_update_dr7);
1141
1142 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
1143 {
1144         u64 fixed = DR6_FIXED_1;
1145
1146         if (!guest_cpuid_has(vcpu, X86_FEATURE_RTM))
1147                 fixed |= DR6_RTM;
1148         return fixed;
1149 }
1150
1151 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
1152 {
1153         size_t size = ARRAY_SIZE(vcpu->arch.db);
1154
1155         switch (dr) {
1156         case 0 ... 3:
1157                 vcpu->arch.db[array_index_nospec(dr, size)] = val;
1158                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
1159                         vcpu->arch.eff_db[dr] = val;
1160                 break;
1161         case 4:
1162         case 6:
1163                 if (!kvm_dr6_valid(val))
1164                         return 1; /* #GP */
1165                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
1166                 break;
1167         case 5:
1168         default: /* 7 */
1169                 if (!kvm_dr7_valid(val))
1170                         return 1; /* #GP */
1171                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
1172                 kvm_update_dr7(vcpu);
1173                 break;
1174         }
1175
1176         return 0;
1177 }
1178 EXPORT_SYMBOL_GPL(kvm_set_dr);
1179
1180 void kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
1181 {
1182         size_t size = ARRAY_SIZE(vcpu->arch.db);
1183
1184         switch (dr) {
1185         case 0 ... 3:
1186                 *val = vcpu->arch.db[array_index_nospec(dr, size)];
1187                 break;
1188         case 4:
1189         case 6:
1190                 *val = vcpu->arch.dr6;
1191                 break;
1192         case 5:
1193         default: /* 7 */
1194                 *val = vcpu->arch.dr7;
1195                 break;
1196         }
1197 }
1198 EXPORT_SYMBOL_GPL(kvm_get_dr);
1199
1200 int kvm_emulate_rdpmc(struct kvm_vcpu *vcpu)
1201 {
1202         u32 ecx = kvm_rcx_read(vcpu);
1203         u64 data;
1204
1205         if (kvm_pmu_rdpmc(vcpu, ecx, &data)) {
1206                 kvm_inject_gp(vcpu, 0);
1207                 return 1;
1208         }
1209
1210         kvm_rax_write(vcpu, (u32)data);
1211         kvm_rdx_write(vcpu, data >> 32);
1212         return kvm_skip_emulated_instruction(vcpu);
1213 }
1214 EXPORT_SYMBOL_GPL(kvm_emulate_rdpmc);
1215
1216 /*
1217  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
1218  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
1219  *
1220  * The three MSR lists(msrs_to_save, emulated_msrs, msr_based_features)
1221  * extract the supported MSRs from the related const lists.
1222  * msrs_to_save is selected from the msrs_to_save_all to reflect the
1223  * capabilities of the host cpu. This capabilities test skips MSRs that are
1224  * kvm-specific. Those are put in emulated_msrs_all; filtering of emulated_msrs
1225  * may depend on host virtualization features rather than host cpu features.
1226  */
1227
1228 static const u32 msrs_to_save_all[] = {
1229         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
1230         MSR_STAR,
1231 #ifdef CONFIG_X86_64
1232         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
1233 #endif
1234         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
1235         MSR_IA32_FEAT_CTL, MSR_IA32_BNDCFGS, MSR_TSC_AUX,
1236         MSR_IA32_SPEC_CTRL,
1237         MSR_IA32_RTIT_CTL, MSR_IA32_RTIT_STATUS, MSR_IA32_RTIT_CR3_MATCH,
1238         MSR_IA32_RTIT_OUTPUT_BASE, MSR_IA32_RTIT_OUTPUT_MASK,
1239         MSR_IA32_RTIT_ADDR0_A, MSR_IA32_RTIT_ADDR0_B,
1240         MSR_IA32_RTIT_ADDR1_A, MSR_IA32_RTIT_ADDR1_B,
1241         MSR_IA32_RTIT_ADDR2_A, MSR_IA32_RTIT_ADDR2_B,
1242         MSR_IA32_RTIT_ADDR3_A, MSR_IA32_RTIT_ADDR3_B,
1243         MSR_IA32_UMWAIT_CONTROL,
1244
1245         MSR_ARCH_PERFMON_FIXED_CTR0, MSR_ARCH_PERFMON_FIXED_CTR1,
1246         MSR_ARCH_PERFMON_FIXED_CTR0 + 2, MSR_ARCH_PERFMON_FIXED_CTR0 + 3,
1247         MSR_CORE_PERF_FIXED_CTR_CTRL, MSR_CORE_PERF_GLOBAL_STATUS,
1248         MSR_CORE_PERF_GLOBAL_CTRL, MSR_CORE_PERF_GLOBAL_OVF_CTRL,
1249         MSR_ARCH_PERFMON_PERFCTR0, MSR_ARCH_PERFMON_PERFCTR1,
1250         MSR_ARCH_PERFMON_PERFCTR0 + 2, MSR_ARCH_PERFMON_PERFCTR0 + 3,
1251         MSR_ARCH_PERFMON_PERFCTR0 + 4, MSR_ARCH_PERFMON_PERFCTR0 + 5,
1252         MSR_ARCH_PERFMON_PERFCTR0 + 6, MSR_ARCH_PERFMON_PERFCTR0 + 7,
1253         MSR_ARCH_PERFMON_PERFCTR0 + 8, MSR_ARCH_PERFMON_PERFCTR0 + 9,
1254         MSR_ARCH_PERFMON_PERFCTR0 + 10, MSR_ARCH_PERFMON_PERFCTR0 + 11,
1255         MSR_ARCH_PERFMON_PERFCTR0 + 12, MSR_ARCH_PERFMON_PERFCTR0 + 13,
1256         MSR_ARCH_PERFMON_PERFCTR0 + 14, MSR_ARCH_PERFMON_PERFCTR0 + 15,
1257         MSR_ARCH_PERFMON_PERFCTR0 + 16, MSR_ARCH_PERFMON_PERFCTR0 + 17,
1258         MSR_ARCH_PERFMON_EVENTSEL0, MSR_ARCH_PERFMON_EVENTSEL1,
1259         MSR_ARCH_PERFMON_EVENTSEL0 + 2, MSR_ARCH_PERFMON_EVENTSEL0 + 3,
1260         MSR_ARCH_PERFMON_EVENTSEL0 + 4, MSR_ARCH_PERFMON_EVENTSEL0 + 5,
1261         MSR_ARCH_PERFMON_EVENTSEL0 + 6, MSR_ARCH_PERFMON_EVENTSEL0 + 7,
1262         MSR_ARCH_PERFMON_EVENTSEL0 + 8, MSR_ARCH_PERFMON_EVENTSEL0 + 9,
1263         MSR_ARCH_PERFMON_EVENTSEL0 + 10, MSR_ARCH_PERFMON_EVENTSEL0 + 11,
1264         MSR_ARCH_PERFMON_EVENTSEL0 + 12, MSR_ARCH_PERFMON_EVENTSEL0 + 13,
1265         MSR_ARCH_PERFMON_EVENTSEL0 + 14, MSR_ARCH_PERFMON_EVENTSEL0 + 15,
1266         MSR_ARCH_PERFMON_EVENTSEL0 + 16, MSR_ARCH_PERFMON_EVENTSEL0 + 17,
1267 };
1268
1269 static u32 msrs_to_save[ARRAY_SIZE(msrs_to_save_all)];
1270 static unsigned num_msrs_to_save;
1271
1272 static const u32 emulated_msrs_all[] = {
1273         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
1274         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
1275         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
1276         HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
1277         HV_X64_MSR_TSC_FREQUENCY, HV_X64_MSR_APIC_FREQUENCY,
1278         HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
1279         HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
1280         HV_X64_MSR_RESET,
1281         HV_X64_MSR_VP_INDEX,
1282         HV_X64_MSR_VP_RUNTIME,
1283         HV_X64_MSR_SCONTROL,
1284         HV_X64_MSR_STIMER0_CONFIG,
1285         HV_X64_MSR_VP_ASSIST_PAGE,
1286         HV_X64_MSR_REENLIGHTENMENT_CONTROL, HV_X64_MSR_TSC_EMULATION_CONTROL,
1287         HV_X64_MSR_TSC_EMULATION_STATUS,
1288         HV_X64_MSR_SYNDBG_OPTIONS,
1289         HV_X64_MSR_SYNDBG_CONTROL, HV_X64_MSR_SYNDBG_STATUS,
1290         HV_X64_MSR_SYNDBG_SEND_BUFFER, HV_X64_MSR_SYNDBG_RECV_BUFFER,
1291         HV_X64_MSR_SYNDBG_PENDING_BUFFER,
1292
1293         MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
1294         MSR_KVM_PV_EOI_EN, MSR_KVM_ASYNC_PF_INT, MSR_KVM_ASYNC_PF_ACK,
1295
1296         MSR_IA32_TSC_ADJUST,
1297         MSR_IA32_TSCDEADLINE,
1298         MSR_IA32_ARCH_CAPABILITIES,
1299         MSR_IA32_PERF_CAPABILITIES,
1300         MSR_IA32_MISC_ENABLE,
1301         MSR_IA32_MCG_STATUS,
1302         MSR_IA32_MCG_CTL,
1303         MSR_IA32_MCG_EXT_CTL,
1304         MSR_IA32_SMBASE,
1305         MSR_SMI_COUNT,
1306         MSR_PLATFORM_INFO,
1307         MSR_MISC_FEATURES_ENABLES,
1308         MSR_AMD64_VIRT_SPEC_CTRL,
1309         MSR_IA32_POWER_CTL,
1310         MSR_IA32_UCODE_REV,
1311
1312         /*
1313          * The following list leaves out MSRs whose values are determined
1314          * by arch/x86/kvm/vmx/nested.c based on CPUID or other MSRs.
1315          * We always support the "true" VMX control MSRs, even if the host
1316          * processor does not, so I am putting these registers here rather
1317          * than in msrs_to_save_all.
1318          */
1319         MSR_IA32_VMX_BASIC,
1320         MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1321         MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1322         MSR_IA32_VMX_TRUE_EXIT_CTLS,
1323         MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1324         MSR_IA32_VMX_MISC,
1325         MSR_IA32_VMX_CR0_FIXED0,
1326         MSR_IA32_VMX_CR4_FIXED0,
1327         MSR_IA32_VMX_VMCS_ENUM,
1328         MSR_IA32_VMX_PROCBASED_CTLS2,
1329         MSR_IA32_VMX_EPT_VPID_CAP,
1330         MSR_IA32_VMX_VMFUNC,
1331
1332         MSR_K7_HWCR,
1333         MSR_KVM_POLL_CONTROL,
1334 };
1335
1336 static u32 emulated_msrs[ARRAY_SIZE(emulated_msrs_all)];
1337 static unsigned num_emulated_msrs;
1338
1339 /*
1340  * List of msr numbers which are used to expose MSR-based features that
1341  * can be used by a hypervisor to validate requested CPU features.
1342  */
1343 static const u32 msr_based_features_all[] = {
1344         MSR_IA32_VMX_BASIC,
1345         MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1346         MSR_IA32_VMX_PINBASED_CTLS,
1347         MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1348         MSR_IA32_VMX_PROCBASED_CTLS,
1349         MSR_IA32_VMX_TRUE_EXIT_CTLS,
1350         MSR_IA32_VMX_EXIT_CTLS,
1351         MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1352         MSR_IA32_VMX_ENTRY_CTLS,
1353         MSR_IA32_VMX_MISC,
1354         MSR_IA32_VMX_CR0_FIXED0,
1355         MSR_IA32_VMX_CR0_FIXED1,
1356         MSR_IA32_VMX_CR4_FIXED0,
1357         MSR_IA32_VMX_CR4_FIXED1,
1358         MSR_IA32_VMX_VMCS_ENUM,
1359         MSR_IA32_VMX_PROCBASED_CTLS2,
1360         MSR_IA32_VMX_EPT_VPID_CAP,
1361         MSR_IA32_VMX_VMFUNC,
1362
1363         MSR_F10H_DECFG,
1364         MSR_IA32_UCODE_REV,
1365         MSR_IA32_ARCH_CAPABILITIES,
1366         MSR_IA32_PERF_CAPABILITIES,
1367 };
1368
1369 static u32 msr_based_features[ARRAY_SIZE(msr_based_features_all)];
1370 static unsigned int num_msr_based_features;
1371
1372 static u64 kvm_get_arch_capabilities(void)
1373 {
1374         u64 data = 0;
1375
1376         if (boot_cpu_has(X86_FEATURE_ARCH_CAPABILITIES))
1377                 rdmsrl(MSR_IA32_ARCH_CAPABILITIES, data);
1378
1379         /*
1380          * If nx_huge_pages is enabled, KVM's shadow paging will ensure that
1381          * the nested hypervisor runs with NX huge pages.  If it is not,
1382          * L1 is anyway vulnerable to ITLB_MULTIHIT explots from other
1383          * L1 guests, so it need not worry about its own (L2) guests.
1384          */
1385         data |= ARCH_CAP_PSCHANGE_MC_NO;
1386
1387         /*
1388          * If we're doing cache flushes (either "always" or "cond")
1389          * we will do one whenever the guest does a vmlaunch/vmresume.
1390          * If an outer hypervisor is doing the cache flush for us
1391          * (VMENTER_L1D_FLUSH_NESTED_VM), we can safely pass that
1392          * capability to the guest too, and if EPT is disabled we're not
1393          * vulnerable.  Overall, only VMENTER_L1D_FLUSH_NEVER will
1394          * require a nested hypervisor to do a flush of its own.
1395          */
1396         if (l1tf_vmx_mitigation != VMENTER_L1D_FLUSH_NEVER)
1397                 data |= ARCH_CAP_SKIP_VMENTRY_L1DFLUSH;
1398
1399         if (!boot_cpu_has_bug(X86_BUG_CPU_MELTDOWN))
1400                 data |= ARCH_CAP_RDCL_NO;
1401         if (!boot_cpu_has_bug(X86_BUG_SPEC_STORE_BYPASS))
1402                 data |= ARCH_CAP_SSB_NO;
1403         if (!boot_cpu_has_bug(X86_BUG_MDS))
1404                 data |= ARCH_CAP_MDS_NO;
1405
1406         if (!boot_cpu_has(X86_FEATURE_RTM)) {
1407                 /*
1408                  * If RTM=0 because the kernel has disabled TSX, the host might
1409                  * have TAA_NO or TSX_CTRL.  Clear TAA_NO (the guest sees RTM=0
1410                  * and therefore knows that there cannot be TAA) but keep
1411                  * TSX_CTRL: some buggy userspaces leave it set on tsx=on hosts,
1412                  * and we want to allow migrating those guests to tsx=off hosts.
1413                  */
1414                 data &= ~ARCH_CAP_TAA_NO;
1415         } else if (!boot_cpu_has_bug(X86_BUG_TAA)) {
1416                 data |= ARCH_CAP_TAA_NO;
1417         } else {
1418                 /*
1419                  * Nothing to do here; we emulate TSX_CTRL if present on the
1420                  * host so the guest can choose between disabling TSX or
1421                  * using VERW to clear CPU buffers.
1422                  */
1423         }
1424
1425         return data;
1426 }
1427
1428 static int kvm_get_msr_feature(struct kvm_msr_entry *msr)
1429 {
1430         switch (msr->index) {
1431         case MSR_IA32_ARCH_CAPABILITIES:
1432                 msr->data = kvm_get_arch_capabilities();
1433                 break;
1434         case MSR_IA32_UCODE_REV:
1435                 rdmsrl_safe(msr->index, &msr->data);
1436                 break;
1437         default:
1438                 return static_call(kvm_x86_get_msr_feature)(msr);
1439         }
1440         return 0;
1441 }
1442
1443 static int do_get_msr_feature(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1444 {
1445         struct kvm_msr_entry msr;
1446         int r;
1447
1448         msr.index = index;
1449         r = kvm_get_msr_feature(&msr);
1450
1451         if (r == KVM_MSR_RET_INVALID) {
1452                 /* Unconditionally clear the output for simplicity */
1453                 *data = 0;
1454                 if (kvm_msr_ignored_check(vcpu, index, 0, false))
1455                         r = 0;
1456         }
1457
1458         if (r)
1459                 return r;
1460
1461         *data = msr.data;
1462
1463         return 0;
1464 }
1465
1466 static bool __kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1467 {
1468         if (efer & EFER_FFXSR && !guest_cpuid_has(vcpu, X86_FEATURE_FXSR_OPT))
1469                 return false;
1470
1471         if (efer & EFER_SVME && !guest_cpuid_has(vcpu, X86_FEATURE_SVM))
1472                 return false;
1473
1474         if (efer & (EFER_LME | EFER_LMA) &&
1475             !guest_cpuid_has(vcpu, X86_FEATURE_LM))
1476                 return false;
1477
1478         if (efer & EFER_NX && !guest_cpuid_has(vcpu, X86_FEATURE_NX))
1479                 return false;
1480
1481         return true;
1482
1483 }
1484 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1485 {
1486         if (efer & efer_reserved_bits)
1487                 return false;
1488
1489         return __kvm_valid_efer(vcpu, efer);
1490 }
1491 EXPORT_SYMBOL_GPL(kvm_valid_efer);
1492
1493 static int set_efer(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
1494 {
1495         u64 old_efer = vcpu->arch.efer;
1496         u64 efer = msr_info->data;
1497         int r;
1498
1499         if (efer & efer_reserved_bits)
1500                 return 1;
1501
1502         if (!msr_info->host_initiated) {
1503                 if (!__kvm_valid_efer(vcpu, efer))
1504                         return 1;
1505
1506                 if (is_paging(vcpu) &&
1507                     (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1508                         return 1;
1509         }
1510
1511         efer &= ~EFER_LMA;
1512         efer |= vcpu->arch.efer & EFER_LMA;
1513
1514         r = static_call(kvm_x86_set_efer)(vcpu, efer);
1515         if (r) {
1516                 WARN_ON(r > 0);
1517                 return r;
1518         }
1519
1520         /* Update reserved bits */
1521         if ((efer ^ old_efer) & EFER_NX)
1522                 kvm_mmu_reset_context(vcpu);
1523
1524         return 0;
1525 }
1526
1527 void kvm_enable_efer_bits(u64 mask)
1528 {
1529        efer_reserved_bits &= ~mask;
1530 }
1531 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1532
1533 bool kvm_msr_allowed(struct kvm_vcpu *vcpu, u32 index, u32 type)
1534 {
1535         struct kvm *kvm = vcpu->kvm;
1536         struct msr_bitmap_range *ranges = kvm->arch.msr_filter.ranges;
1537         u32 count = kvm->arch.msr_filter.count;
1538         u32 i;
1539         bool r = kvm->arch.msr_filter.default_allow;
1540         int idx;
1541
1542         /* MSR filtering not set up or x2APIC enabled, allow everything */
1543         if (!count || (index >= 0x800 && index <= 0x8ff))
1544                 return true;
1545
1546         /* Prevent collision with set_msr_filter */
1547         idx = srcu_read_lock(&kvm->srcu);
1548
1549         for (i = 0; i < count; i++) {
1550                 u32 start = ranges[i].base;
1551                 u32 end = start + ranges[i].nmsrs;
1552                 u32 flags = ranges[i].flags;
1553                 unsigned long *bitmap = ranges[i].bitmap;
1554
1555                 if ((index >= start) && (index < end) && (flags & type)) {
1556                         r = !!test_bit(index - start, bitmap);
1557                         break;
1558                 }
1559         }
1560
1561         srcu_read_unlock(&kvm->srcu, idx);
1562
1563         return r;
1564 }
1565 EXPORT_SYMBOL_GPL(kvm_msr_allowed);
1566
1567 /*
1568  * Write @data into the MSR specified by @index.  Select MSR specific fault
1569  * checks are bypassed if @host_initiated is %true.
1570  * Returns 0 on success, non-0 otherwise.
1571  * Assumes vcpu_load() was already called.
1572  */
1573 static int __kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data,
1574                          bool host_initiated)
1575 {
1576         struct msr_data msr;
1577
1578         if (!host_initiated && !kvm_msr_allowed(vcpu, index, KVM_MSR_FILTER_WRITE))
1579                 return KVM_MSR_RET_FILTERED;
1580
1581         switch (index) {
1582         case MSR_FS_BASE:
1583         case MSR_GS_BASE:
1584         case MSR_KERNEL_GS_BASE:
1585         case MSR_CSTAR:
1586         case MSR_LSTAR:
1587                 if (is_noncanonical_address(data, vcpu))
1588                         return 1;
1589                 break;
1590         case MSR_IA32_SYSENTER_EIP:
1591         case MSR_IA32_SYSENTER_ESP:
1592                 /*
1593                  * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1594                  * non-canonical address is written on Intel but not on
1595                  * AMD (which ignores the top 32-bits, because it does
1596                  * not implement 64-bit SYSENTER).
1597                  *
1598                  * 64-bit code should hence be able to write a non-canonical
1599                  * value on AMD.  Making the address canonical ensures that
1600                  * vmentry does not fail on Intel after writing a non-canonical
1601                  * value, and that something deterministic happens if the guest
1602                  * invokes 64-bit SYSENTER.
1603                  */
1604                 data = get_canonical(data, vcpu_virt_addr_bits(vcpu));
1605         }
1606
1607         msr.data = data;
1608         msr.index = index;
1609         msr.host_initiated = host_initiated;
1610
1611         return static_call(kvm_x86_set_msr)(vcpu, &msr);
1612 }
1613
1614 static int kvm_set_msr_ignored_check(struct kvm_vcpu *vcpu,
1615                                      u32 index, u64 data, bool host_initiated)
1616 {
1617         int ret = __kvm_set_msr(vcpu, index, data, host_initiated);
1618
1619         if (ret == KVM_MSR_RET_INVALID)
1620                 if (kvm_msr_ignored_check(vcpu, index, data, true))
1621                         ret = 0;
1622
1623         return ret;
1624 }
1625
1626 /*
1627  * Read the MSR specified by @index into @data.  Select MSR specific fault
1628  * checks are bypassed if @host_initiated is %true.
1629  * Returns 0 on success, non-0 otherwise.
1630  * Assumes vcpu_load() was already called.
1631  */
1632 int __kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data,
1633                   bool host_initiated)
1634 {
1635         struct msr_data msr;
1636         int ret;
1637
1638         if (!host_initiated && !kvm_msr_allowed(vcpu, index, KVM_MSR_FILTER_READ))
1639                 return KVM_MSR_RET_FILTERED;
1640
1641         msr.index = index;
1642         msr.host_initiated = host_initiated;
1643
1644         ret = static_call(kvm_x86_get_msr)(vcpu, &msr);
1645         if (!ret)
1646                 *data = msr.data;
1647         return ret;
1648 }
1649
1650 static int kvm_get_msr_ignored_check(struct kvm_vcpu *vcpu,
1651                                      u32 index, u64 *data, bool host_initiated)
1652 {
1653         int ret = __kvm_get_msr(vcpu, index, data, host_initiated);
1654
1655         if (ret == KVM_MSR_RET_INVALID) {
1656                 /* Unconditionally clear *data for simplicity */
1657                 *data = 0;
1658                 if (kvm_msr_ignored_check(vcpu, index, 0, false))
1659                         ret = 0;
1660         }
1661
1662         return ret;
1663 }
1664
1665 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data)
1666 {
1667         return kvm_get_msr_ignored_check(vcpu, index, data, false);
1668 }
1669 EXPORT_SYMBOL_GPL(kvm_get_msr);
1670
1671 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data)
1672 {
1673         return kvm_set_msr_ignored_check(vcpu, index, data, false);
1674 }
1675 EXPORT_SYMBOL_GPL(kvm_set_msr);
1676
1677 static int complete_emulated_rdmsr(struct kvm_vcpu *vcpu)
1678 {
1679         int err = vcpu->run->msr.error;
1680         if (!err) {
1681                 kvm_rax_write(vcpu, (u32)vcpu->run->msr.data);
1682                 kvm_rdx_write(vcpu, vcpu->run->msr.data >> 32);
1683         }
1684
1685         return static_call(kvm_x86_complete_emulated_msr)(vcpu, err);
1686 }
1687
1688 static int complete_emulated_wrmsr(struct kvm_vcpu *vcpu)
1689 {
1690         return static_call(kvm_x86_complete_emulated_msr)(vcpu, vcpu->run->msr.error);
1691 }
1692
1693 static u64 kvm_msr_reason(int r)
1694 {
1695         switch (r) {
1696         case KVM_MSR_RET_INVALID:
1697                 return KVM_MSR_EXIT_REASON_UNKNOWN;
1698         case KVM_MSR_RET_FILTERED:
1699                 return KVM_MSR_EXIT_REASON_FILTER;
1700         default:
1701                 return KVM_MSR_EXIT_REASON_INVAL;
1702         }
1703 }
1704
1705 static int kvm_msr_user_space(struct kvm_vcpu *vcpu, u32 index,
1706                               u32 exit_reason, u64 data,
1707                               int (*completion)(struct kvm_vcpu *vcpu),
1708                               int r)
1709 {
1710         u64 msr_reason = kvm_msr_reason(r);
1711
1712         /* Check if the user wanted to know about this MSR fault */
1713         if (!(vcpu->kvm->arch.user_space_msr_mask & msr_reason))
1714                 return 0;
1715
1716         vcpu->run->exit_reason = exit_reason;
1717         vcpu->run->msr.error = 0;
1718         memset(vcpu->run->msr.pad, 0, sizeof(vcpu->run->msr.pad));
1719         vcpu->run->msr.reason = msr_reason;
1720         vcpu->run->msr.index = index;
1721         vcpu->run->msr.data = data;
1722         vcpu->arch.complete_userspace_io = completion;
1723
1724         return 1;
1725 }
1726
1727 static int kvm_get_msr_user_space(struct kvm_vcpu *vcpu, u32 index, int r)
1728 {
1729         return kvm_msr_user_space(vcpu, index, KVM_EXIT_X86_RDMSR, 0,
1730                                    complete_emulated_rdmsr, r);
1731 }
1732
1733 static int kvm_set_msr_user_space(struct kvm_vcpu *vcpu, u32 index, u64 data, int r)
1734 {
1735         return kvm_msr_user_space(vcpu, index, KVM_EXIT_X86_WRMSR, data,
1736                                    complete_emulated_wrmsr, r);
1737 }
1738
1739 int kvm_emulate_rdmsr(struct kvm_vcpu *vcpu)
1740 {
1741         u32 ecx = kvm_rcx_read(vcpu);
1742         u64 data;
1743         int r;
1744
1745         r = kvm_get_msr(vcpu, ecx, &data);
1746
1747         /* MSR read failed? See if we should ask user space */
1748         if (r && kvm_get_msr_user_space(vcpu, ecx, r)) {
1749                 /* Bounce to user space */
1750                 return 0;
1751         }
1752
1753         if (!r) {
1754                 trace_kvm_msr_read(ecx, data);
1755
1756                 kvm_rax_write(vcpu, data & -1u);
1757                 kvm_rdx_write(vcpu, (data >> 32) & -1u);
1758         } else {
1759                 trace_kvm_msr_read_ex(ecx);
1760         }
1761
1762         return static_call(kvm_x86_complete_emulated_msr)(vcpu, r);
1763 }
1764 EXPORT_SYMBOL_GPL(kvm_emulate_rdmsr);
1765
1766 int kvm_emulate_wrmsr(struct kvm_vcpu *vcpu)
1767 {
1768         u32 ecx = kvm_rcx_read(vcpu);
1769         u64 data = kvm_read_edx_eax(vcpu);
1770         int r;
1771
1772         r = kvm_set_msr(vcpu, ecx, data);
1773
1774         /* MSR write failed? See if we should ask user space */
1775         if (r && kvm_set_msr_user_space(vcpu, ecx, data, r))
1776                 /* Bounce to user space */
1777                 return 0;
1778
1779         /* Signal all other negative errors to userspace */
1780         if (r < 0)
1781                 return r;
1782
1783         if (!r)
1784                 trace_kvm_msr_write(ecx, data);
1785         else
1786                 trace_kvm_msr_write_ex(ecx, data);
1787
1788         return static_call(kvm_x86_complete_emulated_msr)(vcpu, r);
1789 }
1790 EXPORT_SYMBOL_GPL(kvm_emulate_wrmsr);
1791
1792 int kvm_emulate_as_nop(struct kvm_vcpu *vcpu)
1793 {
1794         return kvm_skip_emulated_instruction(vcpu);
1795 }
1796 EXPORT_SYMBOL_GPL(kvm_emulate_as_nop);
1797
1798 int kvm_emulate_invd(struct kvm_vcpu *vcpu)
1799 {
1800         /* Treat an INVD instruction as a NOP and just skip it. */
1801         return kvm_emulate_as_nop(vcpu);
1802 }
1803 EXPORT_SYMBOL_GPL(kvm_emulate_invd);
1804
1805 int kvm_emulate_mwait(struct kvm_vcpu *vcpu)
1806 {
1807         pr_warn_once("kvm: MWAIT instruction emulated as NOP!\n");
1808         return kvm_emulate_as_nop(vcpu);
1809 }
1810 EXPORT_SYMBOL_GPL(kvm_emulate_mwait);
1811
1812 int kvm_handle_invalid_op(struct kvm_vcpu *vcpu)
1813 {
1814         kvm_queue_exception(vcpu, UD_VECTOR);
1815         return 1;
1816 }
1817 EXPORT_SYMBOL_GPL(kvm_handle_invalid_op);
1818
1819 int kvm_emulate_monitor(struct kvm_vcpu *vcpu)
1820 {
1821         pr_warn_once("kvm: MONITOR instruction emulated as NOP!\n");
1822         return kvm_emulate_as_nop(vcpu);
1823 }
1824 EXPORT_SYMBOL_GPL(kvm_emulate_monitor);
1825
1826 static inline bool kvm_vcpu_exit_request(struct kvm_vcpu *vcpu)
1827 {
1828         xfer_to_guest_mode_prepare();
1829         return vcpu->mode == EXITING_GUEST_MODE || kvm_request_pending(vcpu) ||
1830                 xfer_to_guest_mode_work_pending();
1831 }
1832
1833 /*
1834  * The fast path for frequent and performance sensitive wrmsr emulation,
1835  * i.e. the sending of IPI, sending IPI early in the VM-Exit flow reduces
1836  * the latency of virtual IPI by avoiding the expensive bits of transitioning
1837  * from guest to host, e.g. reacquiring KVM's SRCU lock. In contrast to the
1838  * other cases which must be called after interrupts are enabled on the host.
1839  */
1840 static int handle_fastpath_set_x2apic_icr_irqoff(struct kvm_vcpu *vcpu, u64 data)
1841 {
1842         if (!lapic_in_kernel(vcpu) || !apic_x2apic_mode(vcpu->arch.apic))
1843                 return 1;
1844
1845         if (((data & APIC_SHORT_MASK) == APIC_DEST_NOSHORT) &&
1846                 ((data & APIC_DEST_MASK) == APIC_DEST_PHYSICAL) &&
1847                 ((data & APIC_MODE_MASK) == APIC_DM_FIXED) &&
1848                 ((u32)(data >> 32) != X2APIC_BROADCAST)) {
1849
1850                 data &= ~(1 << 12);
1851                 kvm_apic_send_ipi(vcpu->arch.apic, (u32)data, (u32)(data >> 32));
1852                 kvm_lapic_set_reg(vcpu->arch.apic, APIC_ICR2, (u32)(data >> 32));
1853                 kvm_lapic_set_reg(vcpu->arch.apic, APIC_ICR, (u32)data);
1854                 trace_kvm_apic_write(APIC_ICR, (u32)data);
1855                 return 0;
1856         }
1857
1858         return 1;
1859 }
1860
1861 static int handle_fastpath_set_tscdeadline(struct kvm_vcpu *vcpu, u64 data)
1862 {
1863         if (!kvm_can_use_hv_timer(vcpu))
1864                 return 1;
1865
1866         kvm_set_lapic_tscdeadline_msr(vcpu, data);
1867         return 0;
1868 }
1869
1870 fastpath_t handle_fastpath_set_msr_irqoff(struct kvm_vcpu *vcpu)
1871 {
1872         u32 msr = kvm_rcx_read(vcpu);
1873         u64 data;
1874         fastpath_t ret = EXIT_FASTPATH_NONE;
1875
1876         switch (msr) {
1877         case APIC_BASE_MSR + (APIC_ICR >> 4):
1878                 data = kvm_read_edx_eax(vcpu);
1879                 if (!handle_fastpath_set_x2apic_icr_irqoff(vcpu, data)) {
1880                         kvm_skip_emulated_instruction(vcpu);
1881                         ret = EXIT_FASTPATH_EXIT_HANDLED;
1882                 }
1883                 break;
1884         case MSR_IA32_TSCDEADLINE:
1885                 data = kvm_read_edx_eax(vcpu);
1886                 if (!handle_fastpath_set_tscdeadline(vcpu, data)) {
1887                         kvm_skip_emulated_instruction(vcpu);
1888                         ret = EXIT_FASTPATH_REENTER_GUEST;
1889                 }
1890                 break;
1891         default:
1892                 break;
1893         }
1894
1895         if (ret != EXIT_FASTPATH_NONE)
1896                 trace_kvm_msr_write(msr, data);
1897
1898         return ret;
1899 }
1900 EXPORT_SYMBOL_GPL(handle_fastpath_set_msr_irqoff);
1901
1902 /*
1903  * Adapt set_msr() to msr_io()'s calling convention
1904  */
1905 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1906 {
1907         return kvm_get_msr_ignored_check(vcpu, index, data, true);
1908 }
1909
1910 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1911 {
1912         return kvm_set_msr_ignored_check(vcpu, index, *data, true);
1913 }
1914
1915 #ifdef CONFIG_X86_64
1916 struct pvclock_clock {
1917         int vclock_mode;
1918         u64 cycle_last;
1919         u64 mask;
1920         u32 mult;
1921         u32 shift;
1922         u64 base_cycles;
1923         u64 offset;
1924 };
1925
1926 struct pvclock_gtod_data {
1927         seqcount_t      seq;
1928
1929         struct pvclock_clock clock; /* extract of a clocksource struct */
1930         struct pvclock_clock raw_clock; /* extract of a clocksource struct */
1931
1932         ktime_t         offs_boot;
1933         u64             wall_time_sec;
1934 };
1935
1936 static struct pvclock_gtod_data pvclock_gtod_data;
1937
1938 static void update_pvclock_gtod(struct timekeeper *tk)
1939 {
1940         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
1941
1942         write_seqcount_begin(&vdata->seq);
1943
1944         /* copy pvclock gtod data */
1945         vdata->clock.vclock_mode        = tk->tkr_mono.clock->vdso_clock_mode;
1946         vdata->clock.cycle_last         = tk->tkr_mono.cycle_last;
1947         vdata->clock.mask               = tk->tkr_mono.mask;
1948         vdata->clock.mult               = tk->tkr_mono.mult;
1949         vdata->clock.shift              = tk->tkr_mono.shift;
1950         vdata->clock.base_cycles        = tk->tkr_mono.xtime_nsec;
1951         vdata->clock.offset             = tk->tkr_mono.base;
1952
1953         vdata->raw_clock.vclock_mode    = tk->tkr_raw.clock->vdso_clock_mode;
1954         vdata->raw_clock.cycle_last     = tk->tkr_raw.cycle_last;
1955         vdata->raw_clock.mask           = tk->tkr_raw.mask;
1956         vdata->raw_clock.mult           = tk->tkr_raw.mult;
1957         vdata->raw_clock.shift          = tk->tkr_raw.shift;
1958         vdata->raw_clock.base_cycles    = tk->tkr_raw.xtime_nsec;
1959         vdata->raw_clock.offset         = tk->tkr_raw.base;
1960
1961         vdata->wall_time_sec            = tk->xtime_sec;
1962
1963         vdata->offs_boot                = tk->offs_boot;
1964
1965         write_seqcount_end(&vdata->seq);
1966 }
1967
1968 static s64 get_kvmclock_base_ns(void)
1969 {
1970         /* Count up from boot time, but with the frequency of the raw clock.  */
1971         return ktime_to_ns(ktime_add(ktime_get_raw(), pvclock_gtod_data.offs_boot));
1972 }
1973 #else
1974 static s64 get_kvmclock_base_ns(void)
1975 {
1976         /* Master clock not used, so we can just use CLOCK_BOOTTIME.  */
1977         return ktime_get_boottime_ns();
1978 }
1979 #endif
1980
1981 void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock, int sec_hi_ofs)
1982 {
1983         int version;
1984         int r;
1985         struct pvclock_wall_clock wc;
1986         u32 wc_sec_hi;
1987         u64 wall_nsec;
1988
1989         if (!wall_clock)
1990                 return;
1991
1992         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
1993         if (r)
1994                 return;
1995
1996         if (version & 1)
1997                 ++version;  /* first time write, random junk */
1998
1999         ++version;
2000
2001         if (kvm_write_guest(kvm, wall_clock, &version, sizeof(version)))
2002                 return;
2003
2004         /*
2005          * The guest calculates current wall clock time by adding
2006          * system time (updated by kvm_guest_time_update below) to the
2007          * wall clock specified here.  We do the reverse here.
2008          */
2009         wall_nsec = ktime_get_real_ns() - get_kvmclock_ns(kvm);
2010
2011         wc.nsec = do_div(wall_nsec, 1000000000);
2012         wc.sec = (u32)wall_nsec; /* overflow in 2106 guest time */
2013         wc.version = version;
2014
2015         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
2016
2017         if (sec_hi_ofs) {
2018                 wc_sec_hi = wall_nsec >> 32;
2019                 kvm_write_guest(kvm, wall_clock + sec_hi_ofs,
2020                                 &wc_sec_hi, sizeof(wc_sec_hi));
2021         }
2022
2023         version++;
2024         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
2025 }
2026
2027 static void kvm_write_system_time(struct kvm_vcpu *vcpu, gpa_t system_time,
2028                                   bool old_msr, bool host_initiated)
2029 {
2030         struct kvm_arch *ka = &vcpu->kvm->arch;
2031
2032         if (vcpu->vcpu_id == 0 && !host_initiated) {
2033                 if (ka->boot_vcpu_runs_old_kvmclock != old_msr)
2034                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2035
2036                 ka->boot_vcpu_runs_old_kvmclock = old_msr;
2037         }
2038
2039         vcpu->arch.time = system_time;
2040         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2041
2042         /* we verify if the enable bit is set... */
2043         vcpu->arch.pv_time_enabled = false;
2044         if (!(system_time & 1))
2045                 return;
2046
2047         if (!kvm_gfn_to_hva_cache_init(vcpu->kvm,
2048                                        &vcpu->arch.pv_time, system_time & ~1ULL,
2049                                        sizeof(struct pvclock_vcpu_time_info)))
2050                 vcpu->arch.pv_time_enabled = true;
2051
2052         return;
2053 }
2054
2055 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
2056 {
2057         do_shl32_div32(dividend, divisor);
2058         return dividend;
2059 }
2060
2061 static void kvm_get_time_scale(uint64_t scaled_hz, uint64_t base_hz,
2062                                s8 *pshift, u32 *pmultiplier)
2063 {
2064         uint64_t scaled64;
2065         int32_t  shift = 0;
2066         uint64_t tps64;
2067         uint32_t tps32;
2068
2069         tps64 = base_hz;
2070         scaled64 = scaled_hz;
2071         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
2072                 tps64 >>= 1;
2073                 shift--;
2074         }
2075
2076         tps32 = (uint32_t)tps64;
2077         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
2078                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
2079                         scaled64 >>= 1;
2080                 else
2081                         tps32 <<= 1;
2082                 shift++;
2083         }
2084
2085         *pshift = shift;
2086         *pmultiplier = div_frac(scaled64, tps32);
2087 }
2088
2089 #ifdef CONFIG_X86_64
2090 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
2091 #endif
2092
2093 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
2094 static unsigned long max_tsc_khz;
2095
2096 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
2097 {
2098         u64 v = (u64)khz * (1000000 + ppm);
2099         do_div(v, 1000000);
2100         return v;
2101 }
2102
2103 static int set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale)
2104 {
2105         u64 ratio;
2106
2107         /* Guest TSC same frequency as host TSC? */
2108         if (!scale) {
2109                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
2110                 return 0;
2111         }
2112
2113         /* TSC scaling supported? */
2114         if (!kvm_has_tsc_control) {
2115                 if (user_tsc_khz > tsc_khz) {
2116                         vcpu->arch.tsc_catchup = 1;
2117                         vcpu->arch.tsc_always_catchup = 1;
2118                         return 0;
2119                 } else {
2120                         pr_warn_ratelimited("user requested TSC rate below hardware speed\n");
2121                         return -1;
2122                 }
2123         }
2124
2125         /* TSC scaling required  - calculate ratio */
2126         ratio = mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits,
2127                                 user_tsc_khz, tsc_khz);
2128
2129         if (ratio == 0 || ratio >= kvm_max_tsc_scaling_ratio) {
2130                 pr_warn_ratelimited("Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
2131                                     user_tsc_khz);
2132                 return -1;
2133         }
2134
2135         vcpu->arch.tsc_scaling_ratio = ratio;
2136         return 0;
2137 }
2138
2139 static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz)
2140 {
2141         u32 thresh_lo, thresh_hi;
2142         int use_scaling = 0;
2143
2144         /* tsc_khz can be zero if TSC calibration fails */
2145         if (user_tsc_khz == 0) {
2146                 /* set tsc_scaling_ratio to a safe value */
2147                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
2148                 return -1;
2149         }
2150
2151         /* Compute a scale to convert nanoseconds in TSC cycles */
2152         kvm_get_time_scale(user_tsc_khz * 1000LL, NSEC_PER_SEC,
2153                            &vcpu->arch.virtual_tsc_shift,
2154                            &vcpu->arch.virtual_tsc_mult);
2155         vcpu->arch.virtual_tsc_khz = user_tsc_khz;
2156
2157         /*
2158          * Compute the variation in TSC rate which is acceptable
2159          * within the range of tolerance and decide if the
2160          * rate being applied is within that bounds of the hardware
2161          * rate.  If so, no scaling or compensation need be done.
2162          */
2163         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
2164         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
2165         if (user_tsc_khz < thresh_lo || user_tsc_khz > thresh_hi) {
2166                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz, thresh_lo, thresh_hi);
2167                 use_scaling = 1;
2168         }
2169         return set_tsc_khz(vcpu, user_tsc_khz, use_scaling);
2170 }
2171
2172 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
2173 {
2174         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
2175                                       vcpu->arch.virtual_tsc_mult,
2176                                       vcpu->arch.virtual_tsc_shift);
2177         tsc += vcpu->arch.this_tsc_write;
2178         return tsc;
2179 }
2180
2181 static inline int gtod_is_based_on_tsc(int mode)
2182 {
2183         return mode == VDSO_CLOCKMODE_TSC || mode == VDSO_CLOCKMODE_HVCLOCK;
2184 }
2185
2186 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
2187 {
2188 #ifdef CONFIG_X86_64
2189         bool vcpus_matched;
2190         struct kvm_arch *ka = &vcpu->kvm->arch;
2191         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2192
2193         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
2194                          atomic_read(&vcpu->kvm->online_vcpus));
2195
2196         /*
2197          * Once the masterclock is enabled, always perform request in
2198          * order to update it.
2199          *
2200          * In order to enable masterclock, the host clocksource must be TSC
2201          * and the vcpus need to have matched TSCs.  When that happens,
2202          * perform request to enable masterclock.
2203          */
2204         if (ka->use_master_clock ||
2205             (gtod_is_based_on_tsc(gtod->clock.vclock_mode) && vcpus_matched))
2206                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2207
2208         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
2209                             atomic_read(&vcpu->kvm->online_vcpus),
2210                             ka->use_master_clock, gtod->clock.vclock_mode);
2211 #endif
2212 }
2213
2214 /*
2215  * Multiply tsc by a fixed point number represented by ratio.
2216  *
2217  * The most significant 64-N bits (mult) of ratio represent the
2218  * integral part of the fixed point number; the remaining N bits
2219  * (frac) represent the fractional part, ie. ratio represents a fixed
2220  * point number (mult + frac * 2^(-N)).
2221  *
2222  * N equals to kvm_tsc_scaling_ratio_frac_bits.
2223  */
2224 static inline u64 __scale_tsc(u64 ratio, u64 tsc)
2225 {
2226         return mul_u64_u64_shr(tsc, ratio, kvm_tsc_scaling_ratio_frac_bits);
2227 }
2228
2229 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc)
2230 {
2231         u64 _tsc = tsc;
2232         u64 ratio = vcpu->arch.tsc_scaling_ratio;
2233
2234         if (ratio != kvm_default_tsc_scaling_ratio)
2235                 _tsc = __scale_tsc(ratio, tsc);
2236
2237         return _tsc;
2238 }
2239 EXPORT_SYMBOL_GPL(kvm_scale_tsc);
2240
2241 static u64 kvm_compute_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
2242 {
2243         u64 tsc;
2244
2245         tsc = kvm_scale_tsc(vcpu, rdtsc());
2246
2247         return target_tsc - tsc;
2248 }
2249
2250 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc)
2251 {
2252         return vcpu->arch.l1_tsc_offset + kvm_scale_tsc(vcpu, host_tsc);
2253 }
2254 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc);
2255
2256 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu *vcpu, u64 offset)
2257 {
2258         vcpu->arch.l1_tsc_offset = offset;
2259         vcpu->arch.tsc_offset = static_call(kvm_x86_write_l1_tsc_offset)(vcpu, offset);
2260 }
2261
2262 static inline bool kvm_check_tsc_unstable(void)
2263 {
2264 #ifdef CONFIG_X86_64
2265         /*
2266          * TSC is marked unstable when we're running on Hyper-V,
2267          * 'TSC page' clocksource is good.
2268          */
2269         if (pvclock_gtod_data.clock.vclock_mode == VDSO_CLOCKMODE_HVCLOCK)
2270                 return false;
2271 #endif
2272         return check_tsc_unstable();
2273 }
2274
2275 static void kvm_synchronize_tsc(struct kvm_vcpu *vcpu, u64 data)
2276 {
2277         struct kvm *kvm = vcpu->kvm;
2278         u64 offset, ns, elapsed;
2279         unsigned long flags;
2280         bool matched;
2281         bool already_matched;
2282         bool synchronizing = false;
2283
2284         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
2285         offset = kvm_compute_tsc_offset(vcpu, data);
2286         ns = get_kvmclock_base_ns();
2287         elapsed = ns - kvm->arch.last_tsc_nsec;
2288
2289         if (vcpu->arch.virtual_tsc_khz) {
2290                 if (data == 0) {
2291                         /*
2292                          * detection of vcpu initialization -- need to sync
2293                          * with other vCPUs. This particularly helps to keep
2294                          * kvm_clock stable after CPU hotplug
2295                          */
2296                         synchronizing = true;
2297                 } else {
2298                         u64 tsc_exp = kvm->arch.last_tsc_write +
2299                                                 nsec_to_cycles(vcpu, elapsed);
2300                         u64 tsc_hz = vcpu->arch.virtual_tsc_khz * 1000LL;
2301                         /*
2302                          * Special case: TSC write with a small delta (1 second)
2303                          * of virtual cycle time against real time is
2304                          * interpreted as an attempt to synchronize the CPU.
2305                          */
2306                         synchronizing = data < tsc_exp + tsc_hz &&
2307                                         data + tsc_hz > tsc_exp;
2308                 }
2309         }
2310
2311         /*
2312          * For a reliable TSC, we can match TSC offsets, and for an unstable
2313          * TSC, we add elapsed time in this computation.  We could let the
2314          * compensation code attempt to catch up if we fall behind, but
2315          * it's better to try to match offsets from the beginning.
2316          */
2317         if (synchronizing &&
2318             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
2319                 if (!kvm_check_tsc_unstable()) {
2320                         offset = kvm->arch.cur_tsc_offset;
2321                 } else {
2322                         u64 delta = nsec_to_cycles(vcpu, elapsed);
2323                         data += delta;
2324                         offset = kvm_compute_tsc_offset(vcpu, data);
2325                 }
2326                 matched = true;
2327                 already_matched = (vcpu->arch.this_tsc_generation == kvm->arch.cur_tsc_generation);
2328         } else {
2329                 /*
2330                  * We split periods of matched TSC writes into generations.
2331                  * For each generation, we track the original measured
2332                  * nanosecond time, offset, and write, so if TSCs are in
2333                  * sync, we can match exact offset, and if not, we can match
2334                  * exact software computation in compute_guest_tsc()
2335                  *
2336                  * These values are tracked in kvm->arch.cur_xxx variables.
2337                  */
2338                 kvm->arch.cur_tsc_generation++;
2339                 kvm->arch.cur_tsc_nsec = ns;
2340                 kvm->arch.cur_tsc_write = data;
2341                 kvm->arch.cur_tsc_offset = offset;
2342                 matched = false;
2343         }
2344
2345         /*
2346          * We also track th most recent recorded KHZ, write and time to
2347          * allow the matching interval to be extended at each write.
2348          */
2349         kvm->arch.last_tsc_nsec = ns;
2350         kvm->arch.last_tsc_write = data;
2351         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
2352
2353         vcpu->arch.last_guest_tsc = data;
2354
2355         /* Keep track of which generation this VCPU has synchronized to */
2356         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
2357         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
2358         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
2359
2360         kvm_vcpu_write_tsc_offset(vcpu, offset);
2361         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
2362
2363         spin_lock(&kvm->arch.pvclock_gtod_sync_lock);
2364         if (!matched) {
2365                 kvm->arch.nr_vcpus_matched_tsc = 0;
2366         } else if (!already_matched) {
2367                 kvm->arch.nr_vcpus_matched_tsc++;
2368         }
2369
2370         kvm_track_tsc_matching(vcpu);
2371         spin_unlock(&kvm->arch.pvclock_gtod_sync_lock);
2372 }
2373
2374 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
2375                                            s64 adjustment)
2376 {
2377         u64 tsc_offset = vcpu->arch.l1_tsc_offset;
2378         kvm_vcpu_write_tsc_offset(vcpu, tsc_offset + adjustment);
2379 }
2380
2381 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
2382 {
2383         if (vcpu->arch.tsc_scaling_ratio != kvm_default_tsc_scaling_ratio)
2384                 WARN_ON(adjustment < 0);
2385         adjustment = kvm_scale_tsc(vcpu, (u64) adjustment);
2386         adjust_tsc_offset_guest(vcpu, adjustment);
2387 }
2388
2389 #ifdef CONFIG_X86_64
2390
2391 static u64 read_tsc(void)
2392 {
2393         u64 ret = (u64)rdtsc_ordered();
2394         u64 last = pvclock_gtod_data.clock.cycle_last;
2395
2396         if (likely(ret >= last))
2397                 return ret;
2398
2399         /*
2400          * GCC likes to generate cmov here, but this branch is extremely
2401          * predictable (it's just a function of time and the likely is
2402          * very likely) and there's a data dependence, so force GCC
2403          * to generate a branch instead.  I don't barrier() because
2404          * we don't actually need a barrier, and if this function
2405          * ever gets inlined it will generate worse code.
2406          */
2407         asm volatile ("");
2408         return last;
2409 }
2410
2411 static inline u64 vgettsc(struct pvclock_clock *clock, u64 *tsc_timestamp,
2412                           int *mode)
2413 {
2414         long v;
2415         u64 tsc_pg_val;
2416
2417         switch (clock->vclock_mode) {
2418         case VDSO_CLOCKMODE_HVCLOCK:
2419                 tsc_pg_val = hv_read_tsc_page_tsc(hv_get_tsc_page(),
2420                                                   tsc_timestamp);
2421                 if (tsc_pg_val != U64_MAX) {
2422                         /* TSC page valid */
2423                         *mode = VDSO_CLOCKMODE_HVCLOCK;
2424                         v = (tsc_pg_val - clock->cycle_last) &
2425                                 clock->mask;
2426                 } else {
2427                         /* TSC page invalid */
2428                         *mode = VDSO_CLOCKMODE_NONE;
2429                 }
2430                 break;
2431         case VDSO_CLOCKMODE_TSC:
2432                 *mode = VDSO_CLOCKMODE_TSC;
2433                 *tsc_timestamp = read_tsc();
2434                 v = (*tsc_timestamp - clock->cycle_last) &
2435                         clock->mask;
2436                 break;
2437         default:
2438                 *mode = VDSO_CLOCKMODE_NONE;
2439         }
2440
2441         if (*mode == VDSO_CLOCKMODE_NONE)
2442                 *tsc_timestamp = v = 0;
2443
2444         return v * clock->mult;
2445 }
2446
2447 static int do_monotonic_raw(s64 *t, u64 *tsc_timestamp)
2448 {
2449         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2450         unsigned long seq;
2451         int mode;
2452         u64 ns;
2453
2454         do {
2455                 seq = read_seqcount_begin(&gtod->seq);
2456                 ns = gtod->raw_clock.base_cycles;
2457                 ns += vgettsc(&gtod->raw_clock, tsc_timestamp, &mode);
2458                 ns >>= gtod->raw_clock.shift;
2459                 ns += ktime_to_ns(ktime_add(gtod->raw_clock.offset, gtod->offs_boot));
2460         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
2461         *t = ns;
2462
2463         return mode;
2464 }
2465
2466 static int do_realtime(struct timespec64 *ts, u64 *tsc_timestamp)
2467 {
2468         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2469         unsigned long seq;
2470         int mode;
2471         u64 ns;
2472
2473         do {
2474                 seq = read_seqcount_begin(&gtod->seq);
2475                 ts->tv_sec = gtod->wall_time_sec;
2476                 ns = gtod->clock.base_cycles;
2477                 ns += vgettsc(&gtod->clock, tsc_timestamp, &mode);
2478                 ns >>= gtod->clock.shift;
2479         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
2480
2481         ts->tv_sec += __iter_div_u64_rem(ns, NSEC_PER_SEC, &ns);
2482         ts->tv_nsec = ns;
2483
2484         return mode;
2485 }
2486
2487 /* returns true if host is using TSC based clocksource */
2488 static bool kvm_get_time_and_clockread(s64 *kernel_ns, u64 *tsc_timestamp)
2489 {
2490         /* checked again under seqlock below */
2491         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2492                 return false;
2493
2494         return gtod_is_based_on_tsc(do_monotonic_raw(kernel_ns,
2495                                                       tsc_timestamp));
2496 }
2497
2498 /* returns true if host is using TSC based clocksource */
2499 static bool kvm_get_walltime_and_clockread(struct timespec64 *ts,
2500                                            u64 *tsc_timestamp)
2501 {
2502         /* checked again under seqlock below */
2503         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2504                 return false;
2505
2506         return gtod_is_based_on_tsc(do_realtime(ts, tsc_timestamp));
2507 }
2508 #endif
2509
2510 /*
2511  *
2512  * Assuming a stable TSC across physical CPUS, and a stable TSC
2513  * across virtual CPUs, the following condition is possible.
2514  * Each numbered line represents an event visible to both
2515  * CPUs at the next numbered event.
2516  *
2517  * "timespecX" represents host monotonic time. "tscX" represents
2518  * RDTSC value.
2519  *
2520  *              VCPU0 on CPU0           |       VCPU1 on CPU1
2521  *
2522  * 1.  read timespec0,tsc0
2523  * 2.                                   | timespec1 = timespec0 + N
2524  *                                      | tsc1 = tsc0 + M
2525  * 3. transition to guest               | transition to guest
2526  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
2527  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
2528  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
2529  *
2530  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
2531  *
2532  *      - ret0 < ret1
2533  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
2534  *              ...
2535  *      - 0 < N - M => M < N
2536  *
2537  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
2538  * always the case (the difference between two distinct xtime instances
2539  * might be smaller then the difference between corresponding TSC reads,
2540  * when updating guest vcpus pvclock areas).
2541  *
2542  * To avoid that problem, do not allow visibility of distinct
2543  * system_timestamp/tsc_timestamp values simultaneously: use a master
2544  * copy of host monotonic time values. Update that master copy
2545  * in lockstep.
2546  *
2547  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
2548  *
2549  */
2550
2551 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
2552 {
2553 #ifdef CONFIG_X86_64
2554         struct kvm_arch *ka = &kvm->arch;
2555         int vclock_mode;
2556         bool host_tsc_clocksource, vcpus_matched;
2557
2558         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
2559                         atomic_read(&kvm->online_vcpus));
2560
2561         /*
2562          * If the host uses TSC clock, then passthrough TSC as stable
2563          * to the guest.
2564          */
2565         host_tsc_clocksource = kvm_get_time_and_clockread(
2566                                         &ka->master_kernel_ns,
2567                                         &ka->master_cycle_now);
2568
2569         ka->use_master_clock = host_tsc_clocksource && vcpus_matched
2570                                 && !ka->backwards_tsc_observed
2571                                 && !ka->boot_vcpu_runs_old_kvmclock;
2572
2573         if (ka->use_master_clock)
2574                 atomic_set(&kvm_guest_has_master_clock, 1);
2575
2576         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
2577         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
2578                                         vcpus_matched);
2579 #endif
2580 }
2581
2582 void kvm_make_mclock_inprogress_request(struct kvm *kvm)
2583 {
2584         kvm_make_all_cpus_request(kvm, KVM_REQ_MCLOCK_INPROGRESS);
2585 }
2586
2587 static void kvm_gen_update_masterclock(struct kvm *kvm)
2588 {
2589 #ifdef CONFIG_X86_64
2590         int i;
2591         struct kvm_vcpu *vcpu;
2592         struct kvm_arch *ka = &kvm->arch;
2593
2594         spin_lock(&ka->pvclock_gtod_sync_lock);
2595         kvm_make_mclock_inprogress_request(kvm);
2596         /* no guest entries from this point */
2597         pvclock_update_vm_gtod_copy(kvm);
2598
2599         kvm_for_each_vcpu(i, vcpu, kvm)
2600                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2601
2602         /* guest entries allowed */
2603         kvm_for_each_vcpu(i, vcpu, kvm)
2604                 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
2605
2606         spin_unlock(&ka->pvclock_gtod_sync_lock);
2607 #endif
2608 }
2609
2610 u64 get_kvmclock_ns(struct kvm *kvm)
2611 {
2612         struct kvm_arch *ka = &kvm->arch;
2613         struct pvclock_vcpu_time_info hv_clock;
2614         u64 ret;
2615
2616         spin_lock(&ka->pvclock_gtod_sync_lock);
2617         if (!ka->use_master_clock) {
2618                 spin_unlock(&ka->pvclock_gtod_sync_lock);
2619                 return get_kvmclock_base_ns() + ka->kvmclock_offset;
2620         }
2621
2622         hv_clock.tsc_timestamp = ka->master_cycle_now;
2623         hv_clock.system_time = ka->master_kernel_ns + ka->kvmclock_offset;
2624         spin_unlock(&ka->pvclock_gtod_sync_lock);
2625
2626         /* both __this_cpu_read() and rdtsc() should be on the same cpu */
2627         get_cpu();
2628
2629         if (__this_cpu_read(cpu_tsc_khz)) {
2630                 kvm_get_time_scale(NSEC_PER_SEC, __this_cpu_read(cpu_tsc_khz) * 1000LL,
2631                                    &hv_clock.tsc_shift,
2632                                    &hv_clock.tsc_to_system_mul);
2633                 ret = __pvclock_read_cycles(&hv_clock, rdtsc());
2634         } else
2635                 ret = get_kvmclock_base_ns() + ka->kvmclock_offset;
2636
2637         put_cpu();
2638
2639         return ret;
2640 }
2641
2642 static void kvm_setup_pvclock_page(struct kvm_vcpu *v,
2643                                    struct gfn_to_hva_cache *cache,
2644                                    unsigned int offset)
2645 {
2646         struct kvm_vcpu_arch *vcpu = &v->arch;
2647         struct pvclock_vcpu_time_info guest_hv_clock;
2648
2649         if (unlikely(kvm_read_guest_offset_cached(v->kvm, cache,
2650                 &guest_hv_clock, offset, sizeof(guest_hv_clock))))
2651                 return;
2652
2653         /* This VCPU is paused, but it's legal for a guest to read another
2654          * VCPU's kvmclock, so we really have to follow the specification where
2655          * it says that version is odd if data is being modified, and even after
2656          * it is consistent.
2657          *
2658          * Version field updates must be kept separate.  This is because
2659          * kvm_write_guest_cached might use a "rep movs" instruction, and
2660          * writes within a string instruction are weakly ordered.  So there
2661          * are three writes overall.
2662          *
2663          * As a small optimization, only write the version field in the first
2664          * and third write.  The vcpu->pv_time cache is still valid, because the
2665          * version field is the first in the struct.
2666          */
2667         BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info, version) != 0);
2668
2669         if (guest_hv_clock.version & 1)
2670                 ++guest_hv_clock.version;  /* first time write, random junk */
2671
2672         vcpu->hv_clock.version = guest_hv_clock.version + 1;
2673         kvm_write_guest_offset_cached(v->kvm, cache,
2674                                       &vcpu->hv_clock, offset,
2675                                       sizeof(vcpu->hv_clock.version));
2676
2677         smp_wmb();
2678
2679         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
2680         vcpu->hv_clock.flags |= (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
2681
2682         if (vcpu->pvclock_set_guest_stopped_request) {
2683                 vcpu->hv_clock.flags |= PVCLOCK_GUEST_STOPPED;
2684                 vcpu->pvclock_set_guest_stopped_request = false;
2685         }
2686
2687         trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
2688
2689         kvm_write_guest_offset_cached(v->kvm, cache,
2690                                       &vcpu->hv_clock, offset,
2691                                       sizeof(vcpu->hv_clock));
2692
2693         smp_wmb();
2694
2695         vcpu->hv_clock.version++;
2696         kvm_write_guest_offset_cached(v->kvm, cache,
2697                                      &vcpu->hv_clock, offset,
2698                                      sizeof(vcpu->hv_clock.version));
2699 }
2700
2701 static int kvm_guest_time_update(struct kvm_vcpu *v)
2702 {
2703         unsigned long flags, tgt_tsc_khz;
2704         struct kvm_vcpu_arch *vcpu = &v->arch;
2705         struct kvm_arch *ka = &v->kvm->arch;
2706         s64 kernel_ns;
2707         u64 tsc_timestamp, host_tsc;
2708         u8 pvclock_flags;
2709         bool use_master_clock;
2710
2711         kernel_ns = 0;
2712         host_tsc = 0;
2713
2714         /*
2715          * If the host uses TSC clock, then passthrough TSC as stable
2716          * to the guest.
2717          */
2718         spin_lock(&ka->pvclock_gtod_sync_lock);
2719         use_master_clock = ka->use_master_clock;
2720         if (use_master_clock) {
2721                 host_tsc = ka->master_cycle_now;
2722                 kernel_ns = ka->master_kernel_ns;
2723         }
2724         spin_unlock(&ka->pvclock_gtod_sync_lock);
2725
2726         /* Keep irq disabled to prevent changes to the clock */
2727         local_irq_save(flags);
2728         tgt_tsc_khz = __this_cpu_read(cpu_tsc_khz);
2729         if (unlikely(tgt_tsc_khz == 0)) {
2730                 local_irq_restore(flags);
2731                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2732                 return 1;
2733         }
2734         if (!use_master_clock) {
2735                 host_tsc = rdtsc();
2736                 kernel_ns = get_kvmclock_base_ns();
2737         }
2738
2739         tsc_timestamp = kvm_read_l1_tsc(v, host_tsc);
2740
2741         /*
2742          * We may have to catch up the TSC to match elapsed wall clock
2743          * time for two reasons, even if kvmclock is used.
2744          *   1) CPU could have been running below the maximum TSC rate
2745          *   2) Broken TSC compensation resets the base at each VCPU
2746          *      entry to avoid unknown leaps of TSC even when running
2747          *      again on the same CPU.  This may cause apparent elapsed
2748          *      time to disappear, and the guest to stand still or run
2749          *      very slowly.
2750          */
2751         if (vcpu->tsc_catchup) {
2752                 u64 tsc = compute_guest_tsc(v, kernel_ns);
2753                 if (tsc > tsc_timestamp) {
2754                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
2755                         tsc_timestamp = tsc;
2756                 }
2757         }
2758
2759         local_irq_restore(flags);
2760
2761         /* With all the info we got, fill in the values */
2762
2763         if (kvm_has_tsc_control)
2764                 tgt_tsc_khz = kvm_scale_tsc(v, tgt_tsc_khz);
2765
2766         if (unlikely(vcpu->hw_tsc_khz != tgt_tsc_khz)) {
2767                 kvm_get_time_scale(NSEC_PER_SEC, tgt_tsc_khz * 1000LL,
2768                                    &vcpu->hv_clock.tsc_shift,
2769                                    &vcpu->hv_clock.tsc_to_system_mul);
2770                 vcpu->hw_tsc_khz = tgt_tsc_khz;
2771         }
2772
2773         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
2774         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
2775         vcpu->last_guest_tsc = tsc_timestamp;
2776
2777         /* If the host uses TSC clocksource, then it is stable */
2778         pvclock_flags = 0;
2779         if (use_master_clock)
2780                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
2781
2782         vcpu->hv_clock.flags = pvclock_flags;
2783
2784         if (vcpu->pv_time_enabled)
2785                 kvm_setup_pvclock_page(v, &vcpu->pv_time, 0);
2786         if (vcpu->xen.vcpu_info_set)
2787                 kvm_setup_pvclock_page(v, &vcpu->xen.vcpu_info_cache,
2788                                        offsetof(struct compat_vcpu_info, time));
2789         if (vcpu->xen.vcpu_time_info_set)
2790                 kvm_setup_pvclock_page(v, &vcpu->xen.vcpu_time_info_cache, 0);
2791         if (v == kvm_get_vcpu(v->kvm, 0))
2792                 kvm_hv_setup_tsc_page(v->kvm, &vcpu->hv_clock);
2793         return 0;
2794 }
2795
2796 /*
2797  * kvmclock updates which are isolated to a given vcpu, such as
2798  * vcpu->cpu migration, should not allow system_timestamp from
2799  * the rest of the vcpus to remain static. Otherwise ntp frequency
2800  * correction applies to one vcpu's system_timestamp but not
2801  * the others.
2802  *
2803  * So in those cases, request a kvmclock update for all vcpus.
2804  * We need to rate-limit these requests though, as they can
2805  * considerably slow guests that have a large number of vcpus.
2806  * The time for a remote vcpu to update its kvmclock is bound
2807  * by the delay we use to rate-limit the updates.
2808  */
2809
2810 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
2811
2812 static void kvmclock_update_fn(struct work_struct *work)
2813 {
2814         int i;
2815         struct delayed_work *dwork = to_delayed_work(work);
2816         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
2817                                            kvmclock_update_work);
2818         struct kvm *kvm = container_of(ka, struct kvm, arch);
2819         struct kvm_vcpu *vcpu;
2820
2821         kvm_for_each_vcpu(i, vcpu, kvm) {
2822                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2823                 kvm_vcpu_kick(vcpu);
2824         }
2825 }
2826
2827 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
2828 {
2829         struct kvm *kvm = v->kvm;
2830
2831         kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2832         schedule_delayed_work(&kvm->arch.kvmclock_update_work,
2833                                         KVMCLOCK_UPDATE_DELAY);
2834 }
2835
2836 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
2837
2838 static void kvmclock_sync_fn(struct work_struct *work)
2839 {
2840         struct delayed_work *dwork = to_delayed_work(work);
2841         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
2842                                            kvmclock_sync_work);
2843         struct kvm *kvm = container_of(ka, struct kvm, arch);
2844
2845         if (!kvmclock_periodic_sync)
2846                 return;
2847
2848         schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
2849         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
2850                                         KVMCLOCK_SYNC_PERIOD);
2851 }
2852
2853 /*
2854  * On AMD, HWCR[McStatusWrEn] controls whether setting MCi_STATUS results in #GP.
2855  */
2856 static bool can_set_mci_status(struct kvm_vcpu *vcpu)
2857 {
2858         /* McStatusWrEn enabled? */
2859         if (guest_cpuid_is_amd_or_hygon(vcpu))
2860                 return !!(vcpu->arch.msr_hwcr & BIT_ULL(18));
2861
2862         return false;
2863 }
2864
2865 static int set_msr_mce(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2866 {
2867         u64 mcg_cap = vcpu->arch.mcg_cap;
2868         unsigned bank_num = mcg_cap & 0xff;
2869         u32 msr = msr_info->index;
2870         u64 data = msr_info->data;
2871
2872         switch (msr) {
2873         case MSR_IA32_MCG_STATUS:
2874                 vcpu->arch.mcg_status = data;
2875                 break;
2876         case MSR_IA32_MCG_CTL:
2877                 if (!(mcg_cap & MCG_CTL_P) &&
2878                     (data || !msr_info->host_initiated))
2879                         return 1;
2880                 if (data != 0 && data != ~(u64)0)
2881                         return 1;
2882                 vcpu->arch.mcg_ctl = data;
2883                 break;
2884         default:
2885                 if (msr >= MSR_IA32_MC0_CTL &&
2886                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2887                         u32 offset = array_index_nospec(
2888                                 msr - MSR_IA32_MC0_CTL,
2889                                 MSR_IA32_MCx_CTL(bank_num) - MSR_IA32_MC0_CTL);
2890
2891                         /* only 0 or all 1s can be written to IA32_MCi_CTL
2892                          * some Linux kernels though clear bit 10 in bank 4 to
2893                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
2894                          * this to avoid an uncatched #GP in the guest
2895                          */
2896                         if ((offset & 0x3) == 0 &&
2897                             data != 0 && (data | (1 << 10)) != ~(u64)0)
2898                                 return -1;
2899
2900                         /* MCi_STATUS */
2901                         if (!msr_info->host_initiated &&
2902                             (offset & 0x3) == 1 && data != 0) {
2903                                 if (!can_set_mci_status(vcpu))
2904                                         return -1;
2905                         }
2906
2907                         vcpu->arch.mce_banks[offset] = data;
2908                         break;
2909                 }
2910                 return 1;
2911         }
2912         return 0;
2913 }
2914
2915 static inline bool kvm_pv_async_pf_enabled(struct kvm_vcpu *vcpu)
2916 {
2917         u64 mask = KVM_ASYNC_PF_ENABLED | KVM_ASYNC_PF_DELIVERY_AS_INT;
2918
2919         return (vcpu->arch.apf.msr_en_val & mask) == mask;
2920 }
2921
2922 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
2923 {
2924         gpa_t gpa = data & ~0x3f;
2925
2926         /* Bits 4:5 are reserved, Should be zero */
2927         if (data & 0x30)
2928                 return 1;
2929
2930         if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_VMEXIT) &&
2931             (data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT))
2932                 return 1;
2933
2934         if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT) &&
2935             (data & KVM_ASYNC_PF_DELIVERY_AS_INT))
2936                 return 1;
2937
2938         if (!lapic_in_kernel(vcpu))
2939                 return data ? 1 : 0;
2940
2941         vcpu->arch.apf.msr_en_val = data;
2942
2943         if (!kvm_pv_async_pf_enabled(vcpu)) {
2944                 kvm_clear_async_pf_completion_queue(vcpu);
2945                 kvm_async_pf_hash_reset(vcpu);
2946                 return 0;
2947         }
2948
2949         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
2950                                         sizeof(u64)))
2951                 return 1;
2952
2953         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
2954         vcpu->arch.apf.delivery_as_pf_vmexit = data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT;
2955
2956         kvm_async_pf_wakeup_all(vcpu);
2957
2958         return 0;
2959 }
2960
2961 static int kvm_pv_enable_async_pf_int(struct kvm_vcpu *vcpu, u64 data)
2962 {
2963         /* Bits 8-63 are reserved */
2964         if (data >> 8)
2965                 return 1;
2966
2967         if (!lapic_in_kernel(vcpu))
2968                 return 1;
2969
2970         vcpu->arch.apf.msr_int_val = data;
2971
2972         vcpu->arch.apf.vec = data & KVM_ASYNC_PF_VEC_MASK;
2973
2974         return 0;
2975 }
2976
2977 static void kvmclock_reset(struct kvm_vcpu *vcpu)
2978 {
2979         vcpu->arch.pv_time_enabled = false;
2980         vcpu->arch.time = 0;
2981 }
2982
2983 static void kvm_vcpu_flush_tlb_all(struct kvm_vcpu *vcpu)
2984 {
2985         ++vcpu->stat.tlb_flush;
2986         static_call(kvm_x86_tlb_flush_all)(vcpu);
2987 }
2988
2989 static void kvm_vcpu_flush_tlb_guest(struct kvm_vcpu *vcpu)
2990 {
2991         ++vcpu->stat.tlb_flush;
2992         static_call(kvm_x86_tlb_flush_guest)(vcpu);
2993 }
2994
2995 static void record_steal_time(struct kvm_vcpu *vcpu)
2996 {
2997         struct kvm_host_map map;
2998         struct kvm_steal_time *st;
2999
3000         if (kvm_xen_msr_enabled(vcpu->kvm)) {
3001                 kvm_xen_runstate_set_running(vcpu);
3002                 return;
3003         }
3004
3005         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
3006                 return;
3007
3008         /* -EAGAIN is returned in atomic context so we can just return. */
3009         if (kvm_map_gfn(vcpu, vcpu->arch.st.msr_val >> PAGE_SHIFT,
3010                         &map, &vcpu->arch.st.cache, false))
3011                 return;
3012
3013         st = map.hva +
3014                 offset_in_page(vcpu->arch.st.msr_val & KVM_STEAL_VALID_BITS);
3015
3016         /*
3017          * Doing a TLB flush here, on the guest's behalf, can avoid
3018          * expensive IPIs.
3019          */
3020         if (guest_pv_has(vcpu, KVM_FEATURE_PV_TLB_FLUSH)) {
3021                 trace_kvm_pv_tlb_flush(vcpu->vcpu_id,
3022                                        st->preempted & KVM_VCPU_FLUSH_TLB);
3023                 if (xchg(&st->preempted, 0) & KVM_VCPU_FLUSH_TLB)
3024                         kvm_vcpu_flush_tlb_guest(vcpu);
3025         }
3026
3027         vcpu->arch.st.preempted = 0;
3028
3029         if (st->version & 1)
3030                 st->version += 1;  /* first time write, random junk */
3031
3032         st->version += 1;
3033
3034         smp_wmb();
3035
3036         st->steal += current->sched_info.run_delay -
3037                 vcpu->arch.st.last_steal;
3038         vcpu->arch.st.last_steal = current->sched_info.run_delay;
3039
3040         smp_wmb();
3041
3042         st->version += 1;
3043
3044         kvm_unmap_gfn(vcpu, &map, &vcpu->arch.st.cache, true, false);
3045 }
3046
3047 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3048 {
3049         bool pr = false;
3050         u32 msr = msr_info->index;
3051         u64 data = msr_info->data;
3052
3053         if (msr && msr == vcpu->kvm->arch.xen_hvm_config.msr)
3054                 return kvm_xen_write_hypercall_page(vcpu, data);
3055
3056         switch (msr) {
3057         case MSR_AMD64_NB_CFG:
3058         case MSR_IA32_UCODE_WRITE:
3059         case MSR_VM_HSAVE_PA:
3060         case MSR_AMD64_PATCH_LOADER:
3061         case MSR_AMD64_BU_CFG2:
3062         case MSR_AMD64_DC_CFG:
3063         case MSR_F15H_EX_CFG:
3064                 break;
3065
3066         case MSR_IA32_UCODE_REV:
3067                 if (msr_info->host_initiated)
3068                         vcpu->arch.microcode_version = data;
3069                 break;
3070         case MSR_IA32_ARCH_CAPABILITIES:
3071                 if (!msr_info->host_initiated)
3072                         return 1;
3073                 vcpu->arch.arch_capabilities = data;
3074                 break;
3075         case MSR_IA32_PERF_CAPABILITIES: {
3076                 struct kvm_msr_entry msr_ent = {.index = msr, .data = 0};
3077
3078                 if (!msr_info->host_initiated)
3079                         return 1;
3080                 if (guest_cpuid_has(vcpu, X86_FEATURE_PDCM) && kvm_get_msr_feature(&msr_ent))
3081                         return 1;
3082                 if (data & ~msr_ent.data)
3083                         return 1;
3084
3085                 vcpu->arch.perf_capabilities = data;
3086
3087                 return 0;
3088                 }
3089         case MSR_EFER:
3090                 return set_efer(vcpu, msr_info);
3091         case MSR_K7_HWCR:
3092                 data &= ~(u64)0x40;     /* ignore flush filter disable */
3093                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
3094                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
3095
3096                 /* Handle McStatusWrEn */
3097                 if (data == BIT_ULL(18)) {
3098                         vcpu->arch.msr_hwcr = data;
3099                 } else if (data != 0) {
3100                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
3101                                     data);
3102                         return 1;
3103                 }
3104                 break;
3105         case MSR_FAM10H_MMIO_CONF_BASE:
3106                 if (data != 0) {
3107                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
3108                                     "0x%llx\n", data);
3109                         return 1;
3110                 }
3111                 break;
3112         case 0x200 ... 0x2ff:
3113                 return kvm_mtrr_set_msr(vcpu, msr, data);
3114         case MSR_IA32_APICBASE:
3115                 return kvm_set_apic_base(vcpu, msr_info);
3116         case APIC_BASE_MSR ... APIC_BASE_MSR + 0xff:
3117                 return kvm_x2apic_msr_write(vcpu, msr, data);
3118         case MSR_IA32_TSCDEADLINE:
3119                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
3120                 break;
3121         case MSR_IA32_TSC_ADJUST:
3122                 if (guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST)) {
3123                         if (!msr_info->host_initiated) {
3124                                 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
3125                                 adjust_tsc_offset_guest(vcpu, adj);
3126                         }
3127                         vcpu->arch.ia32_tsc_adjust_msr = data;
3128                 }
3129                 break;
3130         case MSR_IA32_MISC_ENABLE:
3131                 if (!kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT) &&
3132                     ((vcpu->arch.ia32_misc_enable_msr ^ data) & MSR_IA32_MISC_ENABLE_MWAIT)) {
3133                         if (!guest_cpuid_has(vcpu, X86_FEATURE_XMM3))
3134                                 return 1;
3135                         vcpu->arch.ia32_misc_enable_msr = data;
3136                         kvm_update_cpuid_runtime(vcpu);
3137                 } else {
3138                         vcpu->arch.ia32_misc_enable_msr = data;
3139                 }
3140                 break;
3141         case MSR_IA32_SMBASE:
3142                 if (!msr_info->host_initiated)
3143                         return 1;
3144                 vcpu->arch.smbase = data;
3145                 break;
3146         case MSR_IA32_POWER_CTL:
3147                 vcpu->arch.msr_ia32_power_ctl = data;
3148                 break;
3149         case MSR_IA32_TSC:
3150                 if (msr_info->host_initiated) {
3151                         kvm_synchronize_tsc(vcpu, data);
3152                 } else {
3153                         u64 adj = kvm_compute_tsc_offset(vcpu, data) - vcpu->arch.l1_tsc_offset;
3154                         adjust_tsc_offset_guest(vcpu, adj);
3155                         vcpu->arch.ia32_tsc_adjust_msr += adj;
3156                 }
3157                 break;
3158         case MSR_IA32_XSS:
3159                 if (!msr_info->host_initiated &&
3160                     !guest_cpuid_has(vcpu, X86_FEATURE_XSAVES))
3161                         return 1;
3162                 /*
3163                  * KVM supports exposing PT to the guest, but does not support
3164                  * IA32_XSS[bit 8]. Guests have to use RDMSR/WRMSR rather than
3165                  * XSAVES/XRSTORS to save/restore PT MSRs.
3166                  */
3167                 if (data & ~supported_xss)
3168                         return 1;
3169                 vcpu->arch.ia32_xss = data;
3170                 break;
3171         case MSR_SMI_COUNT:
3172                 if (!msr_info->host_initiated)
3173                         return 1;
3174                 vcpu->arch.smi_count = data;
3175                 break;
3176         case MSR_KVM_WALL_CLOCK_NEW:
3177                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3178                         return 1;
3179
3180                 vcpu->kvm->arch.wall_clock = data;
3181                 kvm_write_wall_clock(vcpu->kvm, data, 0);
3182                 break;
3183         case MSR_KVM_WALL_CLOCK:
3184                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3185                         return 1;
3186
3187                 vcpu->kvm->arch.wall_clock = data;
3188                 kvm_write_wall_clock(vcpu->kvm, data, 0);
3189                 break;
3190         case MSR_KVM_SYSTEM_TIME_NEW:
3191                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3192                         return 1;
3193
3194                 kvm_write_system_time(vcpu, data, false, msr_info->host_initiated);
3195                 break;
3196         case MSR_KVM_SYSTEM_TIME:
3197                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3198                         return 1;
3199
3200                 kvm_write_system_time(vcpu, data, true,  msr_info->host_initiated);
3201                 break;
3202         case MSR_KVM_ASYNC_PF_EN:
3203                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3204                         return 1;
3205
3206                 if (kvm_pv_enable_async_pf(vcpu, data))
3207                         return 1;
3208                 break;
3209         case MSR_KVM_ASYNC_PF_INT:
3210                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3211                         return 1;
3212
3213                 if (kvm_pv_enable_async_pf_int(vcpu, data))
3214                         return 1;
3215                 break;
3216         case MSR_KVM_ASYNC_PF_ACK:
3217                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3218                         return 1;
3219                 if (data & 0x1) {
3220                         vcpu->arch.apf.pageready_pending = false;
3221                         kvm_check_async_pf_completion(vcpu);
3222                 }
3223                 break;
3224         case MSR_KVM_STEAL_TIME:
3225                 if (!guest_pv_has(vcpu, KVM_FEATURE_STEAL_TIME))
3226                         return 1;
3227
3228                 if (unlikely(!sched_info_on()))
3229                         return 1;
3230
3231                 if (data & KVM_STEAL_RESERVED_MASK)
3232                         return 1;
3233
3234                 vcpu->arch.st.msr_val = data;
3235
3236                 if (!(data & KVM_MSR_ENABLED))
3237                         break;
3238
3239                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
3240
3241                 break;
3242         case MSR_KVM_PV_EOI_EN:
3243                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_EOI))
3244                         return 1;
3245
3246                 if (kvm_lapic_enable_pv_eoi(vcpu, data, sizeof(u8)))
3247                         return 1;
3248                 break;
3249
3250         case MSR_KVM_POLL_CONTROL:
3251                 if (!guest_pv_has(vcpu, KVM_FEATURE_POLL_CONTROL))
3252                         return 1;
3253
3254                 /* only enable bit supported */
3255                 if (data & (-1ULL << 1))
3256                         return 1;
3257
3258                 vcpu->arch.msr_kvm_poll_control = data;
3259                 break;
3260
3261         case MSR_IA32_MCG_CTL:
3262         case MSR_IA32_MCG_STATUS:
3263         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
3264                 return set_msr_mce(vcpu, msr_info);
3265
3266         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
3267         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
3268                 pr = true;
3269                 fallthrough;
3270         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
3271         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
3272                 if (kvm_pmu_is_valid_msr(vcpu, msr))
3273                         return kvm_pmu_set_msr(vcpu, msr_info);
3274
3275                 if (pr || data != 0)
3276                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
3277                                     "0x%x data 0x%llx\n", msr, data);
3278                 break;
3279         case MSR_K7_CLK_CTL:
3280                 /*
3281                  * Ignore all writes to this no longer documented MSR.
3282                  * Writes are only relevant for old K7 processors,
3283                  * all pre-dating SVM, but a recommended workaround from
3284                  * AMD for these chips. It is possible to specify the
3285                  * affected processor models on the command line, hence
3286                  * the need to ignore the workaround.
3287                  */
3288                 break;
3289         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
3290         case HV_X64_MSR_SYNDBG_CONTROL ... HV_X64_MSR_SYNDBG_PENDING_BUFFER:
3291         case HV_X64_MSR_SYNDBG_OPTIONS:
3292         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
3293         case HV_X64_MSR_CRASH_CTL:
3294         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
3295         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
3296         case HV_X64_MSR_TSC_EMULATION_CONTROL:
3297         case HV_X64_MSR_TSC_EMULATION_STATUS:
3298                 return kvm_hv_set_msr_common(vcpu, msr, data,
3299                                              msr_info->host_initiated);
3300         case MSR_IA32_BBL_CR_CTL3:
3301                 /* Drop writes to this legacy MSR -- see rdmsr
3302                  * counterpart for further detail.
3303                  */
3304                 if (report_ignored_msrs)
3305                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data 0x%llx\n",
3306                                 msr, data);
3307                 break;
3308         case MSR_AMD64_OSVW_ID_LENGTH:
3309                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3310                         return 1;
3311                 vcpu->arch.osvw.length = data;
3312                 break;
3313         case MSR_AMD64_OSVW_STATUS:
3314                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3315                         return 1;
3316                 vcpu->arch.osvw.status = data;
3317                 break;
3318         case MSR_PLATFORM_INFO:
3319                 if (!msr_info->host_initiated ||
3320                     (!(data & MSR_PLATFORM_INFO_CPUID_FAULT) &&
3321                      cpuid_fault_enabled(vcpu)))
3322                         return 1;
3323                 vcpu->arch.msr_platform_info = data;
3324                 break;
3325         case MSR_MISC_FEATURES_ENABLES:
3326                 if (data & ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT ||
3327                     (data & MSR_MISC_FEATURES_ENABLES_CPUID_FAULT &&
3328                      !supports_cpuid_fault(vcpu)))
3329                         return 1;
3330                 vcpu->arch.msr_misc_features_enables = data;
3331                 break;
3332         default:
3333                 if (kvm_pmu_is_valid_msr(vcpu, msr))
3334                         return kvm_pmu_set_msr(vcpu, msr_info);
3335                 return KVM_MSR_RET_INVALID;
3336         }
3337         return 0;
3338 }
3339 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
3340
3341 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata, bool host)
3342 {
3343         u64 data;
3344         u64 mcg_cap = vcpu->arch.mcg_cap;
3345         unsigned bank_num = mcg_cap & 0xff;
3346
3347         switch (msr) {
3348         case MSR_IA32_P5_MC_ADDR:
3349         case MSR_IA32_P5_MC_TYPE:
3350                 data = 0;
3351                 break;
3352         case MSR_IA32_MCG_CAP:
3353                 data = vcpu->arch.mcg_cap;
3354                 break;
3355         case MSR_IA32_MCG_CTL:
3356                 if (!(mcg_cap & MCG_CTL_P) && !host)
3357                         return 1;
3358                 data = vcpu->arch.mcg_ctl;
3359                 break;
3360         case MSR_IA32_MCG_STATUS:
3361                 data = vcpu->arch.mcg_status;
3362                 break;
3363         default:
3364                 if (msr >= MSR_IA32_MC0_CTL &&
3365                     msr < MSR_IA32_MCx_CTL(bank_num)) {
3366                         u32 offset = array_index_nospec(
3367                                 msr - MSR_IA32_MC0_CTL,
3368                                 MSR_IA32_MCx_CTL(bank_num) - MSR_IA32_MC0_CTL);
3369
3370                         data = vcpu->arch.mce_banks[offset];
3371                         break;
3372                 }
3373                 return 1;
3374         }
3375         *pdata = data;
3376         return 0;
3377 }
3378
3379 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3380 {
3381         switch (msr_info->index) {
3382         case MSR_IA32_PLATFORM_ID:
3383         case MSR_IA32_EBL_CR_POWERON:
3384         case MSR_IA32_LASTBRANCHFROMIP:
3385         case MSR_IA32_LASTBRANCHTOIP:
3386         case MSR_IA32_LASTINTFROMIP:
3387         case MSR_IA32_LASTINTTOIP:
3388         case MSR_K8_SYSCFG:
3389         case MSR_K8_TSEG_ADDR:
3390         case MSR_K8_TSEG_MASK:
3391         case MSR_VM_HSAVE_PA:
3392         case MSR_K8_INT_PENDING_MSG:
3393         case MSR_AMD64_NB_CFG:
3394         case MSR_FAM10H_MMIO_CONF_BASE:
3395         case MSR_AMD64_BU_CFG2:
3396         case MSR_IA32_PERF_CTL:
3397         case MSR_AMD64_DC_CFG:
3398         case MSR_F15H_EX_CFG:
3399         /*
3400          * Intel Sandy Bridge CPUs must support the RAPL (running average power
3401          * limit) MSRs. Just return 0, as we do not want to expose the host
3402          * data here. Do not conditionalize this on CPUID, as KVM does not do
3403          * so for existing CPU-specific MSRs.
3404          */
3405         case MSR_RAPL_POWER_UNIT:
3406         case MSR_PP0_ENERGY_STATUS:     /* Power plane 0 (core) */
3407         case MSR_PP1_ENERGY_STATUS:     /* Power plane 1 (graphics uncore) */
3408         case MSR_PKG_ENERGY_STATUS:     /* Total package */
3409         case MSR_DRAM_ENERGY_STATUS:    /* DRAM controller */
3410                 msr_info->data = 0;
3411                 break;
3412         case MSR_F15H_PERF_CTL0 ... MSR_F15H_PERF_CTR5:
3413                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3414                         return kvm_pmu_get_msr(vcpu, msr_info);
3415                 if (!msr_info->host_initiated)
3416                         return 1;
3417                 msr_info->data = 0;
3418                 break;
3419         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
3420         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
3421         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
3422         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
3423                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3424                         return kvm_pmu_get_msr(vcpu, msr_info);
3425                 msr_info->data = 0;
3426                 break;
3427         case MSR_IA32_UCODE_REV:
3428                 msr_info->data = vcpu->arch.microcode_version;
3429                 break;
3430         case MSR_IA32_ARCH_CAPABILITIES:
3431                 if (!msr_info->host_initiated &&
3432                     !guest_cpuid_has(vcpu, X86_FEATURE_ARCH_CAPABILITIES))
3433                         return 1;
3434                 msr_info->data = vcpu->arch.arch_capabilities;
3435                 break;
3436         case MSR_IA32_PERF_CAPABILITIES:
3437                 if (!msr_info->host_initiated &&
3438                     !guest_cpuid_has(vcpu, X86_FEATURE_PDCM))
3439                         return 1;
3440                 msr_info->data = vcpu->arch.perf_capabilities;
3441                 break;
3442         case MSR_IA32_POWER_CTL:
3443                 msr_info->data = vcpu->arch.msr_ia32_power_ctl;
3444                 break;
3445         case MSR_IA32_TSC: {
3446                 /*
3447                  * Intel SDM states that MSR_IA32_TSC read adds the TSC offset
3448                  * even when not intercepted. AMD manual doesn't explicitly
3449                  * state this but appears to behave the same.
3450                  *
3451                  * On userspace reads and writes, however, we unconditionally
3452                  * return L1's TSC value to ensure backwards-compatible
3453                  * behavior for migration.
3454                  */
3455                 u64 tsc_offset = msr_info->host_initiated ? vcpu->arch.l1_tsc_offset :
3456                                                             vcpu->arch.tsc_offset;
3457
3458                 msr_info->data = kvm_scale_tsc(vcpu, rdtsc()) + tsc_offset;
3459                 break;
3460         }
3461         case MSR_MTRRcap:
3462         case 0x200 ... 0x2ff:
3463                 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
3464         case 0xcd: /* fsb frequency */
3465                 msr_info->data = 3;
3466                 break;
3467                 /*
3468                  * MSR_EBC_FREQUENCY_ID
3469                  * Conservative value valid for even the basic CPU models.
3470                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
3471                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
3472                  * and 266MHz for model 3, or 4. Set Core Clock
3473                  * Frequency to System Bus Frequency Ratio to 1 (bits
3474                  * 31:24) even though these are only valid for CPU
3475                  * models > 2, however guests may end up dividing or
3476                  * multiplying by zero otherwise.
3477                  */
3478         case MSR_EBC_FREQUENCY_ID:
3479                 msr_info->data = 1 << 24;
3480                 break;
3481         case MSR_IA32_APICBASE:
3482                 msr_info->data = kvm_get_apic_base(vcpu);
3483                 break;
3484         case APIC_BASE_MSR ... APIC_BASE_MSR + 0xff:
3485                 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
3486         case MSR_IA32_TSCDEADLINE:
3487                 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
3488                 break;
3489         case MSR_IA32_TSC_ADJUST:
3490                 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
3491                 break;
3492         case MSR_IA32_MISC_ENABLE:
3493                 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
3494                 break;
3495         case MSR_IA32_SMBASE:
3496                 if (!msr_info->host_initiated)
3497                         return 1;
3498                 msr_info->data = vcpu->arch.smbase;
3499                 break;
3500         case MSR_SMI_COUNT:
3501                 msr_info->data = vcpu->arch.smi_count;
3502                 break;
3503         case MSR_IA32_PERF_STATUS:
3504                 /* TSC increment by tick */
3505                 msr_info->data = 1000ULL;
3506                 /* CPU multiplier */
3507                 msr_info->data |= (((uint64_t)4ULL) << 40);
3508                 break;
3509         case MSR_EFER:
3510                 msr_info->data = vcpu->arch.efer;
3511                 break;
3512         case MSR_KVM_WALL_CLOCK:
3513                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3514                         return 1;
3515
3516                 msr_info->data = vcpu->kvm->arch.wall_clock;
3517                 break;
3518         case MSR_KVM_WALL_CLOCK_NEW:
3519                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3520                         return 1;
3521
3522                 msr_info->data = vcpu->kvm->arch.wall_clock;
3523                 break;
3524         case MSR_KVM_SYSTEM_TIME:
3525                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3526                         return 1;
3527
3528                 msr_info->data = vcpu->arch.time;
3529                 break;
3530         case MSR_KVM_SYSTEM_TIME_NEW:
3531                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3532                         return 1;
3533
3534                 msr_info->data = vcpu->arch.time;
3535                 break;
3536         case MSR_KVM_ASYNC_PF_EN:
3537                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3538                         return 1;
3539
3540                 msr_info->data = vcpu->arch.apf.msr_en_val;
3541                 break;
3542         case MSR_KVM_ASYNC_PF_INT:
3543                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3544                         return 1;
3545
3546                 msr_info->data = vcpu->arch.apf.msr_int_val;
3547                 break;
3548         case MSR_KVM_ASYNC_PF_ACK:
3549                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3550                         return 1;
3551
3552                 msr_info->data = 0;
3553                 break;
3554         case MSR_KVM_STEAL_TIME:
3555                 if (!guest_pv_has(vcpu, KVM_FEATURE_STEAL_TIME))
3556                         return 1;
3557
3558                 msr_info->data = vcpu->arch.st.msr_val;
3559                 break;
3560         case MSR_KVM_PV_EOI_EN:
3561                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_EOI))
3562                         return 1;
3563
3564                 msr_info->data = vcpu->arch.pv_eoi.msr_val;
3565                 break;
3566         case MSR_KVM_POLL_CONTROL:
3567                 if (!guest_pv_has(vcpu, KVM_FEATURE_POLL_CONTROL))
3568                         return 1;
3569
3570                 msr_info->data = vcpu->arch.msr_kvm_poll_control;
3571                 break;
3572         case MSR_IA32_P5_MC_ADDR:
3573         case MSR_IA32_P5_MC_TYPE:
3574         case MSR_IA32_MCG_CAP:
3575         case MSR_IA32_MCG_CTL:
3576         case MSR_IA32_MCG_STATUS:
3577         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
3578                 return get_msr_mce(vcpu, msr_info->index, &msr_info->data,
3579                                    msr_info->host_initiated);
3580         case MSR_IA32_XSS:
3581                 if (!msr_info->host_initiated &&
3582                     !guest_cpuid_has(vcpu, X86_FEATURE_XSAVES))
3583                         return 1;
3584                 msr_info->data = vcpu->arch.ia32_xss;
3585                 break;
3586         case MSR_K7_CLK_CTL:
3587                 /*
3588                  * Provide expected ramp-up count for K7. All other
3589                  * are set to zero, indicating minimum divisors for
3590                  * every field.
3591                  *
3592                  * This prevents guest kernels on AMD host with CPU
3593                  * type 6, model 8 and higher from exploding due to
3594                  * the rdmsr failing.
3595                  */
3596                 msr_info->data = 0x20000000;
3597                 break;
3598         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
3599         case HV_X64_MSR_SYNDBG_CONTROL ... HV_X64_MSR_SYNDBG_PENDING_BUFFER:
3600         case HV_X64_MSR_SYNDBG_OPTIONS:
3601         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
3602         case HV_X64_MSR_CRASH_CTL:
3603         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
3604         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
3605         case HV_X64_MSR_TSC_EMULATION_CONTROL:
3606         case HV_X64_MSR_TSC_EMULATION_STATUS:
3607                 return kvm_hv_get_msr_common(vcpu,
3608                                              msr_info->index, &msr_info->data,
3609                                              msr_info->host_initiated);
3610         case MSR_IA32_BBL_CR_CTL3:
3611                 /* This legacy MSR exists but isn't fully documented in current
3612                  * silicon.  It is however accessed by winxp in very narrow
3613                  * scenarios where it sets bit #19, itself documented as
3614                  * a "reserved" bit.  Best effort attempt to source coherent
3615                  * read data here should the balance of the register be
3616                  * interpreted by the guest:
3617                  *
3618                  * L2 cache control register 3: 64GB range, 256KB size,
3619                  * enabled, latency 0x1, configured
3620                  */
3621                 msr_info->data = 0xbe702111;
3622                 break;
3623         case MSR_AMD64_OSVW_ID_LENGTH:
3624                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3625                         return 1;
3626                 msr_info->data = vcpu->arch.osvw.length;
3627                 break;
3628         case MSR_AMD64_OSVW_STATUS:
3629                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3630                         return 1;
3631                 msr_info->data = vcpu->arch.osvw.status;
3632                 break;
3633         case MSR_PLATFORM_INFO:
3634                 if (!msr_info->host_initiated &&
3635                     !vcpu->kvm->arch.guest_can_read_msr_platform_info)
3636                         return 1;
3637                 msr_info->data = vcpu->arch.msr_platform_info;
3638                 break;
3639         case MSR_MISC_FEATURES_ENABLES:
3640                 msr_info->data = vcpu->arch.msr_misc_features_enables;
3641                 break;
3642         case MSR_K7_HWCR:
3643                 msr_info->data = vcpu->arch.msr_hwcr;
3644                 break;
3645         default:
3646                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3647                         return kvm_pmu_get_msr(vcpu, msr_info);
3648                 return KVM_MSR_RET_INVALID;
3649         }
3650         return 0;
3651 }
3652 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
3653
3654 /*
3655  * Read or write a bunch of msrs. All parameters are kernel addresses.
3656  *
3657  * @return number of msrs set successfully.
3658  */
3659 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
3660                     struct kvm_msr_entry *entries,
3661                     int (*do_msr)(struct kvm_vcpu *vcpu,
3662                                   unsigned index, u64 *data))
3663 {
3664         int i;
3665
3666         for (i = 0; i < msrs->nmsrs; ++i)
3667                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
3668                         break;
3669
3670         return i;
3671 }
3672
3673 /*
3674  * Read or write a bunch of msrs. Parameters are user addresses.
3675  *
3676  * @return number of msrs set successfully.
3677  */
3678 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
3679                   int (*do_msr)(struct kvm_vcpu *vcpu,
3680                                 unsigned index, u64 *data),
3681                   int writeback)
3682 {
3683         struct kvm_msrs msrs;
3684         struct kvm_msr_entry *entries;
3685         int r, n;
3686         unsigned size;
3687
3688         r = -EFAULT;
3689         if (copy_from_user(&msrs, user_msrs, sizeof(msrs)))
3690                 goto out;
3691
3692         r = -E2BIG;
3693         if (msrs.nmsrs >= MAX_IO_MSRS)
3694                 goto out;
3695
3696         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
3697         entries = memdup_user(user_msrs->entries, size);
3698         if (IS_ERR(entries)) {
3699                 r = PTR_ERR(entries);
3700                 goto out;
3701         }
3702
3703         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
3704         if (r < 0)
3705                 goto out_free;
3706
3707         r = -EFAULT;
3708         if (writeback && copy_to_user(user_msrs->entries, entries, size))
3709                 goto out_free;
3710
3711         r = n;
3712
3713 out_free:
3714         kfree(entries);
3715 out:
3716         return r;
3717 }
3718
3719 static inline bool kvm_can_mwait_in_guest(void)
3720 {
3721         return boot_cpu_has(X86_FEATURE_MWAIT) &&
3722                 !boot_cpu_has_bug(X86_BUG_MONITOR) &&
3723                 boot_cpu_has(X86_FEATURE_ARAT);
3724 }
3725
3726 static int kvm_ioctl_get_supported_hv_cpuid(struct kvm_vcpu *vcpu,
3727                                             struct kvm_cpuid2 __user *cpuid_arg)
3728 {
3729         struct kvm_cpuid2 cpuid;
3730         int r;
3731
3732         r = -EFAULT;
3733         if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
3734                 return r;
3735
3736         r = kvm_get_hv_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3737         if (r)
3738                 return r;
3739
3740         r = -EFAULT;
3741         if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
3742                 return r;
3743
3744         return 0;
3745 }
3746
3747 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
3748 {
3749         int r = 0;
3750
3751         switch (ext) {
3752         case KVM_CAP_IRQCHIP:
3753         case KVM_CAP_HLT:
3754         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
3755         case KVM_CAP_SET_TSS_ADDR:
3756         case KVM_CAP_EXT_CPUID:
3757         case KVM_CAP_EXT_EMUL_CPUID:
3758         case KVM_CAP_CLOCKSOURCE:
3759         case KVM_CAP_PIT:
3760         case KVM_CAP_NOP_IO_DELAY:
3761         case KVM_CAP_MP_STATE:
3762         case KVM_CAP_SYNC_MMU:
3763         case KVM_CAP_USER_NMI:
3764         case KVM_CAP_REINJECT_CONTROL:
3765         case KVM_CAP_IRQ_INJECT_STATUS:
3766         case KVM_CAP_IOEVENTFD:
3767         case KVM_CAP_IOEVENTFD_NO_LENGTH:
3768         case KVM_CAP_PIT2:
3769         case KVM_CAP_PIT_STATE2:
3770         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
3771         case KVM_CAP_VCPU_EVENTS:
3772         case KVM_CAP_HYPERV:
3773         case KVM_CAP_HYPERV_VAPIC:
3774         case KVM_CAP_HYPERV_SPIN:
3775         case KVM_CAP_HYPERV_SYNIC:
3776         case KVM_CAP_HYPERV_SYNIC2:
3777         case KVM_CAP_HYPERV_VP_INDEX:
3778         case KVM_CAP_HYPERV_EVENTFD:
3779         case KVM_CAP_HYPERV_TLBFLUSH:
3780         case KVM_CAP_HYPERV_SEND_IPI:
3781         case KVM_CAP_HYPERV_CPUID:
3782         case KVM_CAP_SYS_HYPERV_CPUID:
3783         case KVM_CAP_PCI_SEGMENT:
3784         case KVM_CAP_DEBUGREGS:
3785         case KVM_CAP_X86_ROBUST_SINGLESTEP:
3786         case KVM_CAP_XSAVE:
3787         case KVM_CAP_ASYNC_PF:
3788         case KVM_CAP_ASYNC_PF_INT:
3789         case KVM_CAP_GET_TSC_KHZ:
3790         case KVM_CAP_KVMCLOCK_CTRL:
3791         case KVM_CAP_READONLY_MEM:
3792         case KVM_CAP_HYPERV_TIME:
3793         case KVM_CAP_IOAPIC_POLARITY_IGNORED:
3794         case KVM_CAP_TSC_DEADLINE_TIMER:
3795         case KVM_CAP_DISABLE_QUIRKS:
3796         case KVM_CAP_SET_BOOT_CPU_ID:
3797         case KVM_CAP_SPLIT_IRQCHIP:
3798         case KVM_CAP_IMMEDIATE_EXIT:
3799         case KVM_CAP_PMU_EVENT_FILTER:
3800         case KVM_CAP_GET_MSR_FEATURES:
3801         case KVM_CAP_MSR_PLATFORM_INFO:
3802         case KVM_CAP_EXCEPTION_PAYLOAD:
3803         case KVM_CAP_SET_GUEST_DEBUG:
3804         case KVM_CAP_LAST_CPU:
3805         case KVM_CAP_X86_USER_SPACE_MSR:
3806         case KVM_CAP_X86_MSR_FILTER:
3807         case KVM_CAP_ENFORCE_PV_FEATURE_CPUID:
3808 #ifdef CONFIG_X86_SGX_KVM
3809         case KVM_CAP_SGX_ATTRIBUTE:
3810 #endif
3811         case KVM_CAP_VM_COPY_ENC_CONTEXT_FROM:
3812                 r = 1;
3813                 break;
3814         case KVM_CAP_SET_GUEST_DEBUG2:
3815                 return KVM_GUESTDBG_VALID_MASK;
3816 #ifdef CONFIG_KVM_XEN
3817         case KVM_CAP_XEN_HVM:
3818                 r = KVM_XEN_HVM_CONFIG_HYPERCALL_MSR |
3819                     KVM_XEN_HVM_CONFIG_INTERCEPT_HCALL |
3820                     KVM_XEN_HVM_CONFIG_SHARED_INFO;
3821                 if (sched_info_on())
3822                         r |= KVM_XEN_HVM_CONFIG_RUNSTATE;
3823                 break;
3824 #endif
3825         case KVM_CAP_SYNC_REGS:
3826                 r = KVM_SYNC_X86_VALID_FIELDS;
3827                 break;
3828         case KVM_CAP_ADJUST_CLOCK:
3829                 r = KVM_CLOCK_TSC_STABLE;
3830                 break;
3831         case KVM_CAP_X86_DISABLE_EXITS:
3832                 r |=  KVM_X86_DISABLE_EXITS_HLT | KVM_X86_DISABLE_EXITS_PAUSE |
3833                       KVM_X86_DISABLE_EXITS_CSTATE;
3834                 if(kvm_can_mwait_in_guest())
3835                         r |= KVM_X86_DISABLE_EXITS_MWAIT;
3836                 break;
3837         case KVM_CAP_X86_SMM:
3838                 /* SMBASE is usually relocated above 1M on modern chipsets,
3839                  * and SMM handlers might indeed rely on 4G segment limits,
3840                  * so do not report SMM to be available if real mode is
3841                  * emulated via vm86 mode.  Still, do not go to great lengths
3842                  * to avoid userspace's usage of the feature, because it is a
3843                  * fringe case that is not enabled except via specific settings
3844                  * of the module parameters.
3845                  */
3846                 r = static_call(kvm_x86_has_emulated_msr)(kvm, MSR_IA32_SMBASE);
3847                 break;
3848         case KVM_CAP_VAPIC:
3849                 r = !static_call(kvm_x86_cpu_has_accelerated_tpr)();
3850                 break;
3851         case KVM_CAP_NR_VCPUS:
3852                 r = KVM_SOFT_MAX_VCPUS;
3853                 break;
3854         case KVM_CAP_MAX_VCPUS:
3855                 r = KVM_MAX_VCPUS;
3856                 break;
3857         case KVM_CAP_MAX_VCPU_ID:
3858                 r = KVM_MAX_VCPU_ID;
3859                 break;
3860         case KVM_CAP_PV_MMU:    /* obsolete */
3861                 r = 0;
3862                 break;
3863         case KVM_CAP_MCE:
3864                 r = KVM_MAX_MCE_BANKS;
3865                 break;
3866         case KVM_CAP_XCRS:
3867                 r = boot_cpu_has(X86_FEATURE_XSAVE);
3868                 break;
3869         case KVM_CAP_TSC_CONTROL:
3870                 r = kvm_has_tsc_control;
3871                 break;
3872         case KVM_CAP_X2APIC_API:
3873                 r = KVM_X2APIC_API_VALID_FLAGS;
3874                 break;
3875         case KVM_CAP_NESTED_STATE:
3876                 r = kvm_x86_ops.nested_ops->get_state ?
3877                         kvm_x86_ops.nested_ops->get_state(NULL, NULL, 0) : 0;
3878                 break;
3879         case KVM_CAP_HYPERV_DIRECT_TLBFLUSH:
3880                 r = kvm_x86_ops.enable_direct_tlbflush != NULL;
3881                 break;
3882         case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
3883                 r = kvm_x86_ops.nested_ops->enable_evmcs != NULL;
3884                 break;
3885         case KVM_CAP_SMALLER_MAXPHYADDR:
3886                 r = (int) allow_smaller_maxphyaddr;
3887                 break;
3888         case KVM_CAP_STEAL_TIME:
3889                 r = sched_info_on();
3890                 break;
3891         case KVM_CAP_X86_BUS_LOCK_EXIT:
3892                 if (kvm_has_bus_lock_exit)
3893                         r = KVM_BUS_LOCK_DETECTION_OFF |
3894                             KVM_BUS_LOCK_DETECTION_EXIT;
3895                 else
3896                         r = 0;
3897                 break;
3898         default:
3899                 break;
3900         }
3901         return r;
3902
3903 }
3904
3905 long kvm_arch_dev_ioctl(struct file *filp,
3906                         unsigned int ioctl, unsigned long arg)
3907 {
3908         void __user *argp = (void __user *)arg;
3909         long r;
3910
3911         switch (ioctl) {
3912         case KVM_GET_MSR_INDEX_LIST: {
3913                 struct kvm_msr_list __user *user_msr_list = argp;
3914                 struct kvm_msr_list msr_list;
3915                 unsigned n;
3916
3917                 r = -EFAULT;
3918                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
3919                         goto out;
3920                 n = msr_list.nmsrs;
3921                 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
3922                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
3923                         goto out;
3924                 r = -E2BIG;
3925                 if (n < msr_list.nmsrs)
3926                         goto out;
3927                 r = -EFAULT;
3928                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
3929                                  num_msrs_to_save * sizeof(u32)))
3930                         goto out;
3931                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
3932                                  &emulated_msrs,
3933                                  num_emulated_msrs * sizeof(u32)))
3934                         goto out;
3935                 r = 0;
3936                 break;
3937         }
3938         case KVM_GET_SUPPORTED_CPUID:
3939         case KVM_GET_EMULATED_CPUID: {
3940                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3941                 struct kvm_cpuid2 cpuid;
3942
3943                 r = -EFAULT;
3944                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
3945                         goto out;
3946
3947                 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
3948                                             ioctl);
3949                 if (r)
3950                         goto out;
3951
3952                 r = -EFAULT;
3953                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
3954                         goto out;
3955                 r = 0;
3956                 break;
3957         }
3958         case KVM_X86_GET_MCE_CAP_SUPPORTED:
3959                 r = -EFAULT;
3960                 if (copy_to_user(argp, &kvm_mce_cap_supported,
3961                                  sizeof(kvm_mce_cap_supported)))
3962                         goto out;
3963                 r = 0;
3964                 break;
3965         case KVM_GET_MSR_FEATURE_INDEX_LIST: {
3966                 struct kvm_msr_list __user *user_msr_list = argp;
3967                 struct kvm_msr_list msr_list;
3968                 unsigned int n;
3969
3970                 r = -EFAULT;
3971                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
3972                         goto out;
3973                 n = msr_list.nmsrs;
3974                 msr_list.nmsrs = num_msr_based_features;
3975                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
3976                         goto out;
3977                 r = -E2BIG;
3978                 if (n < msr_list.nmsrs)
3979                         goto out;
3980                 r = -EFAULT;
3981                 if (copy_to_user(user_msr_list->indices, &msr_based_features,
3982                                  num_msr_based_features * sizeof(u32)))
3983                         goto out;
3984                 r = 0;
3985                 break;
3986         }
3987         case KVM_GET_MSRS:
3988                 r = msr_io(NULL, argp, do_get_msr_feature, 1);
3989                 break;
3990         case KVM_GET_SUPPORTED_HV_CPUID:
3991                 r = kvm_ioctl_get_supported_hv_cpuid(NULL, argp);
3992                 break;
3993         default:
3994                 r = -EINVAL;
3995                 break;
3996         }
3997 out:
3998         return r;
3999 }
4000
4001 static void wbinvd_ipi(void *garbage)
4002 {
4003         wbinvd();
4004 }
4005
4006 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
4007 {
4008         return kvm_arch_has_noncoherent_dma(vcpu->kvm);
4009 }
4010
4011 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
4012 {
4013         /* Address WBINVD may be executed by guest */
4014         if (need_emulate_wbinvd(vcpu)) {
4015                 if (static_call(kvm_x86_has_wbinvd_exit)())
4016                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4017                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
4018                         smp_call_function_single(vcpu->cpu,
4019                                         wbinvd_ipi, NULL, 1);
4020         }
4021
4022         static_call(kvm_x86_vcpu_load)(vcpu, cpu);
4023
4024         /* Save host pkru register if supported */
4025         vcpu->arch.host_pkru = read_pkru();
4026
4027         /* Apply any externally detected TSC adjustments (due to suspend) */
4028         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
4029                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
4030                 vcpu->arch.tsc_offset_adjustment = 0;
4031                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4032         }
4033
4034         if (unlikely(vcpu->cpu != cpu) || kvm_check_tsc_unstable()) {
4035                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
4036                                 rdtsc() - vcpu->arch.last_host_tsc;
4037                 if (tsc_delta < 0)
4038                         mark_tsc_unstable("KVM discovered backwards TSC");
4039
4040                 if (kvm_check_tsc_unstable()) {
4041                         u64 offset = kvm_compute_tsc_offset(vcpu,
4042                                                 vcpu->arch.last_guest_tsc);
4043                         kvm_vcpu_write_tsc_offset(vcpu, offset);
4044                         vcpu->arch.tsc_catchup = 1;
4045                 }
4046
4047                 if (kvm_lapic_hv_timer_in_use(vcpu))
4048                         kvm_lapic_restart_hv_timer(vcpu);
4049
4050                 /*
4051                  * On a host with synchronized TSC, there is no need to update
4052                  * kvmclock on vcpu->cpu migration
4053                  */
4054                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
4055                         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
4056                 if (vcpu->cpu != cpu)
4057                         kvm_make_request(KVM_REQ_MIGRATE_TIMER, vcpu);
4058                 vcpu->cpu = cpu;
4059         }
4060
4061         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
4062 }
4063
4064 static void kvm_steal_time_set_preempted(struct kvm_vcpu *vcpu)
4065 {
4066         struct kvm_host_map map;
4067         struct kvm_steal_time *st;
4068         int idx;
4069
4070         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
4071                 return;
4072
4073         if (vcpu->arch.st.preempted)
4074                 return;
4075
4076         /*
4077          * Take the srcu lock as memslots will be accessed to check the gfn
4078          * cache generation against the memslots generation.
4079          */
4080         idx = srcu_read_lock(&vcpu->kvm->srcu);
4081
4082         if (kvm_map_gfn(vcpu, vcpu->arch.st.msr_val >> PAGE_SHIFT, &map,
4083                         &vcpu->arch.st.cache, true))
4084                 goto out;
4085
4086         st = map.hva +
4087                 offset_in_page(vcpu->arch.st.msr_val & KVM_STEAL_VALID_BITS);
4088
4089         st->preempted = vcpu->arch.st.preempted = KVM_VCPU_PREEMPTED;
4090
4091         kvm_unmap_gfn(vcpu, &map, &vcpu->arch.st.cache, true, true);
4092
4093 out:
4094         srcu_read_unlock(&vcpu->kvm->srcu, idx);
4095 }
4096
4097 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
4098 {
4099         if (vcpu->preempted && !vcpu->arch.guest_state_protected)
4100                 vcpu->arch.preempted_in_kernel = !static_call(kvm_x86_get_cpl)(vcpu);
4101
4102         if (kvm_xen_msr_enabled(vcpu->kvm))
4103                 kvm_xen_runstate_set_preempted(vcpu);
4104         else
4105                 kvm_steal_time_set_preempted(vcpu);
4106
4107         static_call(kvm_x86_vcpu_put)(vcpu);
4108         vcpu->arch.last_host_tsc = rdtsc();
4109         /*
4110          * If userspace has set any breakpoints or watchpoints, dr6 is restored
4111          * on every vmexit, but if not, we might have a stale dr6 from the
4112          * guest. do_debug expects dr6 to be cleared after it runs, do the same.
4113          */
4114         set_debugreg(0, 6);
4115 }
4116
4117 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
4118                                     struct kvm_lapic_state *s)
4119 {
4120         if (vcpu->arch.apicv_active)
4121                 static_call(kvm_x86_sync_pir_to_irr)(vcpu);
4122
4123         return kvm_apic_get_state(vcpu, s);
4124 }
4125
4126 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
4127                                     struct kvm_lapic_state *s)
4128 {
4129         int r;
4130
4131         r = kvm_apic_set_state(vcpu, s);
4132         if (r)
4133                 return r;
4134         update_cr8_intercept(vcpu);
4135
4136         return 0;
4137 }
4138
4139 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu *vcpu)
4140 {
4141         /*
4142          * We can accept userspace's request for interrupt injection
4143          * as long as we have a place to store the interrupt number.
4144          * The actual injection will happen when the CPU is able to
4145          * deliver the interrupt.
4146          */
4147         if (kvm_cpu_has_extint(vcpu))
4148                 return false;
4149
4150         /* Acknowledging ExtINT does not happen if LINT0 is masked.  */
4151         return (!lapic_in_kernel(vcpu) ||
4152                 kvm_apic_accept_pic_intr(vcpu));
4153 }
4154
4155 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu *vcpu)
4156 {
4157         return kvm_arch_interrupt_allowed(vcpu) &&
4158                 kvm_cpu_accept_dm_intr(vcpu);
4159 }
4160
4161 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
4162                                     struct kvm_interrupt *irq)
4163 {
4164         if (irq->irq >= KVM_NR_INTERRUPTS)
4165                 return -EINVAL;
4166
4167         if (!irqchip_in_kernel(vcpu->kvm)) {
4168                 kvm_queue_interrupt(vcpu, irq->irq, false);
4169                 kvm_make_request(KVM_REQ_EVENT, vcpu);
4170                 return 0;
4171         }
4172
4173         /*
4174          * With in-kernel LAPIC, we only use this to inject EXTINT, so
4175          * fail for in-kernel 8259.
4176          */
4177         if (pic_in_kernel(vcpu->kvm))
4178                 return -ENXIO;
4179
4180         if (vcpu->arch.pending_external_vector != -1)
4181                 return -EEXIST;
4182
4183         vcpu->arch.pending_external_vector = irq->irq;
4184         kvm_make_request(KVM_REQ_EVENT, vcpu);
4185         return 0;
4186 }
4187
4188 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
4189 {
4190         kvm_inject_nmi(vcpu);
4191
4192         return 0;
4193 }
4194
4195 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
4196 {
4197         kvm_make_request(KVM_REQ_SMI, vcpu);
4198
4199         return 0;
4200 }
4201
4202 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
4203                                            struct kvm_tpr_access_ctl *tac)
4204 {
4205         if (tac->flags)
4206                 return -EINVAL;
4207         vcpu->arch.tpr_access_reporting = !!tac->enabled;
4208         return 0;
4209 }
4210
4211 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
4212                                         u64 mcg_cap)
4213 {
4214         int r;
4215         unsigned bank_num = mcg_cap & 0xff, bank;
4216
4217         r = -EINVAL;
4218         if (!bank_num || bank_num > KVM_MAX_MCE_BANKS)
4219                 goto out;
4220         if (mcg_cap & ~(kvm_mce_cap_supported | 0xff | 0xff0000))
4221                 goto out;
4222         r = 0;
4223         vcpu->arch.mcg_cap = mcg_cap;
4224         /* Init IA32_MCG_CTL to all 1s */
4225         if (mcg_cap & MCG_CTL_P)
4226                 vcpu->arch.mcg_ctl = ~(u64)0;
4227         /* Init IA32_MCi_CTL to all 1s */
4228         for (bank = 0; bank < bank_num; bank++)
4229                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
4230
4231         static_call(kvm_x86_setup_mce)(vcpu);
4232 out:
4233         return r;
4234 }
4235
4236 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
4237                                       struct kvm_x86_mce *mce)
4238 {
4239         u64 mcg_cap = vcpu->arch.mcg_cap;
4240         unsigned bank_num = mcg_cap & 0xff;
4241         u64 *banks = vcpu->arch.mce_banks;
4242
4243         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
4244                 return -EINVAL;
4245         /*
4246          * if IA32_MCG_CTL is not all 1s, the uncorrected error
4247          * reporting is disabled
4248          */
4249         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
4250             vcpu->arch.mcg_ctl != ~(u64)0)
4251                 return 0;
4252         banks += 4 * mce->bank;
4253         /*
4254          * if IA32_MCi_CTL is not all 1s, the uncorrected error
4255          * reporting is disabled for the bank
4256          */
4257         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
4258                 return 0;
4259         if (mce->status & MCI_STATUS_UC) {
4260                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
4261                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
4262                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
4263                         return 0;
4264                 }
4265                 if (banks[1] & MCI_STATUS_VAL)
4266                         mce->status |= MCI_STATUS_OVER;
4267                 banks[2] = mce->addr;
4268                 banks[3] = mce->misc;
4269                 vcpu->arch.mcg_status = mce->mcg_status;
4270                 banks[1] = mce->status;
4271                 kvm_queue_exception(vcpu, MC_VECTOR);
4272         } else if (!(banks[1] & MCI_STATUS_VAL)
4273                    || !(banks[1] & MCI_STATUS_UC)) {
4274                 if (banks[1] & MCI_STATUS_VAL)
4275                         mce->status |= MCI_STATUS_OVER;
4276                 banks[2] = mce->addr;
4277                 banks[3] = mce->misc;
4278                 banks[1] = mce->status;
4279         } else
4280                 banks[1] |= MCI_STATUS_OVER;
4281         return 0;
4282 }
4283
4284 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
4285                                                struct kvm_vcpu_events *events)
4286 {
4287         process_nmi(vcpu);
4288
4289         if (kvm_check_request(KVM_REQ_SMI, vcpu))
4290                 process_smi(vcpu);
4291
4292         /*
4293          * In guest mode, payload delivery should be deferred,
4294          * so that the L1 hypervisor can intercept #PF before
4295          * CR2 is modified (or intercept #DB before DR6 is
4296          * modified under nVMX). Unless the per-VM capability,
4297          * KVM_CAP_EXCEPTION_PAYLOAD, is set, we may not defer the delivery of
4298          * an exception payload and handle after a KVM_GET_VCPU_EVENTS. Since we
4299          * opportunistically defer the exception payload, deliver it if the
4300          * capability hasn't been requested before processing a
4301          * KVM_GET_VCPU_EVENTS.
4302          */
4303         if (!vcpu->kvm->arch.exception_payload_enabled &&
4304             vcpu->arch.exception.pending && vcpu->arch.exception.has_payload)
4305                 kvm_deliver_exception_payload(vcpu);
4306
4307         /*
4308          * The API doesn't provide the instruction length for software
4309          * exceptions, so don't report them. As long as the guest RIP
4310          * isn't advanced, we should expect to encounter the exception
4311          * again.
4312          */
4313         if (kvm_exception_is_soft(vcpu->arch.exception.nr)) {
4314                 events->exception.injected = 0;
4315                 events->exception.pending = 0;
4316         } else {
4317                 events->exception.injected = vcpu->arch.exception.injected;
4318                 events->exception.pending = vcpu->arch.exception.pending;
4319                 /*
4320                  * For ABI compatibility, deliberately conflate
4321                  * pending and injected exceptions when
4322                  * KVM_CAP_EXCEPTION_PAYLOAD isn't enabled.
4323                  */
4324                 if (!vcpu->kvm->arch.exception_payload_enabled)
4325                         events->exception.injected |=
4326                                 vcpu->arch.exception.pending;
4327         }
4328         events->exception.nr = vcpu->arch.exception.nr;
4329         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
4330         events->exception.error_code = vcpu->arch.exception.error_code;
4331         events->exception_has_payload = vcpu->arch.exception.has_payload;
4332         events->exception_payload = vcpu->arch.exception.payload;
4333
4334         events->interrupt.injected =
4335                 vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft;
4336         events->interrupt.nr = vcpu->arch.interrupt.nr;
4337         events->interrupt.soft = 0;
4338         events->interrupt.shadow = static_call(kvm_x86_get_interrupt_shadow)(vcpu);
4339
4340         events->nmi.injected = vcpu->arch.nmi_injected;
4341         events->nmi.pending = vcpu->arch.nmi_pending != 0;
4342         events->nmi.masked = static_call(kvm_x86_get_nmi_mask)(vcpu);
4343         events->nmi.pad = 0;
4344
4345         events->sipi_vector = 0; /* never valid when reporting to user space */
4346
4347         events->smi.smm = is_smm(vcpu);
4348         events->smi.pending = vcpu->arch.smi_pending;
4349         events->smi.smm_inside_nmi =
4350                 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
4351         events->smi.latched_init = kvm_lapic_latched_init(vcpu);
4352
4353         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
4354                          | KVM_VCPUEVENT_VALID_SHADOW
4355                          | KVM_VCPUEVENT_VALID_SMM);
4356         if (vcpu->kvm->arch.exception_payload_enabled)
4357                 events->flags |= KVM_VCPUEVENT_VALID_PAYLOAD;
4358
4359         memset(&events->reserved, 0, sizeof(events->reserved));
4360 }
4361
4362 static void kvm_smm_changed(struct kvm_vcpu *vcpu);
4363
4364 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
4365                                               struct kvm_vcpu_events *events)
4366 {
4367         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
4368                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
4369                               | KVM_VCPUEVENT_VALID_SHADOW
4370                               | KVM_VCPUEVENT_VALID_SMM
4371                               | KVM_VCPUEVENT_VALID_PAYLOAD))
4372                 return -EINVAL;
4373
4374         if (events->flags & KVM_VCPUEVENT_VALID_PAYLOAD) {
4375                 if (!vcpu->kvm->arch.exception_payload_enabled)
4376                         return -EINVAL;
4377                 if (events->exception.pending)
4378                         events->exception.injected = 0;
4379                 else
4380                         events->exception_has_payload = 0;
4381         } else {
4382                 events->exception.pending = 0;
4383                 events->exception_has_payload = 0;
4384         }
4385
4386         if ((events->exception.injected || events->exception.pending) &&
4387             (events->exception.nr > 31 || events->exception.nr == NMI_VECTOR))
4388                 return -EINVAL;
4389
4390         /* INITs are latched while in SMM */
4391         if (events->flags & KVM_VCPUEVENT_VALID_SMM &&
4392             (events->smi.smm || events->smi.pending) &&
4393             vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED)
4394                 return -EINVAL;
4395
4396         process_nmi(vcpu);
4397         vcpu->arch.exception.injected = events->exception.injected;
4398         vcpu->arch.exception.pending = events->exception.pending;
4399         vcpu->arch.exception.nr = events->exception.nr;
4400         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
4401         vcpu->arch.exception.error_code = events->exception.error_code;
4402         vcpu->arch.exception.has_payload = events->exception_has_payload;
4403         vcpu->arch.exception.payload = events->exception_payload;
4404
4405         vcpu->arch.interrupt.injected = events->interrupt.injected;
4406         vcpu->arch.interrupt.nr = events->interrupt.nr;
4407         vcpu->arch.interrupt.soft = events->interrupt.soft;
4408         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
4409                 static_call(kvm_x86_set_interrupt_shadow)(vcpu,
4410                                                 events->interrupt.shadow);
4411
4412         vcpu->arch.nmi_injected = events->nmi.injected;
4413         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
4414                 vcpu->arch.nmi_pending = events->nmi.pending;
4415         static_call(kvm_x86_set_nmi_mask)(vcpu, events->nmi.masked);
4416
4417         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
4418             lapic_in_kernel(vcpu))
4419                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
4420
4421         if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
4422                 if (!!(vcpu->arch.hflags & HF_SMM_MASK) != events->smi.smm) {
4423                         if (events->smi.smm)
4424                                 vcpu->arch.hflags |= HF_SMM_MASK;
4425                         else
4426                                 vcpu->arch.hflags &= ~HF_SMM_MASK;
4427                         kvm_smm_changed(vcpu);
4428                 }
4429
4430                 vcpu->arch.smi_pending = events->smi.pending;
4431
4432                 if (events->smi.smm) {
4433                         if (events->smi.smm_inside_nmi)
4434                                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
4435                         else
4436                                 vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
4437                 }
4438
4439                 if (lapic_in_kernel(vcpu)) {
4440                         if (events->smi.latched_init)
4441                                 set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
4442                         else
4443                                 clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
4444                 }
4445         }
4446
4447         kvm_make_request(KVM_REQ_EVENT, vcpu);
4448
4449         return 0;
4450 }
4451
4452 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
4453                                              struct kvm_debugregs *dbgregs)
4454 {
4455         unsigned long val;
4456
4457         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
4458         kvm_get_dr(vcpu, 6, &val);
4459         dbgregs->dr6 = val;
4460         dbgregs->dr7 = vcpu->arch.dr7;
4461         dbgregs->flags = 0;
4462         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
4463 }
4464
4465 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
4466                                             struct kvm_debugregs *dbgregs)
4467 {
4468         if (dbgregs->flags)
4469                 return -EINVAL;
4470
4471         if (!kvm_dr6_valid(dbgregs->dr6))
4472                 return -EINVAL;
4473         if (!kvm_dr7_valid(dbgregs->dr7))
4474                 return -EINVAL;
4475
4476         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
4477         kvm_update_dr0123(vcpu);
4478         vcpu->arch.dr6 = dbgregs->dr6;
4479         vcpu->arch.dr7 = dbgregs->dr7;
4480         kvm_update_dr7(vcpu);
4481
4482         return 0;
4483 }
4484
4485 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
4486
4487 static void fill_xsave(u8 *dest, struct kvm_vcpu *vcpu)
4488 {
4489         struct xregs_state *xsave = &vcpu->arch.guest_fpu->state.xsave;
4490         u64 xstate_bv = xsave->header.xfeatures;
4491         u64 valid;
4492
4493         /*
4494          * Copy legacy XSAVE area, to avoid complications with CPUID
4495          * leaves 0 and 1 in the loop below.
4496          */
4497         memcpy(dest, xsave, XSAVE_HDR_OFFSET);
4498
4499         /* Set XSTATE_BV */
4500         xstate_bv &= vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FPSSE;
4501         *(u64 *)(dest + XSAVE_HDR_OFFSET) = xstate_bv;
4502
4503         /*
4504          * Copy each region from the possibly compacted offset to the
4505          * non-compacted offset.
4506          */
4507         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
4508         while (valid) {
4509                 u64 xfeature_mask = valid & -valid;
4510                 int xfeature_nr = fls64(xfeature_mask) - 1;
4511                 void *src = get_xsave_addr(xsave, xfeature_nr);
4512
4513                 if (src) {
4514                         u32 size, offset, ecx, edx;
4515                         cpuid_count(XSTATE_CPUID, xfeature_nr,
4516                                     &size, &offset, &ecx, &edx);
4517                         if (xfeature_nr == XFEATURE_PKRU)
4518                                 memcpy(dest + offset, &vcpu->arch.pkru,
4519                                        sizeof(vcpu->arch.pkru));
4520                         else
4521                                 memcpy(dest + offset, src, size);
4522
4523                 }
4524
4525                 valid -= xfeature_mask;
4526         }
4527 }
4528
4529 static void load_xsave(struct kvm_vcpu *vcpu, u8 *src)
4530 {
4531         struct xregs_state *xsave = &vcpu->arch.guest_fpu->state.xsave;
4532         u64 xstate_bv = *(u64 *)(src + XSAVE_HDR_OFFSET);
4533         u64 valid;
4534
4535         /*
4536          * Copy legacy XSAVE area, to avoid complications with CPUID
4537          * leaves 0 and 1 in the loop below.
4538          */
4539         memcpy(xsave, src, XSAVE_HDR_OFFSET);
4540
4541         /* Set XSTATE_BV and possibly XCOMP_BV.  */
4542         xsave->header.xfeatures = xstate_bv;
4543         if (boot_cpu_has(X86_FEATURE_XSAVES))
4544                 xsave->header.xcomp_bv = host_xcr0 | XSTATE_COMPACTION_ENABLED;
4545
4546         /*
4547          * Copy each region from the non-compacted offset to the
4548          * possibly compacted offset.
4549          */
4550         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
4551         while (valid) {
4552                 u64 xfeature_mask = valid & -valid;
4553                 int xfeature_nr = fls64(xfeature_mask) - 1;
4554                 void *dest = get_xsave_addr(xsave, xfeature_nr);
4555
4556                 if (dest) {
4557                         u32 size, offset, ecx, edx;
4558                         cpuid_count(XSTATE_CPUID, xfeature_nr,
4559                                     &size, &offset, &ecx, &edx);
4560                         if (xfeature_nr == XFEATURE_PKRU)
4561                                 memcpy(&vcpu->arch.pkru, src + offset,
4562                                        sizeof(vcpu->arch.pkru));
4563                         else
4564                                 memcpy(dest, src + offset, size);
4565                 }
4566
4567                 valid -= xfeature_mask;
4568         }
4569 }
4570
4571 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
4572                                          struct kvm_xsave *guest_xsave)
4573 {
4574         if (!vcpu->arch.guest_fpu)
4575                 return;
4576
4577         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
4578                 memset(guest_xsave, 0, sizeof(struct kvm_xsave));
4579                 fill_xsave((u8 *) guest_xsave->region, vcpu);
4580         } else {
4581                 memcpy(guest_xsave->region,
4582                         &vcpu->arch.guest_fpu->state.fxsave,
4583                         sizeof(struct fxregs_state));
4584                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
4585                         XFEATURE_MASK_FPSSE;
4586         }
4587 }
4588
4589 #define XSAVE_MXCSR_OFFSET 24
4590
4591 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
4592                                         struct kvm_xsave *guest_xsave)
4593 {
4594         u64 xstate_bv;
4595         u32 mxcsr;
4596
4597         if (!vcpu->arch.guest_fpu)
4598                 return 0;
4599
4600         xstate_bv = *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
4601         mxcsr = *(u32 *)&guest_xsave->region[XSAVE_MXCSR_OFFSET / sizeof(u32)];
4602
4603         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
4604                 /*
4605                  * Here we allow setting states that are not present in
4606                  * CPUID leaf 0xD, index 0, EDX:EAX.  This is for compatibility
4607                  * with old userspace.
4608                  */
4609                 if (xstate_bv & ~supported_xcr0 || mxcsr & ~mxcsr_feature_mask)
4610                         return -EINVAL;
4611                 load_xsave(vcpu, (u8 *)guest_xsave->region);
4612         } else {
4613                 if (xstate_bv & ~XFEATURE_MASK_FPSSE ||
4614                         mxcsr & ~mxcsr_feature_mask)
4615                         return -EINVAL;
4616                 memcpy(&vcpu->arch.guest_fpu->state.fxsave,
4617                         guest_xsave->region, sizeof(struct fxregs_state));
4618         }
4619         return 0;
4620 }
4621
4622 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
4623                                         struct kvm_xcrs *guest_xcrs)
4624 {
4625         if (!boot_cpu_has(X86_FEATURE_XSAVE)) {
4626                 guest_xcrs->nr_xcrs = 0;
4627                 return;
4628         }
4629
4630         guest_xcrs->nr_xcrs = 1;
4631         guest_xcrs->flags = 0;
4632         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
4633         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
4634 }
4635
4636 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
4637                                        struct kvm_xcrs *guest_xcrs)
4638 {
4639         int i, r = 0;
4640
4641         if (!boot_cpu_has(X86_FEATURE_XSAVE))
4642                 return -EINVAL;
4643
4644         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
4645                 return -EINVAL;
4646
4647         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
4648                 /* Only support XCR0 currently */
4649                 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
4650                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
4651                                 guest_xcrs->xcrs[i].value);
4652                         break;
4653                 }
4654         if (r)
4655                 r = -EINVAL;
4656         return r;
4657 }
4658
4659 /*
4660  * kvm_set_guest_paused() indicates to the guest kernel that it has been
4661  * stopped by the hypervisor.  This function will be called from the host only.
4662  * EINVAL is returned when the host attempts to set the flag for a guest that
4663  * does not support pv clocks.
4664  */
4665 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
4666 {
4667         if (!vcpu->arch.pv_time_enabled)
4668                 return -EINVAL;
4669         vcpu->arch.pvclock_set_guest_stopped_request = true;
4670         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4671         return 0;
4672 }
4673
4674 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
4675                                      struct kvm_enable_cap *cap)
4676 {
4677         int r;
4678         uint16_t vmcs_version;
4679         void __user *user_ptr;
4680
4681         if (cap->flags)
4682                 return -EINVAL;
4683
4684         switch (cap->cap) {
4685         case KVM_CAP_HYPERV_SYNIC2:
4686                 if (cap->args[0])
4687                         return -EINVAL;
4688                 fallthrough;
4689
4690         case KVM_CAP_HYPERV_SYNIC:
4691                 if (!irqchip_in_kernel(vcpu->kvm))
4692                         return -EINVAL;
4693                 return kvm_hv_activate_synic(vcpu, cap->cap ==
4694                                              KVM_CAP_HYPERV_SYNIC2);
4695         case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
4696                 if (!kvm_x86_ops.nested_ops->enable_evmcs)
4697                         return -ENOTTY;
4698                 r = kvm_x86_ops.nested_ops->enable_evmcs(vcpu, &vmcs_version);
4699                 if (!r) {
4700                         user_ptr = (void __user *)(uintptr_t)cap->args[0];
4701                         if (copy_to_user(user_ptr, &vmcs_version,
4702                                          sizeof(vmcs_version)))
4703                                 r = -EFAULT;
4704                 }
4705                 return r;
4706         case KVM_CAP_HYPERV_DIRECT_TLBFLUSH:
4707                 if (!kvm_x86_ops.enable_direct_tlbflush)
4708                         return -ENOTTY;
4709
4710                 return static_call(kvm_x86_enable_direct_tlbflush)(vcpu);
4711
4712         case KVM_CAP_ENFORCE_PV_FEATURE_CPUID:
4713                 vcpu->arch.pv_cpuid.enforce = cap->args[0];
4714                 if (vcpu->arch.pv_cpuid.enforce)
4715                         kvm_update_pv_runtime(vcpu);
4716
4717                 return 0;
4718         default:
4719                 return -EINVAL;
4720         }
4721 }
4722
4723 long kvm_arch_vcpu_ioctl(struct file *filp,
4724                          unsigned int ioctl, unsigned long arg)
4725 {
4726         struct kvm_vcpu *vcpu = filp->private_data;
4727         void __user *argp = (void __user *)arg;
4728         int r;
4729         union {
4730                 struct kvm_lapic_state *lapic;
4731                 struct kvm_xsave *xsave;
4732                 struct kvm_xcrs *xcrs;
4733                 void *buffer;
4734         } u;
4735
4736         vcpu_load(vcpu);
4737
4738         u.buffer = NULL;
4739         switch (ioctl) {
4740         case KVM_GET_LAPIC: {
4741                 r = -EINVAL;
4742                 if (!lapic_in_kernel(vcpu))
4743                         goto out;
4744                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state),
4745                                 GFP_KERNEL_ACCOUNT);
4746
4747                 r = -ENOMEM;
4748                 if (!u.lapic)
4749                         goto out;
4750                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
4751                 if (r)
4752                         goto out;
4753                 r = -EFAULT;
4754                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
4755                         goto out;
4756                 r = 0;
4757                 break;
4758         }
4759         case KVM_SET_LAPIC: {
4760                 r = -EINVAL;
4761                 if (!lapic_in_kernel(vcpu))
4762                         goto out;
4763                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
4764                 if (IS_ERR(u.lapic)) {
4765                         r = PTR_ERR(u.lapic);
4766                         goto out_nofree;
4767                 }
4768
4769                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
4770                 break;
4771         }
4772         case KVM_INTERRUPT: {
4773                 struct kvm_interrupt irq;
4774
4775                 r = -EFAULT;
4776                 if (copy_from_user(&irq, argp, sizeof(irq)))
4777                         goto out;
4778                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
4779                 break;
4780         }
4781         case KVM_NMI: {
4782                 r = kvm_vcpu_ioctl_nmi(vcpu);
4783                 break;
4784         }
4785         case KVM_SMI: {
4786                 r = kvm_vcpu_ioctl_smi(vcpu);
4787                 break;
4788         }
4789         case KVM_SET_CPUID: {
4790                 struct kvm_cpuid __user *cpuid_arg = argp;
4791                 struct kvm_cpuid cpuid;
4792
4793                 r = -EFAULT;
4794                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4795                         goto out;
4796                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
4797                 break;
4798         }
4799         case KVM_SET_CPUID2: {
4800                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4801                 struct kvm_cpuid2 cpuid;
4802
4803                 r = -EFAULT;
4804                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4805                         goto out;
4806                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
4807                                               cpuid_arg->entries);
4808                 break;
4809         }
4810         case KVM_GET_CPUID2: {
4811                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4812                 struct kvm_cpuid2 cpuid;
4813
4814                 r = -EFAULT;
4815                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4816                         goto out;
4817                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
4818                                               cpuid_arg->entries);
4819                 if (r)
4820                         goto out;
4821                 r = -EFAULT;
4822                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
4823                         goto out;
4824                 r = 0;
4825                 break;
4826         }
4827         case KVM_GET_MSRS: {
4828                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
4829                 r = msr_io(vcpu, argp, do_get_msr, 1);
4830                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4831                 break;
4832         }
4833         case KVM_SET_MSRS: {
4834                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
4835                 r = msr_io(vcpu, argp, do_set_msr, 0);
4836                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4837                 break;
4838         }
4839         case KVM_TPR_ACCESS_REPORTING: {
4840                 struct kvm_tpr_access_ctl tac;
4841
4842                 r = -EFAULT;
4843                 if (copy_from_user(&tac, argp, sizeof(tac)))
4844                         goto out;
4845                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
4846                 if (r)
4847                         goto out;
4848                 r = -EFAULT;
4849                 if (copy_to_user(argp, &tac, sizeof(tac)))
4850                         goto out;
4851                 r = 0;
4852                 break;
4853         };
4854         case KVM_SET_VAPIC_ADDR: {
4855                 struct kvm_vapic_addr va;
4856                 int idx;
4857
4858                 r = -EINVAL;
4859                 if (!lapic_in_kernel(vcpu))
4860                         goto out;
4861                 r = -EFAULT;
4862                 if (copy_from_user(&va, argp, sizeof(va)))
4863                         goto out;
4864                 idx = srcu_read_lock(&vcpu->kvm->srcu);
4865                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
4866                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4867                 break;
4868         }
4869         case KVM_X86_SETUP_MCE: {
4870                 u64 mcg_cap;
4871
4872                 r = -EFAULT;
4873                 if (copy_from_user(&mcg_cap, argp, sizeof(mcg_cap)))
4874                         goto out;
4875                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
4876                 break;
4877         }
4878         case KVM_X86_SET_MCE: {
4879                 struct kvm_x86_mce mce;
4880
4881                 r = -EFAULT;
4882                 if (copy_from_user(&mce, argp, sizeof(mce)))
4883                         goto out;
4884                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
4885                 break;
4886         }
4887         case KVM_GET_VCPU_EVENTS: {
4888                 struct kvm_vcpu_events events;
4889
4890                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
4891
4892                 r = -EFAULT;
4893                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
4894                         break;
4895                 r = 0;
4896                 break;
4897         }
4898         case KVM_SET_VCPU_EVENTS: {
4899                 struct kvm_vcpu_events events;
4900
4901                 r = -EFAULT;
4902                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
4903                         break;
4904
4905                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
4906                 break;
4907         }
4908         case KVM_GET_DEBUGREGS: {
4909                 struct kvm_debugregs dbgregs;
4910
4911                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
4912
4913                 r = -EFAULT;
4914                 if (copy_to_user(argp, &dbgregs,
4915                                  sizeof(struct kvm_debugregs)))
4916                         break;
4917                 r = 0;
4918                 break;
4919         }
4920         case KVM_SET_DEBUGREGS: {
4921                 struct kvm_debugregs dbgregs;
4922
4923                 r = -EFAULT;
4924                 if (copy_from_user(&dbgregs, argp,
4925                                    sizeof(struct kvm_debugregs)))
4926                         break;
4927
4928                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
4929                 break;
4930         }
4931         case KVM_GET_XSAVE: {
4932                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL_ACCOUNT);
4933                 r = -ENOMEM;
4934                 if (!u.xsave)
4935                         break;
4936
4937                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
4938
4939                 r = -EFAULT;
4940                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
4941                         break;
4942                 r = 0;
4943                 break;
4944         }
4945         case KVM_SET_XSAVE: {
4946                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
4947                 if (IS_ERR(u.xsave)) {
4948                         r = PTR_ERR(u.xsave);
4949                         goto out_nofree;
4950                 }
4951
4952                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
4953                 break;
4954         }
4955         case KVM_GET_XCRS: {
4956                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL_ACCOUNT);
4957                 r = -ENOMEM;
4958                 if (!u.xcrs)
4959                         break;
4960
4961                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
4962
4963                 r = -EFAULT;
4964                 if (copy_to_user(argp, u.xcrs,
4965                                  sizeof(struct kvm_xcrs)))
4966                         break;
4967                 r = 0;
4968                 break;
4969         }
4970         case KVM_SET_XCRS: {
4971                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
4972                 if (IS_ERR(u.xcrs)) {
4973                         r = PTR_ERR(u.xcrs);
4974                         goto out_nofree;
4975                 }
4976
4977                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
4978                 break;
4979         }
4980         case KVM_SET_TSC_KHZ: {
4981                 u32 user_tsc_khz;
4982
4983                 r = -EINVAL;
4984                 user_tsc_khz = (u32)arg;
4985
4986                 if (kvm_has_tsc_control &&
4987                     user_tsc_khz >= kvm_max_guest_tsc_khz)
4988                         goto out;
4989
4990                 if (user_tsc_khz == 0)
4991                         user_tsc_khz = tsc_khz;
4992
4993                 if (!kvm_set_tsc_khz(vcpu, user_tsc_khz))
4994                         r = 0;
4995
4996                 goto out;
4997         }
4998         case KVM_GET_TSC_KHZ: {
4999                 r = vcpu->arch.virtual_tsc_khz;
5000                 goto out;
5001         }
5002         case KVM_KVMCLOCK_CTRL: {
5003                 r = kvm_set_guest_paused(vcpu);
5004                 goto out;
5005         }
5006         case KVM_ENABLE_CAP: {
5007                 struct kvm_enable_cap cap;
5008
5009                 r = -EFAULT;
5010                 if (copy_from_user(&cap, argp, sizeof(cap)))
5011                         goto out;
5012                 r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap);
5013                 break;
5014         }
5015         case KVM_GET_NESTED_STATE: {
5016                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
5017                 u32 user_data_size;
5018
5019                 r = -EINVAL;
5020                 if (!kvm_x86_ops.nested_ops->get_state)
5021                         break;
5022
5023                 BUILD_BUG_ON(sizeof(user_data_size) != sizeof(user_kvm_nested_state->size));
5024                 r = -EFAULT;
5025                 if (get_user(user_data_size, &user_kvm_nested_state->size))
5026                         break;
5027
5028                 r = kvm_x86_ops.nested_ops->get_state(vcpu, user_kvm_nested_state,
5029                                                      user_data_size);
5030                 if (r < 0)
5031                         break;
5032
5033                 if (r > user_data_size) {
5034                         if (put_user(r, &user_kvm_nested_state->size))
5035                                 r = -EFAULT;
5036                         else
5037                                 r = -E2BIG;
5038                         break;
5039                 }
5040
5041                 r = 0;
5042                 break;
5043         }
5044         case KVM_SET_NESTED_STATE: {
5045                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
5046                 struct kvm_nested_state kvm_state;
5047                 int idx;
5048
5049                 r = -EINVAL;
5050                 if (!kvm_x86_ops.nested_ops->set_state)
5051                         break;
5052
5053                 r = -EFAULT;
5054                 if (copy_from_user(&kvm_state, user_kvm_nested_state, sizeof(kvm_state)))
5055                         break;
5056
5057                 r = -EINVAL;
5058                 if (kvm_state.size < sizeof(kvm_state))
5059                         break;
5060
5061                 if (kvm_state.flags &
5062                     ~(KVM_STATE_NESTED_RUN_PENDING | KVM_STATE_NESTED_GUEST_MODE
5063                       | KVM_STATE_NESTED_EVMCS | KVM_STATE_NESTED_MTF_PENDING
5064                       | KVM_STATE_NESTED_GIF_SET))
5065                         break;
5066
5067                 /* nested_run_pending implies guest_mode.  */
5068                 if ((kvm_state.flags & KVM_STATE_NESTED_RUN_PENDING)
5069                     && !(kvm_state.flags & KVM_STATE_NESTED_GUEST_MODE))
5070                         break;
5071
5072                 idx = srcu_read_lock(&vcpu->kvm->srcu);
5073                 r = kvm_x86_ops.nested_ops->set_state(vcpu, user_kvm_nested_state, &kvm_state);
5074                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5075                 break;
5076         }
5077         case KVM_GET_SUPPORTED_HV_CPUID:
5078                 r = kvm_ioctl_get_supported_hv_cpuid(vcpu, argp);
5079                 break;
5080 #ifdef CONFIG_KVM_XEN
5081         case KVM_XEN_VCPU_GET_ATTR: {
5082                 struct kvm_xen_vcpu_attr xva;
5083
5084                 r = -EFAULT;
5085                 if (copy_from_user(&xva, argp, sizeof(xva)))
5086                         goto out;
5087                 r = kvm_xen_vcpu_get_attr(vcpu, &xva);
5088                 if (!r && copy_to_user(argp, &xva, sizeof(xva)))
5089                         r = -EFAULT;
5090                 break;
5091         }
5092         case KVM_XEN_VCPU_SET_ATTR: {
5093                 struct kvm_xen_vcpu_attr xva;
5094
5095                 r = -EFAULT;
5096                 if (copy_from_user(&xva, argp, sizeof(xva)))
5097                         goto out;
5098                 r = kvm_xen_vcpu_set_attr(vcpu, &xva);
5099                 break;
5100         }
5101 #endif
5102         default:
5103                 r = -EINVAL;
5104         }
5105 out:
5106         kfree(u.buffer);
5107 out_nofree:
5108         vcpu_put(vcpu);
5109         return r;
5110 }
5111
5112 vm_fault_t kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
5113 {
5114         return VM_FAULT_SIGBUS;
5115 }
5116
5117 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
5118 {
5119         int ret;
5120
5121         if (addr > (unsigned int)(-3 * PAGE_SIZE))
5122                 return -EINVAL;
5123         ret = static_call(kvm_x86_set_tss_addr)(kvm, addr);
5124         return ret;
5125 }
5126
5127 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
5128                                               u64 ident_addr)
5129 {
5130         return static_call(kvm_x86_set_identity_map_addr)(kvm, ident_addr);
5131 }
5132
5133 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
5134                                          unsigned long kvm_nr_mmu_pages)
5135 {
5136         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
5137                 return -EINVAL;
5138
5139         mutex_lock(&kvm->slots_lock);
5140
5141         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
5142         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
5143
5144         mutex_unlock(&kvm->slots_lock);
5145         return 0;
5146 }
5147
5148 static unsigned long kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
5149 {
5150         return kvm->arch.n_max_mmu_pages;
5151 }
5152
5153 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
5154 {
5155         struct kvm_pic *pic = kvm->arch.vpic;
5156         int r;
5157
5158         r = 0;
5159         switch (chip->chip_id) {
5160         case KVM_IRQCHIP_PIC_MASTER:
5161                 memcpy(&chip->chip.pic, &pic->pics[0],
5162                         sizeof(struct kvm_pic_state));
5163                 break;
5164         case KVM_IRQCHIP_PIC_SLAVE:
5165                 memcpy(&chip->chip.pic, &pic->pics[1],
5166                         sizeof(struct kvm_pic_state));
5167                 break;
5168         case KVM_IRQCHIP_IOAPIC:
5169                 kvm_get_ioapic(kvm, &chip->chip.ioapic);
5170                 break;
5171         default:
5172                 r = -EINVAL;
5173                 break;
5174         }
5175         return r;
5176 }
5177
5178 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
5179 {
5180         struct kvm_pic *pic = kvm->arch.vpic;
5181         int r;
5182
5183         r = 0;
5184         switch (chip->chip_id) {
5185         case KVM_IRQCHIP_PIC_MASTER:
5186                 spin_lock(&pic->lock);
5187                 memcpy(&pic->pics[0], &chip->chip.pic,
5188                         sizeof(struct kvm_pic_state));
5189                 spin_unlock(&pic->lock);
5190                 break;
5191         case KVM_IRQCHIP_PIC_SLAVE:
5192                 spin_lock(&pic->lock);
5193                 memcpy(&pic->pics[1], &chip->chip.pic,
5194                         sizeof(struct kvm_pic_state));
5195                 spin_unlock(&pic->lock);
5196                 break;
5197         case KVM_IRQCHIP_IOAPIC:
5198                 kvm_set_ioapic(kvm, &chip->chip.ioapic);
5199                 break;
5200         default:
5201                 r = -EINVAL;
5202                 break;
5203         }
5204         kvm_pic_update_irq(pic);
5205         return r;
5206 }
5207
5208 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
5209 {
5210         struct kvm_kpit_state *kps = &kvm->arch.vpit->pit_state;
5211
5212         BUILD_BUG_ON(sizeof(*ps) != sizeof(kps->channels));
5213
5214         mutex_lock(&kps->lock);
5215         memcpy(ps, &kps->channels, sizeof(*ps));
5216         mutex_unlock(&kps->lock);
5217         return 0;
5218 }
5219
5220 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
5221 {
5222         int i;
5223         struct kvm_pit *pit = kvm->arch.vpit;
5224
5225         mutex_lock(&pit->pit_state.lock);
5226         memcpy(&pit->pit_state.channels, ps, sizeof(*ps));
5227         for (i = 0; i < 3; i++)
5228                 kvm_pit_load_count(pit, i, ps->channels[i].count, 0);
5229         mutex_unlock(&pit->pit_state.lock);
5230         return 0;
5231 }
5232
5233 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
5234 {
5235         mutex_lock(&kvm->arch.vpit->pit_state.lock);
5236         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
5237                 sizeof(ps->channels));
5238         ps->flags = kvm->arch.vpit->pit_state.flags;
5239         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
5240         memset(&ps->reserved, 0, sizeof(ps->reserved));
5241         return 0;
5242 }
5243
5244 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
5245 {
5246         int start = 0;
5247         int i;
5248         u32 prev_legacy, cur_legacy;
5249         struct kvm_pit *pit = kvm->arch.vpit;
5250
5251         mutex_lock(&pit->pit_state.lock);
5252         prev_legacy = pit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
5253         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
5254         if (!prev_legacy && cur_legacy)
5255                 start = 1;
5256         memcpy(&pit->pit_state.channels, &ps->channels,
5257                sizeof(pit->pit_state.channels));
5258         pit->pit_state.flags = ps->flags;
5259         for (i = 0; i < 3; i++)
5260                 kvm_pit_load_count(pit, i, pit->pit_state.channels[i].count,
5261                                    start && i == 0);
5262         mutex_unlock(&pit->pit_state.lock);
5263         return 0;
5264 }
5265
5266 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
5267                                  struct kvm_reinject_control *control)
5268 {
5269         struct kvm_pit *pit = kvm->arch.vpit;
5270
5271         /* pit->pit_state.lock was overloaded to prevent userspace from getting
5272          * an inconsistent state after running multiple KVM_REINJECT_CONTROL
5273          * ioctls in parallel.  Use a separate lock if that ioctl isn't rare.
5274          */
5275         mutex_lock(&pit->pit_state.lock);
5276         kvm_pit_set_reinject(pit, control->pit_reinject);
5277         mutex_unlock(&pit->pit_state.lock);
5278
5279         return 0;
5280 }
5281
5282 void kvm_arch_sync_dirty_log(struct kvm *kvm, struct kvm_memory_slot *memslot)
5283 {
5284
5285         /*
5286          * Flush all CPUs' dirty log buffers to the  dirty_bitmap.  Called
5287          * before reporting dirty_bitmap to userspace.  KVM flushes the buffers
5288          * on all VM-Exits, thus we only need to kick running vCPUs to force a
5289          * VM-Exit.
5290          */
5291         struct kvm_vcpu *vcpu;
5292         int i;
5293
5294         kvm_for_each_vcpu(i, vcpu, kvm)
5295                 kvm_vcpu_kick(vcpu);
5296 }
5297
5298 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
5299                         bool line_status)
5300 {
5301         if (!irqchip_in_kernel(kvm))
5302                 return -ENXIO;
5303
5304         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
5305                                         irq_event->irq, irq_event->level,
5306                                         line_status);
5307         return 0;
5308 }
5309
5310 int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
5311                             struct kvm_enable_cap *cap)
5312 {
5313         int r;
5314
5315         if (cap->flags)
5316                 return -EINVAL;
5317
5318         switch (cap->cap) {
5319         case KVM_CAP_DISABLE_QUIRKS:
5320                 kvm->arch.disabled_quirks = cap->args[0];
5321                 r = 0;
5322                 break;
5323         case KVM_CAP_SPLIT_IRQCHIP: {
5324                 mutex_lock(&kvm->lock);
5325                 r = -EINVAL;
5326                 if (cap->args[0] > MAX_NR_RESERVED_IOAPIC_PINS)
5327                         goto split_irqchip_unlock;
5328                 r = -EEXIST;
5329                 if (irqchip_in_kernel(kvm))
5330                         goto split_irqchip_unlock;
5331                 if (kvm->created_vcpus)
5332                         goto split_irqchip_unlock;
5333                 r = kvm_setup_empty_irq_routing(kvm);
5334                 if (r)
5335                         goto split_irqchip_unlock;
5336                 /* Pairs with irqchip_in_kernel. */
5337                 smp_wmb();
5338                 kvm->arch.irqchip_mode = KVM_IRQCHIP_SPLIT;
5339                 kvm->arch.nr_reserved_ioapic_pins = cap->args[0];
5340                 r = 0;
5341 split_irqchip_unlock:
5342                 mutex_unlock(&kvm->lock);
5343                 break;
5344         }
5345         case KVM_CAP_X2APIC_API:
5346                 r = -EINVAL;
5347                 if (cap->args[0] & ~KVM_X2APIC_API_VALID_FLAGS)
5348                         break;
5349
5350                 if (cap->args[0] & KVM_X2APIC_API_USE_32BIT_IDS)
5351                         kvm->arch.x2apic_format = true;
5352                 if (cap->args[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
5353                         kvm->arch.x2apic_broadcast_quirk_disabled = true;
5354
5355                 r = 0;
5356                 break;
5357         case KVM_CAP_X86_DISABLE_EXITS:
5358                 r = -EINVAL;
5359                 if (cap->args[0] & ~KVM_X86_DISABLE_VALID_EXITS)
5360                         break;
5361
5362                 if ((cap->args[0] & KVM_X86_DISABLE_EXITS_MWAIT) &&
5363                         kvm_can_mwait_in_guest())
5364                         kvm->arch.mwait_in_guest = true;
5365                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_HLT)
5366                         kvm->arch.hlt_in_guest = true;
5367                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_PAUSE)
5368                         kvm->arch.pause_in_guest = true;
5369                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_CSTATE)
5370                         kvm->arch.cstate_in_guest = true;
5371                 r = 0;
5372                 break;
5373         case KVM_CAP_MSR_PLATFORM_INFO:
5374                 kvm->arch.guest_can_read_msr_platform_info = cap->args[0];
5375                 r = 0;
5376                 break;
5377         case KVM_CAP_EXCEPTION_PAYLOAD:
5378                 kvm->arch.exception_payload_enabled = cap->args[0];
5379                 r = 0;
5380                 break;
5381         case KVM_CAP_X86_USER_SPACE_MSR:
5382                 kvm->arch.user_space_msr_mask = cap->args[0];
5383                 r = 0;
5384                 break;
5385         case KVM_CAP_X86_BUS_LOCK_EXIT:
5386                 r = -EINVAL;
5387                 if (cap->args[0] & ~KVM_BUS_LOCK_DETECTION_VALID_MODE)
5388                         break;
5389
5390                 if ((cap->args[0] & KVM_BUS_LOCK_DETECTION_OFF) &&
5391                     (cap->args[0] & KVM_BUS_LOCK_DETECTION_EXIT))
5392                         break;
5393
5394                 if (kvm_has_bus_lock_exit &&
5395                     cap->args[0] & KVM_BUS_LOCK_DETECTION_EXIT)
5396                         kvm->arch.bus_lock_detection_enabled = true;
5397                 r = 0;
5398                 break;
5399 #ifdef CONFIG_X86_SGX_KVM
5400         case KVM_CAP_SGX_ATTRIBUTE: {
5401                 unsigned long allowed_attributes = 0;
5402
5403                 r = sgx_set_attribute(&allowed_attributes, cap->args[0]);
5404                 if (r)
5405                         break;
5406
5407                 /* KVM only supports the PROVISIONKEY privileged attribute. */
5408                 if ((allowed_attributes & SGX_ATTR_PROVISIONKEY) &&
5409                     !(allowed_attributes & ~SGX_ATTR_PROVISIONKEY))
5410                         kvm->arch.sgx_provisioning_allowed = true;
5411                 else
5412                         r = -EINVAL;
5413                 break;
5414         }
5415 #endif
5416         case KVM_CAP_VM_COPY_ENC_CONTEXT_FROM:
5417                 r = -EINVAL;
5418                 if (kvm_x86_ops.vm_copy_enc_context_from)
5419                         r = kvm_x86_ops.vm_copy_enc_context_from(kvm, cap->args[0]);
5420                 return r;
5421         default:
5422                 r = -EINVAL;
5423                 break;
5424         }
5425         return r;
5426 }
5427
5428 static void kvm_clear_msr_filter(struct kvm *kvm)
5429 {
5430         u32 i;
5431         u32 count = kvm->arch.msr_filter.count;
5432         struct msr_bitmap_range ranges[16];
5433
5434         mutex_lock(&kvm->lock);
5435         kvm->arch.msr_filter.count = 0;
5436         memcpy(ranges, kvm->arch.msr_filter.ranges, count * sizeof(ranges[0]));
5437         mutex_unlock(&kvm->lock);
5438         synchronize_srcu(&kvm->srcu);
5439
5440         for (i = 0; i < count; i++)
5441                 kfree(ranges[i].bitmap);
5442 }
5443
5444 static int kvm_add_msr_filter(struct kvm *kvm, struct kvm_msr_filter_range *user_range)
5445 {
5446         struct msr_bitmap_range *ranges = kvm->arch.msr_filter.ranges;
5447         struct msr_bitmap_range range;
5448         unsigned long *bitmap = NULL;
5449         size_t bitmap_size;
5450         int r;
5451
5452         if (!user_range->nmsrs)
5453                 return 0;
5454
5455         bitmap_size = BITS_TO_LONGS(user_range->nmsrs) * sizeof(long);
5456         if (!bitmap_size || bitmap_size > KVM_MSR_FILTER_MAX_BITMAP_SIZE)
5457                 return -EINVAL;
5458
5459         bitmap = memdup_user((__user u8*)user_range->bitmap, bitmap_size);
5460         if (IS_ERR(bitmap))
5461                 return PTR_ERR(bitmap);
5462
5463         range = (struct msr_bitmap_range) {
5464                 .flags = user_range->flags,
5465                 .base = user_range->base,
5466                 .nmsrs = user_range->nmsrs,
5467                 .bitmap = bitmap,
5468         };
5469
5470         if (range.flags & ~(KVM_MSR_FILTER_READ | KVM_MSR_FILTER_WRITE)) {
5471                 r = -EINVAL;
5472                 goto err;
5473         }
5474
5475         if (!range.flags) {
5476                 r = -EINVAL;
5477                 goto err;
5478         }
5479
5480         /* Everything ok, add this range identifier to our global pool */
5481         ranges[kvm->arch.msr_filter.count] = range;
5482         /* Make sure we filled the array before we tell anyone to walk it */
5483         smp_wmb();
5484         kvm->arch.msr_filter.count++;
5485
5486         return 0;
5487 err:
5488         kfree(bitmap);
5489         return r;
5490 }
5491
5492 static int kvm_vm_ioctl_set_msr_filter(struct kvm *kvm, void __user *argp)
5493 {
5494         struct kvm_msr_filter __user *user_msr_filter = argp;
5495         struct kvm_msr_filter filter;
5496         bool default_allow;
5497         int r = 0;
5498         bool empty = true;
5499         u32 i;
5500
5501         if (copy_from_user(&filter, user_msr_filter, sizeof(filter)))
5502                 return -EFAULT;
5503
5504         for (i = 0; i < ARRAY_SIZE(filter.ranges); i++)
5505                 empty &= !filter.ranges[i].nmsrs;
5506
5507         default_allow = !(filter.flags & KVM_MSR_FILTER_DEFAULT_DENY);
5508         if (empty && !default_allow)
5509                 return -EINVAL;
5510
5511         kvm_clear_msr_filter(kvm);
5512
5513         kvm->arch.msr_filter.default_allow = default_allow;
5514
5515         /*
5516          * Protect from concurrent calls to this function that could trigger
5517          * a TOCTOU violation on kvm->arch.msr_filter.count.
5518          */
5519         mutex_lock(&kvm->lock);
5520         for (i = 0; i < ARRAY_SIZE(filter.ranges); i++) {
5521                 r = kvm_add_msr_filter(kvm, &filter.ranges[i]);
5522                 if (r)
5523                         break;
5524         }
5525
5526         kvm_make_all_cpus_request(kvm, KVM_REQ_MSR_FILTER_CHANGED);
5527         mutex_unlock(&kvm->lock);
5528
5529         return r;
5530 }
5531
5532 long kvm_arch_vm_ioctl(struct file *filp,
5533                        unsigned int ioctl, unsigned long arg)
5534 {
5535         struct kvm *kvm = filp->private_data;
5536         void __user *argp = (void __user *)arg;
5537         int r = -ENOTTY;
5538         /*
5539          * This union makes it completely explicit to gcc-3.x
5540          * that these two variables' stack usage should be
5541          * combined, not added together.
5542          */
5543         union {
5544                 struct kvm_pit_state ps;
5545                 struct kvm_pit_state2 ps2;
5546                 struct kvm_pit_config pit_config;
5547         } u;
5548
5549         switch (ioctl) {
5550         case KVM_SET_TSS_ADDR:
5551                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
5552                 break;
5553         case KVM_SET_IDENTITY_MAP_ADDR: {
5554                 u64 ident_addr;
5555
5556                 mutex_lock(&kvm->lock);
5557                 r = -EINVAL;
5558                 if (kvm->created_vcpus)
5559                         goto set_identity_unlock;
5560                 r = -EFAULT;
5561                 if (copy_from_user(&ident_addr, argp, sizeof(ident_addr)))
5562                         goto set_identity_unlock;
5563                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
5564 set_identity_unlock:
5565                 mutex_unlock(&kvm->lock);
5566                 break;
5567         }
5568         case KVM_SET_NR_MMU_PAGES:
5569                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
5570                 break;
5571         case KVM_GET_NR_MMU_PAGES:
5572                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
5573                 break;
5574         case KVM_CREATE_IRQCHIP: {
5575                 mutex_lock(&kvm->lock);
5576
5577                 r = -EEXIST;
5578                 if (irqchip_in_kernel(kvm))
5579                         goto create_irqchip_unlock;
5580
5581                 r = -EINVAL;
5582                 if (kvm->created_vcpus)
5583                         goto create_irqchip_unlock;
5584
5585                 r = kvm_pic_init(kvm);
5586                 if (r)
5587                         goto create_irqchip_unlock;
5588
5589                 r = kvm_ioapic_init(kvm);
5590                 if (r) {
5591                         kvm_pic_destroy(kvm);
5592                         goto create_irqchip_unlock;
5593                 }
5594
5595                 r = kvm_setup_default_irq_routing(kvm);
5596                 if (r) {
5597                         kvm_ioapic_destroy(kvm);
5598                         kvm_pic_destroy(kvm);
5599                         goto create_irqchip_unlock;
5600                 }
5601                 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
5602                 smp_wmb();
5603                 kvm->arch.irqchip_mode = KVM_IRQCHIP_KERNEL;
5604         create_irqchip_unlock:
5605                 mutex_unlock(&kvm->lock);
5606                 break;
5607         }
5608         case KVM_CREATE_PIT:
5609                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
5610                 goto create_pit;
5611         case KVM_CREATE_PIT2:
5612                 r = -EFAULT;
5613                 if (copy_from_user(&u.pit_config, argp,
5614                                    sizeof(struct kvm_pit_config)))
5615                         goto out;
5616         create_pit:
5617                 mutex_lock(&kvm->lock);
5618                 r = -EEXIST;
5619                 if (kvm->arch.vpit)
5620                         goto create_pit_unlock;
5621                 r = -ENOMEM;
5622                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
5623                 if (kvm->arch.vpit)
5624                         r = 0;
5625         create_pit_unlock:
5626                 mutex_unlock(&kvm->lock);
5627                 break;
5628         case KVM_GET_IRQCHIP: {
5629                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
5630                 struct kvm_irqchip *chip;
5631
5632                 chip = memdup_user(argp, sizeof(*chip));
5633                 if (IS_ERR(chip)) {
5634                         r = PTR_ERR(chip);
5635                         goto out;
5636                 }
5637
5638                 r = -ENXIO;
5639                 if (!irqchip_kernel(kvm))
5640                         goto get_irqchip_out;
5641                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
5642                 if (r)
5643                         goto get_irqchip_out;
5644                 r = -EFAULT;
5645                 if (copy_to_user(argp, chip, sizeof(*chip)))
5646                         goto get_irqchip_out;
5647                 r = 0;
5648         get_irqchip_out:
5649                 kfree(chip);
5650                 break;
5651         }
5652         case KVM_SET_IRQCHIP: {
5653                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
5654                 struct kvm_irqchip *chip;
5655
5656                 chip = memdup_user(argp, sizeof(*chip));
5657                 if (IS_ERR(chip)) {
5658                         r = PTR_ERR(chip);
5659                         goto out;
5660                 }
5661
5662                 r = -ENXIO;
5663                 if (!irqchip_kernel(kvm))
5664                         goto set_irqchip_out;
5665                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
5666         set_irqchip_out:
5667                 kfree(chip);
5668                 break;
5669         }
5670         case KVM_GET_PIT: {
5671                 r = -EFAULT;
5672                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
5673                         goto out;
5674                 r = -ENXIO;
5675                 if (!kvm->arch.vpit)
5676                         goto out;
5677                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
5678                 if (r)
5679                         goto out;
5680                 r = -EFAULT;
5681                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
5682                         goto out;
5683                 r = 0;
5684                 break;
5685         }
5686         case KVM_SET_PIT: {
5687                 r = -EFAULT;
5688                 if (copy_from_user(&u.ps, argp, sizeof(u.ps)))
5689                         goto out;
5690                 mutex_lock(&kvm->lock);
5691                 r = -ENXIO;
5692                 if (!kvm->arch.vpit)
5693                         goto set_pit_out;
5694                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
5695 set_pit_out:
5696                 mutex_unlock(&kvm->lock);
5697                 break;
5698         }
5699         case KVM_GET_PIT2: {
5700                 r = -ENXIO;
5701                 if (!kvm->arch.vpit)
5702                         goto out;
5703                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
5704                 if (r)
5705                         goto out;
5706                 r = -EFAULT;
5707                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
5708                         goto out;
5709                 r = 0;
5710                 break;
5711         }
5712         case KVM_SET_PIT2: {
5713                 r = -EFAULT;
5714                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
5715                         goto out;
5716                 mutex_lock(&kvm->lock);
5717                 r = -ENXIO;
5718                 if (!kvm->arch.vpit)
5719                         goto set_pit2_out;
5720                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
5721 set_pit2_out:
5722                 mutex_unlock(&kvm->lock);
5723                 break;
5724         }
5725         case KVM_REINJECT_CONTROL: {
5726                 struct kvm_reinject_control control;
5727                 r =  -EFAULT;
5728                 if (copy_from_user(&control, argp, sizeof(control)))
5729                         goto out;
5730                 r = -ENXIO;
5731                 if (!kvm->arch.vpit)
5732                         goto out;
5733                 r = kvm_vm_ioctl_reinject(kvm, &control);
5734                 break;
5735         }
5736         case KVM_SET_BOOT_CPU_ID:
5737                 r = 0;
5738                 mutex_lock(&kvm->lock);
5739                 if (kvm->created_vcpus)
5740                         r = -EBUSY;
5741                 else
5742                         kvm->arch.bsp_vcpu_id = arg;
5743                 mutex_unlock(&kvm->lock);
5744                 break;
5745 #ifdef CONFIG_KVM_XEN
5746         case KVM_XEN_HVM_CONFIG: {
5747                 struct kvm_xen_hvm_config xhc;
5748                 r = -EFAULT;
5749                 if (copy_from_user(&xhc, argp, sizeof(xhc)))
5750                         goto out;
5751                 r = kvm_xen_hvm_config(kvm, &xhc);
5752                 break;
5753         }
5754         case KVM_XEN_HVM_GET_ATTR: {
5755                 struct kvm_xen_hvm_attr xha;
5756
5757                 r = -EFAULT;
5758                 if (copy_from_user(&xha, argp, sizeof(xha)))
5759                         goto out;
5760                 r = kvm_xen_hvm_get_attr(kvm, &xha);
5761                 if (!r && copy_to_user(argp, &xha, sizeof(xha)))
5762                         r = -EFAULT;
5763                 break;
5764         }
5765         case KVM_XEN_HVM_SET_ATTR: {
5766                 struct kvm_xen_hvm_attr xha;
5767
5768                 r = -EFAULT;
5769                 if (copy_from_user(&xha, argp, sizeof(xha)))
5770                         goto out;
5771                 r = kvm_xen_hvm_set_attr(kvm, &xha);
5772                 break;
5773         }
5774 #endif
5775         case KVM_SET_CLOCK: {
5776                 struct kvm_clock_data user_ns;
5777                 u64 now_ns;
5778
5779                 r = -EFAULT;
5780                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
5781                         goto out;
5782
5783                 r = -EINVAL;
5784                 if (user_ns.flags)
5785                         goto out;
5786
5787                 r = 0;
5788                 /*
5789                  * TODO: userspace has to take care of races with VCPU_RUN, so
5790                  * kvm_gen_update_masterclock() can be cut down to locked
5791                  * pvclock_update_vm_gtod_copy().
5792                  */
5793                 kvm_gen_update_masterclock(kvm);
5794                 now_ns = get_kvmclock_ns(kvm);
5795                 kvm->arch.kvmclock_offset += user_ns.clock - now_ns;
5796                 kvm_make_all_cpus_request(kvm, KVM_REQ_CLOCK_UPDATE);
5797                 break;
5798         }
5799         case KVM_GET_CLOCK: {
5800                 struct kvm_clock_data user_ns;
5801                 u64 now_ns;
5802
5803                 now_ns = get_kvmclock_ns(kvm);
5804                 user_ns.clock = now_ns;
5805                 user_ns.flags = kvm->arch.use_master_clock ? KVM_CLOCK_TSC_STABLE : 0;
5806                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
5807
5808                 r = -EFAULT;
5809                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
5810                         goto out;
5811                 r = 0;
5812                 break;
5813         }
5814         case KVM_MEMORY_ENCRYPT_OP: {
5815                 r = -ENOTTY;
5816                 if (kvm_x86_ops.mem_enc_op)
5817                         r = static_call(kvm_x86_mem_enc_op)(kvm, argp);
5818                 break;
5819         }
5820         case KVM_MEMORY_ENCRYPT_REG_REGION: {
5821                 struct kvm_enc_region region;
5822
5823                 r = -EFAULT;
5824                 if (copy_from_user(&region, argp, sizeof(region)))
5825                         goto out;
5826
5827                 r = -ENOTTY;
5828                 if (kvm_x86_ops.mem_enc_reg_region)
5829                         r = static_call(kvm_x86_mem_enc_reg_region)(kvm, &region);
5830                 break;
5831         }
5832         case KVM_MEMORY_ENCRYPT_UNREG_REGION: {
5833                 struct kvm_enc_region region;
5834
5835                 r = -EFAULT;
5836                 if (copy_from_user(&region, argp, sizeof(region)))
5837                         goto out;
5838
5839                 r = -ENOTTY;
5840                 if (kvm_x86_ops.mem_enc_unreg_region)
5841                         r = static_call(kvm_x86_mem_enc_unreg_region)(kvm, &region);
5842                 break;
5843         }
5844         case KVM_HYPERV_EVENTFD: {
5845                 struct kvm_hyperv_eventfd hvevfd;
5846
5847                 r = -EFAULT;
5848                 if (copy_from_user(&hvevfd, argp, sizeof(hvevfd)))
5849                         goto out;
5850                 r = kvm_vm_ioctl_hv_eventfd(kvm, &hvevfd);
5851                 break;
5852         }
5853         case KVM_SET_PMU_EVENT_FILTER:
5854                 r = kvm_vm_ioctl_set_pmu_event_filter(kvm, argp);
5855                 break;
5856         case KVM_X86_SET_MSR_FILTER:
5857                 r = kvm_vm_ioctl_set_msr_filter(kvm, argp);
5858                 break;
5859         default:
5860                 r = -ENOTTY;
5861         }
5862 out:
5863         return r;
5864 }
5865
5866 static void kvm_init_msr_list(void)
5867 {
5868         struct x86_pmu_capability x86_pmu;
5869         u32 dummy[2];
5870         unsigned i;
5871
5872         BUILD_BUG_ON_MSG(INTEL_PMC_MAX_FIXED != 4,
5873                          "Please update the fixed PMCs in msrs_to_saved_all[]");
5874
5875         perf_get_x86_pmu_capability(&x86_pmu);
5876
5877         num_msrs_to_save = 0;
5878         num_emulated_msrs = 0;
5879         num_msr_based_features = 0;
5880
5881         for (i = 0; i < ARRAY_SIZE(msrs_to_save_all); i++) {
5882                 if (rdmsr_safe(msrs_to_save_all[i], &dummy[0], &dummy[1]) < 0)
5883                         continue;
5884
5885                 /*
5886                  * Even MSRs that are valid in the host may not be exposed
5887                  * to the guests in some cases.
5888                  */
5889                 switch (msrs_to_save_all[i]) {
5890                 case MSR_IA32_BNDCFGS:
5891                         if (!kvm_mpx_supported())
5892                                 continue;
5893                         break;
5894                 case MSR_TSC_AUX:
5895                         if (!kvm_cpu_cap_has(X86_FEATURE_RDTSCP))
5896                                 continue;
5897                         break;
5898                 case MSR_IA32_UMWAIT_CONTROL:
5899                         if (!kvm_cpu_cap_has(X86_FEATURE_WAITPKG))
5900                                 continue;
5901                         break;
5902                 case MSR_IA32_RTIT_CTL:
5903                 case MSR_IA32_RTIT_STATUS:
5904                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT))
5905                                 continue;
5906                         break;
5907                 case MSR_IA32_RTIT_CR3_MATCH:
5908                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
5909                             !intel_pt_validate_hw_cap(PT_CAP_cr3_filtering))
5910                                 continue;
5911                         break;
5912                 case MSR_IA32_RTIT_OUTPUT_BASE:
5913                 case MSR_IA32_RTIT_OUTPUT_MASK:
5914                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
5915                                 (!intel_pt_validate_hw_cap(PT_CAP_topa_output) &&
5916                                  !intel_pt_validate_hw_cap(PT_CAP_single_range_output)))
5917                                 continue;
5918                         break;
5919                 case MSR_IA32_RTIT_ADDR0_A ... MSR_IA32_RTIT_ADDR3_B:
5920                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
5921                                 msrs_to_save_all[i] - MSR_IA32_RTIT_ADDR0_A >=
5922                                 intel_pt_validate_hw_cap(PT_CAP_num_address_ranges) * 2)
5923                                 continue;
5924                         break;
5925                 case MSR_ARCH_PERFMON_PERFCTR0 ... MSR_ARCH_PERFMON_PERFCTR0 + 17:
5926                         if (msrs_to_save_all[i] - MSR_ARCH_PERFMON_PERFCTR0 >=
5927                             min(INTEL_PMC_MAX_GENERIC, x86_pmu.num_counters_gp))
5928                                 continue;
5929                         break;
5930                 case MSR_ARCH_PERFMON_EVENTSEL0 ... MSR_ARCH_PERFMON_EVENTSEL0 + 17:
5931                         if (msrs_to_save_all[i] - MSR_ARCH_PERFMON_EVENTSEL0 >=
5932                             min(INTEL_PMC_MAX_GENERIC, x86_pmu.num_counters_gp))
5933                                 continue;
5934                         break;
5935                 default:
5936                         break;
5937                 }
5938
5939                 msrs_to_save[num_msrs_to_save++] = msrs_to_save_all[i];
5940         }
5941
5942         for (i = 0; i < ARRAY_SIZE(emulated_msrs_all); i++) {
5943                 if (!static_call(kvm_x86_has_emulated_msr)(NULL, emulated_msrs_all[i]))
5944                         continue;
5945
5946                 emulated_msrs[num_emulated_msrs++] = emulated_msrs_all[i];
5947         }
5948
5949         for (i = 0; i < ARRAY_SIZE(msr_based_features_all); i++) {
5950                 struct kvm_msr_entry msr;
5951
5952                 msr.index = msr_based_features_all[i];
5953                 if (kvm_get_msr_feature(&msr))
5954                         continue;
5955
5956                 msr_based_features[num_msr_based_features++] = msr_based_features_all[i];
5957         }
5958 }
5959
5960 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
5961                            const void *v)
5962 {
5963         int handled = 0;
5964         int n;
5965
5966         do {
5967                 n = min(len, 8);
5968                 if (!(lapic_in_kernel(vcpu) &&
5969                       !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
5970                     && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
5971                         break;
5972                 handled += n;
5973                 addr += n;
5974                 len -= n;
5975                 v += n;
5976         } while (len);
5977
5978         return handled;
5979 }
5980
5981 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
5982 {
5983         int handled = 0;
5984         int n;
5985
5986         do {
5987                 n = min(len, 8);
5988                 if (!(lapic_in_kernel(vcpu) &&
5989                       !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
5990                                          addr, n, v))
5991                     && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
5992                         break;
5993                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, v);
5994                 handled += n;
5995                 addr += n;
5996                 len -= n;
5997                 v += n;
5998         } while (len);
5999
6000         return handled;
6001 }
6002
6003 static void kvm_set_segment(struct kvm_vcpu *vcpu,
6004                         struct kvm_segment *var, int seg)
6005 {
6006         static_call(kvm_x86_set_segment)(vcpu, var, seg);
6007 }
6008
6009 void kvm_get_segment(struct kvm_vcpu *vcpu,
6010                      struct kvm_segment *var, int seg)
6011 {
6012         static_call(kvm_x86_get_segment)(vcpu, var, seg);
6013 }
6014
6015 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
6016                            struct x86_exception *exception)
6017 {
6018         gpa_t t_gpa;
6019
6020         BUG_ON(!mmu_is_nested(vcpu));
6021
6022         /* NPT walks are always user-walks */
6023         access |= PFERR_USER_MASK;
6024         t_gpa  = vcpu->arch.mmu->gva_to_gpa(vcpu, gpa, access, exception);
6025
6026         return t_gpa;
6027 }
6028
6029 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
6030                               struct x86_exception *exception)
6031 {
6032         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6033         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
6034 }
6035 EXPORT_SYMBOL_GPL(kvm_mmu_gva_to_gpa_read);
6036
6037  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
6038                                 struct x86_exception *exception)
6039 {
6040         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6041         access |= PFERR_FETCH_MASK;
6042         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
6043 }
6044
6045 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
6046                                struct x86_exception *exception)
6047 {
6048         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6049         access |= PFERR_WRITE_MASK;
6050         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
6051 }
6052 EXPORT_SYMBOL_GPL(kvm_mmu_gva_to_gpa_write);
6053
6054 /* uses this to access any guest's mapped memory without checking CPL */
6055 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
6056                                 struct x86_exception *exception)
6057 {
6058         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
6059 }
6060
6061 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
6062                                       struct kvm_vcpu *vcpu, u32 access,
6063                                       struct x86_exception *exception)
6064 {
6065         void *data = val;
6066         int r = X86EMUL_CONTINUE;
6067
6068         while (bytes) {
6069                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
6070                                                             exception);
6071                 unsigned offset = addr & (PAGE_SIZE-1);
6072                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
6073                 int ret;
6074
6075                 if (gpa == UNMAPPED_GVA)
6076                         return X86EMUL_PROPAGATE_FAULT;
6077                 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
6078                                                offset, toread);
6079                 if (ret < 0) {
6080                         r = X86EMUL_IO_NEEDED;
6081                         goto out;
6082                 }
6083
6084                 bytes -= toread;
6085                 data += toread;
6086                 addr += toread;
6087         }
6088 out:
6089         return r;
6090 }
6091
6092 /* used for instruction fetching */
6093 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
6094                                 gva_t addr, void *val, unsigned int bytes,
6095                                 struct x86_exception *exception)
6096 {
6097         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6098         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6099         unsigned offset;
6100         int ret;
6101
6102         /* Inline kvm_read_guest_virt_helper for speed.  */
6103         gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access|PFERR_FETCH_MASK,
6104                                                     exception);
6105         if (unlikely(gpa == UNMAPPED_GVA))
6106                 return X86EMUL_PROPAGATE_FAULT;
6107
6108         offset = addr & (PAGE_SIZE-1);
6109         if (WARN_ON(offset + bytes > PAGE_SIZE))
6110                 bytes = (unsigned)PAGE_SIZE - offset;
6111         ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
6112                                        offset, bytes);
6113         if (unlikely(ret < 0))
6114                 return X86EMUL_IO_NEEDED;
6115
6116         return X86EMUL_CONTINUE;
6117 }
6118
6119 int kvm_read_guest_virt(struct kvm_vcpu *vcpu,
6120                                gva_t addr, void *val, unsigned int bytes,
6121                                struct x86_exception *exception)
6122 {
6123         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6124
6125         /*
6126          * FIXME: this should call handle_emulation_failure if X86EMUL_IO_NEEDED
6127          * is returned, but our callers are not ready for that and they blindly
6128          * call kvm_inject_page_fault.  Ensure that they at least do not leak
6129          * uninitialized kernel stack memory into cr2 and error code.
6130          */
6131         memset(exception, 0, sizeof(*exception));
6132         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
6133                                           exception);
6134 }
6135 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
6136
6137 static int emulator_read_std(struct x86_emulate_ctxt *ctxt,
6138                              gva_t addr, void *val, unsigned int bytes,
6139                              struct x86_exception *exception, bool system)
6140 {
6141         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6142         u32 access = 0;
6143
6144         if (!system && static_call(kvm_x86_get_cpl)(vcpu) == 3)
6145                 access |= PFERR_USER_MASK;
6146
6147         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access, exception);
6148 }
6149
6150 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt *ctxt,
6151                 unsigned long addr, void *val, unsigned int bytes)
6152 {
6153         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6154         int r = kvm_vcpu_read_guest(vcpu, addr, val, bytes);
6155
6156         return r < 0 ? X86EMUL_IO_NEEDED : X86EMUL_CONTINUE;
6157 }
6158
6159 static int kvm_write_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
6160                                       struct kvm_vcpu *vcpu, u32 access,
6161                                       struct x86_exception *exception)
6162 {
6163         void *data = val;
6164         int r = X86EMUL_CONTINUE;
6165
6166         while (bytes) {
6167                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
6168                                                              access,
6169                                                              exception);
6170                 unsigned offset = addr & (PAGE_SIZE-1);
6171                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
6172                 int ret;
6173
6174                 if (gpa == UNMAPPED_GVA)
6175                         return X86EMUL_PROPAGATE_FAULT;
6176                 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
6177                 if (ret < 0) {
6178                         r = X86EMUL_IO_NEEDED;
6179                         goto out;
6180                 }
6181
6182                 bytes -= towrite;
6183                 data += towrite;
6184                 addr += towrite;
6185         }
6186 out:
6187         return r;
6188 }
6189
6190 static int emulator_write_std(struct x86_emulate_ctxt *ctxt, gva_t addr, void *val,
6191                               unsigned int bytes, struct x86_exception *exception,
6192                               bool system)
6193 {
6194         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6195         u32 access = PFERR_WRITE_MASK;
6196
6197         if (!system && static_call(kvm_x86_get_cpl)(vcpu) == 3)
6198                 access |= PFERR_USER_MASK;
6199
6200         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
6201                                            access, exception);
6202 }
6203
6204 int kvm_write_guest_virt_system(struct kvm_vcpu *vcpu, gva_t addr, void *val,
6205                                 unsigned int bytes, struct x86_exception *exception)
6206 {
6207         /* kvm_write_guest_virt_system can pull in tons of pages. */
6208         vcpu->arch.l1tf_flush_l1d = true;
6209
6210         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
6211                                            PFERR_WRITE_MASK, exception);
6212 }
6213 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
6214
6215 int handle_ud(struct kvm_vcpu *vcpu)
6216 {
6217         static const char kvm_emulate_prefix[] = { __KVM_EMULATE_PREFIX };
6218         int emul_type = EMULTYPE_TRAP_UD;
6219         char sig[5]; /* ud2; .ascii "kvm" */
6220         struct x86_exception e;
6221
6222         if (unlikely(!static_call(kvm_x86_can_emulate_instruction)(vcpu, NULL, 0)))
6223                 return 1;
6224
6225         if (force_emulation_prefix &&
6226             kvm_read_guest_virt(vcpu, kvm_get_linear_rip(vcpu),
6227                                 sig, sizeof(sig), &e) == 0 &&
6228             memcmp(sig, kvm_emulate_prefix, sizeof(sig)) == 0) {
6229                 kvm_rip_write(vcpu, kvm_rip_read(vcpu) + sizeof(sig));
6230                 emul_type = EMULTYPE_TRAP_UD_FORCED;
6231         }
6232
6233         return kvm_emulate_instruction(vcpu, emul_type);
6234 }
6235 EXPORT_SYMBOL_GPL(handle_ud);
6236
6237 static int vcpu_is_mmio_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
6238                             gpa_t gpa, bool write)
6239 {
6240         /* For APIC access vmexit */
6241         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
6242                 return 1;
6243
6244         if (vcpu_match_mmio_gpa(vcpu, gpa)) {
6245                 trace_vcpu_match_mmio(gva, gpa, write, true);
6246                 return 1;
6247         }
6248
6249         return 0;
6250 }
6251
6252 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
6253                                 gpa_t *gpa, struct x86_exception *exception,
6254                                 bool write)
6255 {
6256         u32 access = ((static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0)
6257                 | (write ? PFERR_WRITE_MASK : 0);
6258
6259         /*
6260          * currently PKRU is only applied to ept enabled guest so
6261          * there is no pkey in EPT page table for L1 guest or EPT
6262          * shadow page table for L2 guest.
6263          */
6264         if (vcpu_match_mmio_gva(vcpu, gva)
6265             && !permission_fault(vcpu, vcpu->arch.walk_mmu,
6266                                  vcpu->arch.mmio_access, 0, access)) {
6267                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
6268                                         (gva & (PAGE_SIZE - 1));
6269                 trace_vcpu_match_mmio(gva, *gpa, write, false);
6270                 return 1;
6271         }
6272
6273         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
6274
6275         if (*gpa == UNMAPPED_GVA)
6276                 return -1;
6277
6278         return vcpu_is_mmio_gpa(vcpu, gva, *gpa, write);
6279 }
6280
6281 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
6282                         const void *val, int bytes)
6283 {
6284         int ret;
6285
6286         ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
6287         if (ret < 0)
6288                 return 0;
6289         kvm_page_track_write(vcpu, gpa, val, bytes);
6290         return 1;
6291 }
6292
6293 struct read_write_emulator_ops {
6294         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
6295                                   int bytes);
6296         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
6297                                   void *val, int bytes);
6298         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
6299                                int bytes, void *val);
6300         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
6301                                     void *val, int bytes);
6302         bool write;
6303 };
6304
6305 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
6306 {
6307         if (vcpu->mmio_read_completed) {
6308                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
6309                                vcpu->mmio_fragments[0].gpa, val);
6310                 vcpu->mmio_read_completed = 0;
6311                 return 1;
6312         }
6313
6314         return 0;
6315 }
6316
6317 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
6318                         void *val, int bytes)
6319 {
6320         return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
6321 }
6322
6323 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
6324                          void *val, int bytes)
6325 {
6326         return emulator_write_phys(vcpu, gpa, val, bytes);
6327 }
6328
6329 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
6330 {
6331         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, val);
6332         return vcpu_mmio_write(vcpu, gpa, bytes, val);
6333 }
6334
6335 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
6336                           void *val, int bytes)
6337 {
6338         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, NULL);
6339         return X86EMUL_IO_NEEDED;
6340 }
6341
6342 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
6343                            void *val, int bytes)
6344 {
6345         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
6346
6347         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
6348         return X86EMUL_CONTINUE;
6349 }
6350
6351 static const struct read_write_emulator_ops read_emultor = {
6352         .read_write_prepare = read_prepare,
6353         .read_write_emulate = read_emulate,
6354         .read_write_mmio = vcpu_mmio_read,
6355         .read_write_exit_mmio = read_exit_mmio,
6356 };
6357
6358 static const struct read_write_emulator_ops write_emultor = {
6359         .read_write_emulate = write_emulate,
6360         .read_write_mmio = write_mmio,
6361         .read_write_exit_mmio = write_exit_mmio,
6362         .write = true,
6363 };
6364
6365 static int emulator_read_write_onepage(unsigned long addr, void *val,
6366                                        unsigned int bytes,
6367                                        struct x86_exception *exception,
6368                                        struct kvm_vcpu *vcpu,
6369                                        const struct read_write_emulator_ops *ops)
6370 {
6371         gpa_t gpa;
6372         int handled, ret;
6373         bool write = ops->write;
6374         struct kvm_mmio_fragment *frag;
6375         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
6376
6377         /*
6378          * If the exit was due to a NPF we may already have a GPA.
6379          * If the GPA is present, use it to avoid the GVA to GPA table walk.
6380          * Note, this cannot be used on string operations since string
6381          * operation using rep will only have the initial GPA from the NPF
6382          * occurred.
6383          */
6384         if (ctxt->gpa_available && emulator_can_use_gpa(ctxt) &&
6385             (addr & ~PAGE_MASK) == (ctxt->gpa_val & ~PAGE_MASK)) {
6386                 gpa = ctxt->gpa_val;
6387                 ret = vcpu_is_mmio_gpa(vcpu, addr, gpa, write);
6388         } else {
6389                 ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
6390                 if (ret < 0)
6391                         return X86EMUL_PROPAGATE_FAULT;
6392         }
6393
6394         if (!ret && ops->read_write_emulate(vcpu, gpa, val, bytes))
6395                 return X86EMUL_CONTINUE;
6396
6397         /*
6398          * Is this MMIO handled locally?
6399          */
6400         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
6401         if (handled == bytes)
6402                 return X86EMUL_CONTINUE;
6403
6404         gpa += handled;
6405         bytes -= handled;
6406         val += handled;
6407
6408         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
6409         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
6410         frag->gpa = gpa;
6411         frag->data = val;
6412         frag->len = bytes;
6413         return X86EMUL_CONTINUE;
6414 }
6415
6416 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
6417                         unsigned long addr,
6418                         void *val, unsigned int bytes,
6419                         struct x86_exception *exception,
6420                         const struct read_write_emulator_ops *ops)
6421 {
6422         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6423         gpa_t gpa;
6424         int rc;
6425
6426         if (ops->read_write_prepare &&
6427                   ops->read_write_prepare(vcpu, val, bytes))
6428                 return X86EMUL_CONTINUE;
6429
6430         vcpu->mmio_nr_fragments = 0;
6431
6432         /* Crossing a page boundary? */
6433         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
6434                 int now;
6435
6436                 now = -addr & ~PAGE_MASK;
6437                 rc = emulator_read_write_onepage(addr, val, now, exception,
6438                                                  vcpu, ops);
6439
6440                 if (rc != X86EMUL_CONTINUE)
6441                         return rc;
6442                 addr += now;
6443                 if (ctxt->mode != X86EMUL_MODE_PROT64)
6444                         addr = (u32)addr;
6445                 val += now;
6446                 bytes -= now;
6447         }
6448
6449         rc = emulator_read_write_onepage(addr, val, bytes, exception,
6450                                          vcpu, ops);
6451         if (rc != X86EMUL_CONTINUE)
6452                 return rc;
6453
6454         if (!vcpu->mmio_nr_fragments)
6455                 return rc;
6456
6457         gpa = vcpu->mmio_fragments[0].gpa;
6458
6459         vcpu->mmio_needed = 1;
6460         vcpu->mmio_cur_fragment = 0;
6461
6462         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
6463         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
6464         vcpu->run->exit_reason = KVM_EXIT_MMIO;
6465         vcpu->run->mmio.phys_addr = gpa;
6466
6467         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
6468 }
6469
6470 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
6471                                   unsigned long addr,
6472                                   void *val,
6473                                   unsigned int bytes,
6474                                   struct x86_exception *exception)
6475 {
6476         return emulator_read_write(ctxt, addr, val, bytes,
6477                                    exception, &read_emultor);
6478 }
6479
6480 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
6481                             unsigned long addr,
6482                             const void *val,
6483                             unsigned int bytes,
6484                             struct x86_exception *exception)
6485 {
6486         return emulator_read_write(ctxt, addr, (void *)val, bytes,
6487                                    exception, &write_emultor);
6488 }
6489
6490 #define CMPXCHG_TYPE(t, ptr, old, new) \
6491         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
6492
6493 #ifdef CONFIG_X86_64
6494 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
6495 #else
6496 #  define CMPXCHG64(ptr, old, new) \
6497         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
6498 #endif
6499
6500 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
6501                                      unsigned long addr,
6502                                      const void *old,
6503                                      const void *new,
6504                                      unsigned int bytes,
6505                                      struct x86_exception *exception)
6506 {
6507         struct kvm_host_map map;
6508         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6509         u64 page_line_mask;
6510         gpa_t gpa;
6511         char *kaddr;
6512         bool exchanged;
6513
6514         /* guests cmpxchg8b have to be emulated atomically */
6515         if (bytes > 8 || (bytes & (bytes - 1)))
6516                 goto emul_write;
6517
6518         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
6519
6520         if (gpa == UNMAPPED_GVA ||
6521             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
6522                 goto emul_write;
6523
6524         /*
6525          * Emulate the atomic as a straight write to avoid #AC if SLD is
6526          * enabled in the host and the access splits a cache line.
6527          */
6528         if (boot_cpu_has(X86_FEATURE_SPLIT_LOCK_DETECT))
6529                 page_line_mask = ~(cache_line_size() - 1);
6530         else
6531                 page_line_mask = PAGE_MASK;
6532
6533         if (((gpa + bytes - 1) & page_line_mask) != (gpa & page_line_mask))
6534                 goto emul_write;
6535
6536         if (kvm_vcpu_map(vcpu, gpa_to_gfn(gpa), &map))
6537                 goto emul_write;
6538
6539         kaddr = map.hva + offset_in_page(gpa);
6540
6541         switch (bytes) {
6542         case 1:
6543                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
6544                 break;
6545         case 2:
6546                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
6547                 break;
6548         case 4:
6549                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
6550                 break;
6551         case 8:
6552                 exchanged = CMPXCHG64(kaddr, old, new);
6553                 break;
6554         default:
6555                 BUG();
6556         }
6557
6558         kvm_vcpu_unmap(vcpu, &map, true);
6559
6560         if (!exchanged)
6561                 return X86EMUL_CMPXCHG_FAILED;
6562
6563         kvm_page_track_write(vcpu, gpa, new, bytes);
6564
6565         return X86EMUL_CONTINUE;
6566
6567 emul_write:
6568         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
6569
6570         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
6571 }
6572
6573 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
6574 {
6575         int r = 0, i;
6576
6577         for (i = 0; i < vcpu->arch.pio.count; i++) {
6578                 if (vcpu->arch.pio.in)
6579                         r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
6580                                             vcpu->arch.pio.size, pd);
6581                 else
6582                         r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
6583                                              vcpu->arch.pio.port, vcpu->arch.pio.size,
6584                                              pd);
6585                 if (r)
6586                         break;
6587                 pd += vcpu->arch.pio.size;
6588         }
6589         return r;
6590 }
6591
6592 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
6593                                unsigned short port, void *val,
6594                                unsigned int count, bool in)
6595 {
6596         vcpu->arch.pio.port = port;
6597         vcpu->arch.pio.in = in;
6598         vcpu->arch.pio.count  = count;
6599         vcpu->arch.pio.size = size;
6600
6601         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
6602                 vcpu->arch.pio.count = 0;
6603                 return 1;
6604         }
6605
6606         vcpu->run->exit_reason = KVM_EXIT_IO;
6607         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
6608         vcpu->run->io.size = size;
6609         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
6610         vcpu->run->io.count = count;
6611         vcpu->run->io.port = port;
6612
6613         return 0;
6614 }
6615
6616 static int emulator_pio_in(struct kvm_vcpu *vcpu, int size,
6617                            unsigned short port, void *val, unsigned int count)
6618 {
6619         int ret;
6620
6621         if (vcpu->arch.pio.count)
6622                 goto data_avail;
6623
6624         memset(vcpu->arch.pio_data, 0, size * count);
6625
6626         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
6627         if (ret) {
6628 data_avail:
6629                 memcpy(val, vcpu->arch.pio_data, size * count);
6630                 trace_kvm_pio(KVM_PIO_IN, port, size, count, vcpu->arch.pio_data);
6631                 vcpu->arch.pio.count = 0;
6632                 return 1;
6633         }
6634
6635         return 0;
6636 }
6637
6638 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
6639                                     int size, unsigned short port, void *val,
6640                                     unsigned int count)
6641 {
6642         return emulator_pio_in(emul_to_vcpu(ctxt), size, port, val, count);
6643
6644 }
6645
6646 static int emulator_pio_out(struct kvm_vcpu *vcpu, int size,
6647                             unsigned short port, const void *val,
6648                             unsigned int count)
6649 {
6650         memcpy(vcpu->arch.pio_data, val, size * count);
6651         trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
6652         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
6653 }
6654
6655 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
6656                                      int size, unsigned short port,
6657                                      const void *val, unsigned int count)
6658 {
6659         return emulator_pio_out(emul_to_vcpu(ctxt), size, port, val, count);
6660 }
6661
6662 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
6663 {
6664         return static_call(kvm_x86_get_segment_base)(vcpu, seg);
6665 }
6666
6667 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
6668 {
6669         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
6670 }
6671
6672 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
6673 {
6674         if (!need_emulate_wbinvd(vcpu))
6675                 return X86EMUL_CONTINUE;
6676
6677         if (static_call(kvm_x86_has_wbinvd_exit)()) {
6678                 int cpu = get_cpu();
6679
6680                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
6681                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
6682                                 wbinvd_ipi, NULL, 1);
6683                 put_cpu();
6684                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
6685         } else
6686                 wbinvd();
6687         return X86EMUL_CONTINUE;
6688 }
6689
6690 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
6691 {
6692         kvm_emulate_wbinvd_noskip(vcpu);
6693         return kvm_skip_emulated_instruction(vcpu);
6694 }
6695 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
6696
6697
6698
6699 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
6700 {
6701         kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
6702 }
6703
6704 static void emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
6705                             unsigned long *dest)
6706 {
6707         kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
6708 }
6709
6710 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
6711                            unsigned long value)
6712 {
6713
6714         return kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
6715 }
6716
6717 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
6718 {
6719         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
6720 }
6721
6722 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
6723 {
6724         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6725         unsigned long value;
6726
6727         switch (cr) {
6728         case 0:
6729                 value = kvm_read_cr0(vcpu);
6730                 break;
6731         case 2:
6732                 value = vcpu->arch.cr2;
6733                 break;
6734         case 3:
6735                 value = kvm_read_cr3(vcpu);
6736                 break;
6737         case 4:
6738                 value = kvm_read_cr4(vcpu);
6739                 break;
6740         case 8:
6741                 value = kvm_get_cr8(vcpu);
6742                 break;
6743         default:
6744                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
6745                 return 0;
6746         }
6747
6748         return value;
6749 }
6750
6751 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
6752 {
6753         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6754         int res = 0;
6755
6756         switch (cr) {
6757         case 0:
6758                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
6759                 break;
6760         case 2:
6761                 vcpu->arch.cr2 = val;
6762                 break;
6763         case 3:
6764                 res = kvm_set_cr3(vcpu, val);
6765                 break;
6766         case 4:
6767                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
6768                 break;
6769         case 8:
6770                 res = kvm_set_cr8(vcpu, val);
6771                 break;
6772         default:
6773                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
6774                 res = -1;
6775         }
6776
6777         return res;
6778 }
6779
6780 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
6781 {
6782         return static_call(kvm_x86_get_cpl)(emul_to_vcpu(ctxt));
6783 }
6784
6785 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
6786 {
6787         static_call(kvm_x86_get_gdt)(emul_to_vcpu(ctxt), dt);
6788 }
6789
6790 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
6791 {
6792         static_call(kvm_x86_get_idt)(emul_to_vcpu(ctxt), dt);
6793 }
6794
6795 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
6796 {
6797         static_call(kvm_x86_set_gdt)(emul_to_vcpu(ctxt), dt);
6798 }
6799
6800 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
6801 {
6802         static_call(kvm_x86_set_idt)(emul_to_vcpu(ctxt), dt);
6803 }
6804
6805 static unsigned long emulator_get_cached_segment_base(
6806         struct x86_emulate_ctxt *ctxt, int seg)
6807 {
6808         return get_segment_base(emul_to_vcpu(ctxt), seg);
6809 }
6810
6811 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
6812                                  struct desc_struct *desc, u32 *base3,
6813                                  int seg)
6814 {
6815         struct kvm_segment var;
6816
6817         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
6818         *selector = var.selector;
6819
6820         if (var.unusable) {
6821                 memset(desc, 0, sizeof(*desc));
6822                 if (base3)
6823                         *base3 = 0;
6824                 return false;
6825         }
6826
6827         if (var.g)
6828                 var.limit >>= 12;
6829         set_desc_limit(desc, var.limit);
6830         set_desc_base(desc, (unsigned long)var.base);
6831 #ifdef CONFIG_X86_64
6832         if (base3)
6833                 *base3 = var.base >> 32;
6834 #endif
6835         desc->type = var.type;
6836         desc->s = var.s;
6837         desc->dpl = var.dpl;
6838         desc->p = var.present;
6839         desc->avl = var.avl;
6840         desc->l = var.l;
6841         desc->d = var.db;
6842         desc->g = var.g;
6843
6844         return true;
6845 }
6846
6847 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
6848                                  struct desc_struct *desc, u32 base3,
6849                                  int seg)
6850 {
6851         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6852         struct kvm_segment var;
6853
6854         var.selector = selector;
6855         var.base = get_desc_base(desc);
6856 #ifdef CONFIG_X86_64
6857         var.base |= ((u64)base3) << 32;
6858 #endif
6859         var.limit = get_desc_limit(desc);
6860         if (desc->g)
6861                 var.limit = (var.limit << 12) | 0xfff;
6862         var.type = desc->type;
6863         var.dpl = desc->dpl;
6864         var.db = desc->d;
6865         var.s = desc->s;
6866         var.l = desc->l;
6867         var.g = desc->g;
6868         var.avl = desc->avl;
6869         var.present = desc->p;
6870         var.unusable = !var.present;
6871         var.padding = 0;
6872
6873         kvm_set_segment(vcpu, &var, seg);
6874         return;
6875 }
6876
6877 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
6878                             u32 msr_index, u64 *pdata)
6879 {
6880         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6881         int r;
6882
6883         r = kvm_get_msr(vcpu, msr_index, pdata);
6884
6885         if (r && kvm_get_msr_user_space(vcpu, msr_index, r)) {
6886                 /* Bounce to user space */
6887                 return X86EMUL_IO_NEEDED;
6888         }
6889
6890         return r;
6891 }
6892
6893 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
6894                             u32 msr_index, u64 data)
6895 {
6896         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6897         int r;
6898
6899         r = kvm_set_msr(vcpu, msr_index, data);
6900
6901         if (r && kvm_set_msr_user_space(vcpu, msr_index, data, r)) {
6902                 /* Bounce to user space */
6903                 return X86EMUL_IO_NEEDED;
6904         }
6905
6906         return r;
6907 }
6908
6909 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
6910 {
6911         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6912
6913         return vcpu->arch.smbase;
6914 }
6915
6916 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
6917 {
6918         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6919
6920         vcpu->arch.smbase = smbase;
6921 }
6922
6923 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
6924                               u32 pmc)
6925 {
6926         return kvm_pmu_is_valid_rdpmc_ecx(emul_to_vcpu(ctxt), pmc);
6927 }
6928
6929 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
6930                              u32 pmc, u64 *pdata)
6931 {
6932         return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
6933 }
6934
6935 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
6936 {
6937         emul_to_vcpu(ctxt)->arch.halt_request = 1;
6938 }
6939
6940 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
6941                               struct x86_instruction_info *info,
6942                               enum x86_intercept_stage stage)
6943 {
6944         return static_call(kvm_x86_check_intercept)(emul_to_vcpu(ctxt), info, stage,
6945                                             &ctxt->exception);
6946 }
6947
6948 static bool emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
6949                               u32 *eax, u32 *ebx, u32 *ecx, u32 *edx,
6950                               bool exact_only)
6951 {
6952         return kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx, exact_only);
6953 }
6954
6955 static bool emulator_guest_has_long_mode(struct x86_emulate_ctxt *ctxt)
6956 {
6957         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_LM);
6958 }
6959
6960 static bool emulator_guest_has_movbe(struct x86_emulate_ctxt *ctxt)
6961 {
6962         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_MOVBE);
6963 }
6964
6965 static bool emulator_guest_has_fxsr(struct x86_emulate_ctxt *ctxt)
6966 {
6967         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_FXSR);
6968 }
6969
6970 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
6971 {
6972         return kvm_register_read(emul_to_vcpu(ctxt), reg);
6973 }
6974
6975 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
6976 {
6977         kvm_register_write(emul_to_vcpu(ctxt), reg, val);
6978 }
6979
6980 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
6981 {
6982         static_call(kvm_x86_set_nmi_mask)(emul_to_vcpu(ctxt), masked);
6983 }
6984
6985 static unsigned emulator_get_hflags(struct x86_emulate_ctxt *ctxt)
6986 {
6987         return emul_to_vcpu(ctxt)->arch.hflags;
6988 }
6989
6990 static void emulator_set_hflags(struct x86_emulate_ctxt *ctxt, unsigned emul_flags)
6991 {
6992         emul_to_vcpu(ctxt)->arch.hflags = emul_flags;
6993 }
6994
6995 static int emulator_pre_leave_smm(struct x86_emulate_ctxt *ctxt,
6996                                   const char *smstate)
6997 {
6998         return static_call(kvm_x86_pre_leave_smm)(emul_to_vcpu(ctxt), smstate);
6999 }
7000
7001 static void emulator_post_leave_smm(struct x86_emulate_ctxt *ctxt)
7002 {
7003         kvm_smm_changed(emul_to_vcpu(ctxt));
7004 }
7005
7006 static int emulator_set_xcr(struct x86_emulate_ctxt *ctxt, u32 index, u64 xcr)
7007 {
7008         return __kvm_set_xcr(emul_to_vcpu(ctxt), index, xcr);
7009 }
7010
7011 static const struct x86_emulate_ops emulate_ops = {
7012         .read_gpr            = emulator_read_gpr,
7013         .write_gpr           = emulator_write_gpr,
7014         .read_std            = emulator_read_std,
7015         .write_std           = emulator_write_std,
7016         .read_phys           = kvm_read_guest_phys_system,
7017         .fetch               = kvm_fetch_guest_virt,
7018         .read_emulated       = emulator_read_emulated,
7019         .write_emulated      = emulator_write_emulated,
7020         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
7021         .invlpg              = emulator_invlpg,
7022         .pio_in_emulated     = emulator_pio_in_emulated,
7023         .pio_out_emulated    = emulator_pio_out_emulated,
7024         .get_segment         = emulator_get_segment,
7025         .set_segment         = emulator_set_segment,
7026         .get_cached_segment_base = emulator_get_cached_segment_base,
7027         .get_gdt             = emulator_get_gdt,
7028         .get_idt             = emulator_get_idt,
7029         .set_gdt             = emulator_set_gdt,
7030         .set_idt             = emulator_set_idt,
7031         .get_cr              = emulator_get_cr,
7032         .set_cr              = emulator_set_cr,
7033         .cpl                 = emulator_get_cpl,
7034         .get_dr              = emulator_get_dr,
7035         .set_dr              = emulator_set_dr,
7036         .get_smbase          = emulator_get_smbase,
7037         .set_smbase          = emulator_set_smbase,
7038         .set_msr             = emulator_set_msr,
7039         .get_msr             = emulator_get_msr,
7040         .check_pmc           = emulator_check_pmc,
7041         .read_pmc            = emulator_read_pmc,
7042         .halt                = emulator_halt,
7043         .wbinvd              = emulator_wbinvd,
7044         .fix_hypercall       = emulator_fix_hypercall,
7045         .intercept           = emulator_intercept,
7046         .get_cpuid           = emulator_get_cpuid,
7047         .guest_has_long_mode = emulator_guest_has_long_mode,
7048         .guest_has_movbe     = emulator_guest_has_movbe,
7049         .guest_has_fxsr      = emulator_guest_has_fxsr,
7050         .set_nmi_mask        = emulator_set_nmi_mask,
7051         .get_hflags          = emulator_get_hflags,
7052         .set_hflags          = emulator_set_hflags,
7053         .pre_leave_smm       = emulator_pre_leave_smm,
7054         .post_leave_smm      = emulator_post_leave_smm,
7055         .set_xcr             = emulator_set_xcr,
7056 };
7057
7058 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
7059 {
7060         u32 int_shadow = static_call(kvm_x86_get_interrupt_shadow)(vcpu);
7061         /*
7062          * an sti; sti; sequence only disable interrupts for the first
7063          * instruction. So, if the last instruction, be it emulated or
7064          * not, left the system with the INT_STI flag enabled, it
7065          * means that the last instruction is an sti. We should not
7066          * leave the flag on in this case. The same goes for mov ss
7067          */
7068         if (int_shadow & mask)
7069                 mask = 0;
7070         if (unlikely(int_shadow || mask)) {
7071                 static_call(kvm_x86_set_interrupt_shadow)(vcpu, mask);
7072                 if (!mask)
7073                         kvm_make_request(KVM_REQ_EVENT, vcpu);
7074         }
7075 }
7076
7077 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
7078 {
7079         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7080         if (ctxt->exception.vector == PF_VECTOR)
7081                 return kvm_inject_emulated_page_fault(vcpu, &ctxt->exception);
7082
7083         if (ctxt->exception.error_code_valid)
7084                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
7085                                       ctxt->exception.error_code);
7086         else
7087                 kvm_queue_exception(vcpu, ctxt->exception.vector);
7088         return false;
7089 }
7090
7091 static struct x86_emulate_ctxt *alloc_emulate_ctxt(struct kvm_vcpu *vcpu)
7092 {
7093         struct x86_emulate_ctxt *ctxt;
7094
7095         ctxt = kmem_cache_zalloc(x86_emulator_cache, GFP_KERNEL_ACCOUNT);
7096         if (!ctxt) {
7097                 pr_err("kvm: failed to allocate vcpu's emulator\n");
7098                 return NULL;
7099         }
7100
7101         ctxt->vcpu = vcpu;
7102         ctxt->ops = &emulate_ops;
7103         vcpu->arch.emulate_ctxt = ctxt;
7104
7105         return ctxt;
7106 }
7107
7108 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
7109 {
7110         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7111         int cs_db, cs_l;
7112
7113         static_call(kvm_x86_get_cs_db_l_bits)(vcpu, &cs_db, &cs_l);
7114
7115         ctxt->gpa_available = false;
7116         ctxt->eflags = kvm_get_rflags(vcpu);
7117         ctxt->tf = (ctxt->eflags & X86_EFLAGS_TF) != 0;
7118
7119         ctxt->eip = kvm_rip_read(vcpu);
7120         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
7121                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
7122                      (cs_l && is_long_mode(vcpu))       ? X86EMUL_MODE_PROT64 :
7123                      cs_db                              ? X86EMUL_MODE_PROT32 :
7124                                                           X86EMUL_MODE_PROT16;
7125         BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
7126         BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
7127         BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
7128
7129         init_decode_cache(ctxt);
7130         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
7131 }
7132
7133 void kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
7134 {
7135         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7136         int ret;
7137
7138         init_emulate_ctxt(vcpu);
7139
7140         ctxt->op_bytes = 2;
7141         ctxt->ad_bytes = 2;
7142         ctxt->_eip = ctxt->eip + inc_eip;
7143         ret = emulate_int_real(ctxt, irq);
7144
7145         if (ret != X86EMUL_CONTINUE) {
7146                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
7147         } else {
7148                 ctxt->eip = ctxt->_eip;
7149                 kvm_rip_write(vcpu, ctxt->eip);
7150                 kvm_set_rflags(vcpu, ctxt->eflags);
7151         }
7152 }
7153 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
7154
7155 static int handle_emulation_failure(struct kvm_vcpu *vcpu, int emulation_type)
7156 {
7157         ++vcpu->stat.insn_emulation_fail;
7158         trace_kvm_emulate_insn_failed(vcpu);
7159
7160         if (emulation_type & EMULTYPE_VMWARE_GP) {
7161                 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
7162                 return 1;
7163         }
7164
7165         if (emulation_type & EMULTYPE_SKIP) {
7166                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
7167                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
7168                 vcpu->run->internal.ndata = 0;
7169                 return 0;
7170         }
7171
7172         kvm_queue_exception(vcpu, UD_VECTOR);
7173
7174         if (!is_guest_mode(vcpu) && static_call(kvm_x86_get_cpl)(vcpu) == 0) {
7175                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
7176                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
7177                 vcpu->run->internal.ndata = 0;
7178                 return 0;
7179         }
7180
7181         return 1;
7182 }
7183
7184 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa,
7185                                   bool write_fault_to_shadow_pgtable,
7186                                   int emulation_type)
7187 {
7188         gpa_t gpa = cr2_or_gpa;
7189         kvm_pfn_t pfn;
7190
7191         if (!(emulation_type & EMULTYPE_ALLOW_RETRY_PF))
7192                 return false;
7193
7194         if (WARN_ON_ONCE(is_guest_mode(vcpu)) ||
7195             WARN_ON_ONCE(!(emulation_type & EMULTYPE_PF)))
7196                 return false;
7197
7198         if (!vcpu->arch.mmu->direct_map) {
7199                 /*
7200                  * Write permission should be allowed since only
7201                  * write access need to be emulated.
7202                  */
7203                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2_or_gpa, NULL);
7204
7205                 /*
7206                  * If the mapping is invalid in guest, let cpu retry
7207                  * it to generate fault.
7208                  */
7209                 if (gpa == UNMAPPED_GVA)
7210                         return true;
7211         }
7212
7213         /*
7214          * Do not retry the unhandleable instruction if it faults on the
7215          * readonly host memory, otherwise it will goto a infinite loop:
7216          * retry instruction -> write #PF -> emulation fail -> retry
7217          * instruction -> ...
7218          */
7219         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
7220
7221         /*
7222          * If the instruction failed on the error pfn, it can not be fixed,
7223          * report the error to userspace.
7224          */
7225         if (is_error_noslot_pfn(pfn))
7226                 return false;
7227
7228         kvm_release_pfn_clean(pfn);
7229
7230         /* The instructions are well-emulated on direct mmu. */
7231         if (vcpu->arch.mmu->direct_map) {
7232                 unsigned int indirect_shadow_pages;
7233
7234                 write_lock(&vcpu->kvm->mmu_lock);
7235                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
7236                 write_unlock(&vcpu->kvm->mmu_lock);
7237
7238                 if (indirect_shadow_pages)
7239                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
7240
7241                 return true;
7242         }
7243
7244         /*
7245          * if emulation was due to access to shadowed page table
7246          * and it failed try to unshadow page and re-enter the
7247          * guest to let CPU execute the instruction.
7248          */
7249         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
7250
7251         /*
7252          * If the access faults on its page table, it can not
7253          * be fixed by unprotecting shadow page and it should
7254          * be reported to userspace.
7255          */
7256         return !write_fault_to_shadow_pgtable;
7257 }
7258
7259 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
7260                               gpa_t cr2_or_gpa,  int emulation_type)
7261 {
7262         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7263         unsigned long last_retry_eip, last_retry_addr, gpa = cr2_or_gpa;
7264
7265         last_retry_eip = vcpu->arch.last_retry_eip;
7266         last_retry_addr = vcpu->arch.last_retry_addr;
7267
7268         /*
7269          * If the emulation is caused by #PF and it is non-page_table
7270          * writing instruction, it means the VM-EXIT is caused by shadow
7271          * page protected, we can zap the shadow page and retry this
7272          * instruction directly.
7273          *
7274          * Note: if the guest uses a non-page-table modifying instruction
7275          * on the PDE that points to the instruction, then we will unmap
7276          * the instruction and go to an infinite loop. So, we cache the
7277          * last retried eip and the last fault address, if we meet the eip
7278          * and the address again, we can break out of the potential infinite
7279          * loop.
7280          */
7281         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
7282
7283         if (!(emulation_type & EMULTYPE_ALLOW_RETRY_PF))
7284                 return false;
7285
7286         if (WARN_ON_ONCE(is_guest_mode(vcpu)) ||
7287             WARN_ON_ONCE(!(emulation_type & EMULTYPE_PF)))
7288                 return false;
7289
7290         if (x86_page_table_writing_insn(ctxt))
7291                 return false;
7292
7293         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2_or_gpa)
7294                 return false;
7295
7296         vcpu->arch.last_retry_eip = ctxt->eip;
7297         vcpu->arch.last_retry_addr = cr2_or_gpa;
7298
7299         if (!vcpu->arch.mmu->direct_map)
7300                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2_or_gpa, NULL);
7301
7302         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
7303
7304         return true;
7305 }
7306
7307 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
7308 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
7309
7310 static void kvm_smm_changed(struct kvm_vcpu *vcpu)
7311 {
7312         if (!(vcpu->arch.hflags & HF_SMM_MASK)) {
7313                 /* This is a good place to trace that we are exiting SMM.  */
7314                 trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, false);
7315
7316                 /* Process a latched INIT or SMI, if any.  */
7317                 kvm_make_request(KVM_REQ_EVENT, vcpu);
7318         }
7319
7320         kvm_mmu_reset_context(vcpu);
7321 }
7322
7323 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
7324                                 unsigned long *db)
7325 {
7326         u32 dr6 = 0;
7327         int i;
7328         u32 enable, rwlen;
7329
7330         enable = dr7;
7331         rwlen = dr7 >> 16;
7332         for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
7333                 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
7334                         dr6 |= (1 << i);
7335         return dr6;
7336 }
7337
7338 static int kvm_vcpu_do_singlestep(struct kvm_vcpu *vcpu)
7339 {
7340         struct kvm_run *kvm_run = vcpu->run;
7341
7342         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
7343                 kvm_run->debug.arch.dr6 = DR6_BS | DR6_ACTIVE_LOW;
7344                 kvm_run->debug.arch.pc = kvm_get_linear_rip(vcpu);
7345                 kvm_run->debug.arch.exception = DB_VECTOR;
7346                 kvm_run->exit_reason = KVM_EXIT_DEBUG;
7347                 return 0;
7348         }
7349         kvm_queue_exception_p(vcpu, DB_VECTOR, DR6_BS);
7350         return 1;
7351 }
7352
7353 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu)
7354 {
7355         unsigned long rflags = static_call(kvm_x86_get_rflags)(vcpu);
7356         int r;
7357
7358         r = static_call(kvm_x86_skip_emulated_instruction)(vcpu);
7359         if (unlikely(!r))
7360                 return 0;
7361
7362         /*
7363          * rflags is the old, "raw" value of the flags.  The new value has
7364          * not been saved yet.
7365          *
7366          * This is correct even for TF set by the guest, because "the
7367          * processor will not generate this exception after the instruction
7368          * that sets the TF flag".
7369          */
7370         if (unlikely(rflags & X86_EFLAGS_TF))
7371                 r = kvm_vcpu_do_singlestep(vcpu);
7372         return r;
7373 }
7374 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction);
7375
7376 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
7377 {
7378         if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
7379             (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
7380                 struct kvm_run *kvm_run = vcpu->run;
7381                 unsigned long eip = kvm_get_linear_rip(vcpu);
7382                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
7383                                            vcpu->arch.guest_debug_dr7,
7384                                            vcpu->arch.eff_db);
7385
7386                 if (dr6 != 0) {
7387                         kvm_run->debug.arch.dr6 = dr6 | DR6_ACTIVE_LOW;
7388                         kvm_run->debug.arch.pc = eip;
7389                         kvm_run->debug.arch.exception = DB_VECTOR;
7390                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
7391                         *r = 0;
7392                         return true;
7393                 }
7394         }
7395
7396         if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
7397             !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
7398                 unsigned long eip = kvm_get_linear_rip(vcpu);
7399                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
7400                                            vcpu->arch.dr7,
7401                                            vcpu->arch.db);
7402
7403                 if (dr6 != 0) {
7404                         kvm_queue_exception_p(vcpu, DB_VECTOR, dr6);
7405                         *r = 1;
7406                         return true;
7407                 }
7408         }
7409
7410         return false;
7411 }
7412
7413 static bool is_vmware_backdoor_opcode(struct x86_emulate_ctxt *ctxt)
7414 {
7415         switch (ctxt->opcode_len) {
7416         case 1:
7417                 switch (ctxt->b) {
7418                 case 0xe4:      /* IN */
7419                 case 0xe5:
7420                 case 0xec:
7421                 case 0xed:
7422                 case 0xe6:      /* OUT */
7423                 case 0xe7:
7424                 case 0xee:
7425                 case 0xef:
7426                 case 0x6c:      /* INS */
7427                 case 0x6d:
7428                 case 0x6e:      /* OUTS */
7429                 case 0x6f:
7430                         return true;
7431                 }
7432                 break;
7433         case 2:
7434                 switch (ctxt->b) {
7435                 case 0x33:      /* RDPMC */
7436                         return true;
7437                 }
7438                 break;
7439         }
7440
7441         return false;
7442 }
7443
7444 /*
7445  * Decode to be emulated instruction. Return EMULATION_OK if success.
7446  */
7447 int x86_decode_emulated_instruction(struct kvm_vcpu *vcpu, int emulation_type,
7448                                     void *insn, int insn_len)
7449 {
7450         int r = EMULATION_OK;
7451         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7452
7453         init_emulate_ctxt(vcpu);
7454
7455         /*
7456          * We will reenter on the same instruction since we do not set
7457          * complete_userspace_io. This does not handle watchpoints yet,
7458          * those would be handled in the emulate_ops.
7459          */
7460         if (!(emulation_type & EMULTYPE_SKIP) &&
7461             kvm_vcpu_check_breakpoint(vcpu, &r))
7462                 return r;
7463
7464         ctxt->interruptibility = 0;
7465         ctxt->have_exception = false;
7466         ctxt->exception.vector = -1;
7467         ctxt->perm_ok = false;
7468
7469         ctxt->ud = emulation_type & EMULTYPE_TRAP_UD;
7470
7471         r = x86_decode_insn(ctxt, insn, insn_len);
7472
7473         trace_kvm_emulate_insn_start(vcpu);
7474         ++vcpu->stat.insn_emulation;
7475
7476         return r;
7477 }
7478 EXPORT_SYMBOL_GPL(x86_decode_emulated_instruction);
7479
7480 int x86_emulate_instruction(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa,
7481                             int emulation_type, void *insn, int insn_len)
7482 {
7483         int r;
7484         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7485         bool writeback = true;
7486         bool write_fault_to_spt;
7487
7488         if (unlikely(!static_call(kvm_x86_can_emulate_instruction)(vcpu, insn, insn_len)))
7489                 return 1;
7490
7491         vcpu->arch.l1tf_flush_l1d = true;
7492
7493         /*
7494          * Clear write_fault_to_shadow_pgtable here to ensure it is
7495          * never reused.
7496          */
7497         write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
7498         vcpu->arch.write_fault_to_shadow_pgtable = false;
7499
7500         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
7501                 kvm_clear_exception_queue(vcpu);
7502
7503                 r = x86_decode_emulated_instruction(vcpu, emulation_type,
7504                                                     insn, insn_len);
7505                 if (r != EMULATION_OK)  {
7506                         if ((emulation_type & EMULTYPE_TRAP_UD) ||
7507                             (emulation_type & EMULTYPE_TRAP_UD_FORCED)) {
7508                                 kvm_queue_exception(vcpu, UD_VECTOR);
7509                                 return 1;
7510                         }
7511                         if (reexecute_instruction(vcpu, cr2_or_gpa,
7512                                                   write_fault_to_spt,
7513                                                   emulation_type))
7514                                 return 1;
7515                         if (ctxt->have_exception) {
7516                                 /*
7517                                  * #UD should result in just EMULATION_FAILED, and trap-like
7518                                  * exception should not be encountered during decode.
7519                                  */
7520                                 WARN_ON_ONCE(ctxt->exception.vector == UD_VECTOR ||
7521                                              exception_type(ctxt->exception.vector) == EXCPT_TRAP);
7522                                 inject_emulated_exception(vcpu);
7523                                 return 1;
7524                         }
7525                         return handle_emulation_failure(vcpu, emulation_type);
7526                 }
7527         }
7528
7529         if ((emulation_type & EMULTYPE_VMWARE_GP) &&
7530             !is_vmware_backdoor_opcode(ctxt)) {
7531                 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
7532                 return 1;
7533         }
7534
7535         /*
7536          * Note, EMULTYPE_SKIP is intended for use *only* by vendor callbacks
7537          * for kvm_skip_emulated_instruction().  The caller is responsible for
7538          * updating interruptibility state and injecting single-step #DBs.
7539          */
7540         if (emulation_type & EMULTYPE_SKIP) {
7541                 kvm_rip_write(vcpu, ctxt->_eip);
7542                 if (ctxt->eflags & X86_EFLAGS_RF)
7543                         kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
7544                 return 1;
7545         }
7546
7547         if (retry_instruction(ctxt, cr2_or_gpa, emulation_type))
7548                 return 1;
7549
7550         /* this is needed for vmware backdoor interface to work since it
7551            changes registers values  during IO operation */
7552         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
7553                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
7554                 emulator_invalidate_register_cache(ctxt);
7555         }
7556
7557 restart:
7558         if (emulation_type & EMULTYPE_PF) {
7559                 /* Save the faulting GPA (cr2) in the address field */
7560                 ctxt->exception.address = cr2_or_gpa;
7561
7562                 /* With shadow page tables, cr2 contains a GVA or nGPA. */
7563                 if (vcpu->arch.mmu->direct_map) {
7564                         ctxt->gpa_available = true;
7565                         ctxt->gpa_val = cr2_or_gpa;
7566                 }
7567         } else {
7568                 /* Sanitize the address out of an abundance of paranoia. */
7569                 ctxt->exception.address = 0;
7570         }
7571
7572         r = x86_emulate_insn(ctxt);
7573
7574         if (r == EMULATION_INTERCEPTED)
7575                 return 1;
7576
7577         if (r == EMULATION_FAILED) {
7578                 if (reexecute_instruction(vcpu, cr2_or_gpa, write_fault_to_spt,
7579                                         emulation_type))
7580                         return 1;
7581
7582                 return handle_emulation_failure(vcpu, emulation_type);
7583         }
7584
7585         if (ctxt->have_exception) {
7586                 r = 1;
7587                 if (inject_emulated_exception(vcpu))
7588                         return r;
7589         } else if (vcpu->arch.pio.count) {
7590                 if (!vcpu->arch.pio.in) {
7591                         /* FIXME: return into emulator if single-stepping.  */
7592                         vcpu->arch.pio.count = 0;
7593                 } else {
7594                         writeback = false;
7595                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
7596                 }
7597                 r = 0;
7598         } else if (vcpu->mmio_needed) {
7599                 ++vcpu->stat.mmio_exits;
7600
7601                 if (!vcpu->mmio_is_write)
7602                         writeback = false;
7603                 r = 0;
7604                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
7605         } else if (r == EMULATION_RESTART)
7606                 goto restart;
7607         else
7608                 r = 1;
7609
7610         if (writeback) {
7611                 unsigned long rflags = static_call(kvm_x86_get_rflags)(vcpu);
7612                 toggle_interruptibility(vcpu, ctxt->interruptibility);
7613                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
7614                 if (!ctxt->have_exception ||
7615                     exception_type(ctxt->exception.vector) == EXCPT_TRAP) {
7616                         kvm_rip_write(vcpu, ctxt->eip);
7617                         if (r && (ctxt->tf || (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)))
7618                                 r = kvm_vcpu_do_singlestep(vcpu);
7619                         if (kvm_x86_ops.update_emulated_instruction)
7620                                 static_call(kvm_x86_update_emulated_instruction)(vcpu);
7621                         __kvm_set_rflags(vcpu, ctxt->eflags);
7622                 }
7623
7624                 /*
7625                  * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
7626                  * do nothing, and it will be requested again as soon as
7627                  * the shadow expires.  But we still need to check here,
7628                  * because POPF has no interrupt shadow.
7629                  */
7630                 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
7631                         kvm_make_request(KVM_REQ_EVENT, vcpu);
7632         } else
7633                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
7634
7635         return r;
7636 }
7637
7638 int kvm_emulate_instruction(struct kvm_vcpu *vcpu, int emulation_type)
7639 {
7640         return x86_emulate_instruction(vcpu, 0, emulation_type, NULL, 0);
7641 }
7642 EXPORT_SYMBOL_GPL(kvm_emulate_instruction);
7643
7644 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu *vcpu,
7645                                         void *insn, int insn_len)
7646 {
7647         return x86_emulate_instruction(vcpu, 0, 0, insn, insn_len);
7648 }
7649 EXPORT_SYMBOL_GPL(kvm_emulate_instruction_from_buffer);
7650
7651 static int complete_fast_pio_out_port_0x7e(struct kvm_vcpu *vcpu)
7652 {
7653         vcpu->arch.pio.count = 0;
7654         return 1;
7655 }
7656
7657 static int complete_fast_pio_out(struct kvm_vcpu *vcpu)
7658 {
7659         vcpu->arch.pio.count = 0;
7660
7661         if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip)))
7662                 return 1;
7663
7664         return kvm_skip_emulated_instruction(vcpu);
7665 }
7666
7667 static int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size,
7668                             unsigned short port)
7669 {
7670         unsigned long val = kvm_rax_read(vcpu);
7671         int ret = emulator_pio_out(vcpu, size, port, &val, 1);
7672
7673         if (ret)
7674                 return ret;
7675
7676         /*
7677          * Workaround userspace that relies on old KVM behavior of %rip being
7678          * incremented prior to exiting to userspace to handle "OUT 0x7e".
7679          */
7680         if (port == 0x7e &&
7681             kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_OUT_7E_INC_RIP)) {
7682                 vcpu->arch.complete_userspace_io =
7683                         complete_fast_pio_out_port_0x7e;
7684                 kvm_skip_emulated_instruction(vcpu);
7685         } else {
7686                 vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
7687                 vcpu->arch.complete_userspace_io = complete_fast_pio_out;
7688         }
7689         return 0;
7690 }
7691
7692 static int complete_fast_pio_in(struct kvm_vcpu *vcpu)
7693 {
7694         unsigned long val;
7695
7696         /* We should only ever be called with arch.pio.count equal to 1 */
7697         BUG_ON(vcpu->arch.pio.count != 1);
7698
7699         if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip))) {
7700                 vcpu->arch.pio.count = 0;
7701                 return 1;
7702         }
7703
7704         /* For size less than 4 we merge, else we zero extend */
7705         val = (vcpu->arch.pio.size < 4) ? kvm_rax_read(vcpu) : 0;
7706
7707         /*
7708          * Since vcpu->arch.pio.count == 1 let emulator_pio_in perform
7709          * the copy and tracing
7710          */
7711         emulator_pio_in(vcpu, vcpu->arch.pio.size, vcpu->arch.pio.port, &val, 1);
7712         kvm_rax_write(vcpu, val);
7713
7714         return kvm_skip_emulated_instruction(vcpu);
7715 }
7716
7717 static int kvm_fast_pio_in(struct kvm_vcpu *vcpu, int size,
7718                            unsigned short port)
7719 {
7720         unsigned long val;
7721         int ret;
7722
7723         /* For size less than 4 we merge, else we zero extend */
7724         val = (size < 4) ? kvm_rax_read(vcpu) : 0;
7725
7726         ret = emulator_pio_in(vcpu, size, port, &val, 1);
7727         if (ret) {
7728                 kvm_rax_write(vcpu, val);
7729                 return ret;
7730         }
7731
7732         vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
7733         vcpu->arch.complete_userspace_io = complete_fast_pio_in;
7734
7735         return 0;
7736 }
7737
7738 int kvm_fast_pio(struct kvm_vcpu *vcpu, int size, unsigned short port, int in)
7739 {
7740         int ret;
7741
7742         if (in)
7743                 ret = kvm_fast_pio_in(vcpu, size, port);
7744         else
7745                 ret = kvm_fast_pio_out(vcpu, size, port);
7746         return ret && kvm_skip_emulated_instruction(vcpu);
7747 }
7748 EXPORT_SYMBOL_GPL(kvm_fast_pio);
7749
7750 static int kvmclock_cpu_down_prep(unsigned int cpu)
7751 {
7752         __this_cpu_write(cpu_tsc_khz, 0);
7753         return 0;
7754 }
7755
7756 static void tsc_khz_changed(void *data)
7757 {
7758         struct cpufreq_freqs *freq = data;
7759         unsigned long khz = 0;
7760
7761         if (data)
7762                 khz = freq->new;
7763         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
7764                 khz = cpufreq_quick_get(raw_smp_processor_id());
7765         if (!khz)
7766                 khz = tsc_khz;
7767         __this_cpu_write(cpu_tsc_khz, khz);
7768 }
7769
7770 #ifdef CONFIG_X86_64
7771 static void kvm_hyperv_tsc_notifier(void)
7772 {
7773         struct kvm *kvm;
7774         struct kvm_vcpu *vcpu;
7775         int cpu;
7776
7777         mutex_lock(&kvm_lock);
7778         list_for_each_entry(kvm, &vm_list, vm_list)
7779                 kvm_make_mclock_inprogress_request(kvm);
7780
7781         hyperv_stop_tsc_emulation();
7782
7783         /* TSC frequency always matches when on Hyper-V */
7784         for_each_present_cpu(cpu)
7785                 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
7786         kvm_max_guest_tsc_khz = tsc_khz;
7787
7788         list_for_each_entry(kvm, &vm_list, vm_list) {
7789                 struct kvm_arch *ka = &kvm->arch;
7790
7791                 spin_lock(&ka->pvclock_gtod_sync_lock);
7792
7793                 pvclock_update_vm_gtod_copy(kvm);
7794
7795                 kvm_for_each_vcpu(cpu, vcpu, kvm)
7796                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
7797
7798                 kvm_for_each_vcpu(cpu, vcpu, kvm)
7799                         kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
7800
7801                 spin_unlock(&ka->pvclock_gtod_sync_lock);
7802         }
7803         mutex_unlock(&kvm_lock);
7804 }
7805 #endif
7806
7807 static void __kvmclock_cpufreq_notifier(struct cpufreq_freqs *freq, int cpu)
7808 {
7809         struct kvm *kvm;
7810         struct kvm_vcpu *vcpu;
7811         int i, send_ipi = 0;
7812
7813         /*
7814          * We allow guests to temporarily run on slowing clocks,
7815          * provided we notify them after, or to run on accelerating
7816          * clocks, provided we notify them before.  Thus time never
7817          * goes backwards.
7818          *
7819          * However, we have a problem.  We can't atomically update
7820          * the frequency of a given CPU from this function; it is
7821          * merely a notifier, which can be called from any CPU.
7822          * Changing the TSC frequency at arbitrary points in time
7823          * requires a recomputation of local variables related to
7824          * the TSC for each VCPU.  We must flag these local variables
7825          * to be updated and be sure the update takes place with the
7826          * new frequency before any guests proceed.
7827          *
7828          * Unfortunately, the combination of hotplug CPU and frequency
7829          * change creates an intractable locking scenario; the order
7830          * of when these callouts happen is undefined with respect to
7831          * CPU hotplug, and they can race with each other.  As such,
7832          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
7833          * undefined; you can actually have a CPU frequency change take
7834          * place in between the computation of X and the setting of the
7835          * variable.  To protect against this problem, all updates of
7836          * the per_cpu tsc_khz variable are done in an interrupt
7837          * protected IPI, and all callers wishing to update the value
7838          * must wait for a synchronous IPI to complete (which is trivial
7839          * if the caller is on the CPU already).  This establishes the
7840          * necessary total order on variable updates.
7841          *
7842          * Note that because a guest time update may take place
7843          * anytime after the setting of the VCPU's request bit, the
7844          * correct TSC value must be set before the request.  However,
7845          * to ensure the update actually makes it to any guest which
7846          * starts running in hardware virtualization between the set
7847          * and the acquisition of the spinlock, we must also ping the
7848          * CPU after setting the request bit.
7849          *
7850          */
7851
7852         smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
7853
7854         mutex_lock(&kvm_lock);
7855         list_for_each_entry(kvm, &vm_list, vm_list) {
7856                 kvm_for_each_vcpu(i, vcpu, kvm) {
7857                         if (vcpu->cpu != cpu)
7858                                 continue;
7859                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
7860                         if (vcpu->cpu != raw_smp_processor_id())
7861                                 send_ipi = 1;
7862                 }
7863         }
7864         mutex_unlock(&kvm_lock);
7865
7866         if (freq->old < freq->new && send_ipi) {
7867                 /*
7868                  * We upscale the frequency.  Must make the guest
7869                  * doesn't see old kvmclock values while running with
7870                  * the new frequency, otherwise we risk the guest sees
7871                  * time go backwards.
7872                  *
7873                  * In case we update the frequency for another cpu
7874                  * (which might be in guest context) send an interrupt
7875                  * to kick the cpu out of guest context.  Next time
7876                  * guest context is entered kvmclock will be updated,
7877                  * so the guest will not see stale values.
7878                  */
7879                 smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
7880         }
7881 }
7882
7883 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
7884                                      void *data)
7885 {
7886         struct cpufreq_freqs *freq = data;
7887         int cpu;
7888
7889         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
7890                 return 0;
7891         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
7892                 return 0;
7893
7894         for_each_cpu(cpu, freq->policy->cpus)
7895                 __kvmclock_cpufreq_notifier(freq, cpu);
7896
7897         return 0;
7898 }
7899
7900 static struct notifier_block kvmclock_cpufreq_notifier_block = {
7901         .notifier_call  = kvmclock_cpufreq_notifier
7902 };
7903
7904 static int kvmclock_cpu_online(unsigned int cpu)
7905 {
7906         tsc_khz_changed(NULL);
7907         return 0;
7908 }
7909
7910 static void kvm_timer_init(void)
7911 {
7912         max_tsc_khz = tsc_khz;
7913
7914         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
7915 #ifdef CONFIG_CPU_FREQ
7916                 struct cpufreq_policy *policy;
7917                 int cpu;
7918
7919                 cpu = get_cpu();
7920                 policy = cpufreq_cpu_get(cpu);
7921                 if (policy) {
7922                         if (policy->cpuinfo.max_freq)
7923                                 max_tsc_khz = policy->cpuinfo.max_freq;
7924                         cpufreq_cpu_put(policy);
7925                 }
7926                 put_cpu();
7927 #endif
7928                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
7929                                           CPUFREQ_TRANSITION_NOTIFIER);
7930         }
7931
7932         cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE, "x86/kvm/clk:online",
7933                           kvmclock_cpu_online, kvmclock_cpu_down_prep);
7934 }
7935
7936 DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
7937 EXPORT_PER_CPU_SYMBOL_GPL(current_vcpu);
7938
7939 int kvm_is_in_guest(void)
7940 {
7941         return __this_cpu_read(current_vcpu) != NULL;
7942 }
7943
7944 static int kvm_is_user_mode(void)
7945 {
7946         int user_mode = 3;
7947
7948         if (__this_cpu_read(current_vcpu))
7949                 user_mode = static_call(kvm_x86_get_cpl)(__this_cpu_read(current_vcpu));
7950
7951         return user_mode != 0;
7952 }
7953
7954 static unsigned long kvm_get_guest_ip(void)
7955 {
7956         unsigned long ip = 0;
7957
7958         if (__this_cpu_read(current_vcpu))
7959                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
7960
7961         return ip;
7962 }
7963
7964 static void kvm_handle_intel_pt_intr(void)
7965 {
7966         struct kvm_vcpu *vcpu = __this_cpu_read(current_vcpu);
7967
7968         kvm_make_request(KVM_REQ_PMI, vcpu);
7969         __set_bit(MSR_CORE_PERF_GLOBAL_OVF_CTRL_TRACE_TOPA_PMI_BIT,
7970                         (unsigned long *)&vcpu->arch.pmu.global_status);
7971 }
7972
7973 static struct perf_guest_info_callbacks kvm_guest_cbs = {
7974         .is_in_guest            = kvm_is_in_guest,
7975         .is_user_mode           = kvm_is_user_mode,
7976         .get_guest_ip           = kvm_get_guest_ip,
7977         .handle_intel_pt_intr   = kvm_handle_intel_pt_intr,
7978 };
7979
7980 #ifdef CONFIG_X86_64
7981 static void pvclock_gtod_update_fn(struct work_struct *work)
7982 {
7983         struct kvm *kvm;
7984
7985         struct kvm_vcpu *vcpu;
7986         int i;
7987
7988         mutex_lock(&kvm_lock);
7989         list_for_each_entry(kvm, &vm_list, vm_list)
7990                 kvm_for_each_vcpu(i, vcpu, kvm)
7991                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
7992         atomic_set(&kvm_guest_has_master_clock, 0);
7993         mutex_unlock(&kvm_lock);
7994 }
7995
7996 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
7997
7998 /*
7999  * Notification about pvclock gtod data update.
8000  */
8001 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
8002                                void *priv)
8003 {
8004         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
8005         struct timekeeper *tk = priv;
8006
8007         update_pvclock_gtod(tk);
8008
8009         /* disable master clock if host does not trust, or does not
8010          * use, TSC based clocksource.
8011          */
8012         if (!gtod_is_based_on_tsc(gtod->clock.vclock_mode) &&
8013             atomic_read(&kvm_guest_has_master_clock) != 0)
8014                 queue_work(system_long_wq, &pvclock_gtod_work);
8015
8016         return 0;
8017 }
8018
8019 static struct notifier_block pvclock_gtod_notifier = {
8020         .notifier_call = pvclock_gtod_notify,
8021 };
8022 #endif
8023
8024 int kvm_arch_init(void *opaque)
8025 {
8026         struct kvm_x86_init_ops *ops = opaque;
8027         int r;
8028
8029         if (kvm_x86_ops.hardware_enable) {
8030                 printk(KERN_ERR "kvm: already loaded the other module\n");
8031                 r = -EEXIST;
8032                 goto out;
8033         }
8034
8035         if (!ops->cpu_has_kvm_support()) {
8036                 pr_err_ratelimited("kvm: no hardware support\n");
8037                 r = -EOPNOTSUPP;
8038                 goto out;
8039         }
8040         if (ops->disabled_by_bios()) {
8041                 pr_err_ratelimited("kvm: disabled by bios\n");
8042                 r = -EOPNOTSUPP;
8043                 goto out;
8044         }
8045
8046         /*
8047          * KVM explicitly assumes that the guest has an FPU and
8048          * FXSAVE/FXRSTOR. For example, the KVM_GET_FPU explicitly casts the
8049          * vCPU's FPU state as a fxregs_state struct.
8050          */
8051         if (!boot_cpu_has(X86_FEATURE_FPU) || !boot_cpu_has(X86_FEATURE_FXSR)) {
8052                 printk(KERN_ERR "kvm: inadequate fpu\n");
8053                 r = -EOPNOTSUPP;
8054                 goto out;
8055         }
8056
8057         r = -ENOMEM;
8058         x86_fpu_cache = kmem_cache_create("x86_fpu", sizeof(struct fpu),
8059                                           __alignof__(struct fpu), SLAB_ACCOUNT,
8060                                           NULL);
8061         if (!x86_fpu_cache) {
8062                 printk(KERN_ERR "kvm: failed to allocate cache for x86 fpu\n");
8063                 goto out;
8064         }
8065
8066         x86_emulator_cache = kvm_alloc_emulator_cache();
8067         if (!x86_emulator_cache) {
8068                 pr_err("kvm: failed to allocate cache for x86 emulator\n");
8069                 goto out_free_x86_fpu_cache;
8070         }
8071
8072         user_return_msrs = alloc_percpu(struct kvm_user_return_msrs);
8073         if (!user_return_msrs) {
8074                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_user_return_msrs\n");
8075                 goto out_free_x86_emulator_cache;
8076         }
8077
8078         r = kvm_mmu_module_init();
8079         if (r)
8080                 goto out_free_percpu;
8081
8082         kvm_timer_init();
8083
8084         perf_register_guest_info_callbacks(&kvm_guest_cbs);
8085
8086         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
8087                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
8088                 supported_xcr0 = host_xcr0 & KVM_SUPPORTED_XCR0;
8089         }
8090
8091         if (pi_inject_timer == -1)
8092                 pi_inject_timer = housekeeping_enabled(HK_FLAG_TIMER);
8093 #ifdef CONFIG_X86_64
8094         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
8095
8096         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
8097                 set_hv_tscchange_cb(kvm_hyperv_tsc_notifier);
8098 #endif
8099
8100         return 0;
8101
8102 out_free_percpu:
8103         free_percpu(user_return_msrs);
8104 out_free_x86_emulator_cache:
8105         kmem_cache_destroy(x86_emulator_cache);
8106 out_free_x86_fpu_cache:
8107         kmem_cache_destroy(x86_fpu_cache);
8108 out:
8109         return r;
8110 }
8111
8112 void kvm_arch_exit(void)
8113 {
8114 #ifdef CONFIG_X86_64
8115         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
8116                 clear_hv_tscchange_cb();
8117 #endif
8118         kvm_lapic_exit();
8119         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
8120
8121         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
8122                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
8123                                             CPUFREQ_TRANSITION_NOTIFIER);
8124         cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE);
8125 #ifdef CONFIG_X86_64
8126         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
8127 #endif
8128         kvm_x86_ops.hardware_enable = NULL;
8129         kvm_mmu_module_exit();
8130         free_percpu(user_return_msrs);
8131         kmem_cache_destroy(x86_fpu_cache);
8132 #ifdef CONFIG_KVM_XEN
8133         static_key_deferred_flush(&kvm_xen_enabled);
8134         WARN_ON(static_branch_unlikely(&kvm_xen_enabled.key));
8135 #endif
8136 }
8137
8138 static int __kvm_vcpu_halt(struct kvm_vcpu *vcpu, int state, int reason)
8139 {
8140         ++vcpu->stat.halt_exits;
8141         if (lapic_in_kernel(vcpu)) {
8142                 vcpu->arch.mp_state = state;
8143                 return 1;
8144         } else {
8145                 vcpu->run->exit_reason = reason;
8146                 return 0;
8147         }
8148 }
8149
8150 int kvm_vcpu_halt(struct kvm_vcpu *vcpu)
8151 {
8152         return __kvm_vcpu_halt(vcpu, KVM_MP_STATE_HALTED, KVM_EXIT_HLT);
8153 }
8154 EXPORT_SYMBOL_GPL(kvm_vcpu_halt);
8155
8156 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
8157 {
8158         int ret = kvm_skip_emulated_instruction(vcpu);
8159         /*
8160          * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
8161          * KVM_EXIT_DEBUG here.
8162          */
8163         return kvm_vcpu_halt(vcpu) && ret;
8164 }
8165 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
8166
8167 int kvm_emulate_ap_reset_hold(struct kvm_vcpu *vcpu)
8168 {
8169         int ret = kvm_skip_emulated_instruction(vcpu);
8170
8171         return __kvm_vcpu_halt(vcpu, KVM_MP_STATE_AP_RESET_HOLD, KVM_EXIT_AP_RESET_HOLD) && ret;
8172 }
8173 EXPORT_SYMBOL_GPL(kvm_emulate_ap_reset_hold);
8174
8175 #ifdef CONFIG_X86_64
8176 static int kvm_pv_clock_pairing(struct kvm_vcpu *vcpu, gpa_t paddr,
8177                                 unsigned long clock_type)
8178 {
8179         struct kvm_clock_pairing clock_pairing;
8180         struct timespec64 ts;
8181         u64 cycle;
8182         int ret;
8183
8184         if (clock_type != KVM_CLOCK_PAIRING_WALLCLOCK)
8185                 return -KVM_EOPNOTSUPP;
8186
8187         if (!kvm_get_walltime_and_clockread(&ts, &cycle))
8188                 return -KVM_EOPNOTSUPP;
8189
8190         clock_pairing.sec = ts.tv_sec;
8191         clock_pairing.nsec = ts.tv_nsec;
8192         clock_pairing.tsc = kvm_read_l1_tsc(vcpu, cycle);
8193         clock_pairing.flags = 0;
8194         memset(&clock_pairing.pad, 0, sizeof(clock_pairing.pad));
8195
8196         ret = 0;
8197         if (kvm_write_guest(vcpu->kvm, paddr, &clock_pairing,
8198                             sizeof(struct kvm_clock_pairing)))
8199                 ret = -KVM_EFAULT;
8200
8201         return ret;
8202 }
8203 #endif
8204
8205 /*
8206  * kvm_pv_kick_cpu_op:  Kick a vcpu.
8207  *
8208  * @apicid - apicid of vcpu to be kicked.
8209  */
8210 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
8211 {
8212         struct kvm_lapic_irq lapic_irq;
8213
8214         lapic_irq.shorthand = APIC_DEST_NOSHORT;
8215         lapic_irq.dest_mode = APIC_DEST_PHYSICAL;
8216         lapic_irq.level = 0;
8217         lapic_irq.dest_id = apicid;
8218         lapic_irq.msi_redir_hint = false;
8219
8220         lapic_irq.delivery_mode = APIC_DM_REMRD;
8221         kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
8222 }
8223
8224 bool kvm_apicv_activated(struct kvm *kvm)
8225 {
8226         return (READ_ONCE(kvm->arch.apicv_inhibit_reasons) == 0);
8227 }
8228 EXPORT_SYMBOL_GPL(kvm_apicv_activated);
8229
8230 void kvm_apicv_init(struct kvm *kvm, bool enable)
8231 {
8232         if (enable)
8233                 clear_bit(APICV_INHIBIT_REASON_DISABLE,
8234                           &kvm->arch.apicv_inhibit_reasons);
8235         else
8236                 set_bit(APICV_INHIBIT_REASON_DISABLE,
8237                         &kvm->arch.apicv_inhibit_reasons);
8238 }
8239 EXPORT_SYMBOL_GPL(kvm_apicv_init);
8240
8241 static void kvm_sched_yield(struct kvm_vcpu *vcpu, unsigned long dest_id)
8242 {
8243         struct kvm_vcpu *target = NULL;
8244         struct kvm_apic_map *map;
8245
8246         vcpu->stat.directed_yield_attempted++;
8247
8248         rcu_read_lock();
8249         map = rcu_dereference(vcpu->kvm->arch.apic_map);
8250
8251         if (likely(map) && dest_id <= map->max_apic_id && map->phys_map[dest_id])
8252                 target = map->phys_map[dest_id]->vcpu;
8253
8254         rcu_read_unlock();
8255
8256         if (!target || !READ_ONCE(target->ready))
8257                 goto no_yield;
8258
8259         /* Ignore requests to yield to self */
8260         if (vcpu == target)
8261                 goto no_yield;
8262
8263         if (kvm_vcpu_yield_to(target) <= 0)
8264                 goto no_yield;
8265
8266         vcpu->stat.directed_yield_successful++;
8267
8268 no_yield:
8269         return;
8270 }
8271
8272 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
8273 {
8274         unsigned long nr, a0, a1, a2, a3, ret;
8275         int op_64_bit;
8276
8277         if (kvm_xen_hypercall_enabled(vcpu->kvm))
8278                 return kvm_xen_hypercall(vcpu);
8279
8280         if (kvm_hv_hypercall_enabled(vcpu))
8281                 return kvm_hv_hypercall(vcpu);
8282
8283         nr = kvm_rax_read(vcpu);
8284         a0 = kvm_rbx_read(vcpu);
8285         a1 = kvm_rcx_read(vcpu);
8286         a2 = kvm_rdx_read(vcpu);
8287         a3 = kvm_rsi_read(vcpu);
8288
8289         trace_kvm_hypercall(nr, a0, a1, a2, a3);
8290
8291         op_64_bit = is_64_bit_mode(vcpu);
8292         if (!op_64_bit) {
8293                 nr &= 0xFFFFFFFF;
8294                 a0 &= 0xFFFFFFFF;
8295                 a1 &= 0xFFFFFFFF;
8296                 a2 &= 0xFFFFFFFF;
8297                 a3 &= 0xFFFFFFFF;
8298         }
8299
8300         if (static_call(kvm_x86_get_cpl)(vcpu) != 0) {
8301                 ret = -KVM_EPERM;
8302                 goto out;
8303         }
8304
8305         ret = -KVM_ENOSYS;
8306
8307         switch (nr) {
8308         case KVM_HC_VAPIC_POLL_IRQ:
8309                 ret = 0;
8310                 break;
8311         case KVM_HC_KICK_CPU:
8312                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_UNHALT))
8313                         break;
8314
8315                 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
8316                 kvm_sched_yield(vcpu, a1);
8317                 ret = 0;
8318                 break;
8319 #ifdef CONFIG_X86_64
8320         case KVM_HC_CLOCK_PAIRING:
8321                 ret = kvm_pv_clock_pairing(vcpu, a0, a1);
8322                 break;
8323 #endif
8324         case KVM_HC_SEND_IPI:
8325                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_SEND_IPI))
8326                         break;
8327
8328                 ret = kvm_pv_send_ipi(vcpu->kvm, a0, a1, a2, a3, op_64_bit);
8329                 break;
8330         case KVM_HC_SCHED_YIELD:
8331                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_SCHED_YIELD))
8332                         break;
8333
8334                 kvm_sched_yield(vcpu, a0);
8335                 ret = 0;
8336                 break;
8337         default:
8338                 ret = -KVM_ENOSYS;
8339                 break;
8340         }
8341 out:
8342         if (!op_64_bit)
8343                 ret = (u32)ret;
8344         kvm_rax_write(vcpu, ret);
8345
8346         ++vcpu->stat.hypercalls;
8347         return kvm_skip_emulated_instruction(vcpu);
8348 }
8349 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
8350
8351 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
8352 {
8353         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
8354         char instruction[3];
8355         unsigned long rip = kvm_rip_read(vcpu);
8356
8357         static_call(kvm_x86_patch_hypercall)(vcpu, instruction);
8358
8359         return emulator_write_emulated(ctxt, rip, instruction, 3,
8360                 &ctxt->exception);
8361 }
8362
8363 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
8364 {
8365         return vcpu->run->request_interrupt_window &&
8366                 likely(!pic_in_kernel(vcpu->kvm));
8367 }
8368
8369 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
8370 {
8371         struct kvm_run *kvm_run = vcpu->run;
8372
8373         /*
8374          * if_flag is obsolete and useless, so do not bother
8375          * setting it for SEV-ES guests.  Userspace can just
8376          * use kvm_run->ready_for_interrupt_injection.
8377          */
8378         kvm_run->if_flag = !vcpu->arch.guest_state_protected
8379                 && (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
8380
8381         kvm_run->cr8 = kvm_get_cr8(vcpu);
8382         kvm_run->apic_base = kvm_get_apic_base(vcpu);
8383         kvm_run->ready_for_interrupt_injection =
8384                 pic_in_kernel(vcpu->kvm) ||
8385                 kvm_vcpu_ready_for_interrupt_injection(vcpu);
8386
8387         if (is_smm(vcpu))
8388                 kvm_run->flags |= KVM_RUN_X86_SMM;
8389 }
8390
8391 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
8392 {
8393         int max_irr, tpr;
8394
8395         if (!kvm_x86_ops.update_cr8_intercept)
8396                 return;
8397
8398         if (!lapic_in_kernel(vcpu))
8399                 return;
8400
8401         if (vcpu->arch.apicv_active)
8402                 return;
8403
8404         if (!vcpu->arch.apic->vapic_addr)
8405                 max_irr = kvm_lapic_find_highest_irr(vcpu);
8406         else
8407                 max_irr = -1;
8408
8409         if (max_irr != -1)
8410                 max_irr >>= 4;
8411
8412         tpr = kvm_lapic_get_cr8(vcpu);
8413
8414         static_call(kvm_x86_update_cr8_intercept)(vcpu, tpr, max_irr);
8415 }
8416
8417
8418 int kvm_check_nested_events(struct kvm_vcpu *vcpu)
8419 {
8420         if (WARN_ON_ONCE(!is_guest_mode(vcpu)))
8421                 return -EIO;
8422
8423         if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
8424                 kvm_x86_ops.nested_ops->triple_fault(vcpu);
8425                 return 1;
8426         }
8427
8428         return kvm_x86_ops.nested_ops->check_events(vcpu);
8429 }
8430
8431 static void kvm_inject_exception(struct kvm_vcpu *vcpu)
8432 {
8433         if (vcpu->arch.exception.error_code && !is_protmode(vcpu))
8434                 vcpu->arch.exception.error_code = false;
8435         static_call(kvm_x86_queue_exception)(vcpu);
8436 }
8437
8438 static void inject_pending_event(struct kvm_vcpu *vcpu, bool *req_immediate_exit)
8439 {
8440         int r;
8441         bool can_inject = true;
8442
8443         /* try to reinject previous events if any */
8444
8445         if (vcpu->arch.exception.injected) {
8446                 kvm_inject_exception(vcpu);
8447                 can_inject = false;
8448         }
8449         /*
8450          * Do not inject an NMI or interrupt if there is a pending
8451          * exception.  Exceptions and interrupts are recognized at
8452          * instruction boundaries, i.e. the start of an instruction.
8453          * Trap-like exceptions, e.g. #DB, have higher priority than
8454          * NMIs and interrupts, i.e. traps are recognized before an
8455          * NMI/interrupt that's pending on the same instruction.
8456          * Fault-like exceptions, e.g. #GP and #PF, are the lowest
8457          * priority, but are only generated (pended) during instruction
8458          * execution, i.e. a pending fault-like exception means the
8459          * fault occurred on the *previous* instruction and must be
8460          * serviced prior to recognizing any new events in order to
8461          * fully complete the previous instruction.
8462          */
8463         else if (!vcpu->arch.exception.pending) {
8464                 if (vcpu->arch.nmi_injected) {
8465                         static_call(kvm_x86_set_nmi)(vcpu);
8466                         can_inject = false;
8467                 } else if (vcpu->arch.interrupt.injected) {
8468                         static_call(kvm_x86_set_irq)(vcpu);
8469                         can_inject = false;
8470                 }
8471         }
8472
8473         WARN_ON_ONCE(vcpu->arch.exception.injected &&
8474                      vcpu->arch.exception.pending);
8475
8476         /*
8477          * Call check_nested_events() even if we reinjected a previous event
8478          * in order for caller to determine if it should require immediate-exit
8479          * from L2 to L1 due to pending L1 events which require exit
8480          * from L2 to L1.
8481          */
8482         if (is_guest_mode(vcpu)) {
8483                 r = kvm_check_nested_events(vcpu);
8484                 if (r < 0)
8485                         goto busy;
8486         }
8487
8488         /* try to inject new event if pending */
8489         if (vcpu->arch.exception.pending) {
8490                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
8491                                         vcpu->arch.exception.has_error_code,
8492                                         vcpu->arch.exception.error_code);
8493
8494                 vcpu->arch.exception.pending = false;
8495                 vcpu->arch.exception.injected = true;
8496
8497                 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
8498                         __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
8499                                              X86_EFLAGS_RF);
8500
8501                 if (vcpu->arch.exception.nr == DB_VECTOR) {
8502                         kvm_deliver_exception_payload(vcpu);
8503                         if (vcpu->arch.dr7 & DR7_GD) {
8504                                 vcpu->arch.dr7 &= ~DR7_GD;
8505                                 kvm_update_dr7(vcpu);
8506                         }
8507                 }
8508
8509                 kvm_inject_exception(vcpu);
8510                 can_inject = false;
8511         }
8512
8513         /*
8514          * Finally, inject interrupt events.  If an event cannot be injected
8515          * due to architectural conditions (e.g. IF=0) a window-open exit
8516          * will re-request KVM_REQ_EVENT.  Sometimes however an event is pending
8517          * and can architecturally be injected, but we cannot do it right now:
8518          * an interrupt could have arrived just now and we have to inject it
8519          * as a vmexit, or there could already an event in the queue, which is
8520          * indicated by can_inject.  In that case we request an immediate exit
8521          * in order to make progress and get back here for another iteration.
8522          * The kvm_x86_ops hooks communicate this by returning -EBUSY.
8523          */
8524         if (vcpu->arch.smi_pending) {
8525                 r = can_inject ? static_call(kvm_x86_smi_allowed)(vcpu, true) : -EBUSY;
8526                 if (r < 0)
8527                         goto busy;
8528                 if (r) {
8529                         vcpu->arch.smi_pending = false;
8530                         ++vcpu->arch.smi_count;
8531                         enter_smm(vcpu);
8532                         can_inject = false;
8533                 } else
8534                         static_call(kvm_x86_enable_smi_window)(vcpu);
8535         }
8536
8537         if (vcpu->arch.nmi_pending) {
8538                 r = can_inject ? static_call(kvm_x86_nmi_allowed)(vcpu, true) : -EBUSY;
8539                 if (r < 0)
8540                         goto busy;
8541                 if (r) {
8542                         --vcpu->arch.nmi_pending;
8543                         vcpu->arch.nmi_injected = true;
8544                         static_call(kvm_x86_set_nmi)(vcpu);
8545                         can_inject = false;
8546                         WARN_ON(static_call(kvm_x86_nmi_allowed)(vcpu, true) < 0);
8547                 }
8548                 if (vcpu->arch.nmi_pending)
8549                         static_call(kvm_x86_enable_nmi_window)(vcpu);
8550         }
8551
8552         if (kvm_cpu_has_injectable_intr(vcpu)) {
8553                 r = can_inject ? static_call(kvm_x86_interrupt_allowed)(vcpu, true) : -EBUSY;
8554                 if (r < 0)
8555                         goto busy;
8556                 if (r) {
8557                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu), false);
8558                         static_call(kvm_x86_set_irq)(vcpu);
8559                         WARN_ON(static_call(kvm_x86_interrupt_allowed)(vcpu, true) < 0);
8560                 }
8561                 if (kvm_cpu_has_injectable_intr(vcpu))
8562                         static_call(kvm_x86_enable_irq_window)(vcpu);
8563         }
8564
8565         if (is_guest_mode(vcpu) &&
8566             kvm_x86_ops.nested_ops->hv_timer_pending &&
8567             kvm_x86_ops.nested_ops->hv_timer_pending(vcpu))
8568                 *req_immediate_exit = true;
8569
8570         WARN_ON(vcpu->arch.exception.pending);
8571         return;
8572
8573 busy:
8574         *req_immediate_exit = true;
8575         return;
8576 }
8577
8578 static void process_nmi(struct kvm_vcpu *vcpu)
8579 {
8580         unsigned limit = 2;
8581
8582         /*
8583          * x86 is limited to one NMI running, and one NMI pending after it.
8584          * If an NMI is already in progress, limit further NMIs to just one.
8585          * Otherwise, allow two (and we'll inject the first one immediately).
8586          */
8587         if (static_call(kvm_x86_get_nmi_mask)(vcpu) || vcpu->arch.nmi_injected)
8588                 limit = 1;
8589
8590         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
8591         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
8592         kvm_make_request(KVM_REQ_EVENT, vcpu);
8593 }
8594
8595 static u32 enter_smm_get_segment_flags(struct kvm_segment *seg)
8596 {
8597         u32 flags = 0;
8598         flags |= seg->g       << 23;
8599         flags |= seg->db      << 22;
8600         flags |= seg->l       << 21;
8601         flags |= seg->avl     << 20;
8602         flags |= seg->present << 15;
8603         flags |= seg->dpl     << 13;
8604         flags |= seg->s       << 12;
8605         flags |= seg->type    << 8;
8606         return flags;
8607 }
8608
8609 static void enter_smm_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
8610 {
8611         struct kvm_segment seg;
8612         int offset;
8613
8614         kvm_get_segment(vcpu, &seg, n);
8615         put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
8616
8617         if (n < 3)
8618                 offset = 0x7f84 + n * 12;
8619         else
8620                 offset = 0x7f2c + (n - 3) * 12;
8621
8622         put_smstate(u32, buf, offset + 8, seg.base);
8623         put_smstate(u32, buf, offset + 4, seg.limit);
8624         put_smstate(u32, buf, offset, enter_smm_get_segment_flags(&seg));
8625 }
8626
8627 #ifdef CONFIG_X86_64
8628 static void enter_smm_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
8629 {
8630         struct kvm_segment seg;
8631         int offset;
8632         u16 flags;
8633
8634         kvm_get_segment(vcpu, &seg, n);
8635         offset = 0x7e00 + n * 16;
8636
8637         flags = enter_smm_get_segment_flags(&seg) >> 8;
8638         put_smstate(u16, buf, offset, seg.selector);
8639         put_smstate(u16, buf, offset + 2, flags);
8640         put_smstate(u32, buf, offset + 4, seg.limit);
8641         put_smstate(u64, buf, offset + 8, seg.base);
8642 }
8643 #endif
8644
8645 static void enter_smm_save_state_32(struct kvm_vcpu *vcpu, char *buf)
8646 {
8647         struct desc_ptr dt;
8648         struct kvm_segment seg;
8649         unsigned long val;
8650         int i;
8651
8652         put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
8653         put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
8654         put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
8655         put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
8656
8657         for (i = 0; i < 8; i++)
8658                 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read(vcpu, i));
8659
8660         kvm_get_dr(vcpu, 6, &val);
8661         put_smstate(u32, buf, 0x7fcc, (u32)val);
8662         kvm_get_dr(vcpu, 7, &val);
8663         put_smstate(u32, buf, 0x7fc8, (u32)val);
8664
8665         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
8666         put_smstate(u32, buf, 0x7fc4, seg.selector);
8667         put_smstate(u32, buf, 0x7f64, seg.base);
8668         put_smstate(u32, buf, 0x7f60, seg.limit);
8669         put_smstate(u32, buf, 0x7f5c, enter_smm_get_segment_flags(&seg));
8670
8671         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
8672         put_smstate(u32, buf, 0x7fc0, seg.selector);
8673         put_smstate(u32, buf, 0x7f80, seg.base);
8674         put_smstate(u32, buf, 0x7f7c, seg.limit);
8675         put_smstate(u32, buf, 0x7f78, enter_smm_get_segment_flags(&seg));
8676
8677         static_call(kvm_x86_get_gdt)(vcpu, &dt);
8678         put_smstate(u32, buf, 0x7f74, dt.address);
8679         put_smstate(u32, buf, 0x7f70, dt.size);
8680
8681         static_call(kvm_x86_get_idt)(vcpu, &dt);
8682         put_smstate(u32, buf, 0x7f58, dt.address);
8683         put_smstate(u32, buf, 0x7f54, dt.size);
8684
8685         for (i = 0; i < 6; i++)
8686                 enter_smm_save_seg_32(vcpu, buf, i);
8687
8688         put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
8689
8690         /* revision id */
8691         put_smstate(u32, buf, 0x7efc, 0x00020000);
8692         put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
8693 }
8694
8695 #ifdef CONFIG_X86_64
8696 static void enter_smm_save_state_64(struct kvm_vcpu *vcpu, char *buf)
8697 {
8698         struct desc_ptr dt;
8699         struct kvm_segment seg;
8700         unsigned long val;
8701         int i;
8702
8703         for (i = 0; i < 16; i++)
8704                 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read(vcpu, i));
8705
8706         put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
8707         put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
8708
8709         kvm_get_dr(vcpu, 6, &val);
8710         put_smstate(u64, buf, 0x7f68, val);
8711         kvm_get_dr(vcpu, 7, &val);
8712         put_smstate(u64, buf, 0x7f60, val);
8713
8714         put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
8715         put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
8716         put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
8717
8718         put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
8719
8720         /* revision id */
8721         put_smstate(u32, buf, 0x7efc, 0x00020064);
8722
8723         put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
8724
8725         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
8726         put_smstate(u16, buf, 0x7e90, seg.selector);
8727         put_smstate(u16, buf, 0x7e92, enter_smm_get_segment_flags(&seg) >> 8);
8728         put_smstate(u32, buf, 0x7e94, seg.limit);
8729         put_smstate(u64, buf, 0x7e98, seg.base);
8730
8731         static_call(kvm_x86_get_idt)(vcpu, &dt);
8732         put_smstate(u32, buf, 0x7e84, dt.size);
8733         put_smstate(u64, buf, 0x7e88, dt.address);
8734
8735         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
8736         put_smstate(u16, buf, 0x7e70, seg.selector);
8737         put_smstate(u16, buf, 0x7e72, enter_smm_get_segment_flags(&seg) >> 8);
8738         put_smstate(u32, buf, 0x7e74, seg.limit);
8739         put_smstate(u64, buf, 0x7e78, seg.base);
8740
8741         static_call(kvm_x86_get_gdt)(vcpu, &dt);
8742         put_smstate(u32, buf, 0x7e64, dt.size);
8743         put_smstate(u64, buf, 0x7e68, dt.address);
8744
8745         for (i = 0; i < 6; i++)
8746                 enter_smm_save_seg_64(vcpu, buf, i);
8747 }
8748 #endif
8749
8750 static void enter_smm(struct kvm_vcpu *vcpu)
8751 {
8752         struct kvm_segment cs, ds;
8753         struct desc_ptr dt;
8754         char buf[512];
8755         u32 cr0;
8756
8757         trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, true);
8758         memset(buf, 0, 512);
8759 #ifdef CONFIG_X86_64
8760         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
8761                 enter_smm_save_state_64(vcpu, buf);
8762         else
8763 #endif
8764                 enter_smm_save_state_32(vcpu, buf);
8765
8766         /*
8767          * Give pre_enter_smm() a chance to make ISA-specific changes to the
8768          * vCPU state (e.g. leave guest mode) after we've saved the state into
8769          * the SMM state-save area.
8770          */
8771         static_call(kvm_x86_pre_enter_smm)(vcpu, buf);
8772
8773         vcpu->arch.hflags |= HF_SMM_MASK;
8774         kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
8775
8776         if (static_call(kvm_x86_get_nmi_mask)(vcpu))
8777                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
8778         else
8779                 static_call(kvm_x86_set_nmi_mask)(vcpu, true);
8780
8781         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
8782         kvm_rip_write(vcpu, 0x8000);
8783
8784         cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
8785         static_call(kvm_x86_set_cr0)(vcpu, cr0);
8786         vcpu->arch.cr0 = cr0;
8787
8788         static_call(kvm_x86_set_cr4)(vcpu, 0);
8789
8790         /* Undocumented: IDT limit is set to zero on entry to SMM.  */
8791         dt.address = dt.size = 0;
8792         static_call(kvm_x86_set_idt)(vcpu, &dt);
8793
8794         kvm_set_dr(vcpu, 7, DR7_FIXED_1);
8795
8796         cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
8797         cs.base = vcpu->arch.smbase;
8798
8799         ds.selector = 0;
8800         ds.base = 0;
8801
8802         cs.limit    = ds.limit = 0xffffffff;
8803         cs.type     = ds.type = 0x3;
8804         cs.dpl      = ds.dpl = 0;
8805         cs.db       = ds.db = 0;
8806         cs.s        = ds.s = 1;
8807         cs.l        = ds.l = 0;
8808         cs.g        = ds.g = 1;
8809         cs.avl      = ds.avl = 0;
8810         cs.present  = ds.present = 1;
8811         cs.unusable = ds.unusable = 0;
8812         cs.padding  = ds.padding = 0;
8813
8814         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
8815         kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
8816         kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
8817         kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
8818         kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
8819         kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
8820
8821 #ifdef CONFIG_X86_64
8822         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
8823                 static_call(kvm_x86_set_efer)(vcpu, 0);
8824 #endif
8825
8826         kvm_update_cpuid_runtime(vcpu);
8827         kvm_mmu_reset_context(vcpu);
8828 }
8829
8830 static void process_smi(struct kvm_vcpu *vcpu)
8831 {
8832         vcpu->arch.smi_pending = true;
8833         kvm_make_request(KVM_REQ_EVENT, vcpu);
8834 }
8835
8836 void kvm_make_scan_ioapic_request_mask(struct kvm *kvm,
8837                                        unsigned long *vcpu_bitmap)
8838 {
8839         cpumask_var_t cpus;
8840
8841         zalloc_cpumask_var(&cpus, GFP_ATOMIC);
8842
8843         kvm_make_vcpus_request_mask(kvm, KVM_REQ_SCAN_IOAPIC,
8844                                     NULL, vcpu_bitmap, cpus);
8845
8846         free_cpumask_var(cpus);
8847 }
8848
8849 void kvm_make_scan_ioapic_request(struct kvm *kvm)
8850 {
8851         kvm_make_all_cpus_request(kvm, KVM_REQ_SCAN_IOAPIC);
8852 }
8853
8854 void kvm_vcpu_update_apicv(struct kvm_vcpu *vcpu)
8855 {
8856         if (!lapic_in_kernel(vcpu))
8857                 return;
8858
8859         vcpu->arch.apicv_active = kvm_apicv_activated(vcpu->kvm);
8860         kvm_apic_update_apicv(vcpu);
8861         static_call(kvm_x86_refresh_apicv_exec_ctrl)(vcpu);
8862 }
8863 EXPORT_SYMBOL_GPL(kvm_vcpu_update_apicv);
8864
8865 /*
8866  * NOTE: Do not hold any lock prior to calling this.
8867  *
8868  * In particular, kvm_request_apicv_update() expects kvm->srcu not to be
8869  * locked, because it calls __x86_set_memory_region() which does
8870  * synchronize_srcu(&kvm->srcu).
8871  */
8872 void kvm_request_apicv_update(struct kvm *kvm, bool activate, ulong bit)
8873 {
8874         struct kvm_vcpu *except;
8875         unsigned long old, new, expected;
8876
8877         if (!kvm_x86_ops.check_apicv_inhibit_reasons ||
8878             !static_call(kvm_x86_check_apicv_inhibit_reasons)(bit))
8879                 return;
8880
8881         old = READ_ONCE(kvm->arch.apicv_inhibit_reasons);
8882         do {
8883                 expected = new = old;
8884                 if (activate)
8885                         __clear_bit(bit, &new);
8886                 else
8887                         __set_bit(bit, &new);
8888                 if (new == old)
8889                         break;
8890                 old = cmpxchg(&kvm->arch.apicv_inhibit_reasons, expected, new);
8891         } while (old != expected);
8892
8893         if (!!old == !!new)
8894                 return;
8895
8896         trace_kvm_apicv_update_request(activate, bit);
8897         if (kvm_x86_ops.pre_update_apicv_exec_ctrl)
8898                 static_call(kvm_x86_pre_update_apicv_exec_ctrl)(kvm, activate);
8899
8900         /*
8901          * Sending request to update APICV for all other vcpus,
8902          * while update the calling vcpu immediately instead of
8903          * waiting for another #VMEXIT to handle the request.
8904          */
8905         except = kvm_get_running_vcpu();
8906         kvm_make_all_cpus_request_except(kvm, KVM_REQ_APICV_UPDATE,
8907                                          except);
8908         if (except)
8909                 kvm_vcpu_update_apicv(except);
8910 }
8911 EXPORT_SYMBOL_GPL(kvm_request_apicv_update);
8912
8913 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
8914 {
8915         if (!kvm_apic_present(vcpu))
8916                 return;
8917
8918         bitmap_zero(vcpu->arch.ioapic_handled_vectors, 256);
8919
8920         if (irqchip_split(vcpu->kvm))
8921                 kvm_scan_ioapic_routes(vcpu, vcpu->arch.ioapic_handled_vectors);
8922         else {
8923                 if (vcpu->arch.apicv_active)
8924                         static_call(kvm_x86_sync_pir_to_irr)(vcpu);
8925                 if (ioapic_in_kernel(vcpu->kvm))
8926                         kvm_ioapic_scan_entry(vcpu, vcpu->arch.ioapic_handled_vectors);
8927         }
8928
8929         if (is_guest_mode(vcpu))
8930                 vcpu->arch.load_eoi_exitmap_pending = true;
8931         else
8932                 kvm_make_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu);
8933 }
8934
8935 static void vcpu_load_eoi_exitmap(struct kvm_vcpu *vcpu)
8936 {
8937         u64 eoi_exit_bitmap[4];
8938
8939         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
8940                 return;
8941
8942         if (to_hv_vcpu(vcpu))
8943                 bitmap_or((ulong *)eoi_exit_bitmap,
8944                           vcpu->arch.ioapic_handled_vectors,
8945                           to_hv_synic(vcpu)->vec_bitmap, 256);
8946
8947         static_call(kvm_x86_load_eoi_exitmap)(vcpu, eoi_exit_bitmap);
8948 }
8949
8950 void kvm_arch_mmu_notifier_invalidate_range(struct kvm *kvm,
8951                                             unsigned long start, unsigned long end)
8952 {
8953         unsigned long apic_address;
8954
8955         /*
8956          * The physical address of apic access page is stored in the VMCS.
8957          * Update it when it becomes invalid.
8958          */
8959         apic_address = gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
8960         if (start <= apic_address && apic_address < end)
8961                 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
8962 }
8963
8964 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
8965 {
8966         if (!lapic_in_kernel(vcpu))
8967                 return;
8968
8969         if (!kvm_x86_ops.set_apic_access_page_addr)
8970                 return;
8971
8972         static_call(kvm_x86_set_apic_access_page_addr)(vcpu);
8973 }
8974
8975 void __kvm_request_immediate_exit(struct kvm_vcpu *vcpu)
8976 {
8977         smp_send_reschedule(vcpu->cpu);
8978 }
8979 EXPORT_SYMBOL_GPL(__kvm_request_immediate_exit);
8980
8981 /*
8982  * Returns 1 to let vcpu_run() continue the guest execution loop without
8983  * exiting to the userspace.  Otherwise, the value will be returned to the
8984  * userspace.
8985  */
8986 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
8987 {
8988         int r;
8989         bool req_int_win =
8990                 dm_request_for_irq_injection(vcpu) &&
8991                 kvm_cpu_accept_dm_intr(vcpu);
8992         fastpath_t exit_fastpath;
8993
8994         bool req_immediate_exit = false;
8995
8996         /* Forbid vmenter if vcpu dirty ring is soft-full */
8997         if (unlikely(vcpu->kvm->dirty_ring_size &&
8998                      kvm_dirty_ring_soft_full(&vcpu->dirty_ring))) {
8999                 vcpu->run->exit_reason = KVM_EXIT_DIRTY_RING_FULL;
9000                 trace_kvm_dirty_ring_exit(vcpu);
9001                 r = 0;
9002                 goto out;
9003         }
9004
9005         if (kvm_request_pending(vcpu)) {
9006                 if (kvm_check_request(KVM_REQ_GET_NESTED_STATE_PAGES, vcpu)) {
9007                         if (unlikely(!kvm_x86_ops.nested_ops->get_nested_state_pages(vcpu))) {
9008                                 r = 0;
9009                                 goto out;
9010                         }
9011                 }
9012                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
9013                         kvm_mmu_unload(vcpu);
9014                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
9015                         __kvm_migrate_timers(vcpu);
9016                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
9017                         kvm_gen_update_masterclock(vcpu->kvm);
9018                 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
9019                         kvm_gen_kvmclock_update(vcpu);
9020                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
9021                         r = kvm_guest_time_update(vcpu);
9022                         if (unlikely(r))
9023                                 goto out;
9024                 }
9025                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
9026                         kvm_mmu_sync_roots(vcpu);
9027                 if (kvm_check_request(KVM_REQ_LOAD_MMU_PGD, vcpu))
9028                         kvm_mmu_load_pgd(vcpu);
9029                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu)) {
9030                         kvm_vcpu_flush_tlb_all(vcpu);
9031
9032                         /* Flushing all ASIDs flushes the current ASID... */
9033                         kvm_clear_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
9034                 }
9035                 if (kvm_check_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu))
9036                         kvm_vcpu_flush_tlb_current(vcpu);
9037                 if (kvm_check_request(KVM_REQ_HV_TLB_FLUSH, vcpu))
9038                         kvm_vcpu_flush_tlb_guest(vcpu);
9039
9040                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
9041                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
9042                         r = 0;
9043                         goto out;
9044                 }
9045                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
9046                         if (is_guest_mode(vcpu)) {
9047                                 kvm_x86_ops.nested_ops->triple_fault(vcpu);
9048                         } else {
9049                                 vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
9050                                 vcpu->mmio_needed = 0;
9051                                 r = 0;
9052                                 goto out;
9053                         }
9054                 }
9055                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
9056                         /* Page is swapped out. Do synthetic halt */
9057                         vcpu->arch.apf.halted = true;
9058                         r = 1;
9059                         goto out;
9060                 }
9061                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
9062                         record_steal_time(vcpu);
9063                 if (kvm_check_request(KVM_REQ_SMI, vcpu))
9064                         process_smi(vcpu);
9065                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
9066                         process_nmi(vcpu);
9067                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
9068                         kvm_pmu_handle_event(vcpu);
9069                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
9070                         kvm_pmu_deliver_pmi(vcpu);
9071                 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT, vcpu)) {
9072                         BUG_ON(vcpu->arch.pending_ioapic_eoi > 255);
9073                         if (test_bit(vcpu->arch.pending_ioapic_eoi,
9074                                      vcpu->arch.ioapic_handled_vectors)) {
9075                                 vcpu->run->exit_reason = KVM_EXIT_IOAPIC_EOI;
9076                                 vcpu->run->eoi.vector =
9077                                                 vcpu->arch.pending_ioapic_eoi;
9078                                 r = 0;
9079                                 goto out;
9080                         }
9081                 }
9082                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
9083                         vcpu_scan_ioapic(vcpu);
9084                 if (kvm_check_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu))
9085                         vcpu_load_eoi_exitmap(vcpu);
9086                 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
9087                         kvm_vcpu_reload_apic_access_page(vcpu);
9088                 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
9089                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
9090                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
9091                         r = 0;
9092                         goto out;
9093                 }
9094                 if (kvm_check_request(KVM_REQ_HV_RESET, vcpu)) {
9095                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
9096                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_RESET;
9097                         r = 0;
9098                         goto out;
9099                 }
9100                 if (kvm_check_request(KVM_REQ_HV_EXIT, vcpu)) {
9101                         struct kvm_vcpu_hv *hv_vcpu = to_hv_vcpu(vcpu);
9102
9103                         vcpu->run->exit_reason = KVM_EXIT_HYPERV;
9104                         vcpu->run->hyperv = hv_vcpu->exit;
9105                         r = 0;
9106                         goto out;
9107                 }
9108
9109                 /*
9110                  * KVM_REQ_HV_STIMER has to be processed after
9111                  * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
9112                  * depend on the guest clock being up-to-date
9113                  */
9114                 if (kvm_check_request(KVM_REQ_HV_STIMER, vcpu))
9115                         kvm_hv_process_stimers(vcpu);
9116                 if (kvm_check_request(KVM_REQ_APICV_UPDATE, vcpu))
9117                         kvm_vcpu_update_apicv(vcpu);
9118                 if (kvm_check_request(KVM_REQ_APF_READY, vcpu))
9119                         kvm_check_async_pf_completion(vcpu);
9120                 if (kvm_check_request(KVM_REQ_MSR_FILTER_CHANGED, vcpu))
9121                         static_call(kvm_x86_msr_filter_changed)(vcpu);
9122
9123                 if (kvm_check_request(KVM_REQ_UPDATE_CPU_DIRTY_LOGGING, vcpu))
9124                         static_call(kvm_x86_update_cpu_dirty_logging)(vcpu);
9125         }
9126
9127         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win ||
9128             kvm_xen_has_interrupt(vcpu)) {
9129                 ++vcpu->stat.req_event;
9130                 kvm_apic_accept_events(vcpu);
9131                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
9132                         r = 1;
9133                         goto out;
9134                 }
9135
9136                 inject_pending_event(vcpu, &req_immediate_exit);
9137                 if (req_int_win)
9138                         static_call(kvm_x86_enable_irq_window)(vcpu);
9139
9140                 if (kvm_lapic_enabled(vcpu)) {
9141                         update_cr8_intercept(vcpu);
9142                         kvm_lapic_sync_to_vapic(vcpu);
9143                 }
9144         }
9145
9146         r = kvm_mmu_reload(vcpu);
9147         if (unlikely(r)) {
9148                 goto cancel_injection;
9149         }
9150
9151         preempt_disable();
9152
9153         static_call(kvm_x86_prepare_guest_switch)(vcpu);
9154
9155         /*
9156          * Disable IRQs before setting IN_GUEST_MODE.  Posted interrupt
9157          * IPI are then delayed after guest entry, which ensures that they
9158          * result in virtual interrupt delivery.
9159          */
9160         local_irq_disable();
9161         vcpu->mode = IN_GUEST_MODE;
9162
9163         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
9164
9165         /*
9166          * 1) We should set ->mode before checking ->requests.  Please see
9167          * the comment in kvm_vcpu_exiting_guest_mode().
9168          *
9169          * 2) For APICv, we should set ->mode before checking PID.ON. This
9170          * pairs with the memory barrier implicit in pi_test_and_set_on
9171          * (see vmx_deliver_posted_interrupt).
9172          *
9173          * 3) This also orders the write to mode from any reads to the page
9174          * tables done while the VCPU is running.  Please see the comment
9175          * in kvm_flush_remote_tlbs.
9176          */
9177         smp_mb__after_srcu_read_unlock();
9178
9179         /*
9180          * This handles the case where a posted interrupt was
9181          * notified with kvm_vcpu_kick.
9182          */
9183         if (kvm_lapic_enabled(vcpu) && vcpu->arch.apicv_active)
9184                 static_call(kvm_x86_sync_pir_to_irr)(vcpu);
9185
9186         if (kvm_vcpu_exit_request(vcpu)) {
9187                 vcpu->mode = OUTSIDE_GUEST_MODE;
9188                 smp_wmb();
9189                 local_irq_enable();
9190                 preempt_enable();
9191                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
9192                 r = 1;
9193                 goto cancel_injection;
9194         }
9195
9196         if (req_immediate_exit) {
9197                 kvm_make_request(KVM_REQ_EVENT, vcpu);
9198                 static_call(kvm_x86_request_immediate_exit)(vcpu);
9199         }
9200
9201         fpregs_assert_state_consistent();
9202         if (test_thread_flag(TIF_NEED_FPU_LOAD))
9203                 switch_fpu_return();
9204
9205         if (unlikely(vcpu->arch.switch_db_regs)) {
9206                 set_debugreg(0, 7);
9207                 set_debugreg(vcpu->arch.eff_db[0], 0);
9208                 set_debugreg(vcpu->arch.eff_db[1], 1);
9209                 set_debugreg(vcpu->arch.eff_db[2], 2);
9210                 set_debugreg(vcpu->arch.eff_db[3], 3);
9211                 set_debugreg(vcpu->arch.dr6, 6);
9212                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
9213         }
9214
9215         for (;;) {
9216                 exit_fastpath = static_call(kvm_x86_run)(vcpu);
9217                 if (likely(exit_fastpath != EXIT_FASTPATH_REENTER_GUEST))
9218                         break;
9219
9220                 if (unlikely(kvm_vcpu_exit_request(vcpu))) {
9221                         exit_fastpath = EXIT_FASTPATH_EXIT_HANDLED;
9222                         break;
9223                 }
9224
9225                 if (vcpu->arch.apicv_active)
9226                         static_call(kvm_x86_sync_pir_to_irr)(vcpu);
9227         }
9228
9229         /*
9230          * Do this here before restoring debug registers on the host.  And
9231          * since we do this before handling the vmexit, a DR access vmexit
9232          * can (a) read the correct value of the debug registers, (b) set
9233          * KVM_DEBUGREG_WONT_EXIT again.
9234          */
9235         if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
9236                 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
9237                 static_call(kvm_x86_sync_dirty_debug_regs)(vcpu);
9238                 kvm_update_dr0123(vcpu);
9239                 kvm_update_dr7(vcpu);
9240                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
9241         }
9242
9243         /*
9244          * If the guest has used debug registers, at least dr7
9245          * will be disabled while returning to the host.
9246          * If we don't have active breakpoints in the host, we don't
9247          * care about the messed up debug address registers. But if
9248          * we have some of them active, restore the old state.
9249          */
9250         if (hw_breakpoint_active())
9251                 hw_breakpoint_restore();
9252
9253         vcpu->arch.last_vmentry_cpu = vcpu->cpu;
9254         vcpu->arch.last_guest_tsc = kvm_read_l1_tsc(vcpu, rdtsc());
9255
9256         vcpu->mode = OUTSIDE_GUEST_MODE;
9257         smp_wmb();
9258
9259         static_call(kvm_x86_handle_exit_irqoff)(vcpu);
9260
9261         /*
9262          * Consume any pending interrupts, including the possible source of
9263          * VM-Exit on SVM and any ticks that occur between VM-Exit and now.
9264          * An instruction is required after local_irq_enable() to fully unblock
9265          * interrupts on processors that implement an interrupt shadow, the
9266          * stat.exits increment will do nicely.
9267          */
9268         kvm_before_interrupt(vcpu);
9269         local_irq_enable();
9270         ++vcpu->stat.exits;
9271         local_irq_disable();
9272         kvm_after_interrupt(vcpu);
9273
9274         if (lapic_in_kernel(vcpu)) {
9275                 s64 delta = vcpu->arch.apic->lapic_timer.advance_expire_delta;
9276                 if (delta != S64_MIN) {
9277                         trace_kvm_wait_lapic_expire(vcpu->vcpu_id, delta);
9278                         vcpu->arch.apic->lapic_timer.advance_expire_delta = S64_MIN;
9279                 }
9280         }
9281
9282         local_irq_enable();
9283         preempt_enable();
9284
9285         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
9286
9287         /*
9288          * Profile KVM exit RIPs:
9289          */
9290         if (unlikely(prof_on == KVM_PROFILING)) {
9291                 unsigned long rip = kvm_rip_read(vcpu);
9292                 profile_hit(KVM_PROFILING, (void *)rip);
9293         }
9294
9295         if (unlikely(vcpu->arch.tsc_always_catchup))
9296                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
9297
9298         if (vcpu->arch.apic_attention)
9299                 kvm_lapic_sync_from_vapic(vcpu);
9300
9301         r = static_call(kvm_x86_handle_exit)(vcpu, exit_fastpath);
9302         return r;
9303
9304 cancel_injection:
9305         if (req_immediate_exit)
9306                 kvm_make_request(KVM_REQ_EVENT, vcpu);
9307         static_call(kvm_x86_cancel_injection)(vcpu);
9308         if (unlikely(vcpu->arch.apic_attention))
9309                 kvm_lapic_sync_from_vapic(vcpu);
9310 out:
9311         return r;
9312 }
9313
9314 static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
9315 {
9316         if (!kvm_arch_vcpu_runnable(vcpu) &&
9317             (!kvm_x86_ops.pre_block || static_call(kvm_x86_pre_block)(vcpu) == 0)) {
9318                 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
9319                 kvm_vcpu_block(vcpu);
9320                 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
9321
9322                 if (kvm_x86_ops.post_block)
9323                         static_call(kvm_x86_post_block)(vcpu);
9324
9325                 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
9326                         return 1;
9327         }
9328
9329         kvm_apic_accept_events(vcpu);
9330         switch(vcpu->arch.mp_state) {
9331         case KVM_MP_STATE_HALTED:
9332         case KVM_MP_STATE_AP_RESET_HOLD:
9333                 vcpu->arch.pv.pv_unhalted = false;
9334                 vcpu->arch.mp_state =
9335                         KVM_MP_STATE_RUNNABLE;
9336                 fallthrough;
9337         case KVM_MP_STATE_RUNNABLE:
9338                 vcpu->arch.apf.halted = false;
9339                 break;
9340         case KVM_MP_STATE_INIT_RECEIVED:
9341                 break;
9342         default:
9343                 return -EINTR;
9344         }
9345         return 1;
9346 }
9347
9348 static inline bool kvm_vcpu_running(struct kvm_vcpu *vcpu)
9349 {
9350         if (is_guest_mode(vcpu))
9351                 kvm_check_nested_events(vcpu);
9352
9353         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
9354                 !vcpu->arch.apf.halted);
9355 }
9356
9357 static int vcpu_run(struct kvm_vcpu *vcpu)
9358 {
9359         int r;
9360         struct kvm *kvm = vcpu->kvm;
9361
9362         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
9363         vcpu->arch.l1tf_flush_l1d = true;
9364
9365         for (;;) {
9366                 if (kvm_vcpu_running(vcpu)) {
9367                         r = vcpu_enter_guest(vcpu);
9368                 } else {
9369                         r = vcpu_block(kvm, vcpu);
9370                 }
9371
9372                 if (r <= 0)
9373                         break;
9374
9375                 kvm_clear_request(KVM_REQ_PENDING_TIMER, vcpu);
9376                 if (kvm_cpu_has_pending_timer(vcpu))
9377                         kvm_inject_pending_timer_irqs(vcpu);
9378
9379                 if (dm_request_for_irq_injection(vcpu) &&
9380                         kvm_vcpu_ready_for_interrupt_injection(vcpu)) {
9381                         r = 0;
9382                         vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
9383                         ++vcpu->stat.request_irq_exits;
9384                         break;
9385                 }
9386
9387                 if (__xfer_to_guest_mode_work_pending()) {
9388                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
9389                         r = xfer_to_guest_mode_handle_work(vcpu);
9390                         if (r)
9391                                 return r;
9392                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
9393                 }
9394         }
9395
9396         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
9397
9398         return r;
9399 }
9400
9401 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
9402 {
9403         int r;
9404
9405         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
9406         r = kvm_emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
9407         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
9408         return r;
9409 }
9410
9411 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
9412 {
9413         BUG_ON(!vcpu->arch.pio.count);
9414
9415         return complete_emulated_io(vcpu);
9416 }
9417
9418 /*
9419  * Implements the following, as a state machine:
9420  *
9421  * read:
9422  *   for each fragment
9423  *     for each mmio piece in the fragment
9424  *       write gpa, len
9425  *       exit
9426  *       copy data
9427  *   execute insn
9428  *
9429  * write:
9430  *   for each fragment
9431  *     for each mmio piece in the fragment
9432  *       write gpa, len
9433  *       copy data
9434  *       exit
9435  */
9436 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
9437 {
9438         struct kvm_run *run = vcpu->run;
9439         struct kvm_mmio_fragment *frag;
9440         unsigned len;
9441
9442         BUG_ON(!vcpu->mmio_needed);
9443
9444         /* Complete previous fragment */
9445         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
9446         len = min(8u, frag->len);
9447         if (!vcpu->mmio_is_write)
9448                 memcpy(frag->data, run->mmio.data, len);
9449
9450         if (frag->len <= 8) {
9451                 /* Switch to the next fragment. */
9452                 frag++;
9453                 vcpu->mmio_cur_fragment++;
9454         } else {
9455                 /* Go forward to the next mmio piece. */
9456                 frag->data += len;
9457                 frag->gpa += len;
9458                 frag->len -= len;
9459         }
9460
9461         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
9462                 vcpu->mmio_needed = 0;
9463
9464                 /* FIXME: return into emulator if single-stepping.  */
9465                 if (vcpu->mmio_is_write)
9466                         return 1;
9467                 vcpu->mmio_read_completed = 1;
9468                 return complete_emulated_io(vcpu);
9469         }
9470
9471         run->exit_reason = KVM_EXIT_MMIO;
9472         run->mmio.phys_addr = frag->gpa;
9473         if (vcpu->mmio_is_write)
9474                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
9475         run->mmio.len = min(8u, frag->len);
9476         run->mmio.is_write = vcpu->mmio_is_write;
9477         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
9478         return 0;
9479 }
9480
9481 static void kvm_save_current_fpu(struct fpu *fpu)
9482 {
9483         /*
9484          * If the target FPU state is not resident in the CPU registers, just
9485          * memcpy() from current, else save CPU state directly to the target.
9486          */
9487         if (test_thread_flag(TIF_NEED_FPU_LOAD))
9488                 memcpy(&fpu->state, &current->thread.fpu.state,
9489                        fpu_kernel_xstate_size);
9490         else
9491                 copy_fpregs_to_fpstate(fpu);
9492 }
9493
9494 /* Swap (qemu) user FPU context for the guest FPU context. */
9495 static void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
9496 {
9497         fpregs_lock();
9498
9499         kvm_save_current_fpu(vcpu->arch.user_fpu);
9500
9501         /*
9502          * Guests with protected state can't have it set by the hypervisor,
9503          * so skip trying to set it.
9504          */
9505         if (vcpu->arch.guest_fpu)
9506                 /* PKRU is separately restored in kvm_x86_ops.run. */
9507                 __copy_kernel_to_fpregs(&vcpu->arch.guest_fpu->state,
9508                                         ~XFEATURE_MASK_PKRU);
9509
9510         fpregs_mark_activate();
9511         fpregs_unlock();
9512
9513         trace_kvm_fpu(1);
9514 }
9515
9516 /* When vcpu_run ends, restore user space FPU context. */
9517 static void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
9518 {
9519         fpregs_lock();
9520
9521         /*
9522          * Guests with protected state can't have it read by the hypervisor,
9523          * so skip trying to save it.
9524          */
9525         if (vcpu->arch.guest_fpu)
9526                 kvm_save_current_fpu(vcpu->arch.guest_fpu);
9527
9528         copy_kernel_to_fpregs(&vcpu->arch.user_fpu->state);
9529
9530         fpregs_mark_activate();
9531         fpregs_unlock();
9532
9533         ++vcpu->stat.fpu_reload;
9534         trace_kvm_fpu(0);
9535 }
9536
9537 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu)
9538 {
9539         struct kvm_run *kvm_run = vcpu->run;
9540         int r;
9541
9542         vcpu_load(vcpu);
9543         kvm_sigset_activate(vcpu);
9544         kvm_run->flags = 0;
9545         kvm_load_guest_fpu(vcpu);
9546
9547         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
9548                 if (kvm_run->immediate_exit) {
9549                         r = -EINTR;
9550                         goto out;
9551                 }
9552                 kvm_vcpu_block(vcpu);
9553                 kvm_apic_accept_events(vcpu);
9554                 kvm_clear_request(KVM_REQ_UNHALT, vcpu);
9555                 r = -EAGAIN;
9556                 if (signal_pending(current)) {
9557                         r = -EINTR;
9558                         kvm_run->exit_reason = KVM_EXIT_INTR;
9559                         ++vcpu->stat.signal_exits;
9560                 }
9561                 goto out;
9562         }
9563
9564         if (kvm_run->kvm_valid_regs & ~KVM_SYNC_X86_VALID_FIELDS) {
9565                 r = -EINVAL;
9566                 goto out;
9567         }
9568
9569         if (kvm_run->kvm_dirty_regs) {
9570                 r = sync_regs(vcpu);
9571                 if (r != 0)
9572                         goto out;
9573         }
9574
9575         /* re-sync apic's tpr */
9576         if (!lapic_in_kernel(vcpu)) {
9577                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
9578                         r = -EINVAL;
9579                         goto out;
9580                 }
9581         }
9582
9583         if (unlikely(vcpu->arch.complete_userspace_io)) {
9584                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
9585                 vcpu->arch.complete_userspace_io = NULL;
9586                 r = cui(vcpu);
9587                 if (r <= 0)
9588                         goto out;
9589         } else
9590                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
9591
9592         if (kvm_run->immediate_exit)
9593                 r = -EINTR;
9594         else
9595                 r = vcpu_run(vcpu);
9596
9597 out:
9598         kvm_put_guest_fpu(vcpu);
9599         if (kvm_run->kvm_valid_regs)
9600                 store_regs(vcpu);
9601         post_kvm_run_save(vcpu);
9602         kvm_sigset_deactivate(vcpu);
9603
9604         vcpu_put(vcpu);
9605         return r;
9606 }
9607
9608 static void __get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
9609 {
9610         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
9611                 /*
9612                  * We are here if userspace calls get_regs() in the middle of
9613                  * instruction emulation. Registers state needs to be copied
9614                  * back from emulation context to vcpu. Userspace shouldn't do
9615                  * that usually, but some bad designed PV devices (vmware
9616                  * backdoor interface) need this to work
9617                  */
9618                 emulator_writeback_register_cache(vcpu->arch.emulate_ctxt);
9619                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
9620         }
9621         regs->rax = kvm_rax_read(vcpu);
9622         regs->rbx = kvm_rbx_read(vcpu);
9623         regs->rcx = kvm_rcx_read(vcpu);
9624         regs->rdx = kvm_rdx_read(vcpu);
9625         regs->rsi = kvm_rsi_read(vcpu);
9626         regs->rdi = kvm_rdi_read(vcpu);
9627         regs->rsp = kvm_rsp_read(vcpu);
9628         regs->rbp = kvm_rbp_read(vcpu);
9629 #ifdef CONFIG_X86_64
9630         regs->r8 = kvm_r8_read(vcpu);
9631         regs->r9 = kvm_r9_read(vcpu);
9632         regs->r10 = kvm_r10_read(vcpu);
9633         regs->r11 = kvm_r11_read(vcpu);
9634         regs->r12 = kvm_r12_read(vcpu);
9635         regs->r13 = kvm_r13_read(vcpu);
9636         regs->r14 = kvm_r14_read(vcpu);
9637         regs->r15 = kvm_r15_read(vcpu);
9638 #endif
9639
9640         regs->rip = kvm_rip_read(vcpu);
9641         regs->rflags = kvm_get_rflags(vcpu);
9642 }
9643
9644 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
9645 {
9646         vcpu_load(vcpu);
9647         __get_regs(vcpu, regs);
9648         vcpu_put(vcpu);
9649         return 0;
9650 }
9651
9652 static void __set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
9653 {
9654         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
9655         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
9656
9657         kvm_rax_write(vcpu, regs->rax);
9658         kvm_rbx_write(vcpu, regs->rbx);
9659         kvm_rcx_write(vcpu, regs->rcx);
9660         kvm_rdx_write(vcpu, regs->rdx);
9661         kvm_rsi_write(vcpu, regs->rsi);
9662         kvm_rdi_write(vcpu, regs->rdi);
9663         kvm_rsp_write(vcpu, regs->rsp);
9664         kvm_rbp_write(vcpu, regs->rbp);
9665 #ifdef CONFIG_X86_64
9666         kvm_r8_write(vcpu, regs->r8);
9667         kvm_r9_write(vcpu, regs->r9);
9668         kvm_r10_write(vcpu, regs->r10);
9669         kvm_r11_write(vcpu, regs->r11);
9670         kvm_r12_write(vcpu, regs->r12);
9671         kvm_r13_write(vcpu, regs->r13);
9672         kvm_r14_write(vcpu, regs->r14);
9673         kvm_r15_write(vcpu, regs->r15);
9674 #endif
9675
9676         kvm_rip_write(vcpu, regs->rip);
9677         kvm_set_rflags(vcpu, regs->rflags | X86_EFLAGS_FIXED);
9678
9679         vcpu->arch.exception.pending = false;
9680
9681         kvm_make_request(KVM_REQ_EVENT, vcpu);
9682 }
9683
9684 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
9685 {
9686         vcpu_load(vcpu);
9687         __set_regs(vcpu, regs);
9688         vcpu_put(vcpu);
9689         return 0;
9690 }
9691
9692 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
9693 {
9694         struct kvm_segment cs;
9695
9696         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
9697         *db = cs.db;
9698         *l = cs.l;
9699 }
9700 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
9701
9702 static void __get_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
9703 {
9704         struct desc_ptr dt;
9705
9706         if (vcpu->arch.guest_state_protected)
9707                 goto skip_protected_regs;
9708
9709         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
9710         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
9711         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
9712         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
9713         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
9714         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
9715
9716         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
9717         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
9718
9719         static_call(kvm_x86_get_idt)(vcpu, &dt);
9720         sregs->idt.limit = dt.size;
9721         sregs->idt.base = dt.address;
9722         static_call(kvm_x86_get_gdt)(vcpu, &dt);
9723         sregs->gdt.limit = dt.size;
9724         sregs->gdt.base = dt.address;
9725
9726         sregs->cr2 = vcpu->arch.cr2;
9727         sregs->cr3 = kvm_read_cr3(vcpu);
9728
9729 skip_protected_regs:
9730         sregs->cr0 = kvm_read_cr0(vcpu);
9731         sregs->cr4 = kvm_read_cr4(vcpu);
9732         sregs->cr8 = kvm_get_cr8(vcpu);
9733         sregs->efer = vcpu->arch.efer;
9734         sregs->apic_base = kvm_get_apic_base(vcpu);
9735
9736         memset(sregs->interrupt_bitmap, 0, sizeof(sregs->interrupt_bitmap));
9737
9738         if (vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft)
9739                 set_bit(vcpu->arch.interrupt.nr,
9740                         (unsigned long *)sregs->interrupt_bitmap);
9741 }
9742
9743 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
9744                                   struct kvm_sregs *sregs)
9745 {
9746         vcpu_load(vcpu);
9747         __get_sregs(vcpu, sregs);
9748         vcpu_put(vcpu);
9749         return 0;
9750 }
9751
9752 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
9753                                     struct kvm_mp_state *mp_state)
9754 {
9755         vcpu_load(vcpu);
9756         if (kvm_mpx_supported())
9757                 kvm_load_guest_fpu(vcpu);
9758
9759         kvm_apic_accept_events(vcpu);
9760         if ((vcpu->arch.mp_state == KVM_MP_STATE_HALTED ||
9761              vcpu->arch.mp_state == KVM_MP_STATE_AP_RESET_HOLD) &&
9762             vcpu->arch.pv.pv_unhalted)
9763                 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
9764         else
9765                 mp_state->mp_state = vcpu->arch.mp_state;
9766
9767         if (kvm_mpx_supported())
9768                 kvm_put_guest_fpu(vcpu);
9769         vcpu_put(vcpu);
9770         return 0;
9771 }
9772
9773 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
9774                                     struct kvm_mp_state *mp_state)
9775 {
9776         int ret = -EINVAL;
9777
9778         vcpu_load(vcpu);
9779
9780         if (!lapic_in_kernel(vcpu) &&
9781             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
9782                 goto out;
9783
9784         /*
9785          * KVM_MP_STATE_INIT_RECEIVED means the processor is in
9786          * INIT state; latched init should be reported using
9787          * KVM_SET_VCPU_EVENTS, so reject it here.
9788          */
9789         if ((kvm_vcpu_latch_init(vcpu) || vcpu->arch.smi_pending) &&
9790             (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED ||
9791              mp_state->mp_state == KVM_MP_STATE_INIT_RECEIVED))
9792                 goto out;
9793
9794         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
9795                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
9796                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
9797         } else
9798                 vcpu->arch.mp_state = mp_state->mp_state;
9799         kvm_make_request(KVM_REQ_EVENT, vcpu);
9800
9801         ret = 0;
9802 out:
9803         vcpu_put(vcpu);
9804         return ret;
9805 }
9806
9807 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
9808                     int reason, bool has_error_code, u32 error_code)
9809 {
9810         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
9811         int ret;
9812
9813         init_emulate_ctxt(vcpu);
9814
9815         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
9816                                    has_error_code, error_code);
9817         if (ret) {
9818                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
9819                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
9820                 vcpu->run->internal.ndata = 0;
9821                 return 0;
9822         }
9823
9824         kvm_rip_write(vcpu, ctxt->eip);
9825         kvm_set_rflags(vcpu, ctxt->eflags);
9826         return 1;
9827 }
9828 EXPORT_SYMBOL_GPL(kvm_task_switch);
9829
9830 static bool kvm_is_valid_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
9831 {
9832         if ((sregs->efer & EFER_LME) && (sregs->cr0 & X86_CR0_PG)) {
9833                 /*
9834                  * When EFER.LME and CR0.PG are set, the processor is in
9835                  * 64-bit mode (though maybe in a 32-bit code segment).
9836                  * CR4.PAE and EFER.LMA must be set.
9837                  */
9838                 if (!(sregs->cr4 & X86_CR4_PAE) || !(sregs->efer & EFER_LMA))
9839                         return false;
9840                 if (kvm_vcpu_is_illegal_gpa(vcpu, sregs->cr3))
9841                         return false;
9842         } else {
9843                 /*
9844                  * Not in 64-bit mode: EFER.LMA is clear and the code
9845                  * segment cannot be 64-bit.
9846                  */
9847                 if (sregs->efer & EFER_LMA || sregs->cs.l)
9848                         return false;
9849         }
9850
9851         return kvm_is_valid_cr4(vcpu, sregs->cr4);
9852 }
9853
9854 static int __set_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
9855 {
9856         struct msr_data apic_base_msr;
9857         int mmu_reset_needed = 0;
9858         int pending_vec, max_bits, idx;
9859         struct desc_ptr dt;
9860         int ret = -EINVAL;
9861
9862         if (!kvm_is_valid_sregs(vcpu, sregs))
9863                 goto out;
9864
9865         apic_base_msr.data = sregs->apic_base;
9866         apic_base_msr.host_initiated = true;
9867         if (kvm_set_apic_base(vcpu, &apic_base_msr))
9868                 goto out;
9869
9870         if (vcpu->arch.guest_state_protected)
9871                 goto skip_protected_regs;
9872
9873         dt.size = sregs->idt.limit;
9874         dt.address = sregs->idt.base;
9875         static_call(kvm_x86_set_idt)(vcpu, &dt);
9876         dt.size = sregs->gdt.limit;
9877         dt.address = sregs->gdt.base;
9878         static_call(kvm_x86_set_gdt)(vcpu, &dt);
9879
9880         vcpu->arch.cr2 = sregs->cr2;
9881         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
9882         vcpu->arch.cr3 = sregs->cr3;
9883         kvm_register_mark_available(vcpu, VCPU_EXREG_CR3);
9884
9885         kvm_set_cr8(vcpu, sregs->cr8);
9886
9887         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
9888         static_call(kvm_x86_set_efer)(vcpu, sregs->efer);
9889
9890         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
9891         static_call(kvm_x86_set_cr0)(vcpu, sregs->cr0);
9892         vcpu->arch.cr0 = sregs->cr0;
9893
9894         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
9895         static_call(kvm_x86_set_cr4)(vcpu, sregs->cr4);
9896
9897         idx = srcu_read_lock(&vcpu->kvm->srcu);
9898         if (is_pae_paging(vcpu)) {
9899                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
9900                 mmu_reset_needed = 1;
9901         }
9902         srcu_read_unlock(&vcpu->kvm->srcu, idx);
9903
9904         if (mmu_reset_needed)
9905                 kvm_mmu_reset_context(vcpu);
9906
9907         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
9908         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
9909         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
9910         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
9911         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
9912         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
9913
9914         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
9915         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
9916
9917         update_cr8_intercept(vcpu);
9918
9919         /* Older userspace won't unhalt the vcpu on reset. */
9920         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
9921             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
9922             !is_protmode(vcpu))
9923                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
9924
9925 skip_protected_regs:
9926         max_bits = KVM_NR_INTERRUPTS;
9927         pending_vec = find_first_bit(
9928                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
9929         if (pending_vec < max_bits) {
9930                 kvm_queue_interrupt(vcpu, pending_vec, false);
9931                 pr_debug("Set back pending irq %d\n", pending_vec);
9932         }
9933
9934         kvm_make_request(KVM_REQ_EVENT, vcpu);
9935
9936         ret = 0;
9937 out:
9938         return ret;
9939 }
9940
9941 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
9942                                   struct kvm_sregs *sregs)
9943 {
9944         int ret;
9945
9946         vcpu_load(vcpu);
9947         ret = __set_sregs(vcpu, sregs);
9948         vcpu_put(vcpu);
9949         return ret;
9950 }
9951
9952 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
9953                                         struct kvm_guest_debug *dbg)
9954 {
9955         unsigned long rflags;
9956         int i, r;
9957
9958         if (vcpu->arch.guest_state_protected)
9959                 return -EINVAL;
9960
9961         vcpu_load(vcpu);
9962
9963         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
9964                 r = -EBUSY;
9965                 if (vcpu->arch.exception.pending)
9966                         goto out;
9967                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
9968                         kvm_queue_exception(vcpu, DB_VECTOR);
9969                 else
9970                         kvm_queue_exception(vcpu, BP_VECTOR);
9971         }
9972
9973         /*
9974          * Read rflags as long as potentially injected trace flags are still
9975          * filtered out.
9976          */
9977         rflags = kvm_get_rflags(vcpu);
9978
9979         vcpu->guest_debug = dbg->control;
9980         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
9981                 vcpu->guest_debug = 0;
9982
9983         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
9984                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
9985                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
9986                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
9987         } else {
9988                 for (i = 0; i < KVM_NR_DB_REGS; i++)
9989                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
9990         }
9991         kvm_update_dr7(vcpu);
9992
9993         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
9994                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
9995                         get_segment_base(vcpu, VCPU_SREG_CS);
9996
9997         /*
9998          * Trigger an rflags update that will inject or remove the trace
9999          * flags.
10000          */
10001         kvm_set_rflags(vcpu, rflags);
10002
10003         static_call(kvm_x86_update_exception_bitmap)(vcpu);
10004
10005         r = 0;
10006
10007 out:
10008         vcpu_put(vcpu);
10009         return r;
10010 }
10011
10012 /*
10013  * Translate a guest virtual address to a guest physical address.
10014  */
10015 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
10016                                     struct kvm_translation *tr)
10017 {
10018         unsigned long vaddr = tr->linear_address;
10019         gpa_t gpa;
10020         int idx;
10021
10022         vcpu_load(vcpu);
10023
10024         idx = srcu_read_lock(&vcpu->kvm->srcu);
10025         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
10026         srcu_read_unlock(&vcpu->kvm->srcu, idx);
10027         tr->physical_address = gpa;
10028         tr->valid = gpa != UNMAPPED_GVA;
10029         tr->writeable = 1;
10030         tr->usermode = 0;
10031
10032         vcpu_put(vcpu);
10033         return 0;
10034 }
10035
10036 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
10037 {
10038         struct fxregs_state *fxsave;
10039
10040         if (!vcpu->arch.guest_fpu)
10041                 return 0;
10042
10043         vcpu_load(vcpu);
10044
10045         fxsave = &vcpu->arch.guest_fpu->state.fxsave;
10046         memcpy(fpu->fpr, fxsave->st_space, 128);
10047         fpu->fcw = fxsave->cwd;
10048         fpu->fsw = fxsave->swd;
10049         fpu->ftwx = fxsave->twd;
10050         fpu->last_opcode = fxsave->fop;
10051         fpu->last_ip = fxsave->rip;
10052         fpu->last_dp = fxsave->rdp;
10053         memcpy(fpu->xmm, fxsave->xmm_space, sizeof(fxsave->xmm_space));
10054
10055         vcpu_put(vcpu);
10056         return 0;
10057 }
10058
10059 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
10060 {
10061         struct fxregs_state *fxsave;
10062
10063         if (!vcpu->arch.guest_fpu)
10064                 return 0;
10065
10066         vcpu_load(vcpu);
10067
10068         fxsave = &vcpu->arch.guest_fpu->state.fxsave;
10069
10070         memcpy(fxsave->st_space, fpu->fpr, 128);
10071         fxsave->cwd = fpu->fcw;
10072         fxsave->swd = fpu->fsw;
10073         fxsave->twd = fpu->ftwx;
10074         fxsave->fop = fpu->last_opcode;
10075         fxsave->rip = fpu->last_ip;
10076         fxsave->rdp = fpu->last_dp;
10077         memcpy(fxsave->xmm_space, fpu->xmm, sizeof(fxsave->xmm_space));
10078
10079         vcpu_put(vcpu);
10080         return 0;
10081 }
10082
10083 static void store_regs(struct kvm_vcpu *vcpu)
10084 {
10085         BUILD_BUG_ON(sizeof(struct kvm_sync_regs) > SYNC_REGS_SIZE_BYTES);
10086
10087         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_REGS)
10088                 __get_regs(vcpu, &vcpu->run->s.regs.regs);
10089
10090         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_SREGS)
10091                 __get_sregs(vcpu, &vcpu->run->s.regs.sregs);
10092
10093         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_EVENTS)
10094                 kvm_vcpu_ioctl_x86_get_vcpu_events(
10095                                 vcpu, &vcpu->run->s.regs.events);
10096 }
10097
10098 static int sync_regs(struct kvm_vcpu *vcpu)
10099 {
10100         if (vcpu->run->kvm_dirty_regs & ~KVM_SYNC_X86_VALID_FIELDS)
10101                 return -EINVAL;
10102
10103         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_REGS) {
10104                 __set_regs(vcpu, &vcpu->run->s.regs.regs);
10105                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_REGS;
10106         }
10107         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_SREGS) {
10108                 if (__set_sregs(vcpu, &vcpu->run->s.regs.sregs))
10109                         return -EINVAL;
10110                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_SREGS;
10111         }
10112         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_EVENTS) {
10113                 if (kvm_vcpu_ioctl_x86_set_vcpu_events(
10114                                 vcpu, &vcpu->run->s.regs.events))
10115                         return -EINVAL;
10116                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_EVENTS;
10117         }
10118
10119         return 0;
10120 }
10121
10122 static void fx_init(struct kvm_vcpu *vcpu)
10123 {
10124         if (!vcpu->arch.guest_fpu)
10125                 return;
10126
10127         fpstate_init(&vcpu->arch.guest_fpu->state);
10128         if (boot_cpu_has(X86_FEATURE_XSAVES))
10129                 vcpu->arch.guest_fpu->state.xsave.header.xcomp_bv =
10130                         host_xcr0 | XSTATE_COMPACTION_ENABLED;
10131
10132         /*
10133          * Ensure guest xcr0 is valid for loading
10134          */
10135         vcpu->arch.xcr0 = XFEATURE_MASK_FP;
10136
10137         vcpu->arch.cr0 |= X86_CR0_ET;
10138 }
10139
10140 void kvm_free_guest_fpu(struct kvm_vcpu *vcpu)
10141 {
10142         if (vcpu->arch.guest_fpu) {
10143                 kmem_cache_free(x86_fpu_cache, vcpu->arch.guest_fpu);
10144                 vcpu->arch.guest_fpu = NULL;
10145         }
10146 }
10147 EXPORT_SYMBOL_GPL(kvm_free_guest_fpu);
10148
10149 int kvm_arch_vcpu_precreate(struct kvm *kvm, unsigned int id)
10150 {
10151         if (kvm_check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
10152                 pr_warn_once("kvm: SMP vm created on host with unstable TSC; "
10153                              "guest TSC will not be reliable\n");
10154
10155         return 0;
10156 }
10157
10158 int kvm_arch_vcpu_create(struct kvm_vcpu *vcpu)
10159 {
10160         struct page *page;
10161         int r;
10162
10163         if (!irqchip_in_kernel(vcpu->kvm) || kvm_vcpu_is_reset_bsp(vcpu))
10164                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
10165         else
10166                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
10167
10168         kvm_set_tsc_khz(vcpu, max_tsc_khz);
10169
10170         r = kvm_mmu_create(vcpu);
10171         if (r < 0)
10172                 return r;
10173
10174         if (irqchip_in_kernel(vcpu->kvm)) {
10175                 r = kvm_create_lapic(vcpu, lapic_timer_advance_ns);
10176                 if (r < 0)
10177                         goto fail_mmu_destroy;
10178                 if (kvm_apicv_activated(vcpu->kvm))
10179                         vcpu->arch.apicv_active = true;
10180         } else
10181                 static_branch_inc(&kvm_has_noapic_vcpu);
10182
10183         r = -ENOMEM;
10184
10185         page = alloc_page(GFP_KERNEL_ACCOUNT | __GFP_ZERO);
10186         if (!page)
10187                 goto fail_free_lapic;
10188         vcpu->arch.pio_data = page_address(page);
10189
10190         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
10191                                        GFP_KERNEL_ACCOUNT);
10192         if (!vcpu->arch.mce_banks)
10193                 goto fail_free_pio_data;
10194         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
10195
10196         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask,
10197                                 GFP_KERNEL_ACCOUNT))
10198                 goto fail_free_mce_banks;
10199
10200         if (!alloc_emulate_ctxt(vcpu))
10201                 goto free_wbinvd_dirty_mask;
10202
10203         vcpu->arch.user_fpu = kmem_cache_zalloc(x86_fpu_cache,
10204                                                 GFP_KERNEL_ACCOUNT);
10205         if (!vcpu->arch.user_fpu) {
10206                 pr_err("kvm: failed to allocate userspace's fpu\n");
10207                 goto free_emulate_ctxt;
10208         }
10209
10210         vcpu->arch.guest_fpu = kmem_cache_zalloc(x86_fpu_cache,
10211                                                  GFP_KERNEL_ACCOUNT);
10212         if (!vcpu->arch.guest_fpu) {
10213                 pr_err("kvm: failed to allocate vcpu's fpu\n");
10214                 goto free_user_fpu;
10215         }
10216         fx_init(vcpu);
10217
10218         vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
10219         vcpu->arch.reserved_gpa_bits = kvm_vcpu_reserved_gpa_bits_raw(vcpu);
10220
10221         vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
10222
10223         kvm_async_pf_hash_reset(vcpu);
10224         kvm_pmu_init(vcpu);
10225
10226         vcpu->arch.pending_external_vector = -1;
10227         vcpu->arch.preempted_in_kernel = false;
10228
10229         r = static_call(kvm_x86_vcpu_create)(vcpu);
10230         if (r)
10231                 goto free_guest_fpu;
10232
10233         vcpu->arch.arch_capabilities = kvm_get_arch_capabilities();
10234         vcpu->arch.msr_platform_info = MSR_PLATFORM_INFO_CPUID_FAULT;
10235         kvm_vcpu_mtrr_init(vcpu);
10236         vcpu_load(vcpu);
10237         kvm_vcpu_reset(vcpu, false);
10238         kvm_init_mmu(vcpu, false);
10239         vcpu_put(vcpu);
10240         return 0;
10241
10242 free_guest_fpu:
10243         kvm_free_guest_fpu(vcpu);
10244 free_user_fpu:
10245         kmem_cache_free(x86_fpu_cache, vcpu->arch.user_fpu);
10246 free_emulate_ctxt:
10247         kmem_cache_free(x86_emulator_cache, vcpu->arch.emulate_ctxt);
10248 free_wbinvd_dirty_mask:
10249         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
10250 fail_free_mce_banks:
10251         kfree(vcpu->arch.mce_banks);
10252 fail_free_pio_data:
10253         free_page((unsigned long)vcpu->arch.pio_data);
10254 fail_free_lapic:
10255         kvm_free_lapic(vcpu);
10256 fail_mmu_destroy:
10257         kvm_mmu_destroy(vcpu);
10258         return r;
10259 }
10260
10261 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
10262 {
10263         struct kvm *kvm = vcpu->kvm;
10264
10265         if (mutex_lock_killable(&vcpu->mutex))
10266                 return;
10267         vcpu_load(vcpu);
10268         kvm_synchronize_tsc(vcpu, 0);
10269         vcpu_put(vcpu);
10270
10271         /* poll control enabled by default */
10272         vcpu->arch.msr_kvm_poll_control = 1;
10273
10274         mutex_unlock(&vcpu->mutex);
10275
10276         if (kvmclock_periodic_sync && vcpu->vcpu_idx == 0)
10277                 schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
10278                                                 KVMCLOCK_SYNC_PERIOD);
10279 }
10280
10281 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
10282 {
10283         struct gfn_to_pfn_cache *cache = &vcpu->arch.st.cache;
10284         int idx;
10285
10286         kvm_release_pfn(cache->pfn, cache->dirty, cache);
10287
10288         kvmclock_reset(vcpu);
10289
10290         static_call(kvm_x86_vcpu_free)(vcpu);
10291
10292         kmem_cache_free(x86_emulator_cache, vcpu->arch.emulate_ctxt);
10293         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
10294         kmem_cache_free(x86_fpu_cache, vcpu->arch.user_fpu);
10295         kvm_free_guest_fpu(vcpu);
10296
10297         kvm_hv_vcpu_uninit(vcpu);
10298         kvm_pmu_destroy(vcpu);
10299         kfree(vcpu->arch.mce_banks);
10300         kvm_free_lapic(vcpu);
10301         idx = srcu_read_lock(&vcpu->kvm->srcu);
10302         kvm_mmu_destroy(vcpu);
10303         srcu_read_unlock(&vcpu->kvm->srcu, idx);
10304         free_page((unsigned long)vcpu->arch.pio_data);
10305         kvfree(vcpu->arch.cpuid_entries);
10306         if (!lapic_in_kernel(vcpu))
10307                 static_branch_dec(&kvm_has_noapic_vcpu);
10308 }
10309
10310 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
10311 {
10312         kvm_lapic_reset(vcpu, init_event);
10313
10314         vcpu->arch.hflags = 0;
10315
10316         vcpu->arch.smi_pending = 0;
10317         vcpu->arch.smi_count = 0;
10318         atomic_set(&vcpu->arch.nmi_queued, 0);
10319         vcpu->arch.nmi_pending = 0;
10320         vcpu->arch.nmi_injected = false;
10321         kvm_clear_interrupt_queue(vcpu);
10322         kvm_clear_exception_queue(vcpu);
10323
10324         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
10325         kvm_update_dr0123(vcpu);
10326         vcpu->arch.dr6 = DR6_ACTIVE_LOW;
10327         vcpu->arch.dr7 = DR7_FIXED_1;
10328         kvm_update_dr7(vcpu);
10329
10330         vcpu->arch.cr2 = 0;
10331
10332         kvm_make_request(KVM_REQ_EVENT, vcpu);
10333         vcpu->arch.apf.msr_en_val = 0;
10334         vcpu->arch.apf.msr_int_val = 0;
10335         vcpu->arch.st.msr_val = 0;
10336
10337         kvmclock_reset(vcpu);
10338
10339         kvm_clear_async_pf_completion_queue(vcpu);
10340         kvm_async_pf_hash_reset(vcpu);
10341         vcpu->arch.apf.halted = false;
10342
10343         if (vcpu->arch.guest_fpu && kvm_mpx_supported()) {
10344                 void *mpx_state_buffer;
10345
10346                 /*
10347                  * To avoid have the INIT path from kvm_apic_has_events() that be
10348                  * called with loaded FPU and does not let userspace fix the state.
10349                  */
10350                 if (init_event)
10351                         kvm_put_guest_fpu(vcpu);
10352                 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu->state.xsave,
10353                                         XFEATURE_BNDREGS);
10354                 if (mpx_state_buffer)
10355                         memset(mpx_state_buffer, 0, sizeof(struct mpx_bndreg_state));
10356                 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu->state.xsave,
10357                                         XFEATURE_BNDCSR);
10358                 if (mpx_state_buffer)
10359                         memset(mpx_state_buffer, 0, sizeof(struct mpx_bndcsr));
10360                 if (init_event)
10361                         kvm_load_guest_fpu(vcpu);
10362         }
10363
10364         if (!init_event) {
10365                 kvm_pmu_reset(vcpu);
10366                 vcpu->arch.smbase = 0x30000;
10367
10368                 vcpu->arch.msr_misc_features_enables = 0;
10369
10370                 vcpu->arch.xcr0 = XFEATURE_MASK_FP;
10371         }
10372
10373         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
10374         vcpu->arch.regs_avail = ~0;
10375         vcpu->arch.regs_dirty = ~0;
10376
10377         vcpu->arch.ia32_xss = 0;
10378
10379         static_call(kvm_x86_vcpu_reset)(vcpu, init_event);
10380 }
10381
10382 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
10383 {
10384         struct kvm_segment cs;
10385
10386         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
10387         cs.selector = vector << 8;
10388         cs.base = vector << 12;
10389         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
10390         kvm_rip_write(vcpu, 0);
10391 }
10392 EXPORT_SYMBOL_GPL(kvm_vcpu_deliver_sipi_vector);
10393
10394 int kvm_arch_hardware_enable(void)
10395 {
10396         struct kvm *kvm;
10397         struct kvm_vcpu *vcpu;
10398         int i;
10399         int ret;
10400         u64 local_tsc;
10401         u64 max_tsc = 0;
10402         bool stable, backwards_tsc = false;
10403
10404         kvm_user_return_msr_cpu_online();
10405         ret = static_call(kvm_x86_hardware_enable)();
10406         if (ret != 0)
10407                 return ret;
10408
10409         local_tsc = rdtsc();
10410         stable = !kvm_check_tsc_unstable();
10411         list_for_each_entry(kvm, &vm_list, vm_list) {
10412                 kvm_for_each_vcpu(i, vcpu, kvm) {
10413                         if (!stable && vcpu->cpu == smp_processor_id())
10414                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
10415                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
10416                                 backwards_tsc = true;
10417                                 if (vcpu->arch.last_host_tsc > max_tsc)
10418                                         max_tsc = vcpu->arch.last_host_tsc;
10419                         }
10420                 }
10421         }
10422
10423         /*
10424          * Sometimes, even reliable TSCs go backwards.  This happens on
10425          * platforms that reset TSC during suspend or hibernate actions, but
10426          * maintain synchronization.  We must compensate.  Fortunately, we can
10427          * detect that condition here, which happens early in CPU bringup,
10428          * before any KVM threads can be running.  Unfortunately, we can't
10429          * bring the TSCs fully up to date with real time, as we aren't yet far
10430          * enough into CPU bringup that we know how much real time has actually
10431          * elapsed; our helper function, ktime_get_boottime_ns() will be using boot
10432          * variables that haven't been updated yet.
10433          *
10434          * So we simply find the maximum observed TSC above, then record the
10435          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
10436          * the adjustment will be applied.  Note that we accumulate
10437          * adjustments, in case multiple suspend cycles happen before some VCPU
10438          * gets a chance to run again.  In the event that no KVM threads get a
10439          * chance to run, we will miss the entire elapsed period, as we'll have
10440          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
10441          * loose cycle time.  This isn't too big a deal, since the loss will be
10442          * uniform across all VCPUs (not to mention the scenario is extremely
10443          * unlikely). It is possible that a second hibernate recovery happens
10444          * much faster than a first, causing the observed TSC here to be
10445          * smaller; this would require additional padding adjustment, which is
10446          * why we set last_host_tsc to the local tsc observed here.
10447          *
10448          * N.B. - this code below runs only on platforms with reliable TSC,
10449          * as that is the only way backwards_tsc is set above.  Also note
10450          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
10451          * have the same delta_cyc adjustment applied if backwards_tsc
10452          * is detected.  Note further, this adjustment is only done once,
10453          * as we reset last_host_tsc on all VCPUs to stop this from being
10454          * called multiple times (one for each physical CPU bringup).
10455          *
10456          * Platforms with unreliable TSCs don't have to deal with this, they
10457          * will be compensated by the logic in vcpu_load, which sets the TSC to
10458          * catchup mode.  This will catchup all VCPUs to real time, but cannot
10459          * guarantee that they stay in perfect synchronization.
10460          */
10461         if (backwards_tsc) {
10462                 u64 delta_cyc = max_tsc - local_tsc;
10463                 list_for_each_entry(kvm, &vm_list, vm_list) {
10464                         kvm->arch.backwards_tsc_observed = true;
10465                         kvm_for_each_vcpu(i, vcpu, kvm) {
10466                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
10467                                 vcpu->arch.last_host_tsc = local_tsc;
10468                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
10469                         }
10470
10471                         /*
10472                          * We have to disable TSC offset matching.. if you were
10473                          * booting a VM while issuing an S4 host suspend....
10474                          * you may have some problem.  Solving this issue is
10475                          * left as an exercise to the reader.
10476                          */
10477                         kvm->arch.last_tsc_nsec = 0;
10478                         kvm->arch.last_tsc_write = 0;
10479                 }
10480
10481         }
10482         return 0;
10483 }
10484
10485 void kvm_arch_hardware_disable(void)
10486 {
10487         static_call(kvm_x86_hardware_disable)();
10488         drop_user_return_notifiers();
10489 }
10490
10491 int kvm_arch_hardware_setup(void *opaque)
10492 {
10493         struct kvm_x86_init_ops *ops = opaque;
10494         int r;
10495
10496         rdmsrl_safe(MSR_EFER, &host_efer);
10497
10498         if (boot_cpu_has(X86_FEATURE_XSAVES))
10499                 rdmsrl(MSR_IA32_XSS, host_xss);
10500
10501         r = ops->hardware_setup();
10502         if (r != 0)
10503                 return r;
10504
10505         memcpy(&kvm_x86_ops, ops->runtime_ops, sizeof(kvm_x86_ops));
10506         kvm_ops_static_call_update();
10507
10508         if (!kvm_cpu_cap_has(X86_FEATURE_XSAVES))
10509                 supported_xss = 0;
10510
10511 #define __kvm_cpu_cap_has(UNUSED_, f) kvm_cpu_cap_has(f)
10512         cr4_reserved_bits = __cr4_reserved_bits(__kvm_cpu_cap_has, UNUSED_);
10513 #undef __kvm_cpu_cap_has
10514
10515         if (kvm_has_tsc_control) {
10516                 /*
10517                  * Make sure the user can only configure tsc_khz values that
10518                  * fit into a signed integer.
10519                  * A min value is not calculated because it will always
10520                  * be 1 on all machines.
10521                  */
10522                 u64 max = min(0x7fffffffULL,
10523                               __scale_tsc(kvm_max_tsc_scaling_ratio, tsc_khz));
10524                 kvm_max_guest_tsc_khz = max;
10525
10526                 kvm_default_tsc_scaling_ratio = 1ULL << kvm_tsc_scaling_ratio_frac_bits;
10527         }
10528
10529         kvm_init_msr_list();
10530         return 0;
10531 }
10532
10533 void kvm_arch_hardware_unsetup(void)
10534 {
10535         static_call(kvm_x86_hardware_unsetup)();
10536 }
10537
10538 int kvm_arch_check_processor_compat(void *opaque)
10539 {
10540         struct cpuinfo_x86 *c = &cpu_data(smp_processor_id());
10541         struct kvm_x86_init_ops *ops = opaque;
10542
10543         WARN_ON(!irqs_disabled());
10544
10545         if (__cr4_reserved_bits(cpu_has, c) !=
10546             __cr4_reserved_bits(cpu_has, &boot_cpu_data))
10547                 return -EIO;
10548
10549         return ops->check_processor_compatibility();
10550 }
10551
10552 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
10553 {
10554         return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
10555 }
10556 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp);
10557
10558 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
10559 {
10560         return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
10561 }
10562
10563 __read_mostly DEFINE_STATIC_KEY_FALSE(kvm_has_noapic_vcpu);
10564 EXPORT_SYMBOL_GPL(kvm_has_noapic_vcpu);
10565
10566 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
10567 {
10568         struct kvm_pmu *pmu = vcpu_to_pmu(vcpu);
10569
10570         vcpu->arch.l1tf_flush_l1d = true;
10571         if (pmu->version && unlikely(pmu->event_count)) {
10572                 pmu->need_cleanup = true;
10573                 kvm_make_request(KVM_REQ_PMU, vcpu);
10574         }
10575         static_call(kvm_x86_sched_in)(vcpu, cpu);
10576 }
10577
10578 void kvm_arch_free_vm(struct kvm *kvm)
10579 {
10580         kfree(to_kvm_hv(kvm)->hv_pa_pg);
10581         vfree(kvm);
10582 }
10583
10584
10585 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
10586 {
10587         if (type)
10588                 return -EINVAL;
10589
10590         INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
10591         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
10592         INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
10593         INIT_LIST_HEAD(&kvm->arch.lpage_disallowed_mmu_pages);
10594         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
10595         atomic_set(&kvm->arch.noncoherent_dma_count, 0);
10596
10597         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
10598         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
10599         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
10600         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
10601                 &kvm->arch.irq_sources_bitmap);
10602
10603         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
10604         mutex_init(&kvm->arch.apic_map_lock);
10605         spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
10606
10607         kvm->arch.kvmclock_offset = -get_kvmclock_base_ns();
10608         pvclock_update_vm_gtod_copy(kvm);
10609
10610         kvm->arch.guest_can_read_msr_platform_info = true;
10611
10612         INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
10613         INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
10614
10615         kvm_hv_init_vm(kvm);
10616         kvm_page_track_init(kvm);
10617         kvm_mmu_init_vm(kvm);
10618
10619         return static_call(kvm_x86_vm_init)(kvm);
10620 }
10621
10622 int kvm_arch_post_init_vm(struct kvm *kvm)
10623 {
10624         return kvm_mmu_post_init_vm(kvm);
10625 }
10626
10627 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
10628 {
10629         vcpu_load(vcpu);
10630         kvm_mmu_unload(vcpu);
10631         vcpu_put(vcpu);
10632 }
10633
10634 static void kvm_free_vcpus(struct kvm *kvm)
10635 {
10636         unsigned int i;
10637         struct kvm_vcpu *vcpu;
10638
10639         /*
10640          * Unpin any mmu pages first.
10641          */
10642         kvm_for_each_vcpu(i, vcpu, kvm) {
10643                 kvm_clear_async_pf_completion_queue(vcpu);
10644                 kvm_unload_vcpu_mmu(vcpu);
10645         }
10646         kvm_for_each_vcpu(i, vcpu, kvm)
10647                 kvm_vcpu_destroy(vcpu);
10648
10649         mutex_lock(&kvm->lock);
10650         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
10651                 kvm->vcpus[i] = NULL;
10652
10653         atomic_set(&kvm->online_vcpus, 0);
10654         mutex_unlock(&kvm->lock);
10655 }
10656
10657 void kvm_arch_sync_events(struct kvm *kvm)
10658 {
10659         cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
10660         cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
10661         kvm_free_pit(kvm);
10662 }
10663
10664 #define  ERR_PTR_USR(e)  ((void __user *)ERR_PTR(e))
10665
10666 /**
10667  * __x86_set_memory_region: Setup KVM internal memory slot
10668  *
10669  * @kvm: the kvm pointer to the VM.
10670  * @id: the slot ID to setup.
10671  * @gpa: the GPA to install the slot (unused when @size == 0).
10672  * @size: the size of the slot. Set to zero to uninstall a slot.
10673  *
10674  * This function helps to setup a KVM internal memory slot.  Specify
10675  * @size > 0 to install a new slot, while @size == 0 to uninstall a
10676  * slot.  The return code can be one of the following:
10677  *
10678  *   HVA:           on success (uninstall will return a bogus HVA)
10679  *   -errno:        on error
10680  *
10681  * The caller should always use IS_ERR() to check the return value
10682  * before use.  Note, the KVM internal memory slots are guaranteed to
10683  * remain valid and unchanged until the VM is destroyed, i.e., the
10684  * GPA->HVA translation will not change.  However, the HVA is a user
10685  * address, i.e. its accessibility is not guaranteed, and must be
10686  * accessed via __copy_{to,from}_user().
10687  */
10688 void __user * __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa,
10689                                       u32 size)
10690 {
10691         int i, r;
10692         unsigned long hva, old_npages;
10693         struct kvm_memslots *slots = kvm_memslots(kvm);
10694         struct kvm_memory_slot *slot;
10695
10696         /* Called with kvm->slots_lock held.  */
10697         if (WARN_ON(id >= KVM_MEM_SLOTS_NUM))
10698                 return ERR_PTR_USR(-EINVAL);
10699
10700         slot = id_to_memslot(slots, id);
10701         if (size) {
10702                 if (slot && slot->npages)
10703                         return ERR_PTR_USR(-EEXIST);
10704
10705                 /*
10706                  * MAP_SHARED to prevent internal slot pages from being moved
10707                  * by fork()/COW.
10708                  */
10709                 hva = vm_mmap(NULL, 0, size, PROT_READ | PROT_WRITE,
10710                               MAP_SHARED | MAP_ANONYMOUS, 0);
10711                 if (IS_ERR((void *)hva))
10712                         return (void __user *)hva;
10713         } else {
10714                 if (!slot || !slot->npages)
10715                         return NULL;
10716
10717                 old_npages = slot->npages;
10718                 hva = slot->userspace_addr;
10719         }
10720
10721         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
10722                 struct kvm_userspace_memory_region m;
10723
10724                 m.slot = id | (i << 16);
10725                 m.flags = 0;
10726                 m.guest_phys_addr = gpa;
10727                 m.userspace_addr = hva;
10728                 m.memory_size = size;
10729                 r = __kvm_set_memory_region(kvm, &m);
10730                 if (r < 0)
10731                         return ERR_PTR_USR(r);
10732         }
10733
10734         if (!size)
10735                 vm_munmap(hva, old_npages * PAGE_SIZE);
10736
10737         return (void __user *)hva;
10738 }
10739 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
10740
10741 void kvm_arch_pre_destroy_vm(struct kvm *kvm)
10742 {
10743         kvm_mmu_pre_destroy_vm(kvm);
10744 }
10745
10746 void kvm_arch_destroy_vm(struct kvm *kvm)
10747 {
10748         u32 i;
10749
10750         if (current->mm == kvm->mm) {
10751                 /*
10752                  * Free memory regions allocated on behalf of userspace,
10753                  * unless the the memory map has changed due to process exit
10754                  * or fd copying.
10755                  */
10756                 mutex_lock(&kvm->slots_lock);
10757                 __x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT,
10758                                         0, 0);
10759                 __x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT,
10760                                         0, 0);
10761                 __x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, 0, 0);
10762                 mutex_unlock(&kvm->slots_lock);
10763         }
10764         static_call_cond(kvm_x86_vm_destroy)(kvm);
10765         for (i = 0; i < kvm->arch.msr_filter.count; i++)
10766                 kfree(kvm->arch.msr_filter.ranges[i].bitmap);
10767         kvm_pic_destroy(kvm);
10768         kvm_ioapic_destroy(kvm);
10769         kvm_free_vcpus(kvm);
10770         kvfree(rcu_dereference_check(kvm->arch.apic_map, 1));
10771         kfree(srcu_dereference_check(kvm->arch.pmu_event_filter, &kvm->srcu, 1));
10772         kvm_mmu_uninit_vm(kvm);
10773         kvm_page_track_cleanup(kvm);
10774         kvm_xen_destroy_vm(kvm);
10775         kvm_hv_destroy_vm(kvm);
10776 }
10777
10778 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *slot)
10779 {
10780         int i;
10781
10782         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
10783                 kvfree(slot->arch.rmap[i]);
10784                 slot->arch.rmap[i] = NULL;
10785
10786                 if (i == 0)
10787                         continue;
10788
10789                 kvfree(slot->arch.lpage_info[i - 1]);
10790                 slot->arch.lpage_info[i - 1] = NULL;
10791         }
10792
10793         kvm_page_track_free_memslot(slot);
10794 }
10795
10796 static int kvm_alloc_memslot_metadata(struct kvm_memory_slot *slot,
10797                                       unsigned long npages)
10798 {
10799         int i;
10800
10801         /*
10802          * Clear out the previous array pointers for the KVM_MR_MOVE case.  The
10803          * old arrays will be freed by __kvm_set_memory_region() if installing
10804          * the new memslot is successful.
10805          */
10806         memset(&slot->arch, 0, sizeof(slot->arch));
10807
10808         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
10809                 struct kvm_lpage_info *linfo;
10810                 unsigned long ugfn;
10811                 int lpages;
10812                 int level = i + 1;
10813
10814                 lpages = gfn_to_index(slot->base_gfn + npages - 1,
10815                                       slot->base_gfn, level) + 1;
10816
10817                 slot->arch.rmap[i] =
10818                         kvcalloc(lpages, sizeof(*slot->arch.rmap[i]),
10819                                  GFP_KERNEL_ACCOUNT);
10820                 if (!slot->arch.rmap[i])
10821                         goto out_free;
10822                 if (i == 0)
10823                         continue;
10824
10825                 linfo = kvcalloc(lpages, sizeof(*linfo), GFP_KERNEL_ACCOUNT);
10826                 if (!linfo)
10827                         goto out_free;
10828
10829                 slot->arch.lpage_info[i - 1] = linfo;
10830
10831                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
10832                         linfo[0].disallow_lpage = 1;
10833                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
10834                         linfo[lpages - 1].disallow_lpage = 1;
10835                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
10836                 /*
10837                  * If the gfn and userspace address are not aligned wrt each
10838                  * other, disable large page support for this slot.
10839                  */
10840                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1)) {
10841                         unsigned long j;
10842
10843                         for (j = 0; j < lpages; ++j)
10844                                 linfo[j].disallow_lpage = 1;
10845                 }
10846         }
10847
10848         if (kvm_page_track_create_memslot(slot, npages))
10849                 goto out_free;
10850
10851         return 0;
10852
10853 out_free:
10854         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
10855                 kvfree(slot->arch.rmap[i]);
10856                 slot->arch.rmap[i] = NULL;
10857                 if (i == 0)
10858                         continue;
10859
10860                 kvfree(slot->arch.lpage_info[i - 1]);
10861                 slot->arch.lpage_info[i - 1] = NULL;
10862         }
10863         return -ENOMEM;
10864 }
10865
10866 void kvm_arch_memslots_updated(struct kvm *kvm, u64 gen)
10867 {
10868         struct kvm_vcpu *vcpu;
10869         int i;
10870
10871         /*
10872          * memslots->generation has been incremented.
10873          * mmio generation may have reached its maximum value.
10874          */
10875         kvm_mmu_invalidate_mmio_sptes(kvm, gen);
10876
10877         /* Force re-initialization of steal_time cache */
10878         kvm_for_each_vcpu(i, vcpu, kvm)
10879                 kvm_vcpu_kick(vcpu);
10880 }
10881
10882 int kvm_arch_prepare_memory_region(struct kvm *kvm,
10883                                 struct kvm_memory_slot *memslot,
10884                                 const struct kvm_userspace_memory_region *mem,
10885                                 enum kvm_mr_change change)
10886 {
10887         if (change == KVM_MR_CREATE || change == KVM_MR_MOVE)
10888                 return kvm_alloc_memslot_metadata(memslot,
10889                                                   mem->memory_size >> PAGE_SHIFT);
10890         return 0;
10891 }
10892
10893
10894 static void kvm_mmu_update_cpu_dirty_logging(struct kvm *kvm, bool enable)
10895 {
10896         struct kvm_arch *ka = &kvm->arch;
10897
10898         if (!kvm_x86_ops.cpu_dirty_log_size)
10899                 return;
10900
10901         if ((enable && ++ka->cpu_dirty_logging_count == 1) ||
10902             (!enable && --ka->cpu_dirty_logging_count == 0))
10903                 kvm_make_all_cpus_request(kvm, KVM_REQ_UPDATE_CPU_DIRTY_LOGGING);
10904
10905         WARN_ON_ONCE(ka->cpu_dirty_logging_count < 0);
10906 }
10907
10908 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
10909                                      struct kvm_memory_slot *old,
10910                                      struct kvm_memory_slot *new,
10911                                      enum kvm_mr_change change)
10912 {
10913         bool log_dirty_pages = new->flags & KVM_MEM_LOG_DIRTY_PAGES;
10914
10915         /*
10916          * Update CPU dirty logging if dirty logging is being toggled.  This
10917          * applies to all operations.
10918          */
10919         if ((old->flags ^ new->flags) & KVM_MEM_LOG_DIRTY_PAGES)
10920                 kvm_mmu_update_cpu_dirty_logging(kvm, log_dirty_pages);
10921
10922         /*
10923          * Nothing more to do for RO slots (which can't be dirtied and can't be
10924          * made writable) or CREATE/MOVE/DELETE of a slot.
10925          *
10926          * For a memslot with dirty logging disabled:
10927          * CREATE:      No dirty mappings will already exist.
10928          * MOVE/DELETE: The old mappings will already have been cleaned up by
10929          *              kvm_arch_flush_shadow_memslot()
10930          *
10931          * For a memslot with dirty logging enabled:
10932          * CREATE:      No shadow pages exist, thus nothing to write-protect
10933          *              and no dirty bits to clear.
10934          * MOVE/DELETE: The old mappings will already have been cleaned up by
10935          *              kvm_arch_flush_shadow_memslot().
10936          */
10937         if ((change != KVM_MR_FLAGS_ONLY) || (new->flags & KVM_MEM_READONLY))
10938                 return;
10939
10940         /*
10941          * READONLY and non-flags changes were filtered out above, and the only
10942          * other flag is LOG_DIRTY_PAGES, i.e. something is wrong if dirty
10943          * logging isn't being toggled on or off.
10944          */
10945         if (WARN_ON_ONCE(!((old->flags ^ new->flags) & KVM_MEM_LOG_DIRTY_PAGES)))
10946                 return;
10947
10948         if (!log_dirty_pages) {
10949                 /*
10950                  * Dirty logging tracks sptes in 4k granularity, meaning that
10951                  * large sptes have to be split.  If live migration succeeds,
10952                  * the guest in the source machine will be destroyed and large
10953                  * sptes will be created in the destination.  However, if the
10954                  * guest continues to run in the source machine (for example if
10955                  * live migration fails), small sptes will remain around and
10956                  * cause bad performance.
10957                  *
10958                  * Scan sptes if dirty logging has been stopped, dropping those
10959                  * which can be collapsed into a single large-page spte.  Later
10960                  * page faults will create the large-page sptes.
10961                  */
10962                 kvm_mmu_zap_collapsible_sptes(kvm, new);
10963         } else {
10964                 /* By default, write-protect everything to log writes. */
10965                 int level = PG_LEVEL_4K;
10966
10967                 if (kvm_x86_ops.cpu_dirty_log_size) {
10968                         /*
10969                          * Clear all dirty bits, unless pages are treated as
10970                          * dirty from the get-go.
10971                          */
10972                         if (!kvm_dirty_log_manual_protect_and_init_set(kvm))
10973                                 kvm_mmu_slot_leaf_clear_dirty(kvm, new);
10974
10975                         /*
10976                          * Write-protect large pages on write so that dirty
10977                          * logging happens at 4k granularity.  No need to
10978                          * write-protect small SPTEs since write accesses are
10979                          * logged by the CPU via dirty bits.
10980                          */
10981                         level = PG_LEVEL_2M;
10982                 } else if (kvm_dirty_log_manual_protect_and_init_set(kvm)) {
10983                         /*
10984                          * If we're with initial-all-set, we don't need
10985                          * to write protect any small page because
10986                          * they're reported as dirty already.  However
10987                          * we still need to write-protect huge pages
10988                          * so that the page split can happen lazily on
10989                          * the first write to the huge page.
10990                          */
10991                         level = PG_LEVEL_2M;
10992                 }
10993                 kvm_mmu_slot_remove_write_access(kvm, new, level);
10994         }
10995 }
10996
10997 void kvm_arch_commit_memory_region(struct kvm *kvm,
10998                                 const struct kvm_userspace_memory_region *mem,
10999                                 struct kvm_memory_slot *old,
11000                                 const struct kvm_memory_slot *new,
11001                                 enum kvm_mr_change change)
11002 {
11003         if (!kvm->arch.n_requested_mmu_pages)
11004                 kvm_mmu_change_mmu_pages(kvm,
11005                                 kvm_mmu_calculate_default_mmu_pages(kvm));
11006
11007         /*
11008          * FIXME: const-ify all uses of struct kvm_memory_slot.
11009          */
11010         kvm_mmu_slot_apply_flags(kvm, old, (struct kvm_memory_slot *) new, change);
11011
11012         /* Free the arrays associated with the old memslot. */
11013         if (change == KVM_MR_MOVE)
11014                 kvm_arch_free_memslot(kvm, old);
11015 }
11016
11017 void kvm_arch_flush_shadow_all(struct kvm *kvm)
11018 {
11019         kvm_mmu_zap_all(kvm);
11020 }
11021
11022 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
11023                                    struct kvm_memory_slot *slot)
11024 {
11025         kvm_page_track_flush_slot(kvm, slot);
11026 }
11027
11028 static inline bool kvm_guest_apic_has_interrupt(struct kvm_vcpu *vcpu)
11029 {
11030         return (is_guest_mode(vcpu) &&
11031                         kvm_x86_ops.guest_apic_has_interrupt &&
11032                         static_call(kvm_x86_guest_apic_has_interrupt)(vcpu));
11033 }
11034
11035 static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
11036 {
11037         if (!list_empty_careful(&vcpu->async_pf.done))
11038                 return true;
11039
11040         if (kvm_apic_has_events(vcpu))
11041                 return true;
11042
11043         if (vcpu->arch.pv.pv_unhalted)
11044                 return true;
11045
11046         if (vcpu->arch.exception.pending)
11047                 return true;
11048
11049         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
11050             (vcpu->arch.nmi_pending &&
11051              static_call(kvm_x86_nmi_allowed)(vcpu, false)))
11052                 return true;
11053
11054         if (kvm_test_request(KVM_REQ_SMI, vcpu) ||
11055             (vcpu->arch.smi_pending &&
11056              static_call(kvm_x86_smi_allowed)(vcpu, false)))
11057                 return true;
11058
11059         if (kvm_arch_interrupt_allowed(vcpu) &&
11060             (kvm_cpu_has_interrupt(vcpu) ||
11061             kvm_guest_apic_has_interrupt(vcpu)))
11062                 return true;
11063
11064         if (kvm_hv_has_stimer_pending(vcpu))
11065                 return true;
11066
11067         if (is_guest_mode(vcpu) &&
11068             kvm_x86_ops.nested_ops->hv_timer_pending &&
11069             kvm_x86_ops.nested_ops->hv_timer_pending(vcpu))
11070                 return true;
11071
11072         return false;
11073 }
11074
11075 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
11076 {
11077         return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu);
11078 }
11079
11080 bool kvm_arch_dy_runnable(struct kvm_vcpu *vcpu)
11081 {
11082         if (READ_ONCE(vcpu->arch.pv.pv_unhalted))
11083                 return true;
11084
11085         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
11086                 kvm_test_request(KVM_REQ_SMI, vcpu) ||
11087                  kvm_test_request(KVM_REQ_EVENT, vcpu))
11088                 return true;
11089
11090         if (vcpu->arch.apicv_active && static_call(kvm_x86_dy_apicv_has_pending_interrupt)(vcpu))
11091                 return true;
11092
11093         return false;
11094 }
11095
11096 bool kvm_arch_dy_has_pending_interrupt(struct kvm_vcpu *vcpu)
11097 {
11098         if (vcpu->arch.apicv_active && static_call(kvm_x86_dy_apicv_has_pending_interrupt)(vcpu))
11099                 return true;
11100
11101         return false;
11102 }
11103
11104 bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu *vcpu)
11105 {
11106         return vcpu->arch.preempted_in_kernel;
11107 }
11108
11109 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
11110 {
11111         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
11112 }
11113
11114 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
11115 {
11116         return static_call(kvm_x86_interrupt_allowed)(vcpu, false);
11117 }
11118
11119 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
11120 {
11121         /* Can't read the RIP when guest state is protected, just return 0 */
11122         if (vcpu->arch.guest_state_protected)
11123                 return 0;
11124
11125         if (is_64_bit_mode(vcpu))
11126                 return kvm_rip_read(vcpu);
11127         return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
11128                      kvm_rip_read(vcpu));
11129 }
11130 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
11131
11132 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
11133 {
11134         return kvm_get_linear_rip(vcpu) == linear_rip;
11135 }
11136 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
11137
11138 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
11139 {
11140         unsigned long rflags;
11141
11142         rflags = static_call(kvm_x86_get_rflags)(vcpu);
11143         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
11144                 rflags &= ~X86_EFLAGS_TF;
11145         return rflags;
11146 }
11147 EXPORT_SYMBOL_GPL(kvm_get_rflags);
11148
11149 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
11150 {
11151         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
11152             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
11153                 rflags |= X86_EFLAGS_TF;
11154         static_call(kvm_x86_set_rflags)(vcpu, rflags);
11155 }
11156
11157 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
11158 {
11159         __kvm_set_rflags(vcpu, rflags);
11160         kvm_make_request(KVM_REQ_EVENT, vcpu);
11161 }
11162 EXPORT_SYMBOL_GPL(kvm_set_rflags);
11163
11164 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
11165 {
11166         int r;
11167
11168         if ((vcpu->arch.mmu->direct_map != work->arch.direct_map) ||
11169               work->wakeup_all)
11170                 return;
11171
11172         r = kvm_mmu_reload(vcpu);
11173         if (unlikely(r))
11174                 return;
11175
11176         if (!vcpu->arch.mmu->direct_map &&
11177               work->arch.cr3 != vcpu->arch.mmu->get_guest_pgd(vcpu))
11178                 return;
11179
11180         kvm_mmu_do_page_fault(vcpu, work->cr2_or_gpa, 0, true);
11181 }
11182
11183 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
11184 {
11185         BUILD_BUG_ON(!is_power_of_2(ASYNC_PF_PER_VCPU));
11186
11187         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
11188 }
11189
11190 static inline u32 kvm_async_pf_next_probe(u32 key)
11191 {
11192         return (key + 1) & (ASYNC_PF_PER_VCPU - 1);
11193 }
11194
11195 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
11196 {
11197         u32 key = kvm_async_pf_hash_fn(gfn);
11198
11199         while (vcpu->arch.apf.gfns[key] != ~0)
11200                 key = kvm_async_pf_next_probe(key);
11201
11202         vcpu->arch.apf.gfns[key] = gfn;
11203 }
11204
11205 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
11206 {
11207         int i;
11208         u32 key = kvm_async_pf_hash_fn(gfn);
11209
11210         for (i = 0; i < ASYNC_PF_PER_VCPU &&
11211                      (vcpu->arch.apf.gfns[key] != gfn &&
11212                       vcpu->arch.apf.gfns[key] != ~0); i++)
11213                 key = kvm_async_pf_next_probe(key);
11214
11215         return key;
11216 }
11217
11218 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
11219 {
11220         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
11221 }
11222
11223 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
11224 {
11225         u32 i, j, k;
11226
11227         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
11228
11229         if (WARN_ON_ONCE(vcpu->arch.apf.gfns[i] != gfn))
11230                 return;
11231
11232         while (true) {
11233                 vcpu->arch.apf.gfns[i] = ~0;
11234                 do {
11235                         j = kvm_async_pf_next_probe(j);
11236                         if (vcpu->arch.apf.gfns[j] == ~0)
11237                                 return;
11238                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
11239                         /*
11240                          * k lies cyclically in ]i,j]
11241                          * |    i.k.j |
11242                          * |....j i.k.| or  |.k..j i...|
11243                          */
11244                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
11245                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
11246                 i = j;
11247         }
11248 }
11249
11250 static inline int apf_put_user_notpresent(struct kvm_vcpu *vcpu)
11251 {
11252         u32 reason = KVM_PV_REASON_PAGE_NOT_PRESENT;
11253
11254         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &reason,
11255                                       sizeof(reason));
11256 }
11257
11258 static inline int apf_put_user_ready(struct kvm_vcpu *vcpu, u32 token)
11259 {
11260         unsigned int offset = offsetof(struct kvm_vcpu_pv_apf_data, token);
11261
11262         return kvm_write_guest_offset_cached(vcpu->kvm, &vcpu->arch.apf.data,
11263                                              &token, offset, sizeof(token));
11264 }
11265
11266 static inline bool apf_pageready_slot_free(struct kvm_vcpu *vcpu)
11267 {
11268         unsigned int offset = offsetof(struct kvm_vcpu_pv_apf_data, token);
11269         u32 val;
11270
11271         if (kvm_read_guest_offset_cached(vcpu->kvm, &vcpu->arch.apf.data,
11272                                          &val, offset, sizeof(val)))
11273                 return false;
11274
11275         return !val;
11276 }
11277
11278 static bool kvm_can_deliver_async_pf(struct kvm_vcpu *vcpu)
11279 {
11280         if (!vcpu->arch.apf.delivery_as_pf_vmexit && is_guest_mode(vcpu))
11281                 return false;
11282
11283         if (!kvm_pv_async_pf_enabled(vcpu) ||
11284             (vcpu->arch.apf.send_user_only && static_call(kvm_x86_get_cpl)(vcpu) == 0))
11285                 return false;
11286
11287         return true;
11288 }
11289
11290 bool kvm_can_do_async_pf(struct kvm_vcpu *vcpu)
11291 {
11292         if (unlikely(!lapic_in_kernel(vcpu) ||
11293                      kvm_event_needs_reinjection(vcpu) ||
11294                      vcpu->arch.exception.pending))
11295                 return false;
11296
11297         if (kvm_hlt_in_guest(vcpu->kvm) && !kvm_can_deliver_async_pf(vcpu))
11298                 return false;
11299
11300         /*
11301          * If interrupts are off we cannot even use an artificial
11302          * halt state.
11303          */
11304         return kvm_arch_interrupt_allowed(vcpu);
11305 }
11306
11307 bool kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
11308                                      struct kvm_async_pf *work)
11309 {
11310         struct x86_exception fault;
11311
11312         trace_kvm_async_pf_not_present(work->arch.token, work->cr2_or_gpa);
11313         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
11314
11315         if (kvm_can_deliver_async_pf(vcpu) &&
11316             !apf_put_user_notpresent(vcpu)) {
11317                 fault.vector = PF_VECTOR;
11318                 fault.error_code_valid = true;
11319                 fault.error_code = 0;
11320                 fault.nested_page_fault = false;
11321                 fault.address = work->arch.token;
11322                 fault.async_page_fault = true;
11323                 kvm_inject_page_fault(vcpu, &fault);
11324                 return true;
11325         } else {
11326                 /*
11327                  * It is not possible to deliver a paravirtualized asynchronous
11328                  * page fault, but putting the guest in an artificial halt state
11329                  * can be beneficial nevertheless: if an interrupt arrives, we
11330                  * can deliver it timely and perhaps the guest will schedule
11331                  * another process.  When the instruction that triggered a page
11332                  * fault is retried, hopefully the page will be ready in the host.
11333                  */
11334                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
11335                 return false;
11336         }
11337 }
11338
11339 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
11340                                  struct kvm_async_pf *work)
11341 {
11342         struct kvm_lapic_irq irq = {
11343                 .delivery_mode = APIC_DM_FIXED,
11344                 .vector = vcpu->arch.apf.vec
11345         };
11346
11347         if (work->wakeup_all)
11348                 work->arch.token = ~0; /* broadcast wakeup */
11349         else
11350                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
11351         trace_kvm_async_pf_ready(work->arch.token, work->cr2_or_gpa);
11352
11353         if ((work->wakeup_all || work->notpresent_injected) &&
11354             kvm_pv_async_pf_enabled(vcpu) &&
11355             !apf_put_user_ready(vcpu, work->arch.token)) {
11356                 vcpu->arch.apf.pageready_pending = true;
11357                 kvm_apic_set_irq(vcpu, &irq, NULL);
11358         }
11359
11360         vcpu->arch.apf.halted = false;
11361         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
11362 }
11363
11364 void kvm_arch_async_page_present_queued(struct kvm_vcpu *vcpu)
11365 {
11366         kvm_make_request(KVM_REQ_APF_READY, vcpu);
11367         if (!vcpu->arch.apf.pageready_pending)
11368                 kvm_vcpu_kick(vcpu);
11369 }
11370
11371 bool kvm_arch_can_dequeue_async_page_present(struct kvm_vcpu *vcpu)
11372 {
11373         if (!kvm_pv_async_pf_enabled(vcpu))
11374                 return true;
11375         else
11376                 return apf_pageready_slot_free(vcpu);
11377 }
11378
11379 void kvm_arch_start_assignment(struct kvm *kvm)
11380 {
11381         atomic_inc(&kvm->arch.assigned_device_count);
11382 }
11383 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
11384
11385 void kvm_arch_end_assignment(struct kvm *kvm)
11386 {
11387         atomic_dec(&kvm->arch.assigned_device_count);
11388 }
11389 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
11390
11391 bool kvm_arch_has_assigned_device(struct kvm *kvm)
11392 {
11393         return atomic_read(&kvm->arch.assigned_device_count);
11394 }
11395 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
11396
11397 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
11398 {
11399         atomic_inc(&kvm->arch.noncoherent_dma_count);
11400 }
11401 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
11402
11403 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
11404 {
11405         atomic_dec(&kvm->arch.noncoherent_dma_count);
11406 }
11407 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
11408
11409 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
11410 {
11411         return atomic_read(&kvm->arch.noncoherent_dma_count);
11412 }
11413 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
11414
11415 bool kvm_arch_has_irq_bypass(void)
11416 {
11417         return true;
11418 }
11419
11420 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
11421                                       struct irq_bypass_producer *prod)
11422 {
11423         struct kvm_kernel_irqfd *irqfd =
11424                 container_of(cons, struct kvm_kernel_irqfd, consumer);
11425         int ret;
11426
11427         irqfd->producer = prod;
11428         kvm_arch_start_assignment(irqfd->kvm);
11429         ret = static_call(kvm_x86_update_pi_irte)(irqfd->kvm,
11430                                          prod->irq, irqfd->gsi, 1);
11431
11432         if (ret)
11433                 kvm_arch_end_assignment(irqfd->kvm);
11434
11435         return ret;
11436 }
11437
11438 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
11439                                       struct irq_bypass_producer *prod)
11440 {
11441         int ret;
11442         struct kvm_kernel_irqfd *irqfd =
11443                 container_of(cons, struct kvm_kernel_irqfd, consumer);
11444
11445         WARN_ON(irqfd->producer != prod);
11446         irqfd->producer = NULL;
11447
11448         /*
11449          * When producer of consumer is unregistered, we change back to
11450          * remapped mode, so we can re-use the current implementation
11451          * when the irq is masked/disabled or the consumer side (KVM
11452          * int this case doesn't want to receive the interrupts.
11453         */
11454         ret = static_call(kvm_x86_update_pi_irte)(irqfd->kvm, prod->irq, irqfd->gsi, 0);
11455         if (ret)
11456                 printk(KERN_INFO "irq bypass consumer (token %p) unregistration"
11457                        " fails: %d\n", irqfd->consumer.token, ret);
11458
11459         kvm_arch_end_assignment(irqfd->kvm);
11460 }
11461
11462 int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
11463                                    uint32_t guest_irq, bool set)
11464 {
11465         return static_call(kvm_x86_update_pi_irte)(kvm, host_irq, guest_irq, set);
11466 }
11467
11468 bool kvm_vector_hashing_enabled(void)
11469 {
11470         return vector_hashing;
11471 }
11472
11473 bool kvm_arch_no_poll(struct kvm_vcpu *vcpu)
11474 {
11475         return (vcpu->arch.msr_kvm_poll_control & 1) == 0;
11476 }
11477 EXPORT_SYMBOL_GPL(kvm_arch_no_poll);
11478
11479
11480 int kvm_spec_ctrl_test_value(u64 value)
11481 {
11482         /*
11483          * test that setting IA32_SPEC_CTRL to given value
11484          * is allowed by the host processor
11485          */
11486
11487         u64 saved_value;
11488         unsigned long flags;
11489         int ret = 0;
11490
11491         local_irq_save(flags);
11492
11493         if (rdmsrl_safe(MSR_IA32_SPEC_CTRL, &saved_value))
11494                 ret = 1;
11495         else if (wrmsrl_safe(MSR_IA32_SPEC_CTRL, value))
11496                 ret = 1;
11497         else
11498                 wrmsrl(MSR_IA32_SPEC_CTRL, saved_value);
11499
11500         local_irq_restore(flags);
11501
11502         return ret;
11503 }
11504 EXPORT_SYMBOL_GPL(kvm_spec_ctrl_test_value);
11505
11506 void kvm_fixup_and_inject_pf_error(struct kvm_vcpu *vcpu, gva_t gva, u16 error_code)
11507 {
11508         struct x86_exception fault;
11509         u32 access = error_code &
11510                 (PFERR_WRITE_MASK | PFERR_FETCH_MASK | PFERR_USER_MASK);
11511
11512         if (!(error_code & PFERR_PRESENT_MASK) ||
11513             vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, &fault) != UNMAPPED_GVA) {
11514                 /*
11515                  * If vcpu->arch.walk_mmu->gva_to_gpa succeeded, the page
11516                  * tables probably do not match the TLB.  Just proceed
11517                  * with the error code that the processor gave.
11518                  */
11519                 fault.vector = PF_VECTOR;
11520                 fault.error_code_valid = true;
11521                 fault.error_code = error_code;
11522                 fault.nested_page_fault = false;
11523                 fault.address = gva;
11524         }
11525         vcpu->arch.walk_mmu->inject_page_fault(vcpu, &fault);
11526 }
11527 EXPORT_SYMBOL_GPL(kvm_fixup_and_inject_pf_error);
11528
11529 /*
11530  * Handles kvm_read/write_guest_virt*() result and either injects #PF or returns
11531  * KVM_EXIT_INTERNAL_ERROR for cases not currently handled by KVM. Return value
11532  * indicates whether exit to userspace is needed.
11533  */
11534 int kvm_handle_memory_failure(struct kvm_vcpu *vcpu, int r,
11535                               struct x86_exception *e)
11536 {
11537         if (r == X86EMUL_PROPAGATE_FAULT) {
11538                 kvm_inject_emulated_page_fault(vcpu, e);
11539                 return 1;
11540         }
11541
11542         /*
11543          * In case kvm_read/write_guest_virt*() failed with X86EMUL_IO_NEEDED
11544          * while handling a VMX instruction KVM could've handled the request
11545          * correctly by exiting to userspace and performing I/O but there
11546          * doesn't seem to be a real use-case behind such requests, just return
11547          * KVM_EXIT_INTERNAL_ERROR for now.
11548          */
11549         vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
11550         vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
11551         vcpu->run->internal.ndata = 0;
11552
11553         return 0;
11554 }
11555 EXPORT_SYMBOL_GPL(kvm_handle_memory_failure);
11556
11557 int kvm_handle_invpcid(struct kvm_vcpu *vcpu, unsigned long type, gva_t gva)
11558 {
11559         bool pcid_enabled;
11560         struct x86_exception e;
11561         unsigned i;
11562         unsigned long roots_to_free = 0;
11563         struct {
11564                 u64 pcid;
11565                 u64 gla;
11566         } operand;
11567         int r;
11568
11569         r = kvm_read_guest_virt(vcpu, gva, &operand, sizeof(operand), &e);
11570         if (r != X86EMUL_CONTINUE)
11571                 return kvm_handle_memory_failure(vcpu, r, &e);
11572
11573         if (operand.pcid >> 12 != 0) {
11574                 kvm_inject_gp(vcpu, 0);
11575                 return 1;
11576         }
11577
11578         pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
11579
11580         switch (type) {
11581         case INVPCID_TYPE_INDIV_ADDR:
11582                 if ((!pcid_enabled && (operand.pcid != 0)) ||
11583                     is_noncanonical_address(operand.gla, vcpu)) {
11584                         kvm_inject_gp(vcpu, 0);
11585                         return 1;
11586                 }
11587                 kvm_mmu_invpcid_gva(vcpu, operand.gla, operand.pcid);
11588                 return kvm_skip_emulated_instruction(vcpu);
11589
11590         case INVPCID_TYPE_SINGLE_CTXT:
11591                 if (!pcid_enabled && (operand.pcid != 0)) {
11592                         kvm_inject_gp(vcpu, 0);
11593                         return 1;
11594                 }
11595
11596                 if (kvm_get_active_pcid(vcpu) == operand.pcid) {
11597                         kvm_mmu_sync_roots(vcpu);
11598                         kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
11599                 }
11600
11601                 for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++)
11602                         if (kvm_get_pcid(vcpu, vcpu->arch.mmu->prev_roots[i].pgd)
11603                             == operand.pcid)
11604                                 roots_to_free |= KVM_MMU_ROOT_PREVIOUS(i);
11605
11606                 kvm_mmu_free_roots(vcpu, vcpu->arch.mmu, roots_to_free);
11607                 /*
11608                  * If neither the current cr3 nor any of the prev_roots use the
11609                  * given PCID, then nothing needs to be done here because a
11610                  * resync will happen anyway before switching to any other CR3.
11611                  */
11612
11613                 return kvm_skip_emulated_instruction(vcpu);
11614
11615         case INVPCID_TYPE_ALL_NON_GLOBAL:
11616                 /*
11617                  * Currently, KVM doesn't mark global entries in the shadow
11618                  * page tables, so a non-global flush just degenerates to a
11619                  * global flush. If needed, we could optimize this later by
11620                  * keeping track of global entries in shadow page tables.
11621                  */
11622
11623                 fallthrough;
11624         case INVPCID_TYPE_ALL_INCL_GLOBAL:
11625                 kvm_make_request(KVM_REQ_MMU_RELOAD, vcpu);
11626                 return kvm_skip_emulated_instruction(vcpu);
11627
11628         default:
11629                 BUG(); /* We have already checked above that type <= 3 */
11630         }
11631 }
11632 EXPORT_SYMBOL_GPL(kvm_handle_invpcid);
11633
11634 static int complete_sev_es_emulated_mmio(struct kvm_vcpu *vcpu)
11635 {
11636         struct kvm_run *run = vcpu->run;
11637         struct kvm_mmio_fragment *frag;
11638         unsigned int len;
11639
11640         BUG_ON(!vcpu->mmio_needed);
11641
11642         /* Complete previous fragment */
11643         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
11644         len = min(8u, frag->len);
11645         if (!vcpu->mmio_is_write)
11646                 memcpy(frag->data, run->mmio.data, len);
11647
11648         if (frag->len <= 8) {
11649                 /* Switch to the next fragment. */
11650                 frag++;
11651                 vcpu->mmio_cur_fragment++;
11652         } else {
11653                 /* Go forward to the next mmio piece. */
11654                 frag->data += len;
11655                 frag->gpa += len;
11656                 frag->len -= len;
11657         }
11658
11659         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
11660                 vcpu->mmio_needed = 0;
11661
11662                 // VMG change, at this point, we're always done
11663                 // RIP has already been advanced
11664                 return 1;
11665         }
11666
11667         // More MMIO is needed
11668         run->mmio.phys_addr = frag->gpa;
11669         run->mmio.len = min(8u, frag->len);
11670         run->mmio.is_write = vcpu->mmio_is_write;
11671         if (run->mmio.is_write)
11672                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
11673         run->exit_reason = KVM_EXIT_MMIO;
11674
11675         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
11676
11677         return 0;
11678 }
11679
11680 int kvm_sev_es_mmio_write(struct kvm_vcpu *vcpu, gpa_t gpa, unsigned int bytes,
11681                           void *data)
11682 {
11683         int handled;
11684         struct kvm_mmio_fragment *frag;
11685
11686         if (!data)
11687                 return -EINVAL;
11688
11689         handled = write_emultor.read_write_mmio(vcpu, gpa, bytes, data);
11690         if (handled == bytes)
11691                 return 1;
11692
11693         bytes -= handled;
11694         gpa += handled;
11695         data += handled;
11696
11697         /*TODO: Check if need to increment number of frags */
11698         frag = vcpu->mmio_fragments;
11699         vcpu->mmio_nr_fragments = 1;
11700         frag->len = bytes;
11701         frag->gpa = gpa;
11702         frag->data = data;
11703
11704         vcpu->mmio_needed = 1;
11705         vcpu->mmio_cur_fragment = 0;
11706
11707         vcpu->run->mmio.phys_addr = gpa;
11708         vcpu->run->mmio.len = min(8u, frag->len);
11709         vcpu->run->mmio.is_write = 1;
11710         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
11711         vcpu->run->exit_reason = KVM_EXIT_MMIO;
11712
11713         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
11714
11715         return 0;
11716 }
11717 EXPORT_SYMBOL_GPL(kvm_sev_es_mmio_write);
11718
11719 int kvm_sev_es_mmio_read(struct kvm_vcpu *vcpu, gpa_t gpa, unsigned int bytes,
11720                          void *data)
11721 {
11722         int handled;
11723         struct kvm_mmio_fragment *frag;
11724
11725         if (!data)
11726                 return -EINVAL;
11727
11728         handled = read_emultor.read_write_mmio(vcpu, gpa, bytes, data);
11729         if (handled == bytes)
11730                 return 1;
11731
11732         bytes -= handled;
11733         gpa += handled;
11734         data += handled;
11735
11736         /*TODO: Check if need to increment number of frags */
11737         frag = vcpu->mmio_fragments;
11738         vcpu->mmio_nr_fragments = 1;
11739         frag->len = bytes;
11740         frag->gpa = gpa;
11741         frag->data = data;
11742
11743         vcpu->mmio_needed = 1;
11744         vcpu->mmio_cur_fragment = 0;
11745
11746         vcpu->run->mmio.phys_addr = gpa;
11747         vcpu->run->mmio.len = min(8u, frag->len);
11748         vcpu->run->mmio.is_write = 0;
11749         vcpu->run->exit_reason = KVM_EXIT_MMIO;
11750
11751         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
11752
11753         return 0;
11754 }
11755 EXPORT_SYMBOL_GPL(kvm_sev_es_mmio_read);
11756
11757 static int complete_sev_es_emulated_ins(struct kvm_vcpu *vcpu)
11758 {
11759         memcpy(vcpu->arch.guest_ins_data, vcpu->arch.pio_data,
11760                vcpu->arch.pio.count * vcpu->arch.pio.size);
11761         vcpu->arch.pio.count = 0;
11762
11763         return 1;
11764 }
11765
11766 static int kvm_sev_es_outs(struct kvm_vcpu *vcpu, unsigned int size,
11767                            unsigned int port, void *data,  unsigned int count)
11768 {
11769         int ret;
11770
11771         ret = emulator_pio_out_emulated(vcpu->arch.emulate_ctxt, size, port,
11772                                         data, count);
11773         if (ret)
11774                 return ret;
11775
11776         vcpu->arch.pio.count = 0;
11777
11778         return 0;
11779 }
11780
11781 static int kvm_sev_es_ins(struct kvm_vcpu *vcpu, unsigned int size,
11782                           unsigned int port, void *data, unsigned int count)
11783 {
11784         int ret;
11785
11786         ret = emulator_pio_in_emulated(vcpu->arch.emulate_ctxt, size, port,
11787                                        data, count);
11788         if (ret) {
11789                 vcpu->arch.pio.count = 0;
11790         } else {
11791                 vcpu->arch.guest_ins_data = data;
11792                 vcpu->arch.complete_userspace_io = complete_sev_es_emulated_ins;
11793         }
11794
11795         return 0;
11796 }
11797
11798 int kvm_sev_es_string_io(struct kvm_vcpu *vcpu, unsigned int size,
11799                          unsigned int port, void *data,  unsigned int count,
11800                          int in)
11801 {
11802         return in ? kvm_sev_es_ins(vcpu, size, port, data, count)
11803                   : kvm_sev_es_outs(vcpu, size, port, data, count);
11804 }
11805 EXPORT_SYMBOL_GPL(kvm_sev_es_string_io);
11806
11807 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_entry);
11808 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
11809 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
11810 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
11811 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
11812 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
11813 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
11814 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
11815 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
11816 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
11817 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
11818 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmenter_failed);
11819 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
11820 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
11821 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
11822 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
11823 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window_update);
11824 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);
11825 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update);
11826 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access);
11827 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi);
11828 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_ga_log);
11829 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_apicv_update_request);
11830 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_enter);
11831 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_exit);
11832 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_msr_protocol_enter);
11833 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_msr_protocol_exit);