1 // SPDX-License-Identifier: GPL-2.0-only
3 * Kernel-based Virtual Machine driver for Linux
5 * derived from drivers/kvm/kvm_main.c
7 * Copyright (C) 2006 Qumranet, Inc.
8 * Copyright (C) 2008 Qumranet, Inc.
9 * Copyright IBM Corporation, 2008
10 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
13 * Avi Kivity <avi@qumranet.com>
14 * Yaniv Kamay <yaniv@qumranet.com>
15 * Amit Shah <amit.shah@qumranet.com>
16 * Ben-Ami Yassour <benami@il.ibm.com>
19 #include <linux/kvm_host.h>
25 #include "kvm_cache_regs.h"
26 #include "kvm_emulate.h"
34 #include <linux/clocksource.h>
35 #include <linux/interrupt.h>
36 #include <linux/kvm.h>
38 #include <linux/vmalloc.h>
39 #include <linux/export.h>
40 #include <linux/moduleparam.h>
41 #include <linux/mman.h>
42 #include <linux/highmem.h>
43 #include <linux/iommu.h>
44 #include <linux/intel-iommu.h>
45 #include <linux/cpufreq.h>
46 #include <linux/user-return-notifier.h>
47 #include <linux/srcu.h>
48 #include <linux/slab.h>
49 #include <linux/perf_event.h>
50 #include <linux/uaccess.h>
51 #include <linux/hash.h>
52 #include <linux/pci.h>
53 #include <linux/timekeeper_internal.h>
54 #include <linux/pvclock_gtod.h>
55 #include <linux/kvm_irqfd.h>
56 #include <linux/irqbypass.h>
57 #include <linux/sched/stat.h>
58 #include <linux/sched/isolation.h>
59 #include <linux/mem_encrypt.h>
60 #include <linux/entry-kvm.h>
61 #include <linux/suspend.h>
63 #include <trace/events/kvm.h>
65 #include <asm/debugreg.h>
70 #include <linux/kernel_stat.h>
71 #include <asm/fpu/api.h>
72 #include <asm/fpu/xcr.h>
73 #include <asm/fpu/xstate.h>
74 #include <asm/pvclock.h>
75 #include <asm/div64.h>
76 #include <asm/irq_remapping.h>
77 #include <asm/mshyperv.h>
78 #include <asm/hypervisor.h>
79 #include <asm/tlbflush.h>
80 #include <asm/intel_pt.h>
81 #include <asm/emulate_prefix.h>
83 #include <clocksource/hyperv_timer.h>
85 #define CREATE_TRACE_POINTS
88 #define MAX_IO_MSRS 256
89 #define KVM_MAX_MCE_BANKS 32
90 u64 __read_mostly kvm_mce_cap_supported = MCG_CTL_P | MCG_SER_P;
91 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported);
93 #define ERR_PTR_USR(e) ((void __user *)ERR_PTR(e))
95 #define emul_to_vcpu(ctxt) \
96 ((struct kvm_vcpu *)(ctxt)->vcpu)
99 * - enable syscall per default because its emulated by KVM
100 * - enable LME and LMA per default on 64 bit KVM
104 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
106 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
109 static u64 __read_mostly cr4_reserved_bits = CR4_RESERVED_BITS;
111 #define KVM_EXIT_HYPERCALL_VALID_MASK (1 << KVM_HC_MAP_GPA_RANGE)
113 #define KVM_CAP_PMU_VALID_MASK KVM_PMU_CAP_DISABLE
115 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
116 KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
118 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
119 static void process_nmi(struct kvm_vcpu *vcpu);
120 static void process_smi(struct kvm_vcpu *vcpu);
121 static void enter_smm(struct kvm_vcpu *vcpu);
122 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
123 static void store_regs(struct kvm_vcpu *vcpu);
124 static int sync_regs(struct kvm_vcpu *vcpu);
125 static int kvm_vcpu_do_singlestep(struct kvm_vcpu *vcpu);
127 static int __set_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2);
128 static void __get_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2);
130 struct kvm_x86_ops kvm_x86_ops __read_mostly;
132 #define KVM_X86_OP(func) \
133 DEFINE_STATIC_CALL_NULL(kvm_x86_##func, \
134 *(((struct kvm_x86_ops *)0)->func));
135 #define KVM_X86_OP_OPTIONAL KVM_X86_OP
136 #define KVM_X86_OP_OPTIONAL_RET0 KVM_X86_OP
137 #include <asm/kvm-x86-ops.h>
138 EXPORT_STATIC_CALL_GPL(kvm_x86_get_cs_db_l_bits);
139 EXPORT_STATIC_CALL_GPL(kvm_x86_cache_reg);
141 static bool __read_mostly ignore_msrs = 0;
142 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
144 bool __read_mostly report_ignored_msrs = true;
145 module_param(report_ignored_msrs, bool, S_IRUGO | S_IWUSR);
146 EXPORT_SYMBOL_GPL(report_ignored_msrs);
148 unsigned int min_timer_period_us = 200;
149 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
151 static bool __read_mostly kvmclock_periodic_sync = true;
152 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
154 bool __read_mostly kvm_has_tsc_control;
155 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
156 u32 __read_mostly kvm_max_guest_tsc_khz;
157 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
158 u8 __read_mostly kvm_tsc_scaling_ratio_frac_bits;
159 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits);
160 u64 __read_mostly kvm_max_tsc_scaling_ratio;
161 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio);
162 u64 __read_mostly kvm_default_tsc_scaling_ratio;
163 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio);
164 bool __read_mostly kvm_has_bus_lock_exit;
165 EXPORT_SYMBOL_GPL(kvm_has_bus_lock_exit);
167 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
168 static u32 __read_mostly tsc_tolerance_ppm = 250;
169 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
172 * lapic timer advance (tscdeadline mode only) in nanoseconds. '-1' enables
173 * adaptive tuning starting from default advancement of 1000ns. '0' disables
174 * advancement entirely. Any other value is used as-is and disables adaptive
175 * tuning, i.e. allows privileged userspace to set an exact advancement time.
177 static int __read_mostly lapic_timer_advance_ns = -1;
178 module_param(lapic_timer_advance_ns, int, S_IRUGO | S_IWUSR);
180 static bool __read_mostly vector_hashing = true;
181 module_param(vector_hashing, bool, S_IRUGO);
183 bool __read_mostly enable_vmware_backdoor = false;
184 module_param(enable_vmware_backdoor, bool, S_IRUGO);
185 EXPORT_SYMBOL_GPL(enable_vmware_backdoor);
187 static bool __read_mostly force_emulation_prefix = false;
188 module_param(force_emulation_prefix, bool, S_IRUGO);
190 int __read_mostly pi_inject_timer = -1;
191 module_param(pi_inject_timer, bint, S_IRUGO | S_IWUSR);
193 /* Enable/disable PMU virtualization */
194 bool __read_mostly enable_pmu = true;
195 EXPORT_SYMBOL_GPL(enable_pmu);
196 module_param(enable_pmu, bool, 0444);
198 bool __read_mostly eager_page_split = true;
199 module_param(eager_page_split, bool, 0644);
202 * Restoring the host value for MSRs that are only consumed when running in
203 * usermode, e.g. SYSCALL MSRs and TSC_AUX, can be deferred until the CPU
204 * returns to userspace, i.e. the kernel can run with the guest's value.
206 #define KVM_MAX_NR_USER_RETURN_MSRS 16
208 struct kvm_user_return_msrs {
209 struct user_return_notifier urn;
211 struct kvm_user_return_msr_values {
214 } values[KVM_MAX_NR_USER_RETURN_MSRS];
217 u32 __read_mostly kvm_nr_uret_msrs;
218 EXPORT_SYMBOL_GPL(kvm_nr_uret_msrs);
219 static u32 __read_mostly kvm_uret_msrs_list[KVM_MAX_NR_USER_RETURN_MSRS];
220 static struct kvm_user_return_msrs __percpu *user_return_msrs;
222 #define KVM_SUPPORTED_XCR0 (XFEATURE_MASK_FP | XFEATURE_MASK_SSE \
223 | XFEATURE_MASK_YMM | XFEATURE_MASK_BNDREGS \
224 | XFEATURE_MASK_BNDCSR | XFEATURE_MASK_AVX512 \
225 | XFEATURE_MASK_PKRU | XFEATURE_MASK_XTILE)
227 u64 __read_mostly host_efer;
228 EXPORT_SYMBOL_GPL(host_efer);
230 bool __read_mostly allow_smaller_maxphyaddr = 0;
231 EXPORT_SYMBOL_GPL(allow_smaller_maxphyaddr);
233 bool __read_mostly enable_apicv = true;
234 EXPORT_SYMBOL_GPL(enable_apicv);
236 u64 __read_mostly host_xss;
237 EXPORT_SYMBOL_GPL(host_xss);
238 u64 __read_mostly supported_xss;
239 EXPORT_SYMBOL_GPL(supported_xss);
241 const struct _kvm_stats_desc kvm_vm_stats_desc[] = {
242 KVM_GENERIC_VM_STATS(),
243 STATS_DESC_COUNTER(VM, mmu_shadow_zapped),
244 STATS_DESC_COUNTER(VM, mmu_pte_write),
245 STATS_DESC_COUNTER(VM, mmu_pde_zapped),
246 STATS_DESC_COUNTER(VM, mmu_flooded),
247 STATS_DESC_COUNTER(VM, mmu_recycled),
248 STATS_DESC_COUNTER(VM, mmu_cache_miss),
249 STATS_DESC_ICOUNTER(VM, mmu_unsync),
250 STATS_DESC_ICOUNTER(VM, pages_4k),
251 STATS_DESC_ICOUNTER(VM, pages_2m),
252 STATS_DESC_ICOUNTER(VM, pages_1g),
253 STATS_DESC_ICOUNTER(VM, nx_lpage_splits),
254 STATS_DESC_PCOUNTER(VM, max_mmu_rmap_size),
255 STATS_DESC_PCOUNTER(VM, max_mmu_page_hash_collisions)
258 const struct kvm_stats_header kvm_vm_stats_header = {
259 .name_size = KVM_STATS_NAME_SIZE,
260 .num_desc = ARRAY_SIZE(kvm_vm_stats_desc),
261 .id_offset = sizeof(struct kvm_stats_header),
262 .desc_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE,
263 .data_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE +
264 sizeof(kvm_vm_stats_desc),
267 const struct _kvm_stats_desc kvm_vcpu_stats_desc[] = {
268 KVM_GENERIC_VCPU_STATS(),
269 STATS_DESC_COUNTER(VCPU, pf_taken),
270 STATS_DESC_COUNTER(VCPU, pf_fixed),
271 STATS_DESC_COUNTER(VCPU, pf_emulate),
272 STATS_DESC_COUNTER(VCPU, pf_spurious),
273 STATS_DESC_COUNTER(VCPU, pf_fast),
274 STATS_DESC_COUNTER(VCPU, pf_mmio_spte_created),
275 STATS_DESC_COUNTER(VCPU, pf_guest),
276 STATS_DESC_COUNTER(VCPU, tlb_flush),
277 STATS_DESC_COUNTER(VCPU, invlpg),
278 STATS_DESC_COUNTER(VCPU, exits),
279 STATS_DESC_COUNTER(VCPU, io_exits),
280 STATS_DESC_COUNTER(VCPU, mmio_exits),
281 STATS_DESC_COUNTER(VCPU, signal_exits),
282 STATS_DESC_COUNTER(VCPU, irq_window_exits),
283 STATS_DESC_COUNTER(VCPU, nmi_window_exits),
284 STATS_DESC_COUNTER(VCPU, l1d_flush),
285 STATS_DESC_COUNTER(VCPU, halt_exits),
286 STATS_DESC_COUNTER(VCPU, request_irq_exits),
287 STATS_DESC_COUNTER(VCPU, irq_exits),
288 STATS_DESC_COUNTER(VCPU, host_state_reload),
289 STATS_DESC_COUNTER(VCPU, fpu_reload),
290 STATS_DESC_COUNTER(VCPU, insn_emulation),
291 STATS_DESC_COUNTER(VCPU, insn_emulation_fail),
292 STATS_DESC_COUNTER(VCPU, hypercalls),
293 STATS_DESC_COUNTER(VCPU, irq_injections),
294 STATS_DESC_COUNTER(VCPU, nmi_injections),
295 STATS_DESC_COUNTER(VCPU, req_event),
296 STATS_DESC_COUNTER(VCPU, nested_run),
297 STATS_DESC_COUNTER(VCPU, directed_yield_attempted),
298 STATS_DESC_COUNTER(VCPU, directed_yield_successful),
299 STATS_DESC_ICOUNTER(VCPU, guest_mode)
302 const struct kvm_stats_header kvm_vcpu_stats_header = {
303 .name_size = KVM_STATS_NAME_SIZE,
304 .num_desc = ARRAY_SIZE(kvm_vcpu_stats_desc),
305 .id_offset = sizeof(struct kvm_stats_header),
306 .desc_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE,
307 .data_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE +
308 sizeof(kvm_vcpu_stats_desc),
311 u64 __read_mostly host_xcr0;
312 u64 __read_mostly supported_xcr0;
313 EXPORT_SYMBOL_GPL(supported_xcr0);
315 static struct kmem_cache *x86_emulator_cache;
318 * When called, it means the previous get/set msr reached an invalid msr.
319 * Return true if we want to ignore/silent this failed msr access.
321 static bool kvm_msr_ignored_check(u32 msr, u64 data, bool write)
323 const char *op = write ? "wrmsr" : "rdmsr";
326 if (report_ignored_msrs)
327 kvm_pr_unimpl("ignored %s: 0x%x data 0x%llx\n",
332 kvm_debug_ratelimited("unhandled %s: 0x%x data 0x%llx\n",
338 static struct kmem_cache *kvm_alloc_emulator_cache(void)
340 unsigned int useroffset = offsetof(struct x86_emulate_ctxt, src);
341 unsigned int size = sizeof(struct x86_emulate_ctxt);
343 return kmem_cache_create_usercopy("x86_emulator", size,
344 __alignof__(struct x86_emulate_ctxt),
345 SLAB_ACCOUNT, useroffset,
346 size - useroffset, NULL);
349 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
351 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
354 for (i = 0; i < ASYNC_PF_PER_VCPU; i++)
355 vcpu->arch.apf.gfns[i] = ~0;
358 static void kvm_on_user_return(struct user_return_notifier *urn)
361 struct kvm_user_return_msrs *msrs
362 = container_of(urn, struct kvm_user_return_msrs, urn);
363 struct kvm_user_return_msr_values *values;
367 * Disabling irqs at this point since the following code could be
368 * interrupted and executed through kvm_arch_hardware_disable()
370 local_irq_save(flags);
371 if (msrs->registered) {
372 msrs->registered = false;
373 user_return_notifier_unregister(urn);
375 local_irq_restore(flags);
376 for (slot = 0; slot < kvm_nr_uret_msrs; ++slot) {
377 values = &msrs->values[slot];
378 if (values->host != values->curr) {
379 wrmsrl(kvm_uret_msrs_list[slot], values->host);
380 values->curr = values->host;
385 static int kvm_probe_user_return_msr(u32 msr)
391 ret = rdmsrl_safe(msr, &val);
394 ret = wrmsrl_safe(msr, val);
400 int kvm_add_user_return_msr(u32 msr)
402 BUG_ON(kvm_nr_uret_msrs >= KVM_MAX_NR_USER_RETURN_MSRS);
404 if (kvm_probe_user_return_msr(msr))
407 kvm_uret_msrs_list[kvm_nr_uret_msrs] = msr;
408 return kvm_nr_uret_msrs++;
410 EXPORT_SYMBOL_GPL(kvm_add_user_return_msr);
412 int kvm_find_user_return_msr(u32 msr)
416 for (i = 0; i < kvm_nr_uret_msrs; ++i) {
417 if (kvm_uret_msrs_list[i] == msr)
422 EXPORT_SYMBOL_GPL(kvm_find_user_return_msr);
424 static void kvm_user_return_msr_cpu_online(void)
426 unsigned int cpu = smp_processor_id();
427 struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
431 for (i = 0; i < kvm_nr_uret_msrs; ++i) {
432 rdmsrl_safe(kvm_uret_msrs_list[i], &value);
433 msrs->values[i].host = value;
434 msrs->values[i].curr = value;
438 int kvm_set_user_return_msr(unsigned slot, u64 value, u64 mask)
440 unsigned int cpu = smp_processor_id();
441 struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
444 value = (value & mask) | (msrs->values[slot].host & ~mask);
445 if (value == msrs->values[slot].curr)
447 err = wrmsrl_safe(kvm_uret_msrs_list[slot], value);
451 msrs->values[slot].curr = value;
452 if (!msrs->registered) {
453 msrs->urn.on_user_return = kvm_on_user_return;
454 user_return_notifier_register(&msrs->urn);
455 msrs->registered = true;
459 EXPORT_SYMBOL_GPL(kvm_set_user_return_msr);
461 static void drop_user_return_notifiers(void)
463 unsigned int cpu = smp_processor_id();
464 struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
466 if (msrs->registered)
467 kvm_on_user_return(&msrs->urn);
470 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
472 return vcpu->arch.apic_base;
474 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
476 enum lapic_mode kvm_get_apic_mode(struct kvm_vcpu *vcpu)
478 return kvm_apic_mode(kvm_get_apic_base(vcpu));
480 EXPORT_SYMBOL_GPL(kvm_get_apic_mode);
482 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
484 enum lapic_mode old_mode = kvm_get_apic_mode(vcpu);
485 enum lapic_mode new_mode = kvm_apic_mode(msr_info->data);
486 u64 reserved_bits = kvm_vcpu_reserved_gpa_bits_raw(vcpu) | 0x2ff |
487 (guest_cpuid_has(vcpu, X86_FEATURE_X2APIC) ? 0 : X2APIC_ENABLE);
489 if ((msr_info->data & reserved_bits) != 0 || new_mode == LAPIC_MODE_INVALID)
491 if (!msr_info->host_initiated) {
492 if (old_mode == LAPIC_MODE_X2APIC && new_mode == LAPIC_MODE_XAPIC)
494 if (old_mode == LAPIC_MODE_DISABLED && new_mode == LAPIC_MODE_X2APIC)
498 kvm_lapic_set_base(vcpu, msr_info->data);
499 kvm_recalculate_apic_map(vcpu->kvm);
502 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
505 * Handle a fault on a hardware virtualization (VMX or SVM) instruction.
507 * Hardware virtualization extension instructions may fault if a reboot turns
508 * off virtualization while processes are running. Usually after catching the
509 * fault we just panic; during reboot instead the instruction is ignored.
511 noinstr void kvm_spurious_fault(void)
513 /* Fault while not rebooting. We want the trace. */
514 BUG_ON(!kvm_rebooting);
516 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
518 #define EXCPT_BENIGN 0
519 #define EXCPT_CONTRIBUTORY 1
522 static int exception_class(int vector)
532 return EXCPT_CONTRIBUTORY;
539 #define EXCPT_FAULT 0
541 #define EXCPT_ABORT 2
542 #define EXCPT_INTERRUPT 3
544 static int exception_type(int vector)
548 if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
549 return EXCPT_INTERRUPT;
553 /* #DB is trap, as instruction watchpoints are handled elsewhere */
554 if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
557 if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
560 /* Reserved exceptions will result in fault */
564 void kvm_deliver_exception_payload(struct kvm_vcpu *vcpu)
566 unsigned nr = vcpu->arch.exception.nr;
567 bool has_payload = vcpu->arch.exception.has_payload;
568 unsigned long payload = vcpu->arch.exception.payload;
576 * "Certain debug exceptions may clear bit 0-3. The
577 * remaining contents of the DR6 register are never
578 * cleared by the processor".
580 vcpu->arch.dr6 &= ~DR_TRAP_BITS;
582 * In order to reflect the #DB exception payload in guest
583 * dr6, three components need to be considered: active low
584 * bit, FIXED_1 bits and active high bits (e.g. DR6_BD,
586 * DR6_ACTIVE_LOW contains the FIXED_1 and active low bits.
587 * In the target guest dr6:
588 * FIXED_1 bits should always be set.
589 * Active low bits should be cleared if 1-setting in payload.
590 * Active high bits should be set if 1-setting in payload.
592 * Note, the payload is compatible with the pending debug
593 * exceptions/exit qualification under VMX, that active_low bits
594 * are active high in payload.
595 * So they need to be flipped for DR6.
597 vcpu->arch.dr6 |= DR6_ACTIVE_LOW;
598 vcpu->arch.dr6 |= payload;
599 vcpu->arch.dr6 ^= payload & DR6_ACTIVE_LOW;
602 * The #DB payload is defined as compatible with the 'pending
603 * debug exceptions' field under VMX, not DR6. While bit 12 is
604 * defined in the 'pending debug exceptions' field (enabled
605 * breakpoint), it is reserved and must be zero in DR6.
607 vcpu->arch.dr6 &= ~BIT(12);
610 vcpu->arch.cr2 = payload;
614 vcpu->arch.exception.has_payload = false;
615 vcpu->arch.exception.payload = 0;
617 EXPORT_SYMBOL_GPL(kvm_deliver_exception_payload);
619 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
620 unsigned nr, bool has_error, u32 error_code,
621 bool has_payload, unsigned long payload, bool reinject)
626 kvm_make_request(KVM_REQ_EVENT, vcpu);
628 if (!vcpu->arch.exception.pending && !vcpu->arch.exception.injected) {
632 * On vmentry, vcpu->arch.exception.pending is only
633 * true if an event injection was blocked by
634 * nested_run_pending. In that case, however,
635 * vcpu_enter_guest requests an immediate exit,
636 * and the guest shouldn't proceed far enough to
639 WARN_ON_ONCE(vcpu->arch.exception.pending);
640 vcpu->arch.exception.injected = true;
641 if (WARN_ON_ONCE(has_payload)) {
643 * A reinjected event has already
644 * delivered its payload.
650 vcpu->arch.exception.pending = true;
651 vcpu->arch.exception.injected = false;
653 vcpu->arch.exception.has_error_code = has_error;
654 vcpu->arch.exception.nr = nr;
655 vcpu->arch.exception.error_code = error_code;
656 vcpu->arch.exception.has_payload = has_payload;
657 vcpu->arch.exception.payload = payload;
658 if (!is_guest_mode(vcpu))
659 kvm_deliver_exception_payload(vcpu);
663 /* to check exception */
664 prev_nr = vcpu->arch.exception.nr;
665 if (prev_nr == DF_VECTOR) {
666 /* triple fault -> shutdown */
667 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
670 class1 = exception_class(prev_nr);
671 class2 = exception_class(nr);
672 if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
673 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
675 * Generate double fault per SDM Table 5-5. Set
676 * exception.pending = true so that the double fault
677 * can trigger a nested vmexit.
679 vcpu->arch.exception.pending = true;
680 vcpu->arch.exception.injected = false;
681 vcpu->arch.exception.has_error_code = true;
682 vcpu->arch.exception.nr = DF_VECTOR;
683 vcpu->arch.exception.error_code = 0;
684 vcpu->arch.exception.has_payload = false;
685 vcpu->arch.exception.payload = 0;
687 /* replace previous exception with a new one in a hope
688 that instruction re-execution will regenerate lost
693 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
695 kvm_multiple_exception(vcpu, nr, false, 0, false, 0, false);
697 EXPORT_SYMBOL_GPL(kvm_queue_exception);
699 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
701 kvm_multiple_exception(vcpu, nr, false, 0, false, 0, true);
703 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
705 void kvm_queue_exception_p(struct kvm_vcpu *vcpu, unsigned nr,
706 unsigned long payload)
708 kvm_multiple_exception(vcpu, nr, false, 0, true, payload, false);
710 EXPORT_SYMBOL_GPL(kvm_queue_exception_p);
712 static void kvm_queue_exception_e_p(struct kvm_vcpu *vcpu, unsigned nr,
713 u32 error_code, unsigned long payload)
715 kvm_multiple_exception(vcpu, nr, true, error_code,
716 true, payload, false);
719 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
722 kvm_inject_gp(vcpu, 0);
724 return kvm_skip_emulated_instruction(vcpu);
728 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
730 static int complete_emulated_insn_gp(struct kvm_vcpu *vcpu, int err)
733 kvm_inject_gp(vcpu, 0);
737 return kvm_emulate_instruction(vcpu, EMULTYPE_NO_DECODE | EMULTYPE_SKIP |
738 EMULTYPE_COMPLETE_USER_EXIT);
741 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
743 ++vcpu->stat.pf_guest;
744 vcpu->arch.exception.nested_apf =
745 is_guest_mode(vcpu) && fault->async_page_fault;
746 if (vcpu->arch.exception.nested_apf) {
747 vcpu->arch.apf.nested_apf_token = fault->address;
748 kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
750 kvm_queue_exception_e_p(vcpu, PF_VECTOR, fault->error_code,
754 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
756 /* Returns true if the page fault was immediately morphed into a VM-Exit. */
757 bool kvm_inject_emulated_page_fault(struct kvm_vcpu *vcpu,
758 struct x86_exception *fault)
760 struct kvm_mmu *fault_mmu;
761 WARN_ON_ONCE(fault->vector != PF_VECTOR);
763 fault_mmu = fault->nested_page_fault ? vcpu->arch.mmu :
767 * Invalidate the TLB entry for the faulting address, if it exists,
768 * else the access will fault indefinitely (and to emulate hardware).
770 if ((fault->error_code & PFERR_PRESENT_MASK) &&
771 !(fault->error_code & PFERR_RSVD_MASK))
772 kvm_mmu_invalidate_gva(vcpu, fault_mmu, fault->address,
773 fault_mmu->root.hpa);
776 * A workaround for KVM's bad exception handling. If KVM injected an
777 * exception into L2, and L2 encountered a #PF while vectoring the
778 * injected exception, manually check to see if L1 wants to intercept
779 * #PF, otherwise queuing the #PF will lead to #DF or a lost exception.
780 * In all other cases, defer the check to nested_ops->check_events(),
781 * which will correctly handle priority (this does not). Note, other
782 * exceptions, e.g. #GP, are theoretically affected, #PF is simply the
783 * most problematic, e.g. when L0 and L1 are both intercepting #PF for
786 * TODO: Rewrite exception handling to track injected and pending
787 * (VM-Exit) exceptions separately.
789 if (unlikely(vcpu->arch.exception.injected && is_guest_mode(vcpu)) &&
790 kvm_x86_ops.nested_ops->handle_page_fault_workaround(vcpu, fault))
793 fault_mmu->inject_page_fault(vcpu, fault);
796 EXPORT_SYMBOL_GPL(kvm_inject_emulated_page_fault);
798 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
800 atomic_inc(&vcpu->arch.nmi_queued);
801 kvm_make_request(KVM_REQ_NMI, vcpu);
803 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
805 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
807 kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, false);
809 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
811 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
813 kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, true);
815 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
818 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
819 * a #GP and return false.
821 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
823 if (static_call(kvm_x86_get_cpl)(vcpu) <= required_cpl)
825 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
828 EXPORT_SYMBOL_GPL(kvm_require_cpl);
830 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
832 if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
835 kvm_queue_exception(vcpu, UD_VECTOR);
838 EXPORT_SYMBOL_GPL(kvm_require_dr);
840 static inline u64 pdptr_rsvd_bits(struct kvm_vcpu *vcpu)
842 return vcpu->arch.reserved_gpa_bits | rsvd_bits(5, 8) | rsvd_bits(1, 2);
846 * Load the pae pdptrs. Return 1 if they are all valid, 0 otherwise.
848 int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3)
850 struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
851 gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
855 u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
858 * If the MMU is nested, CR3 holds an L2 GPA and needs to be translated
861 real_gpa = kvm_translate_gpa(vcpu, mmu, gfn_to_gpa(pdpt_gfn),
862 PFERR_USER_MASK | PFERR_WRITE_MASK, NULL);
863 if (real_gpa == UNMAPPED_GVA)
866 /* Note the offset, PDPTRs are 32 byte aligned when using PAE paging. */
867 ret = kvm_vcpu_read_guest_page(vcpu, gpa_to_gfn(real_gpa), pdpte,
868 cr3 & GENMASK(11, 5), sizeof(pdpte));
872 for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
873 if ((pdpte[i] & PT_PRESENT_MASK) &&
874 (pdpte[i] & pdptr_rsvd_bits(vcpu))) {
880 * Marking VCPU_EXREG_PDPTR dirty doesn't work for !tdp_enabled.
881 * Shadow page roots need to be reconstructed instead.
883 if (!tdp_enabled && memcmp(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs)))
884 kvm_mmu_free_roots(vcpu->kvm, mmu, KVM_MMU_ROOT_CURRENT);
886 memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
887 kvm_register_mark_dirty(vcpu, VCPU_EXREG_PDPTR);
888 kvm_make_request(KVM_REQ_LOAD_MMU_PGD, vcpu);
889 vcpu->arch.pdptrs_from_userspace = false;
893 EXPORT_SYMBOL_GPL(load_pdptrs);
895 void kvm_post_set_cr0(struct kvm_vcpu *vcpu, unsigned long old_cr0, unsigned long cr0)
897 if ((cr0 ^ old_cr0) & X86_CR0_PG) {
898 kvm_clear_async_pf_completion_queue(vcpu);
899 kvm_async_pf_hash_reset(vcpu);
902 * Clearing CR0.PG is defined to flush the TLB from the guest's
905 if (!(cr0 & X86_CR0_PG))
906 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu);
909 if ((cr0 ^ old_cr0) & KVM_MMU_CR0_ROLE_BITS)
910 kvm_mmu_reset_context(vcpu);
912 if (((cr0 ^ old_cr0) & X86_CR0_CD) &&
913 kvm_arch_has_noncoherent_dma(vcpu->kvm) &&
914 !kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
915 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
917 EXPORT_SYMBOL_GPL(kvm_post_set_cr0);
919 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
921 unsigned long old_cr0 = kvm_read_cr0(vcpu);
926 if (cr0 & 0xffffffff00000000UL)
930 cr0 &= ~CR0_RESERVED_BITS;
932 if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
935 if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
939 if ((vcpu->arch.efer & EFER_LME) && !is_paging(vcpu) &&
940 (cr0 & X86_CR0_PG)) {
945 static_call(kvm_x86_get_cs_db_l_bits)(vcpu, &cs_db, &cs_l);
950 if (!(vcpu->arch.efer & EFER_LME) && (cr0 & X86_CR0_PG) &&
951 is_pae(vcpu) && ((cr0 ^ old_cr0) & X86_CR0_PDPTR_BITS) &&
952 !load_pdptrs(vcpu, kvm_read_cr3(vcpu)))
955 if (!(cr0 & X86_CR0_PG) &&
956 (is_64_bit_mode(vcpu) || kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE)))
959 static_call(kvm_x86_set_cr0)(vcpu, cr0);
961 kvm_post_set_cr0(vcpu, old_cr0, cr0);
965 EXPORT_SYMBOL_GPL(kvm_set_cr0);
967 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
969 (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
971 EXPORT_SYMBOL_GPL(kvm_lmsw);
973 void kvm_load_guest_xsave_state(struct kvm_vcpu *vcpu)
975 if (vcpu->arch.guest_state_protected)
978 if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE)) {
980 if (vcpu->arch.xcr0 != host_xcr0)
981 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
983 if (vcpu->arch.xsaves_enabled &&
984 vcpu->arch.ia32_xss != host_xss)
985 wrmsrl(MSR_IA32_XSS, vcpu->arch.ia32_xss);
988 #ifdef CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS
989 if (static_cpu_has(X86_FEATURE_PKU) &&
990 vcpu->arch.pkru != vcpu->arch.host_pkru &&
991 ((vcpu->arch.xcr0 & XFEATURE_MASK_PKRU) ||
992 kvm_read_cr4_bits(vcpu, X86_CR4_PKE)))
993 write_pkru(vcpu->arch.pkru);
994 #endif /* CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS */
996 EXPORT_SYMBOL_GPL(kvm_load_guest_xsave_state);
998 void kvm_load_host_xsave_state(struct kvm_vcpu *vcpu)
1000 if (vcpu->arch.guest_state_protected)
1003 #ifdef CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS
1004 if (static_cpu_has(X86_FEATURE_PKU) &&
1005 ((vcpu->arch.xcr0 & XFEATURE_MASK_PKRU) ||
1006 kvm_read_cr4_bits(vcpu, X86_CR4_PKE))) {
1007 vcpu->arch.pkru = rdpkru();
1008 if (vcpu->arch.pkru != vcpu->arch.host_pkru)
1009 write_pkru(vcpu->arch.host_pkru);
1011 #endif /* CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS */
1013 if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE)) {
1015 if (vcpu->arch.xcr0 != host_xcr0)
1016 xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
1018 if (vcpu->arch.xsaves_enabled &&
1019 vcpu->arch.ia32_xss != host_xss)
1020 wrmsrl(MSR_IA32_XSS, host_xss);
1024 EXPORT_SYMBOL_GPL(kvm_load_host_xsave_state);
1026 static inline u64 kvm_guest_supported_xcr0(struct kvm_vcpu *vcpu)
1028 return vcpu->arch.guest_fpu.fpstate->user_xfeatures;
1031 #ifdef CONFIG_X86_64
1032 static inline u64 kvm_guest_supported_xfd(struct kvm_vcpu *vcpu)
1034 return kvm_guest_supported_xcr0(vcpu) & XFEATURE_MASK_USER_DYNAMIC;
1038 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
1041 u64 old_xcr0 = vcpu->arch.xcr0;
1044 /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now */
1045 if (index != XCR_XFEATURE_ENABLED_MASK)
1047 if (!(xcr0 & XFEATURE_MASK_FP))
1049 if ((xcr0 & XFEATURE_MASK_YMM) && !(xcr0 & XFEATURE_MASK_SSE))
1053 * Do not allow the guest to set bits that we do not support
1054 * saving. However, xcr0 bit 0 is always set, even if the
1055 * emulated CPU does not support XSAVE (see kvm_vcpu_reset()).
1057 valid_bits = kvm_guest_supported_xcr0(vcpu) | XFEATURE_MASK_FP;
1058 if (xcr0 & ~valid_bits)
1061 if ((!(xcr0 & XFEATURE_MASK_BNDREGS)) !=
1062 (!(xcr0 & XFEATURE_MASK_BNDCSR)))
1065 if (xcr0 & XFEATURE_MASK_AVX512) {
1066 if (!(xcr0 & XFEATURE_MASK_YMM))
1068 if ((xcr0 & XFEATURE_MASK_AVX512) != XFEATURE_MASK_AVX512)
1072 if ((xcr0 & XFEATURE_MASK_XTILE) &&
1073 ((xcr0 & XFEATURE_MASK_XTILE) != XFEATURE_MASK_XTILE))
1076 vcpu->arch.xcr0 = xcr0;
1078 if ((xcr0 ^ old_xcr0) & XFEATURE_MASK_EXTEND)
1079 kvm_update_cpuid_runtime(vcpu);
1083 int kvm_emulate_xsetbv(struct kvm_vcpu *vcpu)
1085 if (static_call(kvm_x86_get_cpl)(vcpu) != 0 ||
1086 __kvm_set_xcr(vcpu, kvm_rcx_read(vcpu), kvm_read_edx_eax(vcpu))) {
1087 kvm_inject_gp(vcpu, 0);
1091 return kvm_skip_emulated_instruction(vcpu);
1093 EXPORT_SYMBOL_GPL(kvm_emulate_xsetbv);
1095 bool kvm_is_valid_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
1097 if (cr4 & cr4_reserved_bits)
1100 if (cr4 & vcpu->arch.cr4_guest_rsvd_bits)
1103 return static_call(kvm_x86_is_valid_cr4)(vcpu, cr4);
1105 EXPORT_SYMBOL_GPL(kvm_is_valid_cr4);
1107 void kvm_post_set_cr4(struct kvm_vcpu *vcpu, unsigned long old_cr4, unsigned long cr4)
1109 if ((cr4 ^ old_cr4) & KVM_MMU_CR4_ROLE_BITS)
1110 kvm_mmu_reset_context(vcpu);
1113 * If CR4.PCIDE is changed 0 -> 1, there is no need to flush the TLB
1114 * according to the SDM; however, stale prev_roots could be reused
1115 * incorrectly in the future after a MOV to CR3 with NOFLUSH=1, so we
1116 * free them all. This is *not* a superset of KVM_REQ_TLB_FLUSH_GUEST
1117 * or KVM_REQ_TLB_FLUSH_CURRENT, because the hardware TLB is not flushed,
1121 (cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE))
1122 kvm_mmu_unload(vcpu);
1125 * The TLB has to be flushed for all PCIDs if any of the following
1126 * (architecturally required) changes happen:
1127 * - CR4.PCIDE is changed from 1 to 0
1128 * - CR4.PGE is toggled
1130 * This is a superset of KVM_REQ_TLB_FLUSH_CURRENT.
1132 if (((cr4 ^ old_cr4) & X86_CR4_PGE) ||
1133 (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
1134 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu);
1137 * The TLB has to be flushed for the current PCID if any of the
1138 * following (architecturally required) changes happen:
1139 * - CR4.SMEP is changed from 0 to 1
1140 * - CR4.PAE is toggled
1142 else if (((cr4 ^ old_cr4) & X86_CR4_PAE) ||
1143 ((cr4 & X86_CR4_SMEP) && !(old_cr4 & X86_CR4_SMEP)))
1144 kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
1147 EXPORT_SYMBOL_GPL(kvm_post_set_cr4);
1149 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
1151 unsigned long old_cr4 = kvm_read_cr4(vcpu);
1153 if (!kvm_is_valid_cr4(vcpu, cr4))
1156 if (is_long_mode(vcpu)) {
1157 if (!(cr4 & X86_CR4_PAE))
1159 if ((cr4 ^ old_cr4) & X86_CR4_LA57)
1161 } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
1162 && ((cr4 ^ old_cr4) & X86_CR4_PDPTR_BITS)
1163 && !load_pdptrs(vcpu, kvm_read_cr3(vcpu)))
1166 if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
1167 if (!guest_cpuid_has(vcpu, X86_FEATURE_PCID))
1170 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
1171 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
1175 static_call(kvm_x86_set_cr4)(vcpu, cr4);
1177 kvm_post_set_cr4(vcpu, old_cr4, cr4);
1181 EXPORT_SYMBOL_GPL(kvm_set_cr4);
1183 static void kvm_invalidate_pcid(struct kvm_vcpu *vcpu, unsigned long pcid)
1185 struct kvm_mmu *mmu = vcpu->arch.mmu;
1186 unsigned long roots_to_free = 0;
1190 * MOV CR3 and INVPCID are usually not intercepted when using TDP, but
1191 * this is reachable when running EPT=1 and unrestricted_guest=0, and
1192 * also via the emulator. KVM's TDP page tables are not in the scope of
1193 * the invalidation, but the guest's TLB entries need to be flushed as
1194 * the CPU may have cached entries in its TLB for the target PCID.
1196 if (unlikely(tdp_enabled)) {
1197 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu);
1202 * If neither the current CR3 nor any of the prev_roots use the given
1203 * PCID, then nothing needs to be done here because a resync will
1204 * happen anyway before switching to any other CR3.
1206 if (kvm_get_active_pcid(vcpu) == pcid) {
1207 kvm_make_request(KVM_REQ_MMU_SYNC, vcpu);
1208 kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
1212 * If PCID is disabled, there is no need to free prev_roots even if the
1213 * PCIDs for them are also 0, because MOV to CR3 always flushes the TLB
1216 if (!kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
1219 for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++)
1220 if (kvm_get_pcid(vcpu, mmu->prev_roots[i].pgd) == pcid)
1221 roots_to_free |= KVM_MMU_ROOT_PREVIOUS(i);
1223 kvm_mmu_free_roots(vcpu->kvm, mmu, roots_to_free);
1226 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
1228 bool skip_tlb_flush = false;
1229 unsigned long pcid = 0;
1230 #ifdef CONFIG_X86_64
1231 bool pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
1234 skip_tlb_flush = cr3 & X86_CR3_PCID_NOFLUSH;
1235 cr3 &= ~X86_CR3_PCID_NOFLUSH;
1236 pcid = cr3 & X86_CR3_PCID_MASK;
1240 /* PDPTRs are always reloaded for PAE paging. */
1241 if (cr3 == kvm_read_cr3(vcpu) && !is_pae_paging(vcpu))
1242 goto handle_tlb_flush;
1245 * Do not condition the GPA check on long mode, this helper is used to
1246 * stuff CR3, e.g. for RSM emulation, and there is no guarantee that
1247 * the current vCPU mode is accurate.
1249 if (kvm_vcpu_is_illegal_gpa(vcpu, cr3))
1252 if (is_pae_paging(vcpu) && !load_pdptrs(vcpu, cr3))
1255 if (cr3 != kvm_read_cr3(vcpu))
1256 kvm_mmu_new_pgd(vcpu, cr3);
1258 vcpu->arch.cr3 = cr3;
1259 kvm_register_mark_dirty(vcpu, VCPU_EXREG_CR3);
1260 /* Do not call post_set_cr3, we do not get here for confidential guests. */
1264 * A load of CR3 that flushes the TLB flushes only the current PCID,
1265 * even if PCID is disabled, in which case PCID=0 is flushed. It's a
1266 * moot point in the end because _disabling_ PCID will flush all PCIDs,
1267 * and it's impossible to use a non-zero PCID when PCID is disabled,
1268 * i.e. only PCID=0 can be relevant.
1270 if (!skip_tlb_flush)
1271 kvm_invalidate_pcid(vcpu, pcid);
1275 EXPORT_SYMBOL_GPL(kvm_set_cr3);
1277 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
1279 if (cr8 & CR8_RESERVED_BITS)
1281 if (lapic_in_kernel(vcpu))
1282 kvm_lapic_set_tpr(vcpu, cr8);
1284 vcpu->arch.cr8 = cr8;
1287 EXPORT_SYMBOL_GPL(kvm_set_cr8);
1289 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
1291 if (lapic_in_kernel(vcpu))
1292 return kvm_lapic_get_cr8(vcpu);
1294 return vcpu->arch.cr8;
1296 EXPORT_SYMBOL_GPL(kvm_get_cr8);
1298 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
1302 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
1303 for (i = 0; i < KVM_NR_DB_REGS; i++)
1304 vcpu->arch.eff_db[i] = vcpu->arch.db[i];
1308 void kvm_update_dr7(struct kvm_vcpu *vcpu)
1312 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
1313 dr7 = vcpu->arch.guest_debug_dr7;
1315 dr7 = vcpu->arch.dr7;
1316 static_call(kvm_x86_set_dr7)(vcpu, dr7);
1317 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
1318 if (dr7 & DR7_BP_EN_MASK)
1319 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
1321 EXPORT_SYMBOL_GPL(kvm_update_dr7);
1323 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
1325 u64 fixed = DR6_FIXED_1;
1327 if (!guest_cpuid_has(vcpu, X86_FEATURE_RTM))
1330 if (!guest_cpuid_has(vcpu, X86_FEATURE_BUS_LOCK_DETECT))
1331 fixed |= DR6_BUS_LOCK;
1335 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
1337 size_t size = ARRAY_SIZE(vcpu->arch.db);
1341 vcpu->arch.db[array_index_nospec(dr, size)] = val;
1342 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
1343 vcpu->arch.eff_db[dr] = val;
1347 if (!kvm_dr6_valid(val))
1349 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
1353 if (!kvm_dr7_valid(val))
1355 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
1356 kvm_update_dr7(vcpu);
1362 EXPORT_SYMBOL_GPL(kvm_set_dr);
1364 void kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
1366 size_t size = ARRAY_SIZE(vcpu->arch.db);
1370 *val = vcpu->arch.db[array_index_nospec(dr, size)];
1374 *val = vcpu->arch.dr6;
1378 *val = vcpu->arch.dr7;
1382 EXPORT_SYMBOL_GPL(kvm_get_dr);
1384 int kvm_emulate_rdpmc(struct kvm_vcpu *vcpu)
1386 u32 ecx = kvm_rcx_read(vcpu);
1389 if (kvm_pmu_rdpmc(vcpu, ecx, &data)) {
1390 kvm_inject_gp(vcpu, 0);
1394 kvm_rax_write(vcpu, (u32)data);
1395 kvm_rdx_write(vcpu, data >> 32);
1396 return kvm_skip_emulated_instruction(vcpu);
1398 EXPORT_SYMBOL_GPL(kvm_emulate_rdpmc);
1401 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
1402 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
1404 * The three MSR lists(msrs_to_save, emulated_msrs, msr_based_features)
1405 * extract the supported MSRs from the related const lists.
1406 * msrs_to_save is selected from the msrs_to_save_all to reflect the
1407 * capabilities of the host cpu. This capabilities test skips MSRs that are
1408 * kvm-specific. Those are put in emulated_msrs_all; filtering of emulated_msrs
1409 * may depend on host virtualization features rather than host cpu features.
1412 static const u32 msrs_to_save_all[] = {
1413 MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
1415 #ifdef CONFIG_X86_64
1416 MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
1418 MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
1419 MSR_IA32_FEAT_CTL, MSR_IA32_BNDCFGS, MSR_TSC_AUX,
1421 MSR_IA32_RTIT_CTL, MSR_IA32_RTIT_STATUS, MSR_IA32_RTIT_CR3_MATCH,
1422 MSR_IA32_RTIT_OUTPUT_BASE, MSR_IA32_RTIT_OUTPUT_MASK,
1423 MSR_IA32_RTIT_ADDR0_A, MSR_IA32_RTIT_ADDR0_B,
1424 MSR_IA32_RTIT_ADDR1_A, MSR_IA32_RTIT_ADDR1_B,
1425 MSR_IA32_RTIT_ADDR2_A, MSR_IA32_RTIT_ADDR2_B,
1426 MSR_IA32_RTIT_ADDR3_A, MSR_IA32_RTIT_ADDR3_B,
1427 MSR_IA32_UMWAIT_CONTROL,
1429 MSR_ARCH_PERFMON_FIXED_CTR0, MSR_ARCH_PERFMON_FIXED_CTR1,
1430 MSR_ARCH_PERFMON_FIXED_CTR0 + 2,
1431 MSR_CORE_PERF_FIXED_CTR_CTRL, MSR_CORE_PERF_GLOBAL_STATUS,
1432 MSR_CORE_PERF_GLOBAL_CTRL, MSR_CORE_PERF_GLOBAL_OVF_CTRL,
1433 MSR_ARCH_PERFMON_PERFCTR0, MSR_ARCH_PERFMON_PERFCTR1,
1434 MSR_ARCH_PERFMON_PERFCTR0 + 2, MSR_ARCH_PERFMON_PERFCTR0 + 3,
1435 MSR_ARCH_PERFMON_PERFCTR0 + 4, MSR_ARCH_PERFMON_PERFCTR0 + 5,
1436 MSR_ARCH_PERFMON_PERFCTR0 + 6, MSR_ARCH_PERFMON_PERFCTR0 + 7,
1437 MSR_ARCH_PERFMON_PERFCTR0 + 8, MSR_ARCH_PERFMON_PERFCTR0 + 9,
1438 MSR_ARCH_PERFMON_PERFCTR0 + 10, MSR_ARCH_PERFMON_PERFCTR0 + 11,
1439 MSR_ARCH_PERFMON_PERFCTR0 + 12, MSR_ARCH_PERFMON_PERFCTR0 + 13,
1440 MSR_ARCH_PERFMON_PERFCTR0 + 14, MSR_ARCH_PERFMON_PERFCTR0 + 15,
1441 MSR_ARCH_PERFMON_PERFCTR0 + 16, MSR_ARCH_PERFMON_PERFCTR0 + 17,
1442 MSR_ARCH_PERFMON_EVENTSEL0, MSR_ARCH_PERFMON_EVENTSEL1,
1443 MSR_ARCH_PERFMON_EVENTSEL0 + 2, MSR_ARCH_PERFMON_EVENTSEL0 + 3,
1444 MSR_ARCH_PERFMON_EVENTSEL0 + 4, MSR_ARCH_PERFMON_EVENTSEL0 + 5,
1445 MSR_ARCH_PERFMON_EVENTSEL0 + 6, MSR_ARCH_PERFMON_EVENTSEL0 + 7,
1446 MSR_ARCH_PERFMON_EVENTSEL0 + 8, MSR_ARCH_PERFMON_EVENTSEL0 + 9,
1447 MSR_ARCH_PERFMON_EVENTSEL0 + 10, MSR_ARCH_PERFMON_EVENTSEL0 + 11,
1448 MSR_ARCH_PERFMON_EVENTSEL0 + 12, MSR_ARCH_PERFMON_EVENTSEL0 + 13,
1449 MSR_ARCH_PERFMON_EVENTSEL0 + 14, MSR_ARCH_PERFMON_EVENTSEL0 + 15,
1450 MSR_ARCH_PERFMON_EVENTSEL0 + 16, MSR_ARCH_PERFMON_EVENTSEL0 + 17,
1451 MSR_IA32_PEBS_ENABLE, MSR_IA32_DS_AREA, MSR_PEBS_DATA_CFG,
1453 MSR_K7_EVNTSEL0, MSR_K7_EVNTSEL1, MSR_K7_EVNTSEL2, MSR_K7_EVNTSEL3,
1454 MSR_K7_PERFCTR0, MSR_K7_PERFCTR1, MSR_K7_PERFCTR2, MSR_K7_PERFCTR3,
1455 MSR_F15H_PERF_CTL0, MSR_F15H_PERF_CTL1, MSR_F15H_PERF_CTL2,
1456 MSR_F15H_PERF_CTL3, MSR_F15H_PERF_CTL4, MSR_F15H_PERF_CTL5,
1457 MSR_F15H_PERF_CTR0, MSR_F15H_PERF_CTR1, MSR_F15H_PERF_CTR2,
1458 MSR_F15H_PERF_CTR3, MSR_F15H_PERF_CTR4, MSR_F15H_PERF_CTR5,
1459 MSR_IA32_XFD, MSR_IA32_XFD_ERR,
1462 static u32 msrs_to_save[ARRAY_SIZE(msrs_to_save_all)];
1463 static unsigned num_msrs_to_save;
1465 static const u32 emulated_msrs_all[] = {
1466 MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
1467 MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
1468 HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
1469 HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
1470 HV_X64_MSR_TSC_FREQUENCY, HV_X64_MSR_APIC_FREQUENCY,
1471 HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
1472 HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
1474 HV_X64_MSR_VP_INDEX,
1475 HV_X64_MSR_VP_RUNTIME,
1476 HV_X64_MSR_SCONTROL,
1477 HV_X64_MSR_STIMER0_CONFIG,
1478 HV_X64_MSR_VP_ASSIST_PAGE,
1479 HV_X64_MSR_REENLIGHTENMENT_CONTROL, HV_X64_MSR_TSC_EMULATION_CONTROL,
1480 HV_X64_MSR_TSC_EMULATION_STATUS,
1481 HV_X64_MSR_SYNDBG_OPTIONS,
1482 HV_X64_MSR_SYNDBG_CONTROL, HV_X64_MSR_SYNDBG_STATUS,
1483 HV_X64_MSR_SYNDBG_SEND_BUFFER, HV_X64_MSR_SYNDBG_RECV_BUFFER,
1484 HV_X64_MSR_SYNDBG_PENDING_BUFFER,
1486 MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
1487 MSR_KVM_PV_EOI_EN, MSR_KVM_ASYNC_PF_INT, MSR_KVM_ASYNC_PF_ACK,
1489 MSR_IA32_TSC_ADJUST,
1490 MSR_IA32_TSC_DEADLINE,
1491 MSR_IA32_ARCH_CAPABILITIES,
1492 MSR_IA32_PERF_CAPABILITIES,
1493 MSR_IA32_MISC_ENABLE,
1494 MSR_IA32_MCG_STATUS,
1496 MSR_IA32_MCG_EXT_CTL,
1500 MSR_MISC_FEATURES_ENABLES,
1501 MSR_AMD64_VIRT_SPEC_CTRL,
1502 MSR_AMD64_TSC_RATIO,
1507 * The following list leaves out MSRs whose values are determined
1508 * by arch/x86/kvm/vmx/nested.c based on CPUID or other MSRs.
1509 * We always support the "true" VMX control MSRs, even if the host
1510 * processor does not, so I am putting these registers here rather
1511 * than in msrs_to_save_all.
1514 MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1515 MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1516 MSR_IA32_VMX_TRUE_EXIT_CTLS,
1517 MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1519 MSR_IA32_VMX_CR0_FIXED0,
1520 MSR_IA32_VMX_CR4_FIXED0,
1521 MSR_IA32_VMX_VMCS_ENUM,
1522 MSR_IA32_VMX_PROCBASED_CTLS2,
1523 MSR_IA32_VMX_EPT_VPID_CAP,
1524 MSR_IA32_VMX_VMFUNC,
1527 MSR_KVM_POLL_CONTROL,
1530 static u32 emulated_msrs[ARRAY_SIZE(emulated_msrs_all)];
1531 static unsigned num_emulated_msrs;
1534 * List of msr numbers which are used to expose MSR-based features that
1535 * can be used by a hypervisor to validate requested CPU features.
1537 static const u32 msr_based_features_all[] = {
1539 MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1540 MSR_IA32_VMX_PINBASED_CTLS,
1541 MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1542 MSR_IA32_VMX_PROCBASED_CTLS,
1543 MSR_IA32_VMX_TRUE_EXIT_CTLS,
1544 MSR_IA32_VMX_EXIT_CTLS,
1545 MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1546 MSR_IA32_VMX_ENTRY_CTLS,
1548 MSR_IA32_VMX_CR0_FIXED0,
1549 MSR_IA32_VMX_CR0_FIXED1,
1550 MSR_IA32_VMX_CR4_FIXED0,
1551 MSR_IA32_VMX_CR4_FIXED1,
1552 MSR_IA32_VMX_VMCS_ENUM,
1553 MSR_IA32_VMX_PROCBASED_CTLS2,
1554 MSR_IA32_VMX_EPT_VPID_CAP,
1555 MSR_IA32_VMX_VMFUNC,
1559 MSR_IA32_ARCH_CAPABILITIES,
1560 MSR_IA32_PERF_CAPABILITIES,
1563 static u32 msr_based_features[ARRAY_SIZE(msr_based_features_all)];
1564 static unsigned int num_msr_based_features;
1566 static u64 kvm_get_arch_capabilities(void)
1570 if (boot_cpu_has(X86_FEATURE_ARCH_CAPABILITIES))
1571 rdmsrl(MSR_IA32_ARCH_CAPABILITIES, data);
1574 * If nx_huge_pages is enabled, KVM's shadow paging will ensure that
1575 * the nested hypervisor runs with NX huge pages. If it is not,
1576 * L1 is anyway vulnerable to ITLB_MULTIHIT exploits from other
1577 * L1 guests, so it need not worry about its own (L2) guests.
1579 data |= ARCH_CAP_PSCHANGE_MC_NO;
1582 * If we're doing cache flushes (either "always" or "cond")
1583 * we will do one whenever the guest does a vmlaunch/vmresume.
1584 * If an outer hypervisor is doing the cache flush for us
1585 * (VMENTER_L1D_FLUSH_NESTED_VM), we can safely pass that
1586 * capability to the guest too, and if EPT is disabled we're not
1587 * vulnerable. Overall, only VMENTER_L1D_FLUSH_NEVER will
1588 * require a nested hypervisor to do a flush of its own.
1590 if (l1tf_vmx_mitigation != VMENTER_L1D_FLUSH_NEVER)
1591 data |= ARCH_CAP_SKIP_VMENTRY_L1DFLUSH;
1593 if (!boot_cpu_has_bug(X86_BUG_CPU_MELTDOWN))
1594 data |= ARCH_CAP_RDCL_NO;
1595 if (!boot_cpu_has_bug(X86_BUG_SPEC_STORE_BYPASS))
1596 data |= ARCH_CAP_SSB_NO;
1597 if (!boot_cpu_has_bug(X86_BUG_MDS))
1598 data |= ARCH_CAP_MDS_NO;
1600 if (!boot_cpu_has(X86_FEATURE_RTM)) {
1602 * If RTM=0 because the kernel has disabled TSX, the host might
1603 * have TAA_NO or TSX_CTRL. Clear TAA_NO (the guest sees RTM=0
1604 * and therefore knows that there cannot be TAA) but keep
1605 * TSX_CTRL: some buggy userspaces leave it set on tsx=on hosts,
1606 * and we want to allow migrating those guests to tsx=off hosts.
1608 data &= ~ARCH_CAP_TAA_NO;
1609 } else if (!boot_cpu_has_bug(X86_BUG_TAA)) {
1610 data |= ARCH_CAP_TAA_NO;
1613 * Nothing to do here; we emulate TSX_CTRL if present on the
1614 * host so the guest can choose between disabling TSX or
1615 * using VERW to clear CPU buffers.
1622 static int kvm_get_msr_feature(struct kvm_msr_entry *msr)
1624 switch (msr->index) {
1625 case MSR_IA32_ARCH_CAPABILITIES:
1626 msr->data = kvm_get_arch_capabilities();
1628 case MSR_IA32_UCODE_REV:
1629 rdmsrl_safe(msr->index, &msr->data);
1632 return static_call(kvm_x86_get_msr_feature)(msr);
1637 static int do_get_msr_feature(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1639 struct kvm_msr_entry msr;
1643 r = kvm_get_msr_feature(&msr);
1645 if (r == KVM_MSR_RET_INVALID) {
1646 /* Unconditionally clear the output for simplicity */
1648 if (kvm_msr_ignored_check(index, 0, false))
1660 static bool __kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1662 if (efer & EFER_FFXSR && !guest_cpuid_has(vcpu, X86_FEATURE_FXSR_OPT))
1665 if (efer & EFER_SVME && !guest_cpuid_has(vcpu, X86_FEATURE_SVM))
1668 if (efer & (EFER_LME | EFER_LMA) &&
1669 !guest_cpuid_has(vcpu, X86_FEATURE_LM))
1672 if (efer & EFER_NX && !guest_cpuid_has(vcpu, X86_FEATURE_NX))
1678 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1680 if (efer & efer_reserved_bits)
1683 return __kvm_valid_efer(vcpu, efer);
1685 EXPORT_SYMBOL_GPL(kvm_valid_efer);
1687 static int set_efer(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
1689 u64 old_efer = vcpu->arch.efer;
1690 u64 efer = msr_info->data;
1693 if (efer & efer_reserved_bits)
1696 if (!msr_info->host_initiated) {
1697 if (!__kvm_valid_efer(vcpu, efer))
1700 if (is_paging(vcpu) &&
1701 (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1706 efer |= vcpu->arch.efer & EFER_LMA;
1708 r = static_call(kvm_x86_set_efer)(vcpu, efer);
1714 if ((efer ^ old_efer) & KVM_MMU_EFER_ROLE_BITS)
1715 kvm_mmu_reset_context(vcpu);
1720 void kvm_enable_efer_bits(u64 mask)
1722 efer_reserved_bits &= ~mask;
1724 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1726 bool kvm_msr_allowed(struct kvm_vcpu *vcpu, u32 index, u32 type)
1728 struct kvm_x86_msr_filter *msr_filter;
1729 struct msr_bitmap_range *ranges;
1730 struct kvm *kvm = vcpu->kvm;
1735 /* x2APIC MSRs do not support filtering. */
1736 if (index >= 0x800 && index <= 0x8ff)
1739 idx = srcu_read_lock(&kvm->srcu);
1741 msr_filter = srcu_dereference(kvm->arch.msr_filter, &kvm->srcu);
1747 allowed = msr_filter->default_allow;
1748 ranges = msr_filter->ranges;
1750 for (i = 0; i < msr_filter->count; i++) {
1751 u32 start = ranges[i].base;
1752 u32 end = start + ranges[i].nmsrs;
1753 u32 flags = ranges[i].flags;
1754 unsigned long *bitmap = ranges[i].bitmap;
1756 if ((index >= start) && (index < end) && (flags & type)) {
1757 allowed = !!test_bit(index - start, bitmap);
1763 srcu_read_unlock(&kvm->srcu, idx);
1767 EXPORT_SYMBOL_GPL(kvm_msr_allowed);
1770 * Write @data into the MSR specified by @index. Select MSR specific fault
1771 * checks are bypassed if @host_initiated is %true.
1772 * Returns 0 on success, non-0 otherwise.
1773 * Assumes vcpu_load() was already called.
1775 static int __kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data,
1776 bool host_initiated)
1778 struct msr_data msr;
1783 case MSR_KERNEL_GS_BASE:
1786 if (is_noncanonical_address(data, vcpu))
1789 case MSR_IA32_SYSENTER_EIP:
1790 case MSR_IA32_SYSENTER_ESP:
1792 * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1793 * non-canonical address is written on Intel but not on
1794 * AMD (which ignores the top 32-bits, because it does
1795 * not implement 64-bit SYSENTER).
1797 * 64-bit code should hence be able to write a non-canonical
1798 * value on AMD. Making the address canonical ensures that
1799 * vmentry does not fail on Intel after writing a non-canonical
1800 * value, and that something deterministic happens if the guest
1801 * invokes 64-bit SYSENTER.
1803 data = __canonical_address(data, vcpu_virt_addr_bits(vcpu));
1806 if (!kvm_is_supported_user_return_msr(MSR_TSC_AUX))
1809 if (!host_initiated &&
1810 !guest_cpuid_has(vcpu, X86_FEATURE_RDTSCP) &&
1811 !guest_cpuid_has(vcpu, X86_FEATURE_RDPID))
1815 * Per Intel's SDM, bits 63:32 are reserved, but AMD's APM has
1816 * incomplete and conflicting architectural behavior. Current
1817 * AMD CPUs completely ignore bits 63:32, i.e. they aren't
1818 * reserved and always read as zeros. Enforce Intel's reserved
1819 * bits check if and only if the guest CPU is Intel, and clear
1820 * the bits in all other cases. This ensures cross-vendor
1821 * migration will provide consistent behavior for the guest.
1823 if (guest_cpuid_is_intel(vcpu) && (data >> 32) != 0)
1832 msr.host_initiated = host_initiated;
1834 return static_call(kvm_x86_set_msr)(vcpu, &msr);
1837 static int kvm_set_msr_ignored_check(struct kvm_vcpu *vcpu,
1838 u32 index, u64 data, bool host_initiated)
1840 int ret = __kvm_set_msr(vcpu, index, data, host_initiated);
1842 if (ret == KVM_MSR_RET_INVALID)
1843 if (kvm_msr_ignored_check(index, data, true))
1850 * Read the MSR specified by @index into @data. Select MSR specific fault
1851 * checks are bypassed if @host_initiated is %true.
1852 * Returns 0 on success, non-0 otherwise.
1853 * Assumes vcpu_load() was already called.
1855 int __kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data,
1856 bool host_initiated)
1858 struct msr_data msr;
1863 if (!kvm_is_supported_user_return_msr(MSR_TSC_AUX))
1866 if (!host_initiated &&
1867 !guest_cpuid_has(vcpu, X86_FEATURE_RDTSCP) &&
1868 !guest_cpuid_has(vcpu, X86_FEATURE_RDPID))
1874 msr.host_initiated = host_initiated;
1876 ret = static_call(kvm_x86_get_msr)(vcpu, &msr);
1882 static int kvm_get_msr_ignored_check(struct kvm_vcpu *vcpu,
1883 u32 index, u64 *data, bool host_initiated)
1885 int ret = __kvm_get_msr(vcpu, index, data, host_initiated);
1887 if (ret == KVM_MSR_RET_INVALID) {
1888 /* Unconditionally clear *data for simplicity */
1890 if (kvm_msr_ignored_check(index, 0, false))
1897 static int kvm_get_msr_with_filter(struct kvm_vcpu *vcpu, u32 index, u64 *data)
1899 if (!kvm_msr_allowed(vcpu, index, KVM_MSR_FILTER_READ))
1900 return KVM_MSR_RET_FILTERED;
1901 return kvm_get_msr_ignored_check(vcpu, index, data, false);
1904 static int kvm_set_msr_with_filter(struct kvm_vcpu *vcpu, u32 index, u64 data)
1906 if (!kvm_msr_allowed(vcpu, index, KVM_MSR_FILTER_WRITE))
1907 return KVM_MSR_RET_FILTERED;
1908 return kvm_set_msr_ignored_check(vcpu, index, data, false);
1911 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data)
1913 return kvm_get_msr_ignored_check(vcpu, index, data, false);
1915 EXPORT_SYMBOL_GPL(kvm_get_msr);
1917 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data)
1919 return kvm_set_msr_ignored_check(vcpu, index, data, false);
1921 EXPORT_SYMBOL_GPL(kvm_set_msr);
1923 static void complete_userspace_rdmsr(struct kvm_vcpu *vcpu)
1925 if (!vcpu->run->msr.error) {
1926 kvm_rax_write(vcpu, (u32)vcpu->run->msr.data);
1927 kvm_rdx_write(vcpu, vcpu->run->msr.data >> 32);
1931 static int complete_emulated_msr_access(struct kvm_vcpu *vcpu)
1933 return complete_emulated_insn_gp(vcpu, vcpu->run->msr.error);
1936 static int complete_emulated_rdmsr(struct kvm_vcpu *vcpu)
1938 complete_userspace_rdmsr(vcpu);
1939 return complete_emulated_msr_access(vcpu);
1942 static int complete_fast_msr_access(struct kvm_vcpu *vcpu)
1944 return static_call(kvm_x86_complete_emulated_msr)(vcpu, vcpu->run->msr.error);
1947 static int complete_fast_rdmsr(struct kvm_vcpu *vcpu)
1949 complete_userspace_rdmsr(vcpu);
1950 return complete_fast_msr_access(vcpu);
1953 static u64 kvm_msr_reason(int r)
1956 case KVM_MSR_RET_INVALID:
1957 return KVM_MSR_EXIT_REASON_UNKNOWN;
1958 case KVM_MSR_RET_FILTERED:
1959 return KVM_MSR_EXIT_REASON_FILTER;
1961 return KVM_MSR_EXIT_REASON_INVAL;
1965 static int kvm_msr_user_space(struct kvm_vcpu *vcpu, u32 index,
1966 u32 exit_reason, u64 data,
1967 int (*completion)(struct kvm_vcpu *vcpu),
1970 u64 msr_reason = kvm_msr_reason(r);
1972 /* Check if the user wanted to know about this MSR fault */
1973 if (!(vcpu->kvm->arch.user_space_msr_mask & msr_reason))
1976 vcpu->run->exit_reason = exit_reason;
1977 vcpu->run->msr.error = 0;
1978 memset(vcpu->run->msr.pad, 0, sizeof(vcpu->run->msr.pad));
1979 vcpu->run->msr.reason = msr_reason;
1980 vcpu->run->msr.index = index;
1981 vcpu->run->msr.data = data;
1982 vcpu->arch.complete_userspace_io = completion;
1987 int kvm_emulate_rdmsr(struct kvm_vcpu *vcpu)
1989 u32 ecx = kvm_rcx_read(vcpu);
1993 r = kvm_get_msr_with_filter(vcpu, ecx, &data);
1996 trace_kvm_msr_read(ecx, data);
1998 kvm_rax_write(vcpu, data & -1u);
1999 kvm_rdx_write(vcpu, (data >> 32) & -1u);
2001 /* MSR read failed? See if we should ask user space */
2002 if (kvm_msr_user_space(vcpu, ecx, KVM_EXIT_X86_RDMSR, 0,
2003 complete_fast_rdmsr, r))
2005 trace_kvm_msr_read_ex(ecx);
2008 return static_call(kvm_x86_complete_emulated_msr)(vcpu, r);
2010 EXPORT_SYMBOL_GPL(kvm_emulate_rdmsr);
2012 int kvm_emulate_wrmsr(struct kvm_vcpu *vcpu)
2014 u32 ecx = kvm_rcx_read(vcpu);
2015 u64 data = kvm_read_edx_eax(vcpu);
2018 r = kvm_set_msr_with_filter(vcpu, ecx, data);
2021 trace_kvm_msr_write(ecx, data);
2023 /* MSR write failed? See if we should ask user space */
2024 if (kvm_msr_user_space(vcpu, ecx, KVM_EXIT_X86_WRMSR, data,
2025 complete_fast_msr_access, r))
2027 /* Signal all other negative errors to userspace */
2030 trace_kvm_msr_write_ex(ecx, data);
2033 return static_call(kvm_x86_complete_emulated_msr)(vcpu, r);
2035 EXPORT_SYMBOL_GPL(kvm_emulate_wrmsr);
2037 int kvm_emulate_as_nop(struct kvm_vcpu *vcpu)
2039 return kvm_skip_emulated_instruction(vcpu);
2041 EXPORT_SYMBOL_GPL(kvm_emulate_as_nop);
2043 int kvm_emulate_invd(struct kvm_vcpu *vcpu)
2045 /* Treat an INVD instruction as a NOP and just skip it. */
2046 return kvm_emulate_as_nop(vcpu);
2048 EXPORT_SYMBOL_GPL(kvm_emulate_invd);
2050 int kvm_emulate_mwait(struct kvm_vcpu *vcpu)
2052 pr_warn_once("kvm: MWAIT instruction emulated as NOP!\n");
2053 return kvm_emulate_as_nop(vcpu);
2055 EXPORT_SYMBOL_GPL(kvm_emulate_mwait);
2057 int kvm_handle_invalid_op(struct kvm_vcpu *vcpu)
2059 kvm_queue_exception(vcpu, UD_VECTOR);
2062 EXPORT_SYMBOL_GPL(kvm_handle_invalid_op);
2064 int kvm_emulate_monitor(struct kvm_vcpu *vcpu)
2066 pr_warn_once("kvm: MONITOR instruction emulated as NOP!\n");
2067 return kvm_emulate_as_nop(vcpu);
2069 EXPORT_SYMBOL_GPL(kvm_emulate_monitor);
2071 static inline bool kvm_vcpu_exit_request(struct kvm_vcpu *vcpu)
2073 xfer_to_guest_mode_prepare();
2074 return vcpu->mode == EXITING_GUEST_MODE || kvm_request_pending(vcpu) ||
2075 xfer_to_guest_mode_work_pending();
2079 * The fast path for frequent and performance sensitive wrmsr emulation,
2080 * i.e. the sending of IPI, sending IPI early in the VM-Exit flow reduces
2081 * the latency of virtual IPI by avoiding the expensive bits of transitioning
2082 * from guest to host, e.g. reacquiring KVM's SRCU lock. In contrast to the
2083 * other cases which must be called after interrupts are enabled on the host.
2085 static int handle_fastpath_set_x2apic_icr_irqoff(struct kvm_vcpu *vcpu, u64 data)
2087 if (!lapic_in_kernel(vcpu) || !apic_x2apic_mode(vcpu->arch.apic))
2090 if (((data & APIC_SHORT_MASK) == APIC_DEST_NOSHORT) &&
2091 ((data & APIC_DEST_MASK) == APIC_DEST_PHYSICAL) &&
2092 ((data & APIC_MODE_MASK) == APIC_DM_FIXED) &&
2093 ((u32)(data >> 32) != X2APIC_BROADCAST))
2094 return kvm_x2apic_icr_write(vcpu->arch.apic, data);
2099 static int handle_fastpath_set_tscdeadline(struct kvm_vcpu *vcpu, u64 data)
2101 if (!kvm_can_use_hv_timer(vcpu))
2104 kvm_set_lapic_tscdeadline_msr(vcpu, data);
2108 fastpath_t handle_fastpath_set_msr_irqoff(struct kvm_vcpu *vcpu)
2110 u32 msr = kvm_rcx_read(vcpu);
2112 fastpath_t ret = EXIT_FASTPATH_NONE;
2115 case APIC_BASE_MSR + (APIC_ICR >> 4):
2116 data = kvm_read_edx_eax(vcpu);
2117 if (!handle_fastpath_set_x2apic_icr_irqoff(vcpu, data)) {
2118 kvm_skip_emulated_instruction(vcpu);
2119 ret = EXIT_FASTPATH_EXIT_HANDLED;
2122 case MSR_IA32_TSC_DEADLINE:
2123 data = kvm_read_edx_eax(vcpu);
2124 if (!handle_fastpath_set_tscdeadline(vcpu, data)) {
2125 kvm_skip_emulated_instruction(vcpu);
2126 ret = EXIT_FASTPATH_REENTER_GUEST;
2133 if (ret != EXIT_FASTPATH_NONE)
2134 trace_kvm_msr_write(msr, data);
2138 EXPORT_SYMBOL_GPL(handle_fastpath_set_msr_irqoff);
2141 * Adapt set_msr() to msr_io()'s calling convention
2143 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
2145 return kvm_get_msr_ignored_check(vcpu, index, data, true);
2148 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
2150 return kvm_set_msr_ignored_check(vcpu, index, *data, true);
2153 #ifdef CONFIG_X86_64
2154 struct pvclock_clock {
2164 struct pvclock_gtod_data {
2167 struct pvclock_clock clock; /* extract of a clocksource struct */
2168 struct pvclock_clock raw_clock; /* extract of a clocksource struct */
2174 static struct pvclock_gtod_data pvclock_gtod_data;
2176 static void update_pvclock_gtod(struct timekeeper *tk)
2178 struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
2180 write_seqcount_begin(&vdata->seq);
2182 /* copy pvclock gtod data */
2183 vdata->clock.vclock_mode = tk->tkr_mono.clock->vdso_clock_mode;
2184 vdata->clock.cycle_last = tk->tkr_mono.cycle_last;
2185 vdata->clock.mask = tk->tkr_mono.mask;
2186 vdata->clock.mult = tk->tkr_mono.mult;
2187 vdata->clock.shift = tk->tkr_mono.shift;
2188 vdata->clock.base_cycles = tk->tkr_mono.xtime_nsec;
2189 vdata->clock.offset = tk->tkr_mono.base;
2191 vdata->raw_clock.vclock_mode = tk->tkr_raw.clock->vdso_clock_mode;
2192 vdata->raw_clock.cycle_last = tk->tkr_raw.cycle_last;
2193 vdata->raw_clock.mask = tk->tkr_raw.mask;
2194 vdata->raw_clock.mult = tk->tkr_raw.mult;
2195 vdata->raw_clock.shift = tk->tkr_raw.shift;
2196 vdata->raw_clock.base_cycles = tk->tkr_raw.xtime_nsec;
2197 vdata->raw_clock.offset = tk->tkr_raw.base;
2199 vdata->wall_time_sec = tk->xtime_sec;
2201 vdata->offs_boot = tk->offs_boot;
2203 write_seqcount_end(&vdata->seq);
2206 static s64 get_kvmclock_base_ns(void)
2208 /* Count up from boot time, but with the frequency of the raw clock. */
2209 return ktime_to_ns(ktime_add(ktime_get_raw(), pvclock_gtod_data.offs_boot));
2212 static s64 get_kvmclock_base_ns(void)
2214 /* Master clock not used, so we can just use CLOCK_BOOTTIME. */
2215 return ktime_get_boottime_ns();
2219 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock, int sec_hi_ofs)
2223 struct pvclock_wall_clock wc;
2230 r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
2235 ++version; /* first time write, random junk */
2239 if (kvm_write_guest(kvm, wall_clock, &version, sizeof(version)))
2243 * The guest calculates current wall clock time by adding
2244 * system time (updated by kvm_guest_time_update below) to the
2245 * wall clock specified here. We do the reverse here.
2247 wall_nsec = ktime_get_real_ns() - get_kvmclock_ns(kvm);
2249 wc.nsec = do_div(wall_nsec, 1000000000);
2250 wc.sec = (u32)wall_nsec; /* overflow in 2106 guest time */
2251 wc.version = version;
2253 kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
2256 wc_sec_hi = wall_nsec >> 32;
2257 kvm_write_guest(kvm, wall_clock + sec_hi_ofs,
2258 &wc_sec_hi, sizeof(wc_sec_hi));
2262 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
2265 static void kvm_write_system_time(struct kvm_vcpu *vcpu, gpa_t system_time,
2266 bool old_msr, bool host_initiated)
2268 struct kvm_arch *ka = &vcpu->kvm->arch;
2270 if (vcpu->vcpu_id == 0 && !host_initiated) {
2271 if (ka->boot_vcpu_runs_old_kvmclock != old_msr)
2272 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2274 ka->boot_vcpu_runs_old_kvmclock = old_msr;
2277 vcpu->arch.time = system_time;
2278 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2280 /* we verify if the enable bit is set... */
2281 if (system_time & 1) {
2282 kvm_gfn_to_pfn_cache_init(vcpu->kvm, &vcpu->arch.pv_time, vcpu,
2283 KVM_HOST_USES_PFN, system_time & ~1ULL,
2284 sizeof(struct pvclock_vcpu_time_info));
2286 kvm_gfn_to_pfn_cache_destroy(vcpu->kvm, &vcpu->arch.pv_time);
2292 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
2294 do_shl32_div32(dividend, divisor);
2298 static void kvm_get_time_scale(uint64_t scaled_hz, uint64_t base_hz,
2299 s8 *pshift, u32 *pmultiplier)
2307 scaled64 = scaled_hz;
2308 while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
2313 tps32 = (uint32_t)tps64;
2314 while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
2315 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
2323 *pmultiplier = div_frac(scaled64, tps32);
2326 #ifdef CONFIG_X86_64
2327 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
2330 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
2331 static unsigned long max_tsc_khz;
2333 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
2335 u64 v = (u64)khz * (1000000 + ppm);
2340 static void kvm_vcpu_write_tsc_multiplier(struct kvm_vcpu *vcpu, u64 l1_multiplier);
2342 static int set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale)
2346 /* Guest TSC same frequency as host TSC? */
2348 kvm_vcpu_write_tsc_multiplier(vcpu, kvm_default_tsc_scaling_ratio);
2352 /* TSC scaling supported? */
2353 if (!kvm_has_tsc_control) {
2354 if (user_tsc_khz > tsc_khz) {
2355 vcpu->arch.tsc_catchup = 1;
2356 vcpu->arch.tsc_always_catchup = 1;
2359 pr_warn_ratelimited("user requested TSC rate below hardware speed\n");
2364 /* TSC scaling required - calculate ratio */
2365 ratio = mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits,
2366 user_tsc_khz, tsc_khz);
2368 if (ratio == 0 || ratio >= kvm_max_tsc_scaling_ratio) {
2369 pr_warn_ratelimited("Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
2374 kvm_vcpu_write_tsc_multiplier(vcpu, ratio);
2378 static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz)
2380 u32 thresh_lo, thresh_hi;
2381 int use_scaling = 0;
2383 /* tsc_khz can be zero if TSC calibration fails */
2384 if (user_tsc_khz == 0) {
2385 /* set tsc_scaling_ratio to a safe value */
2386 kvm_vcpu_write_tsc_multiplier(vcpu, kvm_default_tsc_scaling_ratio);
2390 /* Compute a scale to convert nanoseconds in TSC cycles */
2391 kvm_get_time_scale(user_tsc_khz * 1000LL, NSEC_PER_SEC,
2392 &vcpu->arch.virtual_tsc_shift,
2393 &vcpu->arch.virtual_tsc_mult);
2394 vcpu->arch.virtual_tsc_khz = user_tsc_khz;
2397 * Compute the variation in TSC rate which is acceptable
2398 * within the range of tolerance and decide if the
2399 * rate being applied is within that bounds of the hardware
2400 * rate. If so, no scaling or compensation need be done.
2402 thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
2403 thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
2404 if (user_tsc_khz < thresh_lo || user_tsc_khz > thresh_hi) {
2405 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz, thresh_lo, thresh_hi);
2408 return set_tsc_khz(vcpu, user_tsc_khz, use_scaling);
2411 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
2413 u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
2414 vcpu->arch.virtual_tsc_mult,
2415 vcpu->arch.virtual_tsc_shift);
2416 tsc += vcpu->arch.this_tsc_write;
2420 #ifdef CONFIG_X86_64
2421 static inline int gtod_is_based_on_tsc(int mode)
2423 return mode == VDSO_CLOCKMODE_TSC || mode == VDSO_CLOCKMODE_HVCLOCK;
2427 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
2429 #ifdef CONFIG_X86_64
2431 struct kvm_arch *ka = &vcpu->kvm->arch;
2432 struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2434 vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
2435 atomic_read(&vcpu->kvm->online_vcpus));
2438 * Once the masterclock is enabled, always perform request in
2439 * order to update it.
2441 * In order to enable masterclock, the host clocksource must be TSC
2442 * and the vcpus need to have matched TSCs. When that happens,
2443 * perform request to enable masterclock.
2445 if (ka->use_master_clock ||
2446 (gtod_is_based_on_tsc(gtod->clock.vclock_mode) && vcpus_matched))
2447 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2449 trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
2450 atomic_read(&vcpu->kvm->online_vcpus),
2451 ka->use_master_clock, gtod->clock.vclock_mode);
2456 * Multiply tsc by a fixed point number represented by ratio.
2458 * The most significant 64-N bits (mult) of ratio represent the
2459 * integral part of the fixed point number; the remaining N bits
2460 * (frac) represent the fractional part, ie. ratio represents a fixed
2461 * point number (mult + frac * 2^(-N)).
2463 * N equals to kvm_tsc_scaling_ratio_frac_bits.
2465 static inline u64 __scale_tsc(u64 ratio, u64 tsc)
2467 return mul_u64_u64_shr(tsc, ratio, kvm_tsc_scaling_ratio_frac_bits);
2470 u64 kvm_scale_tsc(u64 tsc, u64 ratio)
2474 if (ratio != kvm_default_tsc_scaling_ratio)
2475 _tsc = __scale_tsc(ratio, tsc);
2479 EXPORT_SYMBOL_GPL(kvm_scale_tsc);
2481 static u64 kvm_compute_l1_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
2485 tsc = kvm_scale_tsc(rdtsc(), vcpu->arch.l1_tsc_scaling_ratio);
2487 return target_tsc - tsc;
2490 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc)
2492 return vcpu->arch.l1_tsc_offset +
2493 kvm_scale_tsc(host_tsc, vcpu->arch.l1_tsc_scaling_ratio);
2495 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc);
2497 u64 kvm_calc_nested_tsc_offset(u64 l1_offset, u64 l2_offset, u64 l2_multiplier)
2501 if (l2_multiplier == kvm_default_tsc_scaling_ratio)
2502 nested_offset = l1_offset;
2504 nested_offset = mul_s64_u64_shr((s64) l1_offset, l2_multiplier,
2505 kvm_tsc_scaling_ratio_frac_bits);
2507 nested_offset += l2_offset;
2508 return nested_offset;
2510 EXPORT_SYMBOL_GPL(kvm_calc_nested_tsc_offset);
2512 u64 kvm_calc_nested_tsc_multiplier(u64 l1_multiplier, u64 l2_multiplier)
2514 if (l2_multiplier != kvm_default_tsc_scaling_ratio)
2515 return mul_u64_u64_shr(l1_multiplier, l2_multiplier,
2516 kvm_tsc_scaling_ratio_frac_bits);
2518 return l1_multiplier;
2520 EXPORT_SYMBOL_GPL(kvm_calc_nested_tsc_multiplier);
2522 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu *vcpu, u64 l1_offset)
2524 trace_kvm_write_tsc_offset(vcpu->vcpu_id,
2525 vcpu->arch.l1_tsc_offset,
2528 vcpu->arch.l1_tsc_offset = l1_offset;
2531 * If we are here because L1 chose not to trap WRMSR to TSC then
2532 * according to the spec this should set L1's TSC (as opposed to
2533 * setting L1's offset for L2).
2535 if (is_guest_mode(vcpu))
2536 vcpu->arch.tsc_offset = kvm_calc_nested_tsc_offset(
2538 static_call(kvm_x86_get_l2_tsc_offset)(vcpu),
2539 static_call(kvm_x86_get_l2_tsc_multiplier)(vcpu));
2541 vcpu->arch.tsc_offset = l1_offset;
2543 static_call(kvm_x86_write_tsc_offset)(vcpu, vcpu->arch.tsc_offset);
2546 static void kvm_vcpu_write_tsc_multiplier(struct kvm_vcpu *vcpu, u64 l1_multiplier)
2548 vcpu->arch.l1_tsc_scaling_ratio = l1_multiplier;
2550 /* Userspace is changing the multiplier while L2 is active */
2551 if (is_guest_mode(vcpu))
2552 vcpu->arch.tsc_scaling_ratio = kvm_calc_nested_tsc_multiplier(
2554 static_call(kvm_x86_get_l2_tsc_multiplier)(vcpu));
2556 vcpu->arch.tsc_scaling_ratio = l1_multiplier;
2558 if (kvm_has_tsc_control)
2559 static_call(kvm_x86_write_tsc_multiplier)(
2560 vcpu, vcpu->arch.tsc_scaling_ratio);
2563 static inline bool kvm_check_tsc_unstable(void)
2565 #ifdef CONFIG_X86_64
2567 * TSC is marked unstable when we're running on Hyper-V,
2568 * 'TSC page' clocksource is good.
2570 if (pvclock_gtod_data.clock.vclock_mode == VDSO_CLOCKMODE_HVCLOCK)
2573 return check_tsc_unstable();
2577 * Infers attempts to synchronize the guest's tsc from host writes. Sets the
2578 * offset for the vcpu and tracks the TSC matching generation that the vcpu
2581 static void __kvm_synchronize_tsc(struct kvm_vcpu *vcpu, u64 offset, u64 tsc,
2582 u64 ns, bool matched)
2584 struct kvm *kvm = vcpu->kvm;
2586 lockdep_assert_held(&kvm->arch.tsc_write_lock);
2589 * We also track th most recent recorded KHZ, write and time to
2590 * allow the matching interval to be extended at each write.
2592 kvm->arch.last_tsc_nsec = ns;
2593 kvm->arch.last_tsc_write = tsc;
2594 kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
2595 kvm->arch.last_tsc_offset = offset;
2597 vcpu->arch.last_guest_tsc = tsc;
2599 kvm_vcpu_write_tsc_offset(vcpu, offset);
2603 * We split periods of matched TSC writes into generations.
2604 * For each generation, we track the original measured
2605 * nanosecond time, offset, and write, so if TSCs are in
2606 * sync, we can match exact offset, and if not, we can match
2607 * exact software computation in compute_guest_tsc()
2609 * These values are tracked in kvm->arch.cur_xxx variables.
2611 kvm->arch.cur_tsc_generation++;
2612 kvm->arch.cur_tsc_nsec = ns;
2613 kvm->arch.cur_tsc_write = tsc;
2614 kvm->arch.cur_tsc_offset = offset;
2615 kvm->arch.nr_vcpus_matched_tsc = 0;
2616 } else if (vcpu->arch.this_tsc_generation != kvm->arch.cur_tsc_generation) {
2617 kvm->arch.nr_vcpus_matched_tsc++;
2620 /* Keep track of which generation this VCPU has synchronized to */
2621 vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
2622 vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
2623 vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
2625 kvm_track_tsc_matching(vcpu);
2628 static void kvm_synchronize_tsc(struct kvm_vcpu *vcpu, u64 data)
2630 struct kvm *kvm = vcpu->kvm;
2631 u64 offset, ns, elapsed;
2632 unsigned long flags;
2633 bool matched = false;
2634 bool synchronizing = false;
2636 raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
2637 offset = kvm_compute_l1_tsc_offset(vcpu, data);
2638 ns = get_kvmclock_base_ns();
2639 elapsed = ns - kvm->arch.last_tsc_nsec;
2641 if (vcpu->arch.virtual_tsc_khz) {
2644 * detection of vcpu initialization -- need to sync
2645 * with other vCPUs. This particularly helps to keep
2646 * kvm_clock stable after CPU hotplug
2648 synchronizing = true;
2650 u64 tsc_exp = kvm->arch.last_tsc_write +
2651 nsec_to_cycles(vcpu, elapsed);
2652 u64 tsc_hz = vcpu->arch.virtual_tsc_khz * 1000LL;
2654 * Special case: TSC write with a small delta (1 second)
2655 * of virtual cycle time against real time is
2656 * interpreted as an attempt to synchronize the CPU.
2658 synchronizing = data < tsc_exp + tsc_hz &&
2659 data + tsc_hz > tsc_exp;
2664 * For a reliable TSC, we can match TSC offsets, and for an unstable
2665 * TSC, we add elapsed time in this computation. We could let the
2666 * compensation code attempt to catch up if we fall behind, but
2667 * it's better to try to match offsets from the beginning.
2669 if (synchronizing &&
2670 vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
2671 if (!kvm_check_tsc_unstable()) {
2672 offset = kvm->arch.cur_tsc_offset;
2674 u64 delta = nsec_to_cycles(vcpu, elapsed);
2676 offset = kvm_compute_l1_tsc_offset(vcpu, data);
2681 __kvm_synchronize_tsc(vcpu, offset, data, ns, matched);
2682 raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
2685 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
2688 u64 tsc_offset = vcpu->arch.l1_tsc_offset;
2689 kvm_vcpu_write_tsc_offset(vcpu, tsc_offset + adjustment);
2692 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
2694 if (vcpu->arch.l1_tsc_scaling_ratio != kvm_default_tsc_scaling_ratio)
2695 WARN_ON(adjustment < 0);
2696 adjustment = kvm_scale_tsc((u64) adjustment,
2697 vcpu->arch.l1_tsc_scaling_ratio);
2698 adjust_tsc_offset_guest(vcpu, adjustment);
2701 #ifdef CONFIG_X86_64
2703 static u64 read_tsc(void)
2705 u64 ret = (u64)rdtsc_ordered();
2706 u64 last = pvclock_gtod_data.clock.cycle_last;
2708 if (likely(ret >= last))
2712 * GCC likes to generate cmov here, but this branch is extremely
2713 * predictable (it's just a function of time and the likely is
2714 * very likely) and there's a data dependence, so force GCC
2715 * to generate a branch instead. I don't barrier() because
2716 * we don't actually need a barrier, and if this function
2717 * ever gets inlined it will generate worse code.
2723 static inline u64 vgettsc(struct pvclock_clock *clock, u64 *tsc_timestamp,
2729 switch (clock->vclock_mode) {
2730 case VDSO_CLOCKMODE_HVCLOCK:
2731 tsc_pg_val = hv_read_tsc_page_tsc(hv_get_tsc_page(),
2733 if (tsc_pg_val != U64_MAX) {
2734 /* TSC page valid */
2735 *mode = VDSO_CLOCKMODE_HVCLOCK;
2736 v = (tsc_pg_val - clock->cycle_last) &
2739 /* TSC page invalid */
2740 *mode = VDSO_CLOCKMODE_NONE;
2743 case VDSO_CLOCKMODE_TSC:
2744 *mode = VDSO_CLOCKMODE_TSC;
2745 *tsc_timestamp = read_tsc();
2746 v = (*tsc_timestamp - clock->cycle_last) &
2750 *mode = VDSO_CLOCKMODE_NONE;
2753 if (*mode == VDSO_CLOCKMODE_NONE)
2754 *tsc_timestamp = v = 0;
2756 return v * clock->mult;
2759 static int do_monotonic_raw(s64 *t, u64 *tsc_timestamp)
2761 struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2767 seq = read_seqcount_begin(>od->seq);
2768 ns = gtod->raw_clock.base_cycles;
2769 ns += vgettsc(>od->raw_clock, tsc_timestamp, &mode);
2770 ns >>= gtod->raw_clock.shift;
2771 ns += ktime_to_ns(ktime_add(gtod->raw_clock.offset, gtod->offs_boot));
2772 } while (unlikely(read_seqcount_retry(>od->seq, seq)));
2778 static int do_realtime(struct timespec64 *ts, u64 *tsc_timestamp)
2780 struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2786 seq = read_seqcount_begin(>od->seq);
2787 ts->tv_sec = gtod->wall_time_sec;
2788 ns = gtod->clock.base_cycles;
2789 ns += vgettsc(>od->clock, tsc_timestamp, &mode);
2790 ns >>= gtod->clock.shift;
2791 } while (unlikely(read_seqcount_retry(>od->seq, seq)));
2793 ts->tv_sec += __iter_div_u64_rem(ns, NSEC_PER_SEC, &ns);
2799 /* returns true if host is using TSC based clocksource */
2800 static bool kvm_get_time_and_clockread(s64 *kernel_ns, u64 *tsc_timestamp)
2802 /* checked again under seqlock below */
2803 if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2806 return gtod_is_based_on_tsc(do_monotonic_raw(kernel_ns,
2810 /* returns true if host is using TSC based clocksource */
2811 static bool kvm_get_walltime_and_clockread(struct timespec64 *ts,
2814 /* checked again under seqlock below */
2815 if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2818 return gtod_is_based_on_tsc(do_realtime(ts, tsc_timestamp));
2824 * Assuming a stable TSC across physical CPUS, and a stable TSC
2825 * across virtual CPUs, the following condition is possible.
2826 * Each numbered line represents an event visible to both
2827 * CPUs at the next numbered event.
2829 * "timespecX" represents host monotonic time. "tscX" represents
2832 * VCPU0 on CPU0 | VCPU1 on CPU1
2834 * 1. read timespec0,tsc0
2835 * 2. | timespec1 = timespec0 + N
2837 * 3. transition to guest | transition to guest
2838 * 4. ret0 = timespec0 + (rdtsc - tsc0) |
2839 * 5. | ret1 = timespec1 + (rdtsc - tsc1)
2840 * | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
2842 * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
2845 * - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
2847 * - 0 < N - M => M < N
2849 * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
2850 * always the case (the difference between two distinct xtime instances
2851 * might be smaller then the difference between corresponding TSC reads,
2852 * when updating guest vcpus pvclock areas).
2854 * To avoid that problem, do not allow visibility of distinct
2855 * system_timestamp/tsc_timestamp values simultaneously: use a master
2856 * copy of host monotonic time values. Update that master copy
2859 * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
2863 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
2865 #ifdef CONFIG_X86_64
2866 struct kvm_arch *ka = &kvm->arch;
2868 bool host_tsc_clocksource, vcpus_matched;
2870 lockdep_assert_held(&kvm->arch.tsc_write_lock);
2871 vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
2872 atomic_read(&kvm->online_vcpus));
2875 * If the host uses TSC clock, then passthrough TSC as stable
2878 host_tsc_clocksource = kvm_get_time_and_clockread(
2879 &ka->master_kernel_ns,
2880 &ka->master_cycle_now);
2882 ka->use_master_clock = host_tsc_clocksource && vcpus_matched
2883 && !ka->backwards_tsc_observed
2884 && !ka->boot_vcpu_runs_old_kvmclock;
2886 if (ka->use_master_clock)
2887 atomic_set(&kvm_guest_has_master_clock, 1);
2889 vclock_mode = pvclock_gtod_data.clock.vclock_mode;
2890 trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
2895 static void kvm_make_mclock_inprogress_request(struct kvm *kvm)
2897 kvm_make_all_cpus_request(kvm, KVM_REQ_MCLOCK_INPROGRESS);
2900 static void __kvm_start_pvclock_update(struct kvm *kvm)
2902 raw_spin_lock_irq(&kvm->arch.tsc_write_lock);
2903 write_seqcount_begin(&kvm->arch.pvclock_sc);
2906 static void kvm_start_pvclock_update(struct kvm *kvm)
2908 kvm_make_mclock_inprogress_request(kvm);
2910 /* no guest entries from this point */
2911 __kvm_start_pvclock_update(kvm);
2914 static void kvm_end_pvclock_update(struct kvm *kvm)
2916 struct kvm_arch *ka = &kvm->arch;
2917 struct kvm_vcpu *vcpu;
2920 write_seqcount_end(&ka->pvclock_sc);
2921 raw_spin_unlock_irq(&ka->tsc_write_lock);
2922 kvm_for_each_vcpu(i, vcpu, kvm)
2923 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2925 /* guest entries allowed */
2926 kvm_for_each_vcpu(i, vcpu, kvm)
2927 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
2930 static void kvm_update_masterclock(struct kvm *kvm)
2932 kvm_hv_request_tsc_page_update(kvm);
2933 kvm_start_pvclock_update(kvm);
2934 pvclock_update_vm_gtod_copy(kvm);
2935 kvm_end_pvclock_update(kvm);
2938 /* Called within read_seqcount_begin/retry for kvm->pvclock_sc. */
2939 static void __get_kvmclock(struct kvm *kvm, struct kvm_clock_data *data)
2941 struct kvm_arch *ka = &kvm->arch;
2942 struct pvclock_vcpu_time_info hv_clock;
2944 /* both __this_cpu_read() and rdtsc() should be on the same cpu */
2948 if (ka->use_master_clock && __this_cpu_read(cpu_tsc_khz)) {
2949 #ifdef CONFIG_X86_64
2950 struct timespec64 ts;
2952 if (kvm_get_walltime_and_clockread(&ts, &data->host_tsc)) {
2953 data->realtime = ts.tv_nsec + NSEC_PER_SEC * ts.tv_sec;
2954 data->flags |= KVM_CLOCK_REALTIME | KVM_CLOCK_HOST_TSC;
2957 data->host_tsc = rdtsc();
2959 data->flags |= KVM_CLOCK_TSC_STABLE;
2960 hv_clock.tsc_timestamp = ka->master_cycle_now;
2961 hv_clock.system_time = ka->master_kernel_ns + ka->kvmclock_offset;
2962 kvm_get_time_scale(NSEC_PER_SEC, __this_cpu_read(cpu_tsc_khz) * 1000LL,
2963 &hv_clock.tsc_shift,
2964 &hv_clock.tsc_to_system_mul);
2965 data->clock = __pvclock_read_cycles(&hv_clock, data->host_tsc);
2967 data->clock = get_kvmclock_base_ns() + ka->kvmclock_offset;
2973 static void get_kvmclock(struct kvm *kvm, struct kvm_clock_data *data)
2975 struct kvm_arch *ka = &kvm->arch;
2979 seq = read_seqcount_begin(&ka->pvclock_sc);
2980 __get_kvmclock(kvm, data);
2981 } while (read_seqcount_retry(&ka->pvclock_sc, seq));
2984 u64 get_kvmclock_ns(struct kvm *kvm)
2986 struct kvm_clock_data data;
2988 get_kvmclock(kvm, &data);
2992 static void kvm_setup_guest_pvclock(struct kvm_vcpu *v,
2993 struct gfn_to_pfn_cache *gpc,
2994 unsigned int offset)
2996 struct kvm_vcpu_arch *vcpu = &v->arch;
2997 struct pvclock_vcpu_time_info *guest_hv_clock;
2998 unsigned long flags;
3000 read_lock_irqsave(&gpc->lock, flags);
3001 while (!kvm_gfn_to_pfn_cache_check(v->kvm, gpc, gpc->gpa,
3002 offset + sizeof(*guest_hv_clock))) {
3003 read_unlock_irqrestore(&gpc->lock, flags);
3005 if (kvm_gfn_to_pfn_cache_refresh(v->kvm, gpc, gpc->gpa,
3006 offset + sizeof(*guest_hv_clock)))
3009 read_lock_irqsave(&gpc->lock, flags);
3012 guest_hv_clock = (void *)(gpc->khva + offset);
3015 * This VCPU is paused, but it's legal for a guest to read another
3016 * VCPU's kvmclock, so we really have to follow the specification where
3017 * it says that version is odd if data is being modified, and even after
3021 guest_hv_clock->version = vcpu->hv_clock.version = (guest_hv_clock->version + 1) | 1;
3024 /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
3025 vcpu->hv_clock.flags |= (guest_hv_clock->flags & PVCLOCK_GUEST_STOPPED);
3027 if (vcpu->pvclock_set_guest_stopped_request) {
3028 vcpu->hv_clock.flags |= PVCLOCK_GUEST_STOPPED;
3029 vcpu->pvclock_set_guest_stopped_request = false;
3032 memcpy(guest_hv_clock, &vcpu->hv_clock, sizeof(*guest_hv_clock));
3035 guest_hv_clock->version = ++vcpu->hv_clock.version;
3037 mark_page_dirty_in_slot(v->kvm, gpc->memslot, gpc->gpa >> PAGE_SHIFT);
3038 read_unlock_irqrestore(&gpc->lock, flags);
3040 trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
3043 static int kvm_guest_time_update(struct kvm_vcpu *v)
3045 unsigned long flags, tgt_tsc_khz;
3047 struct kvm_vcpu_arch *vcpu = &v->arch;
3048 struct kvm_arch *ka = &v->kvm->arch;
3050 u64 tsc_timestamp, host_tsc;
3052 bool use_master_clock;
3058 * If the host uses TSC clock, then passthrough TSC as stable
3062 seq = read_seqcount_begin(&ka->pvclock_sc);
3063 use_master_clock = ka->use_master_clock;
3064 if (use_master_clock) {
3065 host_tsc = ka->master_cycle_now;
3066 kernel_ns = ka->master_kernel_ns;
3068 } while (read_seqcount_retry(&ka->pvclock_sc, seq));
3070 /* Keep irq disabled to prevent changes to the clock */
3071 local_irq_save(flags);
3072 tgt_tsc_khz = __this_cpu_read(cpu_tsc_khz);
3073 if (unlikely(tgt_tsc_khz == 0)) {
3074 local_irq_restore(flags);
3075 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
3078 if (!use_master_clock) {
3080 kernel_ns = get_kvmclock_base_ns();
3083 tsc_timestamp = kvm_read_l1_tsc(v, host_tsc);
3086 * We may have to catch up the TSC to match elapsed wall clock
3087 * time for two reasons, even if kvmclock is used.
3088 * 1) CPU could have been running below the maximum TSC rate
3089 * 2) Broken TSC compensation resets the base at each VCPU
3090 * entry to avoid unknown leaps of TSC even when running
3091 * again on the same CPU. This may cause apparent elapsed
3092 * time to disappear, and the guest to stand still or run
3095 if (vcpu->tsc_catchup) {
3096 u64 tsc = compute_guest_tsc(v, kernel_ns);
3097 if (tsc > tsc_timestamp) {
3098 adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
3099 tsc_timestamp = tsc;
3103 local_irq_restore(flags);
3105 /* With all the info we got, fill in the values */
3107 if (kvm_has_tsc_control)
3108 tgt_tsc_khz = kvm_scale_tsc(tgt_tsc_khz,
3109 v->arch.l1_tsc_scaling_ratio);
3111 if (unlikely(vcpu->hw_tsc_khz != tgt_tsc_khz)) {
3112 kvm_get_time_scale(NSEC_PER_SEC, tgt_tsc_khz * 1000LL,
3113 &vcpu->hv_clock.tsc_shift,
3114 &vcpu->hv_clock.tsc_to_system_mul);
3115 vcpu->hw_tsc_khz = tgt_tsc_khz;
3118 vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
3119 vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
3120 vcpu->last_guest_tsc = tsc_timestamp;
3122 /* If the host uses TSC clocksource, then it is stable */
3124 if (use_master_clock)
3125 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
3127 vcpu->hv_clock.flags = pvclock_flags;
3129 if (vcpu->pv_time.active)
3130 kvm_setup_guest_pvclock(v, &vcpu->pv_time, 0);
3131 if (vcpu->xen.vcpu_info_cache.active)
3132 kvm_setup_guest_pvclock(v, &vcpu->xen.vcpu_info_cache,
3133 offsetof(struct compat_vcpu_info, time));
3134 if (vcpu->xen.vcpu_time_info_cache.active)
3135 kvm_setup_guest_pvclock(v, &vcpu->xen.vcpu_time_info_cache, 0);
3136 kvm_hv_setup_tsc_page(v->kvm, &vcpu->hv_clock);
3141 * kvmclock updates which are isolated to a given vcpu, such as
3142 * vcpu->cpu migration, should not allow system_timestamp from
3143 * the rest of the vcpus to remain static. Otherwise ntp frequency
3144 * correction applies to one vcpu's system_timestamp but not
3147 * So in those cases, request a kvmclock update for all vcpus.
3148 * We need to rate-limit these requests though, as they can
3149 * considerably slow guests that have a large number of vcpus.
3150 * The time for a remote vcpu to update its kvmclock is bound
3151 * by the delay we use to rate-limit the updates.
3154 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
3156 static void kvmclock_update_fn(struct work_struct *work)
3159 struct delayed_work *dwork = to_delayed_work(work);
3160 struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
3161 kvmclock_update_work);
3162 struct kvm *kvm = container_of(ka, struct kvm, arch);
3163 struct kvm_vcpu *vcpu;
3165 kvm_for_each_vcpu(i, vcpu, kvm) {
3166 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3167 kvm_vcpu_kick(vcpu);
3171 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
3173 struct kvm *kvm = v->kvm;
3175 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
3176 schedule_delayed_work(&kvm->arch.kvmclock_update_work,
3177 KVMCLOCK_UPDATE_DELAY);
3180 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
3182 static void kvmclock_sync_fn(struct work_struct *work)
3184 struct delayed_work *dwork = to_delayed_work(work);
3185 struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
3186 kvmclock_sync_work);
3187 struct kvm *kvm = container_of(ka, struct kvm, arch);
3189 if (!kvmclock_periodic_sync)
3192 schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
3193 schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
3194 KVMCLOCK_SYNC_PERIOD);
3198 * On AMD, HWCR[McStatusWrEn] controls whether setting MCi_STATUS results in #GP.
3200 static bool can_set_mci_status(struct kvm_vcpu *vcpu)
3202 /* McStatusWrEn enabled? */
3203 if (guest_cpuid_is_amd_or_hygon(vcpu))
3204 return !!(vcpu->arch.msr_hwcr & BIT_ULL(18));
3209 static int set_msr_mce(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3211 u64 mcg_cap = vcpu->arch.mcg_cap;
3212 unsigned bank_num = mcg_cap & 0xff;
3213 u32 msr = msr_info->index;
3214 u64 data = msr_info->data;
3217 case MSR_IA32_MCG_STATUS:
3218 vcpu->arch.mcg_status = data;
3220 case MSR_IA32_MCG_CTL:
3221 if (!(mcg_cap & MCG_CTL_P) &&
3222 (data || !msr_info->host_initiated))
3224 if (data != 0 && data != ~(u64)0)
3226 vcpu->arch.mcg_ctl = data;
3229 if (msr >= MSR_IA32_MC0_CTL &&
3230 msr < MSR_IA32_MCx_CTL(bank_num)) {
3231 u32 offset = array_index_nospec(
3232 msr - MSR_IA32_MC0_CTL,
3233 MSR_IA32_MCx_CTL(bank_num) - MSR_IA32_MC0_CTL);
3235 /* only 0 or all 1s can be written to IA32_MCi_CTL
3236 * some Linux kernels though clear bit 10 in bank 4 to
3237 * workaround a BIOS/GART TBL issue on AMD K8s, ignore
3238 * this to avoid an uncatched #GP in the guest.
3240 * UNIXWARE clears bit 0 of MC1_CTL to ignore
3241 * correctable, single-bit ECC data errors.
3243 if ((offset & 0x3) == 0 &&
3244 data != 0 && (data | (1 << 10) | 1) != ~(u64)0)
3248 if (!msr_info->host_initiated &&
3249 (offset & 0x3) == 1 && data != 0) {
3250 if (!can_set_mci_status(vcpu))
3254 vcpu->arch.mce_banks[offset] = data;
3262 static inline bool kvm_pv_async_pf_enabled(struct kvm_vcpu *vcpu)
3264 u64 mask = KVM_ASYNC_PF_ENABLED | KVM_ASYNC_PF_DELIVERY_AS_INT;
3266 return (vcpu->arch.apf.msr_en_val & mask) == mask;
3269 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
3271 gpa_t gpa = data & ~0x3f;
3273 /* Bits 4:5 are reserved, Should be zero */
3277 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_VMEXIT) &&
3278 (data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT))
3281 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT) &&
3282 (data & KVM_ASYNC_PF_DELIVERY_AS_INT))
3285 if (!lapic_in_kernel(vcpu))
3286 return data ? 1 : 0;
3288 vcpu->arch.apf.msr_en_val = data;
3290 if (!kvm_pv_async_pf_enabled(vcpu)) {
3291 kvm_clear_async_pf_completion_queue(vcpu);
3292 kvm_async_pf_hash_reset(vcpu);
3296 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
3300 vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
3301 vcpu->arch.apf.delivery_as_pf_vmexit = data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT;
3303 kvm_async_pf_wakeup_all(vcpu);
3308 static int kvm_pv_enable_async_pf_int(struct kvm_vcpu *vcpu, u64 data)
3310 /* Bits 8-63 are reserved */
3314 if (!lapic_in_kernel(vcpu))
3317 vcpu->arch.apf.msr_int_val = data;
3319 vcpu->arch.apf.vec = data & KVM_ASYNC_PF_VEC_MASK;
3324 static void kvmclock_reset(struct kvm_vcpu *vcpu)
3326 kvm_gfn_to_pfn_cache_destroy(vcpu->kvm, &vcpu->arch.pv_time);
3327 vcpu->arch.time = 0;
3330 static void kvm_vcpu_flush_tlb_all(struct kvm_vcpu *vcpu)
3332 ++vcpu->stat.tlb_flush;
3333 static_call(kvm_x86_flush_tlb_all)(vcpu);
3336 static void kvm_vcpu_flush_tlb_guest(struct kvm_vcpu *vcpu)
3338 ++vcpu->stat.tlb_flush;
3342 * A TLB flush on behalf of the guest is equivalent to
3343 * INVPCID(all), toggling CR4.PGE, etc., which requires
3344 * a forced sync of the shadow page tables. Ensure all the
3345 * roots are synced and the guest TLB in hardware is clean.
3347 kvm_mmu_sync_roots(vcpu);
3348 kvm_mmu_sync_prev_roots(vcpu);
3351 static_call(kvm_x86_flush_tlb_guest)(vcpu);
3355 static inline void kvm_vcpu_flush_tlb_current(struct kvm_vcpu *vcpu)
3357 ++vcpu->stat.tlb_flush;
3358 static_call(kvm_x86_flush_tlb_current)(vcpu);
3362 * Service "local" TLB flush requests, which are specific to the current MMU
3363 * context. In addition to the generic event handling in vcpu_enter_guest(),
3364 * TLB flushes that are targeted at an MMU context also need to be serviced
3365 * prior before nested VM-Enter/VM-Exit.
3367 void kvm_service_local_tlb_flush_requests(struct kvm_vcpu *vcpu)
3369 if (kvm_check_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu))
3370 kvm_vcpu_flush_tlb_current(vcpu);
3372 if (kvm_check_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu))
3373 kvm_vcpu_flush_tlb_guest(vcpu);
3375 EXPORT_SYMBOL_GPL(kvm_service_local_tlb_flush_requests);
3377 static void record_steal_time(struct kvm_vcpu *vcpu)
3379 struct gfn_to_hva_cache *ghc = &vcpu->arch.st.cache;
3380 struct kvm_steal_time __user *st;
3381 struct kvm_memslots *slots;
3385 if (kvm_xen_msr_enabled(vcpu->kvm)) {
3386 kvm_xen_runstate_set_running(vcpu);
3390 if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
3393 if (WARN_ON_ONCE(current->mm != vcpu->kvm->mm))
3396 slots = kvm_memslots(vcpu->kvm);
3398 if (unlikely(slots->generation != ghc->generation ||
3399 kvm_is_error_hva(ghc->hva) || !ghc->memslot)) {
3400 gfn_t gfn = vcpu->arch.st.msr_val & KVM_STEAL_VALID_BITS;
3402 /* We rely on the fact that it fits in a single page. */
3403 BUILD_BUG_ON((sizeof(*st) - 1) & KVM_STEAL_VALID_BITS);
3405 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, ghc, gfn, sizeof(*st)) ||
3406 kvm_is_error_hva(ghc->hva) || !ghc->memslot)
3410 st = (struct kvm_steal_time __user *)ghc->hva;
3412 * Doing a TLB flush here, on the guest's behalf, can avoid
3415 if (guest_pv_has(vcpu, KVM_FEATURE_PV_TLB_FLUSH)) {
3416 u8 st_preempted = 0;
3419 if (!user_access_begin(st, sizeof(*st)))
3422 asm volatile("1: xchgb %0, %2\n"
3425 _ASM_EXTABLE_UA(1b, 2b)
3426 : "+q" (st_preempted),
3428 "+m" (st->preempted));
3434 vcpu->arch.st.preempted = 0;
3436 trace_kvm_pv_tlb_flush(vcpu->vcpu_id,
3437 st_preempted & KVM_VCPU_FLUSH_TLB);
3438 if (st_preempted & KVM_VCPU_FLUSH_TLB)
3439 kvm_vcpu_flush_tlb_guest(vcpu);
3441 if (!user_access_begin(st, sizeof(*st)))
3444 if (!user_access_begin(st, sizeof(*st)))
3447 unsafe_put_user(0, &st->preempted, out);
3448 vcpu->arch.st.preempted = 0;
3451 unsafe_get_user(version, &st->version, out);
3453 version += 1; /* first time write, random junk */
3456 unsafe_put_user(version, &st->version, out);
3460 unsafe_get_user(steal, &st->steal, out);
3461 steal += current->sched_info.run_delay -
3462 vcpu->arch.st.last_steal;
3463 vcpu->arch.st.last_steal = current->sched_info.run_delay;
3464 unsafe_put_user(steal, &st->steal, out);
3467 unsafe_put_user(version, &st->version, out);
3472 mark_page_dirty_in_slot(vcpu->kvm, ghc->memslot, gpa_to_gfn(ghc->gpa));
3475 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3478 u32 msr = msr_info->index;
3479 u64 data = msr_info->data;
3481 if (msr && msr == vcpu->kvm->arch.xen_hvm_config.msr)
3482 return kvm_xen_write_hypercall_page(vcpu, data);
3485 case MSR_AMD64_NB_CFG:
3486 case MSR_IA32_UCODE_WRITE:
3487 case MSR_VM_HSAVE_PA:
3488 case MSR_AMD64_PATCH_LOADER:
3489 case MSR_AMD64_BU_CFG2:
3490 case MSR_AMD64_DC_CFG:
3491 case MSR_F15H_EX_CFG:
3494 case MSR_IA32_UCODE_REV:
3495 if (msr_info->host_initiated)
3496 vcpu->arch.microcode_version = data;
3498 case MSR_IA32_ARCH_CAPABILITIES:
3499 if (!msr_info->host_initiated)
3501 vcpu->arch.arch_capabilities = data;
3503 case MSR_IA32_PERF_CAPABILITIES: {
3504 struct kvm_msr_entry msr_ent = {.index = msr, .data = 0};
3506 if (!msr_info->host_initiated)
3508 if (kvm_get_msr_feature(&msr_ent))
3510 if (data & ~msr_ent.data)
3513 vcpu->arch.perf_capabilities = data;
3518 return set_efer(vcpu, msr_info);
3520 data &= ~(u64)0x40; /* ignore flush filter disable */
3521 data &= ~(u64)0x100; /* ignore ignne emulation enable */
3522 data &= ~(u64)0x8; /* ignore TLB cache disable */
3524 /* Handle McStatusWrEn */
3525 if (data == BIT_ULL(18)) {
3526 vcpu->arch.msr_hwcr = data;
3527 } else if (data != 0) {
3528 vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
3533 case MSR_FAM10H_MMIO_CONF_BASE:
3535 vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
3540 case 0x200 ... 0x2ff:
3541 return kvm_mtrr_set_msr(vcpu, msr, data);
3542 case MSR_IA32_APICBASE:
3543 return kvm_set_apic_base(vcpu, msr_info);
3544 case APIC_BASE_MSR ... APIC_BASE_MSR + 0xff:
3545 return kvm_x2apic_msr_write(vcpu, msr, data);
3546 case MSR_IA32_TSC_DEADLINE:
3547 kvm_set_lapic_tscdeadline_msr(vcpu, data);
3549 case MSR_IA32_TSC_ADJUST:
3550 if (guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST)) {
3551 if (!msr_info->host_initiated) {
3552 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
3553 adjust_tsc_offset_guest(vcpu, adj);
3554 /* Before back to guest, tsc_timestamp must be adjusted
3555 * as well, otherwise guest's percpu pvclock time could jump.
3557 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3559 vcpu->arch.ia32_tsc_adjust_msr = data;
3562 case MSR_IA32_MISC_ENABLE: {
3563 u64 old_val = vcpu->arch.ia32_misc_enable_msr;
3564 u64 pmu_mask = MSR_IA32_MISC_ENABLE_EMON |
3565 MSR_IA32_MISC_ENABLE_PEBS_UNAVAIL;
3568 if (!msr_info->host_initiated &&
3569 ((old_val ^ data) & MSR_IA32_MISC_ENABLE_PEBS_UNAVAIL))
3573 * For a dummy user space, the order of setting vPMU capabilities and
3574 * initialising MSR_IA32_MISC_ENABLE is not strictly guaranteed, so to
3575 * avoid inconsistent functionality we keep the vPMU bits unchanged here.
3578 data |= old_val & pmu_mask;
3579 if (!kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT) &&
3580 ((old_val ^ data) & MSR_IA32_MISC_ENABLE_MWAIT)) {
3581 if (!guest_cpuid_has(vcpu, X86_FEATURE_XMM3))
3583 vcpu->arch.ia32_misc_enable_msr = data;
3584 kvm_update_cpuid_runtime(vcpu);
3586 vcpu->arch.ia32_misc_enable_msr = data;
3590 case MSR_IA32_SMBASE:
3591 if (!msr_info->host_initiated)
3593 vcpu->arch.smbase = data;
3595 case MSR_IA32_POWER_CTL:
3596 vcpu->arch.msr_ia32_power_ctl = data;
3599 if (msr_info->host_initiated) {
3600 kvm_synchronize_tsc(vcpu, data);
3602 u64 adj = kvm_compute_l1_tsc_offset(vcpu, data) - vcpu->arch.l1_tsc_offset;
3603 adjust_tsc_offset_guest(vcpu, adj);
3604 vcpu->arch.ia32_tsc_adjust_msr += adj;
3608 if (!msr_info->host_initiated &&
3609 !guest_cpuid_has(vcpu, X86_FEATURE_XSAVES))
3612 * KVM supports exposing PT to the guest, but does not support
3613 * IA32_XSS[bit 8]. Guests have to use RDMSR/WRMSR rather than
3614 * XSAVES/XRSTORS to save/restore PT MSRs.
3616 if (data & ~supported_xss)
3618 vcpu->arch.ia32_xss = data;
3619 kvm_update_cpuid_runtime(vcpu);
3622 if (!msr_info->host_initiated)
3624 vcpu->arch.smi_count = data;
3626 case MSR_KVM_WALL_CLOCK_NEW:
3627 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3630 vcpu->kvm->arch.wall_clock = data;
3631 kvm_write_wall_clock(vcpu->kvm, data, 0);
3633 case MSR_KVM_WALL_CLOCK:
3634 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3637 vcpu->kvm->arch.wall_clock = data;
3638 kvm_write_wall_clock(vcpu->kvm, data, 0);
3640 case MSR_KVM_SYSTEM_TIME_NEW:
3641 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3644 kvm_write_system_time(vcpu, data, false, msr_info->host_initiated);
3646 case MSR_KVM_SYSTEM_TIME:
3647 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3650 kvm_write_system_time(vcpu, data, true, msr_info->host_initiated);
3652 case MSR_KVM_ASYNC_PF_EN:
3653 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3656 if (kvm_pv_enable_async_pf(vcpu, data))
3659 case MSR_KVM_ASYNC_PF_INT:
3660 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3663 if (kvm_pv_enable_async_pf_int(vcpu, data))
3666 case MSR_KVM_ASYNC_PF_ACK:
3667 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3670 vcpu->arch.apf.pageready_pending = false;
3671 kvm_check_async_pf_completion(vcpu);
3674 case MSR_KVM_STEAL_TIME:
3675 if (!guest_pv_has(vcpu, KVM_FEATURE_STEAL_TIME))
3678 if (unlikely(!sched_info_on()))
3681 if (data & KVM_STEAL_RESERVED_MASK)
3684 vcpu->arch.st.msr_val = data;
3686 if (!(data & KVM_MSR_ENABLED))
3689 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
3692 case MSR_KVM_PV_EOI_EN:
3693 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_EOI))
3696 if (kvm_lapic_set_pv_eoi(vcpu, data, sizeof(u8)))
3700 case MSR_KVM_POLL_CONTROL:
3701 if (!guest_pv_has(vcpu, KVM_FEATURE_POLL_CONTROL))
3704 /* only enable bit supported */
3705 if (data & (-1ULL << 1))
3708 vcpu->arch.msr_kvm_poll_control = data;
3711 case MSR_IA32_MCG_CTL:
3712 case MSR_IA32_MCG_STATUS:
3713 case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
3714 return set_msr_mce(vcpu, msr_info);
3716 case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
3717 case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
3720 case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
3721 case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
3722 if (kvm_pmu_is_valid_msr(vcpu, msr))
3723 return kvm_pmu_set_msr(vcpu, msr_info);
3725 if (pr || data != 0)
3726 vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
3727 "0x%x data 0x%llx\n", msr, data);
3729 case MSR_K7_CLK_CTL:
3731 * Ignore all writes to this no longer documented MSR.
3732 * Writes are only relevant for old K7 processors,
3733 * all pre-dating SVM, but a recommended workaround from
3734 * AMD for these chips. It is possible to specify the
3735 * affected processor models on the command line, hence
3736 * the need to ignore the workaround.
3739 case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
3740 case HV_X64_MSR_SYNDBG_CONTROL ... HV_X64_MSR_SYNDBG_PENDING_BUFFER:
3741 case HV_X64_MSR_SYNDBG_OPTIONS:
3742 case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
3743 case HV_X64_MSR_CRASH_CTL:
3744 case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
3745 case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
3746 case HV_X64_MSR_TSC_EMULATION_CONTROL:
3747 case HV_X64_MSR_TSC_EMULATION_STATUS:
3748 return kvm_hv_set_msr_common(vcpu, msr, data,
3749 msr_info->host_initiated);
3750 case MSR_IA32_BBL_CR_CTL3:
3751 /* Drop writes to this legacy MSR -- see rdmsr
3752 * counterpart for further detail.
3754 if (report_ignored_msrs)
3755 vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data 0x%llx\n",
3758 case MSR_AMD64_OSVW_ID_LENGTH:
3759 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3761 vcpu->arch.osvw.length = data;
3763 case MSR_AMD64_OSVW_STATUS:
3764 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3766 vcpu->arch.osvw.status = data;
3768 case MSR_PLATFORM_INFO:
3769 if (!msr_info->host_initiated ||
3770 (!(data & MSR_PLATFORM_INFO_CPUID_FAULT) &&
3771 cpuid_fault_enabled(vcpu)))
3773 vcpu->arch.msr_platform_info = data;
3775 case MSR_MISC_FEATURES_ENABLES:
3776 if (data & ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT ||
3777 (data & MSR_MISC_FEATURES_ENABLES_CPUID_FAULT &&
3778 !supports_cpuid_fault(vcpu)))
3780 vcpu->arch.msr_misc_features_enables = data;
3782 #ifdef CONFIG_X86_64
3784 if (!msr_info->host_initiated &&
3785 !guest_cpuid_has(vcpu, X86_FEATURE_XFD))
3788 if (data & ~kvm_guest_supported_xfd(vcpu))
3791 fpu_update_guest_xfd(&vcpu->arch.guest_fpu, data);
3793 case MSR_IA32_XFD_ERR:
3794 if (!msr_info->host_initiated &&
3795 !guest_cpuid_has(vcpu, X86_FEATURE_XFD))
3798 if (data & ~kvm_guest_supported_xfd(vcpu))
3801 vcpu->arch.guest_fpu.xfd_err = data;
3805 if (kvm_pmu_is_valid_msr(vcpu, msr))
3806 return kvm_pmu_set_msr(vcpu, msr_info);
3807 return KVM_MSR_RET_INVALID;
3811 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
3813 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata, bool host)
3816 u64 mcg_cap = vcpu->arch.mcg_cap;
3817 unsigned bank_num = mcg_cap & 0xff;
3820 case MSR_IA32_P5_MC_ADDR:
3821 case MSR_IA32_P5_MC_TYPE:
3824 case MSR_IA32_MCG_CAP:
3825 data = vcpu->arch.mcg_cap;
3827 case MSR_IA32_MCG_CTL:
3828 if (!(mcg_cap & MCG_CTL_P) && !host)
3830 data = vcpu->arch.mcg_ctl;
3832 case MSR_IA32_MCG_STATUS:
3833 data = vcpu->arch.mcg_status;
3836 if (msr >= MSR_IA32_MC0_CTL &&
3837 msr < MSR_IA32_MCx_CTL(bank_num)) {
3838 u32 offset = array_index_nospec(
3839 msr - MSR_IA32_MC0_CTL,
3840 MSR_IA32_MCx_CTL(bank_num) - MSR_IA32_MC0_CTL);
3842 data = vcpu->arch.mce_banks[offset];
3851 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3853 switch (msr_info->index) {
3854 case MSR_IA32_PLATFORM_ID:
3855 case MSR_IA32_EBL_CR_POWERON:
3856 case MSR_IA32_LASTBRANCHFROMIP:
3857 case MSR_IA32_LASTBRANCHTOIP:
3858 case MSR_IA32_LASTINTFROMIP:
3859 case MSR_IA32_LASTINTTOIP:
3860 case MSR_AMD64_SYSCFG:
3861 case MSR_K8_TSEG_ADDR:
3862 case MSR_K8_TSEG_MASK:
3863 case MSR_VM_HSAVE_PA:
3864 case MSR_K8_INT_PENDING_MSG:
3865 case MSR_AMD64_NB_CFG:
3866 case MSR_FAM10H_MMIO_CONF_BASE:
3867 case MSR_AMD64_BU_CFG2:
3868 case MSR_IA32_PERF_CTL:
3869 case MSR_AMD64_DC_CFG:
3870 case MSR_F15H_EX_CFG:
3872 * Intel Sandy Bridge CPUs must support the RAPL (running average power
3873 * limit) MSRs. Just return 0, as we do not want to expose the host
3874 * data here. Do not conditionalize this on CPUID, as KVM does not do
3875 * so for existing CPU-specific MSRs.
3877 case MSR_RAPL_POWER_UNIT:
3878 case MSR_PP0_ENERGY_STATUS: /* Power plane 0 (core) */
3879 case MSR_PP1_ENERGY_STATUS: /* Power plane 1 (graphics uncore) */
3880 case MSR_PKG_ENERGY_STATUS: /* Total package */
3881 case MSR_DRAM_ENERGY_STATUS: /* DRAM controller */
3884 case MSR_F15H_PERF_CTL0 ... MSR_F15H_PERF_CTR5:
3885 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3886 return kvm_pmu_get_msr(vcpu, msr_info);
3887 if (!msr_info->host_initiated)
3891 case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
3892 case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
3893 case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
3894 case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
3895 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3896 return kvm_pmu_get_msr(vcpu, msr_info);
3899 case MSR_IA32_UCODE_REV:
3900 msr_info->data = vcpu->arch.microcode_version;
3902 case MSR_IA32_ARCH_CAPABILITIES:
3903 if (!msr_info->host_initiated &&
3904 !guest_cpuid_has(vcpu, X86_FEATURE_ARCH_CAPABILITIES))
3906 msr_info->data = vcpu->arch.arch_capabilities;
3908 case MSR_IA32_PERF_CAPABILITIES:
3909 if (!msr_info->host_initiated &&
3910 !guest_cpuid_has(vcpu, X86_FEATURE_PDCM))
3912 msr_info->data = vcpu->arch.perf_capabilities;
3914 case MSR_IA32_POWER_CTL:
3915 msr_info->data = vcpu->arch.msr_ia32_power_ctl;
3917 case MSR_IA32_TSC: {
3919 * Intel SDM states that MSR_IA32_TSC read adds the TSC offset
3920 * even when not intercepted. AMD manual doesn't explicitly
3921 * state this but appears to behave the same.
3923 * On userspace reads and writes, however, we unconditionally
3924 * return L1's TSC value to ensure backwards-compatible
3925 * behavior for migration.
3929 if (msr_info->host_initiated) {
3930 offset = vcpu->arch.l1_tsc_offset;
3931 ratio = vcpu->arch.l1_tsc_scaling_ratio;
3933 offset = vcpu->arch.tsc_offset;
3934 ratio = vcpu->arch.tsc_scaling_ratio;
3937 msr_info->data = kvm_scale_tsc(rdtsc(), ratio) + offset;
3941 case 0x200 ... 0x2ff:
3942 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
3943 case 0xcd: /* fsb frequency */
3947 * MSR_EBC_FREQUENCY_ID
3948 * Conservative value valid for even the basic CPU models.
3949 * Models 0,1: 000 in bits 23:21 indicating a bus speed of
3950 * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
3951 * and 266MHz for model 3, or 4. Set Core Clock
3952 * Frequency to System Bus Frequency Ratio to 1 (bits
3953 * 31:24) even though these are only valid for CPU
3954 * models > 2, however guests may end up dividing or
3955 * multiplying by zero otherwise.
3957 case MSR_EBC_FREQUENCY_ID:
3958 msr_info->data = 1 << 24;
3960 case MSR_IA32_APICBASE:
3961 msr_info->data = kvm_get_apic_base(vcpu);
3963 case APIC_BASE_MSR ... APIC_BASE_MSR + 0xff:
3964 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
3965 case MSR_IA32_TSC_DEADLINE:
3966 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
3968 case MSR_IA32_TSC_ADJUST:
3969 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
3971 case MSR_IA32_MISC_ENABLE:
3972 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
3974 case MSR_IA32_SMBASE:
3975 if (!msr_info->host_initiated)
3977 msr_info->data = vcpu->arch.smbase;
3980 msr_info->data = vcpu->arch.smi_count;
3982 case MSR_IA32_PERF_STATUS:
3983 /* TSC increment by tick */
3984 msr_info->data = 1000ULL;
3985 /* CPU multiplier */
3986 msr_info->data |= (((uint64_t)4ULL) << 40);
3989 msr_info->data = vcpu->arch.efer;
3991 case MSR_KVM_WALL_CLOCK:
3992 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3995 msr_info->data = vcpu->kvm->arch.wall_clock;
3997 case MSR_KVM_WALL_CLOCK_NEW:
3998 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
4001 msr_info->data = vcpu->kvm->arch.wall_clock;
4003 case MSR_KVM_SYSTEM_TIME:
4004 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
4007 msr_info->data = vcpu->arch.time;
4009 case MSR_KVM_SYSTEM_TIME_NEW:
4010 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
4013 msr_info->data = vcpu->arch.time;
4015 case MSR_KVM_ASYNC_PF_EN:
4016 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
4019 msr_info->data = vcpu->arch.apf.msr_en_val;
4021 case MSR_KVM_ASYNC_PF_INT:
4022 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
4025 msr_info->data = vcpu->arch.apf.msr_int_val;
4027 case MSR_KVM_ASYNC_PF_ACK:
4028 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
4033 case MSR_KVM_STEAL_TIME:
4034 if (!guest_pv_has(vcpu, KVM_FEATURE_STEAL_TIME))
4037 msr_info->data = vcpu->arch.st.msr_val;
4039 case MSR_KVM_PV_EOI_EN:
4040 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_EOI))
4043 msr_info->data = vcpu->arch.pv_eoi.msr_val;
4045 case MSR_KVM_POLL_CONTROL:
4046 if (!guest_pv_has(vcpu, KVM_FEATURE_POLL_CONTROL))
4049 msr_info->data = vcpu->arch.msr_kvm_poll_control;
4051 case MSR_IA32_P5_MC_ADDR:
4052 case MSR_IA32_P5_MC_TYPE:
4053 case MSR_IA32_MCG_CAP:
4054 case MSR_IA32_MCG_CTL:
4055 case MSR_IA32_MCG_STATUS:
4056 case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
4057 return get_msr_mce(vcpu, msr_info->index, &msr_info->data,
4058 msr_info->host_initiated);
4060 if (!msr_info->host_initiated &&
4061 !guest_cpuid_has(vcpu, X86_FEATURE_XSAVES))
4063 msr_info->data = vcpu->arch.ia32_xss;
4065 case MSR_K7_CLK_CTL:
4067 * Provide expected ramp-up count for K7. All other
4068 * are set to zero, indicating minimum divisors for
4071 * This prevents guest kernels on AMD host with CPU
4072 * type 6, model 8 and higher from exploding due to
4073 * the rdmsr failing.
4075 msr_info->data = 0x20000000;
4077 case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
4078 case HV_X64_MSR_SYNDBG_CONTROL ... HV_X64_MSR_SYNDBG_PENDING_BUFFER:
4079 case HV_X64_MSR_SYNDBG_OPTIONS:
4080 case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
4081 case HV_X64_MSR_CRASH_CTL:
4082 case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
4083 case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
4084 case HV_X64_MSR_TSC_EMULATION_CONTROL:
4085 case HV_X64_MSR_TSC_EMULATION_STATUS:
4086 return kvm_hv_get_msr_common(vcpu,
4087 msr_info->index, &msr_info->data,
4088 msr_info->host_initiated);
4089 case MSR_IA32_BBL_CR_CTL3:
4090 /* This legacy MSR exists but isn't fully documented in current
4091 * silicon. It is however accessed by winxp in very narrow
4092 * scenarios where it sets bit #19, itself documented as
4093 * a "reserved" bit. Best effort attempt to source coherent
4094 * read data here should the balance of the register be
4095 * interpreted by the guest:
4097 * L2 cache control register 3: 64GB range, 256KB size,
4098 * enabled, latency 0x1, configured
4100 msr_info->data = 0xbe702111;
4102 case MSR_AMD64_OSVW_ID_LENGTH:
4103 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
4105 msr_info->data = vcpu->arch.osvw.length;
4107 case MSR_AMD64_OSVW_STATUS:
4108 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
4110 msr_info->data = vcpu->arch.osvw.status;
4112 case MSR_PLATFORM_INFO:
4113 if (!msr_info->host_initiated &&
4114 !vcpu->kvm->arch.guest_can_read_msr_platform_info)
4116 msr_info->data = vcpu->arch.msr_platform_info;
4118 case MSR_MISC_FEATURES_ENABLES:
4119 msr_info->data = vcpu->arch.msr_misc_features_enables;
4122 msr_info->data = vcpu->arch.msr_hwcr;
4124 #ifdef CONFIG_X86_64
4126 if (!msr_info->host_initiated &&
4127 !guest_cpuid_has(vcpu, X86_FEATURE_XFD))
4130 msr_info->data = vcpu->arch.guest_fpu.fpstate->xfd;
4132 case MSR_IA32_XFD_ERR:
4133 if (!msr_info->host_initiated &&
4134 !guest_cpuid_has(vcpu, X86_FEATURE_XFD))
4137 msr_info->data = vcpu->arch.guest_fpu.xfd_err;
4141 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
4142 return kvm_pmu_get_msr(vcpu, msr_info);
4143 return KVM_MSR_RET_INVALID;
4147 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
4150 * Read or write a bunch of msrs. All parameters are kernel addresses.
4152 * @return number of msrs set successfully.
4154 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
4155 struct kvm_msr_entry *entries,
4156 int (*do_msr)(struct kvm_vcpu *vcpu,
4157 unsigned index, u64 *data))
4161 for (i = 0; i < msrs->nmsrs; ++i)
4162 if (do_msr(vcpu, entries[i].index, &entries[i].data))
4169 * Read or write a bunch of msrs. Parameters are user addresses.
4171 * @return number of msrs set successfully.
4173 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
4174 int (*do_msr)(struct kvm_vcpu *vcpu,
4175 unsigned index, u64 *data),
4178 struct kvm_msrs msrs;
4179 struct kvm_msr_entry *entries;
4184 if (copy_from_user(&msrs, user_msrs, sizeof(msrs)))
4188 if (msrs.nmsrs >= MAX_IO_MSRS)
4191 size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
4192 entries = memdup_user(user_msrs->entries, size);
4193 if (IS_ERR(entries)) {
4194 r = PTR_ERR(entries);
4198 r = n = __msr_io(vcpu, &msrs, entries, do_msr);
4203 if (writeback && copy_to_user(user_msrs->entries, entries, size))
4214 static inline bool kvm_can_mwait_in_guest(void)
4216 return boot_cpu_has(X86_FEATURE_MWAIT) &&
4217 !boot_cpu_has_bug(X86_BUG_MONITOR) &&
4218 boot_cpu_has(X86_FEATURE_ARAT);
4221 static int kvm_ioctl_get_supported_hv_cpuid(struct kvm_vcpu *vcpu,
4222 struct kvm_cpuid2 __user *cpuid_arg)
4224 struct kvm_cpuid2 cpuid;
4228 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4231 r = kvm_get_hv_cpuid(vcpu, &cpuid, cpuid_arg->entries);
4236 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
4242 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
4247 case KVM_CAP_IRQCHIP:
4249 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
4250 case KVM_CAP_SET_TSS_ADDR:
4251 case KVM_CAP_EXT_CPUID:
4252 case KVM_CAP_EXT_EMUL_CPUID:
4253 case KVM_CAP_CLOCKSOURCE:
4255 case KVM_CAP_NOP_IO_DELAY:
4256 case KVM_CAP_MP_STATE:
4257 case KVM_CAP_SYNC_MMU:
4258 case KVM_CAP_USER_NMI:
4259 case KVM_CAP_REINJECT_CONTROL:
4260 case KVM_CAP_IRQ_INJECT_STATUS:
4261 case KVM_CAP_IOEVENTFD:
4262 case KVM_CAP_IOEVENTFD_NO_LENGTH:
4264 case KVM_CAP_PIT_STATE2:
4265 case KVM_CAP_SET_IDENTITY_MAP_ADDR:
4266 case KVM_CAP_VCPU_EVENTS:
4267 case KVM_CAP_HYPERV:
4268 case KVM_CAP_HYPERV_VAPIC:
4269 case KVM_CAP_HYPERV_SPIN:
4270 case KVM_CAP_HYPERV_SYNIC:
4271 case KVM_CAP_HYPERV_SYNIC2:
4272 case KVM_CAP_HYPERV_VP_INDEX:
4273 case KVM_CAP_HYPERV_EVENTFD:
4274 case KVM_CAP_HYPERV_TLBFLUSH:
4275 case KVM_CAP_HYPERV_SEND_IPI:
4276 case KVM_CAP_HYPERV_CPUID:
4277 case KVM_CAP_HYPERV_ENFORCE_CPUID:
4278 case KVM_CAP_SYS_HYPERV_CPUID:
4279 case KVM_CAP_PCI_SEGMENT:
4280 case KVM_CAP_DEBUGREGS:
4281 case KVM_CAP_X86_ROBUST_SINGLESTEP:
4283 case KVM_CAP_ASYNC_PF:
4284 case KVM_CAP_ASYNC_PF_INT:
4285 case KVM_CAP_GET_TSC_KHZ:
4286 case KVM_CAP_KVMCLOCK_CTRL:
4287 case KVM_CAP_READONLY_MEM:
4288 case KVM_CAP_HYPERV_TIME:
4289 case KVM_CAP_IOAPIC_POLARITY_IGNORED:
4290 case KVM_CAP_TSC_DEADLINE_TIMER:
4291 case KVM_CAP_DISABLE_QUIRKS:
4292 case KVM_CAP_SET_BOOT_CPU_ID:
4293 case KVM_CAP_SPLIT_IRQCHIP:
4294 case KVM_CAP_IMMEDIATE_EXIT:
4295 case KVM_CAP_PMU_EVENT_FILTER:
4296 case KVM_CAP_GET_MSR_FEATURES:
4297 case KVM_CAP_MSR_PLATFORM_INFO:
4298 case KVM_CAP_EXCEPTION_PAYLOAD:
4299 case KVM_CAP_SET_GUEST_DEBUG:
4300 case KVM_CAP_LAST_CPU:
4301 case KVM_CAP_X86_USER_SPACE_MSR:
4302 case KVM_CAP_X86_MSR_FILTER:
4303 case KVM_CAP_ENFORCE_PV_FEATURE_CPUID:
4304 #ifdef CONFIG_X86_SGX_KVM
4305 case KVM_CAP_SGX_ATTRIBUTE:
4307 case KVM_CAP_VM_COPY_ENC_CONTEXT_FROM:
4308 case KVM_CAP_VM_MOVE_ENC_CONTEXT_FROM:
4309 case KVM_CAP_SREGS2:
4310 case KVM_CAP_EXIT_ON_EMULATION_FAILURE:
4311 case KVM_CAP_VCPU_ATTRIBUTES:
4312 case KVM_CAP_SYS_ATTRIBUTES:
4314 case KVM_CAP_ENABLE_CAP:
4317 case KVM_CAP_EXIT_HYPERCALL:
4318 r = KVM_EXIT_HYPERCALL_VALID_MASK;
4320 case KVM_CAP_SET_GUEST_DEBUG2:
4321 return KVM_GUESTDBG_VALID_MASK;
4322 #ifdef CONFIG_KVM_XEN
4323 case KVM_CAP_XEN_HVM:
4324 r = KVM_XEN_HVM_CONFIG_HYPERCALL_MSR |
4325 KVM_XEN_HVM_CONFIG_INTERCEPT_HCALL |
4326 KVM_XEN_HVM_CONFIG_SHARED_INFO |
4327 KVM_XEN_HVM_CONFIG_EVTCHN_2LEVEL |
4328 KVM_XEN_HVM_CONFIG_EVTCHN_SEND;
4329 if (sched_info_on())
4330 r |= KVM_XEN_HVM_CONFIG_RUNSTATE;
4333 case KVM_CAP_SYNC_REGS:
4334 r = KVM_SYNC_X86_VALID_FIELDS;
4336 case KVM_CAP_ADJUST_CLOCK:
4337 r = KVM_CLOCK_VALID_FLAGS;
4339 case KVM_CAP_X86_DISABLE_EXITS:
4340 r |= KVM_X86_DISABLE_EXITS_HLT | KVM_X86_DISABLE_EXITS_PAUSE |
4341 KVM_X86_DISABLE_EXITS_CSTATE;
4342 if(kvm_can_mwait_in_guest())
4343 r |= KVM_X86_DISABLE_EXITS_MWAIT;
4345 case KVM_CAP_X86_SMM:
4346 /* SMBASE is usually relocated above 1M on modern chipsets,
4347 * and SMM handlers might indeed rely on 4G segment limits,
4348 * so do not report SMM to be available if real mode is
4349 * emulated via vm86 mode. Still, do not go to great lengths
4350 * to avoid userspace's usage of the feature, because it is a
4351 * fringe case that is not enabled except via specific settings
4352 * of the module parameters.
4354 r = static_call(kvm_x86_has_emulated_msr)(kvm, MSR_IA32_SMBASE);
4356 case KVM_CAP_NR_VCPUS:
4357 r = min_t(unsigned int, num_online_cpus(), KVM_MAX_VCPUS);
4359 case KVM_CAP_MAX_VCPUS:
4362 case KVM_CAP_MAX_VCPU_ID:
4363 r = KVM_MAX_VCPU_IDS;
4365 case KVM_CAP_PV_MMU: /* obsolete */
4369 r = KVM_MAX_MCE_BANKS;
4372 r = boot_cpu_has(X86_FEATURE_XSAVE);
4374 case KVM_CAP_TSC_CONTROL:
4375 case KVM_CAP_VM_TSC_CONTROL:
4376 r = kvm_has_tsc_control;
4378 case KVM_CAP_X2APIC_API:
4379 r = KVM_X2APIC_API_VALID_FLAGS;
4381 case KVM_CAP_NESTED_STATE:
4382 r = kvm_x86_ops.nested_ops->get_state ?
4383 kvm_x86_ops.nested_ops->get_state(NULL, NULL, 0) : 0;
4385 case KVM_CAP_HYPERV_DIRECT_TLBFLUSH:
4386 r = kvm_x86_ops.enable_direct_tlbflush != NULL;
4388 case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
4389 r = kvm_x86_ops.nested_ops->enable_evmcs != NULL;
4391 case KVM_CAP_SMALLER_MAXPHYADDR:
4392 r = (int) allow_smaller_maxphyaddr;
4394 case KVM_CAP_STEAL_TIME:
4395 r = sched_info_on();
4397 case KVM_CAP_X86_BUS_LOCK_EXIT:
4398 if (kvm_has_bus_lock_exit)
4399 r = KVM_BUS_LOCK_DETECTION_OFF |
4400 KVM_BUS_LOCK_DETECTION_EXIT;
4404 case KVM_CAP_XSAVE2: {
4405 u64 guest_perm = xstate_get_guest_group_perm();
4407 r = xstate_required_size(supported_xcr0 & guest_perm, false);
4408 if (r < sizeof(struct kvm_xsave))
4409 r = sizeof(struct kvm_xsave);
4411 case KVM_CAP_PMU_CAPABILITY:
4412 r = enable_pmu ? KVM_CAP_PMU_VALID_MASK : 0;
4415 case KVM_CAP_DISABLE_QUIRKS2:
4416 r = KVM_X86_VALID_QUIRKS;
4424 static inline void __user *kvm_get_attr_addr(struct kvm_device_attr *attr)
4426 void __user *uaddr = (void __user*)(unsigned long)attr->addr;
4428 if ((u64)(unsigned long)uaddr != attr->addr)
4429 return ERR_PTR_USR(-EFAULT);
4433 static int kvm_x86_dev_get_attr(struct kvm_device_attr *attr)
4435 u64 __user *uaddr = kvm_get_attr_addr(attr);
4441 return PTR_ERR(uaddr);
4443 switch (attr->attr) {
4444 case KVM_X86_XCOMP_GUEST_SUPP:
4445 if (put_user(supported_xcr0, uaddr))
4454 static int kvm_x86_dev_has_attr(struct kvm_device_attr *attr)
4459 switch (attr->attr) {
4460 case KVM_X86_XCOMP_GUEST_SUPP:
4467 long kvm_arch_dev_ioctl(struct file *filp,
4468 unsigned int ioctl, unsigned long arg)
4470 void __user *argp = (void __user *)arg;
4474 case KVM_GET_MSR_INDEX_LIST: {
4475 struct kvm_msr_list __user *user_msr_list = argp;
4476 struct kvm_msr_list msr_list;
4480 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
4483 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
4484 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
4487 if (n < msr_list.nmsrs)
4490 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
4491 num_msrs_to_save * sizeof(u32)))
4493 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
4495 num_emulated_msrs * sizeof(u32)))
4500 case KVM_GET_SUPPORTED_CPUID:
4501 case KVM_GET_EMULATED_CPUID: {
4502 struct kvm_cpuid2 __user *cpuid_arg = argp;
4503 struct kvm_cpuid2 cpuid;
4506 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4509 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
4515 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
4520 case KVM_X86_GET_MCE_CAP_SUPPORTED:
4522 if (copy_to_user(argp, &kvm_mce_cap_supported,
4523 sizeof(kvm_mce_cap_supported)))
4527 case KVM_GET_MSR_FEATURE_INDEX_LIST: {
4528 struct kvm_msr_list __user *user_msr_list = argp;
4529 struct kvm_msr_list msr_list;
4533 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
4536 msr_list.nmsrs = num_msr_based_features;
4537 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
4540 if (n < msr_list.nmsrs)
4543 if (copy_to_user(user_msr_list->indices, &msr_based_features,
4544 num_msr_based_features * sizeof(u32)))
4550 r = msr_io(NULL, argp, do_get_msr_feature, 1);
4552 case KVM_GET_SUPPORTED_HV_CPUID:
4553 r = kvm_ioctl_get_supported_hv_cpuid(NULL, argp);
4555 case KVM_GET_DEVICE_ATTR: {
4556 struct kvm_device_attr attr;
4558 if (copy_from_user(&attr, (void __user *)arg, sizeof(attr)))
4560 r = kvm_x86_dev_get_attr(&attr);
4563 case KVM_HAS_DEVICE_ATTR: {
4564 struct kvm_device_attr attr;
4566 if (copy_from_user(&attr, (void __user *)arg, sizeof(attr)))
4568 r = kvm_x86_dev_has_attr(&attr);
4579 static void wbinvd_ipi(void *garbage)
4584 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
4586 return kvm_arch_has_noncoherent_dma(vcpu->kvm);
4589 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
4591 /* Address WBINVD may be executed by guest */
4592 if (need_emulate_wbinvd(vcpu)) {
4593 if (static_call(kvm_x86_has_wbinvd_exit)())
4594 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4595 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
4596 smp_call_function_single(vcpu->cpu,
4597 wbinvd_ipi, NULL, 1);
4600 static_call(kvm_x86_vcpu_load)(vcpu, cpu);
4602 /* Save host pkru register if supported */
4603 vcpu->arch.host_pkru = read_pkru();
4605 /* Apply any externally detected TSC adjustments (due to suspend) */
4606 if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
4607 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
4608 vcpu->arch.tsc_offset_adjustment = 0;
4609 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4612 if (unlikely(vcpu->cpu != cpu) || kvm_check_tsc_unstable()) {
4613 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
4614 rdtsc() - vcpu->arch.last_host_tsc;
4616 mark_tsc_unstable("KVM discovered backwards TSC");
4618 if (kvm_check_tsc_unstable()) {
4619 u64 offset = kvm_compute_l1_tsc_offset(vcpu,
4620 vcpu->arch.last_guest_tsc);
4621 kvm_vcpu_write_tsc_offset(vcpu, offset);
4622 vcpu->arch.tsc_catchup = 1;
4625 if (kvm_lapic_hv_timer_in_use(vcpu))
4626 kvm_lapic_restart_hv_timer(vcpu);
4629 * On a host with synchronized TSC, there is no need to update
4630 * kvmclock on vcpu->cpu migration
4632 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
4633 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
4634 if (vcpu->cpu != cpu)
4635 kvm_make_request(KVM_REQ_MIGRATE_TIMER, vcpu);
4639 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
4642 static void kvm_steal_time_set_preempted(struct kvm_vcpu *vcpu)
4644 struct gfn_to_hva_cache *ghc = &vcpu->arch.st.cache;
4645 struct kvm_steal_time __user *st;
4646 struct kvm_memslots *slots;
4647 static const u8 preempted = KVM_VCPU_PREEMPTED;
4649 if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
4652 if (vcpu->arch.st.preempted)
4655 /* This happens on process exit */
4656 if (unlikely(current->mm != vcpu->kvm->mm))
4659 slots = kvm_memslots(vcpu->kvm);
4661 if (unlikely(slots->generation != ghc->generation ||
4662 kvm_is_error_hva(ghc->hva) || !ghc->memslot))
4665 st = (struct kvm_steal_time __user *)ghc->hva;
4666 BUILD_BUG_ON(sizeof(st->preempted) != sizeof(preempted));
4668 if (!copy_to_user_nofault(&st->preempted, &preempted, sizeof(preempted)))
4669 vcpu->arch.st.preempted = KVM_VCPU_PREEMPTED;
4671 mark_page_dirty_in_slot(vcpu->kvm, ghc->memslot, gpa_to_gfn(ghc->gpa));
4674 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
4678 if (vcpu->preempted && !vcpu->arch.guest_state_protected)
4679 vcpu->arch.preempted_in_kernel = !static_call(kvm_x86_get_cpl)(vcpu);
4682 * Take the srcu lock as memslots will be accessed to check the gfn
4683 * cache generation against the memslots generation.
4685 idx = srcu_read_lock(&vcpu->kvm->srcu);
4686 if (kvm_xen_msr_enabled(vcpu->kvm))
4687 kvm_xen_runstate_set_preempted(vcpu);
4689 kvm_steal_time_set_preempted(vcpu);
4690 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4692 static_call(kvm_x86_vcpu_put)(vcpu);
4693 vcpu->arch.last_host_tsc = rdtsc();
4696 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
4697 struct kvm_lapic_state *s)
4699 static_call_cond(kvm_x86_sync_pir_to_irr)(vcpu);
4701 return kvm_apic_get_state(vcpu, s);
4704 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
4705 struct kvm_lapic_state *s)
4709 r = kvm_apic_set_state(vcpu, s);
4712 update_cr8_intercept(vcpu);
4717 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu *vcpu)
4720 * We can accept userspace's request for interrupt injection
4721 * as long as we have a place to store the interrupt number.
4722 * The actual injection will happen when the CPU is able to
4723 * deliver the interrupt.
4725 if (kvm_cpu_has_extint(vcpu))
4728 /* Acknowledging ExtINT does not happen if LINT0 is masked. */
4729 return (!lapic_in_kernel(vcpu) ||
4730 kvm_apic_accept_pic_intr(vcpu));
4733 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu *vcpu)
4736 * Do not cause an interrupt window exit if an exception
4737 * is pending or an event needs reinjection; userspace
4738 * might want to inject the interrupt manually using KVM_SET_REGS
4739 * or KVM_SET_SREGS. For that to work, we must be at an
4740 * instruction boundary and with no events half-injected.
4742 return (kvm_arch_interrupt_allowed(vcpu) &&
4743 kvm_cpu_accept_dm_intr(vcpu) &&
4744 !kvm_event_needs_reinjection(vcpu) &&
4745 !vcpu->arch.exception.pending);
4748 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
4749 struct kvm_interrupt *irq)
4751 if (irq->irq >= KVM_NR_INTERRUPTS)
4754 if (!irqchip_in_kernel(vcpu->kvm)) {
4755 kvm_queue_interrupt(vcpu, irq->irq, false);
4756 kvm_make_request(KVM_REQ_EVENT, vcpu);
4761 * With in-kernel LAPIC, we only use this to inject EXTINT, so
4762 * fail for in-kernel 8259.
4764 if (pic_in_kernel(vcpu->kvm))
4767 if (vcpu->arch.pending_external_vector != -1)
4770 vcpu->arch.pending_external_vector = irq->irq;
4771 kvm_make_request(KVM_REQ_EVENT, vcpu);
4775 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
4777 kvm_inject_nmi(vcpu);
4782 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
4784 kvm_make_request(KVM_REQ_SMI, vcpu);
4789 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
4790 struct kvm_tpr_access_ctl *tac)
4794 vcpu->arch.tpr_access_reporting = !!tac->enabled;
4798 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
4802 unsigned bank_num = mcg_cap & 0xff, bank;
4805 if (!bank_num || bank_num > KVM_MAX_MCE_BANKS)
4807 if (mcg_cap & ~(kvm_mce_cap_supported | 0xff | 0xff0000))
4810 vcpu->arch.mcg_cap = mcg_cap;
4811 /* Init IA32_MCG_CTL to all 1s */
4812 if (mcg_cap & MCG_CTL_P)
4813 vcpu->arch.mcg_ctl = ~(u64)0;
4814 /* Init IA32_MCi_CTL to all 1s */
4815 for (bank = 0; bank < bank_num; bank++)
4816 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
4818 static_call(kvm_x86_setup_mce)(vcpu);
4823 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
4824 struct kvm_x86_mce *mce)
4826 u64 mcg_cap = vcpu->arch.mcg_cap;
4827 unsigned bank_num = mcg_cap & 0xff;
4828 u64 *banks = vcpu->arch.mce_banks;
4830 if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
4833 * if IA32_MCG_CTL is not all 1s, the uncorrected error
4834 * reporting is disabled
4836 if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
4837 vcpu->arch.mcg_ctl != ~(u64)0)
4839 banks += 4 * mce->bank;
4841 * if IA32_MCi_CTL is not all 1s, the uncorrected error
4842 * reporting is disabled for the bank
4844 if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
4846 if (mce->status & MCI_STATUS_UC) {
4847 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
4848 !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
4849 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
4852 if (banks[1] & MCI_STATUS_VAL)
4853 mce->status |= MCI_STATUS_OVER;
4854 banks[2] = mce->addr;
4855 banks[3] = mce->misc;
4856 vcpu->arch.mcg_status = mce->mcg_status;
4857 banks[1] = mce->status;
4858 kvm_queue_exception(vcpu, MC_VECTOR);
4859 } else if (!(banks[1] & MCI_STATUS_VAL)
4860 || !(banks[1] & MCI_STATUS_UC)) {
4861 if (banks[1] & MCI_STATUS_VAL)
4862 mce->status |= MCI_STATUS_OVER;
4863 banks[2] = mce->addr;
4864 banks[3] = mce->misc;
4865 banks[1] = mce->status;
4867 banks[1] |= MCI_STATUS_OVER;
4871 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
4872 struct kvm_vcpu_events *events)
4876 if (kvm_check_request(KVM_REQ_SMI, vcpu))
4880 * In guest mode, payload delivery should be deferred,
4881 * so that the L1 hypervisor can intercept #PF before
4882 * CR2 is modified (or intercept #DB before DR6 is
4883 * modified under nVMX). Unless the per-VM capability,
4884 * KVM_CAP_EXCEPTION_PAYLOAD, is set, we may not defer the delivery of
4885 * an exception payload and handle after a KVM_GET_VCPU_EVENTS. Since we
4886 * opportunistically defer the exception payload, deliver it if the
4887 * capability hasn't been requested before processing a
4888 * KVM_GET_VCPU_EVENTS.
4890 if (!vcpu->kvm->arch.exception_payload_enabled &&
4891 vcpu->arch.exception.pending && vcpu->arch.exception.has_payload)
4892 kvm_deliver_exception_payload(vcpu);
4895 * The API doesn't provide the instruction length for software
4896 * exceptions, so don't report them. As long as the guest RIP
4897 * isn't advanced, we should expect to encounter the exception
4900 if (kvm_exception_is_soft(vcpu->arch.exception.nr)) {
4901 events->exception.injected = 0;
4902 events->exception.pending = 0;
4904 events->exception.injected = vcpu->arch.exception.injected;
4905 events->exception.pending = vcpu->arch.exception.pending;
4907 * For ABI compatibility, deliberately conflate
4908 * pending and injected exceptions when
4909 * KVM_CAP_EXCEPTION_PAYLOAD isn't enabled.
4911 if (!vcpu->kvm->arch.exception_payload_enabled)
4912 events->exception.injected |=
4913 vcpu->arch.exception.pending;
4915 events->exception.nr = vcpu->arch.exception.nr;
4916 events->exception.has_error_code = vcpu->arch.exception.has_error_code;
4917 events->exception.error_code = vcpu->arch.exception.error_code;
4918 events->exception_has_payload = vcpu->arch.exception.has_payload;
4919 events->exception_payload = vcpu->arch.exception.payload;
4921 events->interrupt.injected =
4922 vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft;
4923 events->interrupt.nr = vcpu->arch.interrupt.nr;
4924 events->interrupt.soft = 0;
4925 events->interrupt.shadow = static_call(kvm_x86_get_interrupt_shadow)(vcpu);
4927 events->nmi.injected = vcpu->arch.nmi_injected;
4928 events->nmi.pending = vcpu->arch.nmi_pending != 0;
4929 events->nmi.masked = static_call(kvm_x86_get_nmi_mask)(vcpu);
4930 events->nmi.pad = 0;
4932 events->sipi_vector = 0; /* never valid when reporting to user space */
4934 events->smi.smm = is_smm(vcpu);
4935 events->smi.pending = vcpu->arch.smi_pending;
4936 events->smi.smm_inside_nmi =
4937 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
4938 events->smi.latched_init = kvm_lapic_latched_init(vcpu);
4940 events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
4941 | KVM_VCPUEVENT_VALID_SHADOW
4942 | KVM_VCPUEVENT_VALID_SMM);
4943 if (vcpu->kvm->arch.exception_payload_enabled)
4944 events->flags |= KVM_VCPUEVENT_VALID_PAYLOAD;
4946 memset(&events->reserved, 0, sizeof(events->reserved));
4949 static void kvm_smm_changed(struct kvm_vcpu *vcpu, bool entering_smm);
4951 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
4952 struct kvm_vcpu_events *events)
4954 if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
4955 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
4956 | KVM_VCPUEVENT_VALID_SHADOW
4957 | KVM_VCPUEVENT_VALID_SMM
4958 | KVM_VCPUEVENT_VALID_PAYLOAD))
4961 if (events->flags & KVM_VCPUEVENT_VALID_PAYLOAD) {
4962 if (!vcpu->kvm->arch.exception_payload_enabled)
4964 if (events->exception.pending)
4965 events->exception.injected = 0;
4967 events->exception_has_payload = 0;
4969 events->exception.pending = 0;
4970 events->exception_has_payload = 0;
4973 if ((events->exception.injected || events->exception.pending) &&
4974 (events->exception.nr > 31 || events->exception.nr == NMI_VECTOR))
4977 /* INITs are latched while in SMM */
4978 if (events->flags & KVM_VCPUEVENT_VALID_SMM &&
4979 (events->smi.smm || events->smi.pending) &&
4980 vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED)
4984 vcpu->arch.exception.injected = events->exception.injected;
4985 vcpu->arch.exception.pending = events->exception.pending;
4986 vcpu->arch.exception.nr = events->exception.nr;
4987 vcpu->arch.exception.has_error_code = events->exception.has_error_code;
4988 vcpu->arch.exception.error_code = events->exception.error_code;
4989 vcpu->arch.exception.has_payload = events->exception_has_payload;
4990 vcpu->arch.exception.payload = events->exception_payload;
4992 vcpu->arch.interrupt.injected = events->interrupt.injected;
4993 vcpu->arch.interrupt.nr = events->interrupt.nr;
4994 vcpu->arch.interrupt.soft = events->interrupt.soft;
4995 if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
4996 static_call(kvm_x86_set_interrupt_shadow)(vcpu,
4997 events->interrupt.shadow);
4999 vcpu->arch.nmi_injected = events->nmi.injected;
5000 if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
5001 vcpu->arch.nmi_pending = events->nmi.pending;
5002 static_call(kvm_x86_set_nmi_mask)(vcpu, events->nmi.masked);
5004 if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
5005 lapic_in_kernel(vcpu))
5006 vcpu->arch.apic->sipi_vector = events->sipi_vector;
5008 if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
5009 if (!!(vcpu->arch.hflags & HF_SMM_MASK) != events->smi.smm) {
5010 kvm_x86_ops.nested_ops->leave_nested(vcpu);
5011 kvm_smm_changed(vcpu, events->smi.smm);
5014 vcpu->arch.smi_pending = events->smi.pending;
5016 if (events->smi.smm) {
5017 if (events->smi.smm_inside_nmi)
5018 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
5020 vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
5023 if (lapic_in_kernel(vcpu)) {
5024 if (events->smi.latched_init)
5025 set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
5027 clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
5031 kvm_make_request(KVM_REQ_EVENT, vcpu);
5036 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
5037 struct kvm_debugregs *dbgregs)
5041 memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
5042 kvm_get_dr(vcpu, 6, &val);
5044 dbgregs->dr7 = vcpu->arch.dr7;
5046 memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
5049 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
5050 struct kvm_debugregs *dbgregs)
5055 if (!kvm_dr6_valid(dbgregs->dr6))
5057 if (!kvm_dr7_valid(dbgregs->dr7))
5060 memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
5061 kvm_update_dr0123(vcpu);
5062 vcpu->arch.dr6 = dbgregs->dr6;
5063 vcpu->arch.dr7 = dbgregs->dr7;
5064 kvm_update_dr7(vcpu);
5069 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
5070 struct kvm_xsave *guest_xsave)
5072 if (fpstate_is_confidential(&vcpu->arch.guest_fpu))
5075 fpu_copy_guest_fpstate_to_uabi(&vcpu->arch.guest_fpu,
5076 guest_xsave->region,
5077 sizeof(guest_xsave->region),
5081 static void kvm_vcpu_ioctl_x86_get_xsave2(struct kvm_vcpu *vcpu,
5082 u8 *state, unsigned int size)
5084 if (fpstate_is_confidential(&vcpu->arch.guest_fpu))
5087 fpu_copy_guest_fpstate_to_uabi(&vcpu->arch.guest_fpu,
5088 state, size, vcpu->arch.pkru);
5091 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
5092 struct kvm_xsave *guest_xsave)
5094 if (fpstate_is_confidential(&vcpu->arch.guest_fpu))
5097 return fpu_copy_uabi_to_guest_fpstate(&vcpu->arch.guest_fpu,
5098 guest_xsave->region,
5099 supported_xcr0, &vcpu->arch.pkru);
5102 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
5103 struct kvm_xcrs *guest_xcrs)
5105 if (!boot_cpu_has(X86_FEATURE_XSAVE)) {
5106 guest_xcrs->nr_xcrs = 0;
5110 guest_xcrs->nr_xcrs = 1;
5111 guest_xcrs->flags = 0;
5112 guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
5113 guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
5116 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
5117 struct kvm_xcrs *guest_xcrs)
5121 if (!boot_cpu_has(X86_FEATURE_XSAVE))
5124 if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
5127 for (i = 0; i < guest_xcrs->nr_xcrs; i++)
5128 /* Only support XCR0 currently */
5129 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
5130 r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
5131 guest_xcrs->xcrs[i].value);
5140 * kvm_set_guest_paused() indicates to the guest kernel that it has been
5141 * stopped by the hypervisor. This function will be called from the host only.
5142 * EINVAL is returned when the host attempts to set the flag for a guest that
5143 * does not support pv clocks.
5145 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
5147 if (!vcpu->arch.pv_time.active)
5149 vcpu->arch.pvclock_set_guest_stopped_request = true;
5150 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5154 static int kvm_arch_tsc_has_attr(struct kvm_vcpu *vcpu,
5155 struct kvm_device_attr *attr)
5159 switch (attr->attr) {
5160 case KVM_VCPU_TSC_OFFSET:
5170 static int kvm_arch_tsc_get_attr(struct kvm_vcpu *vcpu,
5171 struct kvm_device_attr *attr)
5173 u64 __user *uaddr = kvm_get_attr_addr(attr);
5177 return PTR_ERR(uaddr);
5179 switch (attr->attr) {
5180 case KVM_VCPU_TSC_OFFSET:
5182 if (put_user(vcpu->arch.l1_tsc_offset, uaddr))
5193 static int kvm_arch_tsc_set_attr(struct kvm_vcpu *vcpu,
5194 struct kvm_device_attr *attr)
5196 u64 __user *uaddr = kvm_get_attr_addr(attr);
5197 struct kvm *kvm = vcpu->kvm;
5201 return PTR_ERR(uaddr);
5203 switch (attr->attr) {
5204 case KVM_VCPU_TSC_OFFSET: {
5205 u64 offset, tsc, ns;
5206 unsigned long flags;
5210 if (get_user(offset, uaddr))
5213 raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
5215 matched = (vcpu->arch.virtual_tsc_khz &&
5216 kvm->arch.last_tsc_khz == vcpu->arch.virtual_tsc_khz &&
5217 kvm->arch.last_tsc_offset == offset);
5219 tsc = kvm_scale_tsc(rdtsc(), vcpu->arch.l1_tsc_scaling_ratio) + offset;
5220 ns = get_kvmclock_base_ns();
5222 __kvm_synchronize_tsc(vcpu, offset, tsc, ns, matched);
5223 raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
5235 static int kvm_vcpu_ioctl_device_attr(struct kvm_vcpu *vcpu,
5239 struct kvm_device_attr attr;
5242 if (copy_from_user(&attr, argp, sizeof(attr)))
5245 if (attr.group != KVM_VCPU_TSC_CTRL)
5249 case KVM_HAS_DEVICE_ATTR:
5250 r = kvm_arch_tsc_has_attr(vcpu, &attr);
5252 case KVM_GET_DEVICE_ATTR:
5253 r = kvm_arch_tsc_get_attr(vcpu, &attr);
5255 case KVM_SET_DEVICE_ATTR:
5256 r = kvm_arch_tsc_set_attr(vcpu, &attr);
5263 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
5264 struct kvm_enable_cap *cap)
5267 uint16_t vmcs_version;
5268 void __user *user_ptr;
5274 case KVM_CAP_HYPERV_SYNIC2:
5279 case KVM_CAP_HYPERV_SYNIC:
5280 if (!irqchip_in_kernel(vcpu->kvm))
5282 return kvm_hv_activate_synic(vcpu, cap->cap ==
5283 KVM_CAP_HYPERV_SYNIC2);
5284 case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
5285 if (!kvm_x86_ops.nested_ops->enable_evmcs)
5287 r = kvm_x86_ops.nested_ops->enable_evmcs(vcpu, &vmcs_version);
5289 user_ptr = (void __user *)(uintptr_t)cap->args[0];
5290 if (copy_to_user(user_ptr, &vmcs_version,
5291 sizeof(vmcs_version)))
5295 case KVM_CAP_HYPERV_DIRECT_TLBFLUSH:
5296 if (!kvm_x86_ops.enable_direct_tlbflush)
5299 return static_call(kvm_x86_enable_direct_tlbflush)(vcpu);
5301 case KVM_CAP_HYPERV_ENFORCE_CPUID:
5302 return kvm_hv_set_enforce_cpuid(vcpu, cap->args[0]);
5304 case KVM_CAP_ENFORCE_PV_FEATURE_CPUID:
5305 vcpu->arch.pv_cpuid.enforce = cap->args[0];
5306 if (vcpu->arch.pv_cpuid.enforce)
5307 kvm_update_pv_runtime(vcpu);
5315 long kvm_arch_vcpu_ioctl(struct file *filp,
5316 unsigned int ioctl, unsigned long arg)
5318 struct kvm_vcpu *vcpu = filp->private_data;
5319 void __user *argp = (void __user *)arg;
5322 struct kvm_sregs2 *sregs2;
5323 struct kvm_lapic_state *lapic;
5324 struct kvm_xsave *xsave;
5325 struct kvm_xcrs *xcrs;
5333 case KVM_GET_LAPIC: {
5335 if (!lapic_in_kernel(vcpu))
5337 u.lapic = kzalloc(sizeof(struct kvm_lapic_state),
5338 GFP_KERNEL_ACCOUNT);
5343 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
5347 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
5352 case KVM_SET_LAPIC: {
5354 if (!lapic_in_kernel(vcpu))
5356 u.lapic = memdup_user(argp, sizeof(*u.lapic));
5357 if (IS_ERR(u.lapic)) {
5358 r = PTR_ERR(u.lapic);
5362 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
5365 case KVM_INTERRUPT: {
5366 struct kvm_interrupt irq;
5369 if (copy_from_user(&irq, argp, sizeof(irq)))
5371 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
5375 r = kvm_vcpu_ioctl_nmi(vcpu);
5379 r = kvm_vcpu_ioctl_smi(vcpu);
5382 case KVM_SET_CPUID: {
5383 struct kvm_cpuid __user *cpuid_arg = argp;
5384 struct kvm_cpuid cpuid;
5387 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
5389 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
5392 case KVM_SET_CPUID2: {
5393 struct kvm_cpuid2 __user *cpuid_arg = argp;
5394 struct kvm_cpuid2 cpuid;
5397 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
5399 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
5400 cpuid_arg->entries);
5403 case KVM_GET_CPUID2: {
5404 struct kvm_cpuid2 __user *cpuid_arg = argp;
5405 struct kvm_cpuid2 cpuid;
5408 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
5410 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
5411 cpuid_arg->entries);
5415 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
5420 case KVM_GET_MSRS: {
5421 int idx = srcu_read_lock(&vcpu->kvm->srcu);
5422 r = msr_io(vcpu, argp, do_get_msr, 1);
5423 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5426 case KVM_SET_MSRS: {
5427 int idx = srcu_read_lock(&vcpu->kvm->srcu);
5428 r = msr_io(vcpu, argp, do_set_msr, 0);
5429 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5432 case KVM_TPR_ACCESS_REPORTING: {
5433 struct kvm_tpr_access_ctl tac;
5436 if (copy_from_user(&tac, argp, sizeof(tac)))
5438 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
5442 if (copy_to_user(argp, &tac, sizeof(tac)))
5447 case KVM_SET_VAPIC_ADDR: {
5448 struct kvm_vapic_addr va;
5452 if (!lapic_in_kernel(vcpu))
5455 if (copy_from_user(&va, argp, sizeof(va)))
5457 idx = srcu_read_lock(&vcpu->kvm->srcu);
5458 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
5459 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5462 case KVM_X86_SETUP_MCE: {
5466 if (copy_from_user(&mcg_cap, argp, sizeof(mcg_cap)))
5468 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
5471 case KVM_X86_SET_MCE: {
5472 struct kvm_x86_mce mce;
5475 if (copy_from_user(&mce, argp, sizeof(mce)))
5477 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
5480 case KVM_GET_VCPU_EVENTS: {
5481 struct kvm_vcpu_events events;
5483 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
5486 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
5491 case KVM_SET_VCPU_EVENTS: {
5492 struct kvm_vcpu_events events;
5495 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
5498 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
5501 case KVM_GET_DEBUGREGS: {
5502 struct kvm_debugregs dbgregs;
5504 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
5507 if (copy_to_user(argp, &dbgregs,
5508 sizeof(struct kvm_debugregs)))
5513 case KVM_SET_DEBUGREGS: {
5514 struct kvm_debugregs dbgregs;
5517 if (copy_from_user(&dbgregs, argp,
5518 sizeof(struct kvm_debugregs)))
5521 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
5524 case KVM_GET_XSAVE: {
5526 if (vcpu->arch.guest_fpu.uabi_size > sizeof(struct kvm_xsave))
5529 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL_ACCOUNT);
5534 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
5537 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
5542 case KVM_SET_XSAVE: {
5543 int size = vcpu->arch.guest_fpu.uabi_size;
5545 u.xsave = memdup_user(argp, size);
5546 if (IS_ERR(u.xsave)) {
5547 r = PTR_ERR(u.xsave);
5551 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
5555 case KVM_GET_XSAVE2: {
5556 int size = vcpu->arch.guest_fpu.uabi_size;
5558 u.xsave = kzalloc(size, GFP_KERNEL_ACCOUNT);
5563 kvm_vcpu_ioctl_x86_get_xsave2(vcpu, u.buffer, size);
5566 if (copy_to_user(argp, u.xsave, size))
5573 case KVM_GET_XCRS: {
5574 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL_ACCOUNT);
5579 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
5582 if (copy_to_user(argp, u.xcrs,
5583 sizeof(struct kvm_xcrs)))
5588 case KVM_SET_XCRS: {
5589 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
5590 if (IS_ERR(u.xcrs)) {
5591 r = PTR_ERR(u.xcrs);
5595 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
5598 case KVM_SET_TSC_KHZ: {
5602 user_tsc_khz = (u32)arg;
5604 if (kvm_has_tsc_control &&
5605 user_tsc_khz >= kvm_max_guest_tsc_khz)
5608 if (user_tsc_khz == 0)
5609 user_tsc_khz = tsc_khz;
5611 if (!kvm_set_tsc_khz(vcpu, user_tsc_khz))
5616 case KVM_GET_TSC_KHZ: {
5617 r = vcpu->arch.virtual_tsc_khz;
5620 case KVM_KVMCLOCK_CTRL: {
5621 r = kvm_set_guest_paused(vcpu);
5624 case KVM_ENABLE_CAP: {
5625 struct kvm_enable_cap cap;
5628 if (copy_from_user(&cap, argp, sizeof(cap)))
5630 r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap);
5633 case KVM_GET_NESTED_STATE: {
5634 struct kvm_nested_state __user *user_kvm_nested_state = argp;
5638 if (!kvm_x86_ops.nested_ops->get_state)
5641 BUILD_BUG_ON(sizeof(user_data_size) != sizeof(user_kvm_nested_state->size));
5643 if (get_user(user_data_size, &user_kvm_nested_state->size))
5646 r = kvm_x86_ops.nested_ops->get_state(vcpu, user_kvm_nested_state,
5651 if (r > user_data_size) {
5652 if (put_user(r, &user_kvm_nested_state->size))
5662 case KVM_SET_NESTED_STATE: {
5663 struct kvm_nested_state __user *user_kvm_nested_state = argp;
5664 struct kvm_nested_state kvm_state;
5668 if (!kvm_x86_ops.nested_ops->set_state)
5672 if (copy_from_user(&kvm_state, user_kvm_nested_state, sizeof(kvm_state)))
5676 if (kvm_state.size < sizeof(kvm_state))
5679 if (kvm_state.flags &
5680 ~(KVM_STATE_NESTED_RUN_PENDING | KVM_STATE_NESTED_GUEST_MODE
5681 | KVM_STATE_NESTED_EVMCS | KVM_STATE_NESTED_MTF_PENDING
5682 | KVM_STATE_NESTED_GIF_SET))
5685 /* nested_run_pending implies guest_mode. */
5686 if ((kvm_state.flags & KVM_STATE_NESTED_RUN_PENDING)
5687 && !(kvm_state.flags & KVM_STATE_NESTED_GUEST_MODE))
5690 idx = srcu_read_lock(&vcpu->kvm->srcu);
5691 r = kvm_x86_ops.nested_ops->set_state(vcpu, user_kvm_nested_state, &kvm_state);
5692 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5695 case KVM_GET_SUPPORTED_HV_CPUID:
5696 r = kvm_ioctl_get_supported_hv_cpuid(vcpu, argp);
5698 #ifdef CONFIG_KVM_XEN
5699 case KVM_XEN_VCPU_GET_ATTR: {
5700 struct kvm_xen_vcpu_attr xva;
5703 if (copy_from_user(&xva, argp, sizeof(xva)))
5705 r = kvm_xen_vcpu_get_attr(vcpu, &xva);
5706 if (!r && copy_to_user(argp, &xva, sizeof(xva)))
5710 case KVM_XEN_VCPU_SET_ATTR: {
5711 struct kvm_xen_vcpu_attr xva;
5714 if (copy_from_user(&xva, argp, sizeof(xva)))
5716 r = kvm_xen_vcpu_set_attr(vcpu, &xva);
5720 case KVM_GET_SREGS2: {
5721 u.sregs2 = kzalloc(sizeof(struct kvm_sregs2), GFP_KERNEL);
5725 __get_sregs2(vcpu, u.sregs2);
5727 if (copy_to_user(argp, u.sregs2, sizeof(struct kvm_sregs2)))
5732 case KVM_SET_SREGS2: {
5733 u.sregs2 = memdup_user(argp, sizeof(struct kvm_sregs2));
5734 if (IS_ERR(u.sregs2)) {
5735 r = PTR_ERR(u.sregs2);
5739 r = __set_sregs2(vcpu, u.sregs2);
5742 case KVM_HAS_DEVICE_ATTR:
5743 case KVM_GET_DEVICE_ATTR:
5744 case KVM_SET_DEVICE_ATTR:
5745 r = kvm_vcpu_ioctl_device_attr(vcpu, ioctl, argp);
5757 vm_fault_t kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
5759 return VM_FAULT_SIGBUS;
5762 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
5766 if (addr > (unsigned int)(-3 * PAGE_SIZE))
5768 ret = static_call(kvm_x86_set_tss_addr)(kvm, addr);
5772 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
5775 return static_call(kvm_x86_set_identity_map_addr)(kvm, ident_addr);
5778 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
5779 unsigned long kvm_nr_mmu_pages)
5781 if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
5784 mutex_lock(&kvm->slots_lock);
5786 kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
5787 kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
5789 mutex_unlock(&kvm->slots_lock);
5793 static unsigned long kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
5795 return kvm->arch.n_max_mmu_pages;
5798 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
5800 struct kvm_pic *pic = kvm->arch.vpic;
5804 switch (chip->chip_id) {
5805 case KVM_IRQCHIP_PIC_MASTER:
5806 memcpy(&chip->chip.pic, &pic->pics[0],
5807 sizeof(struct kvm_pic_state));
5809 case KVM_IRQCHIP_PIC_SLAVE:
5810 memcpy(&chip->chip.pic, &pic->pics[1],
5811 sizeof(struct kvm_pic_state));
5813 case KVM_IRQCHIP_IOAPIC:
5814 kvm_get_ioapic(kvm, &chip->chip.ioapic);
5823 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
5825 struct kvm_pic *pic = kvm->arch.vpic;
5829 switch (chip->chip_id) {
5830 case KVM_IRQCHIP_PIC_MASTER:
5831 spin_lock(&pic->lock);
5832 memcpy(&pic->pics[0], &chip->chip.pic,
5833 sizeof(struct kvm_pic_state));
5834 spin_unlock(&pic->lock);
5836 case KVM_IRQCHIP_PIC_SLAVE:
5837 spin_lock(&pic->lock);
5838 memcpy(&pic->pics[1], &chip->chip.pic,
5839 sizeof(struct kvm_pic_state));
5840 spin_unlock(&pic->lock);
5842 case KVM_IRQCHIP_IOAPIC:
5843 kvm_set_ioapic(kvm, &chip->chip.ioapic);
5849 kvm_pic_update_irq(pic);
5853 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
5855 struct kvm_kpit_state *kps = &kvm->arch.vpit->pit_state;
5857 BUILD_BUG_ON(sizeof(*ps) != sizeof(kps->channels));
5859 mutex_lock(&kps->lock);
5860 memcpy(ps, &kps->channels, sizeof(*ps));
5861 mutex_unlock(&kps->lock);
5865 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
5868 struct kvm_pit *pit = kvm->arch.vpit;
5870 mutex_lock(&pit->pit_state.lock);
5871 memcpy(&pit->pit_state.channels, ps, sizeof(*ps));
5872 for (i = 0; i < 3; i++)
5873 kvm_pit_load_count(pit, i, ps->channels[i].count, 0);
5874 mutex_unlock(&pit->pit_state.lock);
5878 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
5880 mutex_lock(&kvm->arch.vpit->pit_state.lock);
5881 memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
5882 sizeof(ps->channels));
5883 ps->flags = kvm->arch.vpit->pit_state.flags;
5884 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
5885 memset(&ps->reserved, 0, sizeof(ps->reserved));
5889 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
5893 u32 prev_legacy, cur_legacy;
5894 struct kvm_pit *pit = kvm->arch.vpit;
5896 mutex_lock(&pit->pit_state.lock);
5897 prev_legacy = pit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
5898 cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
5899 if (!prev_legacy && cur_legacy)
5901 memcpy(&pit->pit_state.channels, &ps->channels,
5902 sizeof(pit->pit_state.channels));
5903 pit->pit_state.flags = ps->flags;
5904 for (i = 0; i < 3; i++)
5905 kvm_pit_load_count(pit, i, pit->pit_state.channels[i].count,
5907 mutex_unlock(&pit->pit_state.lock);
5911 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
5912 struct kvm_reinject_control *control)
5914 struct kvm_pit *pit = kvm->arch.vpit;
5916 /* pit->pit_state.lock was overloaded to prevent userspace from getting
5917 * an inconsistent state after running multiple KVM_REINJECT_CONTROL
5918 * ioctls in parallel. Use a separate lock if that ioctl isn't rare.
5920 mutex_lock(&pit->pit_state.lock);
5921 kvm_pit_set_reinject(pit, control->pit_reinject);
5922 mutex_unlock(&pit->pit_state.lock);
5927 void kvm_arch_sync_dirty_log(struct kvm *kvm, struct kvm_memory_slot *memslot)
5931 * Flush all CPUs' dirty log buffers to the dirty_bitmap. Called
5932 * before reporting dirty_bitmap to userspace. KVM flushes the buffers
5933 * on all VM-Exits, thus we only need to kick running vCPUs to force a
5936 struct kvm_vcpu *vcpu;
5939 kvm_for_each_vcpu(i, vcpu, kvm)
5940 kvm_vcpu_kick(vcpu);
5943 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
5946 if (!irqchip_in_kernel(kvm))
5949 irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
5950 irq_event->irq, irq_event->level,
5955 int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
5956 struct kvm_enable_cap *cap)
5964 case KVM_CAP_DISABLE_QUIRKS2:
5966 if (cap->args[0] & ~KVM_X86_VALID_QUIRKS)
5969 case KVM_CAP_DISABLE_QUIRKS:
5970 kvm->arch.disabled_quirks = cap->args[0];
5973 case KVM_CAP_SPLIT_IRQCHIP: {
5974 mutex_lock(&kvm->lock);
5976 if (cap->args[0] > MAX_NR_RESERVED_IOAPIC_PINS)
5977 goto split_irqchip_unlock;
5979 if (irqchip_in_kernel(kvm))
5980 goto split_irqchip_unlock;
5981 if (kvm->created_vcpus)
5982 goto split_irqchip_unlock;
5983 r = kvm_setup_empty_irq_routing(kvm);
5985 goto split_irqchip_unlock;
5986 /* Pairs with irqchip_in_kernel. */
5988 kvm->arch.irqchip_mode = KVM_IRQCHIP_SPLIT;
5989 kvm->arch.nr_reserved_ioapic_pins = cap->args[0];
5990 kvm_clear_apicv_inhibit(kvm, APICV_INHIBIT_REASON_ABSENT);
5992 split_irqchip_unlock:
5993 mutex_unlock(&kvm->lock);
5996 case KVM_CAP_X2APIC_API:
5998 if (cap->args[0] & ~KVM_X2APIC_API_VALID_FLAGS)
6001 if (cap->args[0] & KVM_X2APIC_API_USE_32BIT_IDS)
6002 kvm->arch.x2apic_format = true;
6003 if (cap->args[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
6004 kvm->arch.x2apic_broadcast_quirk_disabled = true;
6008 case KVM_CAP_X86_DISABLE_EXITS:
6010 if (cap->args[0] & ~KVM_X86_DISABLE_VALID_EXITS)
6013 if ((cap->args[0] & KVM_X86_DISABLE_EXITS_MWAIT) &&
6014 kvm_can_mwait_in_guest())
6015 kvm->arch.mwait_in_guest = true;
6016 if (cap->args[0] & KVM_X86_DISABLE_EXITS_HLT)
6017 kvm->arch.hlt_in_guest = true;
6018 if (cap->args[0] & KVM_X86_DISABLE_EXITS_PAUSE)
6019 kvm->arch.pause_in_guest = true;
6020 if (cap->args[0] & KVM_X86_DISABLE_EXITS_CSTATE)
6021 kvm->arch.cstate_in_guest = true;
6024 case KVM_CAP_MSR_PLATFORM_INFO:
6025 kvm->arch.guest_can_read_msr_platform_info = cap->args[0];
6028 case KVM_CAP_EXCEPTION_PAYLOAD:
6029 kvm->arch.exception_payload_enabled = cap->args[0];
6032 case KVM_CAP_X86_USER_SPACE_MSR:
6033 kvm->arch.user_space_msr_mask = cap->args[0];
6036 case KVM_CAP_X86_BUS_LOCK_EXIT:
6038 if (cap->args[0] & ~KVM_BUS_LOCK_DETECTION_VALID_MODE)
6041 if ((cap->args[0] & KVM_BUS_LOCK_DETECTION_OFF) &&
6042 (cap->args[0] & KVM_BUS_LOCK_DETECTION_EXIT))
6045 if (kvm_has_bus_lock_exit &&
6046 cap->args[0] & KVM_BUS_LOCK_DETECTION_EXIT)
6047 kvm->arch.bus_lock_detection_enabled = true;
6050 #ifdef CONFIG_X86_SGX_KVM
6051 case KVM_CAP_SGX_ATTRIBUTE: {
6052 unsigned long allowed_attributes = 0;
6054 r = sgx_set_attribute(&allowed_attributes, cap->args[0]);
6058 /* KVM only supports the PROVISIONKEY privileged attribute. */
6059 if ((allowed_attributes & SGX_ATTR_PROVISIONKEY) &&
6060 !(allowed_attributes & ~SGX_ATTR_PROVISIONKEY))
6061 kvm->arch.sgx_provisioning_allowed = true;
6067 case KVM_CAP_VM_COPY_ENC_CONTEXT_FROM:
6069 if (!kvm_x86_ops.vm_copy_enc_context_from)
6072 r = static_call(kvm_x86_vm_copy_enc_context_from)(kvm, cap->args[0]);
6074 case KVM_CAP_VM_MOVE_ENC_CONTEXT_FROM:
6076 if (!kvm_x86_ops.vm_move_enc_context_from)
6079 r = static_call(kvm_x86_vm_move_enc_context_from)(kvm, cap->args[0]);
6081 case KVM_CAP_EXIT_HYPERCALL:
6082 if (cap->args[0] & ~KVM_EXIT_HYPERCALL_VALID_MASK) {
6086 kvm->arch.hypercall_exit_enabled = cap->args[0];
6089 case KVM_CAP_EXIT_ON_EMULATION_FAILURE:
6091 if (cap->args[0] & ~1)
6093 kvm->arch.exit_on_emulation_error = cap->args[0];
6096 case KVM_CAP_PMU_CAPABILITY:
6098 if (!enable_pmu || (cap->args[0] & ~KVM_CAP_PMU_VALID_MASK))
6101 mutex_lock(&kvm->lock);
6102 if (!kvm->created_vcpus) {
6103 kvm->arch.enable_pmu = !(cap->args[0] & KVM_PMU_CAP_DISABLE);
6106 mutex_unlock(&kvm->lock);
6108 case KVM_CAP_MAX_VCPU_ID:
6110 if (cap->args[0] > KVM_MAX_VCPU_IDS)
6113 mutex_lock(&kvm->lock);
6114 if (kvm->arch.max_vcpu_ids == cap->args[0]) {
6116 } else if (!kvm->arch.max_vcpu_ids) {
6117 kvm->arch.max_vcpu_ids = cap->args[0];
6120 mutex_unlock(&kvm->lock);
6129 static struct kvm_x86_msr_filter *kvm_alloc_msr_filter(bool default_allow)
6131 struct kvm_x86_msr_filter *msr_filter;
6133 msr_filter = kzalloc(sizeof(*msr_filter), GFP_KERNEL_ACCOUNT);
6137 msr_filter->default_allow = default_allow;
6141 static void kvm_free_msr_filter(struct kvm_x86_msr_filter *msr_filter)
6148 for (i = 0; i < msr_filter->count; i++)
6149 kfree(msr_filter->ranges[i].bitmap);
6154 static int kvm_add_msr_filter(struct kvm_x86_msr_filter *msr_filter,
6155 struct kvm_msr_filter_range *user_range)
6157 unsigned long *bitmap = NULL;
6160 if (!user_range->nmsrs)
6163 if (user_range->flags & ~(KVM_MSR_FILTER_READ | KVM_MSR_FILTER_WRITE))
6166 if (!user_range->flags)
6169 bitmap_size = BITS_TO_LONGS(user_range->nmsrs) * sizeof(long);
6170 if (!bitmap_size || bitmap_size > KVM_MSR_FILTER_MAX_BITMAP_SIZE)
6173 bitmap = memdup_user((__user u8*)user_range->bitmap, bitmap_size);
6175 return PTR_ERR(bitmap);
6177 msr_filter->ranges[msr_filter->count] = (struct msr_bitmap_range) {
6178 .flags = user_range->flags,
6179 .base = user_range->base,
6180 .nmsrs = user_range->nmsrs,
6184 msr_filter->count++;
6188 static int kvm_vm_ioctl_set_msr_filter(struct kvm *kvm, void __user *argp)
6190 struct kvm_msr_filter __user *user_msr_filter = argp;
6191 struct kvm_x86_msr_filter *new_filter, *old_filter;
6192 struct kvm_msr_filter filter;
6198 if (copy_from_user(&filter, user_msr_filter, sizeof(filter)))
6201 for (i = 0; i < ARRAY_SIZE(filter.ranges); i++)
6202 empty &= !filter.ranges[i].nmsrs;
6204 default_allow = !(filter.flags & KVM_MSR_FILTER_DEFAULT_DENY);
6205 if (empty && !default_allow)
6208 new_filter = kvm_alloc_msr_filter(default_allow);
6212 for (i = 0; i < ARRAY_SIZE(filter.ranges); i++) {
6213 r = kvm_add_msr_filter(new_filter, &filter.ranges[i]);
6215 kvm_free_msr_filter(new_filter);
6220 mutex_lock(&kvm->lock);
6222 /* The per-VM filter is protected by kvm->lock... */
6223 old_filter = srcu_dereference_check(kvm->arch.msr_filter, &kvm->srcu, 1);
6225 rcu_assign_pointer(kvm->arch.msr_filter, new_filter);
6226 synchronize_srcu(&kvm->srcu);
6228 kvm_free_msr_filter(old_filter);
6230 kvm_make_all_cpus_request(kvm, KVM_REQ_MSR_FILTER_CHANGED);
6231 mutex_unlock(&kvm->lock);
6236 #ifdef CONFIG_HAVE_KVM_PM_NOTIFIER
6237 static int kvm_arch_suspend_notifier(struct kvm *kvm)
6239 struct kvm_vcpu *vcpu;
6243 mutex_lock(&kvm->lock);
6244 kvm_for_each_vcpu(i, vcpu, kvm) {
6245 if (!vcpu->arch.pv_time.active)
6248 ret = kvm_set_guest_paused(vcpu);
6250 kvm_err("Failed to pause guest VCPU%d: %d\n",
6251 vcpu->vcpu_id, ret);
6255 mutex_unlock(&kvm->lock);
6257 return ret ? NOTIFY_BAD : NOTIFY_DONE;
6260 int kvm_arch_pm_notifier(struct kvm *kvm, unsigned long state)
6263 case PM_HIBERNATION_PREPARE:
6264 case PM_SUSPEND_PREPARE:
6265 return kvm_arch_suspend_notifier(kvm);
6270 #endif /* CONFIG_HAVE_KVM_PM_NOTIFIER */
6272 static int kvm_vm_ioctl_get_clock(struct kvm *kvm, void __user *argp)
6274 struct kvm_clock_data data = { 0 };
6276 get_kvmclock(kvm, &data);
6277 if (copy_to_user(argp, &data, sizeof(data)))
6283 static int kvm_vm_ioctl_set_clock(struct kvm *kvm, void __user *argp)
6285 struct kvm_arch *ka = &kvm->arch;
6286 struct kvm_clock_data data;
6289 if (copy_from_user(&data, argp, sizeof(data)))
6293 * Only KVM_CLOCK_REALTIME is used, but allow passing the
6294 * result of KVM_GET_CLOCK back to KVM_SET_CLOCK.
6296 if (data.flags & ~KVM_CLOCK_VALID_FLAGS)
6299 kvm_hv_request_tsc_page_update(kvm);
6300 kvm_start_pvclock_update(kvm);
6301 pvclock_update_vm_gtod_copy(kvm);
6304 * This pairs with kvm_guest_time_update(): when masterclock is
6305 * in use, we use master_kernel_ns + kvmclock_offset to set
6306 * unsigned 'system_time' so if we use get_kvmclock_ns() (which
6307 * is slightly ahead) here we risk going negative on unsigned
6308 * 'system_time' when 'data.clock' is very small.
6310 if (data.flags & KVM_CLOCK_REALTIME) {
6311 u64 now_real_ns = ktime_get_real_ns();
6314 * Avoid stepping the kvmclock backwards.
6316 if (now_real_ns > data.realtime)
6317 data.clock += now_real_ns - data.realtime;
6320 if (ka->use_master_clock)
6321 now_raw_ns = ka->master_kernel_ns;
6323 now_raw_ns = get_kvmclock_base_ns();
6324 ka->kvmclock_offset = data.clock - now_raw_ns;
6325 kvm_end_pvclock_update(kvm);
6329 long kvm_arch_vm_ioctl(struct file *filp,
6330 unsigned int ioctl, unsigned long arg)
6332 struct kvm *kvm = filp->private_data;
6333 void __user *argp = (void __user *)arg;
6336 * This union makes it completely explicit to gcc-3.x
6337 * that these two variables' stack usage should be
6338 * combined, not added together.
6341 struct kvm_pit_state ps;
6342 struct kvm_pit_state2 ps2;
6343 struct kvm_pit_config pit_config;
6347 case KVM_SET_TSS_ADDR:
6348 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
6350 case KVM_SET_IDENTITY_MAP_ADDR: {
6353 mutex_lock(&kvm->lock);
6355 if (kvm->created_vcpus)
6356 goto set_identity_unlock;
6358 if (copy_from_user(&ident_addr, argp, sizeof(ident_addr)))
6359 goto set_identity_unlock;
6360 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
6361 set_identity_unlock:
6362 mutex_unlock(&kvm->lock);
6365 case KVM_SET_NR_MMU_PAGES:
6366 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
6368 case KVM_GET_NR_MMU_PAGES:
6369 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
6371 case KVM_CREATE_IRQCHIP: {
6372 mutex_lock(&kvm->lock);
6375 if (irqchip_in_kernel(kvm))
6376 goto create_irqchip_unlock;
6379 if (kvm->created_vcpus)
6380 goto create_irqchip_unlock;
6382 r = kvm_pic_init(kvm);
6384 goto create_irqchip_unlock;
6386 r = kvm_ioapic_init(kvm);
6388 kvm_pic_destroy(kvm);
6389 goto create_irqchip_unlock;
6392 r = kvm_setup_default_irq_routing(kvm);
6394 kvm_ioapic_destroy(kvm);
6395 kvm_pic_destroy(kvm);
6396 goto create_irqchip_unlock;
6398 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
6400 kvm->arch.irqchip_mode = KVM_IRQCHIP_KERNEL;
6401 kvm_clear_apicv_inhibit(kvm, APICV_INHIBIT_REASON_ABSENT);
6402 create_irqchip_unlock:
6403 mutex_unlock(&kvm->lock);
6406 case KVM_CREATE_PIT:
6407 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
6409 case KVM_CREATE_PIT2:
6411 if (copy_from_user(&u.pit_config, argp,
6412 sizeof(struct kvm_pit_config)))
6415 mutex_lock(&kvm->lock);
6418 goto create_pit_unlock;
6420 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
6424 mutex_unlock(&kvm->lock);
6426 case KVM_GET_IRQCHIP: {
6427 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
6428 struct kvm_irqchip *chip;
6430 chip = memdup_user(argp, sizeof(*chip));
6437 if (!irqchip_kernel(kvm))
6438 goto get_irqchip_out;
6439 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
6441 goto get_irqchip_out;
6443 if (copy_to_user(argp, chip, sizeof(*chip)))
6444 goto get_irqchip_out;
6450 case KVM_SET_IRQCHIP: {
6451 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
6452 struct kvm_irqchip *chip;
6454 chip = memdup_user(argp, sizeof(*chip));
6461 if (!irqchip_kernel(kvm))
6462 goto set_irqchip_out;
6463 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
6470 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
6473 if (!kvm->arch.vpit)
6475 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
6479 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
6486 if (copy_from_user(&u.ps, argp, sizeof(u.ps)))
6488 mutex_lock(&kvm->lock);
6490 if (!kvm->arch.vpit)
6492 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
6494 mutex_unlock(&kvm->lock);
6497 case KVM_GET_PIT2: {
6499 if (!kvm->arch.vpit)
6501 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
6505 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
6510 case KVM_SET_PIT2: {
6512 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
6514 mutex_lock(&kvm->lock);
6516 if (!kvm->arch.vpit)
6518 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
6520 mutex_unlock(&kvm->lock);
6523 case KVM_REINJECT_CONTROL: {
6524 struct kvm_reinject_control control;
6526 if (copy_from_user(&control, argp, sizeof(control)))
6529 if (!kvm->arch.vpit)
6531 r = kvm_vm_ioctl_reinject(kvm, &control);
6534 case KVM_SET_BOOT_CPU_ID:
6536 mutex_lock(&kvm->lock);
6537 if (kvm->created_vcpus)
6540 kvm->arch.bsp_vcpu_id = arg;
6541 mutex_unlock(&kvm->lock);
6543 #ifdef CONFIG_KVM_XEN
6544 case KVM_XEN_HVM_CONFIG: {
6545 struct kvm_xen_hvm_config xhc;
6547 if (copy_from_user(&xhc, argp, sizeof(xhc)))
6549 r = kvm_xen_hvm_config(kvm, &xhc);
6552 case KVM_XEN_HVM_GET_ATTR: {
6553 struct kvm_xen_hvm_attr xha;
6556 if (copy_from_user(&xha, argp, sizeof(xha)))
6558 r = kvm_xen_hvm_get_attr(kvm, &xha);
6559 if (!r && copy_to_user(argp, &xha, sizeof(xha)))
6563 case KVM_XEN_HVM_SET_ATTR: {
6564 struct kvm_xen_hvm_attr xha;
6567 if (copy_from_user(&xha, argp, sizeof(xha)))
6569 r = kvm_xen_hvm_set_attr(kvm, &xha);
6572 case KVM_XEN_HVM_EVTCHN_SEND: {
6573 struct kvm_irq_routing_xen_evtchn uxe;
6576 if (copy_from_user(&uxe, argp, sizeof(uxe)))
6578 r = kvm_xen_hvm_evtchn_send(kvm, &uxe);
6583 r = kvm_vm_ioctl_set_clock(kvm, argp);
6586 r = kvm_vm_ioctl_get_clock(kvm, argp);
6588 case KVM_SET_TSC_KHZ: {
6592 user_tsc_khz = (u32)arg;
6594 if (kvm_has_tsc_control &&
6595 user_tsc_khz >= kvm_max_guest_tsc_khz)
6598 if (user_tsc_khz == 0)
6599 user_tsc_khz = tsc_khz;
6601 WRITE_ONCE(kvm->arch.default_tsc_khz, user_tsc_khz);
6606 case KVM_GET_TSC_KHZ: {
6607 r = READ_ONCE(kvm->arch.default_tsc_khz);
6610 case KVM_MEMORY_ENCRYPT_OP: {
6612 if (!kvm_x86_ops.mem_enc_ioctl)
6615 r = static_call(kvm_x86_mem_enc_ioctl)(kvm, argp);
6618 case KVM_MEMORY_ENCRYPT_REG_REGION: {
6619 struct kvm_enc_region region;
6622 if (copy_from_user(®ion, argp, sizeof(region)))
6626 if (!kvm_x86_ops.mem_enc_register_region)
6629 r = static_call(kvm_x86_mem_enc_register_region)(kvm, ®ion);
6632 case KVM_MEMORY_ENCRYPT_UNREG_REGION: {
6633 struct kvm_enc_region region;
6636 if (copy_from_user(®ion, argp, sizeof(region)))
6640 if (!kvm_x86_ops.mem_enc_unregister_region)
6643 r = static_call(kvm_x86_mem_enc_unregister_region)(kvm, ®ion);
6646 case KVM_HYPERV_EVENTFD: {
6647 struct kvm_hyperv_eventfd hvevfd;
6650 if (copy_from_user(&hvevfd, argp, sizeof(hvevfd)))
6652 r = kvm_vm_ioctl_hv_eventfd(kvm, &hvevfd);
6655 case KVM_SET_PMU_EVENT_FILTER:
6656 r = kvm_vm_ioctl_set_pmu_event_filter(kvm, argp);
6658 case KVM_X86_SET_MSR_FILTER:
6659 r = kvm_vm_ioctl_set_msr_filter(kvm, argp);
6668 static void kvm_init_msr_list(void)
6670 struct x86_pmu_capability x86_pmu;
6674 BUILD_BUG_ON_MSG(KVM_PMC_MAX_FIXED != 3,
6675 "Please update the fixed PMCs in msrs_to_saved_all[]");
6677 perf_get_x86_pmu_capability(&x86_pmu);
6679 num_msrs_to_save = 0;
6680 num_emulated_msrs = 0;
6681 num_msr_based_features = 0;
6683 for (i = 0; i < ARRAY_SIZE(msrs_to_save_all); i++) {
6684 if (rdmsr_safe(msrs_to_save_all[i], &dummy[0], &dummy[1]) < 0)
6688 * Even MSRs that are valid in the host may not be exposed
6689 * to the guests in some cases.
6691 switch (msrs_to_save_all[i]) {
6692 case MSR_IA32_BNDCFGS:
6693 if (!kvm_mpx_supported())
6697 if (!kvm_cpu_cap_has(X86_FEATURE_RDTSCP) &&
6698 !kvm_cpu_cap_has(X86_FEATURE_RDPID))
6701 case MSR_IA32_UMWAIT_CONTROL:
6702 if (!kvm_cpu_cap_has(X86_FEATURE_WAITPKG))
6705 case MSR_IA32_RTIT_CTL:
6706 case MSR_IA32_RTIT_STATUS:
6707 if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT))
6710 case MSR_IA32_RTIT_CR3_MATCH:
6711 if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
6712 !intel_pt_validate_hw_cap(PT_CAP_cr3_filtering))
6715 case MSR_IA32_RTIT_OUTPUT_BASE:
6716 case MSR_IA32_RTIT_OUTPUT_MASK:
6717 if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
6718 (!intel_pt_validate_hw_cap(PT_CAP_topa_output) &&
6719 !intel_pt_validate_hw_cap(PT_CAP_single_range_output)))
6722 case MSR_IA32_RTIT_ADDR0_A ... MSR_IA32_RTIT_ADDR3_B:
6723 if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
6724 msrs_to_save_all[i] - MSR_IA32_RTIT_ADDR0_A >=
6725 intel_pt_validate_hw_cap(PT_CAP_num_address_ranges) * 2)
6728 case MSR_ARCH_PERFMON_PERFCTR0 ... MSR_ARCH_PERFMON_PERFCTR0 + 17:
6729 if (msrs_to_save_all[i] - MSR_ARCH_PERFMON_PERFCTR0 >=
6730 min(INTEL_PMC_MAX_GENERIC, x86_pmu.num_counters_gp))
6733 case MSR_ARCH_PERFMON_EVENTSEL0 ... MSR_ARCH_PERFMON_EVENTSEL0 + 17:
6734 if (msrs_to_save_all[i] - MSR_ARCH_PERFMON_EVENTSEL0 >=
6735 min(INTEL_PMC_MAX_GENERIC, x86_pmu.num_counters_gp))
6739 case MSR_IA32_XFD_ERR:
6740 if (!kvm_cpu_cap_has(X86_FEATURE_XFD))
6747 msrs_to_save[num_msrs_to_save++] = msrs_to_save_all[i];
6750 for (i = 0; i < ARRAY_SIZE(emulated_msrs_all); i++) {
6751 if (!static_call(kvm_x86_has_emulated_msr)(NULL, emulated_msrs_all[i]))
6754 emulated_msrs[num_emulated_msrs++] = emulated_msrs_all[i];
6757 for (i = 0; i < ARRAY_SIZE(msr_based_features_all); i++) {
6758 struct kvm_msr_entry msr;
6760 msr.index = msr_based_features_all[i];
6761 if (kvm_get_msr_feature(&msr))
6764 msr_based_features[num_msr_based_features++] = msr_based_features_all[i];
6768 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
6776 if (!(lapic_in_kernel(vcpu) &&
6777 !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
6778 && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
6789 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
6796 if (!(lapic_in_kernel(vcpu) &&
6797 !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
6799 && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
6801 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, v);
6811 static void kvm_set_segment(struct kvm_vcpu *vcpu,
6812 struct kvm_segment *var, int seg)
6814 static_call(kvm_x86_set_segment)(vcpu, var, seg);
6817 void kvm_get_segment(struct kvm_vcpu *vcpu,
6818 struct kvm_segment *var, int seg)
6820 static_call(kvm_x86_get_segment)(vcpu, var, seg);
6823 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u64 access,
6824 struct x86_exception *exception)
6826 struct kvm_mmu *mmu = vcpu->arch.mmu;
6829 BUG_ON(!mmu_is_nested(vcpu));
6831 /* NPT walks are always user-walks */
6832 access |= PFERR_USER_MASK;
6833 t_gpa = mmu->gva_to_gpa(vcpu, mmu, gpa, access, exception);
6838 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
6839 struct x86_exception *exception)
6841 struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
6843 u64 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6844 return mmu->gva_to_gpa(vcpu, mmu, gva, access, exception);
6846 EXPORT_SYMBOL_GPL(kvm_mmu_gva_to_gpa_read);
6848 gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
6849 struct x86_exception *exception)
6851 struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
6853 u64 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6854 access |= PFERR_FETCH_MASK;
6855 return mmu->gva_to_gpa(vcpu, mmu, gva, access, exception);
6858 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
6859 struct x86_exception *exception)
6861 struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
6863 u64 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6864 access |= PFERR_WRITE_MASK;
6865 return mmu->gva_to_gpa(vcpu, mmu, gva, access, exception);
6867 EXPORT_SYMBOL_GPL(kvm_mmu_gva_to_gpa_write);
6869 /* uses this to access any guest's mapped memory without checking CPL */
6870 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
6871 struct x86_exception *exception)
6873 struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
6875 return mmu->gva_to_gpa(vcpu, mmu, gva, 0, exception);
6878 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
6879 struct kvm_vcpu *vcpu, u64 access,
6880 struct x86_exception *exception)
6882 struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
6884 int r = X86EMUL_CONTINUE;
6887 gpa_t gpa = mmu->gva_to_gpa(vcpu, mmu, addr, access, exception);
6888 unsigned offset = addr & (PAGE_SIZE-1);
6889 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
6892 if (gpa == UNMAPPED_GVA)
6893 return X86EMUL_PROPAGATE_FAULT;
6894 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
6897 r = X86EMUL_IO_NEEDED;
6909 /* used for instruction fetching */
6910 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
6911 gva_t addr, void *val, unsigned int bytes,
6912 struct x86_exception *exception)
6914 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6915 struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
6916 u64 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6920 /* Inline kvm_read_guest_virt_helper for speed. */
6921 gpa_t gpa = mmu->gva_to_gpa(vcpu, mmu, addr, access|PFERR_FETCH_MASK,
6923 if (unlikely(gpa == UNMAPPED_GVA))
6924 return X86EMUL_PROPAGATE_FAULT;
6926 offset = addr & (PAGE_SIZE-1);
6927 if (WARN_ON(offset + bytes > PAGE_SIZE))
6928 bytes = (unsigned)PAGE_SIZE - offset;
6929 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
6931 if (unlikely(ret < 0))
6932 return X86EMUL_IO_NEEDED;
6934 return X86EMUL_CONTINUE;
6937 int kvm_read_guest_virt(struct kvm_vcpu *vcpu,
6938 gva_t addr, void *val, unsigned int bytes,
6939 struct x86_exception *exception)
6941 u64 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6944 * FIXME: this should call handle_emulation_failure if X86EMUL_IO_NEEDED
6945 * is returned, but our callers are not ready for that and they blindly
6946 * call kvm_inject_page_fault. Ensure that they at least do not leak
6947 * uninitialized kernel stack memory into cr2 and error code.
6949 memset(exception, 0, sizeof(*exception));
6950 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
6953 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
6955 static int emulator_read_std(struct x86_emulate_ctxt *ctxt,
6956 gva_t addr, void *val, unsigned int bytes,
6957 struct x86_exception *exception, bool system)
6959 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6963 access |= PFERR_IMPLICIT_ACCESS;
6964 else if (static_call(kvm_x86_get_cpl)(vcpu) == 3)
6965 access |= PFERR_USER_MASK;
6967 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access, exception);
6970 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt *ctxt,
6971 unsigned long addr, void *val, unsigned int bytes)
6973 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6974 int r = kvm_vcpu_read_guest(vcpu, addr, val, bytes);
6976 return r < 0 ? X86EMUL_IO_NEEDED : X86EMUL_CONTINUE;
6979 static int kvm_write_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
6980 struct kvm_vcpu *vcpu, u64 access,
6981 struct x86_exception *exception)
6983 struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
6985 int r = X86EMUL_CONTINUE;
6988 gpa_t gpa = mmu->gva_to_gpa(vcpu, mmu, addr, access, exception);
6989 unsigned offset = addr & (PAGE_SIZE-1);
6990 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
6993 if (gpa == UNMAPPED_GVA)
6994 return X86EMUL_PROPAGATE_FAULT;
6995 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
6997 r = X86EMUL_IO_NEEDED;
7009 static int emulator_write_std(struct x86_emulate_ctxt *ctxt, gva_t addr, void *val,
7010 unsigned int bytes, struct x86_exception *exception,
7013 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7014 u64 access = PFERR_WRITE_MASK;
7017 access |= PFERR_IMPLICIT_ACCESS;
7018 else if (static_call(kvm_x86_get_cpl)(vcpu) == 3)
7019 access |= PFERR_USER_MASK;
7021 return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
7025 int kvm_write_guest_virt_system(struct kvm_vcpu *vcpu, gva_t addr, void *val,
7026 unsigned int bytes, struct x86_exception *exception)
7028 /* kvm_write_guest_virt_system can pull in tons of pages. */
7029 vcpu->arch.l1tf_flush_l1d = true;
7031 return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
7032 PFERR_WRITE_MASK, exception);
7034 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
7036 static int kvm_can_emulate_insn(struct kvm_vcpu *vcpu, int emul_type,
7037 void *insn, int insn_len)
7039 return static_call(kvm_x86_can_emulate_instruction)(vcpu, emul_type,
7043 int handle_ud(struct kvm_vcpu *vcpu)
7045 static const char kvm_emulate_prefix[] = { __KVM_EMULATE_PREFIX };
7046 int emul_type = EMULTYPE_TRAP_UD;
7047 char sig[5]; /* ud2; .ascii "kvm" */
7048 struct x86_exception e;
7050 if (unlikely(!kvm_can_emulate_insn(vcpu, emul_type, NULL, 0)))
7053 if (force_emulation_prefix &&
7054 kvm_read_guest_virt(vcpu, kvm_get_linear_rip(vcpu),
7055 sig, sizeof(sig), &e) == 0 &&
7056 memcmp(sig, kvm_emulate_prefix, sizeof(sig)) == 0) {
7057 kvm_rip_write(vcpu, kvm_rip_read(vcpu) + sizeof(sig));
7058 emul_type = EMULTYPE_TRAP_UD_FORCED;
7061 return kvm_emulate_instruction(vcpu, emul_type);
7063 EXPORT_SYMBOL_GPL(handle_ud);
7065 static int vcpu_is_mmio_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
7066 gpa_t gpa, bool write)
7068 /* For APIC access vmexit */
7069 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
7072 if (vcpu_match_mmio_gpa(vcpu, gpa)) {
7073 trace_vcpu_match_mmio(gva, gpa, write, true);
7080 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
7081 gpa_t *gpa, struct x86_exception *exception,
7084 struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
7085 u64 access = ((static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0)
7086 | (write ? PFERR_WRITE_MASK : 0);
7089 * currently PKRU is only applied to ept enabled guest so
7090 * there is no pkey in EPT page table for L1 guest or EPT
7091 * shadow page table for L2 guest.
7093 if (vcpu_match_mmio_gva(vcpu, gva) && (!is_paging(vcpu) ||
7094 !permission_fault(vcpu, vcpu->arch.walk_mmu,
7095 vcpu->arch.mmio_access, 0, access))) {
7096 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
7097 (gva & (PAGE_SIZE - 1));
7098 trace_vcpu_match_mmio(gva, *gpa, write, false);
7102 *gpa = mmu->gva_to_gpa(vcpu, mmu, gva, access, exception);
7104 if (*gpa == UNMAPPED_GVA)
7107 return vcpu_is_mmio_gpa(vcpu, gva, *gpa, write);
7110 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
7111 const void *val, int bytes)
7115 ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
7118 kvm_page_track_write(vcpu, gpa, val, bytes);
7122 struct read_write_emulator_ops {
7123 int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
7125 int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
7126 void *val, int bytes);
7127 int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
7128 int bytes, void *val);
7129 int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
7130 void *val, int bytes);
7134 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
7136 if (vcpu->mmio_read_completed) {
7137 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
7138 vcpu->mmio_fragments[0].gpa, val);
7139 vcpu->mmio_read_completed = 0;
7146 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
7147 void *val, int bytes)
7149 return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
7152 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
7153 void *val, int bytes)
7155 return emulator_write_phys(vcpu, gpa, val, bytes);
7158 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
7160 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, val);
7161 return vcpu_mmio_write(vcpu, gpa, bytes, val);
7164 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
7165 void *val, int bytes)
7167 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, NULL);
7168 return X86EMUL_IO_NEEDED;
7171 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
7172 void *val, int bytes)
7174 struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
7176 memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
7177 return X86EMUL_CONTINUE;
7180 static const struct read_write_emulator_ops read_emultor = {
7181 .read_write_prepare = read_prepare,
7182 .read_write_emulate = read_emulate,
7183 .read_write_mmio = vcpu_mmio_read,
7184 .read_write_exit_mmio = read_exit_mmio,
7187 static const struct read_write_emulator_ops write_emultor = {
7188 .read_write_emulate = write_emulate,
7189 .read_write_mmio = write_mmio,
7190 .read_write_exit_mmio = write_exit_mmio,
7194 static int emulator_read_write_onepage(unsigned long addr, void *val,
7196 struct x86_exception *exception,
7197 struct kvm_vcpu *vcpu,
7198 const struct read_write_emulator_ops *ops)
7202 bool write = ops->write;
7203 struct kvm_mmio_fragment *frag;
7204 struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7207 * If the exit was due to a NPF we may already have a GPA.
7208 * If the GPA is present, use it to avoid the GVA to GPA table walk.
7209 * Note, this cannot be used on string operations since string
7210 * operation using rep will only have the initial GPA from the NPF
7213 if (ctxt->gpa_available && emulator_can_use_gpa(ctxt) &&
7214 (addr & ~PAGE_MASK) == (ctxt->gpa_val & ~PAGE_MASK)) {
7215 gpa = ctxt->gpa_val;
7216 ret = vcpu_is_mmio_gpa(vcpu, addr, gpa, write);
7218 ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
7220 return X86EMUL_PROPAGATE_FAULT;
7223 if (!ret && ops->read_write_emulate(vcpu, gpa, val, bytes))
7224 return X86EMUL_CONTINUE;
7227 * Is this MMIO handled locally?
7229 handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
7230 if (handled == bytes)
7231 return X86EMUL_CONTINUE;
7237 WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
7238 frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
7242 return X86EMUL_CONTINUE;
7245 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
7247 void *val, unsigned int bytes,
7248 struct x86_exception *exception,
7249 const struct read_write_emulator_ops *ops)
7251 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7255 if (ops->read_write_prepare &&
7256 ops->read_write_prepare(vcpu, val, bytes))
7257 return X86EMUL_CONTINUE;
7259 vcpu->mmio_nr_fragments = 0;
7261 /* Crossing a page boundary? */
7262 if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
7265 now = -addr & ~PAGE_MASK;
7266 rc = emulator_read_write_onepage(addr, val, now, exception,
7269 if (rc != X86EMUL_CONTINUE)
7272 if (ctxt->mode != X86EMUL_MODE_PROT64)
7278 rc = emulator_read_write_onepage(addr, val, bytes, exception,
7280 if (rc != X86EMUL_CONTINUE)
7283 if (!vcpu->mmio_nr_fragments)
7286 gpa = vcpu->mmio_fragments[0].gpa;
7288 vcpu->mmio_needed = 1;
7289 vcpu->mmio_cur_fragment = 0;
7291 vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
7292 vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
7293 vcpu->run->exit_reason = KVM_EXIT_MMIO;
7294 vcpu->run->mmio.phys_addr = gpa;
7296 return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
7299 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
7303 struct x86_exception *exception)
7305 return emulator_read_write(ctxt, addr, val, bytes,
7306 exception, &read_emultor);
7309 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
7313 struct x86_exception *exception)
7315 return emulator_read_write(ctxt, addr, (void *)val, bytes,
7316 exception, &write_emultor);
7319 #define emulator_try_cmpxchg_user(t, ptr, old, new) \
7320 (__try_cmpxchg_user((t __user *)(ptr), (t *)(old), *(t *)(new), efault ## t))
7322 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
7327 struct x86_exception *exception)
7329 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7335 /* guests cmpxchg8b have to be emulated atomically */
7336 if (bytes > 8 || (bytes & (bytes - 1)))
7339 gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
7341 if (gpa == UNMAPPED_GVA ||
7342 (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
7346 * Emulate the atomic as a straight write to avoid #AC if SLD is
7347 * enabled in the host and the access splits a cache line.
7349 if (boot_cpu_has(X86_FEATURE_SPLIT_LOCK_DETECT))
7350 page_line_mask = ~(cache_line_size() - 1);
7352 page_line_mask = PAGE_MASK;
7354 if (((gpa + bytes - 1) & page_line_mask) != (gpa & page_line_mask))
7357 hva = kvm_vcpu_gfn_to_hva(vcpu, gpa_to_gfn(gpa));
7358 if (kvm_is_error_hva(hva))
7361 hva += offset_in_page(gpa);
7365 r = emulator_try_cmpxchg_user(u8, hva, old, new);
7368 r = emulator_try_cmpxchg_user(u16, hva, old, new);
7371 r = emulator_try_cmpxchg_user(u32, hva, old, new);
7374 r = emulator_try_cmpxchg_user(u64, hva, old, new);
7381 return X86EMUL_UNHANDLEABLE;
7383 return X86EMUL_CMPXCHG_FAILED;
7385 kvm_page_track_write(vcpu, gpa, new, bytes);
7387 return X86EMUL_CONTINUE;
7390 printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
7392 return emulator_write_emulated(ctxt, addr, new, bytes, exception);
7395 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
7399 for (i = 0; i < vcpu->arch.pio.count; i++) {
7400 if (vcpu->arch.pio.in)
7401 r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
7402 vcpu->arch.pio.size, pd);
7404 r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
7405 vcpu->arch.pio.port, vcpu->arch.pio.size,
7409 pd += vcpu->arch.pio.size;
7414 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
7415 unsigned short port,
7416 unsigned int count, bool in)
7418 vcpu->arch.pio.port = port;
7419 vcpu->arch.pio.in = in;
7420 vcpu->arch.pio.count = count;
7421 vcpu->arch.pio.size = size;
7423 if (!kernel_pio(vcpu, vcpu->arch.pio_data))
7426 vcpu->run->exit_reason = KVM_EXIT_IO;
7427 vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
7428 vcpu->run->io.size = size;
7429 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
7430 vcpu->run->io.count = count;
7431 vcpu->run->io.port = port;
7436 static int __emulator_pio_in(struct kvm_vcpu *vcpu, int size,
7437 unsigned short port, unsigned int count)
7439 WARN_ON(vcpu->arch.pio.count);
7440 memset(vcpu->arch.pio_data, 0, size * count);
7441 return emulator_pio_in_out(vcpu, size, port, count, true);
7444 static void complete_emulator_pio_in(struct kvm_vcpu *vcpu, void *val)
7446 int size = vcpu->arch.pio.size;
7447 unsigned count = vcpu->arch.pio.count;
7448 memcpy(val, vcpu->arch.pio_data, size * count);
7449 trace_kvm_pio(KVM_PIO_IN, vcpu->arch.pio.port, size, count, vcpu->arch.pio_data);
7450 vcpu->arch.pio.count = 0;
7453 static int emulator_pio_in(struct kvm_vcpu *vcpu, int size,
7454 unsigned short port, void *val, unsigned int count)
7456 if (vcpu->arch.pio.count) {
7458 * Complete a previous iteration that required userspace I/O.
7459 * Note, @count isn't guaranteed to match pio.count as userspace
7460 * can modify ECX before rerunning the vCPU. Ignore any such
7461 * shenanigans as KVM doesn't support modifying the rep count,
7462 * and the emulator ensures @count doesn't overflow the buffer.
7465 int r = __emulator_pio_in(vcpu, size, port, count);
7469 /* Results already available, fall through. */
7472 complete_emulator_pio_in(vcpu, val);
7476 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
7477 int size, unsigned short port, void *val,
7480 return emulator_pio_in(emul_to_vcpu(ctxt), size, port, val, count);
7484 static int emulator_pio_out(struct kvm_vcpu *vcpu, int size,
7485 unsigned short port, const void *val,
7490 memcpy(vcpu->arch.pio_data, val, size * count);
7491 trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
7492 ret = emulator_pio_in_out(vcpu, size, port, count, false);
7494 vcpu->arch.pio.count = 0;
7499 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
7500 int size, unsigned short port,
7501 const void *val, unsigned int count)
7503 return emulator_pio_out(emul_to_vcpu(ctxt), size, port, val, count);
7506 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
7508 return static_call(kvm_x86_get_segment_base)(vcpu, seg);
7511 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
7513 kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
7516 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
7518 if (!need_emulate_wbinvd(vcpu))
7519 return X86EMUL_CONTINUE;
7521 if (static_call(kvm_x86_has_wbinvd_exit)()) {
7522 int cpu = get_cpu();
7524 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
7525 on_each_cpu_mask(vcpu->arch.wbinvd_dirty_mask,
7526 wbinvd_ipi, NULL, 1);
7528 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
7531 return X86EMUL_CONTINUE;
7534 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
7536 kvm_emulate_wbinvd_noskip(vcpu);
7537 return kvm_skip_emulated_instruction(vcpu);
7539 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
7543 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
7545 kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
7548 static void emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
7549 unsigned long *dest)
7551 kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
7554 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
7555 unsigned long value)
7558 return kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
7561 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
7563 return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
7566 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
7568 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7569 unsigned long value;
7573 value = kvm_read_cr0(vcpu);
7576 value = vcpu->arch.cr2;
7579 value = kvm_read_cr3(vcpu);
7582 value = kvm_read_cr4(vcpu);
7585 value = kvm_get_cr8(vcpu);
7588 kvm_err("%s: unexpected cr %u\n", __func__, cr);
7595 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
7597 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7602 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
7605 vcpu->arch.cr2 = val;
7608 res = kvm_set_cr3(vcpu, val);
7611 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
7614 res = kvm_set_cr8(vcpu, val);
7617 kvm_err("%s: unexpected cr %u\n", __func__, cr);
7624 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
7626 return static_call(kvm_x86_get_cpl)(emul_to_vcpu(ctxt));
7629 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
7631 static_call(kvm_x86_get_gdt)(emul_to_vcpu(ctxt), dt);
7634 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
7636 static_call(kvm_x86_get_idt)(emul_to_vcpu(ctxt), dt);
7639 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
7641 static_call(kvm_x86_set_gdt)(emul_to_vcpu(ctxt), dt);
7644 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
7646 static_call(kvm_x86_set_idt)(emul_to_vcpu(ctxt), dt);
7649 static unsigned long emulator_get_cached_segment_base(
7650 struct x86_emulate_ctxt *ctxt, int seg)
7652 return get_segment_base(emul_to_vcpu(ctxt), seg);
7655 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
7656 struct desc_struct *desc, u32 *base3,
7659 struct kvm_segment var;
7661 kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
7662 *selector = var.selector;
7665 memset(desc, 0, sizeof(*desc));
7673 set_desc_limit(desc, var.limit);
7674 set_desc_base(desc, (unsigned long)var.base);
7675 #ifdef CONFIG_X86_64
7677 *base3 = var.base >> 32;
7679 desc->type = var.type;
7681 desc->dpl = var.dpl;
7682 desc->p = var.present;
7683 desc->avl = var.avl;
7691 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
7692 struct desc_struct *desc, u32 base3,
7695 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7696 struct kvm_segment var;
7698 var.selector = selector;
7699 var.base = get_desc_base(desc);
7700 #ifdef CONFIG_X86_64
7701 var.base |= ((u64)base3) << 32;
7703 var.limit = get_desc_limit(desc);
7705 var.limit = (var.limit << 12) | 0xfff;
7706 var.type = desc->type;
7707 var.dpl = desc->dpl;
7712 var.avl = desc->avl;
7713 var.present = desc->p;
7714 var.unusable = !var.present;
7717 kvm_set_segment(vcpu, &var, seg);
7721 static int emulator_get_msr_with_filter(struct x86_emulate_ctxt *ctxt,
7722 u32 msr_index, u64 *pdata)
7724 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7727 r = kvm_get_msr_with_filter(vcpu, msr_index, pdata);
7729 if (r && kvm_msr_user_space(vcpu, msr_index, KVM_EXIT_X86_RDMSR, 0,
7730 complete_emulated_rdmsr, r)) {
7731 /* Bounce to user space */
7732 return X86EMUL_IO_NEEDED;
7738 static int emulator_set_msr_with_filter(struct x86_emulate_ctxt *ctxt,
7739 u32 msr_index, u64 data)
7741 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7744 r = kvm_set_msr_with_filter(vcpu, msr_index, data);
7746 if (r && kvm_msr_user_space(vcpu, msr_index, KVM_EXIT_X86_WRMSR, data,
7747 complete_emulated_msr_access, r)) {
7748 /* Bounce to user space */
7749 return X86EMUL_IO_NEEDED;
7755 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
7756 u32 msr_index, u64 *pdata)
7758 return kvm_get_msr(emul_to_vcpu(ctxt), msr_index, pdata);
7761 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
7762 u32 msr_index, u64 data)
7764 return kvm_set_msr(emul_to_vcpu(ctxt), msr_index, data);
7767 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
7769 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7771 return vcpu->arch.smbase;
7774 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
7776 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7778 vcpu->arch.smbase = smbase;
7781 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
7784 if (kvm_pmu_is_valid_rdpmc_ecx(emul_to_vcpu(ctxt), pmc))
7789 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
7790 u32 pmc, u64 *pdata)
7792 return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
7795 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
7797 emul_to_vcpu(ctxt)->arch.halt_request = 1;
7800 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
7801 struct x86_instruction_info *info,
7802 enum x86_intercept_stage stage)
7804 return static_call(kvm_x86_check_intercept)(emul_to_vcpu(ctxt), info, stage,
7808 static bool emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
7809 u32 *eax, u32 *ebx, u32 *ecx, u32 *edx,
7812 return kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx, exact_only);
7815 static bool emulator_guest_has_long_mode(struct x86_emulate_ctxt *ctxt)
7817 return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_LM);
7820 static bool emulator_guest_has_movbe(struct x86_emulate_ctxt *ctxt)
7822 return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_MOVBE);
7825 static bool emulator_guest_has_fxsr(struct x86_emulate_ctxt *ctxt)
7827 return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_FXSR);
7830 static bool emulator_guest_has_rdpid(struct x86_emulate_ctxt *ctxt)
7832 return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_RDPID);
7835 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
7837 return kvm_register_read_raw(emul_to_vcpu(ctxt), reg);
7840 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
7842 kvm_register_write_raw(emul_to_vcpu(ctxt), reg, val);
7845 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
7847 static_call(kvm_x86_set_nmi_mask)(emul_to_vcpu(ctxt), masked);
7850 static unsigned emulator_get_hflags(struct x86_emulate_ctxt *ctxt)
7852 return emul_to_vcpu(ctxt)->arch.hflags;
7855 static void emulator_exiting_smm(struct x86_emulate_ctxt *ctxt)
7857 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7859 kvm_smm_changed(vcpu, false);
7862 static int emulator_leave_smm(struct x86_emulate_ctxt *ctxt,
7863 const char *smstate)
7865 return static_call(kvm_x86_leave_smm)(emul_to_vcpu(ctxt), smstate);
7868 static void emulator_triple_fault(struct x86_emulate_ctxt *ctxt)
7870 kvm_make_request(KVM_REQ_TRIPLE_FAULT, emul_to_vcpu(ctxt));
7873 static int emulator_set_xcr(struct x86_emulate_ctxt *ctxt, u32 index, u64 xcr)
7875 return __kvm_set_xcr(emul_to_vcpu(ctxt), index, xcr);
7878 static const struct x86_emulate_ops emulate_ops = {
7879 .read_gpr = emulator_read_gpr,
7880 .write_gpr = emulator_write_gpr,
7881 .read_std = emulator_read_std,
7882 .write_std = emulator_write_std,
7883 .read_phys = kvm_read_guest_phys_system,
7884 .fetch = kvm_fetch_guest_virt,
7885 .read_emulated = emulator_read_emulated,
7886 .write_emulated = emulator_write_emulated,
7887 .cmpxchg_emulated = emulator_cmpxchg_emulated,
7888 .invlpg = emulator_invlpg,
7889 .pio_in_emulated = emulator_pio_in_emulated,
7890 .pio_out_emulated = emulator_pio_out_emulated,
7891 .get_segment = emulator_get_segment,
7892 .set_segment = emulator_set_segment,
7893 .get_cached_segment_base = emulator_get_cached_segment_base,
7894 .get_gdt = emulator_get_gdt,
7895 .get_idt = emulator_get_idt,
7896 .set_gdt = emulator_set_gdt,
7897 .set_idt = emulator_set_idt,
7898 .get_cr = emulator_get_cr,
7899 .set_cr = emulator_set_cr,
7900 .cpl = emulator_get_cpl,
7901 .get_dr = emulator_get_dr,
7902 .set_dr = emulator_set_dr,
7903 .get_smbase = emulator_get_smbase,
7904 .set_smbase = emulator_set_smbase,
7905 .set_msr_with_filter = emulator_set_msr_with_filter,
7906 .get_msr_with_filter = emulator_get_msr_with_filter,
7907 .set_msr = emulator_set_msr,
7908 .get_msr = emulator_get_msr,
7909 .check_pmc = emulator_check_pmc,
7910 .read_pmc = emulator_read_pmc,
7911 .halt = emulator_halt,
7912 .wbinvd = emulator_wbinvd,
7913 .fix_hypercall = emulator_fix_hypercall,
7914 .intercept = emulator_intercept,
7915 .get_cpuid = emulator_get_cpuid,
7916 .guest_has_long_mode = emulator_guest_has_long_mode,
7917 .guest_has_movbe = emulator_guest_has_movbe,
7918 .guest_has_fxsr = emulator_guest_has_fxsr,
7919 .guest_has_rdpid = emulator_guest_has_rdpid,
7920 .set_nmi_mask = emulator_set_nmi_mask,
7921 .get_hflags = emulator_get_hflags,
7922 .exiting_smm = emulator_exiting_smm,
7923 .leave_smm = emulator_leave_smm,
7924 .triple_fault = emulator_triple_fault,
7925 .set_xcr = emulator_set_xcr,
7928 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
7930 u32 int_shadow = static_call(kvm_x86_get_interrupt_shadow)(vcpu);
7932 * an sti; sti; sequence only disable interrupts for the first
7933 * instruction. So, if the last instruction, be it emulated or
7934 * not, left the system with the INT_STI flag enabled, it
7935 * means that the last instruction is an sti. We should not
7936 * leave the flag on in this case. The same goes for mov ss
7938 if (int_shadow & mask)
7940 if (unlikely(int_shadow || mask)) {
7941 static_call(kvm_x86_set_interrupt_shadow)(vcpu, mask);
7943 kvm_make_request(KVM_REQ_EVENT, vcpu);
7947 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
7949 struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7950 if (ctxt->exception.vector == PF_VECTOR)
7951 return kvm_inject_emulated_page_fault(vcpu, &ctxt->exception);
7953 if (ctxt->exception.error_code_valid)
7954 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
7955 ctxt->exception.error_code);
7957 kvm_queue_exception(vcpu, ctxt->exception.vector);
7961 static struct x86_emulate_ctxt *alloc_emulate_ctxt(struct kvm_vcpu *vcpu)
7963 struct x86_emulate_ctxt *ctxt;
7965 ctxt = kmem_cache_zalloc(x86_emulator_cache, GFP_KERNEL_ACCOUNT);
7967 pr_err("kvm: failed to allocate vcpu's emulator\n");
7972 ctxt->ops = &emulate_ops;
7973 vcpu->arch.emulate_ctxt = ctxt;
7978 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
7980 struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7983 static_call(kvm_x86_get_cs_db_l_bits)(vcpu, &cs_db, &cs_l);
7985 ctxt->gpa_available = false;
7986 ctxt->eflags = kvm_get_rflags(vcpu);
7987 ctxt->tf = (ctxt->eflags & X86_EFLAGS_TF) != 0;
7989 ctxt->eip = kvm_rip_read(vcpu);
7990 ctxt->mode = (!is_protmode(vcpu)) ? X86EMUL_MODE_REAL :
7991 (ctxt->eflags & X86_EFLAGS_VM) ? X86EMUL_MODE_VM86 :
7992 (cs_l && is_long_mode(vcpu)) ? X86EMUL_MODE_PROT64 :
7993 cs_db ? X86EMUL_MODE_PROT32 :
7994 X86EMUL_MODE_PROT16;
7995 BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
7996 BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
7997 BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
7999 ctxt->interruptibility = 0;
8000 ctxt->have_exception = false;
8001 ctxt->exception.vector = -1;
8002 ctxt->perm_ok = false;
8004 init_decode_cache(ctxt);
8005 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
8008 void kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
8010 struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
8013 init_emulate_ctxt(vcpu);
8017 ctxt->_eip = ctxt->eip + inc_eip;
8018 ret = emulate_int_real(ctxt, irq);
8020 if (ret != X86EMUL_CONTINUE) {
8021 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
8023 ctxt->eip = ctxt->_eip;
8024 kvm_rip_write(vcpu, ctxt->eip);
8025 kvm_set_rflags(vcpu, ctxt->eflags);
8028 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
8030 static void prepare_emulation_failure_exit(struct kvm_vcpu *vcpu, u64 *data,
8031 u8 ndata, u8 *insn_bytes, u8 insn_size)
8033 struct kvm_run *run = vcpu->run;
8038 * Zero the whole array used to retrieve the exit info, as casting to
8039 * u32 for select entries will leave some chunks uninitialized.
8041 memset(&info, 0, sizeof(info));
8043 static_call(kvm_x86_get_exit_info)(vcpu, (u32 *)&info[0], &info[1],
8044 &info[2], (u32 *)&info[3],
8047 run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
8048 run->emulation_failure.suberror = KVM_INTERNAL_ERROR_EMULATION;
8051 * There's currently space for 13 entries, but 5 are used for the exit
8052 * reason and info. Restrict to 4 to reduce the maintenance burden
8053 * when expanding kvm_run.emulation_failure in the future.
8055 if (WARN_ON_ONCE(ndata > 4))
8058 /* Always include the flags as a 'data' entry. */
8060 run->emulation_failure.flags = 0;
8063 BUILD_BUG_ON((sizeof(run->emulation_failure.insn_size) +
8064 sizeof(run->emulation_failure.insn_bytes) != 16));
8066 run->emulation_failure.flags |=
8067 KVM_INTERNAL_ERROR_EMULATION_FLAG_INSTRUCTION_BYTES;
8068 run->emulation_failure.insn_size = insn_size;
8069 memset(run->emulation_failure.insn_bytes, 0x90,
8070 sizeof(run->emulation_failure.insn_bytes));
8071 memcpy(run->emulation_failure.insn_bytes, insn_bytes, insn_size);
8074 memcpy(&run->internal.data[info_start], info, sizeof(info));
8075 memcpy(&run->internal.data[info_start + ARRAY_SIZE(info)], data,
8076 ndata * sizeof(data[0]));
8078 run->emulation_failure.ndata = info_start + ARRAY_SIZE(info) + ndata;
8081 static void prepare_emulation_ctxt_failure_exit(struct kvm_vcpu *vcpu)
8083 struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
8085 prepare_emulation_failure_exit(vcpu, NULL, 0, ctxt->fetch.data,
8086 ctxt->fetch.end - ctxt->fetch.data);
8089 void __kvm_prepare_emulation_failure_exit(struct kvm_vcpu *vcpu, u64 *data,
8092 prepare_emulation_failure_exit(vcpu, data, ndata, NULL, 0);
8094 EXPORT_SYMBOL_GPL(__kvm_prepare_emulation_failure_exit);
8096 void kvm_prepare_emulation_failure_exit(struct kvm_vcpu *vcpu)
8098 __kvm_prepare_emulation_failure_exit(vcpu, NULL, 0);
8100 EXPORT_SYMBOL_GPL(kvm_prepare_emulation_failure_exit);
8102 static int handle_emulation_failure(struct kvm_vcpu *vcpu, int emulation_type)
8104 struct kvm *kvm = vcpu->kvm;
8106 ++vcpu->stat.insn_emulation_fail;
8107 trace_kvm_emulate_insn_failed(vcpu);
8109 if (emulation_type & EMULTYPE_VMWARE_GP) {
8110 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
8114 if (kvm->arch.exit_on_emulation_error ||
8115 (emulation_type & EMULTYPE_SKIP)) {
8116 prepare_emulation_ctxt_failure_exit(vcpu);
8120 kvm_queue_exception(vcpu, UD_VECTOR);
8122 if (!is_guest_mode(vcpu) && static_call(kvm_x86_get_cpl)(vcpu) == 0) {
8123 prepare_emulation_ctxt_failure_exit(vcpu);
8130 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa,
8131 bool write_fault_to_shadow_pgtable,
8134 gpa_t gpa = cr2_or_gpa;
8137 if (!(emulation_type & EMULTYPE_ALLOW_RETRY_PF))
8140 if (WARN_ON_ONCE(is_guest_mode(vcpu)) ||
8141 WARN_ON_ONCE(!(emulation_type & EMULTYPE_PF)))
8144 if (!vcpu->arch.mmu->root_role.direct) {
8146 * Write permission should be allowed since only
8147 * write access need to be emulated.
8149 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2_or_gpa, NULL);
8152 * If the mapping is invalid in guest, let cpu retry
8153 * it to generate fault.
8155 if (gpa == UNMAPPED_GVA)
8160 * Do not retry the unhandleable instruction if it faults on the
8161 * readonly host memory, otherwise it will goto a infinite loop:
8162 * retry instruction -> write #PF -> emulation fail -> retry
8163 * instruction -> ...
8165 pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
8168 * If the instruction failed on the error pfn, it can not be fixed,
8169 * report the error to userspace.
8171 if (is_error_noslot_pfn(pfn))
8174 kvm_release_pfn_clean(pfn);
8176 /* The instructions are well-emulated on direct mmu. */
8177 if (vcpu->arch.mmu->root_role.direct) {
8178 unsigned int indirect_shadow_pages;
8180 write_lock(&vcpu->kvm->mmu_lock);
8181 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
8182 write_unlock(&vcpu->kvm->mmu_lock);
8184 if (indirect_shadow_pages)
8185 kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
8191 * if emulation was due to access to shadowed page table
8192 * and it failed try to unshadow page and re-enter the
8193 * guest to let CPU execute the instruction.
8195 kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
8198 * If the access faults on its page table, it can not
8199 * be fixed by unprotecting shadow page and it should
8200 * be reported to userspace.
8202 return !write_fault_to_shadow_pgtable;
8205 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
8206 gpa_t cr2_or_gpa, int emulation_type)
8208 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
8209 unsigned long last_retry_eip, last_retry_addr, gpa = cr2_or_gpa;
8211 last_retry_eip = vcpu->arch.last_retry_eip;
8212 last_retry_addr = vcpu->arch.last_retry_addr;
8215 * If the emulation is caused by #PF and it is non-page_table
8216 * writing instruction, it means the VM-EXIT is caused by shadow
8217 * page protected, we can zap the shadow page and retry this
8218 * instruction directly.
8220 * Note: if the guest uses a non-page-table modifying instruction
8221 * on the PDE that points to the instruction, then we will unmap
8222 * the instruction and go to an infinite loop. So, we cache the
8223 * last retried eip and the last fault address, if we meet the eip
8224 * and the address again, we can break out of the potential infinite
8227 vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
8229 if (!(emulation_type & EMULTYPE_ALLOW_RETRY_PF))
8232 if (WARN_ON_ONCE(is_guest_mode(vcpu)) ||
8233 WARN_ON_ONCE(!(emulation_type & EMULTYPE_PF)))
8236 if (x86_page_table_writing_insn(ctxt))
8239 if (ctxt->eip == last_retry_eip && last_retry_addr == cr2_or_gpa)
8242 vcpu->arch.last_retry_eip = ctxt->eip;
8243 vcpu->arch.last_retry_addr = cr2_or_gpa;
8245 if (!vcpu->arch.mmu->root_role.direct)
8246 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2_or_gpa, NULL);
8248 kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
8253 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
8254 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
8256 static void kvm_smm_changed(struct kvm_vcpu *vcpu, bool entering_smm)
8258 trace_kvm_smm_transition(vcpu->vcpu_id, vcpu->arch.smbase, entering_smm);
8261 vcpu->arch.hflags |= HF_SMM_MASK;
8263 vcpu->arch.hflags &= ~(HF_SMM_MASK | HF_SMM_INSIDE_NMI_MASK);
8265 /* Process a latched INIT or SMI, if any. */
8266 kvm_make_request(KVM_REQ_EVENT, vcpu);
8269 * Even if KVM_SET_SREGS2 loaded PDPTRs out of band,
8270 * on SMM exit we still need to reload them from
8273 vcpu->arch.pdptrs_from_userspace = false;
8276 kvm_mmu_reset_context(vcpu);
8279 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
8288 for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
8289 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
8294 static int kvm_vcpu_do_singlestep(struct kvm_vcpu *vcpu)
8296 struct kvm_run *kvm_run = vcpu->run;
8298 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
8299 kvm_run->debug.arch.dr6 = DR6_BS | DR6_ACTIVE_LOW;
8300 kvm_run->debug.arch.pc = kvm_get_linear_rip(vcpu);
8301 kvm_run->debug.arch.exception = DB_VECTOR;
8302 kvm_run->exit_reason = KVM_EXIT_DEBUG;
8305 kvm_queue_exception_p(vcpu, DB_VECTOR, DR6_BS);
8309 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu)
8311 unsigned long rflags = static_call(kvm_x86_get_rflags)(vcpu);
8314 r = static_call(kvm_x86_skip_emulated_instruction)(vcpu);
8318 kvm_pmu_trigger_event(vcpu, PERF_COUNT_HW_INSTRUCTIONS);
8321 * rflags is the old, "raw" value of the flags. The new value has
8322 * not been saved yet.
8324 * This is correct even for TF set by the guest, because "the
8325 * processor will not generate this exception after the instruction
8326 * that sets the TF flag".
8328 if (unlikely(rflags & X86_EFLAGS_TF))
8329 r = kvm_vcpu_do_singlestep(vcpu);
8332 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction);
8334 static bool kvm_vcpu_check_code_breakpoint(struct kvm_vcpu *vcpu, int *r)
8336 if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
8337 (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
8338 struct kvm_run *kvm_run = vcpu->run;
8339 unsigned long eip = kvm_get_linear_rip(vcpu);
8340 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
8341 vcpu->arch.guest_debug_dr7,
8345 kvm_run->debug.arch.dr6 = dr6 | DR6_ACTIVE_LOW;
8346 kvm_run->debug.arch.pc = eip;
8347 kvm_run->debug.arch.exception = DB_VECTOR;
8348 kvm_run->exit_reason = KVM_EXIT_DEBUG;
8354 if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
8355 !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
8356 unsigned long eip = kvm_get_linear_rip(vcpu);
8357 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
8362 kvm_queue_exception_p(vcpu, DB_VECTOR, dr6);
8371 static bool is_vmware_backdoor_opcode(struct x86_emulate_ctxt *ctxt)
8373 switch (ctxt->opcode_len) {
8380 case 0xe6: /* OUT */
8384 case 0x6c: /* INS */
8386 case 0x6e: /* OUTS */
8393 case 0x33: /* RDPMC */
8403 * Decode an instruction for emulation. The caller is responsible for handling
8404 * code breakpoints. Note, manually detecting code breakpoints is unnecessary
8405 * (and wrong) when emulating on an intercepted fault-like exception[*], as
8406 * code breakpoints have higher priority and thus have already been done by
8409 * [*] Except #MC, which is higher priority, but KVM should never emulate in
8410 * response to a machine check.
8412 int x86_decode_emulated_instruction(struct kvm_vcpu *vcpu, int emulation_type,
8413 void *insn, int insn_len)
8415 struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
8418 init_emulate_ctxt(vcpu);
8420 r = x86_decode_insn(ctxt, insn, insn_len, emulation_type);
8422 trace_kvm_emulate_insn_start(vcpu);
8423 ++vcpu->stat.insn_emulation;
8427 EXPORT_SYMBOL_GPL(x86_decode_emulated_instruction);
8429 int x86_emulate_instruction(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa,
8430 int emulation_type, void *insn, int insn_len)
8433 struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
8434 bool writeback = true;
8435 bool write_fault_to_spt;
8437 if (unlikely(!kvm_can_emulate_insn(vcpu, emulation_type, insn, insn_len)))
8440 vcpu->arch.l1tf_flush_l1d = true;
8443 * Clear write_fault_to_shadow_pgtable here to ensure it is
8446 write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
8447 vcpu->arch.write_fault_to_shadow_pgtable = false;
8449 if (!(emulation_type & EMULTYPE_NO_DECODE)) {
8450 kvm_clear_exception_queue(vcpu);
8453 * Return immediately if RIP hits a code breakpoint, such #DBs
8454 * are fault-like and are higher priority than any faults on
8455 * the code fetch itself.
8457 if (!(emulation_type & EMULTYPE_SKIP) &&
8458 kvm_vcpu_check_code_breakpoint(vcpu, &r))
8461 r = x86_decode_emulated_instruction(vcpu, emulation_type,
8463 if (r != EMULATION_OK) {
8464 if ((emulation_type & EMULTYPE_TRAP_UD) ||
8465 (emulation_type & EMULTYPE_TRAP_UD_FORCED)) {
8466 kvm_queue_exception(vcpu, UD_VECTOR);
8469 if (reexecute_instruction(vcpu, cr2_or_gpa,
8473 if (ctxt->have_exception) {
8475 * #UD should result in just EMULATION_FAILED, and trap-like
8476 * exception should not be encountered during decode.
8478 WARN_ON_ONCE(ctxt->exception.vector == UD_VECTOR ||
8479 exception_type(ctxt->exception.vector) == EXCPT_TRAP);
8480 inject_emulated_exception(vcpu);
8483 return handle_emulation_failure(vcpu, emulation_type);
8487 if ((emulation_type & EMULTYPE_VMWARE_GP) &&
8488 !is_vmware_backdoor_opcode(ctxt)) {
8489 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
8494 * EMULTYPE_SKIP without EMULTYPE_COMPLETE_USER_EXIT is intended for
8495 * use *only* by vendor callbacks for kvm_skip_emulated_instruction().
8496 * The caller is responsible for updating interruptibility state and
8497 * injecting single-step #DBs.
8499 if (emulation_type & EMULTYPE_SKIP) {
8500 if (ctxt->mode != X86EMUL_MODE_PROT64)
8501 ctxt->eip = (u32)ctxt->_eip;
8503 ctxt->eip = ctxt->_eip;
8505 if (emulation_type & EMULTYPE_COMPLETE_USER_EXIT) {
8510 kvm_rip_write(vcpu, ctxt->eip);
8511 if (ctxt->eflags & X86_EFLAGS_RF)
8512 kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
8516 if (retry_instruction(ctxt, cr2_or_gpa, emulation_type))
8519 /* this is needed for vmware backdoor interface to work since it
8520 changes registers values during IO operation */
8521 if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
8522 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
8523 emulator_invalidate_register_cache(ctxt);
8527 if (emulation_type & EMULTYPE_PF) {
8528 /* Save the faulting GPA (cr2) in the address field */
8529 ctxt->exception.address = cr2_or_gpa;
8531 /* With shadow page tables, cr2 contains a GVA or nGPA. */
8532 if (vcpu->arch.mmu->root_role.direct) {
8533 ctxt->gpa_available = true;
8534 ctxt->gpa_val = cr2_or_gpa;
8537 /* Sanitize the address out of an abundance of paranoia. */
8538 ctxt->exception.address = 0;
8541 r = x86_emulate_insn(ctxt);
8543 if (r == EMULATION_INTERCEPTED)
8546 if (r == EMULATION_FAILED) {
8547 if (reexecute_instruction(vcpu, cr2_or_gpa, write_fault_to_spt,
8551 return handle_emulation_failure(vcpu, emulation_type);
8554 if (ctxt->have_exception) {
8556 if (inject_emulated_exception(vcpu))
8558 } else if (vcpu->arch.pio.count) {
8559 if (!vcpu->arch.pio.in) {
8560 /* FIXME: return into emulator if single-stepping. */
8561 vcpu->arch.pio.count = 0;
8564 vcpu->arch.complete_userspace_io = complete_emulated_pio;
8567 } else if (vcpu->mmio_needed) {
8568 ++vcpu->stat.mmio_exits;
8570 if (!vcpu->mmio_is_write)
8573 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
8574 } else if (vcpu->arch.complete_userspace_io) {
8577 } else if (r == EMULATION_RESTART)
8584 unsigned long rflags = static_call(kvm_x86_get_rflags)(vcpu);
8585 toggle_interruptibility(vcpu, ctxt->interruptibility);
8586 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
8587 if (!ctxt->have_exception ||
8588 exception_type(ctxt->exception.vector) == EXCPT_TRAP) {
8589 kvm_pmu_trigger_event(vcpu, PERF_COUNT_HW_INSTRUCTIONS);
8590 if (ctxt->is_branch)
8591 kvm_pmu_trigger_event(vcpu, PERF_COUNT_HW_BRANCH_INSTRUCTIONS);
8592 kvm_rip_write(vcpu, ctxt->eip);
8593 if (r && (ctxt->tf || (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)))
8594 r = kvm_vcpu_do_singlestep(vcpu);
8595 static_call_cond(kvm_x86_update_emulated_instruction)(vcpu);
8596 __kvm_set_rflags(vcpu, ctxt->eflags);
8600 * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
8601 * do nothing, and it will be requested again as soon as
8602 * the shadow expires. But we still need to check here,
8603 * because POPF has no interrupt shadow.
8605 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
8606 kvm_make_request(KVM_REQ_EVENT, vcpu);
8608 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
8613 int kvm_emulate_instruction(struct kvm_vcpu *vcpu, int emulation_type)
8615 return x86_emulate_instruction(vcpu, 0, emulation_type, NULL, 0);
8617 EXPORT_SYMBOL_GPL(kvm_emulate_instruction);
8619 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu *vcpu,
8620 void *insn, int insn_len)
8622 return x86_emulate_instruction(vcpu, 0, 0, insn, insn_len);
8624 EXPORT_SYMBOL_GPL(kvm_emulate_instruction_from_buffer);
8626 static int complete_fast_pio_out_port_0x7e(struct kvm_vcpu *vcpu)
8628 vcpu->arch.pio.count = 0;
8632 static int complete_fast_pio_out(struct kvm_vcpu *vcpu)
8634 vcpu->arch.pio.count = 0;
8636 if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip)))
8639 return kvm_skip_emulated_instruction(vcpu);
8642 static int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size,
8643 unsigned short port)
8645 unsigned long val = kvm_rax_read(vcpu);
8646 int ret = emulator_pio_out(vcpu, size, port, &val, 1);
8652 * Workaround userspace that relies on old KVM behavior of %rip being
8653 * incremented prior to exiting to userspace to handle "OUT 0x7e".
8656 kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_OUT_7E_INC_RIP)) {
8657 vcpu->arch.complete_userspace_io =
8658 complete_fast_pio_out_port_0x7e;
8659 kvm_skip_emulated_instruction(vcpu);
8661 vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
8662 vcpu->arch.complete_userspace_io = complete_fast_pio_out;
8667 static int complete_fast_pio_in(struct kvm_vcpu *vcpu)
8671 /* We should only ever be called with arch.pio.count equal to 1 */
8672 BUG_ON(vcpu->arch.pio.count != 1);
8674 if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip))) {
8675 vcpu->arch.pio.count = 0;
8679 /* For size less than 4 we merge, else we zero extend */
8680 val = (vcpu->arch.pio.size < 4) ? kvm_rax_read(vcpu) : 0;
8683 * Since vcpu->arch.pio.count == 1 let emulator_pio_in perform
8684 * the copy and tracing
8686 emulator_pio_in(vcpu, vcpu->arch.pio.size, vcpu->arch.pio.port, &val, 1);
8687 kvm_rax_write(vcpu, val);
8689 return kvm_skip_emulated_instruction(vcpu);
8692 static int kvm_fast_pio_in(struct kvm_vcpu *vcpu, int size,
8693 unsigned short port)
8698 /* For size less than 4 we merge, else we zero extend */
8699 val = (size < 4) ? kvm_rax_read(vcpu) : 0;
8701 ret = emulator_pio_in(vcpu, size, port, &val, 1);
8703 kvm_rax_write(vcpu, val);
8707 vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
8708 vcpu->arch.complete_userspace_io = complete_fast_pio_in;
8713 int kvm_fast_pio(struct kvm_vcpu *vcpu, int size, unsigned short port, int in)
8718 ret = kvm_fast_pio_in(vcpu, size, port);
8720 ret = kvm_fast_pio_out(vcpu, size, port);
8721 return ret && kvm_skip_emulated_instruction(vcpu);
8723 EXPORT_SYMBOL_GPL(kvm_fast_pio);
8725 static int kvmclock_cpu_down_prep(unsigned int cpu)
8727 __this_cpu_write(cpu_tsc_khz, 0);
8731 static void tsc_khz_changed(void *data)
8733 struct cpufreq_freqs *freq = data;
8734 unsigned long khz = 0;
8738 else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
8739 khz = cpufreq_quick_get(raw_smp_processor_id());
8742 __this_cpu_write(cpu_tsc_khz, khz);
8745 #ifdef CONFIG_X86_64
8746 static void kvm_hyperv_tsc_notifier(void)
8751 mutex_lock(&kvm_lock);
8752 list_for_each_entry(kvm, &vm_list, vm_list)
8753 kvm_make_mclock_inprogress_request(kvm);
8755 /* no guest entries from this point */
8756 hyperv_stop_tsc_emulation();
8758 /* TSC frequency always matches when on Hyper-V */
8759 for_each_present_cpu(cpu)
8760 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
8761 kvm_max_guest_tsc_khz = tsc_khz;
8763 list_for_each_entry(kvm, &vm_list, vm_list) {
8764 __kvm_start_pvclock_update(kvm);
8765 pvclock_update_vm_gtod_copy(kvm);
8766 kvm_end_pvclock_update(kvm);
8769 mutex_unlock(&kvm_lock);
8773 static void __kvmclock_cpufreq_notifier(struct cpufreq_freqs *freq, int cpu)
8776 struct kvm_vcpu *vcpu;
8781 * We allow guests to temporarily run on slowing clocks,
8782 * provided we notify them after, or to run on accelerating
8783 * clocks, provided we notify them before. Thus time never
8786 * However, we have a problem. We can't atomically update
8787 * the frequency of a given CPU from this function; it is
8788 * merely a notifier, which can be called from any CPU.
8789 * Changing the TSC frequency at arbitrary points in time
8790 * requires a recomputation of local variables related to
8791 * the TSC for each VCPU. We must flag these local variables
8792 * to be updated and be sure the update takes place with the
8793 * new frequency before any guests proceed.
8795 * Unfortunately, the combination of hotplug CPU and frequency
8796 * change creates an intractable locking scenario; the order
8797 * of when these callouts happen is undefined with respect to
8798 * CPU hotplug, and they can race with each other. As such,
8799 * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
8800 * undefined; you can actually have a CPU frequency change take
8801 * place in between the computation of X and the setting of the
8802 * variable. To protect against this problem, all updates of
8803 * the per_cpu tsc_khz variable are done in an interrupt
8804 * protected IPI, and all callers wishing to update the value
8805 * must wait for a synchronous IPI to complete (which is trivial
8806 * if the caller is on the CPU already). This establishes the
8807 * necessary total order on variable updates.
8809 * Note that because a guest time update may take place
8810 * anytime after the setting of the VCPU's request bit, the
8811 * correct TSC value must be set before the request. However,
8812 * to ensure the update actually makes it to any guest which
8813 * starts running in hardware virtualization between the set
8814 * and the acquisition of the spinlock, we must also ping the
8815 * CPU after setting the request bit.
8819 smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
8821 mutex_lock(&kvm_lock);
8822 list_for_each_entry(kvm, &vm_list, vm_list) {
8823 kvm_for_each_vcpu(i, vcpu, kvm) {
8824 if (vcpu->cpu != cpu)
8826 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
8827 if (vcpu->cpu != raw_smp_processor_id())
8831 mutex_unlock(&kvm_lock);
8833 if (freq->old < freq->new && send_ipi) {
8835 * We upscale the frequency. Must make the guest
8836 * doesn't see old kvmclock values while running with
8837 * the new frequency, otherwise we risk the guest sees
8838 * time go backwards.
8840 * In case we update the frequency for another cpu
8841 * (which might be in guest context) send an interrupt
8842 * to kick the cpu out of guest context. Next time
8843 * guest context is entered kvmclock will be updated,
8844 * so the guest will not see stale values.
8846 smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
8850 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
8853 struct cpufreq_freqs *freq = data;
8856 if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
8858 if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
8861 for_each_cpu(cpu, freq->policy->cpus)
8862 __kvmclock_cpufreq_notifier(freq, cpu);
8867 static struct notifier_block kvmclock_cpufreq_notifier_block = {
8868 .notifier_call = kvmclock_cpufreq_notifier
8871 static int kvmclock_cpu_online(unsigned int cpu)
8873 tsc_khz_changed(NULL);
8877 static void kvm_timer_init(void)
8879 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
8880 max_tsc_khz = tsc_khz;
8882 if (IS_ENABLED(CONFIG_CPU_FREQ)) {
8883 struct cpufreq_policy *policy;
8887 policy = cpufreq_cpu_get(cpu);
8889 if (policy->cpuinfo.max_freq)
8890 max_tsc_khz = policy->cpuinfo.max_freq;
8891 cpufreq_cpu_put(policy);
8895 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
8896 CPUFREQ_TRANSITION_NOTIFIER);
8899 cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE, "x86/kvm/clk:online",
8900 kvmclock_cpu_online, kvmclock_cpu_down_prep);
8903 #ifdef CONFIG_X86_64
8904 static void pvclock_gtod_update_fn(struct work_struct *work)
8907 struct kvm_vcpu *vcpu;
8910 mutex_lock(&kvm_lock);
8911 list_for_each_entry(kvm, &vm_list, vm_list)
8912 kvm_for_each_vcpu(i, vcpu, kvm)
8913 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
8914 atomic_set(&kvm_guest_has_master_clock, 0);
8915 mutex_unlock(&kvm_lock);
8918 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
8921 * Indirection to move queue_work() out of the tk_core.seq write held
8922 * region to prevent possible deadlocks against time accessors which
8923 * are invoked with work related locks held.
8925 static void pvclock_irq_work_fn(struct irq_work *w)
8927 queue_work(system_long_wq, &pvclock_gtod_work);
8930 static DEFINE_IRQ_WORK(pvclock_irq_work, pvclock_irq_work_fn);
8933 * Notification about pvclock gtod data update.
8935 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
8938 struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
8939 struct timekeeper *tk = priv;
8941 update_pvclock_gtod(tk);
8944 * Disable master clock if host does not trust, or does not use,
8945 * TSC based clocksource. Delegate queue_work() to irq_work as
8946 * this is invoked with tk_core.seq write held.
8948 if (!gtod_is_based_on_tsc(gtod->clock.vclock_mode) &&
8949 atomic_read(&kvm_guest_has_master_clock) != 0)
8950 irq_work_queue(&pvclock_irq_work);
8954 static struct notifier_block pvclock_gtod_notifier = {
8955 .notifier_call = pvclock_gtod_notify,
8959 int kvm_arch_init(void *opaque)
8961 struct kvm_x86_init_ops *ops = opaque;
8964 if (kvm_x86_ops.hardware_enable) {
8965 pr_err("kvm: already loaded vendor module '%s'\n", kvm_x86_ops.name);
8970 if (!ops->cpu_has_kvm_support()) {
8971 pr_err_ratelimited("kvm: no hardware support for '%s'\n",
8972 ops->runtime_ops->name);
8976 if (ops->disabled_by_bios()) {
8977 pr_err_ratelimited("kvm: support for '%s' disabled by bios\n",
8978 ops->runtime_ops->name);
8984 * KVM explicitly assumes that the guest has an FPU and
8985 * FXSAVE/FXRSTOR. For example, the KVM_GET_FPU explicitly casts the
8986 * vCPU's FPU state as a fxregs_state struct.
8988 if (!boot_cpu_has(X86_FEATURE_FPU) || !boot_cpu_has(X86_FEATURE_FXSR)) {
8989 printk(KERN_ERR "kvm: inadequate fpu\n");
8994 if (IS_ENABLED(CONFIG_PREEMPT_RT) && !boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
8995 pr_err("RT requires X86_FEATURE_CONSTANT_TSC\n");
9002 x86_emulator_cache = kvm_alloc_emulator_cache();
9003 if (!x86_emulator_cache) {
9004 pr_err("kvm: failed to allocate cache for x86 emulator\n");
9008 user_return_msrs = alloc_percpu(struct kvm_user_return_msrs);
9009 if (!user_return_msrs) {
9010 printk(KERN_ERR "kvm: failed to allocate percpu kvm_user_return_msrs\n");
9011 goto out_free_x86_emulator_cache;
9013 kvm_nr_uret_msrs = 0;
9015 r = kvm_mmu_vendor_module_init();
9017 goto out_free_percpu;
9021 if (boot_cpu_has(X86_FEATURE_XSAVE)) {
9022 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
9023 supported_xcr0 = host_xcr0 & KVM_SUPPORTED_XCR0;
9026 if (pi_inject_timer == -1)
9027 pi_inject_timer = housekeeping_enabled(HK_TYPE_TIMER);
9028 #ifdef CONFIG_X86_64
9029 pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
9031 if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
9032 set_hv_tscchange_cb(kvm_hyperv_tsc_notifier);
9038 free_percpu(user_return_msrs);
9039 out_free_x86_emulator_cache:
9040 kmem_cache_destroy(x86_emulator_cache);
9045 void kvm_arch_exit(void)
9047 #ifdef CONFIG_X86_64
9048 if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
9049 clear_hv_tscchange_cb();
9053 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
9054 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
9055 CPUFREQ_TRANSITION_NOTIFIER);
9056 cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE);
9057 #ifdef CONFIG_X86_64
9058 pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
9059 irq_work_sync(&pvclock_irq_work);
9060 cancel_work_sync(&pvclock_gtod_work);
9062 kvm_x86_ops.hardware_enable = NULL;
9063 kvm_mmu_vendor_module_exit();
9064 free_percpu(user_return_msrs);
9065 kmem_cache_destroy(x86_emulator_cache);
9066 #ifdef CONFIG_KVM_XEN
9067 static_key_deferred_flush(&kvm_xen_enabled);
9068 WARN_ON(static_branch_unlikely(&kvm_xen_enabled.key));
9072 static int __kvm_emulate_halt(struct kvm_vcpu *vcpu, int state, int reason)
9075 * The vCPU has halted, e.g. executed HLT. Update the run state if the
9076 * local APIC is in-kernel, the run loop will detect the non-runnable
9077 * state and halt the vCPU. Exit to userspace if the local APIC is
9078 * managed by userspace, in which case userspace is responsible for
9079 * handling wake events.
9081 ++vcpu->stat.halt_exits;
9082 if (lapic_in_kernel(vcpu)) {
9083 vcpu->arch.mp_state = state;
9086 vcpu->run->exit_reason = reason;
9091 int kvm_emulate_halt_noskip(struct kvm_vcpu *vcpu)
9093 return __kvm_emulate_halt(vcpu, KVM_MP_STATE_HALTED, KVM_EXIT_HLT);
9095 EXPORT_SYMBOL_GPL(kvm_emulate_halt_noskip);
9097 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
9099 int ret = kvm_skip_emulated_instruction(vcpu);
9101 * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
9102 * KVM_EXIT_DEBUG here.
9104 return kvm_emulate_halt_noskip(vcpu) && ret;
9106 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
9108 int kvm_emulate_ap_reset_hold(struct kvm_vcpu *vcpu)
9110 int ret = kvm_skip_emulated_instruction(vcpu);
9112 return __kvm_emulate_halt(vcpu, KVM_MP_STATE_AP_RESET_HOLD,
9113 KVM_EXIT_AP_RESET_HOLD) && ret;
9115 EXPORT_SYMBOL_GPL(kvm_emulate_ap_reset_hold);
9117 #ifdef CONFIG_X86_64
9118 static int kvm_pv_clock_pairing(struct kvm_vcpu *vcpu, gpa_t paddr,
9119 unsigned long clock_type)
9121 struct kvm_clock_pairing clock_pairing;
9122 struct timespec64 ts;
9126 if (clock_type != KVM_CLOCK_PAIRING_WALLCLOCK)
9127 return -KVM_EOPNOTSUPP;
9130 * When tsc is in permanent catchup mode guests won't be able to use
9131 * pvclock_read_retry loop to get consistent view of pvclock
9133 if (vcpu->arch.tsc_always_catchup)
9134 return -KVM_EOPNOTSUPP;
9136 if (!kvm_get_walltime_and_clockread(&ts, &cycle))
9137 return -KVM_EOPNOTSUPP;
9139 clock_pairing.sec = ts.tv_sec;
9140 clock_pairing.nsec = ts.tv_nsec;
9141 clock_pairing.tsc = kvm_read_l1_tsc(vcpu, cycle);
9142 clock_pairing.flags = 0;
9143 memset(&clock_pairing.pad, 0, sizeof(clock_pairing.pad));
9146 if (kvm_write_guest(vcpu->kvm, paddr, &clock_pairing,
9147 sizeof(struct kvm_clock_pairing)))
9155 * kvm_pv_kick_cpu_op: Kick a vcpu.
9157 * @apicid - apicid of vcpu to be kicked.
9159 static void kvm_pv_kick_cpu_op(struct kvm *kvm, int apicid)
9161 struct kvm_lapic_irq lapic_irq;
9163 lapic_irq.shorthand = APIC_DEST_NOSHORT;
9164 lapic_irq.dest_mode = APIC_DEST_PHYSICAL;
9165 lapic_irq.level = 0;
9166 lapic_irq.dest_id = apicid;
9167 lapic_irq.msi_redir_hint = false;
9169 lapic_irq.delivery_mode = APIC_DM_REMRD;
9170 kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
9173 bool kvm_apicv_activated(struct kvm *kvm)
9175 return (READ_ONCE(kvm->arch.apicv_inhibit_reasons) == 0);
9177 EXPORT_SYMBOL_GPL(kvm_apicv_activated);
9179 bool kvm_vcpu_apicv_activated(struct kvm_vcpu *vcpu)
9181 ulong vm_reasons = READ_ONCE(vcpu->kvm->arch.apicv_inhibit_reasons);
9182 ulong vcpu_reasons = static_call(kvm_x86_vcpu_get_apicv_inhibit_reasons)(vcpu);
9184 return (vm_reasons | vcpu_reasons) == 0;
9186 EXPORT_SYMBOL_GPL(kvm_vcpu_apicv_activated);
9188 static void set_or_clear_apicv_inhibit(unsigned long *inhibits,
9189 enum kvm_apicv_inhibit reason, bool set)
9192 __set_bit(reason, inhibits);
9194 __clear_bit(reason, inhibits);
9196 trace_kvm_apicv_inhibit_changed(reason, set, *inhibits);
9199 static void kvm_apicv_init(struct kvm *kvm)
9201 unsigned long *inhibits = &kvm->arch.apicv_inhibit_reasons;
9203 init_rwsem(&kvm->arch.apicv_update_lock);
9205 set_or_clear_apicv_inhibit(inhibits, APICV_INHIBIT_REASON_ABSENT, true);
9208 set_or_clear_apicv_inhibit(inhibits,
9209 APICV_INHIBIT_REASON_DISABLE, true);
9212 static void kvm_sched_yield(struct kvm_vcpu *vcpu, unsigned long dest_id)
9214 struct kvm_vcpu *target = NULL;
9215 struct kvm_apic_map *map;
9217 vcpu->stat.directed_yield_attempted++;
9219 if (single_task_running())
9223 map = rcu_dereference(vcpu->kvm->arch.apic_map);
9225 if (likely(map) && dest_id <= map->max_apic_id && map->phys_map[dest_id])
9226 target = map->phys_map[dest_id]->vcpu;
9230 if (!target || !READ_ONCE(target->ready))
9233 /* Ignore requests to yield to self */
9237 if (kvm_vcpu_yield_to(target) <= 0)
9240 vcpu->stat.directed_yield_successful++;
9246 static int complete_hypercall_exit(struct kvm_vcpu *vcpu)
9248 u64 ret = vcpu->run->hypercall.ret;
9250 if (!is_64_bit_mode(vcpu))
9252 kvm_rax_write(vcpu, ret);
9253 ++vcpu->stat.hypercalls;
9254 return kvm_skip_emulated_instruction(vcpu);
9257 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
9259 unsigned long nr, a0, a1, a2, a3, ret;
9262 if (kvm_xen_hypercall_enabled(vcpu->kvm))
9263 return kvm_xen_hypercall(vcpu);
9265 if (kvm_hv_hypercall_enabled(vcpu))
9266 return kvm_hv_hypercall(vcpu);
9268 nr = kvm_rax_read(vcpu);
9269 a0 = kvm_rbx_read(vcpu);
9270 a1 = kvm_rcx_read(vcpu);
9271 a2 = kvm_rdx_read(vcpu);
9272 a3 = kvm_rsi_read(vcpu);
9274 trace_kvm_hypercall(nr, a0, a1, a2, a3);
9276 op_64_bit = is_64_bit_hypercall(vcpu);
9285 if (static_call(kvm_x86_get_cpl)(vcpu) != 0) {
9293 case KVM_HC_VAPIC_POLL_IRQ:
9296 case KVM_HC_KICK_CPU:
9297 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_UNHALT))
9300 kvm_pv_kick_cpu_op(vcpu->kvm, a1);
9301 kvm_sched_yield(vcpu, a1);
9304 #ifdef CONFIG_X86_64
9305 case KVM_HC_CLOCK_PAIRING:
9306 ret = kvm_pv_clock_pairing(vcpu, a0, a1);
9309 case KVM_HC_SEND_IPI:
9310 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_SEND_IPI))
9313 ret = kvm_pv_send_ipi(vcpu->kvm, a0, a1, a2, a3, op_64_bit);
9315 case KVM_HC_SCHED_YIELD:
9316 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_SCHED_YIELD))
9319 kvm_sched_yield(vcpu, a0);
9322 case KVM_HC_MAP_GPA_RANGE: {
9323 u64 gpa = a0, npages = a1, attrs = a2;
9326 if (!(vcpu->kvm->arch.hypercall_exit_enabled & (1 << KVM_HC_MAP_GPA_RANGE)))
9329 if (!PAGE_ALIGNED(gpa) || !npages ||
9330 gpa_to_gfn(gpa) + npages <= gpa_to_gfn(gpa)) {
9335 vcpu->run->exit_reason = KVM_EXIT_HYPERCALL;
9336 vcpu->run->hypercall.nr = KVM_HC_MAP_GPA_RANGE;
9337 vcpu->run->hypercall.args[0] = gpa;
9338 vcpu->run->hypercall.args[1] = npages;
9339 vcpu->run->hypercall.args[2] = attrs;
9340 vcpu->run->hypercall.longmode = op_64_bit;
9341 vcpu->arch.complete_userspace_io = complete_hypercall_exit;
9351 kvm_rax_write(vcpu, ret);
9353 ++vcpu->stat.hypercalls;
9354 return kvm_skip_emulated_instruction(vcpu);
9356 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
9358 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
9360 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
9361 char instruction[3];
9362 unsigned long rip = kvm_rip_read(vcpu);
9365 * If the quirk is disabled, synthesize a #UD and let the guest pick up
9368 if (!kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_FIX_HYPERCALL_INSN)) {
9369 ctxt->exception.error_code_valid = false;
9370 ctxt->exception.vector = UD_VECTOR;
9371 ctxt->have_exception = true;
9372 return X86EMUL_PROPAGATE_FAULT;
9375 static_call(kvm_x86_patch_hypercall)(vcpu, instruction);
9377 return emulator_write_emulated(ctxt, rip, instruction, 3,
9381 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
9383 return vcpu->run->request_interrupt_window &&
9384 likely(!pic_in_kernel(vcpu->kvm));
9387 /* Called within kvm->srcu read side. */
9388 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
9390 struct kvm_run *kvm_run = vcpu->run;
9392 kvm_run->if_flag = static_call(kvm_x86_get_if_flag)(vcpu);
9393 kvm_run->cr8 = kvm_get_cr8(vcpu);
9394 kvm_run->apic_base = kvm_get_apic_base(vcpu);
9396 kvm_run->ready_for_interrupt_injection =
9397 pic_in_kernel(vcpu->kvm) ||
9398 kvm_vcpu_ready_for_interrupt_injection(vcpu);
9401 kvm_run->flags |= KVM_RUN_X86_SMM;
9404 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
9408 if (!kvm_x86_ops.update_cr8_intercept)
9411 if (!lapic_in_kernel(vcpu))
9414 if (vcpu->arch.apicv_active)
9417 if (!vcpu->arch.apic->vapic_addr)
9418 max_irr = kvm_lapic_find_highest_irr(vcpu);
9425 tpr = kvm_lapic_get_cr8(vcpu);
9427 static_call(kvm_x86_update_cr8_intercept)(vcpu, tpr, max_irr);
9431 int kvm_check_nested_events(struct kvm_vcpu *vcpu)
9433 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
9434 kvm_x86_ops.nested_ops->triple_fault(vcpu);
9438 return kvm_x86_ops.nested_ops->check_events(vcpu);
9441 static void kvm_inject_exception(struct kvm_vcpu *vcpu)
9443 trace_kvm_inj_exception(vcpu->arch.exception.nr,
9444 vcpu->arch.exception.has_error_code,
9445 vcpu->arch.exception.error_code,
9446 vcpu->arch.exception.injected);
9448 if (vcpu->arch.exception.error_code && !is_protmode(vcpu))
9449 vcpu->arch.exception.error_code = false;
9450 static_call(kvm_x86_queue_exception)(vcpu);
9453 static int inject_pending_event(struct kvm_vcpu *vcpu, bool *req_immediate_exit)
9456 bool can_inject = true;
9458 /* try to reinject previous events if any */
9460 if (vcpu->arch.exception.injected) {
9461 kvm_inject_exception(vcpu);
9465 * Do not inject an NMI or interrupt if there is a pending
9466 * exception. Exceptions and interrupts are recognized at
9467 * instruction boundaries, i.e. the start of an instruction.
9468 * Trap-like exceptions, e.g. #DB, have higher priority than
9469 * NMIs and interrupts, i.e. traps are recognized before an
9470 * NMI/interrupt that's pending on the same instruction.
9471 * Fault-like exceptions, e.g. #GP and #PF, are the lowest
9472 * priority, but are only generated (pended) during instruction
9473 * execution, i.e. a pending fault-like exception means the
9474 * fault occurred on the *previous* instruction and must be
9475 * serviced prior to recognizing any new events in order to
9476 * fully complete the previous instruction.
9478 else if (!vcpu->arch.exception.pending) {
9479 if (vcpu->arch.nmi_injected) {
9480 static_call(kvm_x86_inject_nmi)(vcpu);
9482 } else if (vcpu->arch.interrupt.injected) {
9483 static_call(kvm_x86_inject_irq)(vcpu, true);
9488 WARN_ON_ONCE(vcpu->arch.exception.injected &&
9489 vcpu->arch.exception.pending);
9492 * Call check_nested_events() even if we reinjected a previous event
9493 * in order for caller to determine if it should require immediate-exit
9494 * from L2 to L1 due to pending L1 events which require exit
9497 if (is_guest_mode(vcpu)) {
9498 r = kvm_check_nested_events(vcpu);
9503 /* try to inject new event if pending */
9504 if (vcpu->arch.exception.pending) {
9505 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
9506 __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
9509 if (vcpu->arch.exception.nr == DB_VECTOR) {
9510 kvm_deliver_exception_payload(vcpu);
9511 if (vcpu->arch.dr7 & DR7_GD) {
9512 vcpu->arch.dr7 &= ~DR7_GD;
9513 kvm_update_dr7(vcpu);
9517 kvm_inject_exception(vcpu);
9519 vcpu->arch.exception.pending = false;
9520 vcpu->arch.exception.injected = true;
9525 /* Don't inject interrupts if the user asked to avoid doing so */
9526 if (vcpu->guest_debug & KVM_GUESTDBG_BLOCKIRQ)
9530 * Finally, inject interrupt events. If an event cannot be injected
9531 * due to architectural conditions (e.g. IF=0) a window-open exit
9532 * will re-request KVM_REQ_EVENT. Sometimes however an event is pending
9533 * and can architecturally be injected, but we cannot do it right now:
9534 * an interrupt could have arrived just now and we have to inject it
9535 * as a vmexit, or there could already an event in the queue, which is
9536 * indicated by can_inject. In that case we request an immediate exit
9537 * in order to make progress and get back here for another iteration.
9538 * The kvm_x86_ops hooks communicate this by returning -EBUSY.
9540 if (vcpu->arch.smi_pending) {
9541 r = can_inject ? static_call(kvm_x86_smi_allowed)(vcpu, true) : -EBUSY;
9545 vcpu->arch.smi_pending = false;
9546 ++vcpu->arch.smi_count;
9550 static_call(kvm_x86_enable_smi_window)(vcpu);
9553 if (vcpu->arch.nmi_pending) {
9554 r = can_inject ? static_call(kvm_x86_nmi_allowed)(vcpu, true) : -EBUSY;
9558 --vcpu->arch.nmi_pending;
9559 vcpu->arch.nmi_injected = true;
9560 static_call(kvm_x86_inject_nmi)(vcpu);
9562 WARN_ON(static_call(kvm_x86_nmi_allowed)(vcpu, true) < 0);
9564 if (vcpu->arch.nmi_pending)
9565 static_call(kvm_x86_enable_nmi_window)(vcpu);
9568 if (kvm_cpu_has_injectable_intr(vcpu)) {
9569 r = can_inject ? static_call(kvm_x86_interrupt_allowed)(vcpu, true) : -EBUSY;
9573 kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu), false);
9574 static_call(kvm_x86_inject_irq)(vcpu, false);
9575 WARN_ON(static_call(kvm_x86_interrupt_allowed)(vcpu, true) < 0);
9577 if (kvm_cpu_has_injectable_intr(vcpu))
9578 static_call(kvm_x86_enable_irq_window)(vcpu);
9581 if (is_guest_mode(vcpu) &&
9582 kvm_x86_ops.nested_ops->hv_timer_pending &&
9583 kvm_x86_ops.nested_ops->hv_timer_pending(vcpu))
9584 *req_immediate_exit = true;
9586 WARN_ON(vcpu->arch.exception.pending);
9591 *req_immediate_exit = true;
9597 static void process_nmi(struct kvm_vcpu *vcpu)
9602 * x86 is limited to one NMI running, and one NMI pending after it.
9603 * If an NMI is already in progress, limit further NMIs to just one.
9604 * Otherwise, allow two (and we'll inject the first one immediately).
9606 if (static_call(kvm_x86_get_nmi_mask)(vcpu) || vcpu->arch.nmi_injected)
9609 vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
9610 vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
9611 kvm_make_request(KVM_REQ_EVENT, vcpu);
9614 static u32 enter_smm_get_segment_flags(struct kvm_segment *seg)
9617 flags |= seg->g << 23;
9618 flags |= seg->db << 22;
9619 flags |= seg->l << 21;
9620 flags |= seg->avl << 20;
9621 flags |= seg->present << 15;
9622 flags |= seg->dpl << 13;
9623 flags |= seg->s << 12;
9624 flags |= seg->type << 8;
9628 static void enter_smm_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
9630 struct kvm_segment seg;
9633 kvm_get_segment(vcpu, &seg, n);
9634 put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
9637 offset = 0x7f84 + n * 12;
9639 offset = 0x7f2c + (n - 3) * 12;
9641 put_smstate(u32, buf, offset + 8, seg.base);
9642 put_smstate(u32, buf, offset + 4, seg.limit);
9643 put_smstate(u32, buf, offset, enter_smm_get_segment_flags(&seg));
9646 #ifdef CONFIG_X86_64
9647 static void enter_smm_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
9649 struct kvm_segment seg;
9653 kvm_get_segment(vcpu, &seg, n);
9654 offset = 0x7e00 + n * 16;
9656 flags = enter_smm_get_segment_flags(&seg) >> 8;
9657 put_smstate(u16, buf, offset, seg.selector);
9658 put_smstate(u16, buf, offset + 2, flags);
9659 put_smstate(u32, buf, offset + 4, seg.limit);
9660 put_smstate(u64, buf, offset + 8, seg.base);
9664 static void enter_smm_save_state_32(struct kvm_vcpu *vcpu, char *buf)
9667 struct kvm_segment seg;
9671 put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
9672 put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
9673 put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
9674 put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
9676 for (i = 0; i < 8; i++)
9677 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read_raw(vcpu, i));
9679 kvm_get_dr(vcpu, 6, &val);
9680 put_smstate(u32, buf, 0x7fcc, (u32)val);
9681 kvm_get_dr(vcpu, 7, &val);
9682 put_smstate(u32, buf, 0x7fc8, (u32)val);
9684 kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
9685 put_smstate(u32, buf, 0x7fc4, seg.selector);
9686 put_smstate(u32, buf, 0x7f64, seg.base);
9687 put_smstate(u32, buf, 0x7f60, seg.limit);
9688 put_smstate(u32, buf, 0x7f5c, enter_smm_get_segment_flags(&seg));
9690 kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
9691 put_smstate(u32, buf, 0x7fc0, seg.selector);
9692 put_smstate(u32, buf, 0x7f80, seg.base);
9693 put_smstate(u32, buf, 0x7f7c, seg.limit);
9694 put_smstate(u32, buf, 0x7f78, enter_smm_get_segment_flags(&seg));
9696 static_call(kvm_x86_get_gdt)(vcpu, &dt);
9697 put_smstate(u32, buf, 0x7f74, dt.address);
9698 put_smstate(u32, buf, 0x7f70, dt.size);
9700 static_call(kvm_x86_get_idt)(vcpu, &dt);
9701 put_smstate(u32, buf, 0x7f58, dt.address);
9702 put_smstate(u32, buf, 0x7f54, dt.size);
9704 for (i = 0; i < 6; i++)
9705 enter_smm_save_seg_32(vcpu, buf, i);
9707 put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
9710 put_smstate(u32, buf, 0x7efc, 0x00020000);
9711 put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
9714 #ifdef CONFIG_X86_64
9715 static void enter_smm_save_state_64(struct kvm_vcpu *vcpu, char *buf)
9718 struct kvm_segment seg;
9722 for (i = 0; i < 16; i++)
9723 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read_raw(vcpu, i));
9725 put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
9726 put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
9728 kvm_get_dr(vcpu, 6, &val);
9729 put_smstate(u64, buf, 0x7f68, val);
9730 kvm_get_dr(vcpu, 7, &val);
9731 put_smstate(u64, buf, 0x7f60, val);
9733 put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
9734 put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
9735 put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
9737 put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
9740 put_smstate(u32, buf, 0x7efc, 0x00020064);
9742 put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
9744 kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
9745 put_smstate(u16, buf, 0x7e90, seg.selector);
9746 put_smstate(u16, buf, 0x7e92, enter_smm_get_segment_flags(&seg) >> 8);
9747 put_smstate(u32, buf, 0x7e94, seg.limit);
9748 put_smstate(u64, buf, 0x7e98, seg.base);
9750 static_call(kvm_x86_get_idt)(vcpu, &dt);
9751 put_smstate(u32, buf, 0x7e84, dt.size);
9752 put_smstate(u64, buf, 0x7e88, dt.address);
9754 kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
9755 put_smstate(u16, buf, 0x7e70, seg.selector);
9756 put_smstate(u16, buf, 0x7e72, enter_smm_get_segment_flags(&seg) >> 8);
9757 put_smstate(u32, buf, 0x7e74, seg.limit);
9758 put_smstate(u64, buf, 0x7e78, seg.base);
9760 static_call(kvm_x86_get_gdt)(vcpu, &dt);
9761 put_smstate(u32, buf, 0x7e64, dt.size);
9762 put_smstate(u64, buf, 0x7e68, dt.address);
9764 for (i = 0; i < 6; i++)
9765 enter_smm_save_seg_64(vcpu, buf, i);
9769 static void enter_smm(struct kvm_vcpu *vcpu)
9771 struct kvm_segment cs, ds;
9776 memset(buf, 0, 512);
9777 #ifdef CONFIG_X86_64
9778 if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
9779 enter_smm_save_state_64(vcpu, buf);
9782 enter_smm_save_state_32(vcpu, buf);
9785 * Give enter_smm() a chance to make ISA-specific changes to the vCPU
9786 * state (e.g. leave guest mode) after we've saved the state into the
9787 * SMM state-save area.
9789 static_call(kvm_x86_enter_smm)(vcpu, buf);
9791 kvm_smm_changed(vcpu, true);
9792 kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
9794 if (static_call(kvm_x86_get_nmi_mask)(vcpu))
9795 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
9797 static_call(kvm_x86_set_nmi_mask)(vcpu, true);
9799 kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
9800 kvm_rip_write(vcpu, 0x8000);
9802 cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
9803 static_call(kvm_x86_set_cr0)(vcpu, cr0);
9804 vcpu->arch.cr0 = cr0;
9806 static_call(kvm_x86_set_cr4)(vcpu, 0);
9808 /* Undocumented: IDT limit is set to zero on entry to SMM. */
9809 dt.address = dt.size = 0;
9810 static_call(kvm_x86_set_idt)(vcpu, &dt);
9812 kvm_set_dr(vcpu, 7, DR7_FIXED_1);
9814 cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
9815 cs.base = vcpu->arch.smbase;
9820 cs.limit = ds.limit = 0xffffffff;
9821 cs.type = ds.type = 0x3;
9822 cs.dpl = ds.dpl = 0;
9827 cs.avl = ds.avl = 0;
9828 cs.present = ds.present = 1;
9829 cs.unusable = ds.unusable = 0;
9830 cs.padding = ds.padding = 0;
9832 kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
9833 kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
9834 kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
9835 kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
9836 kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
9837 kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
9839 #ifdef CONFIG_X86_64
9840 if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
9841 static_call(kvm_x86_set_efer)(vcpu, 0);
9844 kvm_update_cpuid_runtime(vcpu);
9845 kvm_mmu_reset_context(vcpu);
9848 static void process_smi(struct kvm_vcpu *vcpu)
9850 vcpu->arch.smi_pending = true;
9851 kvm_make_request(KVM_REQ_EVENT, vcpu);
9854 void kvm_make_scan_ioapic_request_mask(struct kvm *kvm,
9855 unsigned long *vcpu_bitmap)
9857 kvm_make_vcpus_request_mask(kvm, KVM_REQ_SCAN_IOAPIC, vcpu_bitmap);
9860 void kvm_make_scan_ioapic_request(struct kvm *kvm)
9862 kvm_make_all_cpus_request(kvm, KVM_REQ_SCAN_IOAPIC);
9865 void kvm_vcpu_update_apicv(struct kvm_vcpu *vcpu)
9869 if (!lapic_in_kernel(vcpu))
9872 down_read(&vcpu->kvm->arch.apicv_update_lock);
9874 activate = kvm_vcpu_apicv_activated(vcpu);
9876 if (vcpu->arch.apicv_active == activate)
9879 vcpu->arch.apicv_active = activate;
9880 kvm_apic_update_apicv(vcpu);
9881 static_call(kvm_x86_refresh_apicv_exec_ctrl)(vcpu);
9884 * When APICv gets disabled, we may still have injected interrupts
9885 * pending. At the same time, KVM_REQ_EVENT may not be set as APICv was
9886 * still active when the interrupt got accepted. Make sure
9887 * inject_pending_event() is called to check for that.
9889 if (!vcpu->arch.apicv_active)
9890 kvm_make_request(KVM_REQ_EVENT, vcpu);
9893 up_read(&vcpu->kvm->arch.apicv_update_lock);
9895 EXPORT_SYMBOL_GPL(kvm_vcpu_update_apicv);
9897 void __kvm_set_or_clear_apicv_inhibit(struct kvm *kvm,
9898 enum kvm_apicv_inhibit reason, bool set)
9900 unsigned long old, new;
9902 lockdep_assert_held_write(&kvm->arch.apicv_update_lock);
9904 if (!static_call(kvm_x86_check_apicv_inhibit_reasons)(reason))
9907 old = new = kvm->arch.apicv_inhibit_reasons;
9909 set_or_clear_apicv_inhibit(&new, reason, set);
9911 if (!!old != !!new) {
9913 * Kick all vCPUs before setting apicv_inhibit_reasons to avoid
9914 * false positives in the sanity check WARN in svm_vcpu_run().
9915 * This task will wait for all vCPUs to ack the kick IRQ before
9916 * updating apicv_inhibit_reasons, and all other vCPUs will
9917 * block on acquiring apicv_update_lock so that vCPUs can't
9918 * redo svm_vcpu_run() without seeing the new inhibit state.
9920 * Note, holding apicv_update_lock and taking it in the read
9921 * side (handling the request) also prevents other vCPUs from
9922 * servicing the request with a stale apicv_inhibit_reasons.
9924 kvm_make_all_cpus_request(kvm, KVM_REQ_APICV_UPDATE);
9925 kvm->arch.apicv_inhibit_reasons = new;
9927 unsigned long gfn = gpa_to_gfn(APIC_DEFAULT_PHYS_BASE);
9928 kvm_zap_gfn_range(kvm, gfn, gfn+1);
9931 kvm->arch.apicv_inhibit_reasons = new;
9935 void kvm_set_or_clear_apicv_inhibit(struct kvm *kvm,
9936 enum kvm_apicv_inhibit reason, bool set)
9941 down_write(&kvm->arch.apicv_update_lock);
9942 __kvm_set_or_clear_apicv_inhibit(kvm, reason, set);
9943 up_write(&kvm->arch.apicv_update_lock);
9945 EXPORT_SYMBOL_GPL(kvm_set_or_clear_apicv_inhibit);
9947 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
9949 if (!kvm_apic_present(vcpu))
9952 bitmap_zero(vcpu->arch.ioapic_handled_vectors, 256);
9954 if (irqchip_split(vcpu->kvm))
9955 kvm_scan_ioapic_routes(vcpu, vcpu->arch.ioapic_handled_vectors);
9957 static_call_cond(kvm_x86_sync_pir_to_irr)(vcpu);
9958 if (ioapic_in_kernel(vcpu->kvm))
9959 kvm_ioapic_scan_entry(vcpu, vcpu->arch.ioapic_handled_vectors);
9962 if (is_guest_mode(vcpu))
9963 vcpu->arch.load_eoi_exitmap_pending = true;
9965 kvm_make_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu);
9968 static void vcpu_load_eoi_exitmap(struct kvm_vcpu *vcpu)
9970 u64 eoi_exit_bitmap[4];
9972 if (!kvm_apic_hw_enabled(vcpu->arch.apic))
9975 if (to_hv_vcpu(vcpu)) {
9976 bitmap_or((ulong *)eoi_exit_bitmap,
9977 vcpu->arch.ioapic_handled_vectors,
9978 to_hv_synic(vcpu)->vec_bitmap, 256);
9979 static_call_cond(kvm_x86_load_eoi_exitmap)(vcpu, eoi_exit_bitmap);
9983 static_call_cond(kvm_x86_load_eoi_exitmap)(
9984 vcpu, (u64 *)vcpu->arch.ioapic_handled_vectors);
9987 void kvm_arch_mmu_notifier_invalidate_range(struct kvm *kvm,
9988 unsigned long start, unsigned long end)
9990 unsigned long apic_address;
9993 * The physical address of apic access page is stored in the VMCS.
9994 * Update it when it becomes invalid.
9996 apic_address = gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
9997 if (start <= apic_address && apic_address < end)
9998 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
10001 void kvm_arch_guest_memory_reclaimed(struct kvm *kvm)
10003 static_call_cond(kvm_x86_guest_memory_reclaimed)(kvm);
10006 static void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
10008 if (!lapic_in_kernel(vcpu))
10011 static_call_cond(kvm_x86_set_apic_access_page_addr)(vcpu);
10014 void __kvm_request_immediate_exit(struct kvm_vcpu *vcpu)
10016 smp_send_reschedule(vcpu->cpu);
10018 EXPORT_SYMBOL_GPL(__kvm_request_immediate_exit);
10021 * Called within kvm->srcu read side.
10022 * Returns 1 to let vcpu_run() continue the guest execution loop without
10023 * exiting to the userspace. Otherwise, the value will be returned to the
10026 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
10030 dm_request_for_irq_injection(vcpu) &&
10031 kvm_cpu_accept_dm_intr(vcpu);
10032 fastpath_t exit_fastpath;
10034 bool req_immediate_exit = false;
10036 /* Forbid vmenter if vcpu dirty ring is soft-full */
10037 if (unlikely(vcpu->kvm->dirty_ring_size &&
10038 kvm_dirty_ring_soft_full(&vcpu->dirty_ring))) {
10039 vcpu->run->exit_reason = KVM_EXIT_DIRTY_RING_FULL;
10040 trace_kvm_dirty_ring_exit(vcpu);
10045 if (kvm_request_pending(vcpu)) {
10046 if (kvm_check_request(KVM_REQ_VM_DEAD, vcpu)) {
10050 if (kvm_check_request(KVM_REQ_GET_NESTED_STATE_PAGES, vcpu)) {
10051 if (unlikely(!kvm_x86_ops.nested_ops->get_nested_state_pages(vcpu))) {
10056 if (kvm_check_request(KVM_REQ_MMU_FREE_OBSOLETE_ROOTS, vcpu))
10057 kvm_mmu_free_obsolete_roots(vcpu);
10058 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
10059 __kvm_migrate_timers(vcpu);
10060 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
10061 kvm_update_masterclock(vcpu->kvm);
10062 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
10063 kvm_gen_kvmclock_update(vcpu);
10064 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
10065 r = kvm_guest_time_update(vcpu);
10069 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
10070 kvm_mmu_sync_roots(vcpu);
10071 if (kvm_check_request(KVM_REQ_LOAD_MMU_PGD, vcpu))
10072 kvm_mmu_load_pgd(vcpu);
10073 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu)) {
10074 kvm_vcpu_flush_tlb_all(vcpu);
10076 /* Flushing all ASIDs flushes the current ASID... */
10077 kvm_clear_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
10079 kvm_service_local_tlb_flush_requests(vcpu);
10081 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
10082 vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
10086 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
10087 if (is_guest_mode(vcpu)) {
10088 kvm_x86_ops.nested_ops->triple_fault(vcpu);
10090 vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
10091 vcpu->mmio_needed = 0;
10096 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
10097 /* Page is swapped out. Do synthetic halt */
10098 vcpu->arch.apf.halted = true;
10102 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
10103 record_steal_time(vcpu);
10104 if (kvm_check_request(KVM_REQ_SMI, vcpu))
10106 if (kvm_check_request(KVM_REQ_NMI, vcpu))
10108 if (kvm_check_request(KVM_REQ_PMU, vcpu))
10109 kvm_pmu_handle_event(vcpu);
10110 if (kvm_check_request(KVM_REQ_PMI, vcpu))
10111 kvm_pmu_deliver_pmi(vcpu);
10112 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT, vcpu)) {
10113 BUG_ON(vcpu->arch.pending_ioapic_eoi > 255);
10114 if (test_bit(vcpu->arch.pending_ioapic_eoi,
10115 vcpu->arch.ioapic_handled_vectors)) {
10116 vcpu->run->exit_reason = KVM_EXIT_IOAPIC_EOI;
10117 vcpu->run->eoi.vector =
10118 vcpu->arch.pending_ioapic_eoi;
10123 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
10124 vcpu_scan_ioapic(vcpu);
10125 if (kvm_check_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu))
10126 vcpu_load_eoi_exitmap(vcpu);
10127 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
10128 kvm_vcpu_reload_apic_access_page(vcpu);
10129 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
10130 vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
10131 vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
10132 vcpu->run->system_event.ndata = 0;
10136 if (kvm_check_request(KVM_REQ_HV_RESET, vcpu)) {
10137 vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
10138 vcpu->run->system_event.type = KVM_SYSTEM_EVENT_RESET;
10139 vcpu->run->system_event.ndata = 0;
10143 if (kvm_check_request(KVM_REQ_HV_EXIT, vcpu)) {
10144 struct kvm_vcpu_hv *hv_vcpu = to_hv_vcpu(vcpu);
10146 vcpu->run->exit_reason = KVM_EXIT_HYPERV;
10147 vcpu->run->hyperv = hv_vcpu->exit;
10153 * KVM_REQ_HV_STIMER has to be processed after
10154 * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
10155 * depend on the guest clock being up-to-date
10157 if (kvm_check_request(KVM_REQ_HV_STIMER, vcpu))
10158 kvm_hv_process_stimers(vcpu);
10159 if (kvm_check_request(KVM_REQ_APICV_UPDATE, vcpu))
10160 kvm_vcpu_update_apicv(vcpu);
10161 if (kvm_check_request(KVM_REQ_APF_READY, vcpu))
10162 kvm_check_async_pf_completion(vcpu);
10163 if (kvm_check_request(KVM_REQ_MSR_FILTER_CHANGED, vcpu))
10164 static_call(kvm_x86_msr_filter_changed)(vcpu);
10166 if (kvm_check_request(KVM_REQ_UPDATE_CPU_DIRTY_LOGGING, vcpu))
10167 static_call(kvm_x86_update_cpu_dirty_logging)(vcpu);
10170 if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win ||
10171 kvm_xen_has_interrupt(vcpu)) {
10172 ++vcpu->stat.req_event;
10173 r = kvm_apic_accept_events(vcpu);
10178 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
10183 r = inject_pending_event(vcpu, &req_immediate_exit);
10189 static_call(kvm_x86_enable_irq_window)(vcpu);
10191 if (kvm_lapic_enabled(vcpu)) {
10192 update_cr8_intercept(vcpu);
10193 kvm_lapic_sync_to_vapic(vcpu);
10197 r = kvm_mmu_reload(vcpu);
10199 goto cancel_injection;
10204 static_call(kvm_x86_prepare_switch_to_guest)(vcpu);
10207 * Disable IRQs before setting IN_GUEST_MODE. Posted interrupt
10208 * IPI are then delayed after guest entry, which ensures that they
10209 * result in virtual interrupt delivery.
10211 local_irq_disable();
10213 /* Store vcpu->apicv_active before vcpu->mode. */
10214 smp_store_release(&vcpu->mode, IN_GUEST_MODE);
10216 kvm_vcpu_srcu_read_unlock(vcpu);
10219 * 1) We should set ->mode before checking ->requests. Please see
10220 * the comment in kvm_vcpu_exiting_guest_mode().
10222 * 2) For APICv, we should set ->mode before checking PID.ON. This
10223 * pairs with the memory barrier implicit in pi_test_and_set_on
10224 * (see vmx_deliver_posted_interrupt).
10226 * 3) This also orders the write to mode from any reads to the page
10227 * tables done while the VCPU is running. Please see the comment
10228 * in kvm_flush_remote_tlbs.
10230 smp_mb__after_srcu_read_unlock();
10233 * Process pending posted interrupts to handle the case where the
10234 * notification IRQ arrived in the host, or was never sent (because the
10235 * target vCPU wasn't running). Do this regardless of the vCPU's APICv
10236 * status, KVM doesn't update assigned devices when APICv is inhibited,
10237 * i.e. they can post interrupts even if APICv is temporarily disabled.
10239 if (kvm_lapic_enabled(vcpu))
10240 static_call_cond(kvm_x86_sync_pir_to_irr)(vcpu);
10242 if (kvm_vcpu_exit_request(vcpu)) {
10243 vcpu->mode = OUTSIDE_GUEST_MODE;
10245 local_irq_enable();
10247 kvm_vcpu_srcu_read_lock(vcpu);
10249 goto cancel_injection;
10252 if (req_immediate_exit) {
10253 kvm_make_request(KVM_REQ_EVENT, vcpu);
10254 static_call(kvm_x86_request_immediate_exit)(vcpu);
10257 fpregs_assert_state_consistent();
10258 if (test_thread_flag(TIF_NEED_FPU_LOAD))
10259 switch_fpu_return();
10261 if (vcpu->arch.guest_fpu.xfd_err)
10262 wrmsrl(MSR_IA32_XFD_ERR, vcpu->arch.guest_fpu.xfd_err);
10264 if (unlikely(vcpu->arch.switch_db_regs)) {
10265 set_debugreg(0, 7);
10266 set_debugreg(vcpu->arch.eff_db[0], 0);
10267 set_debugreg(vcpu->arch.eff_db[1], 1);
10268 set_debugreg(vcpu->arch.eff_db[2], 2);
10269 set_debugreg(vcpu->arch.eff_db[3], 3);
10270 } else if (unlikely(hw_breakpoint_active())) {
10271 set_debugreg(0, 7);
10274 guest_timing_enter_irqoff();
10278 * Assert that vCPU vs. VM APICv state is consistent. An APICv
10279 * update must kick and wait for all vCPUs before toggling the
10280 * per-VM state, and responsing vCPUs must wait for the update
10281 * to complete before servicing KVM_REQ_APICV_UPDATE.
10283 WARN_ON_ONCE(kvm_vcpu_apicv_activated(vcpu) != kvm_vcpu_apicv_active(vcpu));
10285 exit_fastpath = static_call(kvm_x86_vcpu_run)(vcpu);
10286 if (likely(exit_fastpath != EXIT_FASTPATH_REENTER_GUEST))
10289 if (kvm_lapic_enabled(vcpu))
10290 static_call_cond(kvm_x86_sync_pir_to_irr)(vcpu);
10292 if (unlikely(kvm_vcpu_exit_request(vcpu))) {
10293 exit_fastpath = EXIT_FASTPATH_EXIT_HANDLED;
10299 * Do this here before restoring debug registers on the host. And
10300 * since we do this before handling the vmexit, a DR access vmexit
10301 * can (a) read the correct value of the debug registers, (b) set
10302 * KVM_DEBUGREG_WONT_EXIT again.
10304 if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
10305 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
10306 static_call(kvm_x86_sync_dirty_debug_regs)(vcpu);
10307 kvm_update_dr0123(vcpu);
10308 kvm_update_dr7(vcpu);
10312 * If the guest has used debug registers, at least dr7
10313 * will be disabled while returning to the host.
10314 * If we don't have active breakpoints in the host, we don't
10315 * care about the messed up debug address registers. But if
10316 * we have some of them active, restore the old state.
10318 if (hw_breakpoint_active())
10319 hw_breakpoint_restore();
10321 vcpu->arch.last_vmentry_cpu = vcpu->cpu;
10322 vcpu->arch.last_guest_tsc = kvm_read_l1_tsc(vcpu, rdtsc());
10324 vcpu->mode = OUTSIDE_GUEST_MODE;
10328 * Sync xfd before calling handle_exit_irqoff() which may
10329 * rely on the fact that guest_fpu::xfd is up-to-date (e.g.
10330 * in #NM irqoff handler).
10332 if (vcpu->arch.xfd_no_write_intercept)
10333 fpu_sync_guest_vmexit_xfd_state();
10335 static_call(kvm_x86_handle_exit_irqoff)(vcpu);
10337 if (vcpu->arch.guest_fpu.xfd_err)
10338 wrmsrl(MSR_IA32_XFD_ERR, 0);
10341 * Consume any pending interrupts, including the possible source of
10342 * VM-Exit on SVM and any ticks that occur between VM-Exit and now.
10343 * An instruction is required after local_irq_enable() to fully unblock
10344 * interrupts on processors that implement an interrupt shadow, the
10345 * stat.exits increment will do nicely.
10347 kvm_before_interrupt(vcpu, KVM_HANDLING_IRQ);
10348 local_irq_enable();
10349 ++vcpu->stat.exits;
10350 local_irq_disable();
10351 kvm_after_interrupt(vcpu);
10354 * Wait until after servicing IRQs to account guest time so that any
10355 * ticks that occurred while running the guest are properly accounted
10356 * to the guest. Waiting until IRQs are enabled degrades the accuracy
10357 * of accounting via context tracking, but the loss of accuracy is
10358 * acceptable for all known use cases.
10360 guest_timing_exit_irqoff();
10362 local_irq_enable();
10365 kvm_vcpu_srcu_read_lock(vcpu);
10368 * Profile KVM exit RIPs:
10370 if (unlikely(prof_on == KVM_PROFILING)) {
10371 unsigned long rip = kvm_rip_read(vcpu);
10372 profile_hit(KVM_PROFILING, (void *)rip);
10375 if (unlikely(vcpu->arch.tsc_always_catchup))
10376 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
10378 if (vcpu->arch.apic_attention)
10379 kvm_lapic_sync_from_vapic(vcpu);
10381 r = static_call(kvm_x86_handle_exit)(vcpu, exit_fastpath);
10385 if (req_immediate_exit)
10386 kvm_make_request(KVM_REQ_EVENT, vcpu);
10387 static_call(kvm_x86_cancel_injection)(vcpu);
10388 if (unlikely(vcpu->arch.apic_attention))
10389 kvm_lapic_sync_from_vapic(vcpu);
10394 /* Called within kvm->srcu read side. */
10395 static inline int vcpu_block(struct kvm_vcpu *vcpu)
10399 if (!kvm_arch_vcpu_runnable(vcpu)) {
10401 * Switch to the software timer before halt-polling/blocking as
10402 * the guest's timer may be a break event for the vCPU, and the
10403 * hypervisor timer runs only when the CPU is in guest mode.
10404 * Switch before halt-polling so that KVM recognizes an expired
10405 * timer before blocking.
10407 hv_timer = kvm_lapic_hv_timer_in_use(vcpu);
10409 kvm_lapic_switch_to_sw_timer(vcpu);
10411 kvm_vcpu_srcu_read_unlock(vcpu);
10412 if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED)
10413 kvm_vcpu_halt(vcpu);
10415 kvm_vcpu_block(vcpu);
10416 kvm_vcpu_srcu_read_lock(vcpu);
10419 kvm_lapic_switch_to_hv_timer(vcpu);
10421 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
10425 if (kvm_apic_accept_events(vcpu) < 0)
10427 switch(vcpu->arch.mp_state) {
10428 case KVM_MP_STATE_HALTED:
10429 case KVM_MP_STATE_AP_RESET_HOLD:
10430 vcpu->arch.pv.pv_unhalted = false;
10431 vcpu->arch.mp_state =
10432 KVM_MP_STATE_RUNNABLE;
10434 case KVM_MP_STATE_RUNNABLE:
10435 vcpu->arch.apf.halted = false;
10437 case KVM_MP_STATE_INIT_RECEIVED:
10445 static inline bool kvm_vcpu_running(struct kvm_vcpu *vcpu)
10447 if (is_guest_mode(vcpu))
10448 kvm_check_nested_events(vcpu);
10450 return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
10451 !vcpu->arch.apf.halted);
10454 /* Called within kvm->srcu read side. */
10455 static int vcpu_run(struct kvm_vcpu *vcpu)
10459 vcpu->arch.l1tf_flush_l1d = true;
10462 if (kvm_vcpu_running(vcpu)) {
10463 r = vcpu_enter_guest(vcpu);
10465 r = vcpu_block(vcpu);
10471 kvm_clear_request(KVM_REQ_UNBLOCK, vcpu);
10472 if (kvm_xen_has_pending_events(vcpu))
10473 kvm_xen_inject_pending_events(vcpu);
10475 if (kvm_cpu_has_pending_timer(vcpu))
10476 kvm_inject_pending_timer_irqs(vcpu);
10478 if (dm_request_for_irq_injection(vcpu) &&
10479 kvm_vcpu_ready_for_interrupt_injection(vcpu)) {
10481 vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
10482 ++vcpu->stat.request_irq_exits;
10486 if (__xfer_to_guest_mode_work_pending()) {
10487 kvm_vcpu_srcu_read_unlock(vcpu);
10488 r = xfer_to_guest_mode_handle_work(vcpu);
10489 kvm_vcpu_srcu_read_lock(vcpu);
10498 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
10500 return kvm_emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
10503 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
10505 BUG_ON(!vcpu->arch.pio.count);
10507 return complete_emulated_io(vcpu);
10511 * Implements the following, as a state machine:
10514 * for each fragment
10515 * for each mmio piece in the fragment
10522 * for each fragment
10523 * for each mmio piece in the fragment
10528 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
10530 struct kvm_run *run = vcpu->run;
10531 struct kvm_mmio_fragment *frag;
10534 BUG_ON(!vcpu->mmio_needed);
10536 /* Complete previous fragment */
10537 frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
10538 len = min(8u, frag->len);
10539 if (!vcpu->mmio_is_write)
10540 memcpy(frag->data, run->mmio.data, len);
10542 if (frag->len <= 8) {
10543 /* Switch to the next fragment. */
10545 vcpu->mmio_cur_fragment++;
10547 /* Go forward to the next mmio piece. */
10553 if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
10554 vcpu->mmio_needed = 0;
10556 /* FIXME: return into emulator if single-stepping. */
10557 if (vcpu->mmio_is_write)
10559 vcpu->mmio_read_completed = 1;
10560 return complete_emulated_io(vcpu);
10563 run->exit_reason = KVM_EXIT_MMIO;
10564 run->mmio.phys_addr = frag->gpa;
10565 if (vcpu->mmio_is_write)
10566 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
10567 run->mmio.len = min(8u, frag->len);
10568 run->mmio.is_write = vcpu->mmio_is_write;
10569 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
10573 /* Swap (qemu) user FPU context for the guest FPU context. */
10574 static void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
10576 /* Exclude PKRU, it's restored separately immediately after VM-Exit. */
10577 fpu_swap_kvm_fpstate(&vcpu->arch.guest_fpu, true);
10581 /* When vcpu_run ends, restore user space FPU context. */
10582 static void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
10584 fpu_swap_kvm_fpstate(&vcpu->arch.guest_fpu, false);
10585 ++vcpu->stat.fpu_reload;
10589 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu)
10591 struct kvm_run *kvm_run = vcpu->run;
10595 kvm_sigset_activate(vcpu);
10596 kvm_run->flags = 0;
10597 kvm_load_guest_fpu(vcpu);
10599 kvm_vcpu_srcu_read_lock(vcpu);
10600 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
10601 if (kvm_run->immediate_exit) {
10606 * It should be impossible for the hypervisor timer to be in
10607 * use before KVM has ever run the vCPU.
10609 WARN_ON_ONCE(kvm_lapic_hv_timer_in_use(vcpu));
10611 kvm_vcpu_srcu_read_unlock(vcpu);
10612 kvm_vcpu_block(vcpu);
10613 kvm_vcpu_srcu_read_lock(vcpu);
10615 if (kvm_apic_accept_events(vcpu) < 0) {
10619 kvm_clear_request(KVM_REQ_UNHALT, vcpu);
10621 if (signal_pending(current)) {
10623 kvm_run->exit_reason = KVM_EXIT_INTR;
10624 ++vcpu->stat.signal_exits;
10629 if ((kvm_run->kvm_valid_regs & ~KVM_SYNC_X86_VALID_FIELDS) ||
10630 (kvm_run->kvm_dirty_regs & ~KVM_SYNC_X86_VALID_FIELDS)) {
10635 if (kvm_run->kvm_dirty_regs) {
10636 r = sync_regs(vcpu);
10641 /* re-sync apic's tpr */
10642 if (!lapic_in_kernel(vcpu)) {
10643 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
10649 if (unlikely(vcpu->arch.complete_userspace_io)) {
10650 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
10651 vcpu->arch.complete_userspace_io = NULL;
10656 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
10658 if (kvm_run->immediate_exit) {
10663 r = static_call(kvm_x86_vcpu_pre_run)(vcpu);
10667 r = vcpu_run(vcpu);
10670 kvm_put_guest_fpu(vcpu);
10671 if (kvm_run->kvm_valid_regs)
10673 post_kvm_run_save(vcpu);
10674 kvm_vcpu_srcu_read_unlock(vcpu);
10676 kvm_sigset_deactivate(vcpu);
10681 static void __get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
10683 if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
10685 * We are here if userspace calls get_regs() in the middle of
10686 * instruction emulation. Registers state needs to be copied
10687 * back from emulation context to vcpu. Userspace shouldn't do
10688 * that usually, but some bad designed PV devices (vmware
10689 * backdoor interface) need this to work
10691 emulator_writeback_register_cache(vcpu->arch.emulate_ctxt);
10692 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
10694 regs->rax = kvm_rax_read(vcpu);
10695 regs->rbx = kvm_rbx_read(vcpu);
10696 regs->rcx = kvm_rcx_read(vcpu);
10697 regs->rdx = kvm_rdx_read(vcpu);
10698 regs->rsi = kvm_rsi_read(vcpu);
10699 regs->rdi = kvm_rdi_read(vcpu);
10700 regs->rsp = kvm_rsp_read(vcpu);
10701 regs->rbp = kvm_rbp_read(vcpu);
10702 #ifdef CONFIG_X86_64
10703 regs->r8 = kvm_r8_read(vcpu);
10704 regs->r9 = kvm_r9_read(vcpu);
10705 regs->r10 = kvm_r10_read(vcpu);
10706 regs->r11 = kvm_r11_read(vcpu);
10707 regs->r12 = kvm_r12_read(vcpu);
10708 regs->r13 = kvm_r13_read(vcpu);
10709 regs->r14 = kvm_r14_read(vcpu);
10710 regs->r15 = kvm_r15_read(vcpu);
10713 regs->rip = kvm_rip_read(vcpu);
10714 regs->rflags = kvm_get_rflags(vcpu);
10717 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
10720 __get_regs(vcpu, regs);
10725 static void __set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
10727 vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
10728 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
10730 kvm_rax_write(vcpu, regs->rax);
10731 kvm_rbx_write(vcpu, regs->rbx);
10732 kvm_rcx_write(vcpu, regs->rcx);
10733 kvm_rdx_write(vcpu, regs->rdx);
10734 kvm_rsi_write(vcpu, regs->rsi);
10735 kvm_rdi_write(vcpu, regs->rdi);
10736 kvm_rsp_write(vcpu, regs->rsp);
10737 kvm_rbp_write(vcpu, regs->rbp);
10738 #ifdef CONFIG_X86_64
10739 kvm_r8_write(vcpu, regs->r8);
10740 kvm_r9_write(vcpu, regs->r9);
10741 kvm_r10_write(vcpu, regs->r10);
10742 kvm_r11_write(vcpu, regs->r11);
10743 kvm_r12_write(vcpu, regs->r12);
10744 kvm_r13_write(vcpu, regs->r13);
10745 kvm_r14_write(vcpu, regs->r14);
10746 kvm_r15_write(vcpu, regs->r15);
10749 kvm_rip_write(vcpu, regs->rip);
10750 kvm_set_rflags(vcpu, regs->rflags | X86_EFLAGS_FIXED);
10752 vcpu->arch.exception.pending = false;
10754 kvm_make_request(KVM_REQ_EVENT, vcpu);
10757 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
10760 __set_regs(vcpu, regs);
10765 static void __get_sregs_common(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
10767 struct desc_ptr dt;
10769 if (vcpu->arch.guest_state_protected)
10770 goto skip_protected_regs;
10772 kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
10773 kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
10774 kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
10775 kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
10776 kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
10777 kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
10779 kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
10780 kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
10782 static_call(kvm_x86_get_idt)(vcpu, &dt);
10783 sregs->idt.limit = dt.size;
10784 sregs->idt.base = dt.address;
10785 static_call(kvm_x86_get_gdt)(vcpu, &dt);
10786 sregs->gdt.limit = dt.size;
10787 sregs->gdt.base = dt.address;
10789 sregs->cr2 = vcpu->arch.cr2;
10790 sregs->cr3 = kvm_read_cr3(vcpu);
10792 skip_protected_regs:
10793 sregs->cr0 = kvm_read_cr0(vcpu);
10794 sregs->cr4 = kvm_read_cr4(vcpu);
10795 sregs->cr8 = kvm_get_cr8(vcpu);
10796 sregs->efer = vcpu->arch.efer;
10797 sregs->apic_base = kvm_get_apic_base(vcpu);
10800 static void __get_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
10802 __get_sregs_common(vcpu, sregs);
10804 if (vcpu->arch.guest_state_protected)
10807 if (vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft)
10808 set_bit(vcpu->arch.interrupt.nr,
10809 (unsigned long *)sregs->interrupt_bitmap);
10812 static void __get_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2)
10816 __get_sregs_common(vcpu, (struct kvm_sregs *)sregs2);
10818 if (vcpu->arch.guest_state_protected)
10821 if (is_pae_paging(vcpu)) {
10822 for (i = 0 ; i < 4 ; i++)
10823 sregs2->pdptrs[i] = kvm_pdptr_read(vcpu, i);
10824 sregs2->flags |= KVM_SREGS2_FLAGS_PDPTRS_VALID;
10828 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
10829 struct kvm_sregs *sregs)
10832 __get_sregs(vcpu, sregs);
10837 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
10838 struct kvm_mp_state *mp_state)
10843 if (kvm_mpx_supported())
10844 kvm_load_guest_fpu(vcpu);
10846 r = kvm_apic_accept_events(vcpu);
10851 if ((vcpu->arch.mp_state == KVM_MP_STATE_HALTED ||
10852 vcpu->arch.mp_state == KVM_MP_STATE_AP_RESET_HOLD) &&
10853 vcpu->arch.pv.pv_unhalted)
10854 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
10856 mp_state->mp_state = vcpu->arch.mp_state;
10859 if (kvm_mpx_supported())
10860 kvm_put_guest_fpu(vcpu);
10865 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
10866 struct kvm_mp_state *mp_state)
10872 if (!lapic_in_kernel(vcpu) &&
10873 mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
10877 * KVM_MP_STATE_INIT_RECEIVED means the processor is in
10878 * INIT state; latched init should be reported using
10879 * KVM_SET_VCPU_EVENTS, so reject it here.
10881 if ((kvm_vcpu_latch_init(vcpu) || vcpu->arch.smi_pending) &&
10882 (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED ||
10883 mp_state->mp_state == KVM_MP_STATE_INIT_RECEIVED))
10886 if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
10887 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
10888 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
10890 vcpu->arch.mp_state = mp_state->mp_state;
10891 kvm_make_request(KVM_REQ_EVENT, vcpu);
10899 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
10900 int reason, bool has_error_code, u32 error_code)
10902 struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
10905 init_emulate_ctxt(vcpu);
10907 ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
10908 has_error_code, error_code);
10910 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
10911 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
10912 vcpu->run->internal.ndata = 0;
10916 kvm_rip_write(vcpu, ctxt->eip);
10917 kvm_set_rflags(vcpu, ctxt->eflags);
10920 EXPORT_SYMBOL_GPL(kvm_task_switch);
10922 static bool kvm_is_valid_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
10924 if ((sregs->efer & EFER_LME) && (sregs->cr0 & X86_CR0_PG)) {
10926 * When EFER.LME and CR0.PG are set, the processor is in
10927 * 64-bit mode (though maybe in a 32-bit code segment).
10928 * CR4.PAE and EFER.LMA must be set.
10930 if (!(sregs->cr4 & X86_CR4_PAE) || !(sregs->efer & EFER_LMA))
10932 if (kvm_vcpu_is_illegal_gpa(vcpu, sregs->cr3))
10936 * Not in 64-bit mode: EFER.LMA is clear and the code
10937 * segment cannot be 64-bit.
10939 if (sregs->efer & EFER_LMA || sregs->cs.l)
10943 return kvm_is_valid_cr4(vcpu, sregs->cr4);
10946 static int __set_sregs_common(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs,
10947 int *mmu_reset_needed, bool update_pdptrs)
10949 struct msr_data apic_base_msr;
10951 struct desc_ptr dt;
10953 if (!kvm_is_valid_sregs(vcpu, sregs))
10956 apic_base_msr.data = sregs->apic_base;
10957 apic_base_msr.host_initiated = true;
10958 if (kvm_set_apic_base(vcpu, &apic_base_msr))
10961 if (vcpu->arch.guest_state_protected)
10964 dt.size = sregs->idt.limit;
10965 dt.address = sregs->idt.base;
10966 static_call(kvm_x86_set_idt)(vcpu, &dt);
10967 dt.size = sregs->gdt.limit;
10968 dt.address = sregs->gdt.base;
10969 static_call(kvm_x86_set_gdt)(vcpu, &dt);
10971 vcpu->arch.cr2 = sregs->cr2;
10972 *mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
10973 vcpu->arch.cr3 = sregs->cr3;
10974 kvm_register_mark_dirty(vcpu, VCPU_EXREG_CR3);
10975 static_call_cond(kvm_x86_post_set_cr3)(vcpu, sregs->cr3);
10977 kvm_set_cr8(vcpu, sregs->cr8);
10979 *mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
10980 static_call(kvm_x86_set_efer)(vcpu, sregs->efer);
10982 *mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
10983 static_call(kvm_x86_set_cr0)(vcpu, sregs->cr0);
10984 vcpu->arch.cr0 = sregs->cr0;
10986 *mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
10987 static_call(kvm_x86_set_cr4)(vcpu, sregs->cr4);
10989 if (update_pdptrs) {
10990 idx = srcu_read_lock(&vcpu->kvm->srcu);
10991 if (is_pae_paging(vcpu)) {
10992 load_pdptrs(vcpu, kvm_read_cr3(vcpu));
10993 *mmu_reset_needed = 1;
10995 srcu_read_unlock(&vcpu->kvm->srcu, idx);
10998 kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
10999 kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
11000 kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
11001 kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
11002 kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
11003 kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
11005 kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
11006 kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
11008 update_cr8_intercept(vcpu);
11010 /* Older userspace won't unhalt the vcpu on reset. */
11011 if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
11012 sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
11013 !is_protmode(vcpu))
11014 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
11019 static int __set_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
11021 int pending_vec, max_bits;
11022 int mmu_reset_needed = 0;
11023 int ret = __set_sregs_common(vcpu, sregs, &mmu_reset_needed, true);
11028 if (mmu_reset_needed)
11029 kvm_mmu_reset_context(vcpu);
11031 max_bits = KVM_NR_INTERRUPTS;
11032 pending_vec = find_first_bit(
11033 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
11035 if (pending_vec < max_bits) {
11036 kvm_queue_interrupt(vcpu, pending_vec, false);
11037 pr_debug("Set back pending irq %d\n", pending_vec);
11038 kvm_make_request(KVM_REQ_EVENT, vcpu);
11043 static int __set_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2)
11045 int mmu_reset_needed = 0;
11046 bool valid_pdptrs = sregs2->flags & KVM_SREGS2_FLAGS_PDPTRS_VALID;
11047 bool pae = (sregs2->cr0 & X86_CR0_PG) && (sregs2->cr4 & X86_CR4_PAE) &&
11048 !(sregs2->efer & EFER_LMA);
11051 if (sregs2->flags & ~KVM_SREGS2_FLAGS_PDPTRS_VALID)
11054 if (valid_pdptrs && (!pae || vcpu->arch.guest_state_protected))
11057 ret = __set_sregs_common(vcpu, (struct kvm_sregs *)sregs2,
11058 &mmu_reset_needed, !valid_pdptrs);
11062 if (valid_pdptrs) {
11063 for (i = 0; i < 4 ; i++)
11064 kvm_pdptr_write(vcpu, i, sregs2->pdptrs[i]);
11066 kvm_register_mark_dirty(vcpu, VCPU_EXREG_PDPTR);
11067 mmu_reset_needed = 1;
11068 vcpu->arch.pdptrs_from_userspace = true;
11070 if (mmu_reset_needed)
11071 kvm_mmu_reset_context(vcpu);
11075 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
11076 struct kvm_sregs *sregs)
11081 ret = __set_sregs(vcpu, sregs);
11086 static void kvm_arch_vcpu_guestdbg_update_apicv_inhibit(struct kvm *kvm)
11089 struct kvm_vcpu *vcpu;
11095 down_write(&kvm->arch.apicv_update_lock);
11097 kvm_for_each_vcpu(i, vcpu, kvm) {
11098 if (vcpu->guest_debug & KVM_GUESTDBG_BLOCKIRQ) {
11103 __kvm_set_or_clear_apicv_inhibit(kvm, APICV_INHIBIT_REASON_BLOCKIRQ, set);
11104 up_write(&kvm->arch.apicv_update_lock);
11107 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
11108 struct kvm_guest_debug *dbg)
11110 unsigned long rflags;
11113 if (vcpu->arch.guest_state_protected)
11118 if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
11120 if (vcpu->arch.exception.pending)
11122 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
11123 kvm_queue_exception(vcpu, DB_VECTOR);
11125 kvm_queue_exception(vcpu, BP_VECTOR);
11129 * Read rflags as long as potentially injected trace flags are still
11132 rflags = kvm_get_rflags(vcpu);
11134 vcpu->guest_debug = dbg->control;
11135 if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
11136 vcpu->guest_debug = 0;
11138 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
11139 for (i = 0; i < KVM_NR_DB_REGS; ++i)
11140 vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
11141 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
11143 for (i = 0; i < KVM_NR_DB_REGS; i++)
11144 vcpu->arch.eff_db[i] = vcpu->arch.db[i];
11146 kvm_update_dr7(vcpu);
11148 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
11149 vcpu->arch.singlestep_rip = kvm_get_linear_rip(vcpu);
11152 * Trigger an rflags update that will inject or remove the trace
11155 kvm_set_rflags(vcpu, rflags);
11157 static_call(kvm_x86_update_exception_bitmap)(vcpu);
11159 kvm_arch_vcpu_guestdbg_update_apicv_inhibit(vcpu->kvm);
11169 * Translate a guest virtual address to a guest physical address.
11171 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
11172 struct kvm_translation *tr)
11174 unsigned long vaddr = tr->linear_address;
11180 idx = srcu_read_lock(&vcpu->kvm->srcu);
11181 gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
11182 srcu_read_unlock(&vcpu->kvm->srcu, idx);
11183 tr->physical_address = gpa;
11184 tr->valid = gpa != UNMAPPED_GVA;
11192 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
11194 struct fxregs_state *fxsave;
11196 if (fpstate_is_confidential(&vcpu->arch.guest_fpu))
11201 fxsave = &vcpu->arch.guest_fpu.fpstate->regs.fxsave;
11202 memcpy(fpu->fpr, fxsave->st_space, 128);
11203 fpu->fcw = fxsave->cwd;
11204 fpu->fsw = fxsave->swd;
11205 fpu->ftwx = fxsave->twd;
11206 fpu->last_opcode = fxsave->fop;
11207 fpu->last_ip = fxsave->rip;
11208 fpu->last_dp = fxsave->rdp;
11209 memcpy(fpu->xmm, fxsave->xmm_space, sizeof(fxsave->xmm_space));
11215 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
11217 struct fxregs_state *fxsave;
11219 if (fpstate_is_confidential(&vcpu->arch.guest_fpu))
11224 fxsave = &vcpu->arch.guest_fpu.fpstate->regs.fxsave;
11226 memcpy(fxsave->st_space, fpu->fpr, 128);
11227 fxsave->cwd = fpu->fcw;
11228 fxsave->swd = fpu->fsw;
11229 fxsave->twd = fpu->ftwx;
11230 fxsave->fop = fpu->last_opcode;
11231 fxsave->rip = fpu->last_ip;
11232 fxsave->rdp = fpu->last_dp;
11233 memcpy(fxsave->xmm_space, fpu->xmm, sizeof(fxsave->xmm_space));
11239 static void store_regs(struct kvm_vcpu *vcpu)
11241 BUILD_BUG_ON(sizeof(struct kvm_sync_regs) > SYNC_REGS_SIZE_BYTES);
11243 if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_REGS)
11244 __get_regs(vcpu, &vcpu->run->s.regs.regs);
11246 if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_SREGS)
11247 __get_sregs(vcpu, &vcpu->run->s.regs.sregs);
11249 if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_EVENTS)
11250 kvm_vcpu_ioctl_x86_get_vcpu_events(
11251 vcpu, &vcpu->run->s.regs.events);
11254 static int sync_regs(struct kvm_vcpu *vcpu)
11256 if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_REGS) {
11257 __set_regs(vcpu, &vcpu->run->s.regs.regs);
11258 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_REGS;
11260 if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_SREGS) {
11261 if (__set_sregs(vcpu, &vcpu->run->s.regs.sregs))
11263 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_SREGS;
11265 if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_EVENTS) {
11266 if (kvm_vcpu_ioctl_x86_set_vcpu_events(
11267 vcpu, &vcpu->run->s.regs.events))
11269 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_EVENTS;
11275 int kvm_arch_vcpu_precreate(struct kvm *kvm, unsigned int id)
11277 if (kvm_check_tsc_unstable() && kvm->created_vcpus)
11278 pr_warn_once("kvm: SMP vm created on host with unstable TSC; "
11279 "guest TSC will not be reliable\n");
11281 if (!kvm->arch.max_vcpu_ids)
11282 kvm->arch.max_vcpu_ids = KVM_MAX_VCPU_IDS;
11284 if (id >= kvm->arch.max_vcpu_ids)
11287 return static_call(kvm_x86_vcpu_precreate)(kvm);
11290 int kvm_arch_vcpu_create(struct kvm_vcpu *vcpu)
11295 vcpu->arch.last_vmentry_cpu = -1;
11296 vcpu->arch.regs_avail = ~0;
11297 vcpu->arch.regs_dirty = ~0;
11299 if (!irqchip_in_kernel(vcpu->kvm) || kvm_vcpu_is_reset_bsp(vcpu))
11300 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
11302 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
11304 r = kvm_mmu_create(vcpu);
11308 if (irqchip_in_kernel(vcpu->kvm)) {
11309 r = kvm_create_lapic(vcpu, lapic_timer_advance_ns);
11311 goto fail_mmu_destroy;
11314 * Defer evaluating inhibits until the vCPU is first run, as
11315 * this vCPU will not get notified of any changes until this
11316 * vCPU is visible to other vCPUs (marked online and added to
11317 * the set of vCPUs). Opportunistically mark APICv active as
11318 * VMX in particularly is highly unlikely to have inhibits.
11319 * Ignore the current per-VM APICv state so that vCPU creation
11320 * is guaranteed to run with a deterministic value, the request
11321 * will ensure the vCPU gets the correct state before VM-Entry.
11323 if (enable_apicv) {
11324 vcpu->arch.apicv_active = true;
11325 kvm_make_request(KVM_REQ_APICV_UPDATE, vcpu);
11328 static_branch_inc(&kvm_has_noapic_vcpu);
11332 page = alloc_page(GFP_KERNEL_ACCOUNT | __GFP_ZERO);
11334 goto fail_free_lapic;
11335 vcpu->arch.pio_data = page_address(page);
11337 vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
11338 GFP_KERNEL_ACCOUNT);
11339 if (!vcpu->arch.mce_banks)
11340 goto fail_free_pio_data;
11341 vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
11343 if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask,
11344 GFP_KERNEL_ACCOUNT))
11345 goto fail_free_mce_banks;
11347 if (!alloc_emulate_ctxt(vcpu))
11348 goto free_wbinvd_dirty_mask;
11350 if (!fpu_alloc_guest_fpstate(&vcpu->arch.guest_fpu)) {
11351 pr_err("kvm: failed to allocate vcpu's fpu\n");
11352 goto free_emulate_ctxt;
11355 vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
11356 vcpu->arch.reserved_gpa_bits = kvm_vcpu_reserved_gpa_bits_raw(vcpu);
11358 vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
11360 kvm_async_pf_hash_reset(vcpu);
11361 kvm_pmu_init(vcpu);
11363 vcpu->arch.pending_external_vector = -1;
11364 vcpu->arch.preempted_in_kernel = false;
11366 #if IS_ENABLED(CONFIG_HYPERV)
11367 vcpu->arch.hv_root_tdp = INVALID_PAGE;
11370 r = static_call(kvm_x86_vcpu_create)(vcpu);
11372 goto free_guest_fpu;
11374 vcpu->arch.arch_capabilities = kvm_get_arch_capabilities();
11375 vcpu->arch.msr_platform_info = MSR_PLATFORM_INFO_CPUID_FAULT;
11376 kvm_xen_init_vcpu(vcpu);
11377 kvm_vcpu_mtrr_init(vcpu);
11379 kvm_set_tsc_khz(vcpu, vcpu->kvm->arch.default_tsc_khz);
11380 kvm_vcpu_reset(vcpu, false);
11381 kvm_init_mmu(vcpu);
11386 fpu_free_guest_fpstate(&vcpu->arch.guest_fpu);
11388 kmem_cache_free(x86_emulator_cache, vcpu->arch.emulate_ctxt);
11389 free_wbinvd_dirty_mask:
11390 free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
11391 fail_free_mce_banks:
11392 kfree(vcpu->arch.mce_banks);
11393 fail_free_pio_data:
11394 free_page((unsigned long)vcpu->arch.pio_data);
11396 kvm_free_lapic(vcpu);
11398 kvm_mmu_destroy(vcpu);
11402 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
11404 struct kvm *kvm = vcpu->kvm;
11406 if (mutex_lock_killable(&vcpu->mutex))
11409 kvm_synchronize_tsc(vcpu, 0);
11412 /* poll control enabled by default */
11413 vcpu->arch.msr_kvm_poll_control = 1;
11415 mutex_unlock(&vcpu->mutex);
11417 if (kvmclock_periodic_sync && vcpu->vcpu_idx == 0)
11418 schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
11419 KVMCLOCK_SYNC_PERIOD);
11422 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
11426 kvmclock_reset(vcpu);
11428 static_call(kvm_x86_vcpu_free)(vcpu);
11430 kmem_cache_free(x86_emulator_cache, vcpu->arch.emulate_ctxt);
11431 free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
11432 fpu_free_guest_fpstate(&vcpu->arch.guest_fpu);
11434 kvm_xen_destroy_vcpu(vcpu);
11435 kvm_hv_vcpu_uninit(vcpu);
11436 kvm_pmu_destroy(vcpu);
11437 kfree(vcpu->arch.mce_banks);
11438 kvm_free_lapic(vcpu);
11439 idx = srcu_read_lock(&vcpu->kvm->srcu);
11440 kvm_mmu_destroy(vcpu);
11441 srcu_read_unlock(&vcpu->kvm->srcu, idx);
11442 free_page((unsigned long)vcpu->arch.pio_data);
11443 kvfree(vcpu->arch.cpuid_entries);
11444 if (!lapic_in_kernel(vcpu))
11445 static_branch_dec(&kvm_has_noapic_vcpu);
11448 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
11450 struct kvm_cpuid_entry2 *cpuid_0x1;
11451 unsigned long old_cr0 = kvm_read_cr0(vcpu);
11452 unsigned long new_cr0;
11455 * Several of the "set" flows, e.g. ->set_cr0(), read other registers
11456 * to handle side effects. RESET emulation hits those flows and relies
11457 * on emulated/virtualized registers, including those that are loaded
11458 * into hardware, to be zeroed at vCPU creation. Use CRs as a sentinel
11459 * to detect improper or missing initialization.
11461 WARN_ON_ONCE(!init_event &&
11462 (old_cr0 || kvm_read_cr3(vcpu) || kvm_read_cr4(vcpu)));
11464 kvm_lapic_reset(vcpu, init_event);
11466 vcpu->arch.hflags = 0;
11468 vcpu->arch.smi_pending = 0;
11469 vcpu->arch.smi_count = 0;
11470 atomic_set(&vcpu->arch.nmi_queued, 0);
11471 vcpu->arch.nmi_pending = 0;
11472 vcpu->arch.nmi_injected = false;
11473 kvm_clear_interrupt_queue(vcpu);
11474 kvm_clear_exception_queue(vcpu);
11476 memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
11477 kvm_update_dr0123(vcpu);
11478 vcpu->arch.dr6 = DR6_ACTIVE_LOW;
11479 vcpu->arch.dr7 = DR7_FIXED_1;
11480 kvm_update_dr7(vcpu);
11482 vcpu->arch.cr2 = 0;
11484 kvm_make_request(KVM_REQ_EVENT, vcpu);
11485 vcpu->arch.apf.msr_en_val = 0;
11486 vcpu->arch.apf.msr_int_val = 0;
11487 vcpu->arch.st.msr_val = 0;
11489 kvmclock_reset(vcpu);
11491 kvm_clear_async_pf_completion_queue(vcpu);
11492 kvm_async_pf_hash_reset(vcpu);
11493 vcpu->arch.apf.halted = false;
11495 if (vcpu->arch.guest_fpu.fpstate && kvm_mpx_supported()) {
11496 struct fpstate *fpstate = vcpu->arch.guest_fpu.fpstate;
11499 * To avoid have the INIT path from kvm_apic_has_events() that be
11500 * called with loaded FPU and does not let userspace fix the state.
11503 kvm_put_guest_fpu(vcpu);
11505 fpstate_clear_xstate_component(fpstate, XFEATURE_BNDREGS);
11506 fpstate_clear_xstate_component(fpstate, XFEATURE_BNDCSR);
11509 kvm_load_guest_fpu(vcpu);
11513 kvm_pmu_reset(vcpu);
11514 vcpu->arch.smbase = 0x30000;
11516 vcpu->arch.msr_misc_features_enables = 0;
11518 __kvm_set_xcr(vcpu, 0, XFEATURE_MASK_FP);
11519 __kvm_set_msr(vcpu, MSR_IA32_XSS, 0, true);
11522 /* All GPRs except RDX (handled below) are zeroed on RESET/INIT. */
11523 memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
11524 kvm_register_mark_dirty(vcpu, VCPU_REGS_RSP);
11527 * Fall back to KVM's default Family/Model/Stepping of 0x600 (P6/Athlon)
11528 * if no CPUID match is found. Note, it's impossible to get a match at
11529 * RESET since KVM emulates RESET before exposing the vCPU to userspace,
11530 * i.e. it's impossible for kvm_find_cpuid_entry() to find a valid entry
11531 * on RESET. But, go through the motions in case that's ever remedied.
11533 cpuid_0x1 = kvm_find_cpuid_entry(vcpu, 1, 0);
11534 kvm_rdx_write(vcpu, cpuid_0x1 ? cpuid_0x1->eax : 0x600);
11536 static_call(kvm_x86_vcpu_reset)(vcpu, init_event);
11538 kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
11539 kvm_rip_write(vcpu, 0xfff0);
11541 vcpu->arch.cr3 = 0;
11542 kvm_register_mark_dirty(vcpu, VCPU_EXREG_CR3);
11545 * CR0.CD/NW are set on RESET, preserved on INIT. Note, some versions
11546 * of Intel's SDM list CD/NW as being set on INIT, but they contradict
11547 * (or qualify) that with a footnote stating that CD/NW are preserved.
11549 new_cr0 = X86_CR0_ET;
11551 new_cr0 |= (old_cr0 & (X86_CR0_NW | X86_CR0_CD));
11553 new_cr0 |= X86_CR0_NW | X86_CR0_CD;
11555 static_call(kvm_x86_set_cr0)(vcpu, new_cr0);
11556 static_call(kvm_x86_set_cr4)(vcpu, 0);
11557 static_call(kvm_x86_set_efer)(vcpu, 0);
11558 static_call(kvm_x86_update_exception_bitmap)(vcpu);
11561 * On the standard CR0/CR4/EFER modification paths, there are several
11562 * complex conditions determining whether the MMU has to be reset and/or
11563 * which PCIDs have to be flushed. However, CR0.WP and the paging-related
11564 * bits in CR4 and EFER are irrelevant if CR0.PG was '0'; and a reset+flush
11565 * is needed anyway if CR0.PG was '1' (which can only happen for INIT, as
11566 * CR0 will be '0' prior to RESET). So we only need to check CR0.PG here.
11568 if (old_cr0 & X86_CR0_PG) {
11569 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu);
11570 kvm_mmu_reset_context(vcpu);
11574 * Intel's SDM states that all TLB entries are flushed on INIT. AMD's
11575 * APM states the TLBs are untouched by INIT, but it also states that
11576 * the TLBs are flushed on "External initialization of the processor."
11577 * Flush the guest TLB regardless of vendor, there is no meaningful
11578 * benefit in relying on the guest to flush the TLB immediately after
11579 * INIT. A spurious TLB flush is benign and likely negligible from a
11580 * performance perspective.
11583 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu);
11585 EXPORT_SYMBOL_GPL(kvm_vcpu_reset);
11587 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
11589 struct kvm_segment cs;
11591 kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
11592 cs.selector = vector << 8;
11593 cs.base = vector << 12;
11594 kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
11595 kvm_rip_write(vcpu, 0);
11597 EXPORT_SYMBOL_GPL(kvm_vcpu_deliver_sipi_vector);
11599 int kvm_arch_hardware_enable(void)
11602 struct kvm_vcpu *vcpu;
11607 bool stable, backwards_tsc = false;
11609 kvm_user_return_msr_cpu_online();
11610 ret = static_call(kvm_x86_hardware_enable)();
11614 local_tsc = rdtsc();
11615 stable = !kvm_check_tsc_unstable();
11616 list_for_each_entry(kvm, &vm_list, vm_list) {
11617 kvm_for_each_vcpu(i, vcpu, kvm) {
11618 if (!stable && vcpu->cpu == smp_processor_id())
11619 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
11620 if (stable && vcpu->arch.last_host_tsc > local_tsc) {
11621 backwards_tsc = true;
11622 if (vcpu->arch.last_host_tsc > max_tsc)
11623 max_tsc = vcpu->arch.last_host_tsc;
11629 * Sometimes, even reliable TSCs go backwards. This happens on
11630 * platforms that reset TSC during suspend or hibernate actions, but
11631 * maintain synchronization. We must compensate. Fortunately, we can
11632 * detect that condition here, which happens early in CPU bringup,
11633 * before any KVM threads can be running. Unfortunately, we can't
11634 * bring the TSCs fully up to date with real time, as we aren't yet far
11635 * enough into CPU bringup that we know how much real time has actually
11636 * elapsed; our helper function, ktime_get_boottime_ns() will be using boot
11637 * variables that haven't been updated yet.
11639 * So we simply find the maximum observed TSC above, then record the
11640 * adjustment to TSC in each VCPU. When the VCPU later gets loaded,
11641 * the adjustment will be applied. Note that we accumulate
11642 * adjustments, in case multiple suspend cycles happen before some VCPU
11643 * gets a chance to run again. In the event that no KVM threads get a
11644 * chance to run, we will miss the entire elapsed period, as we'll have
11645 * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
11646 * loose cycle time. This isn't too big a deal, since the loss will be
11647 * uniform across all VCPUs (not to mention the scenario is extremely
11648 * unlikely). It is possible that a second hibernate recovery happens
11649 * much faster than a first, causing the observed TSC here to be
11650 * smaller; this would require additional padding adjustment, which is
11651 * why we set last_host_tsc to the local tsc observed here.
11653 * N.B. - this code below runs only on platforms with reliable TSC,
11654 * as that is the only way backwards_tsc is set above. Also note
11655 * that this runs for ALL vcpus, which is not a bug; all VCPUs should
11656 * have the same delta_cyc adjustment applied if backwards_tsc
11657 * is detected. Note further, this adjustment is only done once,
11658 * as we reset last_host_tsc on all VCPUs to stop this from being
11659 * called multiple times (one for each physical CPU bringup).
11661 * Platforms with unreliable TSCs don't have to deal with this, they
11662 * will be compensated by the logic in vcpu_load, which sets the TSC to
11663 * catchup mode. This will catchup all VCPUs to real time, but cannot
11664 * guarantee that they stay in perfect synchronization.
11666 if (backwards_tsc) {
11667 u64 delta_cyc = max_tsc - local_tsc;
11668 list_for_each_entry(kvm, &vm_list, vm_list) {
11669 kvm->arch.backwards_tsc_observed = true;
11670 kvm_for_each_vcpu(i, vcpu, kvm) {
11671 vcpu->arch.tsc_offset_adjustment += delta_cyc;
11672 vcpu->arch.last_host_tsc = local_tsc;
11673 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
11677 * We have to disable TSC offset matching.. if you were
11678 * booting a VM while issuing an S4 host suspend....
11679 * you may have some problem. Solving this issue is
11680 * left as an exercise to the reader.
11682 kvm->arch.last_tsc_nsec = 0;
11683 kvm->arch.last_tsc_write = 0;
11690 void kvm_arch_hardware_disable(void)
11692 static_call(kvm_x86_hardware_disable)();
11693 drop_user_return_notifiers();
11696 static inline void kvm_ops_update(struct kvm_x86_init_ops *ops)
11698 memcpy(&kvm_x86_ops, ops->runtime_ops, sizeof(kvm_x86_ops));
11700 #define __KVM_X86_OP(func) \
11701 static_call_update(kvm_x86_##func, kvm_x86_ops.func);
11702 #define KVM_X86_OP(func) \
11703 WARN_ON(!kvm_x86_ops.func); __KVM_X86_OP(func)
11704 #define KVM_X86_OP_OPTIONAL __KVM_X86_OP
11705 #define KVM_X86_OP_OPTIONAL_RET0(func) \
11706 static_call_update(kvm_x86_##func, (void *)kvm_x86_ops.func ? : \
11707 (void *)__static_call_return0);
11708 #include <asm/kvm-x86-ops.h>
11709 #undef __KVM_X86_OP
11711 kvm_pmu_ops_update(ops->pmu_ops);
11714 int kvm_arch_hardware_setup(void *opaque)
11716 struct kvm_x86_init_ops *ops = opaque;
11719 rdmsrl_safe(MSR_EFER, &host_efer);
11721 if (boot_cpu_has(X86_FEATURE_XSAVES))
11722 rdmsrl(MSR_IA32_XSS, host_xss);
11724 r = ops->hardware_setup();
11728 kvm_ops_update(ops);
11730 kvm_register_perf_callbacks(ops->handle_intel_pt_intr);
11732 if (!kvm_cpu_cap_has(X86_FEATURE_XSAVES))
11735 #define __kvm_cpu_cap_has(UNUSED_, f) kvm_cpu_cap_has(f)
11736 cr4_reserved_bits = __cr4_reserved_bits(__kvm_cpu_cap_has, UNUSED_);
11737 #undef __kvm_cpu_cap_has
11739 if (kvm_has_tsc_control) {
11741 * Make sure the user can only configure tsc_khz values that
11742 * fit into a signed integer.
11743 * A min value is not calculated because it will always
11744 * be 1 on all machines.
11746 u64 max = min(0x7fffffffULL,
11747 __scale_tsc(kvm_max_tsc_scaling_ratio, tsc_khz));
11748 kvm_max_guest_tsc_khz = max;
11750 kvm_default_tsc_scaling_ratio = 1ULL << kvm_tsc_scaling_ratio_frac_bits;
11751 kvm_init_msr_list();
11755 void kvm_arch_hardware_unsetup(void)
11757 kvm_unregister_perf_callbacks();
11759 static_call(kvm_x86_hardware_unsetup)();
11762 int kvm_arch_check_processor_compat(void *opaque)
11764 struct cpuinfo_x86 *c = &cpu_data(smp_processor_id());
11765 struct kvm_x86_init_ops *ops = opaque;
11767 WARN_ON(!irqs_disabled());
11769 if (__cr4_reserved_bits(cpu_has, c) !=
11770 __cr4_reserved_bits(cpu_has, &boot_cpu_data))
11773 return ops->check_processor_compatibility();
11776 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
11778 return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
11780 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp);
11782 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
11784 return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
11787 __read_mostly DEFINE_STATIC_KEY_FALSE(kvm_has_noapic_vcpu);
11788 EXPORT_SYMBOL_GPL(kvm_has_noapic_vcpu);
11790 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
11792 struct kvm_pmu *pmu = vcpu_to_pmu(vcpu);
11794 vcpu->arch.l1tf_flush_l1d = true;
11795 if (pmu->version && unlikely(pmu->event_count)) {
11796 pmu->need_cleanup = true;
11797 kvm_make_request(KVM_REQ_PMU, vcpu);
11799 static_call(kvm_x86_sched_in)(vcpu, cpu);
11802 void kvm_arch_free_vm(struct kvm *kvm)
11804 kfree(to_kvm_hv(kvm)->hv_pa_pg);
11805 __kvm_arch_free_vm(kvm);
11809 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
11812 unsigned long flags;
11817 ret = kvm_page_track_init(kvm);
11821 ret = kvm_mmu_init_vm(kvm);
11823 goto out_page_track;
11825 INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
11826 INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
11827 atomic_set(&kvm->arch.noncoherent_dma_count, 0);
11829 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
11830 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
11831 /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
11832 set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
11833 &kvm->arch.irq_sources_bitmap);
11835 raw_spin_lock_init(&kvm->arch.tsc_write_lock);
11836 mutex_init(&kvm->arch.apic_map_lock);
11837 seqcount_raw_spinlock_init(&kvm->arch.pvclock_sc, &kvm->arch.tsc_write_lock);
11838 kvm->arch.kvmclock_offset = -get_kvmclock_base_ns();
11840 raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
11841 pvclock_update_vm_gtod_copy(kvm);
11842 raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
11844 kvm->arch.default_tsc_khz = max_tsc_khz ? : tsc_khz;
11845 kvm->arch.guest_can_read_msr_platform_info = true;
11846 kvm->arch.enable_pmu = enable_pmu;
11848 #if IS_ENABLED(CONFIG_HYPERV)
11849 spin_lock_init(&kvm->arch.hv_root_tdp_lock);
11850 kvm->arch.hv_root_tdp = INVALID_PAGE;
11853 INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
11854 INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
11856 kvm_apicv_init(kvm);
11857 kvm_hv_init_vm(kvm);
11858 kvm_xen_init_vm(kvm);
11860 return static_call(kvm_x86_vm_init)(kvm);
11863 kvm_page_track_cleanup(kvm);
11868 int kvm_arch_post_init_vm(struct kvm *kvm)
11870 return kvm_mmu_post_init_vm(kvm);
11873 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
11876 kvm_mmu_unload(vcpu);
11880 static void kvm_unload_vcpu_mmus(struct kvm *kvm)
11883 struct kvm_vcpu *vcpu;
11885 kvm_for_each_vcpu(i, vcpu, kvm) {
11886 kvm_clear_async_pf_completion_queue(vcpu);
11887 kvm_unload_vcpu_mmu(vcpu);
11891 void kvm_arch_sync_events(struct kvm *kvm)
11893 cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
11894 cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
11899 * __x86_set_memory_region: Setup KVM internal memory slot
11901 * @kvm: the kvm pointer to the VM.
11902 * @id: the slot ID to setup.
11903 * @gpa: the GPA to install the slot (unused when @size == 0).
11904 * @size: the size of the slot. Set to zero to uninstall a slot.
11906 * This function helps to setup a KVM internal memory slot. Specify
11907 * @size > 0 to install a new slot, while @size == 0 to uninstall a
11908 * slot. The return code can be one of the following:
11910 * HVA: on success (uninstall will return a bogus HVA)
11913 * The caller should always use IS_ERR() to check the return value
11914 * before use. Note, the KVM internal memory slots are guaranteed to
11915 * remain valid and unchanged until the VM is destroyed, i.e., the
11916 * GPA->HVA translation will not change. However, the HVA is a user
11917 * address, i.e. its accessibility is not guaranteed, and must be
11918 * accessed via __copy_{to,from}_user().
11920 void __user * __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa,
11924 unsigned long hva, old_npages;
11925 struct kvm_memslots *slots = kvm_memslots(kvm);
11926 struct kvm_memory_slot *slot;
11928 /* Called with kvm->slots_lock held. */
11929 if (WARN_ON(id >= KVM_MEM_SLOTS_NUM))
11930 return ERR_PTR_USR(-EINVAL);
11932 slot = id_to_memslot(slots, id);
11934 if (slot && slot->npages)
11935 return ERR_PTR_USR(-EEXIST);
11938 * MAP_SHARED to prevent internal slot pages from being moved
11941 hva = vm_mmap(NULL, 0, size, PROT_READ | PROT_WRITE,
11942 MAP_SHARED | MAP_ANONYMOUS, 0);
11943 if (IS_ERR((void *)hva))
11944 return (void __user *)hva;
11946 if (!slot || !slot->npages)
11949 old_npages = slot->npages;
11950 hva = slot->userspace_addr;
11953 for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
11954 struct kvm_userspace_memory_region m;
11956 m.slot = id | (i << 16);
11958 m.guest_phys_addr = gpa;
11959 m.userspace_addr = hva;
11960 m.memory_size = size;
11961 r = __kvm_set_memory_region(kvm, &m);
11963 return ERR_PTR_USR(r);
11967 vm_munmap(hva, old_npages * PAGE_SIZE);
11969 return (void __user *)hva;
11971 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
11973 void kvm_arch_pre_destroy_vm(struct kvm *kvm)
11975 kvm_mmu_pre_destroy_vm(kvm);
11978 void kvm_arch_destroy_vm(struct kvm *kvm)
11980 if (current->mm == kvm->mm) {
11982 * Free memory regions allocated on behalf of userspace,
11983 * unless the memory map has changed due to process exit
11986 mutex_lock(&kvm->slots_lock);
11987 __x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT,
11989 __x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT,
11991 __x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, 0, 0);
11992 mutex_unlock(&kvm->slots_lock);
11994 kvm_unload_vcpu_mmus(kvm);
11995 static_call_cond(kvm_x86_vm_destroy)(kvm);
11996 kvm_free_msr_filter(srcu_dereference_check(kvm->arch.msr_filter, &kvm->srcu, 1));
11997 kvm_pic_destroy(kvm);
11998 kvm_ioapic_destroy(kvm);
11999 kvm_destroy_vcpus(kvm);
12000 kvfree(rcu_dereference_check(kvm->arch.apic_map, 1));
12001 kfree(srcu_dereference_check(kvm->arch.pmu_event_filter, &kvm->srcu, 1));
12002 kvm_mmu_uninit_vm(kvm);
12003 kvm_page_track_cleanup(kvm);
12004 kvm_xen_destroy_vm(kvm);
12005 kvm_hv_destroy_vm(kvm);
12008 static void memslot_rmap_free(struct kvm_memory_slot *slot)
12012 for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
12013 kvfree(slot->arch.rmap[i]);
12014 slot->arch.rmap[i] = NULL;
12018 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *slot)
12022 memslot_rmap_free(slot);
12024 for (i = 1; i < KVM_NR_PAGE_SIZES; ++i) {
12025 kvfree(slot->arch.lpage_info[i - 1]);
12026 slot->arch.lpage_info[i - 1] = NULL;
12029 kvm_page_track_free_memslot(slot);
12032 int memslot_rmap_alloc(struct kvm_memory_slot *slot, unsigned long npages)
12034 const int sz = sizeof(*slot->arch.rmap[0]);
12037 for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
12039 int lpages = __kvm_mmu_slot_lpages(slot, npages, level);
12041 if (slot->arch.rmap[i])
12044 slot->arch.rmap[i] = __vcalloc(lpages, sz, GFP_KERNEL_ACCOUNT);
12045 if (!slot->arch.rmap[i]) {
12046 memslot_rmap_free(slot);
12054 static int kvm_alloc_memslot_metadata(struct kvm *kvm,
12055 struct kvm_memory_slot *slot)
12057 unsigned long npages = slot->npages;
12061 * Clear out the previous array pointers for the KVM_MR_MOVE case. The
12062 * old arrays will be freed by __kvm_set_memory_region() if installing
12063 * the new memslot is successful.
12065 memset(&slot->arch, 0, sizeof(slot->arch));
12067 if (kvm_memslots_have_rmaps(kvm)) {
12068 r = memslot_rmap_alloc(slot, npages);
12073 for (i = 1; i < KVM_NR_PAGE_SIZES; ++i) {
12074 struct kvm_lpage_info *linfo;
12075 unsigned long ugfn;
12079 lpages = __kvm_mmu_slot_lpages(slot, npages, level);
12081 linfo = __vcalloc(lpages, sizeof(*linfo), GFP_KERNEL_ACCOUNT);
12085 slot->arch.lpage_info[i - 1] = linfo;
12087 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
12088 linfo[0].disallow_lpage = 1;
12089 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
12090 linfo[lpages - 1].disallow_lpage = 1;
12091 ugfn = slot->userspace_addr >> PAGE_SHIFT;
12093 * If the gfn and userspace address are not aligned wrt each
12094 * other, disable large page support for this slot.
12096 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1)) {
12099 for (j = 0; j < lpages; ++j)
12100 linfo[j].disallow_lpage = 1;
12104 if (kvm_page_track_create_memslot(kvm, slot, npages))
12110 memslot_rmap_free(slot);
12112 for (i = 1; i < KVM_NR_PAGE_SIZES; ++i) {
12113 kvfree(slot->arch.lpage_info[i - 1]);
12114 slot->arch.lpage_info[i - 1] = NULL;
12119 void kvm_arch_memslots_updated(struct kvm *kvm, u64 gen)
12121 struct kvm_vcpu *vcpu;
12125 * memslots->generation has been incremented.
12126 * mmio generation may have reached its maximum value.
12128 kvm_mmu_invalidate_mmio_sptes(kvm, gen);
12130 /* Force re-initialization of steal_time cache */
12131 kvm_for_each_vcpu(i, vcpu, kvm)
12132 kvm_vcpu_kick(vcpu);
12135 int kvm_arch_prepare_memory_region(struct kvm *kvm,
12136 const struct kvm_memory_slot *old,
12137 struct kvm_memory_slot *new,
12138 enum kvm_mr_change change)
12140 if (change == KVM_MR_CREATE || change == KVM_MR_MOVE) {
12141 if ((new->base_gfn + new->npages - 1) > kvm_mmu_max_gfn())
12144 return kvm_alloc_memslot_metadata(kvm, new);
12147 if (change == KVM_MR_FLAGS_ONLY)
12148 memcpy(&new->arch, &old->arch, sizeof(old->arch));
12149 else if (WARN_ON_ONCE(change != KVM_MR_DELETE))
12156 static void kvm_mmu_update_cpu_dirty_logging(struct kvm *kvm, bool enable)
12158 struct kvm_arch *ka = &kvm->arch;
12160 if (!kvm_x86_ops.cpu_dirty_log_size)
12163 if ((enable && ++ka->cpu_dirty_logging_count == 1) ||
12164 (!enable && --ka->cpu_dirty_logging_count == 0))
12165 kvm_make_all_cpus_request(kvm, KVM_REQ_UPDATE_CPU_DIRTY_LOGGING);
12167 WARN_ON_ONCE(ka->cpu_dirty_logging_count < 0);
12170 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
12171 struct kvm_memory_slot *old,
12172 const struct kvm_memory_slot *new,
12173 enum kvm_mr_change change)
12175 u32 old_flags = old ? old->flags : 0;
12176 u32 new_flags = new ? new->flags : 0;
12177 bool log_dirty_pages = new_flags & KVM_MEM_LOG_DIRTY_PAGES;
12180 * Update CPU dirty logging if dirty logging is being toggled. This
12181 * applies to all operations.
12183 if ((old_flags ^ new_flags) & KVM_MEM_LOG_DIRTY_PAGES)
12184 kvm_mmu_update_cpu_dirty_logging(kvm, log_dirty_pages);
12187 * Nothing more to do for RO slots (which can't be dirtied and can't be
12188 * made writable) or CREATE/MOVE/DELETE of a slot.
12190 * For a memslot with dirty logging disabled:
12191 * CREATE: No dirty mappings will already exist.
12192 * MOVE/DELETE: The old mappings will already have been cleaned up by
12193 * kvm_arch_flush_shadow_memslot()
12195 * For a memslot with dirty logging enabled:
12196 * CREATE: No shadow pages exist, thus nothing to write-protect
12197 * and no dirty bits to clear.
12198 * MOVE/DELETE: The old mappings will already have been cleaned up by
12199 * kvm_arch_flush_shadow_memslot().
12201 if ((change != KVM_MR_FLAGS_ONLY) || (new_flags & KVM_MEM_READONLY))
12205 * READONLY and non-flags changes were filtered out above, and the only
12206 * other flag is LOG_DIRTY_PAGES, i.e. something is wrong if dirty
12207 * logging isn't being toggled on or off.
12209 if (WARN_ON_ONCE(!((old_flags ^ new_flags) & KVM_MEM_LOG_DIRTY_PAGES)))
12212 if (!log_dirty_pages) {
12214 * Dirty logging tracks sptes in 4k granularity, meaning that
12215 * large sptes have to be split. If live migration succeeds,
12216 * the guest in the source machine will be destroyed and large
12217 * sptes will be created in the destination. However, if the
12218 * guest continues to run in the source machine (for example if
12219 * live migration fails), small sptes will remain around and
12220 * cause bad performance.
12222 * Scan sptes if dirty logging has been stopped, dropping those
12223 * which can be collapsed into a single large-page spte. Later
12224 * page faults will create the large-page sptes.
12226 kvm_mmu_zap_collapsible_sptes(kvm, new);
12229 * Initially-all-set does not require write protecting any page,
12230 * because they're all assumed to be dirty.
12232 if (kvm_dirty_log_manual_protect_and_init_set(kvm))
12235 if (READ_ONCE(eager_page_split))
12236 kvm_mmu_slot_try_split_huge_pages(kvm, new, PG_LEVEL_4K);
12238 if (kvm_x86_ops.cpu_dirty_log_size) {
12239 kvm_mmu_slot_leaf_clear_dirty(kvm, new);
12240 kvm_mmu_slot_remove_write_access(kvm, new, PG_LEVEL_2M);
12242 kvm_mmu_slot_remove_write_access(kvm, new, PG_LEVEL_4K);
12247 void kvm_arch_commit_memory_region(struct kvm *kvm,
12248 struct kvm_memory_slot *old,
12249 const struct kvm_memory_slot *new,
12250 enum kvm_mr_change change)
12252 if (!kvm->arch.n_requested_mmu_pages &&
12253 (change == KVM_MR_CREATE || change == KVM_MR_DELETE)) {
12254 unsigned long nr_mmu_pages;
12256 nr_mmu_pages = kvm->nr_memslot_pages / KVM_MEMSLOT_PAGES_TO_MMU_PAGES_RATIO;
12257 nr_mmu_pages = max(nr_mmu_pages, KVM_MIN_ALLOC_MMU_PAGES);
12258 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
12261 kvm_mmu_slot_apply_flags(kvm, old, new, change);
12263 /* Free the arrays associated with the old memslot. */
12264 if (change == KVM_MR_MOVE)
12265 kvm_arch_free_memslot(kvm, old);
12268 void kvm_arch_flush_shadow_all(struct kvm *kvm)
12270 kvm_mmu_zap_all(kvm);
12273 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
12274 struct kvm_memory_slot *slot)
12276 kvm_page_track_flush_slot(kvm, slot);
12279 static inline bool kvm_guest_apic_has_interrupt(struct kvm_vcpu *vcpu)
12281 return (is_guest_mode(vcpu) &&
12282 static_call(kvm_x86_guest_apic_has_interrupt)(vcpu));
12285 static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
12287 if (!list_empty_careful(&vcpu->async_pf.done))
12290 if (kvm_apic_has_events(vcpu))
12293 if (vcpu->arch.pv.pv_unhalted)
12296 if (vcpu->arch.exception.pending)
12299 if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
12300 (vcpu->arch.nmi_pending &&
12301 static_call(kvm_x86_nmi_allowed)(vcpu, false)))
12304 if (kvm_test_request(KVM_REQ_SMI, vcpu) ||
12305 (vcpu->arch.smi_pending &&
12306 static_call(kvm_x86_smi_allowed)(vcpu, false)))
12309 if (kvm_arch_interrupt_allowed(vcpu) &&
12310 (kvm_cpu_has_interrupt(vcpu) ||
12311 kvm_guest_apic_has_interrupt(vcpu)))
12314 if (kvm_hv_has_stimer_pending(vcpu))
12317 if (is_guest_mode(vcpu) &&
12318 kvm_x86_ops.nested_ops->hv_timer_pending &&
12319 kvm_x86_ops.nested_ops->hv_timer_pending(vcpu))
12322 if (kvm_xen_has_pending_events(vcpu))
12325 if (kvm_test_request(KVM_REQ_TRIPLE_FAULT, vcpu))
12331 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
12333 return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu);
12336 bool kvm_arch_dy_has_pending_interrupt(struct kvm_vcpu *vcpu)
12338 if (vcpu->arch.apicv_active && static_call(kvm_x86_dy_apicv_has_pending_interrupt)(vcpu))
12344 bool kvm_arch_dy_runnable(struct kvm_vcpu *vcpu)
12346 if (READ_ONCE(vcpu->arch.pv.pv_unhalted))
12349 if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
12350 kvm_test_request(KVM_REQ_SMI, vcpu) ||
12351 kvm_test_request(KVM_REQ_EVENT, vcpu))
12354 return kvm_arch_dy_has_pending_interrupt(vcpu);
12357 bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu *vcpu)
12359 if (vcpu->arch.guest_state_protected)
12362 return vcpu->arch.preempted_in_kernel;
12365 unsigned long kvm_arch_vcpu_get_ip(struct kvm_vcpu *vcpu)
12367 return kvm_rip_read(vcpu);
12370 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
12372 return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
12375 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
12377 return static_call(kvm_x86_interrupt_allowed)(vcpu, false);
12380 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
12382 /* Can't read the RIP when guest state is protected, just return 0 */
12383 if (vcpu->arch.guest_state_protected)
12386 if (is_64_bit_mode(vcpu))
12387 return kvm_rip_read(vcpu);
12388 return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
12389 kvm_rip_read(vcpu));
12391 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
12393 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
12395 return kvm_get_linear_rip(vcpu) == linear_rip;
12397 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
12399 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
12401 unsigned long rflags;
12403 rflags = static_call(kvm_x86_get_rflags)(vcpu);
12404 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
12405 rflags &= ~X86_EFLAGS_TF;
12408 EXPORT_SYMBOL_GPL(kvm_get_rflags);
12410 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
12412 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
12413 kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
12414 rflags |= X86_EFLAGS_TF;
12415 static_call(kvm_x86_set_rflags)(vcpu, rflags);
12418 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
12420 __kvm_set_rflags(vcpu, rflags);
12421 kvm_make_request(KVM_REQ_EVENT, vcpu);
12423 EXPORT_SYMBOL_GPL(kvm_set_rflags);
12425 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
12427 BUILD_BUG_ON(!is_power_of_2(ASYNC_PF_PER_VCPU));
12429 return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
12432 static inline u32 kvm_async_pf_next_probe(u32 key)
12434 return (key + 1) & (ASYNC_PF_PER_VCPU - 1);
12437 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
12439 u32 key = kvm_async_pf_hash_fn(gfn);
12441 while (vcpu->arch.apf.gfns[key] != ~0)
12442 key = kvm_async_pf_next_probe(key);
12444 vcpu->arch.apf.gfns[key] = gfn;
12447 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
12450 u32 key = kvm_async_pf_hash_fn(gfn);
12452 for (i = 0; i < ASYNC_PF_PER_VCPU &&
12453 (vcpu->arch.apf.gfns[key] != gfn &&
12454 vcpu->arch.apf.gfns[key] != ~0); i++)
12455 key = kvm_async_pf_next_probe(key);
12460 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
12462 return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
12465 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
12469 i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
12471 if (WARN_ON_ONCE(vcpu->arch.apf.gfns[i] != gfn))
12475 vcpu->arch.apf.gfns[i] = ~0;
12477 j = kvm_async_pf_next_probe(j);
12478 if (vcpu->arch.apf.gfns[j] == ~0)
12480 k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
12482 * k lies cyclically in ]i,j]
12484 * |....j i.k.| or |.k..j i...|
12486 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
12487 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
12492 static inline int apf_put_user_notpresent(struct kvm_vcpu *vcpu)
12494 u32 reason = KVM_PV_REASON_PAGE_NOT_PRESENT;
12496 return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &reason,
12500 static inline int apf_put_user_ready(struct kvm_vcpu *vcpu, u32 token)
12502 unsigned int offset = offsetof(struct kvm_vcpu_pv_apf_data, token);
12504 return kvm_write_guest_offset_cached(vcpu->kvm, &vcpu->arch.apf.data,
12505 &token, offset, sizeof(token));
12508 static inline bool apf_pageready_slot_free(struct kvm_vcpu *vcpu)
12510 unsigned int offset = offsetof(struct kvm_vcpu_pv_apf_data, token);
12513 if (kvm_read_guest_offset_cached(vcpu->kvm, &vcpu->arch.apf.data,
12514 &val, offset, sizeof(val)))
12520 static bool kvm_can_deliver_async_pf(struct kvm_vcpu *vcpu)
12523 if (!kvm_pv_async_pf_enabled(vcpu))
12526 if (vcpu->arch.apf.send_user_only &&
12527 static_call(kvm_x86_get_cpl)(vcpu) == 0)
12530 if (is_guest_mode(vcpu)) {
12532 * L1 needs to opt into the special #PF vmexits that are
12533 * used to deliver async page faults.
12535 return vcpu->arch.apf.delivery_as_pf_vmexit;
12538 * Play it safe in case the guest temporarily disables paging.
12539 * The real mode IDT in particular is unlikely to have a #PF
12542 return is_paging(vcpu);
12546 bool kvm_can_do_async_pf(struct kvm_vcpu *vcpu)
12548 if (unlikely(!lapic_in_kernel(vcpu) ||
12549 kvm_event_needs_reinjection(vcpu) ||
12550 vcpu->arch.exception.pending))
12553 if (kvm_hlt_in_guest(vcpu->kvm) && !kvm_can_deliver_async_pf(vcpu))
12557 * If interrupts are off we cannot even use an artificial
12560 return kvm_arch_interrupt_allowed(vcpu);
12563 bool kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
12564 struct kvm_async_pf *work)
12566 struct x86_exception fault;
12568 trace_kvm_async_pf_not_present(work->arch.token, work->cr2_or_gpa);
12569 kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
12571 if (kvm_can_deliver_async_pf(vcpu) &&
12572 !apf_put_user_notpresent(vcpu)) {
12573 fault.vector = PF_VECTOR;
12574 fault.error_code_valid = true;
12575 fault.error_code = 0;
12576 fault.nested_page_fault = false;
12577 fault.address = work->arch.token;
12578 fault.async_page_fault = true;
12579 kvm_inject_page_fault(vcpu, &fault);
12583 * It is not possible to deliver a paravirtualized asynchronous
12584 * page fault, but putting the guest in an artificial halt state
12585 * can be beneficial nevertheless: if an interrupt arrives, we
12586 * can deliver it timely and perhaps the guest will schedule
12587 * another process. When the instruction that triggered a page
12588 * fault is retried, hopefully the page will be ready in the host.
12590 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
12595 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
12596 struct kvm_async_pf *work)
12598 struct kvm_lapic_irq irq = {
12599 .delivery_mode = APIC_DM_FIXED,
12600 .vector = vcpu->arch.apf.vec
12603 if (work->wakeup_all)
12604 work->arch.token = ~0; /* broadcast wakeup */
12606 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
12607 trace_kvm_async_pf_ready(work->arch.token, work->cr2_or_gpa);
12609 if ((work->wakeup_all || work->notpresent_injected) &&
12610 kvm_pv_async_pf_enabled(vcpu) &&
12611 !apf_put_user_ready(vcpu, work->arch.token)) {
12612 vcpu->arch.apf.pageready_pending = true;
12613 kvm_apic_set_irq(vcpu, &irq, NULL);
12616 vcpu->arch.apf.halted = false;
12617 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
12620 void kvm_arch_async_page_present_queued(struct kvm_vcpu *vcpu)
12622 kvm_make_request(KVM_REQ_APF_READY, vcpu);
12623 if (!vcpu->arch.apf.pageready_pending)
12624 kvm_vcpu_kick(vcpu);
12627 bool kvm_arch_can_dequeue_async_page_present(struct kvm_vcpu *vcpu)
12629 if (!kvm_pv_async_pf_enabled(vcpu))
12632 return kvm_lapic_enabled(vcpu) && apf_pageready_slot_free(vcpu);
12635 void kvm_arch_start_assignment(struct kvm *kvm)
12637 if (atomic_inc_return(&kvm->arch.assigned_device_count) == 1)
12638 static_call_cond(kvm_x86_pi_start_assignment)(kvm);
12640 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
12642 void kvm_arch_end_assignment(struct kvm *kvm)
12644 atomic_dec(&kvm->arch.assigned_device_count);
12646 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
12648 bool kvm_arch_has_assigned_device(struct kvm *kvm)
12650 return atomic_read(&kvm->arch.assigned_device_count);
12652 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
12654 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
12656 atomic_inc(&kvm->arch.noncoherent_dma_count);
12658 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
12660 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
12662 atomic_dec(&kvm->arch.noncoherent_dma_count);
12664 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
12666 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
12668 return atomic_read(&kvm->arch.noncoherent_dma_count);
12670 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
12672 bool kvm_arch_has_irq_bypass(void)
12677 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
12678 struct irq_bypass_producer *prod)
12680 struct kvm_kernel_irqfd *irqfd =
12681 container_of(cons, struct kvm_kernel_irqfd, consumer);
12684 irqfd->producer = prod;
12685 kvm_arch_start_assignment(irqfd->kvm);
12686 ret = static_call(kvm_x86_pi_update_irte)(irqfd->kvm,
12687 prod->irq, irqfd->gsi, 1);
12690 kvm_arch_end_assignment(irqfd->kvm);
12695 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
12696 struct irq_bypass_producer *prod)
12699 struct kvm_kernel_irqfd *irqfd =
12700 container_of(cons, struct kvm_kernel_irqfd, consumer);
12702 WARN_ON(irqfd->producer != prod);
12703 irqfd->producer = NULL;
12706 * When producer of consumer is unregistered, we change back to
12707 * remapped mode, so we can re-use the current implementation
12708 * when the irq is masked/disabled or the consumer side (KVM
12709 * int this case doesn't want to receive the interrupts.
12711 ret = static_call(kvm_x86_pi_update_irte)(irqfd->kvm, prod->irq, irqfd->gsi, 0);
12713 printk(KERN_INFO "irq bypass consumer (token %p) unregistration"
12714 " fails: %d\n", irqfd->consumer.token, ret);
12716 kvm_arch_end_assignment(irqfd->kvm);
12719 int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
12720 uint32_t guest_irq, bool set)
12722 return static_call(kvm_x86_pi_update_irte)(kvm, host_irq, guest_irq, set);
12725 bool kvm_arch_irqfd_route_changed(struct kvm_kernel_irq_routing_entry *old,
12726 struct kvm_kernel_irq_routing_entry *new)
12728 if (new->type != KVM_IRQ_ROUTING_MSI)
12731 return !!memcmp(&old->msi, &new->msi, sizeof(new->msi));
12734 bool kvm_vector_hashing_enabled(void)
12736 return vector_hashing;
12739 bool kvm_arch_no_poll(struct kvm_vcpu *vcpu)
12741 return (vcpu->arch.msr_kvm_poll_control & 1) == 0;
12743 EXPORT_SYMBOL_GPL(kvm_arch_no_poll);
12746 int kvm_spec_ctrl_test_value(u64 value)
12749 * test that setting IA32_SPEC_CTRL to given value
12750 * is allowed by the host processor
12754 unsigned long flags;
12757 local_irq_save(flags);
12759 if (rdmsrl_safe(MSR_IA32_SPEC_CTRL, &saved_value))
12761 else if (wrmsrl_safe(MSR_IA32_SPEC_CTRL, value))
12764 wrmsrl(MSR_IA32_SPEC_CTRL, saved_value);
12766 local_irq_restore(flags);
12770 EXPORT_SYMBOL_GPL(kvm_spec_ctrl_test_value);
12772 void kvm_fixup_and_inject_pf_error(struct kvm_vcpu *vcpu, gva_t gva, u16 error_code)
12774 struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
12775 struct x86_exception fault;
12776 u64 access = error_code &
12777 (PFERR_WRITE_MASK | PFERR_FETCH_MASK | PFERR_USER_MASK);
12779 if (!(error_code & PFERR_PRESENT_MASK) ||
12780 mmu->gva_to_gpa(vcpu, mmu, gva, access, &fault) != UNMAPPED_GVA) {
12782 * If vcpu->arch.walk_mmu->gva_to_gpa succeeded, the page
12783 * tables probably do not match the TLB. Just proceed
12784 * with the error code that the processor gave.
12786 fault.vector = PF_VECTOR;
12787 fault.error_code_valid = true;
12788 fault.error_code = error_code;
12789 fault.nested_page_fault = false;
12790 fault.address = gva;
12792 vcpu->arch.walk_mmu->inject_page_fault(vcpu, &fault);
12794 EXPORT_SYMBOL_GPL(kvm_fixup_and_inject_pf_error);
12797 * Handles kvm_read/write_guest_virt*() result and either injects #PF or returns
12798 * KVM_EXIT_INTERNAL_ERROR for cases not currently handled by KVM. Return value
12799 * indicates whether exit to userspace is needed.
12801 int kvm_handle_memory_failure(struct kvm_vcpu *vcpu, int r,
12802 struct x86_exception *e)
12804 if (r == X86EMUL_PROPAGATE_FAULT) {
12805 kvm_inject_emulated_page_fault(vcpu, e);
12810 * In case kvm_read/write_guest_virt*() failed with X86EMUL_IO_NEEDED
12811 * while handling a VMX instruction KVM could've handled the request
12812 * correctly by exiting to userspace and performing I/O but there
12813 * doesn't seem to be a real use-case behind such requests, just return
12814 * KVM_EXIT_INTERNAL_ERROR for now.
12816 kvm_prepare_emulation_failure_exit(vcpu);
12820 EXPORT_SYMBOL_GPL(kvm_handle_memory_failure);
12822 int kvm_handle_invpcid(struct kvm_vcpu *vcpu, unsigned long type, gva_t gva)
12825 struct x86_exception e;
12832 r = kvm_read_guest_virt(vcpu, gva, &operand, sizeof(operand), &e);
12833 if (r != X86EMUL_CONTINUE)
12834 return kvm_handle_memory_failure(vcpu, r, &e);
12836 if (operand.pcid >> 12 != 0) {
12837 kvm_inject_gp(vcpu, 0);
12841 pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
12844 case INVPCID_TYPE_INDIV_ADDR:
12845 if ((!pcid_enabled && (operand.pcid != 0)) ||
12846 is_noncanonical_address(operand.gla, vcpu)) {
12847 kvm_inject_gp(vcpu, 0);
12850 kvm_mmu_invpcid_gva(vcpu, operand.gla, operand.pcid);
12851 return kvm_skip_emulated_instruction(vcpu);
12853 case INVPCID_TYPE_SINGLE_CTXT:
12854 if (!pcid_enabled && (operand.pcid != 0)) {
12855 kvm_inject_gp(vcpu, 0);
12859 kvm_invalidate_pcid(vcpu, operand.pcid);
12860 return kvm_skip_emulated_instruction(vcpu);
12862 case INVPCID_TYPE_ALL_NON_GLOBAL:
12864 * Currently, KVM doesn't mark global entries in the shadow
12865 * page tables, so a non-global flush just degenerates to a
12866 * global flush. If needed, we could optimize this later by
12867 * keeping track of global entries in shadow page tables.
12871 case INVPCID_TYPE_ALL_INCL_GLOBAL:
12872 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu);
12873 return kvm_skip_emulated_instruction(vcpu);
12876 kvm_inject_gp(vcpu, 0);
12880 EXPORT_SYMBOL_GPL(kvm_handle_invpcid);
12882 static int complete_sev_es_emulated_mmio(struct kvm_vcpu *vcpu)
12884 struct kvm_run *run = vcpu->run;
12885 struct kvm_mmio_fragment *frag;
12888 BUG_ON(!vcpu->mmio_needed);
12890 /* Complete previous fragment */
12891 frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
12892 len = min(8u, frag->len);
12893 if (!vcpu->mmio_is_write)
12894 memcpy(frag->data, run->mmio.data, len);
12896 if (frag->len <= 8) {
12897 /* Switch to the next fragment. */
12899 vcpu->mmio_cur_fragment++;
12901 /* Go forward to the next mmio piece. */
12907 if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
12908 vcpu->mmio_needed = 0;
12910 // VMG change, at this point, we're always done
12911 // RIP has already been advanced
12915 // More MMIO is needed
12916 run->mmio.phys_addr = frag->gpa;
12917 run->mmio.len = min(8u, frag->len);
12918 run->mmio.is_write = vcpu->mmio_is_write;
12919 if (run->mmio.is_write)
12920 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
12921 run->exit_reason = KVM_EXIT_MMIO;
12923 vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
12928 int kvm_sev_es_mmio_write(struct kvm_vcpu *vcpu, gpa_t gpa, unsigned int bytes,
12932 struct kvm_mmio_fragment *frag;
12937 handled = write_emultor.read_write_mmio(vcpu, gpa, bytes, data);
12938 if (handled == bytes)
12945 /*TODO: Check if need to increment number of frags */
12946 frag = vcpu->mmio_fragments;
12947 vcpu->mmio_nr_fragments = 1;
12952 vcpu->mmio_needed = 1;
12953 vcpu->mmio_cur_fragment = 0;
12955 vcpu->run->mmio.phys_addr = gpa;
12956 vcpu->run->mmio.len = min(8u, frag->len);
12957 vcpu->run->mmio.is_write = 1;
12958 memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
12959 vcpu->run->exit_reason = KVM_EXIT_MMIO;
12961 vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
12965 EXPORT_SYMBOL_GPL(kvm_sev_es_mmio_write);
12967 int kvm_sev_es_mmio_read(struct kvm_vcpu *vcpu, gpa_t gpa, unsigned int bytes,
12971 struct kvm_mmio_fragment *frag;
12976 handled = read_emultor.read_write_mmio(vcpu, gpa, bytes, data);
12977 if (handled == bytes)
12984 /*TODO: Check if need to increment number of frags */
12985 frag = vcpu->mmio_fragments;
12986 vcpu->mmio_nr_fragments = 1;
12991 vcpu->mmio_needed = 1;
12992 vcpu->mmio_cur_fragment = 0;
12994 vcpu->run->mmio.phys_addr = gpa;
12995 vcpu->run->mmio.len = min(8u, frag->len);
12996 vcpu->run->mmio.is_write = 0;
12997 vcpu->run->exit_reason = KVM_EXIT_MMIO;
12999 vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
13003 EXPORT_SYMBOL_GPL(kvm_sev_es_mmio_read);
13005 static int kvm_sev_es_outs(struct kvm_vcpu *vcpu, unsigned int size,
13006 unsigned int port);
13008 static int complete_sev_es_emulated_outs(struct kvm_vcpu *vcpu)
13010 int size = vcpu->arch.pio.size;
13011 int port = vcpu->arch.pio.port;
13013 vcpu->arch.pio.count = 0;
13014 if (vcpu->arch.sev_pio_count)
13015 return kvm_sev_es_outs(vcpu, size, port);
13019 static int kvm_sev_es_outs(struct kvm_vcpu *vcpu, unsigned int size,
13023 unsigned int count =
13024 min_t(unsigned int, PAGE_SIZE / size, vcpu->arch.sev_pio_count);
13025 int ret = emulator_pio_out(vcpu, size, port, vcpu->arch.sev_pio_data, count);
13027 /* memcpy done already by emulator_pio_out. */
13028 vcpu->arch.sev_pio_count -= count;
13029 vcpu->arch.sev_pio_data += count * vcpu->arch.pio.size;
13033 /* Emulation done by the kernel. */
13034 if (!vcpu->arch.sev_pio_count)
13038 vcpu->arch.complete_userspace_io = complete_sev_es_emulated_outs;
13042 static int kvm_sev_es_ins(struct kvm_vcpu *vcpu, unsigned int size,
13043 unsigned int port);
13045 static void advance_sev_es_emulated_ins(struct kvm_vcpu *vcpu)
13047 unsigned count = vcpu->arch.pio.count;
13048 complete_emulator_pio_in(vcpu, vcpu->arch.sev_pio_data);
13049 vcpu->arch.sev_pio_count -= count;
13050 vcpu->arch.sev_pio_data += count * vcpu->arch.pio.size;
13053 static int complete_sev_es_emulated_ins(struct kvm_vcpu *vcpu)
13055 int size = vcpu->arch.pio.size;
13056 int port = vcpu->arch.pio.port;
13058 advance_sev_es_emulated_ins(vcpu);
13059 if (vcpu->arch.sev_pio_count)
13060 return kvm_sev_es_ins(vcpu, size, port);
13064 static int kvm_sev_es_ins(struct kvm_vcpu *vcpu, unsigned int size,
13068 unsigned int count =
13069 min_t(unsigned int, PAGE_SIZE / size, vcpu->arch.sev_pio_count);
13070 if (!__emulator_pio_in(vcpu, size, port, count))
13073 /* Emulation done by the kernel. */
13074 advance_sev_es_emulated_ins(vcpu);
13075 if (!vcpu->arch.sev_pio_count)
13079 vcpu->arch.complete_userspace_io = complete_sev_es_emulated_ins;
13083 int kvm_sev_es_string_io(struct kvm_vcpu *vcpu, unsigned int size,
13084 unsigned int port, void *data, unsigned int count,
13087 vcpu->arch.sev_pio_data = data;
13088 vcpu->arch.sev_pio_count = count;
13089 return in ? kvm_sev_es_ins(vcpu, size, port)
13090 : kvm_sev_es_outs(vcpu, size, port);
13092 EXPORT_SYMBOL_GPL(kvm_sev_es_string_io);
13094 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_entry);
13095 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
13096 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
13097 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
13098 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
13099 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
13100 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
13101 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
13102 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
13103 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
13104 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
13105 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmenter_failed);
13106 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
13107 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
13108 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
13109 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
13110 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window_update);
13111 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);
13112 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update);
13113 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access);
13114 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi);
13115 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_ga_log);
13116 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_kick_vcpu_slowpath);
13117 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_apicv_accept_irq);
13118 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_enter);
13119 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_exit);
13120 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_msr_protocol_enter);
13121 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_msr_protocol_exit);
13123 static int __init kvm_x86_init(void)
13125 kvm_mmu_x86_module_init();
13128 module_init(kvm_x86_init);
13130 static void __exit kvm_x86_exit(void)
13133 * If module_init() is implemented, module_exit() must also be
13134 * implemented to allow module unload.
13137 module_exit(kvm_x86_exit);