arch/x86/kvm/x86.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Kernel-based Virtual Machine driver for Linux
   4  *
   5  * derived from drivers/kvm/kvm_main.c
   6  *
   7  * Copyright (C) 2006 Qumranet, Inc.
   8  * Copyright (C) 2008 Qumranet, Inc.
   9  * Copyright IBM Corporation, 2008
  10  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  11  *
  12  * Authors:
  13  *   Avi Kivity   <avi@qumranet.com>
  14  *   Yaniv Kamay  <yaniv@qumranet.com>
  15  *   Amit Shah    <amit.shah@qumranet.com>
  16  *   Ben-Ami Yassour <benami@il.ibm.com>
  17  */
  18
  19 #include <linux/kvm_host.h>
  20 #include "irq.h"
  21 #include "ioapic.h"
  22 #include "mmu.h"
  23 #include "i8254.h"
  24 #include "tss.h"
  25 #include "kvm_cache_regs.h"
  26 #include "kvm_emulate.h"
  27 #include "x86.h"
  28 #include "cpuid.h"
  29 #include "pmu.h"
  30 #include "hyperv.h"
  31 #include "lapic.h"
  32 #include "xen.h"
  33
  34 #include <linux/clocksource.h>
  35 #include <linux/interrupt.h>
  36 #include <linux/kvm.h>
  37 #include <linux/fs.h>
  38 #include <linux/vmalloc.h>
  39 #include <linux/export.h>
  40 #include <linux/moduleparam.h>
  41 #include <linux/mman.h>
  42 #include <linux/highmem.h>
  43 #include <linux/iommu.h>
  44 #include <linux/intel-iommu.h>
  45 #include <linux/cpufreq.h>
  46 #include <linux/user-return-notifier.h>
  47 #include <linux/srcu.h>
  48 #include <linux/slab.h>
  49 #include <linux/perf_event.h>
  50 #include <linux/uaccess.h>
  51 #include <linux/hash.h>
  52 #include <linux/pci.h>
  53 #include <linux/timekeeper_internal.h>
  54 #include <linux/pvclock_gtod.h>
  55 #include <linux/kvm_irqfd.h>
  56 #include <linux/irqbypass.h>
  57 #include <linux/sched/stat.h>
  58 #include <linux/sched/isolation.h>
  59 #include <linux/mem_encrypt.h>
  60 #include <linux/entry-kvm.h>
  61 #include <linux/suspend.h>
  62
  63 #include <trace/events/kvm.h>
  64
  65 #include <asm/debugreg.h>
  66 #include <asm/msr.h>
  67 #include <asm/desc.h>
  68 #include <asm/mce.h>
  69 #include <asm/pkru.h>
  70 #include <linux/kernel_stat.h>
  71 #include <asm/fpu/api.h>
  72 #include <asm/fpu/xcr.h>
  73 #include <asm/fpu/xstate.h>
  74 #include <asm/pvclock.h>
  75 #include <asm/div64.h>
  76 #include <asm/irq_remapping.h>
  77 #include <asm/mshyperv.h>
  78 #include <asm/hypervisor.h>
  79 #include <asm/tlbflush.h>
  80 #include <asm/intel_pt.h>
  81 #include <asm/emulate_prefix.h>
  82 #include <asm/sgx.h>
  83 #include <clocksource/hyperv_timer.h>
  84
  85 #define CREATE_TRACE_POINTS
  86 #include "trace.h"
  87
  88 #define MAX_IO_MSRS 256
  89 #define KVM_MAX_MCE_BANKS 32
  90 u64 __read_mostly kvm_mce_cap_supported = MCG_CTL_P | MCG_SER_P;
  91 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported);
  92
  93 #define  ERR_PTR_USR(e)  ((void __user *)ERR_PTR(e))
  94
  95 #define emul_to_vcpu(ctxt) \
  96         ((struct kvm_vcpu *)(ctxt)->vcpu)
  97
  98 /* EFER defaults:
  99  * - enable syscall per default because its emulated by KVM
 100  * - enable LME and LMA per default on 64 bit KVM
 101  */
 102 #ifdef CONFIG_X86_64
 103 static
 104 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
 105 #else
 106 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
 107 #endif
 108
 109 static u64 __read_mostly cr4_reserved_bits = CR4_RESERVED_BITS;
 110
 111 #define KVM_EXIT_HYPERCALL_VALID_MASK (1 << KVM_HC_MAP_GPA_RANGE)
 112
 113 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
 114                                     KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
 115
 116 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
 117 static void process_nmi(struct kvm_vcpu *vcpu);
 118 static void process_smi(struct kvm_vcpu *vcpu);
 119 static void enter_smm(struct kvm_vcpu *vcpu);
 120 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
 121 static void store_regs(struct kvm_vcpu *vcpu);
 122 static int sync_regs(struct kvm_vcpu *vcpu);
 123 static int kvm_vcpu_do_singlestep(struct kvm_vcpu *vcpu);
 124
 125 static int __set_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2);
 126 static void __get_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2);
 127
 128 struct kvm_x86_ops kvm_x86_ops __read_mostly;
 129 EXPORT_SYMBOL_GPL(kvm_x86_ops);
 130
 131 #define KVM_X86_OP(func)                                             \
 132         DEFINE_STATIC_CALL_NULL(kvm_x86_##func,                      \
 133                                 *(((struct kvm_x86_ops *)0)->func));
 134 #define KVM_X86_OP_NULL KVM_X86_OP
 135 #include <asm/kvm-x86-ops.h>
 136 EXPORT_STATIC_CALL_GPL(kvm_x86_get_cs_db_l_bits);
 137 EXPORT_STATIC_CALL_GPL(kvm_x86_cache_reg);
 138 EXPORT_STATIC_CALL_GPL(kvm_x86_tlb_flush_current);
 139
 140 static bool __read_mostly ignore_msrs = 0;
 141 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
 142
 143 bool __read_mostly report_ignored_msrs = true;
 144 module_param(report_ignored_msrs, bool, S_IRUGO | S_IWUSR);
 145 EXPORT_SYMBOL_GPL(report_ignored_msrs);
 146
 147 unsigned int min_timer_period_us = 200;
 148 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
 149
 150 static bool __read_mostly kvmclock_periodic_sync = true;
 151 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
 152
 153 bool __read_mostly kvm_has_tsc_control;
 154 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
 155 u32  __read_mostly kvm_max_guest_tsc_khz;
 156 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 157 u8   __read_mostly kvm_tsc_scaling_ratio_frac_bits;
 158 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits);
 159 u64  __read_mostly kvm_max_tsc_scaling_ratio;
 160 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio);
 161 u64 __read_mostly kvm_default_tsc_scaling_ratio;
 162 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio);
 163 bool __read_mostly kvm_has_bus_lock_exit;
 164 EXPORT_SYMBOL_GPL(kvm_has_bus_lock_exit);
 165
 166 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 167 static u32 __read_mostly tsc_tolerance_ppm = 250;
 168 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 169
 170 /*
 171  * lapic timer advance (tscdeadline mode only) in nanoseconds.  '-1' enables
 172  * adaptive tuning starting from default advancement of 1000ns.  '0' disables
 173  * advancement entirely.  Any other value is used as-is and disables adaptive
 174  * tuning, i.e. allows privileged userspace to set an exact advancement time.
 175  */
 176 static int __read_mostly lapic_timer_advance_ns = -1;
 177 module_param(lapic_timer_advance_ns, int, S_IRUGO | S_IWUSR);
 178
 179 static bool __read_mostly vector_hashing = true;
 180 module_param(vector_hashing, bool, S_IRUGO);
 181
 182 bool __read_mostly enable_vmware_backdoor = false;
 183 module_param(enable_vmware_backdoor, bool, S_IRUGO);
 184 EXPORT_SYMBOL_GPL(enable_vmware_backdoor);
 185
 186 static bool __read_mostly force_emulation_prefix = false;
 187 module_param(force_emulation_prefix, bool, S_IRUGO);
 188
 189 int __read_mostly pi_inject_timer = -1;
 190 module_param(pi_inject_timer, bint, S_IRUGO | S_IWUSR);
 191
 192 /* Enable/disable PMU virtualization */
 193 bool __read_mostly enable_pmu = true;
 194 EXPORT_SYMBOL_GPL(enable_pmu);
 195 module_param(enable_pmu, bool, 0444);
 196
 197 /*
 198  * Restoring the host value for MSRs that are only consumed when running in
 199  * usermode, e.g. SYSCALL MSRs and TSC_AUX, can be deferred until the CPU
 200  * returns to userspace, i.e. the kernel can run with the guest's value.
 201  */
 202 #define KVM_MAX_NR_USER_RETURN_MSRS 16
 203
 204 struct kvm_user_return_msrs {
 205         struct user_return_notifier urn;
 206         bool registered;
 207         struct kvm_user_return_msr_values {
 208                 u64 host;
 209                 u64 curr;
 210         } values[KVM_MAX_NR_USER_RETURN_MSRS];
 211 };
 212
 213 u32 __read_mostly kvm_nr_uret_msrs;
 214 EXPORT_SYMBOL_GPL(kvm_nr_uret_msrs);
 215 static u32 __read_mostly kvm_uret_msrs_list[KVM_MAX_NR_USER_RETURN_MSRS];
 216 static struct kvm_user_return_msrs __percpu *user_return_msrs;
 217
 218 #define KVM_SUPPORTED_XCR0     (XFEATURE_MASK_FP | XFEATURE_MASK_SSE \
 219                                 | XFEATURE_MASK_YMM | XFEATURE_MASK_BNDREGS \
 220                                 | XFEATURE_MASK_BNDCSR | XFEATURE_MASK_AVX512 \
 221                                 | XFEATURE_MASK_PKRU | XFEATURE_MASK_XTILE)
 222
 223 u64 __read_mostly host_efer;
 224 EXPORT_SYMBOL_GPL(host_efer);
 225
 226 bool __read_mostly allow_smaller_maxphyaddr = 0;
 227 EXPORT_SYMBOL_GPL(allow_smaller_maxphyaddr);
 228
 229 bool __read_mostly enable_apicv = true;
 230 EXPORT_SYMBOL_GPL(enable_apicv);
 231
 232 u64 __read_mostly host_xss;
 233 EXPORT_SYMBOL_GPL(host_xss);
 234 u64 __read_mostly supported_xss;
 235 EXPORT_SYMBOL_GPL(supported_xss);
 236
 237 const struct _kvm_stats_desc kvm_vm_stats_desc[] = {
 238         KVM_GENERIC_VM_STATS(),
 239         STATS_DESC_COUNTER(VM, mmu_shadow_zapped),
 240         STATS_DESC_COUNTER(VM, mmu_pte_write),
 241         STATS_DESC_COUNTER(VM, mmu_pde_zapped),
 242         STATS_DESC_COUNTER(VM, mmu_flooded),
 243         STATS_DESC_COUNTER(VM, mmu_recycled),
 244         STATS_DESC_COUNTER(VM, mmu_cache_miss),
 245         STATS_DESC_ICOUNTER(VM, mmu_unsync),
 246         STATS_DESC_ICOUNTER(VM, pages_4k),
 247         STATS_DESC_ICOUNTER(VM, pages_2m),
 248         STATS_DESC_ICOUNTER(VM, pages_1g),
 249         STATS_DESC_ICOUNTER(VM, nx_lpage_splits),
 250         STATS_DESC_PCOUNTER(VM, max_mmu_rmap_size),
 251         STATS_DESC_PCOUNTER(VM, max_mmu_page_hash_collisions)
 252 };
 253
 254 const struct kvm_stats_header kvm_vm_stats_header = {
 255         .name_size = KVM_STATS_NAME_SIZE,
 256         .num_desc = ARRAY_SIZE(kvm_vm_stats_desc),
 257         .id_offset = sizeof(struct kvm_stats_header),
 258         .desc_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE,
 259         .data_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE +
 260                        sizeof(kvm_vm_stats_desc),
 261 };
 262
 263 const struct _kvm_stats_desc kvm_vcpu_stats_desc[] = {
 264         KVM_GENERIC_VCPU_STATS(),
 265         STATS_DESC_COUNTER(VCPU, pf_fixed),
 266         STATS_DESC_COUNTER(VCPU, pf_guest),
 267         STATS_DESC_COUNTER(VCPU, tlb_flush),
 268         STATS_DESC_COUNTER(VCPU, invlpg),
 269         STATS_DESC_COUNTER(VCPU, exits),
 270         STATS_DESC_COUNTER(VCPU, io_exits),
 271         STATS_DESC_COUNTER(VCPU, mmio_exits),
 272         STATS_DESC_COUNTER(VCPU, signal_exits),
 273         STATS_DESC_COUNTER(VCPU, irq_window_exits),
 274         STATS_DESC_COUNTER(VCPU, nmi_window_exits),
 275         STATS_DESC_COUNTER(VCPU, l1d_flush),
 276         STATS_DESC_COUNTER(VCPU, halt_exits),
 277         STATS_DESC_COUNTER(VCPU, request_irq_exits),
 278         STATS_DESC_COUNTER(VCPU, irq_exits),
 279         STATS_DESC_COUNTER(VCPU, host_state_reload),
 280         STATS_DESC_COUNTER(VCPU, fpu_reload),
 281         STATS_DESC_COUNTER(VCPU, insn_emulation),
 282         STATS_DESC_COUNTER(VCPU, insn_emulation_fail),
 283         STATS_DESC_COUNTER(VCPU, hypercalls),
 284         STATS_DESC_COUNTER(VCPU, irq_injections),
 285         STATS_DESC_COUNTER(VCPU, nmi_injections),
 286         STATS_DESC_COUNTER(VCPU, req_event),
 287         STATS_DESC_COUNTER(VCPU, nested_run),
 288         STATS_DESC_COUNTER(VCPU, directed_yield_attempted),
 289         STATS_DESC_COUNTER(VCPU, directed_yield_successful),
 290         STATS_DESC_ICOUNTER(VCPU, guest_mode)
 291 };
 292
 293 const struct kvm_stats_header kvm_vcpu_stats_header = {
 294         .name_size = KVM_STATS_NAME_SIZE,
 295         .num_desc = ARRAY_SIZE(kvm_vcpu_stats_desc),
 296         .id_offset = sizeof(struct kvm_stats_header),
 297         .desc_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE,
 298         .data_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE +
 299                        sizeof(kvm_vcpu_stats_desc),
 300 };
 301
 302 u64 __read_mostly host_xcr0;
 303 u64 __read_mostly supported_xcr0;
 304 EXPORT_SYMBOL_GPL(supported_xcr0);
 305
 306 static struct kmem_cache *x86_emulator_cache;
 307
 308 /*
 309  * When called, it means the previous get/set msr reached an invalid msr.
 310  * Return true if we want to ignore/silent this failed msr access.
 311  */
 312 static bool kvm_msr_ignored_check(u32 msr, u64 data, bool write)
 313 {
 314         const char *op = write ? "wrmsr" : "rdmsr";
 315
 316         if (ignore_msrs) {
 317                 if (report_ignored_msrs)
 318                         kvm_pr_unimpl("ignored %s: 0x%x data 0x%llx\n",
 319                                       op, msr, data);
 320                 /* Mask the error */
 321                 return true;
 322         } else {
 323                 kvm_debug_ratelimited("unhandled %s: 0x%x data 0x%llx\n",
 324                                       op, msr, data);
 325                 return false;
 326         }
 327 }
 328
 329 static struct kmem_cache *kvm_alloc_emulator_cache(void)
 330 {
 331         unsigned int useroffset = offsetof(struct x86_emulate_ctxt, src);
 332         unsigned int size = sizeof(struct x86_emulate_ctxt);
 333
 334         return kmem_cache_create_usercopy("x86_emulator", size,
 335                                           __alignof__(struct x86_emulate_ctxt),
 336                                           SLAB_ACCOUNT, useroffset,
 337                                           size - useroffset, NULL);
 338 }
 339
 340 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 341
 342 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 343 {
 344         int i;
 345         for (i = 0; i < ASYNC_PF_PER_VCPU; i++)
 346                 vcpu->arch.apf.gfns[i] = ~0;
 347 }
 348
 349 static void kvm_on_user_return(struct user_return_notifier *urn)
 350 {
 351         unsigned slot;
 352         struct kvm_user_return_msrs *msrs
 353                 = container_of(urn, struct kvm_user_return_msrs, urn);
 354         struct kvm_user_return_msr_values *values;
 355         unsigned long flags;
 356
 357         /*
 358          * Disabling irqs at this point since the following code could be
 359          * interrupted and executed through kvm_arch_hardware_disable()
 360          */
 361         local_irq_save(flags);
 362         if (msrs->registered) {
 363                 msrs->registered = false;
 364                 user_return_notifier_unregister(urn);
 365         }
 366         local_irq_restore(flags);
 367         for (slot = 0; slot < kvm_nr_uret_msrs; ++slot) {
 368                 values = &msrs->values[slot];
 369                 if (values->host != values->curr) {
 370                         wrmsrl(kvm_uret_msrs_list[slot], values->host);
 371                         values->curr = values->host;
 372                 }
 373         }
 374 }
 375
 376 static int kvm_probe_user_return_msr(u32 msr)
 377 {
 378         u64 val;
 379         int ret;
 380
 381         preempt_disable();
 382         ret = rdmsrl_safe(msr, &val);
 383         if (ret)
 384                 goto out;
 385         ret = wrmsrl_safe(msr, val);
 386 out:
 387         preempt_enable();
 388         return ret;
 389 }
 390
 391 int kvm_add_user_return_msr(u32 msr)
 392 {
 393         BUG_ON(kvm_nr_uret_msrs >= KVM_MAX_NR_USER_RETURN_MSRS);
 394
 395         if (kvm_probe_user_return_msr(msr))
 396                 return -1;
 397
 398         kvm_uret_msrs_list[kvm_nr_uret_msrs] = msr;
 399         return kvm_nr_uret_msrs++;
 400 }
 401 EXPORT_SYMBOL_GPL(kvm_add_user_return_msr);
 402
 403 int kvm_find_user_return_msr(u32 msr)
 404 {
 405         int i;
 406
 407         for (i = 0; i < kvm_nr_uret_msrs; ++i) {
 408                 if (kvm_uret_msrs_list[i] == msr)
 409                         return i;
 410         }
 411         return -1;
 412 }
 413 EXPORT_SYMBOL_GPL(kvm_find_user_return_msr);
 414
 415 static void kvm_user_return_msr_cpu_online(void)
 416 {
 417         unsigned int cpu = smp_processor_id();
 418         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 419         u64 value;
 420         int i;
 421
 422         for (i = 0; i < kvm_nr_uret_msrs; ++i) {
 423                 rdmsrl_safe(kvm_uret_msrs_list[i], &value);
 424                 msrs->values[i].host = value;
 425                 msrs->values[i].curr = value;
 426         }
 427 }
 428
 429 int kvm_set_user_return_msr(unsigned slot, u64 value, u64 mask)
 430 {
 431         unsigned int cpu = smp_processor_id();
 432         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 433         int err;
 434
 435         value = (value & mask) | (msrs->values[slot].host & ~mask);
 436         if (value == msrs->values[slot].curr)
 437                 return 0;
 438         err = wrmsrl_safe(kvm_uret_msrs_list[slot], value);
 439         if (err)
 440                 return 1;
 441
 442         msrs->values[slot].curr = value;
 443         if (!msrs->registered) {
 444                 msrs->urn.on_user_return = kvm_on_user_return;
 445                 user_return_notifier_register(&msrs->urn);
 446                 msrs->registered = true;
 447         }
 448         return 0;
 449 }
 450 EXPORT_SYMBOL_GPL(kvm_set_user_return_msr);
 451
 452 static void drop_user_return_notifiers(void)
 453 {
 454         unsigned int cpu = smp_processor_id();
 455         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 456
 457         if (msrs->registered)
 458                 kvm_on_user_return(&msrs->urn);
 459 }
 460
 461 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 462 {
 463         return vcpu->arch.apic_base;
 464 }
 465 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 466
 467 enum lapic_mode kvm_get_apic_mode(struct kvm_vcpu *vcpu)
 468 {
 469         return kvm_apic_mode(kvm_get_apic_base(vcpu));
 470 }
 471 EXPORT_SYMBOL_GPL(kvm_get_apic_mode);
 472
 473 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 474 {
 475         enum lapic_mode old_mode = kvm_get_apic_mode(vcpu);
 476         enum lapic_mode new_mode = kvm_apic_mode(msr_info->data);
 477         u64 reserved_bits = kvm_vcpu_reserved_gpa_bits_raw(vcpu) | 0x2ff |
 478                 (guest_cpuid_has(vcpu, X86_FEATURE_X2APIC) ? 0 : X2APIC_ENABLE);
 479
 480         if ((msr_info->data & reserved_bits) != 0 || new_mode == LAPIC_MODE_INVALID)
 481                 return 1;
 482         if (!msr_info->host_initiated) {
 483                 if (old_mode == LAPIC_MODE_X2APIC && new_mode == LAPIC_MODE_XAPIC)
 484                         return 1;
 485                 if (old_mode == LAPIC_MODE_DISABLED && new_mode == LAPIC_MODE_X2APIC)
 486                         return 1;
 487         }
 488
 489         kvm_lapic_set_base(vcpu, msr_info->data);
 490         kvm_recalculate_apic_map(vcpu->kvm);
 491         return 0;
 492 }
 493 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 494
 495 /*
 496  * Handle a fault on a hardware virtualization (VMX or SVM) instruction.
 497  *
 498  * Hardware virtualization extension instructions may fault if a reboot turns
 499  * off virtualization while processes are running.  Usually after catching the
 500  * fault we just panic; during reboot instead the instruction is ignored.
 501  */
 502 noinstr void kvm_spurious_fault(void)
 503 {
 504         /* Fault while not rebooting.  We want the trace. */
 505         BUG_ON(!kvm_rebooting);
 506 }
 507 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 508
 509 #define EXCPT_BENIGN            0
 510 #define EXCPT_CONTRIBUTORY      1
 511 #define EXCPT_PF                2
 512
 513 static int exception_class(int vector)
 514 {
 515         switch (vector) {
 516         case PF_VECTOR:
 517                 return EXCPT_PF;
 518         case DE_VECTOR:
 519         case TS_VECTOR:
 520         case NP_VECTOR:
 521         case SS_VECTOR:
 522         case GP_VECTOR:
 523                 return EXCPT_CONTRIBUTORY;
 524         default:
 525                 break;
 526         }
 527         return EXCPT_BENIGN;
 528 }
 529
 530 #define EXCPT_FAULT             0
 531 #define EXCPT_TRAP              1
 532 #define EXCPT_ABORT             2
 533 #define EXCPT_INTERRUPT         3
 534
 535 static int exception_type(int vector)
 536 {
 537         unsigned int mask;
 538
 539         if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
 540                 return EXCPT_INTERRUPT;
 541
 542         mask = 1 << vector;
 543
 544         /* #DB is trap, as instruction watchpoints are handled elsewhere */
 545         if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
 546                 return EXCPT_TRAP;
 547
 548         if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
 549                 return EXCPT_ABORT;
 550
 551         /* Reserved exceptions will result in fault */
 552         return EXCPT_FAULT;
 553 }
 554
 555 void kvm_deliver_exception_payload(struct kvm_vcpu *vcpu)
 556 {
 557         unsigned nr = vcpu->arch.exception.nr;
 558         bool has_payload = vcpu->arch.exception.has_payload;
 559         unsigned long payload = vcpu->arch.exception.payload;
 560
 561         if (!has_payload)
 562                 return;
 563
 564         switch (nr) {
 565         case DB_VECTOR:
 566                 /*
 567                  * "Certain debug exceptions may clear bit 0-3.  The
 568                  * remaining contents of the DR6 register are never
 569                  * cleared by the processor".
 570                  */
 571                 vcpu->arch.dr6 &= ~DR_TRAP_BITS;
 572                 /*
 573                  * In order to reflect the #DB exception payload in guest
 574                  * dr6, three components need to be considered: active low
 575                  * bit, FIXED_1 bits and active high bits (e.g. DR6_BD,
 576                  * DR6_BS and DR6_BT)
 577                  * DR6_ACTIVE_LOW contains the FIXED_1 and active low bits.
 578                  * In the target guest dr6:
 579                  * FIXED_1 bits should always be set.
 580                  * Active low bits should be cleared if 1-setting in payload.
 581                  * Active high bits should be set if 1-setting in payload.
 582                  *
 583                  * Note, the payload is compatible with the pending debug
 584                  * exceptions/exit qualification under VMX, that active_low bits
 585                  * are active high in payload.
 586                  * So they need to be flipped for DR6.
 587                  */
 588                 vcpu->arch.dr6 |= DR6_ACTIVE_LOW;
 589                 vcpu->arch.dr6 |= payload;
 590                 vcpu->arch.dr6 ^= payload & DR6_ACTIVE_LOW;
 591
 592                 /*
 593                  * The #DB payload is defined as compatible with the 'pending
 594                  * debug exceptions' field under VMX, not DR6. While bit 12 is
 595                  * defined in the 'pending debug exceptions' field (enabled
 596                  * breakpoint), it is reserved and must be zero in DR6.
 597                  */
 598                 vcpu->arch.dr6 &= ~BIT(12);
 599                 break;
 600         case PF_VECTOR:
 601                 vcpu->arch.cr2 = payload;
 602                 break;
 603         }
 604
 605         vcpu->arch.exception.has_payload = false;
 606         vcpu->arch.exception.payload = 0;
 607 }
 608 EXPORT_SYMBOL_GPL(kvm_deliver_exception_payload);
 609
 610 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 611                 unsigned nr, bool has_error, u32 error_code,
 612                 bool has_payload, unsigned long payload, bool reinject)
 613 {
 614         u32 prev_nr;
 615         int class1, class2;
 616
 617         kvm_make_request(KVM_REQ_EVENT, vcpu);
 618
 619         if (!vcpu->arch.exception.pending && !vcpu->arch.exception.injected) {
 620         queue:
 621                 if (reinject) {
 622                         /*
 623                          * On vmentry, vcpu->arch.exception.pending is only
 624                          * true if an event injection was blocked by
 625                          * nested_run_pending.  In that case, however,
 626                          * vcpu_enter_guest requests an immediate exit,
 627                          * and the guest shouldn't proceed far enough to
 628                          * need reinjection.
 629                          */
 630                         WARN_ON_ONCE(vcpu->arch.exception.pending);
 631                         vcpu->arch.exception.injected = true;
 632                         if (WARN_ON_ONCE(has_payload)) {
 633                                 /*
 634                                  * A reinjected event has already
 635                                  * delivered its payload.
 636                                  */
 637                                 has_payload = false;
 638                                 payload = 0;
 639                         }
 640                 } else {
 641                         vcpu->arch.exception.pending = true;
 642                         vcpu->arch.exception.injected = false;
 643                 }
 644                 vcpu->arch.exception.has_error_code = has_error;
 645                 vcpu->arch.exception.nr = nr;
 646                 vcpu->arch.exception.error_code = error_code;
 647                 vcpu->arch.exception.has_payload = has_payload;
 648                 vcpu->arch.exception.payload = payload;
 649                 if (!is_guest_mode(vcpu))
 650                         kvm_deliver_exception_payload(vcpu);
 651                 return;
 652         }
 653
 654         /* to check exception */
 655         prev_nr = vcpu->arch.exception.nr;
 656         if (prev_nr == DF_VECTOR) {
 657                 /* triple fault -> shutdown */
 658                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 659                 return;
 660         }
 661         class1 = exception_class(prev_nr);
 662         class2 = exception_class(nr);
 663         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 664                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 665                 /*
 666                  * Generate double fault per SDM Table 5-5.  Set
 667                  * exception.pending = true so that the double fault
 668                  * can trigger a nested vmexit.
 669                  */
 670                 vcpu->arch.exception.pending = true;
 671                 vcpu->arch.exception.injected = false;
 672                 vcpu->arch.exception.has_error_code = true;
 673                 vcpu->arch.exception.nr = DF_VECTOR;
 674                 vcpu->arch.exception.error_code = 0;
 675                 vcpu->arch.exception.has_payload = false;
 676                 vcpu->arch.exception.payload = 0;
 677         } else
 678                 /* replace previous exception with a new one in a hope
 679                    that instruction re-execution will regenerate lost
 680                    exception */
 681                 goto queue;
 682 }
 683
 684 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 685 {
 686         kvm_multiple_exception(vcpu, nr, false, 0, false, 0, false);
 687 }
 688 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 689
 690 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 691 {
 692         kvm_multiple_exception(vcpu, nr, false, 0, false, 0, true);
 693 }
 694 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 695
 696 void kvm_queue_exception_p(struct kvm_vcpu *vcpu, unsigned nr,
 697                            unsigned long payload)
 698 {
 699         kvm_multiple_exception(vcpu, nr, false, 0, true, payload, false);
 700 }
 701 EXPORT_SYMBOL_GPL(kvm_queue_exception_p);
 702
 703 static void kvm_queue_exception_e_p(struct kvm_vcpu *vcpu, unsigned nr,
 704                                     u32 error_code, unsigned long payload)
 705 {
 706         kvm_multiple_exception(vcpu, nr, true, error_code,
 707                                true, payload, false);
 708 }
 709
 710 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 711 {
 712         if (err)
 713                 kvm_inject_gp(vcpu, 0);
 714         else
 715                 return kvm_skip_emulated_instruction(vcpu);
 716
 717         return 1;
 718 }
 719 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 720
 721 static int complete_emulated_insn_gp(struct kvm_vcpu *vcpu, int err)
 722 {
 723         if (err) {
 724                 kvm_inject_gp(vcpu, 0);
 725                 return 1;
 726         }
 727
 728         return kvm_emulate_instruction(vcpu, EMULTYPE_NO_DECODE | EMULTYPE_SKIP |
 729                                        EMULTYPE_COMPLETE_USER_EXIT);
 730 }
 731
 732 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 733 {
 734         ++vcpu->stat.pf_guest;
 735         vcpu->arch.exception.nested_apf =
 736                 is_guest_mode(vcpu) && fault->async_page_fault;
 737         if (vcpu->arch.exception.nested_apf) {
 738                 vcpu->arch.apf.nested_apf_token = fault->address;
 739                 kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 740         } else {
 741                 kvm_queue_exception_e_p(vcpu, PF_VECTOR, fault->error_code,
 742                                         fault->address);
 743         }
 744 }
 745 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 746
 747 bool kvm_inject_emulated_page_fault(struct kvm_vcpu *vcpu,
 748                                     struct x86_exception *fault)
 749 {
 750         struct kvm_mmu *fault_mmu;
 751         WARN_ON_ONCE(fault->vector != PF_VECTOR);
 752
 753         fault_mmu = fault->nested_page_fault ? vcpu->arch.mmu :
 754                                                vcpu->arch.walk_mmu;
 755
 756         /*
 757          * Invalidate the TLB entry for the faulting address, if it exists,
 758          * else the access will fault indefinitely (and to emulate hardware).
 759          */
 760         if ((fault->error_code & PFERR_PRESENT_MASK) &&
 761             !(fault->error_code & PFERR_RSVD_MASK))
 762                 kvm_mmu_invalidate_gva(vcpu, fault_mmu, fault->address,
 763                                        fault_mmu->root_hpa);
 764
 765         fault_mmu->inject_page_fault(vcpu, fault);
 766         return fault->nested_page_fault;
 767 }
 768 EXPORT_SYMBOL_GPL(kvm_inject_emulated_page_fault);
 769
 770 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 771 {
 772         atomic_inc(&vcpu->arch.nmi_queued);
 773         kvm_make_request(KVM_REQ_NMI, vcpu);
 774 }
 775 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 776
 777 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 778 {
 779         kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, false);
 780 }
 781 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 782
 783 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 784 {
 785         kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, true);
 786 }
 787 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 788
 789 /*
 790  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 791  * a #GP and return false.
 792  */
 793 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 794 {
 795         if (static_call(kvm_x86_get_cpl)(vcpu) <= required_cpl)
 796                 return true;
 797         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 798         return false;
 799 }
 800 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 801
 802 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
 803 {
 804         if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 805                 return true;
 806
 807         kvm_queue_exception(vcpu, UD_VECTOR);
 808         return false;
 809 }
 810 EXPORT_SYMBOL_GPL(kvm_require_dr);
 811
 812 static inline u64 pdptr_rsvd_bits(struct kvm_vcpu *vcpu)
 813 {
 814         return vcpu->arch.reserved_gpa_bits | rsvd_bits(5, 8) | rsvd_bits(1, 2);
 815 }
 816
 817 /*
 818  * Load the pae pdptrs.  Return 1 if they are all valid, 0 otherwise.
 819  */
 820 int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3)
 821 {
 822         struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
 823         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 824         gpa_t real_gpa;
 825         int i;
 826         int ret;
 827         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 828
 829         /*
 830          * If the MMU is nested, CR3 holds an L2 GPA and needs to be translated
 831          * to an L1 GPA.
 832          */
 833         real_gpa = kvm_translate_gpa(vcpu, mmu, gfn_to_gpa(pdpt_gfn),
 834                                      PFERR_USER_MASK | PFERR_WRITE_MASK, NULL);
 835         if (real_gpa == UNMAPPED_GVA)
 836                 return 0;
 837
 838         /* Note the offset, PDPTRs are 32 byte aligned when using PAE paging. */
 839         ret = kvm_vcpu_read_guest_page(vcpu, gpa_to_gfn(real_gpa), pdpte,
 840                                        cr3 & GENMASK(11, 5), sizeof(pdpte));
 841         if (ret < 0)
 842                 return 0;
 843
 844         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 845                 if ((pdpte[i] & PT_PRESENT_MASK) &&
 846                     (pdpte[i] & pdptr_rsvd_bits(vcpu))) {
 847                         return 0;
 848                 }
 849         }
 850
 851         /*
 852          * Marking VCPU_EXREG_PDPTR dirty doesn't work for !tdp_enabled.
 853          * Shadow page roots need to be reconstructed instead.
 854          */
 855         if (!tdp_enabled && memcmp(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs)))
 856                 kvm_mmu_free_roots(vcpu, mmu, KVM_MMU_ROOT_CURRENT);
 857
 858         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 859         kvm_register_mark_dirty(vcpu, VCPU_EXREG_PDPTR);
 860         kvm_make_request(KVM_REQ_LOAD_MMU_PGD, vcpu);
 861         vcpu->arch.pdptrs_from_userspace = false;
 862
 863         return 1;
 864 }
 865 EXPORT_SYMBOL_GPL(load_pdptrs);
 866
 867 void kvm_post_set_cr0(struct kvm_vcpu *vcpu, unsigned long old_cr0, unsigned long cr0)
 868 {
 869         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 870                 kvm_clear_async_pf_completion_queue(vcpu);
 871                 kvm_async_pf_hash_reset(vcpu);
 872         }
 873
 874         if ((cr0 ^ old_cr0) & KVM_MMU_CR0_ROLE_BITS)
 875                 kvm_mmu_reset_context(vcpu);
 876
 877         if (((cr0 ^ old_cr0) & X86_CR0_CD) &&
 878             kvm_arch_has_noncoherent_dma(vcpu->kvm) &&
 879             !kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
 880                 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
 881 }
 882 EXPORT_SYMBOL_GPL(kvm_post_set_cr0);
 883
 884 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 885 {
 886         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 887
 888         cr0 |= X86_CR0_ET;
 889
 890 #ifdef CONFIG_X86_64
 891         if (cr0 & 0xffffffff00000000UL)
 892                 return 1;
 893 #endif
 894
 895         cr0 &= ~CR0_RESERVED_BITS;
 896
 897         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 898                 return 1;
 899
 900         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 901                 return 1;
 902
 903 #ifdef CONFIG_X86_64
 904         if ((vcpu->arch.efer & EFER_LME) && !is_paging(vcpu) &&
 905             (cr0 & X86_CR0_PG)) {
 906                 int cs_db, cs_l;
 907
 908                 if (!is_pae(vcpu))
 909                         return 1;
 910                 static_call(kvm_x86_get_cs_db_l_bits)(vcpu, &cs_db, &cs_l);
 911                 if (cs_l)
 912                         return 1;
 913         }
 914 #endif
 915         if (!(vcpu->arch.efer & EFER_LME) && (cr0 & X86_CR0_PG) &&
 916             is_pae(vcpu) && ((cr0 ^ old_cr0) & X86_CR0_PDPTR_BITS) &&
 917             !load_pdptrs(vcpu, kvm_read_cr3(vcpu)))
 918                 return 1;
 919
 920         if (!(cr0 & X86_CR0_PG) &&
 921             (is_64_bit_mode(vcpu) || kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE)))
 922                 return 1;
 923
 924         static_call(kvm_x86_set_cr0)(vcpu, cr0);
 925
 926         kvm_post_set_cr0(vcpu, old_cr0, cr0);
 927
 928         return 0;
 929 }
 930 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 931
 932 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 933 {
 934         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 935 }
 936 EXPORT_SYMBOL_GPL(kvm_lmsw);
 937
 938 void kvm_load_guest_xsave_state(struct kvm_vcpu *vcpu)
 939 {
 940         if (vcpu->arch.guest_state_protected)
 941                 return;
 942
 943         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE)) {
 944
 945                 if (vcpu->arch.xcr0 != host_xcr0)
 946                         xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 947
 948                 if (vcpu->arch.xsaves_enabled &&
 949                     vcpu->arch.ia32_xss != host_xss)
 950                         wrmsrl(MSR_IA32_XSS, vcpu->arch.ia32_xss);
 951         }
 952
 953         if (static_cpu_has(X86_FEATURE_PKU) &&
 954             (kvm_read_cr4_bits(vcpu, X86_CR4_PKE) ||
 955              (vcpu->arch.xcr0 & XFEATURE_MASK_PKRU)) &&
 956             vcpu->arch.pkru != vcpu->arch.host_pkru)
 957                 write_pkru(vcpu->arch.pkru);
 958 }
 959 EXPORT_SYMBOL_GPL(kvm_load_guest_xsave_state);
 960
 961 void kvm_load_host_xsave_state(struct kvm_vcpu *vcpu)
 962 {
 963         if (vcpu->arch.guest_state_protected)
 964                 return;
 965
 966         if (static_cpu_has(X86_FEATURE_PKU) &&
 967             (kvm_read_cr4_bits(vcpu, X86_CR4_PKE) ||
 968              (vcpu->arch.xcr0 & XFEATURE_MASK_PKRU))) {
 969                 vcpu->arch.pkru = rdpkru();
 970                 if (vcpu->arch.pkru != vcpu->arch.host_pkru)
 971                         write_pkru(vcpu->arch.host_pkru);
 972         }
 973
 974         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE)) {
 975
 976                 if (vcpu->arch.xcr0 != host_xcr0)
 977                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
 978
 979                 if (vcpu->arch.xsaves_enabled &&
 980                     vcpu->arch.ia32_xss != host_xss)
 981                         wrmsrl(MSR_IA32_XSS, host_xss);
 982         }
 983
 984 }
 985 EXPORT_SYMBOL_GPL(kvm_load_host_xsave_state);
 986
 987 static inline u64 kvm_guest_supported_xcr0(struct kvm_vcpu *vcpu)
 988 {
 989         return vcpu->arch.guest_fpu.fpstate->user_xfeatures;
 990 }
 991
 992 #ifdef CONFIG_X86_64
 993 static inline u64 kvm_guest_supported_xfd(struct kvm_vcpu *vcpu)
 994 {
 995         return kvm_guest_supported_xcr0(vcpu) & XFEATURE_MASK_USER_DYNAMIC;
 996 }
 997 #endif
 998
 999 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
1000 {
1001         u64 xcr0 = xcr;
1002         u64 old_xcr0 = vcpu->arch.xcr0;
1003         u64 valid_bits;
1004
1005         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
1006         if (index != XCR_XFEATURE_ENABLED_MASK)
1007                 return 1;
1008         if (!(xcr0 & XFEATURE_MASK_FP))
1009                 return 1;
1010         if ((xcr0 & XFEATURE_MASK_YMM) && !(xcr0 & XFEATURE_MASK_SSE))
1011                 return 1;
1012
1013         /*
1014          * Do not allow the guest to set bits that we do not support
1015          * saving.  However, xcr0 bit 0 is always set, even if the
1016          * emulated CPU does not support XSAVE (see kvm_vcpu_reset()).
1017          */
1018         valid_bits = kvm_guest_supported_xcr0(vcpu) | XFEATURE_MASK_FP;
1019         if (xcr0 & ~valid_bits)
1020                 return 1;
1021
1022         if ((!(xcr0 & XFEATURE_MASK_BNDREGS)) !=
1023             (!(xcr0 & XFEATURE_MASK_BNDCSR)))
1024                 return 1;
1025
1026         if (xcr0 & XFEATURE_MASK_AVX512) {
1027                 if (!(xcr0 & XFEATURE_MASK_YMM))
1028                         return 1;
1029                 if ((xcr0 & XFEATURE_MASK_AVX512) != XFEATURE_MASK_AVX512)
1030                         return 1;
1031         }
1032
1033         if ((xcr0 & XFEATURE_MASK_XTILE) &&
1034             ((xcr0 & XFEATURE_MASK_XTILE) != XFEATURE_MASK_XTILE))
1035                 return 1;
1036
1037         vcpu->arch.xcr0 = xcr0;
1038
1039         if ((xcr0 ^ old_xcr0) & XFEATURE_MASK_EXTEND)
1040                 kvm_update_cpuid_runtime(vcpu);
1041         return 0;
1042 }
1043
1044 int kvm_emulate_xsetbv(struct kvm_vcpu *vcpu)
1045 {
1046         if (static_call(kvm_x86_get_cpl)(vcpu) != 0 ||
1047             __kvm_set_xcr(vcpu, kvm_rcx_read(vcpu), kvm_read_edx_eax(vcpu))) {
1048                 kvm_inject_gp(vcpu, 0);
1049                 return 1;
1050         }
1051
1052         return kvm_skip_emulated_instruction(vcpu);
1053 }
1054 EXPORT_SYMBOL_GPL(kvm_emulate_xsetbv);
1055
1056 bool kvm_is_valid_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
1057 {
1058         if (cr4 & cr4_reserved_bits)
1059                 return false;
1060
1061         if (cr4 & vcpu->arch.cr4_guest_rsvd_bits)
1062                 return false;
1063
1064         return static_call(kvm_x86_is_valid_cr4)(vcpu, cr4);
1065 }
1066 EXPORT_SYMBOL_GPL(kvm_is_valid_cr4);
1067
1068 void kvm_post_set_cr4(struct kvm_vcpu *vcpu, unsigned long old_cr4, unsigned long cr4)
1069 {
1070         /*
1071          * If any role bit is changed, the MMU needs to be reset.
1072          *
1073          * If CR4.PCIDE is changed 1 -> 0, the guest TLB must be flushed.
1074          * If CR4.PCIDE is changed 0 -> 1, there is no need to flush the TLB
1075          * according to the SDM; however, stale prev_roots could be reused
1076          * incorrectly in the future after a MOV to CR3 with NOFLUSH=1, so we
1077          * free them all.  KVM_REQ_MMU_RELOAD is fit for the both cases; it
1078          * is slow, but changing CR4.PCIDE is a rare case.
1079          *
1080          * If CR4.PGE is changed, the guest TLB must be flushed.
1081          *
1082          * Note: resetting MMU is a superset of KVM_REQ_MMU_RELOAD and
1083          * KVM_REQ_MMU_RELOAD is a superset of KVM_REQ_TLB_FLUSH_GUEST, hence
1084          * the usage of "else if".
1085          */
1086         if ((cr4 ^ old_cr4) & KVM_MMU_CR4_ROLE_BITS)
1087                 kvm_mmu_reset_context(vcpu);
1088         else if ((cr4 ^ old_cr4) & X86_CR4_PCIDE)
1089                 kvm_make_request(KVM_REQ_MMU_RELOAD, vcpu);
1090         else if ((cr4 ^ old_cr4) & X86_CR4_PGE)
1091                 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu);
1092 }
1093 EXPORT_SYMBOL_GPL(kvm_post_set_cr4);
1094
1095 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
1096 {
1097         unsigned long old_cr4 = kvm_read_cr4(vcpu);
1098
1099         if (!kvm_is_valid_cr4(vcpu, cr4))
1100                 return 1;
1101
1102         if (is_long_mode(vcpu)) {
1103                 if (!(cr4 & X86_CR4_PAE))
1104                         return 1;
1105                 if ((cr4 ^ old_cr4) & X86_CR4_LA57)
1106                         return 1;
1107         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
1108                    && ((cr4 ^ old_cr4) & X86_CR4_PDPTR_BITS)
1109                    && !load_pdptrs(vcpu, kvm_read_cr3(vcpu)))
1110                 return 1;
1111
1112         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
1113                 if (!guest_cpuid_has(vcpu, X86_FEATURE_PCID))
1114                         return 1;
1115
1116                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
1117                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
1118                         return 1;
1119         }
1120
1121         static_call(kvm_x86_set_cr4)(vcpu, cr4);
1122
1123         kvm_post_set_cr4(vcpu, old_cr4, cr4);
1124
1125         return 0;
1126 }
1127 EXPORT_SYMBOL_GPL(kvm_set_cr4);
1128
1129 static void kvm_invalidate_pcid(struct kvm_vcpu *vcpu, unsigned long pcid)
1130 {
1131         struct kvm_mmu *mmu = vcpu->arch.mmu;
1132         unsigned long roots_to_free = 0;
1133         int i;
1134
1135         /*
1136          * MOV CR3 and INVPCID are usually not intercepted when using TDP, but
1137          * this is reachable when running EPT=1 and unrestricted_guest=0,  and
1138          * also via the emulator.  KVM's TDP page tables are not in the scope of
1139          * the invalidation, but the guest's TLB entries need to be flushed as
1140          * the CPU may have cached entries in its TLB for the target PCID.
1141          */
1142         if (unlikely(tdp_enabled)) {
1143                 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu);
1144                 return;
1145         }
1146
1147         /*
1148          * If neither the current CR3 nor any of the prev_roots use the given
1149          * PCID, then nothing needs to be done here because a resync will
1150          * happen anyway before switching to any other CR3.
1151          */
1152         if (kvm_get_active_pcid(vcpu) == pcid) {
1153                 kvm_make_request(KVM_REQ_MMU_SYNC, vcpu);
1154                 kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
1155         }
1156
1157         /*
1158          * If PCID is disabled, there is no need to free prev_roots even if the
1159          * PCIDs for them are also 0, because MOV to CR3 always flushes the TLB
1160          * with PCIDE=0.
1161          */
1162         if (!kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
1163                 return;
1164
1165         for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++)
1166                 if (kvm_get_pcid(vcpu, mmu->prev_roots[i].pgd) == pcid)
1167                         roots_to_free |= KVM_MMU_ROOT_PREVIOUS(i);
1168
1169         kvm_mmu_free_roots(vcpu, mmu, roots_to_free);
1170 }
1171
1172 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
1173 {
1174         bool skip_tlb_flush = false;
1175         unsigned long pcid = 0;
1176 #ifdef CONFIG_X86_64
1177         bool pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
1178
1179         if (pcid_enabled) {
1180                 skip_tlb_flush = cr3 & X86_CR3_PCID_NOFLUSH;
1181                 cr3 &= ~X86_CR3_PCID_NOFLUSH;
1182                 pcid = cr3 & X86_CR3_PCID_MASK;
1183         }
1184 #endif
1185
1186         /* PDPTRs are always reloaded for PAE paging. */
1187         if (cr3 == kvm_read_cr3(vcpu) && !is_pae_paging(vcpu))
1188                 goto handle_tlb_flush;
1189
1190         /*
1191          * Do not condition the GPA check on long mode, this helper is used to
1192          * stuff CR3, e.g. for RSM emulation, and there is no guarantee that
1193          * the current vCPU mode is accurate.
1194          */
1195         if (kvm_vcpu_is_illegal_gpa(vcpu, cr3))
1196                 return 1;
1197
1198         if (is_pae_paging(vcpu) && !load_pdptrs(vcpu, cr3))
1199                 return 1;
1200
1201         if (cr3 != kvm_read_cr3(vcpu))
1202                 kvm_mmu_new_pgd(vcpu, cr3);
1203
1204         vcpu->arch.cr3 = cr3;
1205         kvm_register_mark_dirty(vcpu, VCPU_EXREG_CR3);
1206         /* Do not call post_set_cr3, we do not get here for confidential guests.  */
1207
1208 handle_tlb_flush:
1209         /*
1210          * A load of CR3 that flushes the TLB flushes only the current PCID,
1211          * even if PCID is disabled, in which case PCID=0 is flushed.  It's a
1212          * moot point in the end because _disabling_ PCID will flush all PCIDs,
1213          * and it's impossible to use a non-zero PCID when PCID is disabled,
1214          * i.e. only PCID=0 can be relevant.
1215          */
1216         if (!skip_tlb_flush)
1217                 kvm_invalidate_pcid(vcpu, pcid);
1218
1219         return 0;
1220 }
1221 EXPORT_SYMBOL_GPL(kvm_set_cr3);
1222
1223 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
1224 {
1225         if (cr8 & CR8_RESERVED_BITS)
1226                 return 1;
1227         if (lapic_in_kernel(vcpu))
1228                 kvm_lapic_set_tpr(vcpu, cr8);
1229         else
1230                 vcpu->arch.cr8 = cr8;
1231         return 0;
1232 }
1233 EXPORT_SYMBOL_GPL(kvm_set_cr8);
1234
1235 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
1236 {
1237         if (lapic_in_kernel(vcpu))
1238                 return kvm_lapic_get_cr8(vcpu);
1239         else
1240                 return vcpu->arch.cr8;
1241 }
1242 EXPORT_SYMBOL_GPL(kvm_get_cr8);
1243
1244 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
1245 {
1246         int i;
1247
1248         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
1249                 for (i = 0; i < KVM_NR_DB_REGS; i++)
1250                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
1251         }
1252 }
1253
1254 void kvm_update_dr7(struct kvm_vcpu *vcpu)
1255 {
1256         unsigned long dr7;
1257
1258         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
1259                 dr7 = vcpu->arch.guest_debug_dr7;
1260         else
1261                 dr7 = vcpu->arch.dr7;
1262         static_call(kvm_x86_set_dr7)(vcpu, dr7);
1263         vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
1264         if (dr7 & DR7_BP_EN_MASK)
1265                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
1266 }
1267 EXPORT_SYMBOL_GPL(kvm_update_dr7);
1268
1269 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
1270 {
1271         u64 fixed = DR6_FIXED_1;
1272
1273         if (!guest_cpuid_has(vcpu, X86_FEATURE_RTM))
1274                 fixed |= DR6_RTM;
1275
1276         if (!guest_cpuid_has(vcpu, X86_FEATURE_BUS_LOCK_DETECT))
1277                 fixed |= DR6_BUS_LOCK;
1278         return fixed;
1279 }
1280
1281 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
1282 {
1283         size_t size = ARRAY_SIZE(vcpu->arch.db);
1284
1285         switch (dr) {
1286         case 0 ... 3:
1287                 vcpu->arch.db[array_index_nospec(dr, size)] = val;
1288                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
1289                         vcpu->arch.eff_db[dr] = val;
1290                 break;
1291         case 4:
1292         case 6:
1293                 if (!kvm_dr6_valid(val))
1294                         return 1; /* #GP */
1295                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
1296                 break;
1297         case 5:
1298         default: /* 7 */
1299                 if (!kvm_dr7_valid(val))
1300                         return 1; /* #GP */
1301                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
1302                 kvm_update_dr7(vcpu);
1303                 break;
1304         }
1305
1306         return 0;
1307 }
1308 EXPORT_SYMBOL_GPL(kvm_set_dr);
1309
1310 void kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
1311 {
1312         size_t size = ARRAY_SIZE(vcpu->arch.db);
1313
1314         switch (dr) {
1315         case 0 ... 3:
1316                 *val = vcpu->arch.db[array_index_nospec(dr, size)];
1317                 break;
1318         case 4:
1319         case 6:
1320                 *val = vcpu->arch.dr6;
1321                 break;
1322         case 5:
1323         default: /* 7 */
1324                 *val = vcpu->arch.dr7;
1325                 break;
1326         }
1327 }
1328 EXPORT_SYMBOL_GPL(kvm_get_dr);
1329
1330 int kvm_emulate_rdpmc(struct kvm_vcpu *vcpu)
1331 {
1332         u32 ecx = kvm_rcx_read(vcpu);
1333         u64 data;
1334
1335         if (kvm_pmu_rdpmc(vcpu, ecx, &data)) {
1336                 kvm_inject_gp(vcpu, 0);
1337                 return 1;
1338         }
1339
1340         kvm_rax_write(vcpu, (u32)data);
1341         kvm_rdx_write(vcpu, data >> 32);
1342         return kvm_skip_emulated_instruction(vcpu);
1343 }
1344 EXPORT_SYMBOL_GPL(kvm_emulate_rdpmc);
1345
1346 /*
1347  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
1348  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
1349  *
1350  * The three MSR lists(msrs_to_save, emulated_msrs, msr_based_features)
1351  * extract the supported MSRs from the related const lists.
1352  * msrs_to_save is selected from the msrs_to_save_all to reflect the
1353  * capabilities of the host cpu. This capabilities test skips MSRs that are
1354  * kvm-specific. Those are put in emulated_msrs_all; filtering of emulated_msrs
1355  * may depend on host virtualization features rather than host cpu features.
1356  */
1357
1358 static const u32 msrs_to_save_all[] = {
1359         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
1360         MSR_STAR,
1361 #ifdef CONFIG_X86_64
1362         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
1363 #endif
1364         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
1365         MSR_IA32_FEAT_CTL, MSR_IA32_BNDCFGS, MSR_TSC_AUX,
1366         MSR_IA32_SPEC_CTRL,
1367         MSR_IA32_RTIT_CTL, MSR_IA32_RTIT_STATUS, MSR_IA32_RTIT_CR3_MATCH,
1368         MSR_IA32_RTIT_OUTPUT_BASE, MSR_IA32_RTIT_OUTPUT_MASK,
1369         MSR_IA32_RTIT_ADDR0_A, MSR_IA32_RTIT_ADDR0_B,
1370         MSR_IA32_RTIT_ADDR1_A, MSR_IA32_RTIT_ADDR1_B,
1371         MSR_IA32_RTIT_ADDR2_A, MSR_IA32_RTIT_ADDR2_B,
1372         MSR_IA32_RTIT_ADDR3_A, MSR_IA32_RTIT_ADDR3_B,
1373         MSR_IA32_UMWAIT_CONTROL,
1374
1375         MSR_ARCH_PERFMON_FIXED_CTR0, MSR_ARCH_PERFMON_FIXED_CTR1,
1376         MSR_ARCH_PERFMON_FIXED_CTR0 + 2,
1377         MSR_CORE_PERF_FIXED_CTR_CTRL, MSR_CORE_PERF_GLOBAL_STATUS,
1378         MSR_CORE_PERF_GLOBAL_CTRL, MSR_CORE_PERF_GLOBAL_OVF_CTRL,
1379         MSR_ARCH_PERFMON_PERFCTR0, MSR_ARCH_PERFMON_PERFCTR1,
1380         MSR_ARCH_PERFMON_PERFCTR0 + 2, MSR_ARCH_PERFMON_PERFCTR0 + 3,
1381         MSR_ARCH_PERFMON_PERFCTR0 + 4, MSR_ARCH_PERFMON_PERFCTR0 + 5,
1382         MSR_ARCH_PERFMON_PERFCTR0 + 6, MSR_ARCH_PERFMON_PERFCTR0 + 7,
1383         MSR_ARCH_PERFMON_PERFCTR0 + 8, MSR_ARCH_PERFMON_PERFCTR0 + 9,
1384         MSR_ARCH_PERFMON_PERFCTR0 + 10, MSR_ARCH_PERFMON_PERFCTR0 + 11,
1385         MSR_ARCH_PERFMON_PERFCTR0 + 12, MSR_ARCH_PERFMON_PERFCTR0 + 13,
1386         MSR_ARCH_PERFMON_PERFCTR0 + 14, MSR_ARCH_PERFMON_PERFCTR0 + 15,
1387         MSR_ARCH_PERFMON_PERFCTR0 + 16, MSR_ARCH_PERFMON_PERFCTR0 + 17,
1388         MSR_ARCH_PERFMON_EVENTSEL0, MSR_ARCH_PERFMON_EVENTSEL1,
1389         MSR_ARCH_PERFMON_EVENTSEL0 + 2, MSR_ARCH_PERFMON_EVENTSEL0 + 3,
1390         MSR_ARCH_PERFMON_EVENTSEL0 + 4, MSR_ARCH_PERFMON_EVENTSEL0 + 5,
1391         MSR_ARCH_PERFMON_EVENTSEL0 + 6, MSR_ARCH_PERFMON_EVENTSEL0 + 7,
1392         MSR_ARCH_PERFMON_EVENTSEL0 + 8, MSR_ARCH_PERFMON_EVENTSEL0 + 9,
1393         MSR_ARCH_PERFMON_EVENTSEL0 + 10, MSR_ARCH_PERFMON_EVENTSEL0 + 11,
1394         MSR_ARCH_PERFMON_EVENTSEL0 + 12, MSR_ARCH_PERFMON_EVENTSEL0 + 13,
1395         MSR_ARCH_PERFMON_EVENTSEL0 + 14, MSR_ARCH_PERFMON_EVENTSEL0 + 15,
1396         MSR_ARCH_PERFMON_EVENTSEL0 + 16, MSR_ARCH_PERFMON_EVENTSEL0 + 17,
1397
1398         MSR_K7_EVNTSEL0, MSR_K7_EVNTSEL1, MSR_K7_EVNTSEL2, MSR_K7_EVNTSEL3,
1399         MSR_K7_PERFCTR0, MSR_K7_PERFCTR1, MSR_K7_PERFCTR2, MSR_K7_PERFCTR3,
1400         MSR_F15H_PERF_CTL0, MSR_F15H_PERF_CTL1, MSR_F15H_PERF_CTL2,
1401         MSR_F15H_PERF_CTL3, MSR_F15H_PERF_CTL4, MSR_F15H_PERF_CTL5,
1402         MSR_F15H_PERF_CTR0, MSR_F15H_PERF_CTR1, MSR_F15H_PERF_CTR2,
1403         MSR_F15H_PERF_CTR3, MSR_F15H_PERF_CTR4, MSR_F15H_PERF_CTR5,
1404         MSR_IA32_XFD, MSR_IA32_XFD_ERR,
1405 };
1406
1407 static u32 msrs_to_save[ARRAY_SIZE(msrs_to_save_all)];
1408 static unsigned num_msrs_to_save;
1409
1410 static const u32 emulated_msrs_all[] = {
1411         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
1412         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
1413         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
1414         HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
1415         HV_X64_MSR_TSC_FREQUENCY, HV_X64_MSR_APIC_FREQUENCY,
1416         HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
1417         HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
1418         HV_X64_MSR_RESET,
1419         HV_X64_MSR_VP_INDEX,
1420         HV_X64_MSR_VP_RUNTIME,
1421         HV_X64_MSR_SCONTROL,
1422         HV_X64_MSR_STIMER0_CONFIG,
1423         HV_X64_MSR_VP_ASSIST_PAGE,
1424         HV_X64_MSR_REENLIGHTENMENT_CONTROL, HV_X64_MSR_TSC_EMULATION_CONTROL,
1425         HV_X64_MSR_TSC_EMULATION_STATUS,
1426         HV_X64_MSR_SYNDBG_OPTIONS,
1427         HV_X64_MSR_SYNDBG_CONTROL, HV_X64_MSR_SYNDBG_STATUS,
1428         HV_X64_MSR_SYNDBG_SEND_BUFFER, HV_X64_MSR_SYNDBG_RECV_BUFFER,
1429         HV_X64_MSR_SYNDBG_PENDING_BUFFER,
1430
1431         MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
1432         MSR_KVM_PV_EOI_EN, MSR_KVM_ASYNC_PF_INT, MSR_KVM_ASYNC_PF_ACK,
1433
1434         MSR_IA32_TSC_ADJUST,
1435         MSR_IA32_TSC_DEADLINE,
1436         MSR_IA32_ARCH_CAPABILITIES,
1437         MSR_IA32_PERF_CAPABILITIES,
1438         MSR_IA32_MISC_ENABLE,
1439         MSR_IA32_MCG_STATUS,
1440         MSR_IA32_MCG_CTL,
1441         MSR_IA32_MCG_EXT_CTL,
1442         MSR_IA32_SMBASE,
1443         MSR_SMI_COUNT,
1444         MSR_PLATFORM_INFO,
1445         MSR_MISC_FEATURES_ENABLES,
1446         MSR_AMD64_VIRT_SPEC_CTRL,
1447         MSR_AMD64_TSC_RATIO,
1448         MSR_IA32_POWER_CTL,
1449         MSR_IA32_UCODE_REV,
1450
1451         /*
1452          * The following list leaves out MSRs whose values are determined
1453          * by arch/x86/kvm/vmx/nested.c based on CPUID or other MSRs.
1454          * We always support the "true" VMX control MSRs, even if the host
1455          * processor does not, so I am putting these registers here rather
1456          * than in msrs_to_save_all.
1457          */
1458         MSR_IA32_VMX_BASIC,
1459         MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1460         MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1461         MSR_IA32_VMX_TRUE_EXIT_CTLS,
1462         MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1463         MSR_IA32_VMX_MISC,
1464         MSR_IA32_VMX_CR0_FIXED0,
1465         MSR_IA32_VMX_CR4_FIXED0,
1466         MSR_IA32_VMX_VMCS_ENUM,
1467         MSR_IA32_VMX_PROCBASED_CTLS2,
1468         MSR_IA32_VMX_EPT_VPID_CAP,
1469         MSR_IA32_VMX_VMFUNC,
1470
1471         MSR_K7_HWCR,
1472         MSR_KVM_POLL_CONTROL,
1473 };
1474
1475 static u32 emulated_msrs[ARRAY_SIZE(emulated_msrs_all)];
1476 static unsigned num_emulated_msrs;
1477
1478 /*
1479  * List of msr numbers which are used to expose MSR-based features that
1480  * can be used by a hypervisor to validate requested CPU features.
1481  */
1482 static const u32 msr_based_features_all[] = {
1483         MSR_IA32_VMX_BASIC,
1484         MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1485         MSR_IA32_VMX_PINBASED_CTLS,
1486         MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1487         MSR_IA32_VMX_PROCBASED_CTLS,
1488         MSR_IA32_VMX_TRUE_EXIT_CTLS,
1489         MSR_IA32_VMX_EXIT_CTLS,
1490         MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1491         MSR_IA32_VMX_ENTRY_CTLS,
1492         MSR_IA32_VMX_MISC,
1493         MSR_IA32_VMX_CR0_FIXED0,
1494         MSR_IA32_VMX_CR0_FIXED1,
1495         MSR_IA32_VMX_CR4_FIXED0,
1496         MSR_IA32_VMX_CR4_FIXED1,
1497         MSR_IA32_VMX_VMCS_ENUM,
1498         MSR_IA32_VMX_PROCBASED_CTLS2,
1499         MSR_IA32_VMX_EPT_VPID_CAP,
1500         MSR_IA32_VMX_VMFUNC,
1501
1502         MSR_F10H_DECFG,
1503         MSR_IA32_UCODE_REV,
1504         MSR_IA32_ARCH_CAPABILITIES,
1505         MSR_IA32_PERF_CAPABILITIES,
1506 };
1507
1508 static u32 msr_based_features[ARRAY_SIZE(msr_based_features_all)];
1509 static unsigned int num_msr_based_features;
1510
1511 static u64 kvm_get_arch_capabilities(void)
1512 {
1513         u64 data = 0;
1514
1515         if (boot_cpu_has(X86_FEATURE_ARCH_CAPABILITIES))
1516                 rdmsrl(MSR_IA32_ARCH_CAPABILITIES, data);
1517
1518         /*
1519          * If nx_huge_pages is enabled, KVM's shadow paging will ensure that
1520          * the nested hypervisor runs with NX huge pages.  If it is not,
1521          * L1 is anyway vulnerable to ITLB_MULTIHIT exploits from other
1522          * L1 guests, so it need not worry about its own (L2) guests.
1523          */
1524         data |= ARCH_CAP_PSCHANGE_MC_NO;
1525
1526         /*
1527          * If we're doing cache flushes (either "always" or "cond")
1528          * we will do one whenever the guest does a vmlaunch/vmresume.
1529          * If an outer hypervisor is doing the cache flush for us
1530          * (VMENTER_L1D_FLUSH_NESTED_VM), we can safely pass that
1531          * capability to the guest too, and if EPT is disabled we're not
1532          * vulnerable.  Overall, only VMENTER_L1D_FLUSH_NEVER will
1533          * require a nested hypervisor to do a flush of its own.
1534          */
1535         if (l1tf_vmx_mitigation != VMENTER_L1D_FLUSH_NEVER)
1536                 data |= ARCH_CAP_SKIP_VMENTRY_L1DFLUSH;
1537
1538         if (!boot_cpu_has_bug(X86_BUG_CPU_MELTDOWN))
1539                 data |= ARCH_CAP_RDCL_NO;
1540         if (!boot_cpu_has_bug(X86_BUG_SPEC_STORE_BYPASS))
1541                 data |= ARCH_CAP_SSB_NO;
1542         if (!boot_cpu_has_bug(X86_BUG_MDS))
1543                 data |= ARCH_CAP_MDS_NO;
1544
1545         if (!boot_cpu_has(X86_FEATURE_RTM)) {
1546                 /*
1547                  * If RTM=0 because the kernel has disabled TSX, the host might
1548                  * have TAA_NO or TSX_CTRL.  Clear TAA_NO (the guest sees RTM=0
1549                  * and therefore knows that there cannot be TAA) but keep
1550                  * TSX_CTRL: some buggy userspaces leave it set on tsx=on hosts,
1551                  * and we want to allow migrating those guests to tsx=off hosts.
1552                  */
1553                 data &= ~ARCH_CAP_TAA_NO;
1554         } else if (!boot_cpu_has_bug(X86_BUG_TAA)) {
1555                 data |= ARCH_CAP_TAA_NO;
1556         } else {
1557                 /*
1558                  * Nothing to do here; we emulate TSX_CTRL if present on the
1559                  * host so the guest can choose between disabling TSX or
1560                  * using VERW to clear CPU buffers.
1561                  */
1562         }
1563
1564         return data;
1565 }
1566
1567 static int kvm_get_msr_feature(struct kvm_msr_entry *msr)
1568 {
1569         switch (msr->index) {
1570         case MSR_IA32_ARCH_CAPABILITIES:
1571                 msr->data = kvm_get_arch_capabilities();
1572                 break;
1573         case MSR_IA32_UCODE_REV:
1574                 rdmsrl_safe(msr->index, &msr->data);
1575                 break;
1576         default:
1577                 return static_call(kvm_x86_get_msr_feature)(msr);
1578         }
1579         return 0;
1580 }
1581
1582 static int do_get_msr_feature(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1583 {
1584         struct kvm_msr_entry msr;
1585         int r;
1586
1587         msr.index = index;
1588         r = kvm_get_msr_feature(&msr);
1589
1590         if (r == KVM_MSR_RET_INVALID) {
1591                 /* Unconditionally clear the output for simplicity */
1592                 *data = 0;
1593                 if (kvm_msr_ignored_check(index, 0, false))
1594                         r = 0;
1595         }
1596
1597         if (r)
1598                 return r;
1599
1600         *data = msr.data;
1601
1602         return 0;
1603 }
1604
1605 static bool __kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1606 {
1607         if (efer & EFER_FFXSR && !guest_cpuid_has(vcpu, X86_FEATURE_FXSR_OPT))
1608                 return false;
1609
1610         if (efer & EFER_SVME && !guest_cpuid_has(vcpu, X86_FEATURE_SVM))
1611                 return false;
1612
1613         if (efer & (EFER_LME | EFER_LMA) &&
1614             !guest_cpuid_has(vcpu, X86_FEATURE_LM))
1615                 return false;
1616
1617         if (efer & EFER_NX && !guest_cpuid_has(vcpu, X86_FEATURE_NX))
1618                 return false;
1619
1620         return true;
1621
1622 }
1623 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1624 {
1625         if (efer & efer_reserved_bits)
1626                 return false;
1627
1628         return __kvm_valid_efer(vcpu, efer);
1629 }
1630 EXPORT_SYMBOL_GPL(kvm_valid_efer);
1631
1632 static int set_efer(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
1633 {
1634         u64 old_efer = vcpu->arch.efer;
1635         u64 efer = msr_info->data;
1636         int r;
1637
1638         if (efer & efer_reserved_bits)
1639                 return 1;
1640
1641         if (!msr_info->host_initiated) {
1642                 if (!__kvm_valid_efer(vcpu, efer))
1643                         return 1;
1644
1645                 if (is_paging(vcpu) &&
1646                     (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1647                         return 1;
1648         }
1649
1650         efer &= ~EFER_LMA;
1651         efer |= vcpu->arch.efer & EFER_LMA;
1652
1653         r = static_call(kvm_x86_set_efer)(vcpu, efer);
1654         if (r) {
1655                 WARN_ON(r > 0);
1656                 return r;
1657         }
1658
1659         /* Update reserved bits */
1660         if ((efer ^ old_efer) & EFER_NX)
1661                 kvm_mmu_reset_context(vcpu);
1662
1663         return 0;
1664 }
1665
1666 void kvm_enable_efer_bits(u64 mask)
1667 {
1668        efer_reserved_bits &= ~mask;
1669 }
1670 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1671
1672 bool kvm_msr_allowed(struct kvm_vcpu *vcpu, u32 index, u32 type)
1673 {
1674         struct kvm_x86_msr_filter *msr_filter;
1675         struct msr_bitmap_range *ranges;
1676         struct kvm *kvm = vcpu->kvm;
1677         bool allowed;
1678         int idx;
1679         u32 i;
1680
1681         /* x2APIC MSRs do not support filtering. */
1682         if (index >= 0x800 && index <= 0x8ff)
1683                 return true;
1684
1685         idx = srcu_read_lock(&kvm->srcu);
1686
1687         msr_filter = srcu_dereference(kvm->arch.msr_filter, &kvm->srcu);
1688         if (!msr_filter) {
1689                 allowed = true;
1690                 goto out;
1691         }
1692
1693         allowed = msr_filter->default_allow;
1694         ranges = msr_filter->ranges;
1695
1696         for (i = 0; i < msr_filter->count; i++) {
1697                 u32 start = ranges[i].base;
1698                 u32 end = start + ranges[i].nmsrs;
1699                 u32 flags = ranges[i].flags;
1700                 unsigned long *bitmap = ranges[i].bitmap;
1701
1702                 if ((index >= start) && (index < end) && (flags & type)) {
1703                         allowed = !!test_bit(index - start, bitmap);
1704                         break;
1705                 }
1706         }
1707
1708 out:
1709         srcu_read_unlock(&kvm->srcu, idx);
1710
1711         return allowed;
1712 }
1713 EXPORT_SYMBOL_GPL(kvm_msr_allowed);
1714
1715 /*
1716  * Write @data into the MSR specified by @index.  Select MSR specific fault
1717  * checks are bypassed if @host_initiated is %true.
1718  * Returns 0 on success, non-0 otherwise.
1719  * Assumes vcpu_load() was already called.
1720  */
1721 static int __kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data,
1722                          bool host_initiated)
1723 {
1724         struct msr_data msr;
1725
1726         if (!host_initiated && !kvm_msr_allowed(vcpu, index, KVM_MSR_FILTER_WRITE))
1727                 return KVM_MSR_RET_FILTERED;
1728
1729         switch (index) {
1730         case MSR_FS_BASE:
1731         case MSR_GS_BASE:
1732         case MSR_KERNEL_GS_BASE:
1733         case MSR_CSTAR:
1734         case MSR_LSTAR:
1735                 if (is_noncanonical_address(data, vcpu))
1736                         return 1;
1737                 break;
1738         case MSR_IA32_SYSENTER_EIP:
1739         case MSR_IA32_SYSENTER_ESP:
1740                 /*
1741                  * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1742                  * non-canonical address is written on Intel but not on
1743                  * AMD (which ignores the top 32-bits, because it does
1744                  * not implement 64-bit SYSENTER).
1745                  *
1746                  * 64-bit code should hence be able to write a non-canonical
1747                  * value on AMD.  Making the address canonical ensures that
1748                  * vmentry does not fail on Intel after writing a non-canonical
1749                  * value, and that something deterministic happens if the guest
1750                  * invokes 64-bit SYSENTER.
1751                  */
1752                 data = get_canonical(data, vcpu_virt_addr_bits(vcpu));
1753                 break;
1754         case MSR_TSC_AUX:
1755                 if (!kvm_is_supported_user_return_msr(MSR_TSC_AUX))
1756                         return 1;
1757
1758                 if (!host_initiated &&
1759                     !guest_cpuid_has(vcpu, X86_FEATURE_RDTSCP) &&
1760                     !guest_cpuid_has(vcpu, X86_FEATURE_RDPID))
1761                         return 1;
1762
1763                 /*
1764                  * Per Intel's SDM, bits 63:32 are reserved, but AMD's APM has
1765                  * incomplete and conflicting architectural behavior.  Current
1766                  * AMD CPUs completely ignore bits 63:32, i.e. they aren't
1767                  * reserved and always read as zeros.  Enforce Intel's reserved
1768                  * bits check if and only if the guest CPU is Intel, and clear
1769                  * the bits in all other cases.  This ensures cross-vendor
1770                  * migration will provide consistent behavior for the guest.
1771                  */
1772                 if (guest_cpuid_is_intel(vcpu) && (data >> 32) != 0)
1773                         return 1;
1774
1775                 data = (u32)data;
1776                 break;
1777         }
1778
1779         msr.data = data;
1780         msr.index = index;
1781         msr.host_initiated = host_initiated;
1782
1783         return static_call(kvm_x86_set_msr)(vcpu, &msr);
1784 }
1785
1786 static int kvm_set_msr_ignored_check(struct kvm_vcpu *vcpu,
1787                                      u32 index, u64 data, bool host_initiated)
1788 {
1789         int ret = __kvm_set_msr(vcpu, index, data, host_initiated);
1790
1791         if (ret == KVM_MSR_RET_INVALID)
1792                 if (kvm_msr_ignored_check(index, data, true))
1793                         ret = 0;
1794
1795         return ret;
1796 }
1797
1798 /*
1799  * Read the MSR specified by @index into @data.  Select MSR specific fault
1800  * checks are bypassed if @host_initiated is %true.
1801  * Returns 0 on success, non-0 otherwise.
1802  * Assumes vcpu_load() was already called.
1803  */
1804 int __kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data,
1805                   bool host_initiated)
1806 {
1807         struct msr_data msr;
1808         int ret;
1809
1810         if (!host_initiated && !kvm_msr_allowed(vcpu, index, KVM_MSR_FILTER_READ))
1811                 return KVM_MSR_RET_FILTERED;
1812
1813         switch (index) {
1814         case MSR_TSC_AUX:
1815                 if (!kvm_is_supported_user_return_msr(MSR_TSC_AUX))
1816                         return 1;
1817
1818                 if (!host_initiated &&
1819                     !guest_cpuid_has(vcpu, X86_FEATURE_RDTSCP) &&
1820                     !guest_cpuid_has(vcpu, X86_FEATURE_RDPID))
1821                         return 1;
1822                 break;
1823         }
1824
1825         msr.index = index;
1826         msr.host_initiated = host_initiated;
1827
1828         ret = static_call(kvm_x86_get_msr)(vcpu, &msr);
1829         if (!ret)
1830                 *data = msr.data;
1831         return ret;
1832 }
1833
1834 static int kvm_get_msr_ignored_check(struct kvm_vcpu *vcpu,
1835                                      u32 index, u64 *data, bool host_initiated)
1836 {
1837         int ret = __kvm_get_msr(vcpu, index, data, host_initiated);
1838
1839         if (ret == KVM_MSR_RET_INVALID) {
1840                 /* Unconditionally clear *data for simplicity */
1841                 *data = 0;
1842                 if (kvm_msr_ignored_check(index, 0, false))
1843                         ret = 0;
1844         }
1845
1846         return ret;
1847 }
1848
1849 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data)
1850 {
1851         return kvm_get_msr_ignored_check(vcpu, index, data, false);
1852 }
1853 EXPORT_SYMBOL_GPL(kvm_get_msr);
1854
1855 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data)
1856 {
1857         return kvm_set_msr_ignored_check(vcpu, index, data, false);
1858 }
1859 EXPORT_SYMBOL_GPL(kvm_set_msr);
1860
1861 static void complete_userspace_rdmsr(struct kvm_vcpu *vcpu)
1862 {
1863         if (!vcpu->run->msr.error) {
1864                 kvm_rax_write(vcpu, (u32)vcpu->run->msr.data);
1865                 kvm_rdx_write(vcpu, vcpu->run->msr.data >> 32);
1866         }
1867 }
1868
1869 static int complete_emulated_msr_access(struct kvm_vcpu *vcpu)
1870 {
1871         return complete_emulated_insn_gp(vcpu, vcpu->run->msr.error);
1872 }
1873
1874 static int complete_emulated_rdmsr(struct kvm_vcpu *vcpu)
1875 {
1876         complete_userspace_rdmsr(vcpu);
1877         return complete_emulated_msr_access(vcpu);
1878 }
1879
1880 static int complete_fast_msr_access(struct kvm_vcpu *vcpu)
1881 {
1882         return static_call(kvm_x86_complete_emulated_msr)(vcpu, vcpu->run->msr.error);
1883 }
1884
1885 static int complete_fast_rdmsr(struct kvm_vcpu *vcpu)
1886 {
1887         complete_userspace_rdmsr(vcpu);
1888         return complete_fast_msr_access(vcpu);
1889 }
1890
1891 static u64 kvm_msr_reason(int r)
1892 {
1893         switch (r) {
1894         case KVM_MSR_RET_INVALID:
1895                 return KVM_MSR_EXIT_REASON_UNKNOWN;
1896         case KVM_MSR_RET_FILTERED:
1897                 return KVM_MSR_EXIT_REASON_FILTER;
1898         default:
1899                 return KVM_MSR_EXIT_REASON_INVAL;
1900         }
1901 }
1902
1903 static int kvm_msr_user_space(struct kvm_vcpu *vcpu, u32 index,
1904                               u32 exit_reason, u64 data,
1905                               int (*completion)(struct kvm_vcpu *vcpu),
1906                               int r)
1907 {
1908         u64 msr_reason = kvm_msr_reason(r);
1909
1910         /* Check if the user wanted to know about this MSR fault */
1911         if (!(vcpu->kvm->arch.user_space_msr_mask & msr_reason))
1912                 return 0;
1913
1914         vcpu->run->exit_reason = exit_reason;
1915         vcpu->run->msr.error = 0;
1916         memset(vcpu->run->msr.pad, 0, sizeof(vcpu->run->msr.pad));
1917         vcpu->run->msr.reason = msr_reason;
1918         vcpu->run->msr.index = index;
1919         vcpu->run->msr.data = data;
1920         vcpu->arch.complete_userspace_io = completion;
1921
1922         return 1;
1923 }
1924
1925 int kvm_emulate_rdmsr(struct kvm_vcpu *vcpu)
1926 {
1927         u32 ecx = kvm_rcx_read(vcpu);
1928         u64 data;
1929         int r;
1930
1931         r = kvm_get_msr(vcpu, ecx, &data);
1932
1933         if (!r) {
1934                 trace_kvm_msr_read(ecx, data);
1935
1936                 kvm_rax_write(vcpu, data & -1u);
1937                 kvm_rdx_write(vcpu, (data >> 32) & -1u);
1938         } else {
1939                 /* MSR read failed? See if we should ask user space */
1940                 if (kvm_msr_user_space(vcpu, ecx, KVM_EXIT_X86_RDMSR, 0,
1941                                        complete_fast_rdmsr, r))
1942                         return 0;
1943                 trace_kvm_msr_read_ex(ecx);
1944         }
1945
1946         return static_call(kvm_x86_complete_emulated_msr)(vcpu, r);
1947 }
1948 EXPORT_SYMBOL_GPL(kvm_emulate_rdmsr);
1949
1950 int kvm_emulate_wrmsr(struct kvm_vcpu *vcpu)
1951 {
1952         u32 ecx = kvm_rcx_read(vcpu);
1953         u64 data = kvm_read_edx_eax(vcpu);
1954         int r;
1955
1956         r = kvm_set_msr(vcpu, ecx, data);
1957
1958         if (!r) {
1959                 trace_kvm_msr_write(ecx, data);
1960         } else {
1961                 /* MSR write failed? See if we should ask user space */
1962                 if (kvm_msr_user_space(vcpu, ecx, KVM_EXIT_X86_WRMSR, data,
1963                                        complete_fast_msr_access, r))
1964                         return 0;
1965                 /* Signal all other negative errors to userspace */
1966                 if (r < 0)
1967                         return r;
1968                 trace_kvm_msr_write_ex(ecx, data);
1969         }
1970
1971         return static_call(kvm_x86_complete_emulated_msr)(vcpu, r);
1972 }
1973 EXPORT_SYMBOL_GPL(kvm_emulate_wrmsr);
1974
1975 int kvm_emulate_as_nop(struct kvm_vcpu *vcpu)
1976 {
1977         return kvm_skip_emulated_instruction(vcpu);
1978 }
1979 EXPORT_SYMBOL_GPL(kvm_emulate_as_nop);
1980
1981 int kvm_emulate_invd(struct kvm_vcpu *vcpu)
1982 {
1983         /* Treat an INVD instruction as a NOP and just skip it. */
1984         return kvm_emulate_as_nop(vcpu);
1985 }
1986 EXPORT_SYMBOL_GPL(kvm_emulate_invd);
1987
1988 int kvm_emulate_mwait(struct kvm_vcpu *vcpu)
1989 {
1990         pr_warn_once("kvm: MWAIT instruction emulated as NOP!\n");
1991         return kvm_emulate_as_nop(vcpu);
1992 }
1993 EXPORT_SYMBOL_GPL(kvm_emulate_mwait);
1994
1995 int kvm_handle_invalid_op(struct kvm_vcpu *vcpu)
1996 {
1997         kvm_queue_exception(vcpu, UD_VECTOR);
1998         return 1;
1999 }
2000 EXPORT_SYMBOL_GPL(kvm_handle_invalid_op);
2001
2002 int kvm_emulate_monitor(struct kvm_vcpu *vcpu)
2003 {
2004         pr_warn_once("kvm: MONITOR instruction emulated as NOP!\n");
2005         return kvm_emulate_as_nop(vcpu);
2006 }
2007 EXPORT_SYMBOL_GPL(kvm_emulate_monitor);
2008
2009 static inline bool kvm_vcpu_exit_request(struct kvm_vcpu *vcpu)
2010 {
2011         xfer_to_guest_mode_prepare();
2012         return vcpu->mode == EXITING_GUEST_MODE || kvm_request_pending(vcpu) ||
2013                 xfer_to_guest_mode_work_pending();
2014 }
2015
2016 /*
2017  * The fast path for frequent and performance sensitive wrmsr emulation,
2018  * i.e. the sending of IPI, sending IPI early in the VM-Exit flow reduces
2019  * the latency of virtual IPI by avoiding the expensive bits of transitioning
2020  * from guest to host, e.g. reacquiring KVM's SRCU lock. In contrast to the
2021  * other cases which must be called after interrupts are enabled on the host.
2022  */
2023 static int handle_fastpath_set_x2apic_icr_irqoff(struct kvm_vcpu *vcpu, u64 data)
2024 {
2025         if (!lapic_in_kernel(vcpu) || !apic_x2apic_mode(vcpu->arch.apic))
2026                 return 1;
2027
2028         if (((data & APIC_SHORT_MASK) == APIC_DEST_NOSHORT) &&
2029                 ((data & APIC_DEST_MASK) == APIC_DEST_PHYSICAL) &&
2030                 ((data & APIC_MODE_MASK) == APIC_DM_FIXED) &&
2031                 ((u32)(data >> 32) != X2APIC_BROADCAST)) {
2032
2033                 data &= ~(1 << 12);
2034                 kvm_apic_send_ipi(vcpu->arch.apic, (u32)data, (u32)(data >> 32));
2035                 kvm_lapic_set_reg(vcpu->arch.apic, APIC_ICR2, (u32)(data >> 32));
2036                 kvm_lapic_set_reg(vcpu->arch.apic, APIC_ICR, (u32)data);
2037                 trace_kvm_apic_write(APIC_ICR, (u32)data);
2038                 return 0;
2039         }
2040
2041         return 1;
2042 }
2043
2044 static int handle_fastpath_set_tscdeadline(struct kvm_vcpu *vcpu, u64 data)
2045 {
2046         if (!kvm_can_use_hv_timer(vcpu))
2047                 return 1;
2048
2049         kvm_set_lapic_tscdeadline_msr(vcpu, data);
2050         return 0;
2051 }
2052
2053 fastpath_t handle_fastpath_set_msr_irqoff(struct kvm_vcpu *vcpu)
2054 {
2055         u32 msr = kvm_rcx_read(vcpu);
2056         u64 data;
2057         fastpath_t ret = EXIT_FASTPATH_NONE;
2058
2059         switch (msr) {
2060         case APIC_BASE_MSR + (APIC_ICR >> 4):
2061                 data = kvm_read_edx_eax(vcpu);
2062                 if (!handle_fastpath_set_x2apic_icr_irqoff(vcpu, data)) {
2063                         kvm_skip_emulated_instruction(vcpu);
2064                         ret = EXIT_FASTPATH_EXIT_HANDLED;
2065                 }
2066                 break;
2067         case MSR_IA32_TSC_DEADLINE:
2068                 data = kvm_read_edx_eax(vcpu);
2069                 if (!handle_fastpath_set_tscdeadline(vcpu, data)) {
2070                         kvm_skip_emulated_instruction(vcpu);
2071                         ret = EXIT_FASTPATH_REENTER_GUEST;
2072                 }
2073                 break;
2074         default:
2075                 break;
2076         }
2077
2078         if (ret != EXIT_FASTPATH_NONE)
2079                 trace_kvm_msr_write(msr, data);
2080
2081         return ret;
2082 }
2083 EXPORT_SYMBOL_GPL(handle_fastpath_set_msr_irqoff);
2084
2085 /*
2086  * Adapt set_msr() to msr_io()'s calling convention
2087  */
2088 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
2089 {
2090         return kvm_get_msr_ignored_check(vcpu, index, data, true);
2091 }
2092
2093 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
2094 {
2095         return kvm_set_msr_ignored_check(vcpu, index, *data, true);
2096 }
2097
2098 #ifdef CONFIG_X86_64
2099 struct pvclock_clock {
2100         int vclock_mode;
2101         u64 cycle_last;
2102         u64 mask;
2103         u32 mult;
2104         u32 shift;
2105         u64 base_cycles;
2106         u64 offset;
2107 };
2108
2109 struct pvclock_gtod_data {
2110         seqcount_t      seq;
2111
2112         struct pvclock_clock clock; /* extract of a clocksource struct */
2113         struct pvclock_clock raw_clock; /* extract of a clocksource struct */
2114
2115         ktime_t         offs_boot;
2116         u64             wall_time_sec;
2117 };
2118
2119 static struct pvclock_gtod_data pvclock_gtod_data;
2120
2121 static void update_pvclock_gtod(struct timekeeper *tk)
2122 {
2123         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
2124
2125         write_seqcount_begin(&vdata->seq);
2126
2127         /* copy pvclock gtod data */
2128         vdata->clock.vclock_mode        = tk->tkr_mono.clock->vdso_clock_mode;
2129         vdata->clock.cycle_last         = tk->tkr_mono.cycle_last;
2130         vdata->clock.mask               = tk->tkr_mono.mask;
2131         vdata->clock.mult               = tk->tkr_mono.mult;
2132         vdata->clock.shift              = tk->tkr_mono.shift;
2133         vdata->clock.base_cycles        = tk->tkr_mono.xtime_nsec;
2134         vdata->clock.offset             = tk->tkr_mono.base;
2135
2136         vdata->raw_clock.vclock_mode    = tk->tkr_raw.clock->vdso_clock_mode;
2137         vdata->raw_clock.cycle_last     = tk->tkr_raw.cycle_last;
2138         vdata->raw_clock.mask           = tk->tkr_raw.mask;
2139         vdata->raw_clock.mult           = tk->tkr_raw.mult;
2140         vdata->raw_clock.shift          = tk->tkr_raw.shift;
2141         vdata->raw_clock.base_cycles    = tk->tkr_raw.xtime_nsec;
2142         vdata->raw_clock.offset         = tk->tkr_raw.base;
2143
2144         vdata->wall_time_sec            = tk->xtime_sec;
2145
2146         vdata->offs_boot                = tk->offs_boot;
2147
2148         write_seqcount_end(&vdata->seq);
2149 }
2150
2151 static s64 get_kvmclock_base_ns(void)
2152 {
2153         /* Count up from boot time, but with the frequency of the raw clock.  */
2154         return ktime_to_ns(ktime_add(ktime_get_raw(), pvclock_gtod_data.offs_boot));
2155 }
2156 #else
2157 static s64 get_kvmclock_base_ns(void)
2158 {
2159         /* Master clock not used, so we can just use CLOCK_BOOTTIME.  */
2160         return ktime_get_boottime_ns();
2161 }
2162 #endif
2163
2164 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock, int sec_hi_ofs)
2165 {
2166         int version;
2167         int r;
2168         struct pvclock_wall_clock wc;
2169         u32 wc_sec_hi;
2170         u64 wall_nsec;
2171
2172         if (!wall_clock)
2173                 return;
2174
2175         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
2176         if (r)
2177                 return;
2178
2179         if (version & 1)
2180                 ++version;  /* first time write, random junk */
2181
2182         ++version;
2183
2184         if (kvm_write_guest(kvm, wall_clock, &version, sizeof(version)))
2185                 return;
2186
2187         /*
2188          * The guest calculates current wall clock time by adding
2189          * system time (updated by kvm_guest_time_update below) to the
2190          * wall clock specified here.  We do the reverse here.
2191          */
2192         wall_nsec = ktime_get_real_ns() - get_kvmclock_ns(kvm);
2193
2194         wc.nsec = do_div(wall_nsec, 1000000000);
2195         wc.sec = (u32)wall_nsec; /* overflow in 2106 guest time */
2196         wc.version = version;
2197
2198         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
2199
2200         if (sec_hi_ofs) {
2201                 wc_sec_hi = wall_nsec >> 32;
2202                 kvm_write_guest(kvm, wall_clock + sec_hi_ofs,
2203                                 &wc_sec_hi, sizeof(wc_sec_hi));
2204         }
2205
2206         version++;
2207         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
2208 }
2209
2210 static void kvm_write_system_time(struct kvm_vcpu *vcpu, gpa_t system_time,
2211                                   bool old_msr, bool host_initiated)
2212 {
2213         struct kvm_arch *ka = &vcpu->kvm->arch;
2214
2215         if (vcpu->vcpu_id == 0 && !host_initiated) {
2216                 if (ka->boot_vcpu_runs_old_kvmclock != old_msr)
2217                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2218
2219                 ka->boot_vcpu_runs_old_kvmclock = old_msr;
2220         }
2221
2222         vcpu->arch.time = system_time;
2223         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2224
2225         /* we verify if the enable bit is set... */
2226         vcpu->arch.pv_time_enabled = false;
2227         if (!(system_time & 1))
2228                 return;
2229
2230         if (!kvm_gfn_to_hva_cache_init(vcpu->kvm,
2231                                        &vcpu->arch.pv_time, system_time & ~1ULL,
2232                                        sizeof(struct pvclock_vcpu_time_info)))
2233                 vcpu->arch.pv_time_enabled = true;
2234
2235         return;
2236 }
2237
2238 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
2239 {
2240         do_shl32_div32(dividend, divisor);
2241         return dividend;
2242 }
2243
2244 static void kvm_get_time_scale(uint64_t scaled_hz, uint64_t base_hz,
2245                                s8 *pshift, u32 *pmultiplier)
2246 {
2247         uint64_t scaled64;
2248         int32_t  shift = 0;
2249         uint64_t tps64;
2250         uint32_t tps32;
2251
2252         tps64 = base_hz;
2253         scaled64 = scaled_hz;
2254         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
2255                 tps64 >>= 1;
2256                 shift--;
2257         }
2258
2259         tps32 = (uint32_t)tps64;
2260         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
2261                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
2262                         scaled64 >>= 1;
2263                 else
2264                         tps32 <<= 1;
2265                 shift++;
2266         }
2267
2268         *pshift = shift;
2269         *pmultiplier = div_frac(scaled64, tps32);
2270 }
2271
2272 #ifdef CONFIG_X86_64
2273 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
2274 #endif
2275
2276 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
2277 static unsigned long max_tsc_khz;
2278
2279 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
2280 {
2281         u64 v = (u64)khz * (1000000 + ppm);
2282         do_div(v, 1000000);
2283         return v;
2284 }
2285
2286 static void kvm_vcpu_write_tsc_multiplier(struct kvm_vcpu *vcpu, u64 l1_multiplier);
2287
2288 static int set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale)
2289 {
2290         u64 ratio;
2291
2292         /* Guest TSC same frequency as host TSC? */
2293         if (!scale) {
2294                 kvm_vcpu_write_tsc_multiplier(vcpu, kvm_default_tsc_scaling_ratio);
2295                 return 0;
2296         }
2297
2298         /* TSC scaling supported? */
2299         if (!kvm_has_tsc_control) {
2300                 if (user_tsc_khz > tsc_khz) {
2301                         vcpu->arch.tsc_catchup = 1;
2302                         vcpu->arch.tsc_always_catchup = 1;
2303                         return 0;
2304                 } else {
2305                         pr_warn_ratelimited("user requested TSC rate below hardware speed\n");
2306                         return -1;
2307                 }
2308         }
2309
2310         /* TSC scaling required  - calculate ratio */
2311         ratio = mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits,
2312                                 user_tsc_khz, tsc_khz);
2313
2314         if (ratio == 0 || ratio >= kvm_max_tsc_scaling_ratio) {
2315                 pr_warn_ratelimited("Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
2316                                     user_tsc_khz);
2317                 return -1;
2318         }
2319
2320         kvm_vcpu_write_tsc_multiplier(vcpu, ratio);
2321         return 0;
2322 }
2323
2324 static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz)
2325 {
2326         u32 thresh_lo, thresh_hi;
2327         int use_scaling = 0;
2328
2329         /* tsc_khz can be zero if TSC calibration fails */
2330         if (user_tsc_khz == 0) {
2331                 /* set tsc_scaling_ratio to a safe value */
2332                 kvm_vcpu_write_tsc_multiplier(vcpu, kvm_default_tsc_scaling_ratio);
2333                 return -1;
2334         }
2335
2336         /* Compute a scale to convert nanoseconds in TSC cycles */
2337         kvm_get_time_scale(user_tsc_khz * 1000LL, NSEC_PER_SEC,
2338                            &vcpu->arch.virtual_tsc_shift,
2339                            &vcpu->arch.virtual_tsc_mult);
2340         vcpu->arch.virtual_tsc_khz = user_tsc_khz;
2341
2342         /*
2343          * Compute the variation in TSC rate which is acceptable
2344          * within the range of tolerance and decide if the
2345          * rate being applied is within that bounds of the hardware
2346          * rate.  If so, no scaling or compensation need be done.
2347          */
2348         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
2349         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
2350         if (user_tsc_khz < thresh_lo || user_tsc_khz > thresh_hi) {
2351                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz, thresh_lo, thresh_hi);
2352                 use_scaling = 1;
2353         }
2354         return set_tsc_khz(vcpu, user_tsc_khz, use_scaling);
2355 }
2356
2357 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
2358 {
2359         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
2360                                       vcpu->arch.virtual_tsc_mult,
2361                                       vcpu->arch.virtual_tsc_shift);
2362         tsc += vcpu->arch.this_tsc_write;
2363         return tsc;
2364 }
2365
2366 #ifdef CONFIG_X86_64
2367 static inline int gtod_is_based_on_tsc(int mode)
2368 {
2369         return mode == VDSO_CLOCKMODE_TSC || mode == VDSO_CLOCKMODE_HVCLOCK;
2370 }
2371 #endif
2372
2373 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
2374 {
2375 #ifdef CONFIG_X86_64
2376         bool vcpus_matched;
2377         struct kvm_arch *ka = &vcpu->kvm->arch;
2378         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2379
2380         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
2381                          atomic_read(&vcpu->kvm->online_vcpus));
2382
2383         /*
2384          * Once the masterclock is enabled, always perform request in
2385          * order to update it.
2386          *
2387          * In order to enable masterclock, the host clocksource must be TSC
2388          * and the vcpus need to have matched TSCs.  When that happens,
2389          * perform request to enable masterclock.
2390          */
2391         if (ka->use_master_clock ||
2392             (gtod_is_based_on_tsc(gtod->clock.vclock_mode) && vcpus_matched))
2393                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2394
2395         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
2396                             atomic_read(&vcpu->kvm->online_vcpus),
2397                             ka->use_master_clock, gtod->clock.vclock_mode);
2398 #endif
2399 }
2400
2401 /*
2402  * Multiply tsc by a fixed point number represented by ratio.
2403  *
2404  * The most significant 64-N bits (mult) of ratio represent the
2405  * integral part of the fixed point number; the remaining N bits
2406  * (frac) represent the fractional part, ie. ratio represents a fixed
2407  * point number (mult + frac * 2^(-N)).
2408  *
2409  * N equals to kvm_tsc_scaling_ratio_frac_bits.
2410  */
2411 static inline u64 __scale_tsc(u64 ratio, u64 tsc)
2412 {
2413         return mul_u64_u64_shr(tsc, ratio, kvm_tsc_scaling_ratio_frac_bits);
2414 }
2415
2416 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc, u64 ratio)
2417 {
2418         u64 _tsc = tsc;
2419
2420         if (ratio != kvm_default_tsc_scaling_ratio)
2421                 _tsc = __scale_tsc(ratio, tsc);
2422
2423         return _tsc;
2424 }
2425 EXPORT_SYMBOL_GPL(kvm_scale_tsc);
2426
2427 static u64 kvm_compute_l1_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
2428 {
2429         u64 tsc;
2430
2431         tsc = kvm_scale_tsc(vcpu, rdtsc(), vcpu->arch.l1_tsc_scaling_ratio);
2432
2433         return target_tsc - tsc;
2434 }
2435
2436 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc)
2437 {
2438         return vcpu->arch.l1_tsc_offset +
2439                 kvm_scale_tsc(vcpu, host_tsc, vcpu->arch.l1_tsc_scaling_ratio);
2440 }
2441 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc);
2442
2443 u64 kvm_calc_nested_tsc_offset(u64 l1_offset, u64 l2_offset, u64 l2_multiplier)
2444 {
2445         u64 nested_offset;
2446
2447         if (l2_multiplier == kvm_default_tsc_scaling_ratio)
2448                 nested_offset = l1_offset;
2449         else
2450                 nested_offset = mul_s64_u64_shr((s64) l1_offset, l2_multiplier,
2451                                                 kvm_tsc_scaling_ratio_frac_bits);
2452
2453         nested_offset += l2_offset;
2454         return nested_offset;
2455 }
2456 EXPORT_SYMBOL_GPL(kvm_calc_nested_tsc_offset);
2457
2458 u64 kvm_calc_nested_tsc_multiplier(u64 l1_multiplier, u64 l2_multiplier)
2459 {
2460         if (l2_multiplier != kvm_default_tsc_scaling_ratio)
2461                 return mul_u64_u64_shr(l1_multiplier, l2_multiplier,
2462                                        kvm_tsc_scaling_ratio_frac_bits);
2463
2464         return l1_multiplier;
2465 }
2466 EXPORT_SYMBOL_GPL(kvm_calc_nested_tsc_multiplier);
2467
2468 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu *vcpu, u64 l1_offset)
2469 {
2470         trace_kvm_write_tsc_offset(vcpu->vcpu_id,
2471                                    vcpu->arch.l1_tsc_offset,
2472                                    l1_offset);
2473
2474         vcpu->arch.l1_tsc_offset = l1_offset;
2475
2476         /*
2477          * If we are here because L1 chose not to trap WRMSR to TSC then
2478          * according to the spec this should set L1's TSC (as opposed to
2479          * setting L1's offset for L2).
2480          */
2481         if (is_guest_mode(vcpu))
2482                 vcpu->arch.tsc_offset = kvm_calc_nested_tsc_offset(
2483                         l1_offset,
2484                         static_call(kvm_x86_get_l2_tsc_offset)(vcpu),
2485                         static_call(kvm_x86_get_l2_tsc_multiplier)(vcpu));
2486         else
2487                 vcpu->arch.tsc_offset = l1_offset;
2488
2489         static_call(kvm_x86_write_tsc_offset)(vcpu, vcpu->arch.tsc_offset);
2490 }
2491
2492 static void kvm_vcpu_write_tsc_multiplier(struct kvm_vcpu *vcpu, u64 l1_multiplier)
2493 {
2494         vcpu->arch.l1_tsc_scaling_ratio = l1_multiplier;
2495
2496         /* Userspace is changing the multiplier while L2 is active */
2497         if (is_guest_mode(vcpu))
2498                 vcpu->arch.tsc_scaling_ratio = kvm_calc_nested_tsc_multiplier(
2499                         l1_multiplier,
2500                         static_call(kvm_x86_get_l2_tsc_multiplier)(vcpu));
2501         else
2502                 vcpu->arch.tsc_scaling_ratio = l1_multiplier;
2503
2504         if (kvm_has_tsc_control)
2505                 static_call(kvm_x86_write_tsc_multiplier)(
2506                         vcpu, vcpu->arch.tsc_scaling_ratio);
2507 }
2508
2509 static inline bool kvm_check_tsc_unstable(void)
2510 {
2511 #ifdef CONFIG_X86_64
2512         /*
2513          * TSC is marked unstable when we're running on Hyper-V,
2514          * 'TSC page' clocksource is good.
2515          */
2516         if (pvclock_gtod_data.clock.vclock_mode == VDSO_CLOCKMODE_HVCLOCK)
2517                 return false;
2518 #endif
2519         return check_tsc_unstable();
2520 }
2521
2522 /*
2523  * Infers attempts to synchronize the guest's tsc from host writes. Sets the
2524  * offset for the vcpu and tracks the TSC matching generation that the vcpu
2525  * participates in.
2526  */
2527 static void __kvm_synchronize_tsc(struct kvm_vcpu *vcpu, u64 offset, u64 tsc,
2528                                   u64 ns, bool matched)
2529 {
2530         struct kvm *kvm = vcpu->kvm;
2531
2532         lockdep_assert_held(&kvm->arch.tsc_write_lock);
2533
2534         /*
2535          * We also track th most recent recorded KHZ, write and time to
2536          * allow the matching interval to be extended at each write.
2537          */
2538         kvm->arch.last_tsc_nsec = ns;
2539         kvm->arch.last_tsc_write = tsc;
2540         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
2541         kvm->arch.last_tsc_offset = offset;
2542
2543         vcpu->arch.last_guest_tsc = tsc;
2544
2545         kvm_vcpu_write_tsc_offset(vcpu, offset);
2546
2547         if (!matched) {
2548                 /*
2549                  * We split periods of matched TSC writes into generations.
2550                  * For each generation, we track the original measured
2551                  * nanosecond time, offset, and write, so if TSCs are in
2552                  * sync, we can match exact offset, and if not, we can match
2553                  * exact software computation in compute_guest_tsc()
2554                  *
2555                  * These values are tracked in kvm->arch.cur_xxx variables.
2556                  */
2557                 kvm->arch.cur_tsc_generation++;
2558                 kvm->arch.cur_tsc_nsec = ns;
2559                 kvm->arch.cur_tsc_write = tsc;
2560                 kvm->arch.cur_tsc_offset = offset;
2561                 kvm->arch.nr_vcpus_matched_tsc = 0;
2562         } else if (vcpu->arch.this_tsc_generation != kvm->arch.cur_tsc_generation) {
2563                 kvm->arch.nr_vcpus_matched_tsc++;
2564         }
2565
2566         /* Keep track of which generation this VCPU has synchronized to */
2567         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
2568         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
2569         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
2570
2571         kvm_track_tsc_matching(vcpu);
2572 }
2573
2574 static void kvm_synchronize_tsc(struct kvm_vcpu *vcpu, u64 data)
2575 {
2576         struct kvm *kvm = vcpu->kvm;
2577         u64 offset, ns, elapsed;
2578         unsigned long flags;
2579         bool matched = false;
2580         bool synchronizing = false;
2581
2582         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
2583         offset = kvm_compute_l1_tsc_offset(vcpu, data);
2584         ns = get_kvmclock_base_ns();
2585         elapsed = ns - kvm->arch.last_tsc_nsec;
2586
2587         if (vcpu->arch.virtual_tsc_khz) {
2588                 if (data == 0) {
2589                         /*
2590                          * detection of vcpu initialization -- need to sync
2591                          * with other vCPUs. This particularly helps to keep
2592                          * kvm_clock stable after CPU hotplug
2593                          */
2594                         synchronizing = true;
2595                 } else {
2596                         u64 tsc_exp = kvm->arch.last_tsc_write +
2597                                                 nsec_to_cycles(vcpu, elapsed);
2598                         u64 tsc_hz = vcpu->arch.virtual_tsc_khz * 1000LL;
2599                         /*
2600                          * Special case: TSC write with a small delta (1 second)
2601                          * of virtual cycle time against real time is
2602                          * interpreted as an attempt to synchronize the CPU.
2603                          */
2604                         synchronizing = data < tsc_exp + tsc_hz &&
2605                                         data + tsc_hz > tsc_exp;
2606                 }
2607         }
2608
2609         /*
2610          * For a reliable TSC, we can match TSC offsets, and for an unstable
2611          * TSC, we add elapsed time in this computation.  We could let the
2612          * compensation code attempt to catch up if we fall behind, but
2613          * it's better to try to match offsets from the beginning.
2614          */
2615         if (synchronizing &&
2616             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
2617                 if (!kvm_check_tsc_unstable()) {
2618                         offset = kvm->arch.cur_tsc_offset;
2619                 } else {
2620                         u64 delta = nsec_to_cycles(vcpu, elapsed);
2621                         data += delta;
2622                         offset = kvm_compute_l1_tsc_offset(vcpu, data);
2623                 }
2624                 matched = true;
2625         }
2626
2627         __kvm_synchronize_tsc(vcpu, offset, data, ns, matched);
2628         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
2629 }
2630
2631 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
2632                                            s64 adjustment)
2633 {
2634         u64 tsc_offset = vcpu->arch.l1_tsc_offset;
2635         kvm_vcpu_write_tsc_offset(vcpu, tsc_offset + adjustment);
2636 }
2637
2638 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
2639 {
2640         if (vcpu->arch.l1_tsc_scaling_ratio != kvm_default_tsc_scaling_ratio)
2641                 WARN_ON(adjustment < 0);
2642         adjustment = kvm_scale_tsc(vcpu, (u64) adjustment,
2643                                    vcpu->arch.l1_tsc_scaling_ratio);
2644         adjust_tsc_offset_guest(vcpu, adjustment);
2645 }
2646
2647 #ifdef CONFIG_X86_64
2648
2649 static u64 read_tsc(void)
2650 {
2651         u64 ret = (u64)rdtsc_ordered();
2652         u64 last = pvclock_gtod_data.clock.cycle_last;
2653
2654         if (likely(ret >= last))
2655                 return ret;
2656
2657         /*
2658          * GCC likes to generate cmov here, but this branch is extremely
2659          * predictable (it's just a function of time and the likely is
2660          * very likely) and there's a data dependence, so force GCC
2661          * to generate a branch instead.  I don't barrier() because
2662          * we don't actually need a barrier, and if this function
2663          * ever gets inlined it will generate worse code.
2664          */
2665         asm volatile ("");
2666         return last;
2667 }
2668
2669 static inline u64 vgettsc(struct pvclock_clock *clock, u64 *tsc_timestamp,
2670                           int *mode)
2671 {
2672         long v;
2673         u64 tsc_pg_val;
2674
2675         switch (clock->vclock_mode) {
2676         case VDSO_CLOCKMODE_HVCLOCK:
2677                 tsc_pg_val = hv_read_tsc_page_tsc(hv_get_tsc_page(),
2678                                                   tsc_timestamp);
2679                 if (tsc_pg_val != U64_MAX) {
2680                         /* TSC page valid */
2681                         *mode = VDSO_CLOCKMODE_HVCLOCK;
2682                         v = (tsc_pg_val - clock->cycle_last) &
2683                                 clock->mask;
2684                 } else {
2685                         /* TSC page invalid */
2686                         *mode = VDSO_CLOCKMODE_NONE;
2687                 }
2688                 break;
2689         case VDSO_CLOCKMODE_TSC:
2690                 *mode = VDSO_CLOCKMODE_TSC;
2691                 *tsc_timestamp = read_tsc();
2692                 v = (*tsc_timestamp - clock->cycle_last) &
2693                         clock->mask;
2694                 break;
2695         default:
2696                 *mode = VDSO_CLOCKMODE_NONE;
2697         }
2698
2699         if (*mode == VDSO_CLOCKMODE_NONE)
2700                 *tsc_timestamp = v = 0;
2701
2702         return v * clock->mult;
2703 }
2704
2705 static int do_monotonic_raw(s64 *t, u64 *tsc_timestamp)
2706 {
2707         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2708         unsigned long seq;
2709         int mode;
2710         u64 ns;
2711
2712         do {
2713                 seq = read_seqcount_begin(&gtod->seq);
2714                 ns = gtod->raw_clock.base_cycles;
2715                 ns += vgettsc(&gtod->raw_clock, tsc_timestamp, &mode);
2716                 ns >>= gtod->raw_clock.shift;
2717                 ns += ktime_to_ns(ktime_add(gtod->raw_clock.offset, gtod->offs_boot));
2718         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
2719         *t = ns;
2720
2721         return mode;
2722 }
2723
2724 static int do_realtime(struct timespec64 *ts, u64 *tsc_timestamp)
2725 {
2726         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2727         unsigned long seq;
2728         int mode;
2729         u64 ns;
2730
2731         do {
2732                 seq = read_seqcount_begin(&gtod->seq);
2733                 ts->tv_sec = gtod->wall_time_sec;
2734                 ns = gtod->clock.base_cycles;
2735                 ns += vgettsc(&gtod->clock, tsc_timestamp, &mode);
2736                 ns >>= gtod->clock.shift;
2737         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
2738
2739         ts->tv_sec += __iter_div_u64_rem(ns, NSEC_PER_SEC, &ns);
2740         ts->tv_nsec = ns;
2741
2742         return mode;
2743 }
2744
2745 /* returns true if host is using TSC based clocksource */
2746 static bool kvm_get_time_and_clockread(s64 *kernel_ns, u64 *tsc_timestamp)
2747 {
2748         /* checked again under seqlock below */
2749         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2750                 return false;
2751
2752         return gtod_is_based_on_tsc(do_monotonic_raw(kernel_ns,
2753                                                       tsc_timestamp));
2754 }
2755
2756 /* returns true if host is using TSC based clocksource */
2757 static bool kvm_get_walltime_and_clockread(struct timespec64 *ts,
2758                                            u64 *tsc_timestamp)
2759 {
2760         /* checked again under seqlock below */
2761         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2762                 return false;
2763
2764         return gtod_is_based_on_tsc(do_realtime(ts, tsc_timestamp));
2765 }
2766 #endif
2767
2768 /*
2769  *
2770  * Assuming a stable TSC across physical CPUS, and a stable TSC
2771  * across virtual CPUs, the following condition is possible.
2772  * Each numbered line represents an event visible to both
2773  * CPUs at the next numbered event.
2774  *
2775  * "timespecX" represents host monotonic time. "tscX" represents
2776  * RDTSC value.
2777  *
2778  *              VCPU0 on CPU0           |       VCPU1 on CPU1
2779  *
2780  * 1.  read timespec0,tsc0
2781  * 2.                                   | timespec1 = timespec0 + N
2782  *                                      | tsc1 = tsc0 + M
2783  * 3. transition to guest               | transition to guest
2784  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
2785  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
2786  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
2787  *
2788  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
2789  *
2790  *      - ret0 < ret1
2791  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
2792  *              ...
2793  *      - 0 < N - M => M < N
2794  *
2795  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
2796  * always the case (the difference between two distinct xtime instances
2797  * might be smaller then the difference between corresponding TSC reads,
2798  * when updating guest vcpus pvclock areas).
2799  *
2800  * To avoid that problem, do not allow visibility of distinct
2801  * system_timestamp/tsc_timestamp values simultaneously: use a master
2802  * copy of host monotonic time values. Update that master copy
2803  * in lockstep.
2804  *
2805  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
2806  *
2807  */
2808
2809 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
2810 {
2811 #ifdef CONFIG_X86_64
2812         struct kvm_arch *ka = &kvm->arch;
2813         int vclock_mode;
2814         bool host_tsc_clocksource, vcpus_matched;
2815
2816         lockdep_assert_held(&kvm->arch.tsc_write_lock);
2817         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
2818                         atomic_read(&kvm->online_vcpus));
2819
2820         /*
2821          * If the host uses TSC clock, then passthrough TSC as stable
2822          * to the guest.
2823          */
2824         host_tsc_clocksource = kvm_get_time_and_clockread(
2825                                         &ka->master_kernel_ns,
2826                                         &ka->master_cycle_now);
2827
2828         ka->use_master_clock = host_tsc_clocksource && vcpus_matched
2829                                 && !ka->backwards_tsc_observed
2830                                 && !ka->boot_vcpu_runs_old_kvmclock;
2831
2832         if (ka->use_master_clock)
2833                 atomic_set(&kvm_guest_has_master_clock, 1);
2834
2835         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
2836         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
2837                                         vcpus_matched);
2838 #endif
2839 }
2840
2841 static void kvm_make_mclock_inprogress_request(struct kvm *kvm)
2842 {
2843         kvm_make_all_cpus_request(kvm, KVM_REQ_MCLOCK_INPROGRESS);
2844 }
2845
2846 static void __kvm_start_pvclock_update(struct kvm *kvm)
2847 {
2848         raw_spin_lock_irq(&kvm->arch.tsc_write_lock);
2849         write_seqcount_begin(&kvm->arch.pvclock_sc);
2850 }
2851
2852 static void kvm_start_pvclock_update(struct kvm *kvm)
2853 {
2854         kvm_make_mclock_inprogress_request(kvm);
2855
2856         /* no guest entries from this point */
2857         __kvm_start_pvclock_update(kvm);
2858 }
2859
2860 static void kvm_end_pvclock_update(struct kvm *kvm)
2861 {
2862         struct kvm_arch *ka = &kvm->arch;
2863         struct kvm_vcpu *vcpu;
2864         unsigned long i;
2865
2866         write_seqcount_end(&ka->pvclock_sc);
2867         raw_spin_unlock_irq(&ka->tsc_write_lock);
2868         kvm_for_each_vcpu(i, vcpu, kvm)
2869                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2870
2871         /* guest entries allowed */
2872         kvm_for_each_vcpu(i, vcpu, kvm)
2873                 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
2874 }
2875
2876 static void kvm_update_masterclock(struct kvm *kvm)
2877 {
2878         kvm_hv_invalidate_tsc_page(kvm);
2879         kvm_start_pvclock_update(kvm);
2880         pvclock_update_vm_gtod_copy(kvm);
2881         kvm_end_pvclock_update(kvm);
2882 }
2883
2884 /* Called within read_seqcount_begin/retry for kvm->pvclock_sc.  */
2885 static void __get_kvmclock(struct kvm *kvm, struct kvm_clock_data *data)
2886 {
2887         struct kvm_arch *ka = &kvm->arch;
2888         struct pvclock_vcpu_time_info hv_clock;
2889
2890         /* both __this_cpu_read() and rdtsc() should be on the same cpu */
2891         get_cpu();
2892
2893         data->flags = 0;
2894         if (ka->use_master_clock && __this_cpu_read(cpu_tsc_khz)) {
2895 #ifdef CONFIG_X86_64
2896                 struct timespec64 ts;
2897
2898                 if (kvm_get_walltime_and_clockread(&ts, &data->host_tsc)) {
2899                         data->realtime = ts.tv_nsec + NSEC_PER_SEC * ts.tv_sec;
2900                         data->flags |= KVM_CLOCK_REALTIME | KVM_CLOCK_HOST_TSC;
2901                 } else
2902 #endif
2903                 data->host_tsc = rdtsc();
2904
2905                 data->flags |= KVM_CLOCK_TSC_STABLE;
2906                 hv_clock.tsc_timestamp = ka->master_cycle_now;
2907                 hv_clock.system_time = ka->master_kernel_ns + ka->kvmclock_offset;
2908                 kvm_get_time_scale(NSEC_PER_SEC, __this_cpu_read(cpu_tsc_khz) * 1000LL,
2909                                    &hv_clock.tsc_shift,
2910                                    &hv_clock.tsc_to_system_mul);
2911                 data->clock = __pvclock_read_cycles(&hv_clock, data->host_tsc);
2912         } else {
2913                 data->clock = get_kvmclock_base_ns() + ka->kvmclock_offset;
2914         }
2915
2916         put_cpu();
2917 }
2918
2919 static void get_kvmclock(struct kvm *kvm, struct kvm_clock_data *data)
2920 {
2921         struct kvm_arch *ka = &kvm->arch;
2922         unsigned seq;
2923
2924         do {
2925                 seq = read_seqcount_begin(&ka->pvclock_sc);
2926                 __get_kvmclock(kvm, data);
2927         } while (read_seqcount_retry(&ka->pvclock_sc, seq));
2928 }
2929
2930 u64 get_kvmclock_ns(struct kvm *kvm)
2931 {
2932         struct kvm_clock_data data;
2933
2934         get_kvmclock(kvm, &data);
2935         return data.clock;
2936 }
2937
2938 static void kvm_setup_pvclock_page(struct kvm_vcpu *v,
2939                                    struct gfn_to_hva_cache *cache,
2940                                    unsigned int offset)
2941 {
2942         struct kvm_vcpu_arch *vcpu = &v->arch;
2943         struct pvclock_vcpu_time_info guest_hv_clock;
2944
2945         if (unlikely(kvm_read_guest_offset_cached(v->kvm, cache,
2946                 &guest_hv_clock, offset, sizeof(guest_hv_clock))))
2947                 return;
2948
2949         /* This VCPU is paused, but it's legal for a guest to read another
2950          * VCPU's kvmclock, so we really have to follow the specification where
2951          * it says that version is odd if data is being modified, and even after
2952          * it is consistent.
2953          *
2954          * Version field updates must be kept separate.  This is because
2955          * kvm_write_guest_cached might use a "rep movs" instruction, and
2956          * writes within a string instruction are weakly ordered.  So there
2957          * are three writes overall.
2958          *
2959          * As a small optimization, only write the version field in the first
2960          * and third write.  The vcpu->pv_time cache is still valid, because the
2961          * version field is the first in the struct.
2962          */
2963         BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info, version) != 0);
2964
2965         if (guest_hv_clock.version & 1)
2966                 ++guest_hv_clock.version;  /* first time write, random junk */
2967
2968         vcpu->hv_clock.version = guest_hv_clock.version + 1;
2969         kvm_write_guest_offset_cached(v->kvm, cache,
2970                                       &vcpu->hv_clock, offset,
2971                                       sizeof(vcpu->hv_clock.version));
2972
2973         smp_wmb();
2974
2975         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
2976         vcpu->hv_clock.flags |= (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
2977
2978         if (vcpu->pvclock_set_guest_stopped_request) {
2979                 vcpu->hv_clock.flags |= PVCLOCK_GUEST_STOPPED;
2980                 vcpu->pvclock_set_guest_stopped_request = false;
2981         }
2982
2983         trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
2984
2985         kvm_write_guest_offset_cached(v->kvm, cache,
2986                                       &vcpu->hv_clock, offset,
2987                                       sizeof(vcpu->hv_clock));
2988
2989         smp_wmb();
2990
2991         vcpu->hv_clock.version++;
2992         kvm_write_guest_offset_cached(v->kvm, cache,
2993                                      &vcpu->hv_clock, offset,
2994                                      sizeof(vcpu->hv_clock.version));
2995 }
2996
2997 static int kvm_guest_time_update(struct kvm_vcpu *v)
2998 {
2999         unsigned long flags, tgt_tsc_khz;
3000         unsigned seq;
3001         struct kvm_vcpu_arch *vcpu = &v->arch;
3002         struct kvm_arch *ka = &v->kvm->arch;
3003         s64 kernel_ns;
3004         u64 tsc_timestamp, host_tsc;
3005         u8 pvclock_flags;
3006         bool use_master_clock;
3007
3008         kernel_ns = 0;
3009         host_tsc = 0;
3010
3011         /*
3012          * If the host uses TSC clock, then passthrough TSC as stable
3013          * to the guest.
3014          */
3015         do {
3016                 seq = read_seqcount_begin(&ka->pvclock_sc);
3017                 use_master_clock = ka->use_master_clock;
3018                 if (use_master_clock) {
3019                         host_tsc = ka->master_cycle_now;
3020                         kernel_ns = ka->master_kernel_ns;
3021                 }
3022         } while (read_seqcount_retry(&ka->pvclock_sc, seq));
3023
3024         /* Keep irq disabled to prevent changes to the clock */
3025         local_irq_save(flags);
3026         tgt_tsc_khz = __this_cpu_read(cpu_tsc_khz);
3027         if (unlikely(tgt_tsc_khz == 0)) {
3028                 local_irq_restore(flags);
3029                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
3030                 return 1;
3031         }
3032         if (!use_master_clock) {
3033                 host_tsc = rdtsc();
3034                 kernel_ns = get_kvmclock_base_ns();
3035         }
3036
3037         tsc_timestamp = kvm_read_l1_tsc(v, host_tsc);
3038
3039         /*
3040          * We may have to catch up the TSC to match elapsed wall clock
3041          * time for two reasons, even if kvmclock is used.
3042          *   1) CPU could have been running below the maximum TSC rate
3043          *   2) Broken TSC compensation resets the base at each VCPU
3044          *      entry to avoid unknown leaps of TSC even when running
3045          *      again on the same CPU.  This may cause apparent elapsed
3046          *      time to disappear, and the guest to stand still or run
3047          *      very slowly.
3048          */
3049         if (vcpu->tsc_catchup) {
3050                 u64 tsc = compute_guest_tsc(v, kernel_ns);
3051                 if (tsc > tsc_timestamp) {
3052                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
3053                         tsc_timestamp = tsc;
3054                 }
3055         }
3056
3057         local_irq_restore(flags);
3058
3059         /* With all the info we got, fill in the values */
3060
3061         if (kvm_has_tsc_control)
3062                 tgt_tsc_khz = kvm_scale_tsc(v, tgt_tsc_khz,
3063                                             v->arch.l1_tsc_scaling_ratio);
3064
3065         if (unlikely(vcpu->hw_tsc_khz != tgt_tsc_khz)) {
3066                 kvm_get_time_scale(NSEC_PER_SEC, tgt_tsc_khz * 1000LL,
3067                                    &vcpu->hv_clock.tsc_shift,
3068                                    &vcpu->hv_clock.tsc_to_system_mul);
3069                 vcpu->hw_tsc_khz = tgt_tsc_khz;
3070         }
3071
3072         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
3073         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
3074         vcpu->last_guest_tsc = tsc_timestamp;
3075
3076         /* If the host uses TSC clocksource, then it is stable */
3077         pvclock_flags = 0;
3078         if (use_master_clock)
3079                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
3080
3081         vcpu->hv_clock.flags = pvclock_flags;
3082
3083         if (vcpu->pv_time_enabled)
3084                 kvm_setup_pvclock_page(v, &vcpu->pv_time, 0);
3085         if (vcpu->xen.vcpu_info_set)
3086                 kvm_setup_pvclock_page(v, &vcpu->xen.vcpu_info_cache,
3087                                        offsetof(struct compat_vcpu_info, time));
3088         if (vcpu->xen.vcpu_time_info_set)
3089                 kvm_setup_pvclock_page(v, &vcpu->xen.vcpu_time_info_cache, 0);
3090         if (!v->vcpu_idx)
3091                 kvm_hv_setup_tsc_page(v->kvm, &vcpu->hv_clock);
3092         return 0;
3093 }
3094
3095 /*
3096  * kvmclock updates which are isolated to a given vcpu, such as
3097  * vcpu->cpu migration, should not allow system_timestamp from
3098  * the rest of the vcpus to remain static. Otherwise ntp frequency
3099  * correction applies to one vcpu's system_timestamp but not
3100  * the others.
3101  *
3102  * So in those cases, request a kvmclock update for all vcpus.
3103  * We need to rate-limit these requests though, as they can
3104  * considerably slow guests that have a large number of vcpus.
3105  * The time for a remote vcpu to update its kvmclock is bound
3106  * by the delay we use to rate-limit the updates.
3107  */
3108
3109 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
3110
3111 static void kvmclock_update_fn(struct work_struct *work)
3112 {
3113         unsigned long i;
3114         struct delayed_work *dwork = to_delayed_work(work);
3115         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
3116                                            kvmclock_update_work);
3117         struct kvm *kvm = container_of(ka, struct kvm, arch);
3118         struct kvm_vcpu *vcpu;
3119
3120         kvm_for_each_vcpu(i, vcpu, kvm) {
3121                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3122                 kvm_vcpu_kick(vcpu);
3123         }
3124 }
3125
3126 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
3127 {
3128         struct kvm *kvm = v->kvm;
3129
3130         kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
3131         schedule_delayed_work(&kvm->arch.kvmclock_update_work,
3132                                         KVMCLOCK_UPDATE_DELAY);
3133 }
3134
3135 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
3136
3137 static void kvmclock_sync_fn(struct work_struct *work)
3138 {
3139         struct delayed_work *dwork = to_delayed_work(work);
3140         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
3141                                            kvmclock_sync_work);
3142         struct kvm *kvm = container_of(ka, struct kvm, arch);
3143
3144         if (!kvmclock_periodic_sync)
3145                 return;
3146
3147         schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
3148         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
3149                                         KVMCLOCK_SYNC_PERIOD);
3150 }
3151
3152 /*
3153  * On AMD, HWCR[McStatusWrEn] controls whether setting MCi_STATUS results in #GP.
3154  */
3155 static bool can_set_mci_status(struct kvm_vcpu *vcpu)
3156 {
3157         /* McStatusWrEn enabled? */
3158         if (guest_cpuid_is_amd_or_hygon(vcpu))
3159                 return !!(vcpu->arch.msr_hwcr & BIT_ULL(18));
3160
3161         return false;
3162 }
3163
3164 static int set_msr_mce(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3165 {
3166         u64 mcg_cap = vcpu->arch.mcg_cap;
3167         unsigned bank_num = mcg_cap & 0xff;
3168         u32 msr = msr_info->index;
3169         u64 data = msr_info->data;
3170
3171         switch (msr) {
3172         case MSR_IA32_MCG_STATUS:
3173                 vcpu->arch.mcg_status = data;
3174                 break;
3175         case MSR_IA32_MCG_CTL:
3176                 if (!(mcg_cap & MCG_CTL_P) &&
3177                     (data || !msr_info->host_initiated))
3178                         return 1;
3179                 if (data != 0 && data != ~(u64)0)
3180                         return 1;
3181                 vcpu->arch.mcg_ctl = data;
3182                 break;
3183         default:
3184                 if (msr >= MSR_IA32_MC0_CTL &&
3185                     msr < MSR_IA32_MCx_CTL(bank_num)) {
3186                         u32 offset = array_index_nospec(
3187                                 msr - MSR_IA32_MC0_CTL,
3188                                 MSR_IA32_MCx_CTL(bank_num) - MSR_IA32_MC0_CTL);
3189
3190                         /* only 0 or all 1s can be written to IA32_MCi_CTL
3191                          * some Linux kernels though clear bit 10 in bank 4 to
3192                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
3193                          * this to avoid an uncatched #GP in the guest
3194                          */
3195                         if ((offset & 0x3) == 0 &&
3196                             data != 0 && (data | (1 << 10)) != ~(u64)0)
3197                                 return -1;
3198
3199                         /* MCi_STATUS */
3200                         if (!msr_info->host_initiated &&
3201                             (offset & 0x3) == 1 && data != 0) {
3202                                 if (!can_set_mci_status(vcpu))
3203                                         return -1;
3204                         }
3205
3206                         vcpu->arch.mce_banks[offset] = data;
3207                         break;
3208                 }
3209                 return 1;
3210         }
3211         return 0;
3212 }
3213
3214 static inline bool kvm_pv_async_pf_enabled(struct kvm_vcpu *vcpu)
3215 {
3216         u64 mask = KVM_ASYNC_PF_ENABLED | KVM_ASYNC_PF_DELIVERY_AS_INT;
3217
3218         return (vcpu->arch.apf.msr_en_val & mask) == mask;
3219 }
3220
3221 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
3222 {
3223         gpa_t gpa = data & ~0x3f;
3224
3225         /* Bits 4:5 are reserved, Should be zero */
3226         if (data & 0x30)
3227                 return 1;
3228
3229         if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_VMEXIT) &&
3230             (data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT))
3231                 return 1;
3232
3233         if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT) &&
3234             (data & KVM_ASYNC_PF_DELIVERY_AS_INT))
3235                 return 1;
3236
3237         if (!lapic_in_kernel(vcpu))
3238                 return data ? 1 : 0;
3239
3240         vcpu->arch.apf.msr_en_val = data;
3241
3242         if (!kvm_pv_async_pf_enabled(vcpu)) {
3243                 kvm_clear_async_pf_completion_queue(vcpu);
3244                 kvm_async_pf_hash_reset(vcpu);
3245                 return 0;
3246         }
3247
3248         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
3249                                         sizeof(u64)))
3250                 return 1;
3251
3252         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
3253         vcpu->arch.apf.delivery_as_pf_vmexit = data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT;
3254
3255         kvm_async_pf_wakeup_all(vcpu);
3256
3257         return 0;
3258 }
3259
3260 static int kvm_pv_enable_async_pf_int(struct kvm_vcpu *vcpu, u64 data)
3261 {
3262         /* Bits 8-63 are reserved */
3263         if (data >> 8)
3264                 return 1;
3265
3266         if (!lapic_in_kernel(vcpu))
3267                 return 1;
3268
3269         vcpu->arch.apf.msr_int_val = data;
3270
3271         vcpu->arch.apf.vec = data & KVM_ASYNC_PF_VEC_MASK;
3272
3273         return 0;
3274 }
3275
3276 static void kvmclock_reset(struct kvm_vcpu *vcpu)
3277 {
3278         vcpu->arch.pv_time_enabled = false;
3279         vcpu->arch.time = 0;
3280 }
3281
3282 static void kvm_vcpu_flush_tlb_all(struct kvm_vcpu *vcpu)
3283 {
3284         ++vcpu->stat.tlb_flush;
3285         static_call(kvm_x86_tlb_flush_all)(vcpu);
3286 }
3287
3288 static void kvm_vcpu_flush_tlb_guest(struct kvm_vcpu *vcpu)
3289 {
3290         ++vcpu->stat.tlb_flush;
3291
3292         if (!tdp_enabled) {
3293                 /*
3294                  * A TLB flush on behalf of the guest is equivalent to
3295                  * INVPCID(all), toggling CR4.PGE, etc., which requires
3296                  * a forced sync of the shadow page tables.  Ensure all the
3297                  * roots are synced and the guest TLB in hardware is clean.
3298                  */
3299                 kvm_mmu_sync_roots(vcpu);
3300                 kvm_mmu_sync_prev_roots(vcpu);
3301         }
3302
3303         static_call(kvm_x86_tlb_flush_guest)(vcpu);
3304 }
3305
3306
3307 static inline void kvm_vcpu_flush_tlb_current(struct kvm_vcpu *vcpu)
3308 {
3309         ++vcpu->stat.tlb_flush;
3310         static_call(kvm_x86_tlb_flush_current)(vcpu);
3311 }
3312
3313 /*
3314  * Service "local" TLB flush requests, which are specific to the current MMU
3315  * context.  In addition to the generic event handling in vcpu_enter_guest(),
3316  * TLB flushes that are targeted at an MMU context also need to be serviced
3317  * prior before nested VM-Enter/VM-Exit.
3318  */
3319 void kvm_service_local_tlb_flush_requests(struct kvm_vcpu *vcpu)
3320 {
3321         if (kvm_check_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu))
3322                 kvm_vcpu_flush_tlb_current(vcpu);
3323
3324         if (kvm_check_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu))
3325                 kvm_vcpu_flush_tlb_guest(vcpu);
3326 }
3327 EXPORT_SYMBOL_GPL(kvm_service_local_tlb_flush_requests);
3328
3329 static void record_steal_time(struct kvm_vcpu *vcpu)
3330 {
3331         struct gfn_to_hva_cache *ghc = &vcpu->arch.st.cache;
3332         struct kvm_steal_time __user *st;
3333         struct kvm_memslots *slots;
3334         u64 steal;
3335         u32 version;
3336
3337         if (kvm_xen_msr_enabled(vcpu->kvm)) {
3338                 kvm_xen_runstate_set_running(vcpu);
3339                 return;
3340         }
3341
3342         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
3343                 return;
3344
3345         if (WARN_ON_ONCE(current->mm != vcpu->kvm->mm))
3346                 return;
3347
3348         slots = kvm_memslots(vcpu->kvm);
3349
3350         if (unlikely(slots->generation != ghc->generation ||
3351                      kvm_is_error_hva(ghc->hva) || !ghc->memslot)) {
3352                 gfn_t gfn = vcpu->arch.st.msr_val & KVM_STEAL_VALID_BITS;
3353
3354                 /* We rely on the fact that it fits in a single page. */
3355                 BUILD_BUG_ON((sizeof(*st) - 1) & KVM_STEAL_VALID_BITS);
3356
3357                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, ghc, gfn, sizeof(*st)) ||
3358                     kvm_is_error_hva(ghc->hva) || !ghc->memslot)
3359                         return;
3360         }
3361
3362         st = (struct kvm_steal_time __user *)ghc->hva;
3363         /*
3364          * Doing a TLB flush here, on the guest's behalf, can avoid
3365          * expensive IPIs.
3366          */
3367         if (guest_pv_has(vcpu, KVM_FEATURE_PV_TLB_FLUSH)) {
3368                 u8 st_preempted = 0;
3369                 int err = -EFAULT;
3370
3371                 if (!user_access_begin(st, sizeof(*st)))
3372                         return;
3373
3374                 asm volatile("1: xchgb %0, %2\n"
3375                              "xor %1, %1\n"
3376                              "2:\n"
3377                              _ASM_EXTABLE_UA(1b, 2b)
3378                              : "+q" (st_preempted),
3379                                "+&r" (err),
3380                                "+m" (st->preempted));
3381                 if (err)
3382                         goto out;
3383
3384                 user_access_end();
3385
3386                 vcpu->arch.st.preempted = 0;
3387
3388                 trace_kvm_pv_tlb_flush(vcpu->vcpu_id,
3389                                        st_preempted & KVM_VCPU_FLUSH_TLB);
3390                 if (st_preempted & KVM_VCPU_FLUSH_TLB)
3391                         kvm_vcpu_flush_tlb_guest(vcpu);
3392
3393                 if (!user_access_begin(st, sizeof(*st)))
3394                         goto dirty;
3395         } else {
3396                 if (!user_access_begin(st, sizeof(*st)))
3397                         return;
3398
3399                 unsafe_put_user(0, &st->preempted, out);
3400                 vcpu->arch.st.preempted = 0;
3401         }
3402
3403         unsafe_get_user(version, &st->version, out);
3404         if (version & 1)
3405                 version += 1;  /* first time write, random junk */
3406
3407         version += 1;
3408         unsafe_put_user(version, &st->version, out);
3409
3410         smp_wmb();
3411
3412         unsafe_get_user(steal, &st->steal, out);
3413         steal += current->sched_info.run_delay -
3414                 vcpu->arch.st.last_steal;
3415         vcpu->arch.st.last_steal = current->sched_info.run_delay;
3416         unsafe_put_user(steal, &st->steal, out);
3417
3418         version += 1;
3419         unsafe_put_user(version, &st->version, out);
3420
3421  out:
3422         user_access_end();
3423  dirty:
3424         mark_page_dirty_in_slot(vcpu->kvm, ghc->memslot, gpa_to_gfn(ghc->gpa));
3425 }
3426
3427 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3428 {
3429         bool pr = false;
3430         u32 msr = msr_info->index;
3431         u64 data = msr_info->data;
3432
3433         if (msr && msr == vcpu->kvm->arch.xen_hvm_config.msr)
3434                 return kvm_xen_write_hypercall_page(vcpu, data);
3435
3436         switch (msr) {
3437         case MSR_AMD64_NB_CFG:
3438         case MSR_IA32_UCODE_WRITE:
3439         case MSR_VM_HSAVE_PA:
3440         case MSR_AMD64_PATCH_LOADER:
3441         case MSR_AMD64_BU_CFG2:
3442         case MSR_AMD64_DC_CFG:
3443         case MSR_F15H_EX_CFG:
3444                 break;
3445
3446         case MSR_IA32_UCODE_REV:
3447                 if (msr_info->host_initiated)
3448                         vcpu->arch.microcode_version = data;
3449                 break;
3450         case MSR_IA32_ARCH_CAPABILITIES:
3451                 if (!msr_info->host_initiated)
3452                         return 1;
3453                 vcpu->arch.arch_capabilities = data;
3454                 break;
3455         case MSR_IA32_PERF_CAPABILITIES: {
3456                 struct kvm_msr_entry msr_ent = {.index = msr, .data = 0};
3457
3458                 if (!msr_info->host_initiated)
3459                         return 1;
3460                 if (kvm_get_msr_feature(&msr_ent))
3461                         return 1;
3462                 if (data & ~msr_ent.data)
3463                         return 1;
3464
3465                 vcpu->arch.perf_capabilities = data;
3466
3467                 return 0;
3468                 }
3469         case MSR_EFER:
3470                 return set_efer(vcpu, msr_info);
3471         case MSR_K7_HWCR:
3472                 data &= ~(u64)0x40;     /* ignore flush filter disable */
3473                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
3474                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
3475
3476                 /* Handle McStatusWrEn */
3477                 if (data == BIT_ULL(18)) {
3478                         vcpu->arch.msr_hwcr = data;
3479                 } else if (data != 0) {
3480                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
3481                                     data);
3482                         return 1;
3483                 }
3484                 break;
3485         case MSR_FAM10H_MMIO_CONF_BASE:
3486                 if (data != 0) {
3487                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
3488                                     "0x%llx\n", data);
3489                         return 1;
3490                 }
3491                 break;
3492         case 0x200 ... 0x2ff:
3493                 return kvm_mtrr_set_msr(vcpu, msr, data);
3494         case MSR_IA32_APICBASE:
3495                 return kvm_set_apic_base(vcpu, msr_info);
3496         case APIC_BASE_MSR ... APIC_BASE_MSR + 0xff:
3497                 return kvm_x2apic_msr_write(vcpu, msr, data);
3498         case MSR_IA32_TSC_DEADLINE:
3499                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
3500                 break;
3501         case MSR_IA32_TSC_ADJUST:
3502                 if (guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST)) {
3503                         if (!msr_info->host_initiated) {
3504                                 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
3505                                 adjust_tsc_offset_guest(vcpu, adj);
3506                                 /* Before back to guest, tsc_timestamp must be adjusted
3507                                  * as well, otherwise guest's percpu pvclock time could jump.
3508                                  */
3509                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3510                         }
3511                         vcpu->arch.ia32_tsc_adjust_msr = data;
3512                 }
3513                 break;
3514         case MSR_IA32_MISC_ENABLE:
3515                 if (!kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT) &&
3516                     ((vcpu->arch.ia32_misc_enable_msr ^ data) & MSR_IA32_MISC_ENABLE_MWAIT)) {
3517                         if (!guest_cpuid_has(vcpu, X86_FEATURE_XMM3))
3518                                 return 1;
3519                         vcpu->arch.ia32_misc_enable_msr = data;
3520                         kvm_update_cpuid_runtime(vcpu);
3521                 } else {
3522                         vcpu->arch.ia32_misc_enable_msr = data;
3523                 }
3524                 break;
3525         case MSR_IA32_SMBASE:
3526                 if (!msr_info->host_initiated)
3527                         return 1;
3528                 vcpu->arch.smbase = data;
3529                 break;
3530         case MSR_IA32_POWER_CTL:
3531                 vcpu->arch.msr_ia32_power_ctl = data;
3532                 break;
3533         case MSR_IA32_TSC:
3534                 if (msr_info->host_initiated) {
3535                         kvm_synchronize_tsc(vcpu, data);
3536                 } else {
3537                         u64 adj = kvm_compute_l1_tsc_offset(vcpu, data) - vcpu->arch.l1_tsc_offset;
3538                         adjust_tsc_offset_guest(vcpu, adj);
3539                         vcpu->arch.ia32_tsc_adjust_msr += adj;
3540                 }
3541                 break;
3542         case MSR_IA32_XSS:
3543                 if (!msr_info->host_initiated &&
3544                     !guest_cpuid_has(vcpu, X86_FEATURE_XSAVES))
3545                         return 1;
3546                 /*
3547                  * KVM supports exposing PT to the guest, but does not support
3548                  * IA32_XSS[bit 8]. Guests have to use RDMSR/WRMSR rather than
3549                  * XSAVES/XRSTORS to save/restore PT MSRs.
3550                  */
3551                 if (data & ~supported_xss)
3552                         return 1;
3553                 vcpu->arch.ia32_xss = data;
3554                 kvm_update_cpuid_runtime(vcpu);
3555                 break;
3556         case MSR_SMI_COUNT:
3557                 if (!msr_info->host_initiated)
3558                         return 1;
3559                 vcpu->arch.smi_count = data;
3560                 break;
3561         case MSR_KVM_WALL_CLOCK_NEW:
3562                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3563                         return 1;
3564
3565                 vcpu->kvm->arch.wall_clock = data;
3566                 kvm_write_wall_clock(vcpu->kvm, data, 0);
3567                 break;
3568         case MSR_KVM_WALL_CLOCK:
3569                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3570                         return 1;
3571
3572                 vcpu->kvm->arch.wall_clock = data;
3573                 kvm_write_wall_clock(vcpu->kvm, data, 0);
3574                 break;
3575         case MSR_KVM_SYSTEM_TIME_NEW:
3576                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3577                         return 1;
3578
3579                 kvm_write_system_time(vcpu, data, false, msr_info->host_initiated);
3580                 break;
3581         case MSR_KVM_SYSTEM_TIME:
3582                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3583                         return 1;
3584
3585                 kvm_write_system_time(vcpu, data, true,  msr_info->host_initiated);
3586                 break;
3587         case MSR_KVM_ASYNC_PF_EN:
3588                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3589                         return 1;
3590
3591                 if (kvm_pv_enable_async_pf(vcpu, data))
3592                         return 1;
3593                 break;
3594         case MSR_KVM_ASYNC_PF_INT:
3595                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3596                         return 1;
3597
3598                 if (kvm_pv_enable_async_pf_int(vcpu, data))
3599                         return 1;
3600                 break;
3601         case MSR_KVM_ASYNC_PF_ACK:
3602                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3603                         return 1;
3604                 if (data & 0x1) {
3605                         vcpu->arch.apf.pageready_pending = false;
3606                         kvm_check_async_pf_completion(vcpu);
3607                 }
3608                 break;
3609         case MSR_KVM_STEAL_TIME:
3610                 if (!guest_pv_has(vcpu, KVM_FEATURE_STEAL_TIME))
3611                         return 1;
3612
3613                 if (unlikely(!sched_info_on()))
3614                         return 1;
3615
3616                 if (data & KVM_STEAL_RESERVED_MASK)
3617                         return 1;
3618
3619                 vcpu->arch.st.msr_val = data;
3620
3621                 if (!(data & KVM_MSR_ENABLED))
3622                         break;
3623
3624                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
3625
3626                 break;
3627         case MSR_KVM_PV_EOI_EN:
3628                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_EOI))
3629                         return 1;
3630
3631                 if (kvm_lapic_set_pv_eoi(vcpu, data, sizeof(u8)))
3632                         return 1;
3633                 break;
3634
3635         case MSR_KVM_POLL_CONTROL:
3636                 if (!guest_pv_has(vcpu, KVM_FEATURE_POLL_CONTROL))
3637                         return 1;
3638
3639                 /* only enable bit supported */
3640                 if (data & (-1ULL << 1))
3641                         return 1;
3642
3643                 vcpu->arch.msr_kvm_poll_control = data;
3644                 break;
3645
3646         case MSR_IA32_MCG_CTL:
3647         case MSR_IA32_MCG_STATUS:
3648         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
3649                 return set_msr_mce(vcpu, msr_info);
3650
3651         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
3652         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
3653                 pr = true;
3654                 fallthrough;
3655         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
3656         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
3657                 if (kvm_pmu_is_valid_msr(vcpu, msr))
3658                         return kvm_pmu_set_msr(vcpu, msr_info);
3659
3660                 if (pr || data != 0)
3661                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
3662                                     "0x%x data 0x%llx\n", msr, data);
3663                 break;
3664         case MSR_K7_CLK_CTL:
3665                 /*
3666                  * Ignore all writes to this no longer documented MSR.
3667                  * Writes are only relevant for old K7 processors,
3668                  * all pre-dating SVM, but a recommended workaround from
3669                  * AMD for these chips. It is possible to specify the
3670                  * affected processor models on the command line, hence
3671                  * the need to ignore the workaround.
3672                  */
3673                 break;
3674         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
3675         case HV_X64_MSR_SYNDBG_CONTROL ... HV_X64_MSR_SYNDBG_PENDING_BUFFER:
3676         case HV_X64_MSR_SYNDBG_OPTIONS:
3677         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
3678         case HV_X64_MSR_CRASH_CTL:
3679         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
3680         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
3681         case HV_X64_MSR_TSC_EMULATION_CONTROL:
3682         case HV_X64_MSR_TSC_EMULATION_STATUS:
3683                 return kvm_hv_set_msr_common(vcpu, msr, data,
3684                                              msr_info->host_initiated);
3685         case MSR_IA32_BBL_CR_CTL3:
3686                 /* Drop writes to this legacy MSR -- see rdmsr
3687                  * counterpart for further detail.
3688                  */
3689                 if (report_ignored_msrs)
3690                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data 0x%llx\n",
3691                                 msr, data);
3692                 break;
3693         case MSR_AMD64_OSVW_ID_LENGTH:
3694                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3695                         return 1;
3696                 vcpu->arch.osvw.length = data;
3697                 break;
3698         case MSR_AMD64_OSVW_STATUS:
3699                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3700                         return 1;
3701                 vcpu->arch.osvw.status = data;
3702                 break;
3703         case MSR_PLATFORM_INFO:
3704                 if (!msr_info->host_initiated ||
3705                     (!(data & MSR_PLATFORM_INFO_CPUID_FAULT) &&
3706                      cpuid_fault_enabled(vcpu)))
3707                         return 1;
3708                 vcpu->arch.msr_platform_info = data;
3709                 break;
3710         case MSR_MISC_FEATURES_ENABLES:
3711                 if (data & ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT ||
3712                     (data & MSR_MISC_FEATURES_ENABLES_CPUID_FAULT &&
3713                      !supports_cpuid_fault(vcpu)))
3714                         return 1;
3715                 vcpu->arch.msr_misc_features_enables = data;
3716                 break;
3717 #ifdef CONFIG_X86_64
3718         case MSR_IA32_XFD:
3719                 if (!msr_info->host_initiated &&
3720                     !guest_cpuid_has(vcpu, X86_FEATURE_XFD))
3721                         return 1;
3722
3723                 if (data & ~kvm_guest_supported_xfd(vcpu))
3724                         return 1;
3725
3726                 fpu_update_guest_xfd(&vcpu->arch.guest_fpu, data);
3727                 break;
3728         case MSR_IA32_XFD_ERR:
3729                 if (!msr_info->host_initiated &&
3730                     !guest_cpuid_has(vcpu, X86_FEATURE_XFD))
3731                         return 1;
3732
3733                 if (data & ~kvm_guest_supported_xfd(vcpu))
3734                         return 1;
3735
3736                 vcpu->arch.guest_fpu.xfd_err = data;
3737                 break;
3738 #endif
3739         default:
3740                 if (kvm_pmu_is_valid_msr(vcpu, msr))
3741                         return kvm_pmu_set_msr(vcpu, msr_info);
3742                 return KVM_MSR_RET_INVALID;
3743         }
3744         return 0;
3745 }
3746 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
3747
3748 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata, bool host)
3749 {
3750         u64 data;
3751         u64 mcg_cap = vcpu->arch.mcg_cap;
3752         unsigned bank_num = mcg_cap & 0xff;
3753
3754         switch (msr) {
3755         case MSR_IA32_P5_MC_ADDR:
3756         case MSR_IA32_P5_MC_TYPE:
3757                 data = 0;
3758                 break;
3759         case MSR_IA32_MCG_CAP:
3760                 data = vcpu->arch.mcg_cap;
3761                 break;
3762         case MSR_IA32_MCG_CTL:
3763                 if (!(mcg_cap & MCG_CTL_P) && !host)
3764                         return 1;
3765                 data = vcpu->arch.mcg_ctl;
3766                 break;
3767         case MSR_IA32_MCG_STATUS:
3768                 data = vcpu->arch.mcg_status;
3769                 break;
3770         default:
3771                 if (msr >= MSR_IA32_MC0_CTL &&
3772                     msr < MSR_IA32_MCx_CTL(bank_num)) {
3773                         u32 offset = array_index_nospec(
3774                                 msr - MSR_IA32_MC0_CTL,
3775                                 MSR_IA32_MCx_CTL(bank_num) - MSR_IA32_MC0_CTL);
3776
3777                         data = vcpu->arch.mce_banks[offset];
3778                         break;
3779                 }
3780                 return 1;
3781         }
3782         *pdata = data;
3783         return 0;
3784 }
3785
3786 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3787 {
3788         switch (msr_info->index) {
3789         case MSR_IA32_PLATFORM_ID:
3790         case MSR_IA32_EBL_CR_POWERON:
3791         case MSR_IA32_LASTBRANCHFROMIP:
3792         case MSR_IA32_LASTBRANCHTOIP:
3793         case MSR_IA32_LASTINTFROMIP:
3794         case MSR_IA32_LASTINTTOIP:
3795         case MSR_AMD64_SYSCFG:
3796         case MSR_K8_TSEG_ADDR:
3797         case MSR_K8_TSEG_MASK:
3798         case MSR_VM_HSAVE_PA:
3799         case MSR_K8_INT_PENDING_MSG:
3800         case MSR_AMD64_NB_CFG:
3801         case MSR_FAM10H_MMIO_CONF_BASE:
3802         case MSR_AMD64_BU_CFG2:
3803         case MSR_IA32_PERF_CTL:
3804         case MSR_AMD64_DC_CFG:
3805         case MSR_F15H_EX_CFG:
3806         /*
3807          * Intel Sandy Bridge CPUs must support the RAPL (running average power
3808          * limit) MSRs. Just return 0, as we do not want to expose the host
3809          * data here. Do not conditionalize this on CPUID, as KVM does not do
3810          * so for existing CPU-specific MSRs.
3811          */
3812         case MSR_RAPL_POWER_UNIT:
3813         case MSR_PP0_ENERGY_STATUS:     /* Power plane 0 (core) */
3814         case MSR_PP1_ENERGY_STATUS:     /* Power plane 1 (graphics uncore) */
3815         case MSR_PKG_ENERGY_STATUS:     /* Total package */
3816         case MSR_DRAM_ENERGY_STATUS:    /* DRAM controller */
3817                 msr_info->data = 0;
3818                 break;
3819         case MSR_F15H_PERF_CTL0 ... MSR_F15H_PERF_CTR5:
3820                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3821                         return kvm_pmu_get_msr(vcpu, msr_info);
3822                 if (!msr_info->host_initiated)
3823                         return 1;
3824                 msr_info->data = 0;
3825                 break;
3826         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
3827         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
3828         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
3829         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
3830                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3831                         return kvm_pmu_get_msr(vcpu, msr_info);
3832                 msr_info->data = 0;
3833                 break;
3834         case MSR_IA32_UCODE_REV:
3835                 msr_info->data = vcpu->arch.microcode_version;
3836                 break;
3837         case MSR_IA32_ARCH_CAPABILITIES:
3838                 if (!msr_info->host_initiated &&
3839                     !guest_cpuid_has(vcpu, X86_FEATURE_ARCH_CAPABILITIES))
3840                         return 1;
3841                 msr_info->data = vcpu->arch.arch_capabilities;
3842                 break;
3843         case MSR_IA32_PERF_CAPABILITIES:
3844                 if (!msr_info->host_initiated &&
3845                     !guest_cpuid_has(vcpu, X86_FEATURE_PDCM))
3846                         return 1;
3847                 msr_info->data = vcpu->arch.perf_capabilities;
3848                 break;
3849         case MSR_IA32_POWER_CTL:
3850                 msr_info->data = vcpu->arch.msr_ia32_power_ctl;
3851                 break;
3852         case MSR_IA32_TSC: {
3853                 /*
3854                  * Intel SDM states that MSR_IA32_TSC read adds the TSC offset
3855                  * even when not intercepted. AMD manual doesn't explicitly
3856                  * state this but appears to behave the same.
3857                  *
3858                  * On userspace reads and writes, however, we unconditionally
3859                  * return L1's TSC value to ensure backwards-compatible
3860                  * behavior for migration.
3861                  */
3862                 u64 offset, ratio;
3863
3864                 if (msr_info->host_initiated) {
3865                         offset = vcpu->arch.l1_tsc_offset;
3866                         ratio = vcpu->arch.l1_tsc_scaling_ratio;
3867                 } else {
3868                         offset = vcpu->arch.tsc_offset;
3869                         ratio = vcpu->arch.tsc_scaling_ratio;
3870                 }
3871
3872                 msr_info->data = kvm_scale_tsc(vcpu, rdtsc(), ratio) + offset;
3873                 break;
3874         }
3875         case MSR_MTRRcap:
3876         case 0x200 ... 0x2ff:
3877                 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
3878         case 0xcd: /* fsb frequency */
3879                 msr_info->data = 3;
3880                 break;
3881                 /*
3882                  * MSR_EBC_FREQUENCY_ID
3883                  * Conservative value valid for even the basic CPU models.
3884                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
3885                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
3886                  * and 266MHz for model 3, or 4. Set Core Clock
3887                  * Frequency to System Bus Frequency Ratio to 1 (bits
3888                  * 31:24) even though these are only valid for CPU
3889                  * models > 2, however guests may end up dividing or
3890                  * multiplying by zero otherwise.
3891                  */
3892         case MSR_EBC_FREQUENCY_ID:
3893                 msr_info->data = 1 << 24;
3894                 break;
3895         case MSR_IA32_APICBASE:
3896                 msr_info->data = kvm_get_apic_base(vcpu);
3897                 break;
3898         case APIC_BASE_MSR ... APIC_BASE_MSR + 0xff:
3899                 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
3900         case MSR_IA32_TSC_DEADLINE:
3901                 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
3902                 break;
3903         case MSR_IA32_TSC_ADJUST:
3904                 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
3905                 break;
3906         case MSR_IA32_MISC_ENABLE:
3907                 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
3908                 break;
3909         case MSR_IA32_SMBASE:
3910                 if (!msr_info->host_initiated)
3911                         return 1;
3912                 msr_info->data = vcpu->arch.smbase;
3913                 break;
3914         case MSR_SMI_COUNT:
3915                 msr_info->data = vcpu->arch.smi_count;
3916                 break;
3917         case MSR_IA32_PERF_STATUS:
3918                 /* TSC increment by tick */
3919                 msr_info->data = 1000ULL;
3920                 /* CPU multiplier */
3921                 msr_info->data |= (((uint64_t)4ULL) << 40);
3922                 break;
3923         case MSR_EFER:
3924                 msr_info->data = vcpu->arch.efer;
3925                 break;
3926         case MSR_KVM_WALL_CLOCK:
3927                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3928                         return 1;
3929
3930                 msr_info->data = vcpu->kvm->arch.wall_clock;
3931                 break;
3932         case MSR_KVM_WALL_CLOCK_NEW:
3933                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3934                         return 1;
3935
3936                 msr_info->data = vcpu->kvm->arch.wall_clock;
3937                 break;
3938         case MSR_KVM_SYSTEM_TIME:
3939                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3940                         return 1;
3941
3942                 msr_info->data = vcpu->arch.time;
3943                 break;
3944         case MSR_KVM_SYSTEM_TIME_NEW:
3945                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3946                         return 1;
3947
3948                 msr_info->data = vcpu->arch.time;
3949                 break;
3950         case MSR_KVM_ASYNC_PF_EN:
3951                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3952                         return 1;
3953
3954                 msr_info->data = vcpu->arch.apf.msr_en_val;
3955                 break;
3956         case MSR_KVM_ASYNC_PF_INT:
3957                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3958                         return 1;
3959
3960                 msr_info->data = vcpu->arch.apf.msr_int_val;
3961                 break;
3962         case MSR_KVM_ASYNC_PF_ACK:
3963                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3964                         return 1;
3965
3966                 msr_info->data = 0;
3967                 break;
3968         case MSR_KVM_STEAL_TIME:
3969                 if (!guest_pv_has(vcpu, KVM_FEATURE_STEAL_TIME))
3970                         return 1;
3971
3972                 msr_info->data = vcpu->arch.st.msr_val;
3973                 break;
3974         case MSR_KVM_PV_EOI_EN:
3975                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_EOI))
3976                         return 1;
3977
3978                 msr_info->data = vcpu->arch.pv_eoi.msr_val;
3979                 break;
3980         case MSR_KVM_POLL_CONTROL:
3981                 if (!guest_pv_has(vcpu, KVM_FEATURE_POLL_CONTROL))
3982                         return 1;
3983
3984                 msr_info->data = vcpu->arch.msr_kvm_poll_control;
3985                 break;
3986         case MSR_IA32_P5_MC_ADDR:
3987         case MSR_IA32_P5_MC_TYPE:
3988         case MSR_IA32_MCG_CAP:
3989         case MSR_IA32_MCG_CTL:
3990         case MSR_IA32_MCG_STATUS:
3991         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
3992                 return get_msr_mce(vcpu, msr_info->index, &msr_info->data,
3993                                    msr_info->host_initiated);
3994         case MSR_IA32_XSS:
3995                 if (!msr_info->host_initiated &&
3996                     !guest_cpuid_has(vcpu, X86_FEATURE_XSAVES))
3997                         return 1;
3998                 msr_info->data = vcpu->arch.ia32_xss;
3999                 break;
4000         case MSR_K7_CLK_CTL:
4001                 /*
4002                  * Provide expected ramp-up count for K7. All other
4003                  * are set to zero, indicating minimum divisors for
4004                  * every field.
4005                  *
4006                  * This prevents guest kernels on AMD host with CPU
4007                  * type 6, model 8 and higher from exploding due to
4008                  * the rdmsr failing.
4009                  */
4010                 msr_info->data = 0x20000000;
4011                 break;
4012         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
4013         case HV_X64_MSR_SYNDBG_CONTROL ... HV_X64_MSR_SYNDBG_PENDING_BUFFER:
4014         case HV_X64_MSR_SYNDBG_OPTIONS:
4015         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
4016         case HV_X64_MSR_CRASH_CTL:
4017         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
4018         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
4019         case HV_X64_MSR_TSC_EMULATION_CONTROL:
4020         case HV_X64_MSR_TSC_EMULATION_STATUS:
4021                 return kvm_hv_get_msr_common(vcpu,
4022                                              msr_info->index, &msr_info->data,
4023                                              msr_info->host_initiated);
4024         case MSR_IA32_BBL_CR_CTL3:
4025                 /* This legacy MSR exists but isn't fully documented in current
4026                  * silicon.  It is however accessed by winxp in very narrow
4027                  * scenarios where it sets bit #19, itself documented as
4028                  * a "reserved" bit.  Best effort attempt to source coherent
4029                  * read data here should the balance of the register be
4030                  * interpreted by the guest:
4031                  *
4032                  * L2 cache control register 3: 64GB range, 256KB size,
4033                  * enabled, latency 0x1, configured
4034                  */
4035                 msr_info->data = 0xbe702111;
4036                 break;
4037         case MSR_AMD64_OSVW_ID_LENGTH:
4038                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
4039                         return 1;
4040                 msr_info->data = vcpu->arch.osvw.length;
4041                 break;
4042         case MSR_AMD64_OSVW_STATUS:
4043                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
4044                         return 1;
4045                 msr_info->data = vcpu->arch.osvw.status;
4046                 break;
4047         case MSR_PLATFORM_INFO:
4048                 if (!msr_info->host_initiated &&
4049                     !vcpu->kvm->arch.guest_can_read_msr_platform_info)
4050                         return 1;
4051                 msr_info->data = vcpu->arch.msr_platform_info;
4052                 break;
4053         case MSR_MISC_FEATURES_ENABLES:
4054                 msr_info->data = vcpu->arch.msr_misc_features_enables;
4055                 break;
4056         case MSR_K7_HWCR:
4057                 msr_info->data = vcpu->arch.msr_hwcr;
4058                 break;
4059 #ifdef CONFIG_X86_64
4060         case MSR_IA32_XFD:
4061                 if (!msr_info->host_initiated &&
4062                     !guest_cpuid_has(vcpu, X86_FEATURE_XFD))
4063                         return 1;
4064
4065                 msr_info->data = vcpu->arch.guest_fpu.fpstate->xfd;
4066                 break;
4067         case MSR_IA32_XFD_ERR:
4068                 if (!msr_info->host_initiated &&
4069                     !guest_cpuid_has(vcpu, X86_FEATURE_XFD))
4070                         return 1;
4071
4072                 msr_info->data = vcpu->arch.guest_fpu.xfd_err;
4073                 break;
4074 #endif
4075         default:
4076                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
4077                         return kvm_pmu_get_msr(vcpu, msr_info);
4078                 return KVM_MSR_RET_INVALID;
4079         }
4080         return 0;
4081 }
4082 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
4083
4084 /*
4085  * Read or write a bunch of msrs. All parameters are kernel addresses.
4086  *
4087  * @return number of msrs set successfully.
4088  */
4089 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
4090                     struct kvm_msr_entry *entries,
4091                     int (*do_msr)(struct kvm_vcpu *vcpu,
4092                                   unsigned index, u64 *data))
4093 {
4094         int i;
4095
4096         for (i = 0; i < msrs->nmsrs; ++i)
4097                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
4098                         break;
4099
4100         return i;
4101 }
4102
4103 /*
4104  * Read or write a bunch of msrs. Parameters are user addresses.
4105  *
4106  * @return number of msrs set successfully.
4107  */
4108 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
4109                   int (*do_msr)(struct kvm_vcpu *vcpu,
4110                                 unsigned index, u64 *data),
4111                   int writeback)
4112 {
4113         struct kvm_msrs msrs;
4114         struct kvm_msr_entry *entries;
4115         int r, n;
4116         unsigned size;
4117
4118         r = -EFAULT;
4119         if (copy_from_user(&msrs, user_msrs, sizeof(msrs)))
4120                 goto out;
4121
4122         r = -E2BIG;
4123         if (msrs.nmsrs >= MAX_IO_MSRS)
4124                 goto out;
4125
4126         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
4127         entries = memdup_user(user_msrs->entries, size);
4128         if (IS_ERR(entries)) {
4129                 r = PTR_ERR(entries);
4130                 goto out;
4131         }
4132
4133         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
4134         if (r < 0)
4135                 goto out_free;
4136
4137         r = -EFAULT;
4138         if (writeback && copy_to_user(user_msrs->entries, entries, size))
4139                 goto out_free;
4140
4141         r = n;
4142
4143 out_free:
4144         kfree(entries);
4145 out:
4146         return r;
4147 }
4148
4149 static inline bool kvm_can_mwait_in_guest(void)
4150 {
4151         return boot_cpu_has(X86_FEATURE_MWAIT) &&
4152                 !boot_cpu_has_bug(X86_BUG_MONITOR) &&
4153                 boot_cpu_has(X86_FEATURE_ARAT);
4154 }
4155
4156 static int kvm_ioctl_get_supported_hv_cpuid(struct kvm_vcpu *vcpu,
4157                                             struct kvm_cpuid2 __user *cpuid_arg)
4158 {
4159         struct kvm_cpuid2 cpuid;
4160         int r;
4161
4162         r = -EFAULT;
4163         if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4164                 return r;
4165
4166         r = kvm_get_hv_cpuid(vcpu, &cpuid, cpuid_arg->entries);
4167         if (r)
4168                 return r;
4169
4170         r = -EFAULT;
4171         if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
4172                 return r;
4173
4174         return 0;
4175 }
4176
4177 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
4178 {
4179         int r = 0;
4180
4181         switch (ext) {
4182         case KVM_CAP_IRQCHIP:
4183         case KVM_CAP_HLT:
4184         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
4185         case KVM_CAP_SET_TSS_ADDR:
4186         case KVM_CAP_EXT_CPUID:
4187         case KVM_CAP_EXT_EMUL_CPUID:
4188         case KVM_CAP_CLOCKSOURCE:
4189         case KVM_CAP_PIT:
4190         case KVM_CAP_NOP_IO_DELAY:
4191         case KVM_CAP_MP_STATE:
4192         case KVM_CAP_SYNC_MMU:
4193         case KVM_CAP_USER_NMI:
4194         case KVM_CAP_REINJECT_CONTROL:
4195         case KVM_CAP_IRQ_INJECT_STATUS:
4196         case KVM_CAP_IOEVENTFD:
4197         case KVM_CAP_IOEVENTFD_NO_LENGTH:
4198         case KVM_CAP_PIT2:
4199         case KVM_CAP_PIT_STATE2:
4200         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
4201         case KVM_CAP_VCPU_EVENTS:
4202         case KVM_CAP_HYPERV:
4203         case KVM_CAP_HYPERV_VAPIC:
4204         case KVM_CAP_HYPERV_SPIN:
4205         case KVM_CAP_HYPERV_SYNIC:
4206         case KVM_CAP_HYPERV_SYNIC2:
4207         case KVM_CAP_HYPERV_VP_INDEX:
4208         case KVM_CAP_HYPERV_EVENTFD:
4209         case KVM_CAP_HYPERV_TLBFLUSH:
4210         case KVM_CAP_HYPERV_SEND_IPI:
4211         case KVM_CAP_HYPERV_CPUID:
4212         case KVM_CAP_HYPERV_ENFORCE_CPUID:
4213         case KVM_CAP_SYS_HYPERV_CPUID:
4214         case KVM_CAP_PCI_SEGMENT:
4215         case KVM_CAP_DEBUGREGS:
4216         case KVM_CAP_X86_ROBUST_SINGLESTEP:
4217         case KVM_CAP_XSAVE:
4218         case KVM_CAP_ASYNC_PF:
4219         case KVM_CAP_ASYNC_PF_INT:
4220         case KVM_CAP_GET_TSC_KHZ:
4221         case KVM_CAP_KVMCLOCK_CTRL:
4222         case KVM_CAP_READONLY_MEM:
4223         case KVM_CAP_HYPERV_TIME:
4224         case KVM_CAP_IOAPIC_POLARITY_IGNORED:
4225         case KVM_CAP_TSC_DEADLINE_TIMER:
4226         case KVM_CAP_DISABLE_QUIRKS:
4227         case KVM_CAP_SET_BOOT_CPU_ID:
4228         case KVM_CAP_SPLIT_IRQCHIP:
4229         case KVM_CAP_IMMEDIATE_EXIT:
4230         case KVM_CAP_PMU_EVENT_FILTER:
4231         case KVM_CAP_GET_MSR_FEATURES:
4232         case KVM_CAP_MSR_PLATFORM_INFO:
4233         case KVM_CAP_EXCEPTION_PAYLOAD:
4234         case KVM_CAP_SET_GUEST_DEBUG:
4235         case KVM_CAP_LAST_CPU:
4236         case KVM_CAP_X86_USER_SPACE_MSR:
4237         case KVM_CAP_X86_MSR_FILTER:
4238         case KVM_CAP_ENFORCE_PV_FEATURE_CPUID:
4239 #ifdef CONFIG_X86_SGX_KVM
4240         case KVM_CAP_SGX_ATTRIBUTE:
4241 #endif
4242         case KVM_CAP_VM_COPY_ENC_CONTEXT_FROM:
4243         case KVM_CAP_VM_MOVE_ENC_CONTEXT_FROM:
4244         case KVM_CAP_SREGS2:
4245         case KVM_CAP_EXIT_ON_EMULATION_FAILURE:
4246         case KVM_CAP_VCPU_ATTRIBUTES:
4247         case KVM_CAP_SYS_ATTRIBUTES:
4248         case KVM_CAP_ENABLE_CAP:
4249                 r = 1;
4250                 break;
4251         case KVM_CAP_EXIT_HYPERCALL:
4252                 r = KVM_EXIT_HYPERCALL_VALID_MASK;
4253                 break;
4254         case KVM_CAP_SET_GUEST_DEBUG2:
4255                 return KVM_GUESTDBG_VALID_MASK;
4256 #ifdef CONFIG_KVM_XEN
4257         case KVM_CAP_XEN_HVM:
4258                 r = KVM_XEN_HVM_CONFIG_HYPERCALL_MSR |
4259                     KVM_XEN_HVM_CONFIG_INTERCEPT_HCALL |
4260                     KVM_XEN_HVM_CONFIG_SHARED_INFO |
4261                     KVM_XEN_HVM_CONFIG_EVTCHN_2LEVEL;
4262                 if (sched_info_on())
4263                         r |= KVM_XEN_HVM_CONFIG_RUNSTATE;
4264                 break;
4265 #endif
4266         case KVM_CAP_SYNC_REGS:
4267                 r = KVM_SYNC_X86_VALID_FIELDS;
4268                 break;
4269         case KVM_CAP_ADJUST_CLOCK:
4270                 r = KVM_CLOCK_VALID_FLAGS;
4271                 break;
4272         case KVM_CAP_X86_DISABLE_EXITS:
4273                 r |=  KVM_X86_DISABLE_EXITS_HLT | KVM_X86_DISABLE_EXITS_PAUSE |
4274                       KVM_X86_DISABLE_EXITS_CSTATE;
4275                 if(kvm_can_mwait_in_guest())
4276                         r |= KVM_X86_DISABLE_EXITS_MWAIT;
4277                 break;
4278         case KVM_CAP_X86_SMM:
4279                 /* SMBASE is usually relocated above 1M on modern chipsets,
4280                  * and SMM handlers might indeed rely on 4G segment limits,
4281                  * so do not report SMM to be available if real mode is
4282                  * emulated via vm86 mode.  Still, do not go to great lengths
4283                  * to avoid userspace's usage of the feature, because it is a
4284                  * fringe case that is not enabled except via specific settings
4285                  * of the module parameters.
4286                  */
4287                 r = static_call(kvm_x86_has_emulated_msr)(kvm, MSR_IA32_SMBASE);
4288                 break;
4289         case KVM_CAP_VAPIC:
4290                 r = !static_call(kvm_x86_cpu_has_accelerated_tpr)();
4291                 break;
4292         case KVM_CAP_NR_VCPUS:
4293                 r = min_t(unsigned int, num_online_cpus(), KVM_MAX_VCPUS);
4294                 break;
4295         case KVM_CAP_MAX_VCPUS:
4296                 r = KVM_MAX_VCPUS;
4297                 break;
4298         case KVM_CAP_MAX_VCPU_ID:
4299                 r = KVM_MAX_VCPU_IDS;
4300                 break;
4301         case KVM_CAP_PV_MMU:    /* obsolete */
4302                 r = 0;
4303                 break;
4304         case KVM_CAP_MCE:
4305                 r = KVM_MAX_MCE_BANKS;
4306                 break;
4307         case KVM_CAP_XCRS:
4308                 r = boot_cpu_has(X86_FEATURE_XSAVE);
4309                 break;
4310         case KVM_CAP_TSC_CONTROL:
4311                 r = kvm_has_tsc_control;
4312                 break;
4313         case KVM_CAP_X2APIC_API:
4314                 r = KVM_X2APIC_API_VALID_FLAGS;
4315                 break;
4316         case KVM_CAP_NESTED_STATE:
4317                 r = kvm_x86_ops.nested_ops->get_state ?
4318                         kvm_x86_ops.nested_ops->get_state(NULL, NULL, 0) : 0;
4319                 break;
4320         case KVM_CAP_HYPERV_DIRECT_TLBFLUSH:
4321                 r = kvm_x86_ops.enable_direct_tlbflush != NULL;
4322                 break;
4323         case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
4324                 r = kvm_x86_ops.nested_ops->enable_evmcs != NULL;
4325                 break;
4326         case KVM_CAP_SMALLER_MAXPHYADDR:
4327                 r = (int) allow_smaller_maxphyaddr;
4328                 break;
4329         case KVM_CAP_STEAL_TIME:
4330                 r = sched_info_on();
4331                 break;
4332         case KVM_CAP_X86_BUS_LOCK_EXIT:
4333                 if (kvm_has_bus_lock_exit)
4334                         r = KVM_BUS_LOCK_DETECTION_OFF |
4335                             KVM_BUS_LOCK_DETECTION_EXIT;
4336                 else
4337                         r = 0;
4338                 break;
4339         case KVM_CAP_XSAVE2: {
4340                 u64 guest_perm = xstate_get_guest_group_perm();
4341
4342                 r = xstate_required_size(supported_xcr0 & guest_perm, false);
4343                 if (r < sizeof(struct kvm_xsave))
4344                         r = sizeof(struct kvm_xsave);
4345                 break;
4346         }
4347         default:
4348                 break;
4349         }
4350         return r;
4351 }
4352
4353 static inline void __user *kvm_get_attr_addr(struct kvm_device_attr *attr)
4354 {
4355         void __user *uaddr = (void __user*)(unsigned long)attr->addr;
4356
4357         if ((u64)(unsigned long)uaddr != attr->addr)
4358                 return ERR_PTR_USR(-EFAULT);
4359         return uaddr;
4360 }
4361
4362 static int kvm_x86_dev_get_attr(struct kvm_device_attr *attr)
4363 {
4364         u64 __user *uaddr = kvm_get_attr_addr(attr);
4365
4366         if (attr->group)
4367                 return -ENXIO;
4368
4369         if (IS_ERR(uaddr))
4370                 return PTR_ERR(uaddr);
4371
4372         switch (attr->attr) {
4373         case KVM_X86_XCOMP_GUEST_SUPP:
4374                 if (put_user(supported_xcr0, uaddr))
4375                         return -EFAULT;
4376                 return 0;
4377         default:
4378                 return -ENXIO;
4379                 break;
4380         }
4381 }
4382
4383 static int kvm_x86_dev_has_attr(struct kvm_device_attr *attr)
4384 {
4385         if (attr->group)
4386                 return -ENXIO;
4387
4388         switch (attr->attr) {
4389         case KVM_X86_XCOMP_GUEST_SUPP:
4390                 return 0;
4391         default:
4392                 return -ENXIO;
4393         }
4394 }
4395
4396 long kvm_arch_dev_ioctl(struct file *filp,
4397                         unsigned int ioctl, unsigned long arg)
4398 {
4399         void __user *argp = (void __user *)arg;
4400         long r;
4401
4402         switch (ioctl) {
4403         case KVM_GET_MSR_INDEX_LIST: {
4404                 struct kvm_msr_list __user *user_msr_list = argp;
4405                 struct kvm_msr_list msr_list;
4406                 unsigned n;
4407
4408                 r = -EFAULT;
4409                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
4410                         goto out;
4411                 n = msr_list.nmsrs;
4412                 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
4413                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
4414                         goto out;
4415                 r = -E2BIG;
4416                 if (n < msr_list.nmsrs)
4417                         goto out;
4418                 r = -EFAULT;
4419                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
4420                                  num_msrs_to_save * sizeof(u32)))
4421                         goto out;
4422                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
4423                                  &emulated_msrs,
4424                                  num_emulated_msrs * sizeof(u32)))
4425                         goto out;
4426                 r = 0;
4427                 break;
4428         }
4429         case KVM_GET_SUPPORTED_CPUID:
4430         case KVM_GET_EMULATED_CPUID: {
4431                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4432                 struct kvm_cpuid2 cpuid;
4433
4434                 r = -EFAULT;
4435                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4436                         goto out;
4437
4438                 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
4439                                             ioctl);
4440                 if (r)
4441                         goto out;
4442
4443                 r = -EFAULT;
4444                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
4445                         goto out;
4446                 r = 0;
4447                 break;
4448         }
4449         case KVM_X86_GET_MCE_CAP_SUPPORTED:
4450                 r = -EFAULT;
4451                 if (copy_to_user(argp, &kvm_mce_cap_supported,
4452                                  sizeof(kvm_mce_cap_supported)))
4453                         goto out;
4454                 r = 0;
4455                 break;
4456         case KVM_GET_MSR_FEATURE_INDEX_LIST: {
4457                 struct kvm_msr_list __user *user_msr_list = argp;
4458                 struct kvm_msr_list msr_list;
4459                 unsigned int n;
4460
4461                 r = -EFAULT;
4462                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
4463                         goto out;
4464                 n = msr_list.nmsrs;
4465                 msr_list.nmsrs = num_msr_based_features;
4466                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
4467                         goto out;
4468                 r = -E2BIG;
4469                 if (n < msr_list.nmsrs)
4470                         goto out;
4471                 r = -EFAULT;
4472                 if (copy_to_user(user_msr_list->indices, &msr_based_features,
4473                                  num_msr_based_features * sizeof(u32)))
4474                         goto out;
4475                 r = 0;
4476                 break;
4477         }
4478         case KVM_GET_MSRS:
4479                 r = msr_io(NULL, argp, do_get_msr_feature, 1);
4480                 break;
4481         case KVM_GET_SUPPORTED_HV_CPUID:
4482                 r = kvm_ioctl_get_supported_hv_cpuid(NULL, argp);
4483                 break;
4484         case KVM_GET_DEVICE_ATTR: {
4485                 struct kvm_device_attr attr;
4486                 r = -EFAULT;
4487                 if (copy_from_user(&attr, (void __user *)arg, sizeof(attr)))
4488                         break;
4489                 r = kvm_x86_dev_get_attr(&attr);
4490                 break;
4491         }
4492         case KVM_HAS_DEVICE_ATTR: {
4493                 struct kvm_device_attr attr;
4494                 r = -EFAULT;
4495                 if (copy_from_user(&attr, (void __user *)arg, sizeof(attr)))
4496                         break;
4497                 r = kvm_x86_dev_has_attr(&attr);
4498                 break;
4499         }
4500         default:
4501                 r = -EINVAL;
4502                 break;
4503         }
4504 out:
4505         return r;
4506 }
4507
4508 static void wbinvd_ipi(void *garbage)
4509 {
4510         wbinvd();
4511 }
4512
4513 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
4514 {
4515         return kvm_arch_has_noncoherent_dma(vcpu->kvm);
4516 }
4517
4518 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
4519 {
4520         /* Address WBINVD may be executed by guest */
4521         if (need_emulate_wbinvd(vcpu)) {
4522                 if (static_call(kvm_x86_has_wbinvd_exit)())
4523                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4524                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
4525                         smp_call_function_single(vcpu->cpu,
4526                                         wbinvd_ipi, NULL, 1);
4527         }
4528
4529         static_call(kvm_x86_vcpu_load)(vcpu, cpu);
4530
4531         /* Save host pkru register if supported */
4532         vcpu->arch.host_pkru = read_pkru();
4533
4534         /* Apply any externally detected TSC adjustments (due to suspend) */
4535         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
4536                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
4537                 vcpu->arch.tsc_offset_adjustment = 0;
4538                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4539         }
4540
4541         if (unlikely(vcpu->cpu != cpu) || kvm_check_tsc_unstable()) {
4542                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
4543                                 rdtsc() - vcpu->arch.last_host_tsc;
4544                 if (tsc_delta < 0)
4545                         mark_tsc_unstable("KVM discovered backwards TSC");
4546
4547                 if (kvm_check_tsc_unstable()) {
4548                         u64 offset = kvm_compute_l1_tsc_offset(vcpu,
4549                                                 vcpu->arch.last_guest_tsc);
4550                         kvm_vcpu_write_tsc_offset(vcpu, offset);
4551                         vcpu->arch.tsc_catchup = 1;
4552                 }
4553
4554                 if (kvm_lapic_hv_timer_in_use(vcpu))
4555                         kvm_lapic_restart_hv_timer(vcpu);
4556
4557                 /*
4558                  * On a host with synchronized TSC, there is no need to update
4559                  * kvmclock on vcpu->cpu migration
4560                  */
4561                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
4562                         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
4563                 if (vcpu->cpu != cpu)
4564                         kvm_make_request(KVM_REQ_MIGRATE_TIMER, vcpu);
4565                 vcpu->cpu = cpu;
4566         }
4567
4568         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
4569 }
4570
4571 static void kvm_steal_time_set_preempted(struct kvm_vcpu *vcpu)
4572 {
4573         struct gfn_to_hva_cache *ghc = &vcpu->arch.st.cache;
4574         struct kvm_steal_time __user *st;
4575         struct kvm_memslots *slots;
4576         static const u8 preempted = KVM_VCPU_PREEMPTED;
4577
4578         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
4579                 return;
4580
4581         if (vcpu->arch.st.preempted)
4582                 return;
4583
4584         /* This happens on process exit */
4585         if (unlikely(current->mm != vcpu->kvm->mm))
4586                 return;
4587
4588         slots = kvm_memslots(vcpu->kvm);
4589
4590         if (unlikely(slots->generation != ghc->generation ||
4591                      kvm_is_error_hva(ghc->hva) || !ghc->memslot))
4592                 return;
4593
4594         st = (struct kvm_steal_time __user *)ghc->hva;
4595         BUILD_BUG_ON(sizeof(st->preempted) != sizeof(preempted));
4596
4597         if (!copy_to_user_nofault(&st->preempted, &preempted, sizeof(preempted)))
4598                 vcpu->arch.st.preempted = KVM_VCPU_PREEMPTED;
4599
4600         mark_page_dirty_in_slot(vcpu->kvm, ghc->memslot, gpa_to_gfn(ghc->gpa));
4601 }
4602
4603 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
4604 {
4605         int idx;
4606
4607         if (vcpu->preempted && !vcpu->arch.guest_state_protected)
4608                 vcpu->arch.preempted_in_kernel = !static_call(kvm_x86_get_cpl)(vcpu);
4609
4610         /*
4611          * Take the srcu lock as memslots will be accessed to check the gfn
4612          * cache generation against the memslots generation.
4613          */
4614         idx = srcu_read_lock(&vcpu->kvm->srcu);
4615         if (kvm_xen_msr_enabled(vcpu->kvm))
4616                 kvm_xen_runstate_set_preempted(vcpu);
4617         else
4618                 kvm_steal_time_set_preempted(vcpu);
4619         srcu_read_unlock(&vcpu->kvm->srcu, idx);
4620
4621         static_call(kvm_x86_vcpu_put)(vcpu);
4622         vcpu->arch.last_host_tsc = rdtsc();
4623 }
4624
4625 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
4626                                     struct kvm_lapic_state *s)
4627 {
4628         static_call_cond(kvm_x86_sync_pir_to_irr)(vcpu);
4629
4630         return kvm_apic_get_state(vcpu, s);
4631 }
4632
4633 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
4634                                     struct kvm_lapic_state *s)
4635 {
4636         int r;
4637
4638         r = kvm_apic_set_state(vcpu, s);
4639         if (r)
4640                 return r;
4641         update_cr8_intercept(vcpu);
4642
4643         return 0;
4644 }
4645
4646 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu *vcpu)
4647 {
4648         /*
4649          * We can accept userspace's request for interrupt injection
4650          * as long as we have a place to store the interrupt number.
4651          * The actual injection will happen when the CPU is able to
4652          * deliver the interrupt.
4653          */
4654         if (kvm_cpu_has_extint(vcpu))
4655                 return false;
4656
4657         /* Acknowledging ExtINT does not happen if LINT0 is masked.  */
4658         return (!lapic_in_kernel(vcpu) ||
4659                 kvm_apic_accept_pic_intr(vcpu));
4660 }
4661
4662 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu *vcpu)
4663 {
4664         /*
4665          * Do not cause an interrupt window exit if an exception
4666          * is pending or an event needs reinjection; userspace
4667          * might want to inject the interrupt manually using KVM_SET_REGS
4668          * or KVM_SET_SREGS.  For that to work, we must be at an
4669          * instruction boundary and with no events half-injected.
4670          */
4671         return (kvm_arch_interrupt_allowed(vcpu) &&
4672                 kvm_cpu_accept_dm_intr(vcpu) &&
4673                 !kvm_event_needs_reinjection(vcpu) &&
4674                 !vcpu->arch.exception.pending);
4675 }
4676
4677 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
4678                                     struct kvm_interrupt *irq)
4679 {
4680         if (irq->irq >= KVM_NR_INTERRUPTS)
4681                 return -EINVAL;
4682
4683         if (!irqchip_in_kernel(vcpu->kvm)) {
4684                 kvm_queue_interrupt(vcpu, irq->irq, false);
4685                 kvm_make_request(KVM_REQ_EVENT, vcpu);
4686                 return 0;
4687         }
4688
4689         /*
4690          * With in-kernel LAPIC, we only use this to inject EXTINT, so
4691          * fail for in-kernel 8259.
4692          */
4693         if (pic_in_kernel(vcpu->kvm))
4694                 return -ENXIO;
4695
4696         if (vcpu->arch.pending_external_vector != -1)
4697                 return -EEXIST;
4698
4699         vcpu->arch.pending_external_vector = irq->irq;
4700         kvm_make_request(KVM_REQ_EVENT, vcpu);
4701         return 0;
4702 }
4703
4704 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
4705 {
4706         kvm_inject_nmi(vcpu);
4707
4708         return 0;
4709 }
4710
4711 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
4712 {
4713         kvm_make_request(KVM_REQ_SMI, vcpu);
4714
4715         return 0;
4716 }
4717
4718 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
4719                                            struct kvm_tpr_access_ctl *tac)
4720 {
4721         if (tac->flags)
4722                 return -EINVAL;
4723         vcpu->arch.tpr_access_reporting = !!tac->enabled;
4724         return 0;
4725 }
4726
4727 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
4728                                         u64 mcg_cap)
4729 {
4730         int r;
4731         unsigned bank_num = mcg_cap & 0xff, bank;
4732
4733         r = -EINVAL;
4734         if (!bank_num || bank_num > KVM_MAX_MCE_BANKS)
4735                 goto out;
4736         if (mcg_cap & ~(kvm_mce_cap_supported | 0xff | 0xff0000))
4737                 goto out;
4738         r = 0;
4739         vcpu->arch.mcg_cap = mcg_cap;
4740         /* Init IA32_MCG_CTL to all 1s */
4741         if (mcg_cap & MCG_CTL_P)
4742                 vcpu->arch.mcg_ctl = ~(u64)0;
4743         /* Init IA32_MCi_CTL to all 1s */
4744         for (bank = 0; bank < bank_num; bank++)
4745                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
4746
4747         static_call(kvm_x86_setup_mce)(vcpu);
4748 out:
4749         return r;
4750 }
4751
4752 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
4753                                       struct kvm_x86_mce *mce)
4754 {
4755         u64 mcg_cap = vcpu->arch.mcg_cap;
4756         unsigned bank_num = mcg_cap & 0xff;
4757         u64 *banks = vcpu->arch.mce_banks;
4758
4759         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
4760                 return -EINVAL;
4761         /*
4762          * if IA32_MCG_CTL is not all 1s, the uncorrected error
4763          * reporting is disabled
4764          */
4765         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
4766             vcpu->arch.mcg_ctl != ~(u64)0)
4767                 return 0;
4768         banks += 4 * mce->bank;
4769         /*
4770          * if IA32_MCi_CTL is not all 1s, the uncorrected error
4771          * reporting is disabled for the bank
4772          */
4773         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
4774                 return 0;
4775         if (mce->status & MCI_STATUS_UC) {
4776                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
4777                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
4778                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
4779                         return 0;
4780                 }
4781                 if (banks[1] & MCI_STATUS_VAL)
4782                         mce->status |= MCI_STATUS_OVER;
4783                 banks[2] = mce->addr;
4784                 banks[3] = mce->misc;
4785                 vcpu->arch.mcg_status = mce->mcg_status;
4786                 banks[1] = mce->status;
4787                 kvm_queue_exception(vcpu, MC_VECTOR);
4788         } else if (!(banks[1] & MCI_STATUS_VAL)
4789                    || !(banks[1] & MCI_STATUS_UC)) {
4790                 if (banks[1] & MCI_STATUS_VAL)
4791                         mce->status |= MCI_STATUS_OVER;
4792                 banks[2] = mce->addr;
4793                 banks[3] = mce->misc;
4794                 banks[1] = mce->status;
4795         } else
4796                 banks[1] |= MCI_STATUS_OVER;
4797         return 0;
4798 }
4799
4800 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
4801                                                struct kvm_vcpu_events *events)
4802 {
4803         process_nmi(vcpu);
4804
4805         if (kvm_check_request(KVM_REQ_SMI, vcpu))
4806                 process_smi(vcpu);
4807
4808         /*
4809          * In guest mode, payload delivery should be deferred,
4810          * so that the L1 hypervisor can intercept #PF before
4811          * CR2 is modified (or intercept #DB before DR6 is
4812          * modified under nVMX). Unless the per-VM capability,
4813          * KVM_CAP_EXCEPTION_PAYLOAD, is set, we may not defer the delivery of
4814          * an exception payload and handle after a KVM_GET_VCPU_EVENTS. Since we
4815          * opportunistically defer the exception payload, deliver it if the
4816          * capability hasn't been requested before processing a
4817          * KVM_GET_VCPU_EVENTS.
4818          */
4819         if (!vcpu->kvm->arch.exception_payload_enabled &&
4820             vcpu->arch.exception.pending && vcpu->arch.exception.has_payload)
4821                 kvm_deliver_exception_payload(vcpu);
4822
4823         /*
4824          * The API doesn't provide the instruction length for software
4825          * exceptions, so don't report them. As long as the guest RIP
4826          * isn't advanced, we should expect to encounter the exception
4827          * again.
4828          */
4829         if (kvm_exception_is_soft(vcpu->arch.exception.nr)) {
4830                 events->exception.injected = 0;
4831                 events->exception.pending = 0;
4832         } else {
4833                 events->exception.injected = vcpu->arch.exception.injected;
4834                 events->exception.pending = vcpu->arch.exception.pending;
4835                 /*
4836                  * For ABI compatibility, deliberately conflate
4837                  * pending and injected exceptions when
4838                  * KVM_CAP_EXCEPTION_PAYLOAD isn't enabled.
4839                  */
4840                 if (!vcpu->kvm->arch.exception_payload_enabled)
4841                         events->exception.injected |=
4842                                 vcpu->arch.exception.pending;
4843         }
4844         events->exception.nr = vcpu->arch.exception.nr;
4845         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
4846         events->exception.error_code = vcpu->arch.exception.error_code;
4847         events->exception_has_payload = vcpu->arch.exception.has_payload;
4848         events->exception_payload = vcpu->arch.exception.payload;
4849
4850         events->interrupt.injected =
4851                 vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft;
4852         events->interrupt.nr = vcpu->arch.interrupt.nr;
4853         events->interrupt.soft = 0;
4854         events->interrupt.shadow = static_call(kvm_x86_get_interrupt_shadow)(vcpu);
4855
4856         events->nmi.injected = vcpu->arch.nmi_injected;
4857         events->nmi.pending = vcpu->arch.nmi_pending != 0;
4858         events->nmi.masked = static_call(kvm_x86_get_nmi_mask)(vcpu);
4859         events->nmi.pad = 0;
4860
4861         events->sipi_vector = 0; /* never valid when reporting to user space */
4862
4863         events->smi.smm = is_smm(vcpu);
4864         events->smi.pending = vcpu->arch.smi_pending;
4865         events->smi.smm_inside_nmi =
4866                 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
4867         events->smi.latched_init = kvm_lapic_latched_init(vcpu);
4868
4869         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
4870                          | KVM_VCPUEVENT_VALID_SHADOW
4871                          | KVM_VCPUEVENT_VALID_SMM);
4872         if (vcpu->kvm->arch.exception_payload_enabled)
4873                 events->flags |= KVM_VCPUEVENT_VALID_PAYLOAD;
4874
4875         memset(&events->reserved, 0, sizeof(events->reserved));
4876 }
4877
4878 static void kvm_smm_changed(struct kvm_vcpu *vcpu, bool entering_smm);
4879
4880 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
4881                                               struct kvm_vcpu_events *events)
4882 {
4883         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
4884                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
4885                               | KVM_VCPUEVENT_VALID_SHADOW
4886                               | KVM_VCPUEVENT_VALID_SMM
4887                               | KVM_VCPUEVENT_VALID_PAYLOAD))
4888                 return -EINVAL;
4889
4890         if (events->flags & KVM_VCPUEVENT_VALID_PAYLOAD) {
4891                 if (!vcpu->kvm->arch.exception_payload_enabled)
4892                         return -EINVAL;
4893                 if (events->exception.pending)
4894                         events->exception.injected = 0;
4895                 else
4896                         events->exception_has_payload = 0;
4897         } else {
4898                 events->exception.pending = 0;
4899                 events->exception_has_payload = 0;
4900         }
4901
4902         if ((events->exception.injected || events->exception.pending) &&
4903             (events->exception.nr > 31 || events->exception.nr == NMI_VECTOR))
4904                 return -EINVAL;
4905
4906         /* INITs are latched while in SMM */
4907         if (events->flags & KVM_VCPUEVENT_VALID_SMM &&
4908             (events->smi.smm || events->smi.pending) &&
4909             vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED)
4910                 return -EINVAL;
4911
4912         process_nmi(vcpu);
4913         vcpu->arch.exception.injected = events->exception.injected;
4914         vcpu->arch.exception.pending = events->exception.pending;
4915         vcpu->arch.exception.nr = events->exception.nr;
4916         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
4917         vcpu->arch.exception.error_code = events->exception.error_code;
4918         vcpu->arch.exception.has_payload = events->exception_has_payload;
4919         vcpu->arch.exception.payload = events->exception_payload;
4920
4921         vcpu->arch.interrupt.injected = events->interrupt.injected;
4922         vcpu->arch.interrupt.nr = events->interrupt.nr;
4923         vcpu->arch.interrupt.soft = events->interrupt.soft;
4924         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
4925                 static_call(kvm_x86_set_interrupt_shadow)(vcpu,
4926                                                 events->interrupt.shadow);
4927
4928         vcpu->arch.nmi_injected = events->nmi.injected;
4929         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
4930                 vcpu->arch.nmi_pending = events->nmi.pending;
4931         static_call(kvm_x86_set_nmi_mask)(vcpu, events->nmi.masked);
4932
4933         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
4934             lapic_in_kernel(vcpu))
4935                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
4936
4937         if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
4938                 if (!!(vcpu->arch.hflags & HF_SMM_MASK) != events->smi.smm) {
4939                         kvm_x86_ops.nested_ops->leave_nested(vcpu);
4940                         kvm_smm_changed(vcpu, events->smi.smm);
4941                 }
4942
4943                 vcpu->arch.smi_pending = events->smi.pending;
4944
4945                 if (events->smi.smm) {
4946                         if (events->smi.smm_inside_nmi)
4947                                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
4948                         else
4949                                 vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
4950                 }
4951
4952                 if (lapic_in_kernel(vcpu)) {
4953                         if (events->smi.latched_init)
4954                                 set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
4955                         else
4956                                 clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
4957                 }
4958         }
4959
4960         kvm_make_request(KVM_REQ_EVENT, vcpu);
4961
4962         return 0;
4963 }
4964
4965 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
4966                                              struct kvm_debugregs *dbgregs)
4967 {
4968         unsigned long val;
4969
4970         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
4971         kvm_get_dr(vcpu, 6, &val);
4972         dbgregs->dr6 = val;
4973         dbgregs->dr7 = vcpu->arch.dr7;
4974         dbgregs->flags = 0;
4975         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
4976 }
4977
4978 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
4979                                             struct kvm_debugregs *dbgregs)
4980 {
4981         if (dbgregs->flags)
4982                 return -EINVAL;
4983
4984         if (!kvm_dr6_valid(dbgregs->dr6))
4985                 return -EINVAL;
4986         if (!kvm_dr7_valid(dbgregs->dr7))
4987                 return -EINVAL;
4988
4989         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
4990         kvm_update_dr0123(vcpu);
4991         vcpu->arch.dr6 = dbgregs->dr6;
4992         vcpu->arch.dr7 = dbgregs->dr7;
4993         kvm_update_dr7(vcpu);
4994
4995         return 0;
4996 }
4997
4998 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
4999                                          struct kvm_xsave *guest_xsave)
5000 {
5001         if (fpstate_is_confidential(&vcpu->arch.guest_fpu))
5002                 return;
5003
5004         fpu_copy_guest_fpstate_to_uabi(&vcpu->arch.guest_fpu,
5005                                        guest_xsave->region,
5006                                        sizeof(guest_xsave->region),
5007                                        vcpu->arch.pkru);
5008 }
5009
5010 static void kvm_vcpu_ioctl_x86_get_xsave2(struct kvm_vcpu *vcpu,
5011                                           u8 *state, unsigned int size)
5012 {
5013         if (fpstate_is_confidential(&vcpu->arch.guest_fpu))
5014                 return;
5015
5016         fpu_copy_guest_fpstate_to_uabi(&vcpu->arch.guest_fpu,
5017                                        state, size, vcpu->arch.pkru);
5018 }
5019
5020 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
5021                                         struct kvm_xsave *guest_xsave)
5022 {
5023         if (fpstate_is_confidential(&vcpu->arch.guest_fpu))
5024                 return 0;
5025
5026         return fpu_copy_uabi_to_guest_fpstate(&vcpu->arch.guest_fpu,
5027                                               guest_xsave->region,
5028                                               supported_xcr0, &vcpu->arch.pkru);
5029 }
5030
5031 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
5032                                         struct kvm_xcrs *guest_xcrs)
5033 {
5034         if (!boot_cpu_has(X86_FEATURE_XSAVE)) {
5035                 guest_xcrs->nr_xcrs = 0;
5036                 return;
5037         }
5038
5039         guest_xcrs->nr_xcrs = 1;
5040         guest_xcrs->flags = 0;
5041         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
5042         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
5043 }
5044
5045 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
5046                                        struct kvm_xcrs *guest_xcrs)
5047 {
5048         int i, r = 0;
5049
5050         if (!boot_cpu_has(X86_FEATURE_XSAVE))
5051                 return -EINVAL;
5052
5053         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
5054                 return -EINVAL;
5055
5056         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
5057                 /* Only support XCR0 currently */
5058                 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
5059                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
5060                                 guest_xcrs->xcrs[i].value);
5061                         break;
5062                 }
5063         if (r)
5064                 r = -EINVAL;
5065         return r;
5066 }
5067
5068 /*
5069  * kvm_set_guest_paused() indicates to the guest kernel that it has been
5070  * stopped by the hypervisor.  This function will be called from the host only.
5071  * EINVAL is returned when the host attempts to set the flag for a guest that
5072  * does not support pv clocks.
5073  */
5074 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
5075 {
5076         if (!vcpu->arch.pv_time_enabled)
5077                 return -EINVAL;
5078         vcpu->arch.pvclock_set_guest_stopped_request = true;
5079         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5080         return 0;
5081 }
5082
5083 static int kvm_arch_tsc_has_attr(struct kvm_vcpu *vcpu,
5084                                  struct kvm_device_attr *attr)
5085 {
5086         int r;
5087
5088         switch (attr->attr) {
5089         case KVM_VCPU_TSC_OFFSET:
5090                 r = 0;
5091                 break;
5092         default:
5093                 r = -ENXIO;
5094         }
5095
5096         return r;
5097 }
5098
5099 static int kvm_arch_tsc_get_attr(struct kvm_vcpu *vcpu,
5100                                  struct kvm_device_attr *attr)
5101 {
5102         u64 __user *uaddr = kvm_get_attr_addr(attr);
5103         int r;
5104
5105         if (IS_ERR(uaddr))
5106                 return PTR_ERR(uaddr);
5107
5108         switch (attr->attr) {
5109         case KVM_VCPU_TSC_OFFSET:
5110                 r = -EFAULT;
5111                 if (put_user(vcpu->arch.l1_tsc_offset, uaddr))
5112                         break;
5113                 r = 0;
5114                 break;
5115         default:
5116                 r = -ENXIO;
5117         }
5118
5119         return r;
5120 }
5121
5122 static int kvm_arch_tsc_set_attr(struct kvm_vcpu *vcpu,
5123                                  struct kvm_device_attr *attr)
5124 {
5125         u64 __user *uaddr = kvm_get_attr_addr(attr);
5126         struct kvm *kvm = vcpu->kvm;
5127         int r;
5128
5129         if (IS_ERR(uaddr))
5130                 return PTR_ERR(uaddr);
5131
5132         switch (attr->attr) {
5133         case KVM_VCPU_TSC_OFFSET: {
5134                 u64 offset, tsc, ns;
5135                 unsigned long flags;
5136                 bool matched;
5137
5138                 r = -EFAULT;
5139                 if (get_user(offset, uaddr))
5140                         break;
5141
5142                 raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
5143
5144                 matched = (vcpu->arch.virtual_tsc_khz &&
5145                            kvm->arch.last_tsc_khz == vcpu->arch.virtual_tsc_khz &&
5146                            kvm->arch.last_tsc_offset == offset);
5147
5148                 tsc = kvm_scale_tsc(vcpu, rdtsc(), vcpu->arch.l1_tsc_scaling_ratio) + offset;
5149                 ns = get_kvmclock_base_ns();
5150
5151                 __kvm_synchronize_tsc(vcpu, offset, tsc, ns, matched);
5152                 raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
5153
5154                 r = 0;
5155                 break;
5156         }
5157         default:
5158                 r = -ENXIO;
5159         }
5160
5161         return r;
5162 }
5163
5164 static int kvm_vcpu_ioctl_device_attr(struct kvm_vcpu *vcpu,
5165                                       unsigned int ioctl,
5166                                       void __user *argp)
5167 {
5168         struct kvm_device_attr attr;
5169         int r;
5170
5171         if (copy_from_user(&attr, argp, sizeof(attr)))
5172                 return -EFAULT;
5173
5174         if (attr.group != KVM_VCPU_TSC_CTRL)
5175                 return -ENXIO;
5176
5177         switch (ioctl) {
5178         case KVM_HAS_DEVICE_ATTR:
5179                 r = kvm_arch_tsc_has_attr(vcpu, &attr);
5180                 break;
5181         case KVM_GET_DEVICE_ATTR:
5182                 r = kvm_arch_tsc_get_attr(vcpu, &attr);
5183                 break;
5184         case KVM_SET_DEVICE_ATTR:
5185                 r = kvm_arch_tsc_set_attr(vcpu, &attr);
5186                 break;
5187         }
5188
5189         return r;
5190 }
5191
5192 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
5193                                      struct kvm_enable_cap *cap)
5194 {
5195         int r;
5196         uint16_t vmcs_version;
5197         void __user *user_ptr;
5198
5199         if (cap->flags)
5200                 return -EINVAL;
5201
5202         switch (cap->cap) {
5203         case KVM_CAP_HYPERV_SYNIC2:
5204                 if (cap->args[0])
5205                         return -EINVAL;
5206                 fallthrough;
5207
5208         case KVM_CAP_HYPERV_SYNIC:
5209                 if (!irqchip_in_kernel(vcpu->kvm))
5210                         return -EINVAL;
5211                 return kvm_hv_activate_synic(vcpu, cap->cap ==
5212                                              KVM_CAP_HYPERV_SYNIC2);
5213         case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
5214                 if (!kvm_x86_ops.nested_ops->enable_evmcs)
5215                         return -ENOTTY;
5216                 r = kvm_x86_ops.nested_ops->enable_evmcs(vcpu, &vmcs_version);
5217                 if (!r) {
5218                         user_ptr = (void __user *)(uintptr_t)cap->args[0];
5219                         if (copy_to_user(user_ptr, &vmcs_version,
5220                                          sizeof(vmcs_version)))
5221                                 r = -EFAULT;
5222                 }
5223                 return r;
5224         case KVM_CAP_HYPERV_DIRECT_TLBFLUSH:
5225                 if (!kvm_x86_ops.enable_direct_tlbflush)
5226                         return -ENOTTY;
5227
5228                 return static_call(kvm_x86_enable_direct_tlbflush)(vcpu);
5229
5230         case KVM_CAP_HYPERV_ENFORCE_CPUID:
5231                 return kvm_hv_set_enforce_cpuid(vcpu, cap->args[0]);
5232
5233         case KVM_CAP_ENFORCE_PV_FEATURE_CPUID:
5234                 vcpu->arch.pv_cpuid.enforce = cap->args[0];
5235                 if (vcpu->arch.pv_cpuid.enforce)
5236                         kvm_update_pv_runtime(vcpu);
5237
5238                 return 0;
5239         default:
5240                 return -EINVAL;
5241         }
5242 }
5243
5244 long kvm_arch_vcpu_ioctl(struct file *filp,
5245                          unsigned int ioctl, unsigned long arg)
5246 {
5247         struct kvm_vcpu *vcpu = filp->private_data;
5248         void __user *argp = (void __user *)arg;
5249         int r;
5250         union {
5251                 struct kvm_sregs2 *sregs2;
5252                 struct kvm_lapic_state *lapic;
5253                 struct kvm_xsave *xsave;
5254                 struct kvm_xcrs *xcrs;
5255                 void *buffer;
5256         } u;
5257
5258         vcpu_load(vcpu);
5259
5260         u.buffer = NULL;
5261         switch (ioctl) {
5262         case KVM_GET_LAPIC: {
5263                 r = -EINVAL;
5264                 if (!lapic_in_kernel(vcpu))
5265                         goto out;
5266                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state),
5267                                 GFP_KERNEL_ACCOUNT);
5268
5269                 r = -ENOMEM;
5270                 if (!u.lapic)
5271                         goto out;
5272                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
5273                 if (r)
5274                         goto out;
5275                 r = -EFAULT;
5276                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
5277                         goto out;
5278                 r = 0;
5279                 break;
5280         }
5281         case KVM_SET_LAPIC: {
5282                 r = -EINVAL;
5283                 if (!lapic_in_kernel(vcpu))
5284                         goto out;
5285                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
5286                 if (IS_ERR(u.lapic)) {
5287                         r = PTR_ERR(u.lapic);
5288                         goto out_nofree;
5289                 }
5290
5291                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
5292                 break;
5293         }
5294         case KVM_INTERRUPT: {
5295                 struct kvm_interrupt irq;
5296
5297                 r = -EFAULT;
5298                 if (copy_from_user(&irq, argp, sizeof(irq)))
5299                         goto out;
5300                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
5301                 break;
5302         }
5303         case KVM_NMI: {
5304                 r = kvm_vcpu_ioctl_nmi(vcpu);
5305                 break;
5306         }
5307         case KVM_SMI: {
5308                 r = kvm_vcpu_ioctl_smi(vcpu);
5309                 break;
5310         }
5311         case KVM_SET_CPUID: {
5312                 struct kvm_cpuid __user *cpuid_arg = argp;
5313                 struct kvm_cpuid cpuid;
5314
5315                 r = -EFAULT;
5316                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
5317                         goto out;
5318                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
5319                 break;
5320         }
5321         case KVM_SET_CPUID2: {
5322                 struct kvm_cpuid2 __user *cpuid_arg = argp;
5323                 struct kvm_cpuid2 cpuid;
5324
5325                 r = -EFAULT;
5326                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
5327                         goto out;
5328                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
5329                                               cpuid_arg->entries);
5330                 break;
5331         }
5332         case KVM_GET_CPUID2: {
5333                 struct kvm_cpuid2 __user *cpuid_arg = argp;
5334                 struct kvm_cpuid2 cpuid;
5335
5336                 r = -EFAULT;
5337                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
5338                         goto out;
5339                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
5340                                               cpuid_arg->entries);
5341                 if (r)
5342                         goto out;
5343                 r = -EFAULT;
5344                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
5345                         goto out;
5346                 r = 0;
5347                 break;
5348         }
5349         case KVM_GET_MSRS: {
5350                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
5351                 r = msr_io(vcpu, argp, do_get_msr, 1);
5352                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5353                 break;
5354         }
5355         case KVM_SET_MSRS: {
5356                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
5357                 r = msr_io(vcpu, argp, do_set_msr, 0);
5358                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5359                 break;
5360         }
5361         case KVM_TPR_ACCESS_REPORTING: {
5362                 struct kvm_tpr_access_ctl tac;
5363
5364                 r = -EFAULT;
5365                 if (copy_from_user(&tac, argp, sizeof(tac)))
5366                         goto out;
5367                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
5368                 if (r)
5369                         goto out;
5370                 r = -EFAULT;
5371                 if (copy_to_user(argp, &tac, sizeof(tac)))
5372                         goto out;
5373                 r = 0;
5374                 break;
5375         };
5376         case KVM_SET_VAPIC_ADDR: {
5377                 struct kvm_vapic_addr va;
5378                 int idx;
5379
5380                 r = -EINVAL;
5381                 if (!lapic_in_kernel(vcpu))
5382                         goto out;
5383                 r = -EFAULT;
5384                 if (copy_from_user(&va, argp, sizeof(va)))
5385                         goto out;
5386                 idx = srcu_read_lock(&vcpu->kvm->srcu);
5387                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
5388                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5389                 break;
5390         }
5391         case KVM_X86_SETUP_MCE: {
5392                 u64 mcg_cap;
5393
5394                 r = -EFAULT;
5395                 if (copy_from_user(&mcg_cap, argp, sizeof(mcg_cap)))
5396                         goto out;
5397                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
5398                 break;
5399         }
5400         case KVM_X86_SET_MCE: {
5401                 struct kvm_x86_mce mce;
5402
5403                 r = -EFAULT;
5404                 if (copy_from_user(&mce, argp, sizeof(mce)))
5405                         goto out;
5406                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
5407                 break;
5408         }
5409         case KVM_GET_VCPU_EVENTS: {
5410                 struct kvm_vcpu_events events;
5411
5412                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
5413
5414                 r = -EFAULT;
5415                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
5416                         break;
5417                 r = 0;
5418                 break;
5419         }
5420         case KVM_SET_VCPU_EVENTS: {
5421                 struct kvm_vcpu_events events;
5422
5423                 r = -EFAULT;
5424                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
5425                         break;
5426
5427                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
5428                 break;
5429         }
5430         case KVM_GET_DEBUGREGS: {
5431                 struct kvm_debugregs dbgregs;
5432
5433                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
5434
5435                 r = -EFAULT;
5436                 if (copy_to_user(argp, &dbgregs,
5437                                  sizeof(struct kvm_debugregs)))
5438                         break;
5439                 r = 0;
5440                 break;
5441         }
5442         case KVM_SET_DEBUGREGS: {
5443                 struct kvm_debugregs dbgregs;
5444
5445                 r = -EFAULT;
5446                 if (copy_from_user(&dbgregs, argp,
5447                                    sizeof(struct kvm_debugregs)))
5448                         break;
5449
5450                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
5451                 break;
5452         }
5453         case KVM_GET_XSAVE: {
5454                 r = -EINVAL;
5455                 if (vcpu->arch.guest_fpu.uabi_size > sizeof(struct kvm_xsave))
5456                         break;
5457
5458                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL_ACCOUNT);
5459                 r = -ENOMEM;
5460                 if (!u.xsave)
5461                         break;
5462
5463                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
5464
5465                 r = -EFAULT;
5466                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
5467                         break;
5468                 r = 0;
5469                 break;
5470         }
5471         case KVM_SET_XSAVE: {
5472                 int size = vcpu->arch.guest_fpu.uabi_size;
5473
5474                 u.xsave = memdup_user(argp, size);
5475                 if (IS_ERR(u.xsave)) {
5476                         r = PTR_ERR(u.xsave);
5477                         goto out_nofree;
5478                 }
5479
5480                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
5481                 break;
5482         }
5483
5484         case KVM_GET_XSAVE2: {
5485                 int size = vcpu->arch.guest_fpu.uabi_size;
5486
5487                 u.xsave = kzalloc(size, GFP_KERNEL_ACCOUNT);
5488                 r = -ENOMEM;
5489                 if (!u.xsave)
5490                         break;
5491
5492                 kvm_vcpu_ioctl_x86_get_xsave2(vcpu, u.buffer, size);
5493
5494                 r = -EFAULT;
5495                 if (copy_to_user(argp, u.xsave, size))
5496                         break;
5497
5498                 r = 0;
5499                 break;
5500         }
5501
5502         case KVM_GET_XCRS: {
5503                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL_ACCOUNT);
5504                 r = -ENOMEM;
5505                 if (!u.xcrs)
5506                         break;
5507
5508                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
5509
5510                 r = -EFAULT;
5511                 if (copy_to_user(argp, u.xcrs,
5512                                  sizeof(struct kvm_xcrs)))
5513                         break;
5514                 r = 0;
5515                 break;
5516         }
5517         case KVM_SET_XCRS: {
5518                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
5519                 if (IS_ERR(u.xcrs)) {
5520                         r = PTR_ERR(u.xcrs);
5521                         goto out_nofree;
5522                 }
5523
5524                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
5525                 break;
5526         }
5527         case KVM_SET_TSC_KHZ: {
5528                 u32 user_tsc_khz;
5529
5530                 r = -EINVAL;
5531                 user_tsc_khz = (u32)arg;
5532
5533                 if (kvm_has_tsc_control &&
5534                     user_tsc_khz >= kvm_max_guest_tsc_khz)
5535                         goto out;
5536
5537                 if (user_tsc_khz == 0)
5538                         user_tsc_khz = tsc_khz;
5539
5540                 if (!kvm_set_tsc_khz(vcpu, user_tsc_khz))
5541                         r = 0;
5542
5543                 goto out;
5544         }
5545         case KVM_GET_TSC_KHZ: {
5546                 r = vcpu->arch.virtual_tsc_khz;
5547                 goto out;
5548         }
5549         case KVM_KVMCLOCK_CTRL: {
5550                 r = kvm_set_guest_paused(vcpu);
5551                 goto out;
5552         }
5553         case KVM_ENABLE_CAP: {
5554                 struct kvm_enable_cap cap;
5555
5556                 r = -EFAULT;
5557                 if (copy_from_user(&cap, argp, sizeof(cap)))
5558                         goto out;
5559                 r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap);
5560                 break;
5561         }
5562         case KVM_GET_NESTED_STATE: {
5563                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
5564                 u32 user_data_size;
5565
5566                 r = -EINVAL;
5567                 if (!kvm_x86_ops.nested_ops->get_state)
5568                         break;
5569
5570                 BUILD_BUG_ON(sizeof(user_data_size) != sizeof(user_kvm_nested_state->size));
5571                 r = -EFAULT;
5572                 if (get_user(user_data_size, &user_kvm_nested_state->size))
5573                         break;
5574
5575                 r = kvm_x86_ops.nested_ops->get_state(vcpu, user_kvm_nested_state,
5576                                                      user_data_size);
5577                 if (r < 0)
5578                         break;
5579
5580                 if (r > user_data_size) {
5581                         if (put_user(r, &user_kvm_nested_state->size))
5582                                 r = -EFAULT;
5583                         else
5584                                 r = -E2BIG;
5585                         break;
5586                 }
5587
5588                 r = 0;
5589                 break;
5590         }
5591         case KVM_SET_NESTED_STATE: {
5592                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
5593                 struct kvm_nested_state kvm_state;
5594                 int idx;
5595
5596                 r = -EINVAL;
5597                 if (!kvm_x86_ops.nested_ops->set_state)
5598                         break;
5599
5600                 r = -EFAULT;
5601                 if (copy_from_user(&kvm_state, user_kvm_nested_state, sizeof(kvm_state)))
5602                         break;
5603
5604                 r = -EINVAL;
5605                 if (kvm_state.size < sizeof(kvm_state))
5606                         break;
5607
5608                 if (kvm_state.flags &
5609                     ~(KVM_STATE_NESTED_RUN_PENDING | KVM_STATE_NESTED_GUEST_MODE
5610                       | KVM_STATE_NESTED_EVMCS | KVM_STATE_NESTED_MTF_PENDING
5611                       | KVM_STATE_NESTED_GIF_SET))
5612                         break;
5613
5614                 /* nested_run_pending implies guest_mode.  */
5615                 if ((kvm_state.flags & KVM_STATE_NESTED_RUN_PENDING)
5616                     && !(kvm_state.flags & KVM_STATE_NESTED_GUEST_MODE))
5617                         break;
5618
5619                 idx = srcu_read_lock(&vcpu->kvm->srcu);
5620                 r = kvm_x86_ops.nested_ops->set_state(vcpu, user_kvm_nested_state, &kvm_state);
5621                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5622                 break;
5623         }
5624         case KVM_GET_SUPPORTED_HV_CPUID:
5625                 r = kvm_ioctl_get_supported_hv_cpuid(vcpu, argp);
5626                 break;
5627 #ifdef CONFIG_KVM_XEN
5628         case KVM_XEN_VCPU_GET_ATTR: {
5629                 struct kvm_xen_vcpu_attr xva;
5630
5631                 r = -EFAULT;
5632                 if (copy_from_user(&xva, argp, sizeof(xva)))
5633                         goto out;
5634                 r = kvm_xen_vcpu_get_attr(vcpu, &xva);
5635                 if (!r && copy_to_user(argp, &xva, sizeof(xva)))
5636                         r = -EFAULT;
5637                 break;
5638         }
5639         case KVM_XEN_VCPU_SET_ATTR: {
5640                 struct kvm_xen_vcpu_attr xva;
5641
5642                 r = -EFAULT;
5643                 if (copy_from_user(&xva, argp, sizeof(xva)))
5644                         goto out;
5645                 r = kvm_xen_vcpu_set_attr(vcpu, &xva);
5646                 break;
5647         }
5648 #endif
5649         case KVM_GET_SREGS2: {
5650                 u.sregs2 = kzalloc(sizeof(struct kvm_sregs2), GFP_KERNEL);
5651                 r = -ENOMEM;
5652                 if (!u.sregs2)
5653                         goto out;
5654                 __get_sregs2(vcpu, u.sregs2);
5655                 r = -EFAULT;
5656                 if (copy_to_user(argp, u.sregs2, sizeof(struct kvm_sregs2)))
5657                         goto out;
5658                 r = 0;
5659                 break;
5660         }
5661         case KVM_SET_SREGS2: {
5662                 u.sregs2 = memdup_user(argp, sizeof(struct kvm_sregs2));
5663                 if (IS_ERR(u.sregs2)) {
5664                         r = PTR_ERR(u.sregs2);
5665                         u.sregs2 = NULL;
5666                         goto out;
5667                 }
5668                 r = __set_sregs2(vcpu, u.sregs2);
5669                 break;
5670         }
5671         case KVM_HAS_DEVICE_ATTR:
5672         case KVM_GET_DEVICE_ATTR:
5673         case KVM_SET_DEVICE_ATTR:
5674                 r = kvm_vcpu_ioctl_device_attr(vcpu, ioctl, argp);
5675                 break;
5676         default:
5677                 r = -EINVAL;
5678         }
5679 out:
5680         kfree(u.buffer);
5681 out_nofree:
5682         vcpu_put(vcpu);
5683         return r;
5684 }
5685
5686 vm_fault_t kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
5687 {
5688         return VM_FAULT_SIGBUS;
5689 }
5690
5691 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
5692 {
5693         int ret;
5694
5695         if (addr > (unsigned int)(-3 * PAGE_SIZE))
5696                 return -EINVAL;
5697         ret = static_call(kvm_x86_set_tss_addr)(kvm, addr);
5698         return ret;
5699 }
5700
5701 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
5702                                               u64 ident_addr)
5703 {
5704         return static_call(kvm_x86_set_identity_map_addr)(kvm, ident_addr);
5705 }
5706
5707 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
5708                                          unsigned long kvm_nr_mmu_pages)
5709 {
5710         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
5711                 return -EINVAL;
5712
5713         mutex_lock(&kvm->slots_lock);
5714
5715         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
5716         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
5717
5718         mutex_unlock(&kvm->slots_lock);
5719         return 0;
5720 }
5721
5722 static unsigned long kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
5723 {
5724         return kvm->arch.n_max_mmu_pages;
5725 }
5726
5727 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
5728 {
5729         struct kvm_pic *pic = kvm->arch.vpic;
5730         int r;
5731
5732         r = 0;
5733         switch (chip->chip_id) {
5734         case KVM_IRQCHIP_PIC_MASTER:
5735                 memcpy(&chip->chip.pic, &pic->pics[0],
5736                         sizeof(struct kvm_pic_state));
5737                 break;
5738         case KVM_IRQCHIP_PIC_SLAVE:
5739                 memcpy(&chip->chip.pic, &pic->pics[1],
5740                         sizeof(struct kvm_pic_state));
5741                 break;
5742         case KVM_IRQCHIP_IOAPIC:
5743                 kvm_get_ioapic(kvm, &chip->chip.ioapic);
5744                 break;
5745         default:
5746                 r = -EINVAL;
5747                 break;
5748         }
5749         return r;
5750 }
5751
5752 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
5753 {
5754         struct kvm_pic *pic = kvm->arch.vpic;
5755         int r;
5756
5757         r = 0;
5758         switch (chip->chip_id) {
5759         case KVM_IRQCHIP_PIC_MASTER:
5760                 spin_lock(&pic->lock);
5761                 memcpy(&pic->pics[0], &chip->chip.pic,
5762                         sizeof(struct kvm_pic_state));
5763                 spin_unlock(&pic->lock);
5764                 break;
5765         case KVM_IRQCHIP_PIC_SLAVE:
5766                 spin_lock(&pic->lock);
5767                 memcpy(&pic->pics[1], &chip->chip.pic,
5768                         sizeof(struct kvm_pic_state));
5769                 spin_unlock(&pic->lock);
5770                 break;
5771         case KVM_IRQCHIP_IOAPIC:
5772                 kvm_set_ioapic(kvm, &chip->chip.ioapic);
5773                 break;
5774         default:
5775                 r = -EINVAL;
5776                 break;
5777         }
5778         kvm_pic_update_irq(pic);
5779         return r;
5780 }
5781
5782 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
5783 {
5784         struct kvm_kpit_state *kps = &kvm->arch.vpit->pit_state;
5785
5786         BUILD_BUG_ON(sizeof(*ps) != sizeof(kps->channels));
5787
5788         mutex_lock(&kps->lock);
5789         memcpy(ps, &kps->channels, sizeof(*ps));
5790         mutex_unlock(&kps->lock);
5791         return 0;
5792 }
5793
5794 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
5795 {
5796         int i;
5797         struct kvm_pit *pit = kvm->arch.vpit;
5798
5799         mutex_lock(&pit->pit_state.lock);
5800         memcpy(&pit->pit_state.channels, ps, sizeof(*ps));
5801         for (i = 0; i < 3; i++)
5802                 kvm_pit_load_count(pit, i, ps->channels[i].count, 0);
5803         mutex_unlock(&pit->pit_state.lock);
5804         return 0;
5805 }
5806
5807 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
5808 {
5809         mutex_lock(&kvm->arch.vpit->pit_state.lock);
5810         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
5811                 sizeof(ps->channels));
5812         ps->flags = kvm->arch.vpit->pit_state.flags;
5813         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
5814         memset(&ps->reserved, 0, sizeof(ps->reserved));
5815         return 0;
5816 }
5817
5818 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
5819 {
5820         int start = 0;
5821         int i;
5822         u32 prev_legacy, cur_legacy;
5823         struct kvm_pit *pit = kvm->arch.vpit;
5824
5825         mutex_lock(&pit->pit_state.lock);
5826         prev_legacy = pit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
5827         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
5828         if (!prev_legacy && cur_legacy)
5829                 start = 1;
5830         memcpy(&pit->pit_state.channels, &ps->channels,
5831                sizeof(pit->pit_state.channels));
5832         pit->pit_state.flags = ps->flags;
5833         for (i = 0; i < 3; i++)
5834                 kvm_pit_load_count(pit, i, pit->pit_state.channels[i].count,
5835                                    start && i == 0);
5836         mutex_unlock(&pit->pit_state.lock);
5837         return 0;
5838 }
5839
5840 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
5841                                  struct kvm_reinject_control *control)
5842 {
5843         struct kvm_pit *pit = kvm->arch.vpit;
5844
5845         /* pit->pit_state.lock was overloaded to prevent userspace from getting
5846          * an inconsistent state after running multiple KVM_REINJECT_CONTROL
5847          * ioctls in parallel.  Use a separate lock if that ioctl isn't rare.
5848          */
5849         mutex_lock(&pit->pit_state.lock);
5850         kvm_pit_set_reinject(pit, control->pit_reinject);
5851         mutex_unlock(&pit->pit_state.lock);
5852
5853         return 0;
5854 }
5855
5856 void kvm_arch_sync_dirty_log(struct kvm *kvm, struct kvm_memory_slot *memslot)
5857 {
5858
5859         /*
5860          * Flush all CPUs' dirty log buffers to the  dirty_bitmap.  Called
5861          * before reporting dirty_bitmap to userspace.  KVM flushes the buffers
5862          * on all VM-Exits, thus we only need to kick running vCPUs to force a
5863          * VM-Exit.
5864          */
5865         struct kvm_vcpu *vcpu;
5866         unsigned long i;
5867
5868         kvm_for_each_vcpu(i, vcpu, kvm)
5869                 kvm_vcpu_kick(vcpu);
5870 }
5871
5872 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
5873                         bool line_status)
5874 {
5875         if (!irqchip_in_kernel(kvm))
5876                 return -ENXIO;
5877
5878         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
5879                                         irq_event->irq, irq_event->level,
5880                                         line_status);
5881         return 0;
5882 }
5883
5884 int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
5885                             struct kvm_enable_cap *cap)
5886 {
5887         int r;
5888
5889         if (cap->flags)
5890                 return -EINVAL;
5891
5892         switch (cap->cap) {
5893         case KVM_CAP_DISABLE_QUIRKS:
5894                 kvm->arch.disabled_quirks = cap->args[0];
5895                 r = 0;
5896                 break;
5897         case KVM_CAP_SPLIT_IRQCHIP: {
5898                 mutex_lock(&kvm->lock);
5899                 r = -EINVAL;
5900                 if (cap->args[0] > MAX_NR_RESERVED_IOAPIC_PINS)
5901                         goto split_irqchip_unlock;
5902                 r = -EEXIST;
5903                 if (irqchip_in_kernel(kvm))
5904                         goto split_irqchip_unlock;
5905                 if (kvm->created_vcpus)
5906                         goto split_irqchip_unlock;
5907                 r = kvm_setup_empty_irq_routing(kvm);
5908                 if (r)
5909                         goto split_irqchip_unlock;
5910                 /* Pairs with irqchip_in_kernel. */
5911                 smp_wmb();
5912                 kvm->arch.irqchip_mode = KVM_IRQCHIP_SPLIT;
5913                 kvm->arch.nr_reserved_ioapic_pins = cap->args[0];
5914                 kvm_request_apicv_update(kvm, true, APICV_INHIBIT_REASON_ABSENT);
5915                 r = 0;
5916 split_irqchip_unlock:
5917                 mutex_unlock(&kvm->lock);
5918                 break;
5919         }
5920         case KVM_CAP_X2APIC_API:
5921                 r = -EINVAL;
5922                 if (cap->args[0] & ~KVM_X2APIC_API_VALID_FLAGS)
5923                         break;
5924
5925                 if (cap->args[0] & KVM_X2APIC_API_USE_32BIT_IDS)
5926                         kvm->arch.x2apic_format = true;
5927                 if (cap->args[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
5928                         kvm->arch.x2apic_broadcast_quirk_disabled = true;
5929
5930                 r = 0;
5931                 break;
5932         case KVM_CAP_X86_DISABLE_EXITS:
5933                 r = -EINVAL;
5934                 if (cap->args[0] & ~KVM_X86_DISABLE_VALID_EXITS)
5935                         break;
5936
5937                 if ((cap->args[0] & KVM_X86_DISABLE_EXITS_MWAIT) &&
5938                         kvm_can_mwait_in_guest())
5939                         kvm->arch.mwait_in_guest = true;
5940                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_HLT)
5941                         kvm->arch.hlt_in_guest = true;
5942                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_PAUSE)
5943                         kvm->arch.pause_in_guest = true;
5944                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_CSTATE)
5945                         kvm->arch.cstate_in_guest = true;
5946                 r = 0;
5947                 break;
5948         case KVM_CAP_MSR_PLATFORM_INFO:
5949                 kvm->arch.guest_can_read_msr_platform_info = cap->args[0];
5950                 r = 0;
5951                 break;
5952         case KVM_CAP_EXCEPTION_PAYLOAD:
5953                 kvm->arch.exception_payload_enabled = cap->args[0];
5954                 r = 0;
5955                 break;
5956         case KVM_CAP_X86_USER_SPACE_MSR:
5957                 kvm->arch.user_space_msr_mask = cap->args[0];
5958                 r = 0;
5959                 break;
5960         case KVM_CAP_X86_BUS_LOCK_EXIT:
5961                 r = -EINVAL;
5962                 if (cap->args[0] & ~KVM_BUS_LOCK_DETECTION_VALID_MODE)
5963                         break;
5964
5965                 if ((cap->args[0] & KVM_BUS_LOCK_DETECTION_OFF) &&
5966                     (cap->args[0] & KVM_BUS_LOCK_DETECTION_EXIT))
5967                         break;
5968
5969                 if (kvm_has_bus_lock_exit &&
5970                     cap->args[0] & KVM_BUS_LOCK_DETECTION_EXIT)
5971                         kvm->arch.bus_lock_detection_enabled = true;
5972                 r = 0;
5973                 break;
5974 #ifdef CONFIG_X86_SGX_KVM
5975         case KVM_CAP_SGX_ATTRIBUTE: {
5976                 unsigned long allowed_attributes = 0;
5977
5978                 r = sgx_set_attribute(&allowed_attributes, cap->args[0]);
5979                 if (r)
5980                         break;
5981
5982                 /* KVM only supports the PROVISIONKEY privileged attribute. */
5983                 if ((allowed_attributes & SGX_ATTR_PROVISIONKEY) &&
5984                     !(allowed_attributes & ~SGX_ATTR_PROVISIONKEY))
5985                         kvm->arch.sgx_provisioning_allowed = true;
5986                 else
5987                         r = -EINVAL;
5988                 break;
5989         }
5990 #endif
5991         case KVM_CAP_VM_COPY_ENC_CONTEXT_FROM:
5992                 r = -EINVAL;
5993                 if (kvm_x86_ops.vm_copy_enc_context_from)
5994                         r = kvm_x86_ops.vm_copy_enc_context_from(kvm, cap->args[0]);
5995                 return r;
5996         case KVM_CAP_VM_MOVE_ENC_CONTEXT_FROM:
5997                 r = -EINVAL;
5998                 if (kvm_x86_ops.vm_move_enc_context_from)
5999                         r = kvm_x86_ops.vm_move_enc_context_from(
6000                                 kvm, cap->args[0]);
6001                 return r;
6002         case KVM_CAP_EXIT_HYPERCALL:
6003                 if (cap->args[0] & ~KVM_EXIT_HYPERCALL_VALID_MASK) {
6004                         r = -EINVAL;
6005                         break;
6006                 }
6007                 kvm->arch.hypercall_exit_enabled = cap->args[0];
6008                 r = 0;
6009                 break;
6010         case KVM_CAP_EXIT_ON_EMULATION_FAILURE:
6011                 r = -EINVAL;
6012                 if (cap->args[0] & ~1)
6013                         break;
6014                 kvm->arch.exit_on_emulation_error = cap->args[0];
6015                 r = 0;
6016                 break;
6017         default:
6018                 r = -EINVAL;
6019                 break;
6020         }
6021         return r;
6022 }
6023
6024 static struct kvm_x86_msr_filter *kvm_alloc_msr_filter(bool default_allow)
6025 {
6026         struct kvm_x86_msr_filter *msr_filter;
6027
6028         msr_filter = kzalloc(sizeof(*msr_filter), GFP_KERNEL_ACCOUNT);
6029         if (!msr_filter)
6030                 return NULL;
6031
6032         msr_filter->default_allow = default_allow;
6033         return msr_filter;
6034 }
6035
6036 static void kvm_free_msr_filter(struct kvm_x86_msr_filter *msr_filter)
6037 {
6038         u32 i;
6039
6040         if (!msr_filter)
6041                 return;
6042
6043         for (i = 0; i < msr_filter->count; i++)
6044                 kfree(msr_filter->ranges[i].bitmap);
6045
6046         kfree(msr_filter);
6047 }
6048
6049 static int kvm_add_msr_filter(struct kvm_x86_msr_filter *msr_filter,
6050                               struct kvm_msr_filter_range *user_range)
6051 {
6052         unsigned long *bitmap = NULL;
6053         size_t bitmap_size;
6054
6055         if (!user_range->nmsrs)
6056                 return 0;
6057
6058         if (user_range->flags & ~(KVM_MSR_FILTER_READ | KVM_MSR_FILTER_WRITE))
6059                 return -EINVAL;
6060
6061         if (!user_range->flags)
6062                 return -EINVAL;
6063
6064         bitmap_size = BITS_TO_LONGS(user_range->nmsrs) * sizeof(long);
6065         if (!bitmap_size || bitmap_size > KVM_MSR_FILTER_MAX_BITMAP_SIZE)
6066                 return -EINVAL;
6067
6068         bitmap = memdup_user((__user u8*)user_range->bitmap, bitmap_size);
6069         if (IS_ERR(bitmap))
6070                 return PTR_ERR(bitmap);
6071
6072         msr_filter->ranges[msr_filter->count] = (struct msr_bitmap_range) {
6073                 .flags = user_range->flags,
6074                 .base = user_range->base,
6075                 .nmsrs = user_range->nmsrs,
6076                 .bitmap = bitmap,
6077         };
6078
6079         msr_filter->count++;
6080         return 0;
6081 }
6082
6083 static int kvm_vm_ioctl_set_msr_filter(struct kvm *kvm, void __user *argp)
6084 {
6085         struct kvm_msr_filter __user *user_msr_filter = argp;
6086         struct kvm_x86_msr_filter *new_filter, *old_filter;
6087         struct kvm_msr_filter filter;
6088         bool default_allow;
6089         bool empty = true;
6090         int r = 0;
6091         u32 i;
6092
6093         if (copy_from_user(&filter, user_msr_filter, sizeof(filter)))
6094                 return -EFAULT;
6095
6096         for (i = 0; i < ARRAY_SIZE(filter.ranges); i++)
6097                 empty &= !filter.ranges[i].nmsrs;
6098
6099         default_allow = !(filter.flags & KVM_MSR_FILTER_DEFAULT_DENY);
6100         if (empty && !default_allow)
6101                 return -EINVAL;
6102
6103         new_filter = kvm_alloc_msr_filter(default_allow);
6104         if (!new_filter)
6105                 return -ENOMEM;
6106
6107         for (i = 0; i < ARRAY_SIZE(filter.ranges); i++) {
6108                 r = kvm_add_msr_filter(new_filter, &filter.ranges[i]);
6109                 if (r) {
6110                         kvm_free_msr_filter(new_filter);
6111                         return r;
6112                 }
6113         }
6114
6115         mutex_lock(&kvm->lock);
6116
6117         /* The per-VM filter is protected by kvm->lock... */
6118         old_filter = srcu_dereference_check(kvm->arch.msr_filter, &kvm->srcu, 1);
6119
6120         rcu_assign_pointer(kvm->arch.msr_filter, new_filter);
6121         synchronize_srcu(&kvm->srcu);
6122
6123         kvm_free_msr_filter(old_filter);
6124
6125         kvm_make_all_cpus_request(kvm, KVM_REQ_MSR_FILTER_CHANGED);
6126         mutex_unlock(&kvm->lock);
6127
6128         return 0;
6129 }
6130
6131 #ifdef CONFIG_HAVE_KVM_PM_NOTIFIER
6132 static int kvm_arch_suspend_notifier(struct kvm *kvm)
6133 {
6134         struct kvm_vcpu *vcpu;
6135         unsigned long i;
6136         int ret = 0;
6137
6138         mutex_lock(&kvm->lock);
6139         kvm_for_each_vcpu(i, vcpu, kvm) {
6140                 if (!vcpu->arch.pv_time_enabled)
6141                         continue;
6142
6143                 ret = kvm_set_guest_paused(vcpu);
6144                 if (ret) {
6145                         kvm_err("Failed to pause guest VCPU%d: %d\n",
6146                                 vcpu->vcpu_id, ret);
6147                         break;
6148                 }
6149         }
6150         mutex_unlock(&kvm->lock);
6151
6152         return ret ? NOTIFY_BAD : NOTIFY_DONE;
6153 }
6154
6155 int kvm_arch_pm_notifier(struct kvm *kvm, unsigned long state)
6156 {
6157         switch (state) {
6158         case PM_HIBERNATION_PREPARE:
6159         case PM_SUSPEND_PREPARE:
6160                 return kvm_arch_suspend_notifier(kvm);
6161         }
6162
6163         return NOTIFY_DONE;
6164 }
6165 #endif /* CONFIG_HAVE_KVM_PM_NOTIFIER */
6166
6167 static int kvm_vm_ioctl_get_clock(struct kvm *kvm, void __user *argp)
6168 {
6169         struct kvm_clock_data data = { 0 };
6170
6171         get_kvmclock(kvm, &data);
6172         if (copy_to_user(argp, &data, sizeof(data)))
6173                 return -EFAULT;
6174
6175         return 0;
6176 }
6177
6178 static int kvm_vm_ioctl_set_clock(struct kvm *kvm, void __user *argp)
6179 {
6180         struct kvm_arch *ka = &kvm->arch;
6181         struct kvm_clock_data data;
6182         u64 now_raw_ns;
6183
6184         if (copy_from_user(&data, argp, sizeof(data)))
6185                 return -EFAULT;
6186
6187         /*
6188          * Only KVM_CLOCK_REALTIME is used, but allow passing the
6189          * result of KVM_GET_CLOCK back to KVM_SET_CLOCK.
6190          */
6191         if (data.flags & ~KVM_CLOCK_VALID_FLAGS)
6192                 return -EINVAL;
6193
6194         kvm_hv_invalidate_tsc_page(kvm);
6195         kvm_start_pvclock_update(kvm);
6196         pvclock_update_vm_gtod_copy(kvm);
6197
6198         /*
6199          * This pairs with kvm_guest_time_update(): when masterclock is
6200          * in use, we use master_kernel_ns + kvmclock_offset to set
6201          * unsigned 'system_time' so if we use get_kvmclock_ns() (which
6202          * is slightly ahead) here we risk going negative on unsigned
6203          * 'system_time' when 'data.clock' is very small.
6204          */
6205         if (data.flags & KVM_CLOCK_REALTIME) {
6206                 u64 now_real_ns = ktime_get_real_ns();
6207
6208                 /*
6209                  * Avoid stepping the kvmclock backwards.
6210                  */
6211                 if (now_real_ns > data.realtime)
6212                         data.clock += now_real_ns - data.realtime;
6213         }
6214
6215         if (ka->use_master_clock)
6216                 now_raw_ns = ka->master_kernel_ns;
6217         else
6218                 now_raw_ns = get_kvmclock_base_ns();
6219         ka->kvmclock_offset = data.clock - now_raw_ns;
6220         kvm_end_pvclock_update(kvm);
6221         return 0;
6222 }
6223
6224 long kvm_arch_vm_ioctl(struct file *filp,
6225                        unsigned int ioctl, unsigned long arg)
6226 {
6227         struct kvm *kvm = filp->private_data;
6228         void __user *argp = (void __user *)arg;
6229         int r = -ENOTTY;
6230         /*
6231          * This union makes it completely explicit to gcc-3.x
6232          * that these two variables' stack usage should be
6233          * combined, not added together.
6234          */
6235         union {
6236                 struct kvm_pit_state ps;
6237                 struct kvm_pit_state2 ps2;
6238                 struct kvm_pit_config pit_config;
6239         } u;
6240
6241         switch (ioctl) {
6242         case KVM_SET_TSS_ADDR:
6243                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
6244                 break;
6245         case KVM_SET_IDENTITY_MAP_ADDR: {
6246                 u64 ident_addr;
6247
6248                 mutex_lock(&kvm->lock);
6249                 r = -EINVAL;
6250                 if (kvm->created_vcpus)
6251                         goto set_identity_unlock;
6252                 r = -EFAULT;
6253                 if (copy_from_user(&ident_addr, argp, sizeof(ident_addr)))
6254                         goto set_identity_unlock;
6255                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
6256 set_identity_unlock:
6257                 mutex_unlock(&kvm->lock);
6258                 break;
6259         }
6260         case KVM_SET_NR_MMU_PAGES:
6261                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
6262                 break;
6263         case KVM_GET_NR_MMU_PAGES:
6264                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
6265                 break;
6266         case KVM_CREATE_IRQCHIP: {
6267                 mutex_lock(&kvm->lock);
6268
6269                 r = -EEXIST;
6270                 if (irqchip_in_kernel(kvm))
6271                         goto create_irqchip_unlock;
6272
6273                 r = -EINVAL;
6274                 if (kvm->created_vcpus)
6275                         goto create_irqchip_unlock;
6276
6277                 r = kvm_pic_init(kvm);
6278                 if (r)
6279                         goto create_irqchip_unlock;
6280
6281                 r = kvm_ioapic_init(kvm);
6282                 if (r) {
6283                         kvm_pic_destroy(kvm);
6284                         goto create_irqchip_unlock;
6285                 }
6286
6287                 r = kvm_setup_default_irq_routing(kvm);
6288                 if (r) {
6289                         kvm_ioapic_destroy(kvm);
6290                         kvm_pic_destroy(kvm);
6291                         goto create_irqchip_unlock;
6292                 }
6293                 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
6294                 smp_wmb();
6295                 kvm->arch.irqchip_mode = KVM_IRQCHIP_KERNEL;
6296                 kvm_request_apicv_update(kvm, true, APICV_INHIBIT_REASON_ABSENT);
6297         create_irqchip_unlock:
6298                 mutex_unlock(&kvm->lock);
6299                 break;
6300         }
6301         case KVM_CREATE_PIT:
6302                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
6303                 goto create_pit;
6304         case KVM_CREATE_PIT2:
6305                 r = -EFAULT;
6306                 if (copy_from_user(&u.pit_config, argp,
6307                                    sizeof(struct kvm_pit_config)))
6308                         goto out;
6309         create_pit:
6310                 mutex_lock(&kvm->lock);
6311                 r = -EEXIST;
6312                 if (kvm->arch.vpit)
6313                         goto create_pit_unlock;
6314                 r = -ENOMEM;
6315                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
6316                 if (kvm->arch.vpit)
6317                         r = 0;
6318         create_pit_unlock:
6319                 mutex_unlock(&kvm->lock);
6320                 break;
6321         case KVM_GET_IRQCHIP: {
6322                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
6323                 struct kvm_irqchip *chip;
6324
6325                 chip = memdup_user(argp, sizeof(*chip));
6326                 if (IS_ERR(chip)) {
6327                         r = PTR_ERR(chip);
6328                         goto out;
6329                 }
6330
6331                 r = -ENXIO;
6332                 if (!irqchip_kernel(kvm))
6333                         goto get_irqchip_out;
6334                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
6335                 if (r)
6336                         goto get_irqchip_out;
6337                 r = -EFAULT;
6338                 if (copy_to_user(argp, chip, sizeof(*chip)))
6339                         goto get_irqchip_out;
6340                 r = 0;
6341         get_irqchip_out:
6342                 kfree(chip);
6343                 break;
6344         }
6345         case KVM_SET_IRQCHIP: {
6346                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
6347                 struct kvm_irqchip *chip;
6348
6349                 chip = memdup_user(argp, sizeof(*chip));
6350                 if (IS_ERR(chip)) {
6351                         r = PTR_ERR(chip);
6352                         goto out;
6353                 }
6354
6355                 r = -ENXIO;
6356                 if (!irqchip_kernel(kvm))
6357                         goto set_irqchip_out;
6358                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
6359         set_irqchip_out:
6360                 kfree(chip);
6361                 break;
6362         }
6363         case KVM_GET_PIT: {
6364                 r = -EFAULT;
6365                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
6366                         goto out;
6367                 r = -ENXIO;
6368                 if (!kvm->arch.vpit)
6369                         goto out;
6370                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
6371                 if (r)
6372                         goto out;
6373                 r = -EFAULT;
6374                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
6375                         goto out;
6376                 r = 0;
6377                 break;
6378         }
6379         case KVM_SET_PIT: {
6380                 r = -EFAULT;
6381                 if (copy_from_user(&u.ps, argp, sizeof(u.ps)))
6382                         goto out;
6383                 mutex_lock(&kvm->lock);
6384                 r = -ENXIO;
6385                 if (!kvm->arch.vpit)
6386                         goto set_pit_out;
6387                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
6388 set_pit_out:
6389                 mutex_unlock(&kvm->lock);
6390                 break;
6391         }
6392         case KVM_GET_PIT2: {
6393                 r = -ENXIO;
6394                 if (!kvm->arch.vpit)
6395                         goto out;
6396                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
6397                 if (r)
6398                         goto out;
6399                 r = -EFAULT;
6400                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
6401                         goto out;
6402                 r = 0;
6403                 break;
6404         }
6405         case KVM_SET_PIT2: {
6406                 r = -EFAULT;
6407                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
6408                         goto out;
6409                 mutex_lock(&kvm->lock);
6410                 r = -ENXIO;
6411                 if (!kvm->arch.vpit)
6412                         goto set_pit2_out;
6413                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
6414 set_pit2_out:
6415                 mutex_unlock(&kvm->lock);
6416                 break;
6417         }
6418         case KVM_REINJECT_CONTROL: {
6419                 struct kvm_reinject_control control;
6420                 r =  -EFAULT;
6421                 if (copy_from_user(&control, argp, sizeof(control)))
6422                         goto out;
6423                 r = -ENXIO;
6424                 if (!kvm->arch.vpit)
6425                         goto out;
6426                 r = kvm_vm_ioctl_reinject(kvm, &control);
6427                 break;
6428         }
6429         case KVM_SET_BOOT_CPU_ID:
6430                 r = 0;
6431                 mutex_lock(&kvm->lock);
6432                 if (kvm->created_vcpus)
6433                         r = -EBUSY;
6434                 else
6435                         kvm->arch.bsp_vcpu_id = arg;
6436                 mutex_unlock(&kvm->lock);
6437                 break;
6438 #ifdef CONFIG_KVM_XEN
6439         case KVM_XEN_HVM_CONFIG: {
6440                 struct kvm_xen_hvm_config xhc;
6441                 r = -EFAULT;
6442                 if (copy_from_user(&xhc, argp, sizeof(xhc)))
6443                         goto out;
6444                 r = kvm_xen_hvm_config(kvm, &xhc);
6445                 break;
6446         }
6447         case KVM_XEN_HVM_GET_ATTR: {
6448                 struct kvm_xen_hvm_attr xha;
6449
6450                 r = -EFAULT;
6451                 if (copy_from_user(&xha, argp, sizeof(xha)))
6452                         goto out;
6453                 r = kvm_xen_hvm_get_attr(kvm, &xha);
6454                 if (!r && copy_to_user(argp, &xha, sizeof(xha)))
6455                         r = -EFAULT;
6456                 break;
6457         }
6458         case KVM_XEN_HVM_SET_ATTR: {
6459                 struct kvm_xen_hvm_attr xha;
6460
6461                 r = -EFAULT;
6462                 if (copy_from_user(&xha, argp, sizeof(xha)))
6463                         goto out;
6464                 r = kvm_xen_hvm_set_attr(kvm, &xha);
6465                 break;
6466         }
6467 #endif
6468         case KVM_SET_CLOCK:
6469                 r = kvm_vm_ioctl_set_clock(kvm, argp);
6470                 break;
6471         case KVM_GET_CLOCK:
6472                 r = kvm_vm_ioctl_get_clock(kvm, argp);
6473                 break;
6474         case KVM_MEMORY_ENCRYPT_OP: {
6475                 r = -ENOTTY;
6476                 if (kvm_x86_ops.mem_enc_op)
6477                         r = static_call(kvm_x86_mem_enc_op)(kvm, argp);
6478                 break;
6479         }
6480         case KVM_MEMORY_ENCRYPT_REG_REGION: {
6481                 struct kvm_enc_region region;
6482
6483                 r = -EFAULT;
6484                 if (copy_from_user(&region, argp, sizeof(region)))
6485                         goto out;
6486
6487                 r = -ENOTTY;
6488                 if (kvm_x86_ops.mem_enc_reg_region)
6489                         r = static_call(kvm_x86_mem_enc_reg_region)(kvm, &region);
6490                 break;
6491         }
6492         case KVM_MEMORY_ENCRYPT_UNREG_REGION: {
6493                 struct kvm_enc_region region;
6494
6495                 r = -EFAULT;
6496                 if (copy_from_user(&region, argp, sizeof(region)))
6497                         goto out;
6498
6499                 r = -ENOTTY;
6500                 if (kvm_x86_ops.mem_enc_unreg_region)
6501                         r = static_call(kvm_x86_mem_enc_unreg_region)(kvm, &region);
6502                 break;
6503         }
6504         case KVM_HYPERV_EVENTFD: {
6505                 struct kvm_hyperv_eventfd hvevfd;
6506
6507                 r = -EFAULT;
6508                 if (copy_from_user(&hvevfd, argp, sizeof(hvevfd)))
6509                         goto out;
6510                 r = kvm_vm_ioctl_hv_eventfd(kvm, &hvevfd);
6511                 break;
6512         }
6513         case KVM_SET_PMU_EVENT_FILTER:
6514                 r = kvm_vm_ioctl_set_pmu_event_filter(kvm, argp);
6515                 break;
6516         case KVM_X86_SET_MSR_FILTER:
6517                 r = kvm_vm_ioctl_set_msr_filter(kvm, argp);
6518                 break;
6519         default:
6520                 r = -ENOTTY;
6521         }
6522 out:
6523         return r;
6524 }
6525
6526 static void kvm_init_msr_list(void)
6527 {
6528         struct x86_pmu_capability x86_pmu;
6529         u32 dummy[2];
6530         unsigned i;
6531
6532         BUILD_BUG_ON_MSG(INTEL_PMC_MAX_FIXED != 4,
6533                          "Please update the fixed PMCs in msrs_to_saved_all[]");
6534
6535         perf_get_x86_pmu_capability(&x86_pmu);
6536
6537         num_msrs_to_save = 0;
6538         num_emulated_msrs = 0;
6539         num_msr_based_features = 0;
6540
6541         for (i = 0; i < ARRAY_SIZE(msrs_to_save_all); i++) {
6542                 if (rdmsr_safe(msrs_to_save_all[i], &dummy[0], &dummy[1]) < 0)
6543                         continue;
6544
6545                 /*
6546                  * Even MSRs that are valid in the host may not be exposed
6547                  * to the guests in some cases.
6548                  */
6549                 switch (msrs_to_save_all[i]) {
6550                 case MSR_IA32_BNDCFGS:
6551                         if (!kvm_mpx_supported())
6552                                 continue;
6553                         break;
6554                 case MSR_TSC_AUX:
6555                         if (!kvm_cpu_cap_has(X86_FEATURE_RDTSCP) &&
6556                             !kvm_cpu_cap_has(X86_FEATURE_RDPID))
6557                                 continue;
6558                         break;
6559                 case MSR_IA32_UMWAIT_CONTROL:
6560                         if (!kvm_cpu_cap_has(X86_FEATURE_WAITPKG))
6561                                 continue;
6562                         break;
6563                 case MSR_IA32_RTIT_CTL:
6564                 case MSR_IA32_RTIT_STATUS:
6565                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT))
6566                                 continue;
6567                         break;
6568                 case MSR_IA32_RTIT_CR3_MATCH:
6569                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
6570                             !intel_pt_validate_hw_cap(PT_CAP_cr3_filtering))
6571                                 continue;
6572                         break;
6573                 case MSR_IA32_RTIT_OUTPUT_BASE:
6574                 case MSR_IA32_RTIT_OUTPUT_MASK:
6575                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
6576                                 (!intel_pt_validate_hw_cap(PT_CAP_topa_output) &&
6577                                  !intel_pt_validate_hw_cap(PT_CAP_single_range_output)))
6578                                 continue;
6579                         break;
6580                 case MSR_IA32_RTIT_ADDR0_A ... MSR_IA32_RTIT_ADDR3_B:
6581                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
6582                                 msrs_to_save_all[i] - MSR_IA32_RTIT_ADDR0_A >=
6583                                 intel_pt_validate_hw_cap(PT_CAP_num_address_ranges) * 2)
6584                                 continue;
6585                         break;
6586                 case MSR_ARCH_PERFMON_PERFCTR0 ... MSR_ARCH_PERFMON_PERFCTR0 + 17:
6587                         if (msrs_to_save_all[i] - MSR_ARCH_PERFMON_PERFCTR0 >=
6588                             min(INTEL_PMC_MAX_GENERIC, x86_pmu.num_counters_gp))
6589                                 continue;
6590                         break;
6591                 case MSR_ARCH_PERFMON_EVENTSEL0 ... MSR_ARCH_PERFMON_EVENTSEL0 + 17:
6592                         if (msrs_to_save_all[i] - MSR_ARCH_PERFMON_EVENTSEL0 >=
6593                             min(INTEL_PMC_MAX_GENERIC, x86_pmu.num_counters_gp))
6594                                 continue;
6595                         break;
6596                 case MSR_IA32_XFD:
6597                 case MSR_IA32_XFD_ERR:
6598                         if (!kvm_cpu_cap_has(X86_FEATURE_XFD))
6599                                 continue;
6600                         break;
6601                 default:
6602                         break;
6603                 }
6604
6605                 msrs_to_save[num_msrs_to_save++] = msrs_to_save_all[i];
6606         }
6607
6608         for (i = 0; i < ARRAY_SIZE(emulated_msrs_all); i++) {
6609                 if (!static_call(kvm_x86_has_emulated_msr)(NULL, emulated_msrs_all[i]))
6610                         continue;
6611
6612                 emulated_msrs[num_emulated_msrs++] = emulated_msrs_all[i];
6613         }
6614
6615         for (i = 0; i < ARRAY_SIZE(msr_based_features_all); i++) {
6616                 struct kvm_msr_entry msr;
6617
6618                 msr.index = msr_based_features_all[i];
6619                 if (kvm_get_msr_feature(&msr))
6620                         continue;
6621
6622                 msr_based_features[num_msr_based_features++] = msr_based_features_all[i];
6623         }
6624 }
6625
6626 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
6627                            const void *v)
6628 {
6629         int handled = 0;
6630         int n;
6631
6632         do {
6633                 n = min(len, 8);
6634                 if (!(lapic_in_kernel(vcpu) &&
6635                       !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
6636                     && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
6637                         break;
6638                 handled += n;
6639                 addr += n;
6640                 len -= n;
6641                 v += n;
6642         } while (len);
6643
6644         return handled;
6645 }
6646
6647 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
6648 {
6649         int handled = 0;
6650         int n;
6651
6652         do {
6653                 n = min(len, 8);
6654                 if (!(lapic_in_kernel(vcpu) &&
6655                       !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
6656                                          addr, n, v))
6657                     && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
6658                         break;
6659                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, v);
6660                 handled += n;
6661                 addr += n;
6662                 len -= n;
6663                 v += n;
6664         } while (len);
6665
6666         return handled;
6667 }
6668
6669 static void kvm_set_segment(struct kvm_vcpu *vcpu,
6670                         struct kvm_segment *var, int seg)
6671 {
6672         static_call(kvm_x86_set_segment)(vcpu, var, seg);
6673 }
6674
6675 void kvm_get_segment(struct kvm_vcpu *vcpu,
6676                      struct kvm_segment *var, int seg)
6677 {
6678         static_call(kvm_x86_get_segment)(vcpu, var, seg);
6679 }
6680
6681 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
6682                            struct x86_exception *exception)
6683 {
6684         struct kvm_mmu *mmu = vcpu->arch.mmu;
6685         gpa_t t_gpa;
6686
6687         BUG_ON(!mmu_is_nested(vcpu));
6688
6689         /* NPT walks are always user-walks */
6690         access |= PFERR_USER_MASK;
6691         t_gpa  = mmu->gva_to_gpa(vcpu, mmu, gpa, access, exception);
6692
6693         return t_gpa;
6694 }
6695
6696 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
6697                               struct x86_exception *exception)
6698 {
6699         struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
6700
6701         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6702         return mmu->gva_to_gpa(vcpu, mmu, gva, access, exception);
6703 }
6704 EXPORT_SYMBOL_GPL(kvm_mmu_gva_to_gpa_read);
6705
6706  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
6707                                 struct x86_exception *exception)
6708 {
6709         struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
6710
6711         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6712         access |= PFERR_FETCH_MASK;
6713         return mmu->gva_to_gpa(vcpu, mmu, gva, access, exception);
6714 }
6715
6716 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
6717                                struct x86_exception *exception)
6718 {
6719         struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
6720
6721         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6722         access |= PFERR_WRITE_MASK;
6723         return mmu->gva_to_gpa(vcpu, mmu, gva, access, exception);
6724 }
6725 EXPORT_SYMBOL_GPL(kvm_mmu_gva_to_gpa_write);
6726
6727 /* uses this to access any guest's mapped memory without checking CPL */
6728 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
6729                                 struct x86_exception *exception)
6730 {
6731         struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
6732
6733         return mmu->gva_to_gpa(vcpu, mmu, gva, 0, exception);
6734 }
6735
6736 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
6737                                       struct kvm_vcpu *vcpu, u32 access,
6738                                       struct x86_exception *exception)
6739 {
6740         struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
6741         void *data = val;
6742         int r = X86EMUL_CONTINUE;
6743
6744         while (bytes) {
6745                 gpa_t gpa = mmu->gva_to_gpa(vcpu, mmu, addr, access, exception);
6746                 unsigned offset = addr & (PAGE_SIZE-1);
6747                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
6748                 int ret;
6749
6750                 if (gpa == UNMAPPED_GVA)
6751                         return X86EMUL_PROPAGATE_FAULT;
6752                 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
6753                                                offset, toread);
6754                 if (ret < 0) {
6755                         r = X86EMUL_IO_NEEDED;
6756                         goto out;
6757                 }
6758
6759                 bytes -= toread;
6760                 data += toread;
6761                 addr += toread;
6762         }
6763 out:
6764         return r;
6765 }
6766
6767 /* used for instruction fetching */
6768 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
6769                                 gva_t addr, void *val, unsigned int bytes,
6770                                 struct x86_exception *exception)
6771 {
6772         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6773         struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
6774         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6775         unsigned offset;
6776         int ret;
6777
6778         /* Inline kvm_read_guest_virt_helper for speed.  */
6779         gpa_t gpa = mmu->gva_to_gpa(vcpu, mmu, addr, access|PFERR_FETCH_MASK,
6780                                     exception);
6781         if (unlikely(gpa == UNMAPPED_GVA))
6782                 return X86EMUL_PROPAGATE_FAULT;
6783
6784         offset = addr & (PAGE_SIZE-1);
6785         if (WARN_ON(offset + bytes > PAGE_SIZE))
6786                 bytes = (unsigned)PAGE_SIZE - offset;
6787         ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
6788                                        offset, bytes);
6789         if (unlikely(ret < 0))
6790                 return X86EMUL_IO_NEEDED;
6791
6792         return X86EMUL_CONTINUE;
6793 }
6794
6795 int kvm_read_guest_virt(struct kvm_vcpu *vcpu,
6796                                gva_t addr, void *val, unsigned int bytes,
6797                                struct x86_exception *exception)
6798 {
6799         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6800
6801         /*
6802          * FIXME: this should call handle_emulation_failure if X86EMUL_IO_NEEDED
6803          * is returned, but our callers are not ready for that and they blindly
6804          * call kvm_inject_page_fault.  Ensure that they at least do not leak
6805          * uninitialized kernel stack memory into cr2 and error code.
6806          */
6807         memset(exception, 0, sizeof(*exception));
6808         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
6809                                           exception);
6810 }
6811 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
6812
6813 static int emulator_read_std(struct x86_emulate_ctxt *ctxt,
6814                              gva_t addr, void *val, unsigned int bytes,
6815                              struct x86_exception *exception, bool system)
6816 {
6817         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6818         u32 access = 0;
6819
6820         if (!system && static_call(kvm_x86_get_cpl)(vcpu) == 3)
6821                 access |= PFERR_USER_MASK;
6822
6823         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access, exception);
6824 }
6825
6826 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt *ctxt,
6827                 unsigned long addr, void *val, unsigned int bytes)
6828 {
6829         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6830         int r = kvm_vcpu_read_guest(vcpu, addr, val, bytes);
6831
6832         return r < 0 ? X86EMUL_IO_NEEDED : X86EMUL_CONTINUE;
6833 }
6834
6835 static int kvm_write_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
6836                                       struct kvm_vcpu *vcpu, u32 access,
6837                                       struct x86_exception *exception)
6838 {
6839         struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
6840         void *data = val;
6841         int r = X86EMUL_CONTINUE;
6842
6843         while (bytes) {
6844                 gpa_t gpa = mmu->gva_to_gpa(vcpu, mmu, addr, access, exception);
6845                 unsigned offset = addr & (PAGE_SIZE-1);
6846                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
6847                 int ret;
6848
6849                 if (gpa == UNMAPPED_GVA)
6850                         return X86EMUL_PROPAGATE_FAULT;
6851                 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
6852                 if (ret < 0) {
6853                         r = X86EMUL_IO_NEEDED;
6854                         goto out;
6855                 }
6856
6857                 bytes -= towrite;
6858                 data += towrite;
6859                 addr += towrite;
6860         }
6861 out:
6862         return r;
6863 }
6864
6865 static int emulator_write_std(struct x86_emulate_ctxt *ctxt, gva_t addr, void *val,
6866                               unsigned int bytes, struct x86_exception *exception,
6867                               bool system)
6868 {
6869         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6870         u32 access = PFERR_WRITE_MASK;
6871
6872         if (!system && static_call(kvm_x86_get_cpl)(vcpu) == 3)
6873                 access |= PFERR_USER_MASK;
6874
6875         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
6876                                            access, exception);
6877 }
6878
6879 int kvm_write_guest_virt_system(struct kvm_vcpu *vcpu, gva_t addr, void *val,
6880                                 unsigned int bytes, struct x86_exception *exception)
6881 {
6882         /* kvm_write_guest_virt_system can pull in tons of pages. */
6883         vcpu->arch.l1tf_flush_l1d = true;
6884
6885         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
6886                                            PFERR_WRITE_MASK, exception);
6887 }
6888 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
6889
6890 static int kvm_can_emulate_insn(struct kvm_vcpu *vcpu, int emul_type,
6891                                 void *insn, int insn_len)
6892 {
6893         return static_call(kvm_x86_can_emulate_instruction)(vcpu, emul_type,
6894                                                             insn, insn_len);
6895 }
6896
6897 int handle_ud(struct kvm_vcpu *vcpu)
6898 {
6899         static const char kvm_emulate_prefix[] = { __KVM_EMULATE_PREFIX };
6900         int emul_type = EMULTYPE_TRAP_UD;
6901         char sig[5]; /* ud2; .ascii "kvm" */
6902         struct x86_exception e;
6903
6904         if (unlikely(!kvm_can_emulate_insn(vcpu, emul_type, NULL, 0)))
6905                 return 1;
6906
6907         if (force_emulation_prefix &&
6908             kvm_read_guest_virt(vcpu, kvm_get_linear_rip(vcpu),
6909                                 sig, sizeof(sig), &e) == 0 &&
6910             memcmp(sig, kvm_emulate_prefix, sizeof(sig)) == 0) {
6911                 kvm_rip_write(vcpu, kvm_rip_read(vcpu) + sizeof(sig));
6912                 emul_type = EMULTYPE_TRAP_UD_FORCED;
6913         }
6914
6915         return kvm_emulate_instruction(vcpu, emul_type);
6916 }
6917 EXPORT_SYMBOL_GPL(handle_ud);
6918
6919 static int vcpu_is_mmio_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
6920                             gpa_t gpa, bool write)
6921 {
6922         /* For APIC access vmexit */
6923         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
6924                 return 1;
6925
6926         if (vcpu_match_mmio_gpa(vcpu, gpa)) {
6927                 trace_vcpu_match_mmio(gva, gpa, write, true);
6928                 return 1;
6929         }
6930
6931         return 0;
6932 }
6933
6934 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
6935                                 gpa_t *gpa, struct x86_exception *exception,
6936                                 bool write)
6937 {
6938         struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
6939         u32 access = ((static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0)
6940                 | (write ? PFERR_WRITE_MASK : 0);
6941
6942         /*
6943          * currently PKRU is only applied to ept enabled guest so
6944          * there is no pkey in EPT page table for L1 guest or EPT
6945          * shadow page table for L2 guest.
6946          */
6947         if (vcpu_match_mmio_gva(vcpu, gva) && (!is_paging(vcpu) ||
6948             !permission_fault(vcpu, vcpu->arch.walk_mmu,
6949                               vcpu->arch.mmio_access, 0, access))) {
6950                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
6951                                         (gva & (PAGE_SIZE - 1));
6952                 trace_vcpu_match_mmio(gva, *gpa, write, false);
6953                 return 1;
6954         }
6955
6956         *gpa = mmu->gva_to_gpa(vcpu, mmu, gva, access, exception);
6957
6958         if (*gpa == UNMAPPED_GVA)
6959                 return -1;
6960
6961         return vcpu_is_mmio_gpa(vcpu, gva, *gpa, write);
6962 }
6963
6964 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
6965                         const void *val, int bytes)
6966 {
6967         int ret;
6968
6969         ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
6970         if (ret < 0)
6971                 return 0;
6972         kvm_page_track_write(vcpu, gpa, val, bytes);
6973         return 1;
6974 }
6975
6976 struct read_write_emulator_ops {
6977         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
6978                                   int bytes);
6979         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
6980                                   void *val, int bytes);
6981         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
6982                                int bytes, void *val);
6983         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
6984                                     void *val, int bytes);
6985         bool write;
6986 };
6987
6988 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
6989 {
6990         if (vcpu->mmio_read_completed) {
6991                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
6992                                vcpu->mmio_fragments[0].gpa, val);
6993                 vcpu->mmio_read_completed = 0;
6994                 return 1;
6995         }
6996
6997         return 0;
6998 }
6999
7000 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
7001                         void *val, int bytes)
7002 {
7003         return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
7004 }
7005
7006 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
7007                          void *val, int bytes)
7008 {
7009         return emulator_write_phys(vcpu, gpa, val, bytes);
7010 }
7011
7012 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
7013 {
7014         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, val);
7015         return vcpu_mmio_write(vcpu, gpa, bytes, val);
7016 }
7017
7018 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
7019                           void *val, int bytes)
7020 {
7021         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, NULL);
7022         return X86EMUL_IO_NEEDED;
7023 }
7024
7025 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
7026                            void *val, int bytes)
7027 {
7028         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
7029
7030         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
7031         return X86EMUL_CONTINUE;
7032 }
7033
7034 static const struct read_write_emulator_ops read_emultor = {
7035         .read_write_prepare = read_prepare,
7036         .read_write_emulate = read_emulate,
7037         .read_write_mmio = vcpu_mmio_read,
7038         .read_write_exit_mmio = read_exit_mmio,
7039 };
7040
7041 static const struct read_write_emulator_ops write_emultor = {
7042         .read_write_emulate = write_emulate,
7043         .read_write_mmio = write_mmio,
7044         .read_write_exit_mmio = write_exit_mmio,
7045         .write = true,
7046 };
7047
7048 static int emulator_read_write_onepage(unsigned long addr, void *val,
7049                                        unsigned int bytes,
7050                                        struct x86_exception *exception,
7051                                        struct kvm_vcpu *vcpu,
7052                                        const struct read_write_emulator_ops *ops)
7053 {
7054         gpa_t gpa;
7055         int handled, ret;
7056         bool write = ops->write;
7057         struct kvm_mmio_fragment *frag;
7058         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7059
7060         /*
7061          * If the exit was due to a NPF we may already have a GPA.
7062          * If the GPA is present, use it to avoid the GVA to GPA table walk.
7063          * Note, this cannot be used on string operations since string
7064          * operation using rep will only have the initial GPA from the NPF
7065          * occurred.
7066          */
7067         if (ctxt->gpa_available && emulator_can_use_gpa(ctxt) &&
7068             (addr & ~PAGE_MASK) == (ctxt->gpa_val & ~PAGE_MASK)) {
7069                 gpa = ctxt->gpa_val;
7070                 ret = vcpu_is_mmio_gpa(vcpu, addr, gpa, write);
7071         } else {
7072                 ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
7073                 if (ret < 0)
7074                         return X86EMUL_PROPAGATE_FAULT;
7075         }
7076
7077         if (!ret && ops->read_write_emulate(vcpu, gpa, val, bytes))
7078                 return X86EMUL_CONTINUE;
7079
7080         /*
7081          * Is this MMIO handled locally?
7082          */
7083         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
7084         if (handled == bytes)
7085                 return X86EMUL_CONTINUE;
7086
7087         gpa += handled;
7088         bytes -= handled;
7089         val += handled;
7090
7091         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
7092         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
7093         frag->gpa = gpa;
7094         frag->data = val;
7095         frag->len = bytes;
7096         return X86EMUL_CONTINUE;
7097 }
7098
7099 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
7100                         unsigned long addr,
7101                         void *val, unsigned int bytes,
7102                         struct x86_exception *exception,
7103                         const struct read_write_emulator_ops *ops)
7104 {
7105         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7106         gpa_t gpa;
7107         int rc;
7108
7109         if (ops->read_write_prepare &&
7110                   ops->read_write_prepare(vcpu, val, bytes))
7111                 return X86EMUL_CONTINUE;
7112
7113         vcpu->mmio_nr_fragments = 0;
7114
7115         /* Crossing a page boundary? */
7116         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
7117                 int now;
7118
7119                 now = -addr & ~PAGE_MASK;
7120                 rc = emulator_read_write_onepage(addr, val, now, exception,
7121                                                  vcpu, ops);
7122
7123                 if (rc != X86EMUL_CONTINUE)
7124                         return rc;
7125                 addr += now;
7126                 if (ctxt->mode != X86EMUL_MODE_PROT64)
7127                         addr = (u32)addr;
7128                 val += now;
7129                 bytes -= now;
7130         }
7131
7132         rc = emulator_read_write_onepage(addr, val, bytes, exception,
7133                                          vcpu, ops);
7134         if (rc != X86EMUL_CONTINUE)
7135                 return rc;
7136
7137         if (!vcpu->mmio_nr_fragments)
7138                 return rc;
7139
7140         gpa = vcpu->mmio_fragments[0].gpa;
7141
7142         vcpu->mmio_needed = 1;
7143         vcpu->mmio_cur_fragment = 0;
7144
7145         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
7146         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
7147         vcpu->run->exit_reason = KVM_EXIT_MMIO;
7148         vcpu->run->mmio.phys_addr = gpa;
7149
7150         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
7151 }
7152
7153 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
7154                                   unsigned long addr,
7155                                   void *val,
7156                                   unsigned int bytes,
7157                                   struct x86_exception *exception)
7158 {
7159         return emulator_read_write(ctxt, addr, val, bytes,
7160                                    exception, &read_emultor);
7161 }
7162
7163 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
7164                             unsigned long addr,
7165                             const void *val,
7166                             unsigned int bytes,
7167                             struct x86_exception *exception)
7168 {
7169         return emulator_read_write(ctxt, addr, (void *)val, bytes,
7170                                    exception, &write_emultor);
7171 }
7172
7173 #define CMPXCHG_TYPE(t, ptr, old, new) \
7174         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
7175
7176 #ifdef CONFIG_X86_64
7177 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
7178 #else
7179 #  define CMPXCHG64(ptr, old, new) \
7180         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
7181 #endif
7182
7183 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
7184                                      unsigned long addr,
7185                                      const void *old,
7186                                      const void *new,
7187                                      unsigned int bytes,
7188                                      struct x86_exception *exception)
7189 {
7190         struct kvm_host_map map;
7191         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7192         u64 page_line_mask;
7193         gpa_t gpa;
7194         char *kaddr;
7195         bool exchanged;
7196
7197         /* guests cmpxchg8b have to be emulated atomically */
7198         if (bytes > 8 || (bytes & (bytes - 1)))
7199                 goto emul_write;
7200
7201         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
7202
7203         if (gpa == UNMAPPED_GVA ||
7204             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
7205                 goto emul_write;
7206
7207         /*
7208          * Emulate the atomic as a straight write to avoid #AC if SLD is
7209          * enabled in the host and the access splits a cache line.
7210          */
7211         if (boot_cpu_has(X86_FEATURE_SPLIT_LOCK_DETECT))
7212                 page_line_mask = ~(cache_line_size() - 1);
7213         else
7214                 page_line_mask = PAGE_MASK;
7215
7216         if (((gpa + bytes - 1) & page_line_mask) != (gpa & page_line_mask))
7217                 goto emul_write;
7218
7219         if (kvm_vcpu_map(vcpu, gpa_to_gfn(gpa), &map))
7220                 goto emul_write;
7221
7222         kaddr = map.hva + offset_in_page(gpa);
7223
7224         switch (bytes) {
7225         case 1:
7226                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
7227                 break;
7228         case 2:
7229                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
7230                 break;
7231         case 4:
7232                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
7233                 break;
7234         case 8:
7235                 exchanged = CMPXCHG64(kaddr, old, new);
7236                 break;
7237         default:
7238                 BUG();
7239         }
7240
7241         kvm_vcpu_unmap(vcpu, &map, true);
7242
7243         if (!exchanged)
7244                 return X86EMUL_CMPXCHG_FAILED;
7245
7246         kvm_page_track_write(vcpu, gpa, new, bytes);
7247
7248         return X86EMUL_CONTINUE;
7249
7250 emul_write:
7251         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
7252
7253         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
7254 }
7255
7256 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
7257 {
7258         int r = 0, i;
7259
7260         for (i = 0; i < vcpu->arch.pio.count; i++) {
7261                 if (vcpu->arch.pio.in)
7262                         r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
7263                                             vcpu->arch.pio.size, pd);
7264                 else
7265                         r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
7266                                              vcpu->arch.pio.port, vcpu->arch.pio.size,
7267                                              pd);
7268                 if (r)
7269                         break;
7270                 pd += vcpu->arch.pio.size;
7271         }
7272         return r;
7273 }
7274
7275 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
7276                                unsigned short port,
7277                                unsigned int count, bool in)
7278 {
7279         vcpu->arch.pio.port = port;
7280         vcpu->arch.pio.in = in;
7281         vcpu->arch.pio.count  = count;
7282         vcpu->arch.pio.size = size;
7283
7284         if (!kernel_pio(vcpu, vcpu->arch.pio_data))
7285                 return 1;
7286
7287         vcpu->run->exit_reason = KVM_EXIT_IO;
7288         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
7289         vcpu->run->io.size = size;
7290         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
7291         vcpu->run->io.count = count;
7292         vcpu->run->io.port = port;
7293
7294         return 0;
7295 }
7296
7297 static int __emulator_pio_in(struct kvm_vcpu *vcpu, int size,
7298                              unsigned short port, unsigned int count)
7299 {
7300         WARN_ON(vcpu->arch.pio.count);
7301         memset(vcpu->arch.pio_data, 0, size * count);
7302         return emulator_pio_in_out(vcpu, size, port, count, true);
7303 }
7304
7305 static void complete_emulator_pio_in(struct kvm_vcpu *vcpu, void *val)
7306 {
7307         int size = vcpu->arch.pio.size;
7308         unsigned count = vcpu->arch.pio.count;
7309         memcpy(val, vcpu->arch.pio_data, size * count);
7310         trace_kvm_pio(KVM_PIO_IN, vcpu->arch.pio.port, size, count, vcpu->arch.pio_data);
7311         vcpu->arch.pio.count = 0;
7312 }
7313
7314 static int emulator_pio_in(struct kvm_vcpu *vcpu, int size,
7315                            unsigned short port, void *val, unsigned int count)
7316 {
7317         if (vcpu->arch.pio.count) {
7318                 /*
7319                  * Complete a previous iteration that required userspace I/O.
7320                  * Note, @count isn't guaranteed to match pio.count as userspace
7321                  * can modify ECX before rerunning the vCPU.  Ignore any such
7322                  * shenanigans as KVM doesn't support modifying the rep count,
7323                  * and the emulator ensures @count doesn't overflow the buffer.
7324                  */
7325         } else {
7326                 int r = __emulator_pio_in(vcpu, size, port, count);
7327                 if (!r)
7328                         return r;
7329
7330                 /* Results already available, fall through.  */
7331         }
7332
7333         complete_emulator_pio_in(vcpu, val);
7334         return 1;
7335 }
7336
7337 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
7338                                     int size, unsigned short port, void *val,
7339                                     unsigned int count)
7340 {
7341         return emulator_pio_in(emul_to_vcpu(ctxt), size, port, val, count);
7342
7343 }
7344
7345 static int emulator_pio_out(struct kvm_vcpu *vcpu, int size,
7346                             unsigned short port, const void *val,
7347                             unsigned int count)
7348 {
7349         int ret;
7350
7351         memcpy(vcpu->arch.pio_data, val, size * count);
7352         trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
7353         ret = emulator_pio_in_out(vcpu, size, port, count, false);
7354         if (ret)
7355                 vcpu->arch.pio.count = 0;
7356
7357         return ret;
7358 }
7359
7360 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
7361                                      int size, unsigned short port,
7362                                      const void *val, unsigned int count)
7363 {
7364         return emulator_pio_out(emul_to_vcpu(ctxt), size, port, val, count);
7365 }
7366
7367 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
7368 {
7369         return static_call(kvm_x86_get_segment_base)(vcpu, seg);
7370 }
7371
7372 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
7373 {
7374         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
7375 }
7376
7377 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
7378 {
7379         if (!need_emulate_wbinvd(vcpu))
7380                 return X86EMUL_CONTINUE;
7381
7382         if (static_call(kvm_x86_has_wbinvd_exit)()) {
7383                 int cpu = get_cpu();
7384
7385                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
7386                 on_each_cpu_mask(vcpu->arch.wbinvd_dirty_mask,
7387                                 wbinvd_ipi, NULL, 1);
7388                 put_cpu();
7389                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
7390         } else
7391                 wbinvd();
7392         return X86EMUL_CONTINUE;
7393 }
7394
7395 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
7396 {
7397         kvm_emulate_wbinvd_noskip(vcpu);
7398         return kvm_skip_emulated_instruction(vcpu);
7399 }
7400 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
7401
7402
7403
7404 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
7405 {
7406         kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
7407 }
7408
7409 static void emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
7410                             unsigned long *dest)
7411 {
7412         kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
7413 }
7414
7415 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
7416                            unsigned long value)
7417 {
7418
7419         return kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
7420 }
7421
7422 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
7423 {
7424         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
7425 }
7426
7427 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
7428 {
7429         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7430         unsigned long value;
7431
7432         switch (cr) {
7433         case 0:
7434                 value = kvm_read_cr0(vcpu);
7435                 break;
7436         case 2:
7437                 value = vcpu->arch.cr2;
7438                 break;
7439         case 3:
7440                 value = kvm_read_cr3(vcpu);
7441                 break;
7442         case 4:
7443                 value = kvm_read_cr4(vcpu);
7444                 break;
7445         case 8:
7446                 value = kvm_get_cr8(vcpu);
7447                 break;
7448         default:
7449                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
7450                 return 0;
7451         }
7452
7453         return value;
7454 }
7455
7456 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
7457 {
7458         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7459         int res = 0;
7460
7461         switch (cr) {
7462         case 0:
7463                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
7464                 break;
7465         case 2:
7466                 vcpu->arch.cr2 = val;
7467                 break;
7468         case 3:
7469                 res = kvm_set_cr3(vcpu, val);
7470                 break;
7471         case 4:
7472                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
7473                 break;
7474         case 8:
7475                 res = kvm_set_cr8(vcpu, val);
7476                 break;
7477         default:
7478                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
7479                 res = -1;
7480         }
7481
7482         return res;
7483 }
7484
7485 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
7486 {
7487         return static_call(kvm_x86_get_cpl)(emul_to_vcpu(ctxt));
7488 }
7489
7490 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
7491 {
7492         static_call(kvm_x86_get_gdt)(emul_to_vcpu(ctxt), dt);
7493 }
7494
7495 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
7496 {
7497         static_call(kvm_x86_get_idt)(emul_to_vcpu(ctxt), dt);
7498 }
7499
7500 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
7501 {
7502         static_call(kvm_x86_set_gdt)(emul_to_vcpu(ctxt), dt);
7503 }
7504
7505 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
7506 {
7507         static_call(kvm_x86_set_idt)(emul_to_vcpu(ctxt), dt);
7508 }
7509
7510 static unsigned long emulator_get_cached_segment_base(
7511         struct x86_emulate_ctxt *ctxt, int seg)
7512 {
7513         return get_segment_base(emul_to_vcpu(ctxt), seg);
7514 }
7515
7516 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
7517                                  struct desc_struct *desc, u32 *base3,
7518                                  int seg)
7519 {
7520         struct kvm_segment var;
7521
7522         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
7523         *selector = var.selector;
7524
7525         if (var.unusable) {
7526                 memset(desc, 0, sizeof(*desc));
7527                 if (base3)
7528                         *base3 = 0;
7529                 return false;
7530         }
7531
7532         if (var.g)
7533                 var.limit >>= 12;
7534         set_desc_limit(desc, var.limit);
7535         set_desc_base(desc, (unsigned long)var.base);
7536 #ifdef CONFIG_X86_64
7537         if (base3)
7538                 *base3 = var.base >> 32;
7539 #endif
7540         desc->type = var.type;
7541         desc->s = var.s;
7542         desc->dpl = var.dpl;
7543         desc->p = var.present;
7544         desc->avl = var.avl;
7545         desc->l = var.l;
7546         desc->d = var.db;
7547         desc->g = var.g;
7548
7549         return true;
7550 }
7551
7552 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
7553                                  struct desc_struct *desc, u32 base3,
7554                                  int seg)
7555 {
7556         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7557         struct kvm_segment var;
7558
7559         var.selector = selector;
7560         var.base = get_desc_base(desc);
7561 #ifdef CONFIG_X86_64
7562         var.base |= ((u64)base3) << 32;
7563 #endif
7564         var.limit = get_desc_limit(desc);
7565         if (desc->g)
7566                 var.limit = (var.limit << 12) | 0xfff;
7567         var.type = desc->type;
7568         var.dpl = desc->dpl;
7569         var.db = desc->d;
7570         var.s = desc->s;
7571         var.l = desc->l;
7572         var.g = desc->g;
7573         var.avl = desc->avl;
7574         var.present = desc->p;
7575         var.unusable = !var.present;
7576         var.padding = 0;
7577
7578         kvm_set_segment(vcpu, &var, seg);
7579         return;
7580 }
7581
7582 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
7583                             u32 msr_index, u64 *pdata)
7584 {
7585         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7586         int r;
7587
7588         r = kvm_get_msr(vcpu, msr_index, pdata);
7589
7590         if (r && kvm_msr_user_space(vcpu, msr_index, KVM_EXIT_X86_RDMSR, 0,
7591                                     complete_emulated_rdmsr, r)) {
7592                 /* Bounce to user space */
7593                 return X86EMUL_IO_NEEDED;
7594         }
7595
7596         return r;
7597 }
7598
7599 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
7600                             u32 msr_index, u64 data)
7601 {
7602         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7603         int r;
7604
7605         r = kvm_set_msr(vcpu, msr_index, data);
7606
7607         if (r && kvm_msr_user_space(vcpu, msr_index, KVM_EXIT_X86_WRMSR, data,
7608                                     complete_emulated_msr_access, r)) {
7609                 /* Bounce to user space */
7610                 return X86EMUL_IO_NEEDED;
7611         }
7612
7613         return r;
7614 }
7615
7616 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
7617 {
7618         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7619
7620         return vcpu->arch.smbase;
7621 }
7622
7623 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
7624 {
7625         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7626
7627         vcpu->arch.smbase = smbase;
7628 }
7629
7630 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
7631                               u32 pmc)
7632 {
7633         if (kvm_pmu_is_valid_rdpmc_ecx(emul_to_vcpu(ctxt), pmc))
7634                 return 0;
7635         return -EINVAL;
7636 }
7637
7638 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
7639                              u32 pmc, u64 *pdata)
7640 {
7641         return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
7642 }
7643
7644 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
7645 {
7646         emul_to_vcpu(ctxt)->arch.halt_request = 1;
7647 }
7648
7649 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
7650                               struct x86_instruction_info *info,
7651                               enum x86_intercept_stage stage)
7652 {
7653         return static_call(kvm_x86_check_intercept)(emul_to_vcpu(ctxt), info, stage,
7654                                             &ctxt->exception);
7655 }
7656
7657 static bool emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
7658                               u32 *eax, u32 *ebx, u32 *ecx, u32 *edx,
7659                               bool exact_only)
7660 {
7661         return kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx, exact_only);
7662 }
7663
7664 static bool emulator_guest_has_long_mode(struct x86_emulate_ctxt *ctxt)
7665 {
7666         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_LM);
7667 }
7668
7669 static bool emulator_guest_has_movbe(struct x86_emulate_ctxt *ctxt)
7670 {
7671         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_MOVBE);
7672 }
7673
7674 static bool emulator_guest_has_fxsr(struct x86_emulate_ctxt *ctxt)
7675 {
7676         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_FXSR);
7677 }
7678
7679 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
7680 {
7681         return kvm_register_read_raw(emul_to_vcpu(ctxt), reg);
7682 }
7683
7684 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
7685 {
7686         kvm_register_write_raw(emul_to_vcpu(ctxt), reg, val);
7687 }
7688
7689 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
7690 {
7691         static_call(kvm_x86_set_nmi_mask)(emul_to_vcpu(ctxt), masked);
7692 }
7693
7694 static unsigned emulator_get_hflags(struct x86_emulate_ctxt *ctxt)
7695 {
7696         return emul_to_vcpu(ctxt)->arch.hflags;
7697 }
7698
7699 static void emulator_exiting_smm(struct x86_emulate_ctxt *ctxt)
7700 {
7701         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7702
7703         kvm_smm_changed(vcpu, false);
7704 }
7705
7706 static int emulator_leave_smm(struct x86_emulate_ctxt *ctxt,
7707                                   const char *smstate)
7708 {
7709         return static_call(kvm_x86_leave_smm)(emul_to_vcpu(ctxt), smstate);
7710 }
7711
7712 static void emulator_triple_fault(struct x86_emulate_ctxt *ctxt)
7713 {
7714         kvm_make_request(KVM_REQ_TRIPLE_FAULT, emul_to_vcpu(ctxt));
7715 }
7716
7717 static int emulator_set_xcr(struct x86_emulate_ctxt *ctxt, u32 index, u64 xcr)
7718 {
7719         return __kvm_set_xcr(emul_to_vcpu(ctxt), index, xcr);
7720 }
7721
7722 static const struct x86_emulate_ops emulate_ops = {
7723         .read_gpr            = emulator_read_gpr,
7724         .write_gpr           = emulator_write_gpr,
7725         .read_std            = emulator_read_std,
7726         .write_std           = emulator_write_std,
7727         .read_phys           = kvm_read_guest_phys_system,
7728         .fetch               = kvm_fetch_guest_virt,
7729         .read_emulated       = emulator_read_emulated,
7730         .write_emulated      = emulator_write_emulated,
7731         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
7732         .invlpg              = emulator_invlpg,
7733         .pio_in_emulated     = emulator_pio_in_emulated,
7734         .pio_out_emulated    = emulator_pio_out_emulated,
7735         .get_segment         = emulator_get_segment,
7736         .set_segment         = emulator_set_segment,
7737         .get_cached_segment_base = emulator_get_cached_segment_base,
7738         .get_gdt             = emulator_get_gdt,
7739         .get_idt             = emulator_get_idt,
7740         .set_gdt             = emulator_set_gdt,
7741         .set_idt             = emulator_set_idt,
7742         .get_cr              = emulator_get_cr,
7743         .set_cr              = emulator_set_cr,
7744         .cpl                 = emulator_get_cpl,
7745         .get_dr              = emulator_get_dr,
7746         .set_dr              = emulator_set_dr,
7747         .get_smbase          = emulator_get_smbase,
7748         .set_smbase          = emulator_set_smbase,
7749         .set_msr             = emulator_set_msr,
7750         .get_msr             = emulator_get_msr,
7751         .check_pmc           = emulator_check_pmc,
7752         .read_pmc            = emulator_read_pmc,
7753         .halt                = emulator_halt,
7754         .wbinvd              = emulator_wbinvd,
7755         .fix_hypercall       = emulator_fix_hypercall,
7756         .intercept           = emulator_intercept,
7757         .get_cpuid           = emulator_get_cpuid,
7758         .guest_has_long_mode = emulator_guest_has_long_mode,
7759         .guest_has_movbe     = emulator_guest_has_movbe,
7760         .guest_has_fxsr      = emulator_guest_has_fxsr,
7761         .set_nmi_mask        = emulator_set_nmi_mask,
7762         .get_hflags          = emulator_get_hflags,
7763         .exiting_smm         = emulator_exiting_smm,
7764         .leave_smm           = emulator_leave_smm,
7765         .triple_fault        = emulator_triple_fault,
7766         .set_xcr             = emulator_set_xcr,
7767 };
7768
7769 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
7770 {
7771         u32 int_shadow = static_call(kvm_x86_get_interrupt_shadow)(vcpu);
7772         /*
7773          * an sti; sti; sequence only disable interrupts for the first
7774          * instruction. So, if the last instruction, be it emulated or
7775          * not, left the system with the INT_STI flag enabled, it
7776          * means that the last instruction is an sti. We should not
7777          * leave the flag on in this case. The same goes for mov ss
7778          */
7779         if (int_shadow & mask)
7780                 mask = 0;
7781         if (unlikely(int_shadow || mask)) {
7782                 static_call(kvm_x86_set_interrupt_shadow)(vcpu, mask);
7783                 if (!mask)
7784                         kvm_make_request(KVM_REQ_EVENT, vcpu);
7785         }
7786 }
7787
7788 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
7789 {
7790         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7791         if (ctxt->exception.vector == PF_VECTOR)
7792                 return kvm_inject_emulated_page_fault(vcpu, &ctxt->exception);
7793
7794         if (ctxt->exception.error_code_valid)
7795                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
7796                                       ctxt->exception.error_code);
7797         else
7798                 kvm_queue_exception(vcpu, ctxt->exception.vector);
7799         return false;
7800 }
7801
7802 static struct x86_emulate_ctxt *alloc_emulate_ctxt(struct kvm_vcpu *vcpu)
7803 {
7804         struct x86_emulate_ctxt *ctxt;
7805
7806         ctxt = kmem_cache_zalloc(x86_emulator_cache, GFP_KERNEL_ACCOUNT);
7807         if (!ctxt) {
7808                 pr_err("kvm: failed to allocate vcpu's emulator\n");
7809                 return NULL;
7810         }
7811
7812         ctxt->vcpu = vcpu;
7813         ctxt->ops = &emulate_ops;
7814         vcpu->arch.emulate_ctxt = ctxt;
7815
7816         return ctxt;
7817 }
7818
7819 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
7820 {
7821         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7822         int cs_db, cs_l;
7823
7824         static_call(kvm_x86_get_cs_db_l_bits)(vcpu, &cs_db, &cs_l);
7825
7826         ctxt->gpa_available = false;
7827         ctxt->eflags = kvm_get_rflags(vcpu);
7828         ctxt->tf = (ctxt->eflags & X86_EFLAGS_TF) != 0;
7829
7830         ctxt->eip = kvm_rip_read(vcpu);
7831         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
7832                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
7833                      (cs_l && is_long_mode(vcpu))       ? X86EMUL_MODE_PROT64 :
7834                      cs_db                              ? X86EMUL_MODE_PROT32 :
7835                                                           X86EMUL_MODE_PROT16;
7836         BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
7837         BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
7838         BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
7839
7840         ctxt->interruptibility = 0;
7841         ctxt->have_exception = false;
7842         ctxt->exception.vector = -1;
7843         ctxt->perm_ok = false;
7844
7845         init_decode_cache(ctxt);
7846         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
7847 }
7848
7849 void kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
7850 {
7851         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7852         int ret;
7853
7854         init_emulate_ctxt(vcpu);
7855
7856         ctxt->op_bytes = 2;
7857         ctxt->ad_bytes = 2;
7858         ctxt->_eip = ctxt->eip + inc_eip;
7859         ret = emulate_int_real(ctxt, irq);
7860
7861         if (ret != X86EMUL_CONTINUE) {
7862                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
7863         } else {
7864                 ctxt->eip = ctxt->_eip;
7865                 kvm_rip_write(vcpu, ctxt->eip);
7866                 kvm_set_rflags(vcpu, ctxt->eflags);
7867         }
7868 }
7869 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
7870
7871 static void prepare_emulation_failure_exit(struct kvm_vcpu *vcpu, u64 *data,
7872                                            u8 ndata, u8 *insn_bytes, u8 insn_size)
7873 {
7874         struct kvm_run *run = vcpu->run;
7875         u64 info[5];
7876         u8 info_start;
7877
7878         /*
7879          * Zero the whole array used to retrieve the exit info, as casting to
7880          * u32 for select entries will leave some chunks uninitialized.
7881          */
7882         memset(&info, 0, sizeof(info));
7883
7884         static_call(kvm_x86_get_exit_info)(vcpu, (u32 *)&info[0], &info[1],
7885                                            &info[2], (u32 *)&info[3],
7886                                            (u32 *)&info[4]);
7887
7888         run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
7889         run->emulation_failure.suberror = KVM_INTERNAL_ERROR_EMULATION;
7890
7891         /*
7892          * There's currently space for 13 entries, but 5 are used for the exit
7893          * reason and info.  Restrict to 4 to reduce the maintenance burden
7894          * when expanding kvm_run.emulation_failure in the future.
7895          */
7896         if (WARN_ON_ONCE(ndata > 4))
7897                 ndata = 4;
7898
7899         /* Always include the flags as a 'data' entry. */
7900         info_start = 1;
7901         run->emulation_failure.flags = 0;
7902
7903         if (insn_size) {
7904                 BUILD_BUG_ON((sizeof(run->emulation_failure.insn_size) +
7905                               sizeof(run->emulation_failure.insn_bytes) != 16));
7906                 info_start += 2;
7907                 run->emulation_failure.flags |=
7908                         KVM_INTERNAL_ERROR_EMULATION_FLAG_INSTRUCTION_BYTES;
7909                 run->emulation_failure.insn_size = insn_size;
7910                 memset(run->emulation_failure.insn_bytes, 0x90,
7911                        sizeof(run->emulation_failure.insn_bytes));
7912                 memcpy(run->emulation_failure.insn_bytes, insn_bytes, insn_size);
7913         }
7914
7915         memcpy(&run->internal.data[info_start], info, sizeof(info));
7916         memcpy(&run->internal.data[info_start + ARRAY_SIZE(info)], data,
7917                ndata * sizeof(data[0]));
7918
7919         run->emulation_failure.ndata = info_start + ARRAY_SIZE(info) + ndata;
7920 }
7921
7922 static void prepare_emulation_ctxt_failure_exit(struct kvm_vcpu *vcpu)
7923 {
7924         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7925
7926         prepare_emulation_failure_exit(vcpu, NULL, 0, ctxt->fetch.data,
7927                                        ctxt->fetch.end - ctxt->fetch.data);
7928 }
7929
7930 void __kvm_prepare_emulation_failure_exit(struct kvm_vcpu *vcpu, u64 *data,
7931                                           u8 ndata)
7932 {
7933         prepare_emulation_failure_exit(vcpu, data, ndata, NULL, 0);
7934 }
7935 EXPORT_SYMBOL_GPL(__kvm_prepare_emulation_failure_exit);
7936
7937 void kvm_prepare_emulation_failure_exit(struct kvm_vcpu *vcpu)
7938 {
7939         __kvm_prepare_emulation_failure_exit(vcpu, NULL, 0);
7940 }
7941 EXPORT_SYMBOL_GPL(kvm_prepare_emulation_failure_exit);
7942
7943 static int handle_emulation_failure(struct kvm_vcpu *vcpu, int emulation_type)
7944 {
7945         struct kvm *kvm = vcpu->kvm;
7946
7947         ++vcpu->stat.insn_emulation_fail;
7948         trace_kvm_emulate_insn_failed(vcpu);
7949
7950         if (emulation_type & EMULTYPE_VMWARE_GP) {
7951                 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
7952                 return 1;
7953         }
7954
7955         if (kvm->arch.exit_on_emulation_error ||
7956             (emulation_type & EMULTYPE_SKIP)) {
7957                 prepare_emulation_ctxt_failure_exit(vcpu);
7958                 return 0;
7959         }
7960
7961         kvm_queue_exception(vcpu, UD_VECTOR);
7962
7963         if (!is_guest_mode(vcpu) && static_call(kvm_x86_get_cpl)(vcpu) == 0) {
7964                 prepare_emulation_ctxt_failure_exit(vcpu);
7965                 return 0;
7966         }
7967
7968         return 1;
7969 }
7970
7971 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa,
7972                                   bool write_fault_to_shadow_pgtable,
7973                                   int emulation_type)
7974 {
7975         gpa_t gpa = cr2_or_gpa;
7976         kvm_pfn_t pfn;
7977
7978         if (!(emulation_type & EMULTYPE_ALLOW_RETRY_PF))
7979                 return false;
7980
7981         if (WARN_ON_ONCE(is_guest_mode(vcpu)) ||
7982             WARN_ON_ONCE(!(emulation_type & EMULTYPE_PF)))
7983                 return false;
7984
7985         if (!vcpu->arch.mmu->direct_map) {
7986                 /*
7987                  * Write permission should be allowed since only
7988                  * write access need to be emulated.
7989                  */
7990                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2_or_gpa, NULL);
7991
7992                 /*
7993                  * If the mapping is invalid in guest, let cpu retry
7994                  * it to generate fault.
7995                  */
7996                 if (gpa == UNMAPPED_GVA)
7997                         return true;
7998         }
7999
8000         /*
8001          * Do not retry the unhandleable instruction if it faults on the
8002          * readonly host memory, otherwise it will goto a infinite loop:
8003          * retry instruction -> write #PF -> emulation fail -> retry
8004          * instruction -> ...
8005          */
8006         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
8007
8008         /*
8009          * If the instruction failed on the error pfn, it can not be fixed,
8010          * report the error to userspace.
8011          */
8012         if (is_error_noslot_pfn(pfn))
8013                 return false;
8014
8015         kvm_release_pfn_clean(pfn);
8016
8017         /* The instructions are well-emulated on direct mmu. */
8018         if (vcpu->arch.mmu->direct_map) {
8019                 unsigned int indirect_shadow_pages;
8020
8021                 write_lock(&vcpu->kvm->mmu_lock);
8022                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
8023                 write_unlock(&vcpu->kvm->mmu_lock);
8024
8025                 if (indirect_shadow_pages)
8026                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
8027
8028                 return true;
8029         }
8030
8031         /*
8032          * if emulation was due to access to shadowed page table
8033          * and it failed try to unshadow page and re-enter the
8034          * guest to let CPU execute the instruction.
8035          */
8036         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
8037
8038         /*
8039          * If the access faults on its page table, it can not
8040          * be fixed by unprotecting shadow page and it should
8041          * be reported to userspace.
8042          */
8043         return !write_fault_to_shadow_pgtable;
8044 }
8045
8046 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
8047                               gpa_t cr2_or_gpa,  int emulation_type)
8048 {
8049         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
8050         unsigned long last_retry_eip, last_retry_addr, gpa = cr2_or_gpa;
8051
8052         last_retry_eip = vcpu->arch.last_retry_eip;
8053         last_retry_addr = vcpu->arch.last_retry_addr;
8054
8055         /*
8056          * If the emulation is caused by #PF and it is non-page_table
8057          * writing instruction, it means the VM-EXIT is caused by shadow
8058          * page protected, we can zap the shadow page and retry this
8059          * instruction directly.
8060          *
8061          * Note: if the guest uses a non-page-table modifying instruction
8062          * on the PDE that points to the instruction, then we will unmap
8063          * the instruction and go to an infinite loop. So, we cache the
8064          * last retried eip and the last fault address, if we meet the eip
8065          * and the address again, we can break out of the potential infinite
8066          * loop.
8067          */
8068         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
8069
8070         if (!(emulation_type & EMULTYPE_ALLOW_RETRY_PF))
8071                 return false;
8072
8073         if (WARN_ON_ONCE(is_guest_mode(vcpu)) ||
8074             WARN_ON_ONCE(!(emulation_type & EMULTYPE_PF)))
8075                 return false;
8076
8077         if (x86_page_table_writing_insn(ctxt))
8078                 return false;
8079
8080         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2_or_gpa)
8081                 return false;
8082
8083         vcpu->arch.last_retry_eip = ctxt->eip;
8084         vcpu->arch.last_retry_addr = cr2_or_gpa;
8085
8086         if (!vcpu->arch.mmu->direct_map)
8087                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2_or_gpa, NULL);
8088
8089         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
8090
8091         return true;
8092 }
8093
8094 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
8095 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
8096
8097 static void kvm_smm_changed(struct kvm_vcpu *vcpu, bool entering_smm)
8098 {
8099         trace_kvm_smm_transition(vcpu->vcpu_id, vcpu->arch.smbase, entering_smm);
8100
8101         if (entering_smm) {
8102                 vcpu->arch.hflags |= HF_SMM_MASK;
8103         } else {
8104                 vcpu->arch.hflags &= ~(HF_SMM_MASK | HF_SMM_INSIDE_NMI_MASK);
8105
8106                 /* Process a latched INIT or SMI, if any.  */
8107                 kvm_make_request(KVM_REQ_EVENT, vcpu);
8108
8109                 /*
8110                  * Even if KVM_SET_SREGS2 loaded PDPTRs out of band,
8111                  * on SMM exit we still need to reload them from
8112                  * guest memory
8113                  */
8114                 vcpu->arch.pdptrs_from_userspace = false;
8115         }
8116
8117         kvm_mmu_reset_context(vcpu);
8118 }
8119
8120 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
8121                                 unsigned long *db)
8122 {
8123         u32 dr6 = 0;
8124         int i;
8125         u32 enable, rwlen;
8126
8127         enable = dr7;
8128         rwlen = dr7 >> 16;
8129         for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
8130                 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
8131                         dr6 |= (1 << i);
8132         return dr6;
8133 }
8134
8135 static int kvm_vcpu_do_singlestep(struct kvm_vcpu *vcpu)
8136 {
8137         struct kvm_run *kvm_run = vcpu->run;
8138
8139         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
8140                 kvm_run->debug.arch.dr6 = DR6_BS | DR6_ACTIVE_LOW;
8141                 kvm_run->debug.arch.pc = kvm_get_linear_rip(vcpu);
8142                 kvm_run->debug.arch.exception = DB_VECTOR;
8143                 kvm_run->exit_reason = KVM_EXIT_DEBUG;
8144                 return 0;
8145         }
8146         kvm_queue_exception_p(vcpu, DB_VECTOR, DR6_BS);
8147         return 1;
8148 }
8149
8150 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu)
8151 {
8152         unsigned long rflags = static_call(kvm_x86_get_rflags)(vcpu);
8153         int r;
8154
8155         r = static_call(kvm_x86_skip_emulated_instruction)(vcpu);
8156         if (unlikely(!r))
8157                 return 0;
8158
8159         kvm_pmu_trigger_event(vcpu, PERF_COUNT_HW_INSTRUCTIONS);
8160
8161         /*
8162          * rflags is the old, "raw" value of the flags.  The new value has
8163          * not been saved yet.
8164          *
8165          * This is correct even for TF set by the guest, because "the
8166          * processor will not generate this exception after the instruction
8167          * that sets the TF flag".
8168          */
8169         if (unlikely(rflags & X86_EFLAGS_TF))
8170                 r = kvm_vcpu_do_singlestep(vcpu);
8171         return r;
8172 }
8173 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction);
8174
8175 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
8176 {
8177         if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
8178             (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
8179                 struct kvm_run *kvm_run = vcpu->run;
8180                 unsigned long eip = kvm_get_linear_rip(vcpu);
8181                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
8182                                            vcpu->arch.guest_debug_dr7,
8183                                            vcpu->arch.eff_db);
8184
8185                 if (dr6 != 0) {
8186                         kvm_run->debug.arch.dr6 = dr6 | DR6_ACTIVE_LOW;
8187                         kvm_run->debug.arch.pc = eip;
8188                         kvm_run->debug.arch.exception = DB_VECTOR;
8189                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
8190                         *r = 0;
8191                         return true;
8192                 }
8193         }
8194
8195         if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
8196             !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
8197                 unsigned long eip = kvm_get_linear_rip(vcpu);
8198                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
8199                                            vcpu->arch.dr7,
8200                                            vcpu->arch.db);
8201
8202                 if (dr6 != 0) {
8203                         kvm_queue_exception_p(vcpu, DB_VECTOR, dr6);
8204                         *r = 1;
8205                         return true;
8206                 }
8207         }
8208
8209         return false;
8210 }
8211
8212 static bool is_vmware_backdoor_opcode(struct x86_emulate_ctxt *ctxt)
8213 {
8214         switch (ctxt->opcode_len) {
8215         case 1:
8216                 switch (ctxt->b) {
8217                 case 0xe4:      /* IN */
8218                 case 0xe5:
8219                 case 0xec:
8220                 case 0xed:
8221                 case 0xe6:      /* OUT */
8222                 case 0xe7:
8223                 case 0xee:
8224                 case 0xef:
8225                 case 0x6c:      /* INS */
8226                 case 0x6d:
8227                 case 0x6e:      /* OUTS */
8228                 case 0x6f:
8229                         return true;
8230                 }
8231                 break;
8232         case 2:
8233                 switch (ctxt->b) {
8234                 case 0x33:      /* RDPMC */
8235                         return true;
8236                 }
8237                 break;
8238         }
8239
8240         return false;
8241 }
8242
8243 /*
8244  * Decode to be emulated instruction. Return EMULATION_OK if success.
8245  */
8246 int x86_decode_emulated_instruction(struct kvm_vcpu *vcpu, int emulation_type,
8247                                     void *insn, int insn_len)
8248 {
8249         int r = EMULATION_OK;
8250         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
8251
8252         init_emulate_ctxt(vcpu);
8253
8254         /*
8255          * We will reenter on the same instruction since we do not set
8256          * complete_userspace_io. This does not handle watchpoints yet,
8257          * those would be handled in the emulate_ops.
8258          */
8259         if (!(emulation_type & EMULTYPE_SKIP) &&
8260             kvm_vcpu_check_breakpoint(vcpu, &r))
8261                 return r;
8262
8263         r = x86_decode_insn(ctxt, insn, insn_len, emulation_type);
8264
8265         trace_kvm_emulate_insn_start(vcpu);
8266         ++vcpu->stat.insn_emulation;
8267
8268         return r;
8269 }
8270 EXPORT_SYMBOL_GPL(x86_decode_emulated_instruction);
8271
8272 int x86_emulate_instruction(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa,
8273                             int emulation_type, void *insn, int insn_len)
8274 {
8275         int r;
8276         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
8277         bool writeback = true;
8278         bool write_fault_to_spt;
8279
8280         if (unlikely(!kvm_can_emulate_insn(vcpu, emulation_type, insn, insn_len)))
8281                 return 1;
8282
8283         vcpu->arch.l1tf_flush_l1d = true;
8284
8285         /*
8286          * Clear write_fault_to_shadow_pgtable here to ensure it is
8287          * never reused.
8288          */
8289         write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
8290         vcpu->arch.write_fault_to_shadow_pgtable = false;
8291
8292         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
8293                 kvm_clear_exception_queue(vcpu);
8294
8295                 r = x86_decode_emulated_instruction(vcpu, emulation_type,
8296                                                     insn, insn_len);
8297                 if (r != EMULATION_OK)  {
8298                         if ((emulation_type & EMULTYPE_TRAP_UD) ||
8299                             (emulation_type & EMULTYPE_TRAP_UD_FORCED)) {
8300                                 kvm_queue_exception(vcpu, UD_VECTOR);
8301                                 return 1;
8302                         }
8303                         if (reexecute_instruction(vcpu, cr2_or_gpa,
8304                                                   write_fault_to_spt,
8305                                                   emulation_type))
8306                                 return 1;
8307                         if (ctxt->have_exception) {
8308                                 /*
8309                                  * #UD should result in just EMULATION_FAILED, and trap-like
8310                                  * exception should not be encountered during decode.
8311                                  */
8312                                 WARN_ON_ONCE(ctxt->exception.vector == UD_VECTOR ||
8313                                              exception_type(ctxt->exception.vector) == EXCPT_TRAP);
8314                                 inject_emulated_exception(vcpu);
8315                                 return 1;
8316                         }
8317                         return handle_emulation_failure(vcpu, emulation_type);
8318                 }
8319         }
8320
8321         if ((emulation_type & EMULTYPE_VMWARE_GP) &&
8322             !is_vmware_backdoor_opcode(ctxt)) {
8323                 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
8324                 return 1;
8325         }
8326
8327         /*
8328          * EMULTYPE_SKIP without EMULTYPE_COMPLETE_USER_EXIT is intended for
8329          * use *only* by vendor callbacks for kvm_skip_emulated_instruction().
8330          * The caller is responsible for updating interruptibility state and
8331          * injecting single-step #DBs.
8332          */
8333         if (emulation_type & EMULTYPE_SKIP) {
8334                 if (ctxt->mode != X86EMUL_MODE_PROT64)
8335                         ctxt->eip = (u32)ctxt->_eip;
8336                 else
8337                         ctxt->eip = ctxt->_eip;
8338
8339                 if (emulation_type & EMULTYPE_COMPLETE_USER_EXIT) {
8340                         r = 1;
8341                         goto writeback;
8342                 }
8343
8344                 kvm_rip_write(vcpu, ctxt->eip);
8345                 if (ctxt->eflags & X86_EFLAGS_RF)
8346                         kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
8347                 return 1;
8348         }
8349
8350         if (retry_instruction(ctxt, cr2_or_gpa, emulation_type))
8351                 return 1;
8352
8353         /* this is needed for vmware backdoor interface to work since it
8354            changes registers values  during IO operation */
8355         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
8356                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
8357                 emulator_invalidate_register_cache(ctxt);
8358         }
8359
8360 restart:
8361         if (emulation_type & EMULTYPE_PF) {
8362                 /* Save the faulting GPA (cr2) in the address field */
8363                 ctxt->exception.address = cr2_or_gpa;
8364
8365                 /* With shadow page tables, cr2 contains a GVA or nGPA. */
8366                 if (vcpu->arch.mmu->direct_map) {
8367                         ctxt->gpa_available = true;
8368                         ctxt->gpa_val = cr2_or_gpa;
8369                 }
8370         } else {
8371                 /* Sanitize the address out of an abundance of paranoia. */
8372                 ctxt->exception.address = 0;
8373         }
8374
8375         r = x86_emulate_insn(ctxt);
8376
8377         if (r == EMULATION_INTERCEPTED)
8378                 return 1;
8379
8380         if (r == EMULATION_FAILED) {
8381                 if (reexecute_instruction(vcpu, cr2_or_gpa, write_fault_to_spt,
8382                                         emulation_type))
8383                         return 1;
8384
8385                 return handle_emulation_failure(vcpu, emulation_type);
8386         }
8387
8388         if (ctxt->have_exception) {
8389                 r = 1;
8390                 if (inject_emulated_exception(vcpu))
8391                         return r;
8392         } else if (vcpu->arch.pio.count) {
8393                 if (!vcpu->arch.pio.in) {
8394                         /* FIXME: return into emulator if single-stepping.  */
8395                         vcpu->arch.pio.count = 0;
8396                 } else {
8397                         writeback = false;
8398                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
8399                 }
8400                 r = 0;
8401         } else if (vcpu->mmio_needed) {
8402                 ++vcpu->stat.mmio_exits;
8403
8404                 if (!vcpu->mmio_is_write)
8405                         writeback = false;
8406                 r = 0;
8407                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
8408         } else if (vcpu->arch.complete_userspace_io) {
8409                 writeback = false;
8410                 r = 0;
8411         } else if (r == EMULATION_RESTART)
8412                 goto restart;
8413         else
8414                 r = 1;
8415
8416 writeback:
8417         if (writeback) {
8418                 unsigned long rflags = static_call(kvm_x86_get_rflags)(vcpu);
8419                 toggle_interruptibility(vcpu, ctxt->interruptibility);
8420                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
8421                 if (!ctxt->have_exception ||
8422                     exception_type(ctxt->exception.vector) == EXCPT_TRAP) {
8423                         kvm_pmu_trigger_event(vcpu, PERF_COUNT_HW_INSTRUCTIONS);
8424                         if (ctxt->is_branch)
8425                                 kvm_pmu_trigger_event(vcpu, PERF_COUNT_HW_BRANCH_INSTRUCTIONS);
8426                         kvm_rip_write(vcpu, ctxt->eip);
8427                         if (r && (ctxt->tf || (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)))
8428                                 r = kvm_vcpu_do_singlestep(vcpu);
8429                         if (kvm_x86_ops.update_emulated_instruction)
8430                                 static_call(kvm_x86_update_emulated_instruction)(vcpu);
8431                         __kvm_set_rflags(vcpu, ctxt->eflags);
8432                 }
8433
8434                 /*
8435                  * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
8436                  * do nothing, and it will be requested again as soon as
8437                  * the shadow expires.  But we still need to check here,
8438                  * because POPF has no interrupt shadow.
8439                  */
8440                 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
8441                         kvm_make_request(KVM_REQ_EVENT, vcpu);
8442         } else
8443                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
8444
8445         return r;
8446 }
8447
8448 int kvm_emulate_instruction(struct kvm_vcpu *vcpu, int emulation_type)
8449 {
8450         return x86_emulate_instruction(vcpu, 0, emulation_type, NULL, 0);
8451 }
8452 EXPORT_SYMBOL_GPL(kvm_emulate_instruction);
8453
8454 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu *vcpu,
8455                                         void *insn, int insn_len)
8456 {
8457         return x86_emulate_instruction(vcpu, 0, 0, insn, insn_len);
8458 }
8459 EXPORT_SYMBOL_GPL(kvm_emulate_instruction_from_buffer);
8460
8461 static int complete_fast_pio_out_port_0x7e(struct kvm_vcpu *vcpu)
8462 {
8463         vcpu->arch.pio.count = 0;
8464         return 1;
8465 }
8466
8467 static int complete_fast_pio_out(struct kvm_vcpu *vcpu)
8468 {
8469         vcpu->arch.pio.count = 0;
8470
8471         if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip)))
8472                 return 1;
8473
8474         return kvm_skip_emulated_instruction(vcpu);
8475 }
8476
8477 static int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size,
8478                             unsigned short port)
8479 {
8480         unsigned long val = kvm_rax_read(vcpu);
8481         int ret = emulator_pio_out(vcpu, size, port, &val, 1);
8482
8483         if (ret)
8484                 return ret;
8485
8486         /*
8487          * Workaround userspace that relies on old KVM behavior of %rip being
8488          * incremented prior to exiting to userspace to handle "OUT 0x7e".
8489          */
8490         if (port == 0x7e &&
8491             kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_OUT_7E_INC_RIP)) {
8492                 vcpu->arch.complete_userspace_io =
8493                         complete_fast_pio_out_port_0x7e;
8494                 kvm_skip_emulated_instruction(vcpu);
8495         } else {
8496                 vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
8497                 vcpu->arch.complete_userspace_io = complete_fast_pio_out;
8498         }
8499         return 0;
8500 }
8501
8502 static int complete_fast_pio_in(struct kvm_vcpu *vcpu)
8503 {
8504         unsigned long val;
8505
8506         /* We should only ever be called with arch.pio.count equal to 1 */
8507         BUG_ON(vcpu->arch.pio.count != 1);
8508
8509         if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip))) {
8510                 vcpu->arch.pio.count = 0;
8511                 return 1;
8512         }
8513
8514         /* For size less than 4 we merge, else we zero extend */
8515         val = (vcpu->arch.pio.size < 4) ? kvm_rax_read(vcpu) : 0;
8516
8517         /*
8518          * Since vcpu->arch.pio.count == 1 let emulator_pio_in perform
8519          * the copy and tracing
8520          */
8521         emulator_pio_in(vcpu, vcpu->arch.pio.size, vcpu->arch.pio.port, &val, 1);
8522         kvm_rax_write(vcpu, val);
8523
8524         return kvm_skip_emulated_instruction(vcpu);
8525 }
8526
8527 static int kvm_fast_pio_in(struct kvm_vcpu *vcpu, int size,
8528                            unsigned short port)
8529 {
8530         unsigned long val;
8531         int ret;
8532
8533         /* For size less than 4 we merge, else we zero extend */
8534         val = (size < 4) ? kvm_rax_read(vcpu) : 0;
8535
8536         ret = emulator_pio_in(vcpu, size, port, &val, 1);
8537         if (ret) {
8538                 kvm_rax_write(vcpu, val);
8539                 return ret;
8540         }
8541
8542         vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
8543         vcpu->arch.complete_userspace_io = complete_fast_pio_in;
8544
8545         return 0;
8546 }
8547
8548 int kvm_fast_pio(struct kvm_vcpu *vcpu, int size, unsigned short port, int in)
8549 {
8550         int ret;
8551
8552         if (in)
8553                 ret = kvm_fast_pio_in(vcpu, size, port);
8554         else
8555                 ret = kvm_fast_pio_out(vcpu, size, port);
8556         return ret && kvm_skip_emulated_instruction(vcpu);
8557 }
8558 EXPORT_SYMBOL_GPL(kvm_fast_pio);
8559
8560 static int kvmclock_cpu_down_prep(unsigned int cpu)
8561 {
8562         __this_cpu_write(cpu_tsc_khz, 0);
8563         return 0;
8564 }
8565
8566 static void tsc_khz_changed(void *data)
8567 {
8568         struct cpufreq_freqs *freq = data;
8569         unsigned long khz = 0;
8570
8571         if (data)
8572                 khz = freq->new;
8573         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
8574                 khz = cpufreq_quick_get(raw_smp_processor_id());
8575         if (!khz)
8576                 khz = tsc_khz;
8577         __this_cpu_write(cpu_tsc_khz, khz);
8578 }
8579
8580 #ifdef CONFIG_X86_64
8581 static void kvm_hyperv_tsc_notifier(void)
8582 {
8583         struct kvm *kvm;
8584         int cpu;
8585
8586         mutex_lock(&kvm_lock);
8587         list_for_each_entry(kvm, &vm_list, vm_list)
8588                 kvm_make_mclock_inprogress_request(kvm);
8589
8590         /* no guest entries from this point */
8591         hyperv_stop_tsc_emulation();
8592
8593         /* TSC frequency always matches when on Hyper-V */
8594         for_each_present_cpu(cpu)
8595                 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
8596         kvm_max_guest_tsc_khz = tsc_khz;
8597
8598         list_for_each_entry(kvm, &vm_list, vm_list) {
8599                 __kvm_start_pvclock_update(kvm);
8600                 pvclock_update_vm_gtod_copy(kvm);
8601                 kvm_end_pvclock_update(kvm);
8602         }
8603
8604         mutex_unlock(&kvm_lock);
8605 }
8606 #endif
8607
8608 static void __kvmclock_cpufreq_notifier(struct cpufreq_freqs *freq, int cpu)
8609 {
8610         struct kvm *kvm;
8611         struct kvm_vcpu *vcpu;
8612         int send_ipi = 0;
8613         unsigned long i;
8614
8615         /*
8616          * We allow guests to temporarily run on slowing clocks,
8617          * provided we notify them after, or to run on accelerating
8618          * clocks, provided we notify them before.  Thus time never
8619          * goes backwards.
8620          *
8621          * However, we have a problem.  We can't atomically update
8622          * the frequency of a given CPU from this function; it is
8623          * merely a notifier, which can be called from any CPU.
8624          * Changing the TSC frequency at arbitrary points in time
8625          * requires a recomputation of local variables related to
8626          * the TSC for each VCPU.  We must flag these local variables
8627          * to be updated and be sure the update takes place with the
8628          * new frequency before any guests proceed.
8629          *
8630          * Unfortunately, the combination of hotplug CPU and frequency
8631          * change creates an intractable locking scenario; the order
8632          * of when these callouts happen is undefined with respect to
8633          * CPU hotplug, and they can race with each other.  As such,
8634          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
8635          * undefined; you can actually have a CPU frequency change take
8636          * place in between the computation of X and the setting of the
8637          * variable.  To protect against this problem, all updates of
8638          * the per_cpu tsc_khz variable are done in an interrupt
8639          * protected IPI, and all callers wishing to update the value
8640          * must wait for a synchronous IPI to complete (which is trivial
8641          * if the caller is on the CPU already).  This establishes the
8642          * necessary total order on variable updates.
8643          *
8644          * Note that because a guest time update may take place
8645          * anytime after the setting of the VCPU's request bit, the
8646          * correct TSC value must be set before the request.  However,
8647          * to ensure the update actually makes it to any guest which
8648          * starts running in hardware virtualization between the set
8649          * and the acquisition of the spinlock, we must also ping the
8650          * CPU after setting the request bit.
8651          *
8652          */
8653
8654         smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
8655
8656         mutex_lock(&kvm_lock);
8657         list_for_each_entry(kvm, &vm_list, vm_list) {
8658                 kvm_for_each_vcpu(i, vcpu, kvm) {
8659                         if (vcpu->cpu != cpu)
8660                                 continue;
8661                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
8662                         if (vcpu->cpu != raw_smp_processor_id())
8663                                 send_ipi = 1;
8664                 }
8665         }
8666         mutex_unlock(&kvm_lock);
8667
8668         if (freq->old < freq->new && send_ipi) {
8669                 /*
8670                  * We upscale the frequency.  Must make the guest
8671                  * doesn't see old kvmclock values while running with
8672                  * the new frequency, otherwise we risk the guest sees
8673                  * time go backwards.
8674                  *
8675                  * In case we update the frequency for another cpu
8676                  * (which might be in guest context) send an interrupt
8677                  * to kick the cpu out of guest context.  Next time
8678                  * guest context is entered kvmclock will be updated,
8679                  * so the guest will not see stale values.
8680                  */
8681                 smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
8682         }
8683 }
8684
8685 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
8686                                      void *data)
8687 {
8688         struct cpufreq_freqs *freq = data;
8689         int cpu;
8690
8691         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
8692                 return 0;
8693         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
8694                 return 0;
8695
8696         for_each_cpu(cpu, freq->policy->cpus)
8697                 __kvmclock_cpufreq_notifier(freq, cpu);
8698
8699         return 0;
8700 }
8701
8702 static struct notifier_block kvmclock_cpufreq_notifier_block = {
8703         .notifier_call  = kvmclock_cpufreq_notifier
8704 };
8705
8706 static int kvmclock_cpu_online(unsigned int cpu)
8707 {
8708         tsc_khz_changed(NULL);
8709         return 0;
8710 }
8711
8712 static void kvm_timer_init(void)
8713 {
8714         max_tsc_khz = tsc_khz;
8715
8716         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
8717 #ifdef CONFIG_CPU_FREQ
8718                 struct cpufreq_policy *policy;
8719                 int cpu;
8720
8721                 cpu = get_cpu();
8722                 policy = cpufreq_cpu_get(cpu);
8723                 if (policy) {
8724                         if (policy->cpuinfo.max_freq)
8725                                 max_tsc_khz = policy->cpuinfo.max_freq;
8726                         cpufreq_cpu_put(policy);
8727                 }
8728                 put_cpu();
8729 #endif
8730                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
8731                                           CPUFREQ_TRANSITION_NOTIFIER);
8732         }
8733
8734         cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE, "x86/kvm/clk:online",
8735                           kvmclock_cpu_online, kvmclock_cpu_down_prep);
8736 }
8737
8738 #ifdef CONFIG_X86_64
8739 static void pvclock_gtod_update_fn(struct work_struct *work)
8740 {
8741         struct kvm *kvm;
8742         struct kvm_vcpu *vcpu;
8743         unsigned long i;
8744
8745         mutex_lock(&kvm_lock);
8746         list_for_each_entry(kvm, &vm_list, vm_list)
8747                 kvm_for_each_vcpu(i, vcpu, kvm)
8748                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
8749         atomic_set(&kvm_guest_has_master_clock, 0);
8750         mutex_unlock(&kvm_lock);
8751 }
8752
8753 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
8754
8755 /*
8756  * Indirection to move queue_work() out of the tk_core.seq write held
8757  * region to prevent possible deadlocks against time accessors which
8758  * are invoked with work related locks held.
8759  */
8760 static void pvclock_irq_work_fn(struct irq_work *w)
8761 {
8762         queue_work(system_long_wq, &pvclock_gtod_work);
8763 }
8764
8765 static DEFINE_IRQ_WORK(pvclock_irq_work, pvclock_irq_work_fn);
8766
8767 /*
8768  * Notification about pvclock gtod data update.
8769  */
8770 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
8771                                void *priv)
8772 {
8773         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
8774         struct timekeeper *tk = priv;
8775
8776         update_pvclock_gtod(tk);
8777
8778         /*
8779          * Disable master clock if host does not trust, or does not use,
8780          * TSC based clocksource. Delegate queue_work() to irq_work as
8781          * this is invoked with tk_core.seq write held.
8782          */
8783         if (!gtod_is_based_on_tsc(gtod->clock.vclock_mode) &&
8784             atomic_read(&kvm_guest_has_master_clock) != 0)
8785                 irq_work_queue(&pvclock_irq_work);
8786         return 0;
8787 }
8788
8789 static struct notifier_block pvclock_gtod_notifier = {
8790         .notifier_call = pvclock_gtod_notify,
8791 };
8792 #endif
8793
8794 int kvm_arch_init(void *opaque)
8795 {
8796         struct kvm_x86_init_ops *ops = opaque;
8797         int r;
8798
8799         if (kvm_x86_ops.hardware_enable) {
8800                 pr_err("kvm: already loaded vendor module '%s'\n", kvm_x86_ops.name);
8801                 r = -EEXIST;
8802                 goto out;
8803         }
8804
8805         if (!ops->cpu_has_kvm_support()) {
8806                 pr_err_ratelimited("kvm: no hardware support for '%s'\n",
8807                                    ops->runtime_ops->name);
8808                 r = -EOPNOTSUPP;
8809                 goto out;
8810         }
8811         if (ops->disabled_by_bios()) {
8812                 pr_err_ratelimited("kvm: support for '%s' disabled by bios\n",
8813                                    ops->runtime_ops->name);
8814                 r = -EOPNOTSUPP;
8815                 goto out;
8816         }
8817
8818         /*
8819          * KVM explicitly assumes that the guest has an FPU and
8820          * FXSAVE/FXRSTOR. For example, the KVM_GET_FPU explicitly casts the
8821          * vCPU's FPU state as a fxregs_state struct.
8822          */
8823         if (!boot_cpu_has(X86_FEATURE_FPU) || !boot_cpu_has(X86_FEATURE_FXSR)) {
8824                 printk(KERN_ERR "kvm: inadequate fpu\n");
8825                 r = -EOPNOTSUPP;
8826                 goto out;
8827         }
8828
8829         r = -ENOMEM;
8830
8831         x86_emulator_cache = kvm_alloc_emulator_cache();
8832         if (!x86_emulator_cache) {
8833                 pr_err("kvm: failed to allocate cache for x86 emulator\n");
8834                 goto out;
8835         }
8836
8837         user_return_msrs = alloc_percpu(struct kvm_user_return_msrs);
8838         if (!user_return_msrs) {
8839                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_user_return_msrs\n");
8840                 goto out_free_x86_emulator_cache;
8841         }
8842         kvm_nr_uret_msrs = 0;
8843
8844         r = kvm_mmu_module_init();
8845         if (r)
8846                 goto out_free_percpu;
8847
8848         kvm_timer_init();
8849
8850         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
8851                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
8852                 supported_xcr0 = host_xcr0 & KVM_SUPPORTED_XCR0;
8853         }
8854
8855         if (pi_inject_timer == -1)
8856                 pi_inject_timer = housekeeping_enabled(HK_FLAG_TIMER);
8857 #ifdef CONFIG_X86_64
8858         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
8859
8860         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
8861                 set_hv_tscchange_cb(kvm_hyperv_tsc_notifier);
8862 #endif
8863
8864         return 0;
8865
8866 out_free_percpu:
8867         free_percpu(user_return_msrs);
8868 out_free_x86_emulator_cache:
8869         kmem_cache_destroy(x86_emulator_cache);
8870 out:
8871         return r;
8872 }
8873
8874 void kvm_arch_exit(void)
8875 {
8876 #ifdef CONFIG_X86_64
8877         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
8878                 clear_hv_tscchange_cb();
8879 #endif
8880         kvm_lapic_exit();
8881
8882         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
8883                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
8884                                             CPUFREQ_TRANSITION_NOTIFIER);
8885         cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE);
8886 #ifdef CONFIG_X86_64
8887         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
8888         irq_work_sync(&pvclock_irq_work);
8889         cancel_work_sync(&pvclock_gtod_work);
8890 #endif
8891         kvm_x86_ops.hardware_enable = NULL;
8892         kvm_mmu_module_exit();
8893         free_percpu(user_return_msrs);
8894         kmem_cache_destroy(x86_emulator_cache);
8895 #ifdef CONFIG_KVM_XEN
8896         static_key_deferred_flush(&kvm_xen_enabled);
8897         WARN_ON(static_branch_unlikely(&kvm_xen_enabled.key));
8898 #endif
8899 }
8900
8901 static int __kvm_emulate_halt(struct kvm_vcpu *vcpu, int state, int reason)
8902 {
8903         /*
8904          * The vCPU has halted, e.g. executed HLT.  Update the run state if the
8905          * local APIC is in-kernel, the run loop will detect the non-runnable
8906          * state and halt the vCPU.  Exit to userspace if the local APIC is
8907          * managed by userspace, in which case userspace is responsible for
8908          * handling wake events.
8909          */
8910         ++vcpu->stat.halt_exits;
8911         if (lapic_in_kernel(vcpu)) {
8912                 vcpu->arch.mp_state = state;
8913                 return 1;
8914         } else {
8915                 vcpu->run->exit_reason = reason;
8916                 return 0;
8917         }
8918 }
8919
8920 int kvm_emulate_halt_noskip(struct kvm_vcpu *vcpu)
8921 {
8922         return __kvm_emulate_halt(vcpu, KVM_MP_STATE_HALTED, KVM_EXIT_HLT);
8923 }
8924 EXPORT_SYMBOL_GPL(kvm_emulate_halt_noskip);
8925
8926 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
8927 {
8928         int ret = kvm_skip_emulated_instruction(vcpu);
8929         /*
8930          * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
8931          * KVM_EXIT_DEBUG here.
8932          */
8933         return kvm_emulate_halt_noskip(vcpu) && ret;
8934 }
8935 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
8936
8937 int kvm_emulate_ap_reset_hold(struct kvm_vcpu *vcpu)
8938 {
8939         int ret = kvm_skip_emulated_instruction(vcpu);
8940
8941         return __kvm_emulate_halt(vcpu, KVM_MP_STATE_AP_RESET_HOLD,
8942                                         KVM_EXIT_AP_RESET_HOLD) && ret;
8943 }
8944 EXPORT_SYMBOL_GPL(kvm_emulate_ap_reset_hold);
8945
8946 #ifdef CONFIG_X86_64
8947 static int kvm_pv_clock_pairing(struct kvm_vcpu *vcpu, gpa_t paddr,
8948                                 unsigned long clock_type)
8949 {
8950         struct kvm_clock_pairing clock_pairing;
8951         struct timespec64 ts;
8952         u64 cycle;
8953         int ret;
8954
8955         if (clock_type != KVM_CLOCK_PAIRING_WALLCLOCK)
8956                 return -KVM_EOPNOTSUPP;
8957
8958         /*
8959          * When tsc is in permanent catchup mode guests won't be able to use
8960          * pvclock_read_retry loop to get consistent view of pvclock
8961          */
8962         if (vcpu->arch.tsc_always_catchup)
8963                 return -KVM_EOPNOTSUPP;
8964
8965         if (!kvm_get_walltime_and_clockread(&ts, &cycle))
8966                 return -KVM_EOPNOTSUPP;
8967
8968         clock_pairing.sec = ts.tv_sec;
8969         clock_pairing.nsec = ts.tv_nsec;
8970         clock_pairing.tsc = kvm_read_l1_tsc(vcpu, cycle);
8971         clock_pairing.flags = 0;
8972         memset(&clock_pairing.pad, 0, sizeof(clock_pairing.pad));
8973
8974         ret = 0;
8975         if (kvm_write_guest(vcpu->kvm, paddr, &clock_pairing,
8976                             sizeof(struct kvm_clock_pairing)))
8977                 ret = -KVM_EFAULT;
8978
8979         return ret;
8980 }
8981 #endif
8982
8983 /*
8984  * kvm_pv_kick_cpu_op:  Kick a vcpu.
8985  *
8986  * @apicid - apicid of vcpu to be kicked.
8987  */
8988 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
8989 {
8990         struct kvm_lapic_irq lapic_irq;
8991
8992         lapic_irq.shorthand = APIC_DEST_NOSHORT;
8993         lapic_irq.dest_mode = APIC_DEST_PHYSICAL;
8994         lapic_irq.level = 0;
8995         lapic_irq.dest_id = apicid;
8996         lapic_irq.msi_redir_hint = false;
8997
8998         lapic_irq.delivery_mode = APIC_DM_REMRD;
8999         kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
9000 }
9001
9002 bool kvm_apicv_activated(struct kvm *kvm)
9003 {
9004         return (READ_ONCE(kvm->arch.apicv_inhibit_reasons) == 0);
9005 }
9006 EXPORT_SYMBOL_GPL(kvm_apicv_activated);
9007
9008 static void kvm_apicv_init(struct kvm *kvm)
9009 {
9010         init_rwsem(&kvm->arch.apicv_update_lock);
9011
9012         set_bit(APICV_INHIBIT_REASON_ABSENT,
9013                 &kvm->arch.apicv_inhibit_reasons);
9014         if (!enable_apicv)
9015                 set_bit(APICV_INHIBIT_REASON_DISABLE,
9016                         &kvm->arch.apicv_inhibit_reasons);
9017 }
9018
9019 static void kvm_sched_yield(struct kvm_vcpu *vcpu, unsigned long dest_id)
9020 {
9021         struct kvm_vcpu *target = NULL;
9022         struct kvm_apic_map *map;
9023
9024         vcpu->stat.directed_yield_attempted++;
9025
9026         if (single_task_running())
9027                 goto no_yield;
9028
9029         rcu_read_lock();
9030         map = rcu_dereference(vcpu->kvm->arch.apic_map);
9031
9032         if (likely(map) && dest_id <= map->max_apic_id && map->phys_map[dest_id])
9033                 target = map->phys_map[dest_id]->vcpu;
9034
9035         rcu_read_unlock();
9036
9037         if (!target || !READ_ONCE(target->ready))
9038                 goto no_yield;
9039
9040         /* Ignore requests to yield to self */
9041         if (vcpu == target)
9042                 goto no_yield;
9043
9044         if (kvm_vcpu_yield_to(target) <= 0)
9045                 goto no_yield;
9046
9047         vcpu->stat.directed_yield_successful++;
9048
9049 no_yield:
9050         return;
9051 }
9052
9053 static int complete_hypercall_exit(struct kvm_vcpu *vcpu)
9054 {
9055         u64 ret = vcpu->run->hypercall.ret;
9056
9057         if (!is_64_bit_mode(vcpu))
9058                 ret = (u32)ret;
9059         kvm_rax_write(vcpu, ret);
9060         ++vcpu->stat.hypercalls;
9061         return kvm_skip_emulated_instruction(vcpu);
9062 }
9063
9064 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
9065 {
9066         unsigned long nr, a0, a1, a2, a3, ret;
9067         int op_64_bit;
9068
9069         if (kvm_xen_hypercall_enabled(vcpu->kvm))
9070                 return kvm_xen_hypercall(vcpu);
9071
9072         if (kvm_hv_hypercall_enabled(vcpu))
9073                 return kvm_hv_hypercall(vcpu);
9074
9075         nr = kvm_rax_read(vcpu);
9076         a0 = kvm_rbx_read(vcpu);
9077         a1 = kvm_rcx_read(vcpu);
9078         a2 = kvm_rdx_read(vcpu);
9079         a3 = kvm_rsi_read(vcpu);
9080
9081         trace_kvm_hypercall(nr, a0, a1, a2, a3);
9082
9083         op_64_bit = is_64_bit_hypercall(vcpu);
9084         if (!op_64_bit) {
9085                 nr &= 0xFFFFFFFF;
9086                 a0 &= 0xFFFFFFFF;
9087                 a1 &= 0xFFFFFFFF;
9088                 a2 &= 0xFFFFFFFF;
9089                 a3 &= 0xFFFFFFFF;
9090         }
9091
9092         if (static_call(kvm_x86_get_cpl)(vcpu) != 0) {
9093                 ret = -KVM_EPERM;
9094                 goto out;
9095         }
9096
9097         ret = -KVM_ENOSYS;
9098
9099         switch (nr) {
9100         case KVM_HC_VAPIC_POLL_IRQ:
9101                 ret = 0;
9102                 break;
9103         case KVM_HC_KICK_CPU:
9104                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_UNHALT))
9105                         break;
9106
9107                 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
9108                 kvm_sched_yield(vcpu, a1);
9109                 ret = 0;
9110                 break;
9111 #ifdef CONFIG_X86_64
9112         case KVM_HC_CLOCK_PAIRING:
9113                 ret = kvm_pv_clock_pairing(vcpu, a0, a1);
9114                 break;
9115 #endif
9116         case KVM_HC_SEND_IPI:
9117                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_SEND_IPI))
9118                         break;
9119
9120                 ret = kvm_pv_send_ipi(vcpu->kvm, a0, a1, a2, a3, op_64_bit);
9121                 break;
9122         case KVM_HC_SCHED_YIELD:
9123                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_SCHED_YIELD))
9124                         break;
9125
9126                 kvm_sched_yield(vcpu, a0);
9127                 ret = 0;
9128                 break;
9129         case KVM_HC_MAP_GPA_RANGE: {
9130                 u64 gpa = a0, npages = a1, attrs = a2;
9131
9132                 ret = -KVM_ENOSYS;
9133                 if (!(vcpu->kvm->arch.hypercall_exit_enabled & (1 << KVM_HC_MAP_GPA_RANGE)))
9134                         break;
9135
9136                 if (!PAGE_ALIGNED(gpa) || !npages ||
9137                     gpa_to_gfn(gpa) + npages <= gpa_to_gfn(gpa)) {
9138                         ret = -KVM_EINVAL;
9139                         break;
9140                 }
9141
9142                 vcpu->run->exit_reason        = KVM_EXIT_HYPERCALL;
9143                 vcpu->run->hypercall.nr       = KVM_HC_MAP_GPA_RANGE;
9144                 vcpu->run->hypercall.args[0]  = gpa;
9145                 vcpu->run->hypercall.args[1]  = npages;
9146                 vcpu->run->hypercall.args[2]  = attrs;
9147                 vcpu->run->hypercall.longmode = op_64_bit;
9148                 vcpu->arch.complete_userspace_io = complete_hypercall_exit;
9149                 return 0;
9150         }
9151         default:
9152                 ret = -KVM_ENOSYS;
9153                 break;
9154         }
9155 out:
9156         if (!op_64_bit)
9157                 ret = (u32)ret;
9158         kvm_rax_write(vcpu, ret);
9159
9160         ++vcpu->stat.hypercalls;
9161         return kvm_skip_emulated_instruction(vcpu);
9162 }
9163 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
9164
9165 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
9166 {
9167         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
9168         char instruction[3];
9169         unsigned long rip = kvm_rip_read(vcpu);
9170
9171         static_call(kvm_x86_patch_hypercall)(vcpu, instruction);
9172
9173         return emulator_write_emulated(ctxt, rip, instruction, 3,
9174                 &ctxt->exception);
9175 }
9176
9177 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
9178 {
9179         return vcpu->run->request_interrupt_window &&
9180                 likely(!pic_in_kernel(vcpu->kvm));
9181 }
9182
9183 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
9184 {
9185         struct kvm_run *kvm_run = vcpu->run;
9186
9187         kvm_run->if_flag = static_call(kvm_x86_get_if_flag)(vcpu);
9188         kvm_run->cr8 = kvm_get_cr8(vcpu);
9189         kvm_run->apic_base = kvm_get_apic_base(vcpu);
9190
9191         /*
9192          * The call to kvm_ready_for_interrupt_injection() may end up in
9193          * kvm_xen_has_interrupt() which may require the srcu lock to be
9194          * held, to protect against changes in the vcpu_info address.
9195          */
9196         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
9197         kvm_run->ready_for_interrupt_injection =
9198                 pic_in_kernel(vcpu->kvm) ||
9199                 kvm_vcpu_ready_for_interrupt_injection(vcpu);
9200         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
9201
9202         if (is_smm(vcpu))
9203                 kvm_run->flags |= KVM_RUN_X86_SMM;
9204 }
9205
9206 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
9207 {
9208         int max_irr, tpr;
9209
9210         if (!kvm_x86_ops.update_cr8_intercept)
9211                 return;
9212
9213         if (!lapic_in_kernel(vcpu))
9214                 return;
9215
9216         if (vcpu->arch.apicv_active)
9217                 return;
9218
9219         if (!vcpu->arch.apic->vapic_addr)
9220                 max_irr = kvm_lapic_find_highest_irr(vcpu);
9221         else
9222                 max_irr = -1;
9223
9224         if (max_irr != -1)
9225                 max_irr >>= 4;
9226
9227         tpr = kvm_lapic_get_cr8(vcpu);
9228
9229         static_call(kvm_x86_update_cr8_intercept)(vcpu, tpr, max_irr);
9230 }
9231
9232
9233 int kvm_check_nested_events(struct kvm_vcpu *vcpu)
9234 {
9235         if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
9236                 kvm_x86_ops.nested_ops->triple_fault(vcpu);
9237                 return 1;
9238         }
9239
9240         return kvm_x86_ops.nested_ops->check_events(vcpu);
9241 }
9242
9243 static void kvm_inject_exception(struct kvm_vcpu *vcpu)
9244 {
9245         if (vcpu->arch.exception.error_code && !is_protmode(vcpu))
9246                 vcpu->arch.exception.error_code = false;
9247         static_call(kvm_x86_queue_exception)(vcpu);
9248 }
9249
9250 static int inject_pending_event(struct kvm_vcpu *vcpu, bool *req_immediate_exit)
9251 {
9252         int r;
9253         bool can_inject = true;
9254
9255         /* try to reinject previous events if any */
9256
9257         if (vcpu->arch.exception.injected) {
9258                 kvm_inject_exception(vcpu);
9259                 can_inject = false;
9260         }
9261         /*
9262          * Do not inject an NMI or interrupt if there is a pending
9263          * exception.  Exceptions and interrupts are recognized at
9264          * instruction boundaries, i.e. the start of an instruction.
9265          * Trap-like exceptions, e.g. #DB, have higher priority than
9266          * NMIs and interrupts, i.e. traps are recognized before an
9267          * NMI/interrupt that's pending on the same instruction.
9268          * Fault-like exceptions, e.g. #GP and #PF, are the lowest
9269          * priority, but are only generated (pended) during instruction
9270          * execution, i.e. a pending fault-like exception means the
9271          * fault occurred on the *previous* instruction and must be
9272          * serviced prior to recognizing any new events in order to
9273          * fully complete the previous instruction.
9274          */
9275         else if (!vcpu->arch.exception.pending) {
9276                 if (vcpu->arch.nmi_injected) {
9277                         static_call(kvm_x86_set_nmi)(vcpu);
9278                         can_inject = false;
9279                 } else if (vcpu->arch.interrupt.injected) {
9280                         static_call(kvm_x86_set_irq)(vcpu);
9281                         can_inject = false;
9282                 }
9283         }
9284
9285         WARN_ON_ONCE(vcpu->arch.exception.injected &&
9286                      vcpu->arch.exception.pending);
9287
9288         /*
9289          * Call check_nested_events() even if we reinjected a previous event
9290          * in order for caller to determine if it should require immediate-exit
9291          * from L2 to L1 due to pending L1 events which require exit
9292          * from L2 to L1.
9293          */
9294         if (is_guest_mode(vcpu)) {
9295                 r = kvm_check_nested_events(vcpu);
9296                 if (r < 0)
9297                         goto out;
9298         }
9299
9300         /* try to inject new event if pending */
9301         if (vcpu->arch.exception.pending) {
9302                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
9303                                         vcpu->arch.exception.has_error_code,
9304                                         vcpu->arch.exception.error_code);
9305
9306                 vcpu->arch.exception.pending = false;
9307                 vcpu->arch.exception.injected = true;
9308
9309                 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
9310                         __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
9311                                              X86_EFLAGS_RF);
9312
9313                 if (vcpu->arch.exception.nr == DB_VECTOR) {
9314                         kvm_deliver_exception_payload(vcpu);
9315                         if (vcpu->arch.dr7 & DR7_GD) {
9316                                 vcpu->arch.dr7 &= ~DR7_GD;
9317                                 kvm_update_dr7(vcpu);
9318                         }
9319                 }
9320
9321                 kvm_inject_exception(vcpu);
9322                 can_inject = false;
9323         }
9324
9325         /* Don't inject interrupts if the user asked to avoid doing so */
9326         if (vcpu->guest_debug & KVM_GUESTDBG_BLOCKIRQ)
9327                 return 0;
9328
9329         /*
9330          * Finally, inject interrupt events.  If an event cannot be injected
9331          * due to architectural conditions (e.g. IF=0) a window-open exit
9332          * will re-request KVM_REQ_EVENT.  Sometimes however an event is pending
9333          * and can architecturally be injected, but we cannot do it right now:
9334          * an interrupt could have arrived just now and we have to inject it
9335          * as a vmexit, or there could already an event in the queue, which is
9336          * indicated by can_inject.  In that case we request an immediate exit
9337          * in order to make progress and get back here for another iteration.
9338          * The kvm_x86_ops hooks communicate this by returning -EBUSY.
9339          */
9340         if (vcpu->arch.smi_pending) {
9341                 r = can_inject ? static_call(kvm_x86_smi_allowed)(vcpu, true) : -EBUSY;
9342                 if (r < 0)
9343                         goto out;
9344                 if (r) {
9345                         vcpu->arch.smi_pending = false;
9346                         ++vcpu->arch.smi_count;
9347                         enter_smm(vcpu);
9348                         can_inject = false;
9349                 } else
9350                         static_call(kvm_x86_enable_smi_window)(vcpu);
9351         }
9352
9353         if (vcpu->arch.nmi_pending) {
9354                 r = can_inject ? static_call(kvm_x86_nmi_allowed)(vcpu, true) : -EBUSY;
9355                 if (r < 0)
9356                         goto out;
9357                 if (r) {
9358                         --vcpu->arch.nmi_pending;
9359                         vcpu->arch.nmi_injected = true;
9360                         static_call(kvm_x86_set_nmi)(vcpu);
9361                         can_inject = false;
9362                         WARN_ON(static_call(kvm_x86_nmi_allowed)(vcpu, true) < 0);
9363                 }
9364                 if (vcpu->arch.nmi_pending)
9365                         static_call(kvm_x86_enable_nmi_window)(vcpu);
9366         }
9367
9368         if (kvm_cpu_has_injectable_intr(vcpu)) {
9369                 r = can_inject ? static_call(kvm_x86_interrupt_allowed)(vcpu, true) : -EBUSY;
9370                 if (r < 0)
9371                         goto out;
9372                 if (r) {
9373                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu), false);
9374                         static_call(kvm_x86_set_irq)(vcpu);
9375                         WARN_ON(static_call(kvm_x86_interrupt_allowed)(vcpu, true) < 0);
9376                 }
9377                 if (kvm_cpu_has_injectable_intr(vcpu))
9378                         static_call(kvm_x86_enable_irq_window)(vcpu);
9379         }
9380
9381         if (is_guest_mode(vcpu) &&
9382             kvm_x86_ops.nested_ops->hv_timer_pending &&
9383             kvm_x86_ops.nested_ops->hv_timer_pending(vcpu))
9384                 *req_immediate_exit = true;
9385
9386         WARN_ON(vcpu->arch.exception.pending);
9387         return 0;
9388
9389 out:
9390         if (r == -EBUSY) {
9391                 *req_immediate_exit = true;
9392                 r = 0;
9393         }
9394         return r;
9395 }
9396
9397 static void process_nmi(struct kvm_vcpu *vcpu)
9398 {
9399         unsigned limit = 2;
9400
9401         /*
9402          * x86 is limited to one NMI running, and one NMI pending after it.
9403          * If an NMI is already in progress, limit further NMIs to just one.
9404          * Otherwise, allow two (and we'll inject the first one immediately).
9405          */
9406         if (static_call(kvm_x86_get_nmi_mask)(vcpu) || vcpu->arch.nmi_injected)
9407                 limit = 1;
9408
9409         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
9410         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
9411         kvm_make_request(KVM_REQ_EVENT, vcpu);
9412 }
9413
9414 static u32 enter_smm_get_segment_flags(struct kvm_segment *seg)
9415 {
9416         u32 flags = 0;
9417         flags |= seg->g       << 23;
9418         flags |= seg->db      << 22;
9419         flags |= seg->l       << 21;
9420         flags |= seg->avl     << 20;
9421         flags |= seg->present << 15;
9422         flags |= seg->dpl     << 13;
9423         flags |= seg->s       << 12;
9424         flags |= seg->type    << 8;
9425         return flags;
9426 }
9427
9428 static void enter_smm_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
9429 {
9430         struct kvm_segment seg;
9431         int offset;
9432
9433         kvm_get_segment(vcpu, &seg, n);
9434         put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
9435
9436         if (n < 3)
9437                 offset = 0x7f84 + n * 12;
9438         else
9439                 offset = 0x7f2c + (n - 3) * 12;
9440
9441         put_smstate(u32, buf, offset + 8, seg.base);
9442         put_smstate(u32, buf, offset + 4, seg.limit);
9443         put_smstate(u32, buf, offset, enter_smm_get_segment_flags(&seg));
9444 }
9445
9446 #ifdef CONFIG_X86_64
9447 static void enter_smm_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
9448 {
9449         struct kvm_segment seg;
9450         int offset;
9451         u16 flags;
9452
9453         kvm_get_segment(vcpu, &seg, n);
9454         offset = 0x7e00 + n * 16;
9455
9456         flags = enter_smm_get_segment_flags(&seg) >> 8;
9457         put_smstate(u16, buf, offset, seg.selector);
9458         put_smstate(u16, buf, offset + 2, flags);
9459         put_smstate(u32, buf, offset + 4, seg.limit);
9460         put_smstate(u64, buf, offset + 8, seg.base);
9461 }
9462 #endif
9463
9464 static void enter_smm_save_state_32(struct kvm_vcpu *vcpu, char *buf)
9465 {
9466         struct desc_ptr dt;
9467         struct kvm_segment seg;
9468         unsigned long val;
9469         int i;
9470
9471         put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
9472         put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
9473         put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
9474         put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
9475
9476         for (i = 0; i < 8; i++)
9477                 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read_raw(vcpu, i));
9478
9479         kvm_get_dr(vcpu, 6, &val);
9480         put_smstate(u32, buf, 0x7fcc, (u32)val);
9481         kvm_get_dr(vcpu, 7, &val);
9482         put_smstate(u32, buf, 0x7fc8, (u32)val);
9483
9484         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
9485         put_smstate(u32, buf, 0x7fc4, seg.selector);
9486         put_smstate(u32, buf, 0x7f64, seg.base);
9487         put_smstate(u32, buf, 0x7f60, seg.limit);
9488         put_smstate(u32, buf, 0x7f5c, enter_smm_get_segment_flags(&seg));
9489
9490         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
9491         put_smstate(u32, buf, 0x7fc0, seg.selector);
9492         put_smstate(u32, buf, 0x7f80, seg.base);
9493         put_smstate(u32, buf, 0x7f7c, seg.limit);
9494         put_smstate(u32, buf, 0x7f78, enter_smm_get_segment_flags(&seg));
9495
9496         static_call(kvm_x86_get_gdt)(vcpu, &dt);
9497         put_smstate(u32, buf, 0x7f74, dt.address);
9498         put_smstate(u32, buf, 0x7f70, dt.size);
9499
9500         static_call(kvm_x86_get_idt)(vcpu, &dt);
9501         put_smstate(u32, buf, 0x7f58, dt.address);
9502         put_smstate(u32, buf, 0x7f54, dt.size);
9503
9504         for (i = 0; i < 6; i++)
9505                 enter_smm_save_seg_32(vcpu, buf, i);
9506
9507         put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
9508
9509         /* revision id */
9510         put_smstate(u32, buf, 0x7efc, 0x00020000);
9511         put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
9512 }
9513
9514 #ifdef CONFIG_X86_64
9515 static void enter_smm_save_state_64(struct kvm_vcpu *vcpu, char *buf)
9516 {
9517         struct desc_ptr dt;
9518         struct kvm_segment seg;
9519         unsigned long val;
9520         int i;
9521
9522         for (i = 0; i < 16; i++)
9523                 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read_raw(vcpu, i));
9524
9525         put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
9526         put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
9527
9528         kvm_get_dr(vcpu, 6, &val);
9529         put_smstate(u64, buf, 0x7f68, val);
9530         kvm_get_dr(vcpu, 7, &val);
9531         put_smstate(u64, buf, 0x7f60, val);
9532
9533         put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
9534         put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
9535         put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
9536
9537         put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
9538
9539         /* revision id */
9540         put_smstate(u32, buf, 0x7efc, 0x00020064);
9541
9542         put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
9543
9544         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
9545         put_smstate(u16, buf, 0x7e90, seg.selector);
9546         put_smstate(u16, buf, 0x7e92, enter_smm_get_segment_flags(&seg) >> 8);
9547         put_smstate(u32, buf, 0x7e94, seg.limit);
9548         put_smstate(u64, buf, 0x7e98, seg.base);
9549
9550         static_call(kvm_x86_get_idt)(vcpu, &dt);
9551         put_smstate(u32, buf, 0x7e84, dt.size);
9552         put_smstate(u64, buf, 0x7e88, dt.address);
9553
9554         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
9555         put_smstate(u16, buf, 0x7e70, seg.selector);
9556         put_smstate(u16, buf, 0x7e72, enter_smm_get_segment_flags(&seg) >> 8);
9557         put_smstate(u32, buf, 0x7e74, seg.limit);
9558         put_smstate(u64, buf, 0x7e78, seg.base);
9559
9560         static_call(kvm_x86_get_gdt)(vcpu, &dt);
9561         put_smstate(u32, buf, 0x7e64, dt.size);
9562         put_smstate(u64, buf, 0x7e68, dt.address);
9563
9564         for (i = 0; i < 6; i++)
9565                 enter_smm_save_seg_64(vcpu, buf, i);
9566 }
9567 #endif
9568
9569 static void enter_smm(struct kvm_vcpu *vcpu)
9570 {
9571         struct kvm_segment cs, ds;
9572         struct desc_ptr dt;
9573         unsigned long cr0;
9574         char buf[512];
9575
9576         memset(buf, 0, 512);
9577 #ifdef CONFIG_X86_64
9578         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
9579                 enter_smm_save_state_64(vcpu, buf);
9580         else
9581 #endif
9582                 enter_smm_save_state_32(vcpu, buf);
9583
9584         /*
9585          * Give enter_smm() a chance to make ISA-specific changes to the vCPU
9586          * state (e.g. leave guest mode) after we've saved the state into the
9587          * SMM state-save area.
9588          */
9589         static_call(kvm_x86_enter_smm)(vcpu, buf);
9590
9591         kvm_smm_changed(vcpu, true);
9592         kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
9593
9594         if (static_call(kvm_x86_get_nmi_mask)(vcpu))
9595                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
9596         else
9597                 static_call(kvm_x86_set_nmi_mask)(vcpu, true);
9598
9599         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
9600         kvm_rip_write(vcpu, 0x8000);
9601
9602         cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
9603         static_call(kvm_x86_set_cr0)(vcpu, cr0);
9604         vcpu->arch.cr0 = cr0;
9605
9606         static_call(kvm_x86_set_cr4)(vcpu, 0);
9607
9608         /* Undocumented: IDT limit is set to zero on entry to SMM.  */
9609         dt.address = dt.size = 0;
9610         static_call(kvm_x86_set_idt)(vcpu, &dt);
9611
9612         kvm_set_dr(vcpu, 7, DR7_FIXED_1);
9613
9614         cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
9615         cs.base = vcpu->arch.smbase;
9616
9617         ds.selector = 0;
9618         ds.base = 0;
9619
9620         cs.limit    = ds.limit = 0xffffffff;
9621         cs.type     = ds.type = 0x3;
9622         cs.dpl      = ds.dpl = 0;
9623         cs.db       = ds.db = 0;
9624         cs.s        = ds.s = 1;
9625         cs.l        = ds.l = 0;
9626         cs.g        = ds.g = 1;
9627         cs.avl      = ds.avl = 0;
9628         cs.present  = ds.present = 1;
9629         cs.unusable = ds.unusable = 0;
9630         cs.padding  = ds.padding = 0;
9631
9632         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
9633         kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
9634         kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
9635         kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
9636         kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
9637         kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
9638
9639 #ifdef CONFIG_X86_64
9640         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
9641                 static_call(kvm_x86_set_efer)(vcpu, 0);
9642 #endif
9643
9644         kvm_update_cpuid_runtime(vcpu);
9645         kvm_mmu_reset_context(vcpu);
9646 }
9647
9648 static void process_smi(struct kvm_vcpu *vcpu)
9649 {
9650         vcpu->arch.smi_pending = true;
9651         kvm_make_request(KVM_REQ_EVENT, vcpu);
9652 }
9653
9654 void kvm_make_scan_ioapic_request_mask(struct kvm *kvm,
9655                                        unsigned long *vcpu_bitmap)
9656 {
9657         kvm_make_vcpus_request_mask(kvm, KVM_REQ_SCAN_IOAPIC, vcpu_bitmap);
9658 }
9659
9660 void kvm_make_scan_ioapic_request(struct kvm *kvm)
9661 {
9662         kvm_make_all_cpus_request(kvm, KVM_REQ_SCAN_IOAPIC);
9663 }
9664
9665 void kvm_vcpu_update_apicv(struct kvm_vcpu *vcpu)
9666 {
9667         bool activate;
9668
9669         if (!lapic_in_kernel(vcpu))
9670                 return;
9671
9672         down_read(&vcpu->kvm->arch.apicv_update_lock);
9673
9674         activate = kvm_apicv_activated(vcpu->kvm);
9675         if (vcpu->arch.apicv_active == activate)
9676                 goto out;
9677
9678         vcpu->arch.apicv_active = activate;
9679         kvm_apic_update_apicv(vcpu);
9680         static_call(kvm_x86_refresh_apicv_exec_ctrl)(vcpu);
9681
9682         /*
9683          * When APICv gets disabled, we may still have injected interrupts
9684          * pending. At the same time, KVM_REQ_EVENT may not be set as APICv was
9685          * still active when the interrupt got accepted. Make sure
9686          * inject_pending_event() is called to check for that.
9687          */
9688         if (!vcpu->arch.apicv_active)
9689                 kvm_make_request(KVM_REQ_EVENT, vcpu);
9690
9691 out:
9692         up_read(&vcpu->kvm->arch.apicv_update_lock);
9693 }
9694 EXPORT_SYMBOL_GPL(kvm_vcpu_update_apicv);
9695
9696 void __kvm_request_apicv_update(struct kvm *kvm, bool activate, ulong bit)
9697 {
9698         unsigned long old, new;
9699
9700         lockdep_assert_held_write(&kvm->arch.apicv_update_lock);
9701
9702         if (!kvm_x86_ops.check_apicv_inhibit_reasons ||
9703             !static_call(kvm_x86_check_apicv_inhibit_reasons)(bit))
9704                 return;
9705
9706         old = new = kvm->arch.apicv_inhibit_reasons;
9707
9708         if (activate)
9709                 __clear_bit(bit, &new);
9710         else
9711                 __set_bit(bit, &new);
9712
9713         if (!!old != !!new) {
9714                 trace_kvm_apicv_update_request(activate, bit);
9715                 /*
9716                  * Kick all vCPUs before setting apicv_inhibit_reasons to avoid
9717                  * false positives in the sanity check WARN in svm_vcpu_run().
9718                  * This task will wait for all vCPUs to ack the kick IRQ before
9719                  * updating apicv_inhibit_reasons, and all other vCPUs will
9720                  * block on acquiring apicv_update_lock so that vCPUs can't
9721                  * redo svm_vcpu_run() without seeing the new inhibit state.
9722                  *
9723                  * Note, holding apicv_update_lock and taking it in the read
9724                  * side (handling the request) also prevents other vCPUs from
9725                  * servicing the request with a stale apicv_inhibit_reasons.
9726                  */
9727                 kvm_make_all_cpus_request(kvm, KVM_REQ_APICV_UPDATE);
9728                 kvm->arch.apicv_inhibit_reasons = new;
9729                 if (new) {
9730                         unsigned long gfn = gpa_to_gfn(APIC_DEFAULT_PHYS_BASE);
9731                         kvm_zap_gfn_range(kvm, gfn, gfn+1);
9732                 }
9733         } else
9734                 kvm->arch.apicv_inhibit_reasons = new;
9735 }
9736 EXPORT_SYMBOL_GPL(__kvm_request_apicv_update);
9737
9738 void kvm_request_apicv_update(struct kvm *kvm, bool activate, ulong bit)
9739 {
9740         down_write(&kvm->arch.apicv_update_lock);
9741         __kvm_request_apicv_update(kvm, activate, bit);
9742         up_write(&kvm->arch.apicv_update_lock);
9743 }
9744 EXPORT_SYMBOL_GPL(kvm_request_apicv_update);
9745
9746 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
9747 {
9748         if (!kvm_apic_present(vcpu))
9749                 return;
9750
9751         bitmap_zero(vcpu->arch.ioapic_handled_vectors, 256);
9752
9753         if (irqchip_split(vcpu->kvm))
9754                 kvm_scan_ioapic_routes(vcpu, vcpu->arch.ioapic_handled_vectors);
9755         else {
9756                 static_call_cond(kvm_x86_sync_pir_to_irr)(vcpu);
9757                 if (ioapic_in_kernel(vcpu->kvm))
9758                         kvm_ioapic_scan_entry(vcpu, vcpu->arch.ioapic_handled_vectors);
9759         }
9760
9761         if (is_guest_mode(vcpu))
9762                 vcpu->arch.load_eoi_exitmap_pending = true;
9763         else
9764                 kvm_make_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu);
9765 }
9766
9767 static void vcpu_load_eoi_exitmap(struct kvm_vcpu *vcpu)
9768 {
9769         u64 eoi_exit_bitmap[4];
9770
9771         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
9772                 return;
9773
9774         if (to_hv_vcpu(vcpu)) {
9775                 bitmap_or((ulong *)eoi_exit_bitmap,
9776                           vcpu->arch.ioapic_handled_vectors,
9777                           to_hv_synic(vcpu)->vec_bitmap, 256);
9778                 static_call(kvm_x86_load_eoi_exitmap)(vcpu, eoi_exit_bitmap);
9779                 return;
9780         }
9781
9782         static_call(kvm_x86_load_eoi_exitmap)(
9783                 vcpu, (u64 *)vcpu->arch.ioapic_handled_vectors);
9784 }
9785
9786 void kvm_arch_mmu_notifier_invalidate_range(struct kvm *kvm,
9787                                             unsigned long start, unsigned long end)
9788 {
9789         unsigned long apic_address;
9790
9791         /*
9792          * The physical address of apic access page is stored in the VMCS.
9793          * Update it when it becomes invalid.
9794          */
9795         apic_address = gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
9796         if (start <= apic_address && apic_address < end)
9797                 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
9798 }
9799
9800 static void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
9801 {
9802         if (!lapic_in_kernel(vcpu))
9803                 return;
9804
9805         if (!kvm_x86_ops.set_apic_access_page_addr)
9806                 return;
9807
9808         static_call(kvm_x86_set_apic_access_page_addr)(vcpu);
9809 }
9810
9811 void __kvm_request_immediate_exit(struct kvm_vcpu *vcpu)
9812 {
9813         smp_send_reschedule(vcpu->cpu);
9814 }
9815 EXPORT_SYMBOL_GPL(__kvm_request_immediate_exit);
9816
9817 /*
9818  * Returns 1 to let vcpu_run() continue the guest execution loop without
9819  * exiting to the userspace.  Otherwise, the value will be returned to the
9820  * userspace.
9821  */
9822 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
9823 {
9824         int r;
9825         bool req_int_win =
9826                 dm_request_for_irq_injection(vcpu) &&
9827                 kvm_cpu_accept_dm_intr(vcpu);
9828         fastpath_t exit_fastpath;
9829
9830         bool req_immediate_exit = false;
9831
9832         /* Forbid vmenter if vcpu dirty ring is soft-full */
9833         if (unlikely(vcpu->kvm->dirty_ring_size &&
9834                      kvm_dirty_ring_soft_full(&vcpu->dirty_ring))) {
9835                 vcpu->run->exit_reason = KVM_EXIT_DIRTY_RING_FULL;
9836                 trace_kvm_dirty_ring_exit(vcpu);
9837                 r = 0;
9838                 goto out;
9839         }
9840
9841         if (kvm_request_pending(vcpu)) {
9842                 if (kvm_check_request(KVM_REQ_VM_DEAD, vcpu)) {
9843                         r = -EIO;
9844                         goto out;
9845                 }
9846                 if (kvm_check_request(KVM_REQ_GET_NESTED_STATE_PAGES, vcpu)) {
9847                         if (unlikely(!kvm_x86_ops.nested_ops->get_nested_state_pages(vcpu))) {
9848                                 r = 0;
9849                                 goto out;
9850                         }
9851                 }
9852                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
9853                         kvm_mmu_unload(vcpu);
9854                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
9855                         __kvm_migrate_timers(vcpu);
9856                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
9857                         kvm_update_masterclock(vcpu->kvm);
9858                 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
9859                         kvm_gen_kvmclock_update(vcpu);
9860                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
9861                         r = kvm_guest_time_update(vcpu);
9862                         if (unlikely(r))
9863                                 goto out;
9864                 }
9865                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
9866                         kvm_mmu_sync_roots(vcpu);
9867                 if (kvm_check_request(KVM_REQ_LOAD_MMU_PGD, vcpu))
9868                         kvm_mmu_load_pgd(vcpu);
9869                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu)) {
9870                         kvm_vcpu_flush_tlb_all(vcpu);
9871
9872                         /* Flushing all ASIDs flushes the current ASID... */
9873                         kvm_clear_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
9874                 }
9875                 kvm_service_local_tlb_flush_requests(vcpu);
9876
9877                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
9878                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
9879                         r = 0;
9880                         goto out;
9881                 }
9882                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
9883                         if (is_guest_mode(vcpu)) {
9884                                 kvm_x86_ops.nested_ops->triple_fault(vcpu);
9885                         } else {
9886                                 vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
9887                                 vcpu->mmio_needed = 0;
9888                                 r = 0;
9889                                 goto out;
9890                         }
9891                 }
9892                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
9893                         /* Page is swapped out. Do synthetic halt */
9894                         vcpu->arch.apf.halted = true;
9895                         r = 1;
9896                         goto out;
9897                 }
9898                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
9899                         record_steal_time(vcpu);
9900                 if (kvm_check_request(KVM_REQ_SMI, vcpu))
9901                         process_smi(vcpu);
9902                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
9903                         process_nmi(vcpu);
9904                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
9905                         kvm_pmu_handle_event(vcpu);
9906                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
9907                         kvm_pmu_deliver_pmi(vcpu);
9908                 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT, vcpu)) {
9909                         BUG_ON(vcpu->arch.pending_ioapic_eoi > 255);
9910                         if (test_bit(vcpu->arch.pending_ioapic_eoi,
9911                                      vcpu->arch.ioapic_handled_vectors)) {
9912                                 vcpu->run->exit_reason = KVM_EXIT_IOAPIC_EOI;
9913                                 vcpu->run->eoi.vector =
9914                                                 vcpu->arch.pending_ioapic_eoi;
9915                                 r = 0;
9916                                 goto out;
9917                         }
9918                 }
9919                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
9920                         vcpu_scan_ioapic(vcpu);
9921                 if (kvm_check_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu))
9922                         vcpu_load_eoi_exitmap(vcpu);
9923                 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
9924                         kvm_vcpu_reload_apic_access_page(vcpu);
9925                 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
9926                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
9927                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
9928                         r = 0;
9929                         goto out;
9930                 }
9931                 if (kvm_check_request(KVM_REQ_HV_RESET, vcpu)) {
9932                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
9933                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_RESET;
9934                         r = 0;
9935                         goto out;
9936                 }
9937                 if (kvm_check_request(KVM_REQ_HV_EXIT, vcpu)) {
9938                         struct kvm_vcpu_hv *hv_vcpu = to_hv_vcpu(vcpu);
9939
9940                         vcpu->run->exit_reason = KVM_EXIT_HYPERV;
9941                         vcpu->run->hyperv = hv_vcpu->exit;
9942                         r = 0;
9943                         goto out;
9944                 }
9945
9946                 /*
9947                  * KVM_REQ_HV_STIMER has to be processed after
9948                  * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
9949                  * depend on the guest clock being up-to-date
9950                  */
9951                 if (kvm_check_request(KVM_REQ_HV_STIMER, vcpu))
9952                         kvm_hv_process_stimers(vcpu);
9953                 if (kvm_check_request(KVM_REQ_APICV_UPDATE, vcpu))
9954                         kvm_vcpu_update_apicv(vcpu);
9955                 if (kvm_check_request(KVM_REQ_APF_READY, vcpu))
9956                         kvm_check_async_pf_completion(vcpu);
9957                 if (kvm_check_request(KVM_REQ_MSR_FILTER_CHANGED, vcpu))
9958                         static_call(kvm_x86_msr_filter_changed)(vcpu);
9959
9960                 if (kvm_check_request(KVM_REQ_UPDATE_CPU_DIRTY_LOGGING, vcpu))
9961                         static_call(kvm_x86_update_cpu_dirty_logging)(vcpu);
9962         }
9963
9964         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win ||
9965             kvm_xen_has_interrupt(vcpu)) {
9966                 ++vcpu->stat.req_event;
9967                 r = kvm_apic_accept_events(vcpu);
9968                 if (r < 0) {
9969                         r = 0;
9970                         goto out;
9971                 }
9972                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
9973                         r = 1;
9974                         goto out;
9975                 }
9976
9977                 r = inject_pending_event(vcpu, &req_immediate_exit);
9978                 if (r < 0) {
9979                         r = 0;
9980                         goto out;
9981                 }
9982                 if (req_int_win)
9983                         static_call(kvm_x86_enable_irq_window)(vcpu);
9984
9985                 if (kvm_lapic_enabled(vcpu)) {
9986                         update_cr8_intercept(vcpu);
9987                         kvm_lapic_sync_to_vapic(vcpu);
9988                 }
9989         }
9990
9991         r = kvm_mmu_reload(vcpu);
9992         if (unlikely(r)) {
9993                 goto cancel_injection;
9994         }
9995
9996         preempt_disable();
9997
9998         static_call(kvm_x86_prepare_guest_switch)(vcpu);
9999
10000         /*
10001          * Disable IRQs before setting IN_GUEST_MODE.  Posted interrupt
10002          * IPI are then delayed after guest entry, which ensures that they
10003          * result in virtual interrupt delivery.
10004          */
10005         local_irq_disable();
10006
10007         /* Store vcpu->apicv_active before vcpu->mode.  */
10008         smp_store_release(&vcpu->mode, IN_GUEST_MODE);
10009
10010         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
10011
10012         /*
10013          * 1) We should set ->mode before checking ->requests.  Please see
10014          * the comment in kvm_vcpu_exiting_guest_mode().
10015          *
10016          * 2) For APICv, we should set ->mode before checking PID.ON. This
10017          * pairs with the memory barrier implicit in pi_test_and_set_on
10018          * (see vmx_deliver_posted_interrupt).
10019          *
10020          * 3) This also orders the write to mode from any reads to the page
10021          * tables done while the VCPU is running.  Please see the comment
10022          * in kvm_flush_remote_tlbs.
10023          */
10024         smp_mb__after_srcu_read_unlock();
10025
10026         /*
10027          * Process pending posted interrupts to handle the case where the
10028          * notification IRQ arrived in the host, or was never sent (because the
10029          * target vCPU wasn't running).  Do this regardless of the vCPU's APICv
10030          * status, KVM doesn't update assigned devices when APICv is inhibited,
10031          * i.e. they can post interrupts even if APICv is temporarily disabled.
10032          */
10033         if (kvm_lapic_enabled(vcpu))
10034                 static_call_cond(kvm_x86_sync_pir_to_irr)(vcpu);
10035
10036         if (kvm_vcpu_exit_request(vcpu)) {
10037                 vcpu->mode = OUTSIDE_GUEST_MODE;
10038                 smp_wmb();
10039                 local_irq_enable();
10040                 preempt_enable();
10041                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
10042                 r = 1;
10043                 goto cancel_injection;
10044         }
10045
10046         if (req_immediate_exit) {
10047                 kvm_make_request(KVM_REQ_EVENT, vcpu);
10048                 static_call(kvm_x86_request_immediate_exit)(vcpu);
10049         }
10050
10051         fpregs_assert_state_consistent();
10052         if (test_thread_flag(TIF_NEED_FPU_LOAD))
10053                 switch_fpu_return();
10054
10055         if (vcpu->arch.guest_fpu.xfd_err)
10056                 wrmsrl(MSR_IA32_XFD_ERR, vcpu->arch.guest_fpu.xfd_err);
10057
10058         if (unlikely(vcpu->arch.switch_db_regs)) {
10059                 set_debugreg(0, 7);
10060                 set_debugreg(vcpu->arch.eff_db[0], 0);
10061                 set_debugreg(vcpu->arch.eff_db[1], 1);
10062                 set_debugreg(vcpu->arch.eff_db[2], 2);
10063                 set_debugreg(vcpu->arch.eff_db[3], 3);
10064         } else if (unlikely(hw_breakpoint_active())) {
10065                 set_debugreg(0, 7);
10066         }
10067
10068         guest_timing_enter_irqoff();
10069
10070         for (;;) {
10071                 /*
10072                  * Assert that vCPU vs. VM APICv state is consistent.  An APICv
10073                  * update must kick and wait for all vCPUs before toggling the
10074                  * per-VM state, and responsing vCPUs must wait for the update
10075                  * to complete before servicing KVM_REQ_APICV_UPDATE.
10076                  */
10077                 WARN_ON_ONCE(kvm_apicv_activated(vcpu->kvm) != kvm_vcpu_apicv_active(vcpu));
10078
10079                 exit_fastpath = static_call(kvm_x86_run)(vcpu);
10080                 if (likely(exit_fastpath != EXIT_FASTPATH_REENTER_GUEST))
10081                         break;
10082
10083                 if (kvm_lapic_enabled(vcpu))
10084                         static_call_cond(kvm_x86_sync_pir_to_irr)(vcpu);
10085
10086                 if (unlikely(kvm_vcpu_exit_request(vcpu))) {
10087                         exit_fastpath = EXIT_FASTPATH_EXIT_HANDLED;
10088                         break;
10089                 }
10090         }
10091
10092         /*
10093          * Do this here before restoring debug registers on the host.  And
10094          * since we do this before handling the vmexit, a DR access vmexit
10095          * can (a) read the correct value of the debug registers, (b) set
10096          * KVM_DEBUGREG_WONT_EXIT again.
10097          */
10098         if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
10099                 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
10100                 static_call(kvm_x86_sync_dirty_debug_regs)(vcpu);
10101                 kvm_update_dr0123(vcpu);
10102                 kvm_update_dr7(vcpu);
10103         }
10104
10105         /*
10106          * If the guest has used debug registers, at least dr7
10107          * will be disabled while returning to the host.
10108          * If we don't have active breakpoints in the host, we don't
10109          * care about the messed up debug address registers. But if
10110          * we have some of them active, restore the old state.
10111          */
10112         if (hw_breakpoint_active())
10113                 hw_breakpoint_restore();
10114
10115         vcpu->arch.last_vmentry_cpu = vcpu->cpu;
10116         vcpu->arch.last_guest_tsc = kvm_read_l1_tsc(vcpu, rdtsc());
10117
10118         vcpu->mode = OUTSIDE_GUEST_MODE;
10119         smp_wmb();
10120
10121         /*
10122          * Sync xfd before calling handle_exit_irqoff() which may
10123          * rely on the fact that guest_fpu::xfd is up-to-date (e.g.
10124          * in #NM irqoff handler).
10125          */
10126         if (vcpu->arch.xfd_no_write_intercept)
10127                 fpu_sync_guest_vmexit_xfd_state();
10128
10129         static_call(kvm_x86_handle_exit_irqoff)(vcpu);
10130
10131         if (vcpu->arch.guest_fpu.xfd_err)
10132                 wrmsrl(MSR_IA32_XFD_ERR, 0);
10133
10134         /*
10135          * Consume any pending interrupts, including the possible source of
10136          * VM-Exit on SVM and any ticks that occur between VM-Exit and now.
10137          * An instruction is required after local_irq_enable() to fully unblock
10138          * interrupts on processors that implement an interrupt shadow, the
10139          * stat.exits increment will do nicely.
10140          */
10141         kvm_before_interrupt(vcpu, KVM_HANDLING_IRQ);
10142         local_irq_enable();
10143         ++vcpu->stat.exits;
10144         local_irq_disable();
10145         kvm_after_interrupt(vcpu);
10146
10147         /*
10148          * Wait until after servicing IRQs to account guest time so that any
10149          * ticks that occurred while running the guest are properly accounted
10150          * to the guest.  Waiting until IRQs are enabled degrades the accuracy
10151          * of accounting via context tracking, but the loss of accuracy is
10152          * acceptable for all known use cases.
10153          */
10154         guest_timing_exit_irqoff();
10155
10156         if (lapic_in_kernel(vcpu)) {
10157                 s64 delta = vcpu->arch.apic->lapic_timer.advance_expire_delta;
10158                 if (delta != S64_MIN) {
10159                         trace_kvm_wait_lapic_expire(vcpu->vcpu_id, delta);
10160                         vcpu->arch.apic->lapic_timer.advance_expire_delta = S64_MIN;
10161                 }
10162         }
10163
10164         local_irq_enable();
10165         preempt_enable();
10166
10167         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
10168
10169         /*
10170          * Profile KVM exit RIPs:
10171          */
10172         if (unlikely(prof_on == KVM_PROFILING)) {
10173                 unsigned long rip = kvm_rip_read(vcpu);
10174                 profile_hit(KVM_PROFILING, (void *)rip);
10175         }
10176
10177         if (unlikely(vcpu->arch.tsc_always_catchup))
10178                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
10179
10180         if (vcpu->arch.apic_attention)
10181                 kvm_lapic_sync_from_vapic(vcpu);
10182
10183         r = static_call(kvm_x86_handle_exit)(vcpu, exit_fastpath);
10184         return r;
10185
10186 cancel_injection:
10187         if (req_immediate_exit)
10188                 kvm_make_request(KVM_REQ_EVENT, vcpu);
10189         static_call(kvm_x86_cancel_injection)(vcpu);
10190         if (unlikely(vcpu->arch.apic_attention))
10191                 kvm_lapic_sync_from_vapic(vcpu);
10192 out:
10193         return r;
10194 }
10195
10196 static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
10197 {
10198         bool hv_timer;
10199
10200         if (!kvm_arch_vcpu_runnable(vcpu)) {
10201                 /*
10202                  * Switch to the software timer before halt-polling/blocking as
10203                  * the guest's timer may be a break event for the vCPU, and the
10204                  * hypervisor timer runs only when the CPU is in guest mode.
10205                  * Switch before halt-polling so that KVM recognizes an expired
10206                  * timer before blocking.
10207                  */
10208                 hv_timer = kvm_lapic_hv_timer_in_use(vcpu);
10209                 if (hv_timer)
10210                         kvm_lapic_switch_to_sw_timer(vcpu);
10211
10212                 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
10213                 if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED)
10214                         kvm_vcpu_halt(vcpu);
10215                 else
10216                         kvm_vcpu_block(vcpu);
10217                 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
10218
10219                 if (hv_timer)
10220                         kvm_lapic_switch_to_hv_timer(vcpu);
10221
10222                 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
10223                         return 1;
10224         }
10225
10226         if (kvm_apic_accept_events(vcpu) < 0)
10227                 return 0;
10228         switch(vcpu->arch.mp_state) {
10229         case KVM_MP_STATE_HALTED:
10230         case KVM_MP_STATE_AP_RESET_HOLD:
10231                 vcpu->arch.pv.pv_unhalted = false;
10232                 vcpu->arch.mp_state =
10233                         KVM_MP_STATE_RUNNABLE;
10234                 fallthrough;
10235         case KVM_MP_STATE_RUNNABLE:
10236                 vcpu->arch.apf.halted = false;
10237                 break;
10238         case KVM_MP_STATE_INIT_RECEIVED:
10239                 break;
10240         default:
10241                 return -EINTR;
10242         }
10243         return 1;
10244 }
10245
10246 static inline bool kvm_vcpu_running(struct kvm_vcpu *vcpu)
10247 {
10248         if (is_guest_mode(vcpu))
10249                 kvm_check_nested_events(vcpu);
10250
10251         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
10252                 !vcpu->arch.apf.halted);
10253 }
10254
10255 static int vcpu_run(struct kvm_vcpu *vcpu)
10256 {
10257         int r;
10258         struct kvm *kvm = vcpu->kvm;
10259
10260         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
10261         vcpu->arch.l1tf_flush_l1d = true;
10262
10263         for (;;) {
10264                 if (kvm_vcpu_running(vcpu)) {
10265                         r = vcpu_enter_guest(vcpu);
10266                 } else {
10267                         r = vcpu_block(kvm, vcpu);
10268                 }
10269
10270                 if (r <= 0)
10271                         break;
10272
10273                 kvm_clear_request(KVM_REQ_UNBLOCK, vcpu);
10274                 if (kvm_cpu_has_pending_timer(vcpu))
10275                         kvm_inject_pending_timer_irqs(vcpu);
10276
10277                 if (dm_request_for_irq_injection(vcpu) &&
10278                         kvm_vcpu_ready_for_interrupt_injection(vcpu)) {
10279                         r = 0;
10280                         vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
10281                         ++vcpu->stat.request_irq_exits;
10282                         break;
10283                 }
10284
10285                 if (__xfer_to_guest_mode_work_pending()) {
10286                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
10287                         r = xfer_to_guest_mode_handle_work(vcpu);
10288                         if (r)
10289                                 return r;
10290                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
10291                 }
10292         }
10293
10294         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
10295
10296         return r;
10297 }
10298
10299 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
10300 {
10301         int r;
10302
10303         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
10304         r = kvm_emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
10305         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
10306         return r;
10307 }
10308
10309 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
10310 {
10311         BUG_ON(!vcpu->arch.pio.count);
10312
10313         return complete_emulated_io(vcpu);
10314 }
10315
10316 /*
10317  * Implements the following, as a state machine:
10318  *
10319  * read:
10320  *   for each fragment
10321  *     for each mmio piece in the fragment
10322  *       write gpa, len
10323  *       exit
10324  *       copy data
10325  *   execute insn
10326  *
10327  * write:
10328  *   for each fragment
10329  *     for each mmio piece in the fragment
10330  *       write gpa, len
10331  *       copy data
10332  *       exit
10333  */
10334 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
10335 {
10336         struct kvm_run *run = vcpu->run;
10337         struct kvm_mmio_fragment *frag;
10338         unsigned len;
10339
10340         BUG_ON(!vcpu->mmio_needed);
10341
10342         /* Complete previous fragment */
10343         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
10344         len = min(8u, frag->len);
10345         if (!vcpu->mmio_is_write)
10346                 memcpy(frag->data, run->mmio.data, len);
10347
10348         if (frag->len <= 8) {
10349                 /* Switch to the next fragment. */
10350                 frag++;
10351                 vcpu->mmio_cur_fragment++;
10352         } else {
10353                 /* Go forward to the next mmio piece. */
10354                 frag->data += len;
10355                 frag->gpa += len;
10356                 frag->len -= len;
10357         }
10358
10359         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
10360                 vcpu->mmio_needed = 0;
10361
10362                 /* FIXME: return into emulator if single-stepping.  */
10363                 if (vcpu->mmio_is_write)
10364                         return 1;
10365                 vcpu->mmio_read_completed = 1;
10366                 return complete_emulated_io(vcpu);
10367         }
10368
10369         run->exit_reason = KVM_EXIT_MMIO;
10370         run->mmio.phys_addr = frag->gpa;
10371         if (vcpu->mmio_is_write)
10372                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
10373         run->mmio.len = min(8u, frag->len);
10374         run->mmio.is_write = vcpu->mmio_is_write;
10375         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
10376         return 0;
10377 }
10378
10379 /* Swap (qemu) user FPU context for the guest FPU context. */
10380 static void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
10381 {
10382         /*
10383          * Exclude PKRU from restore as restored separately in
10384          * kvm_x86_ops.run().
10385          */
10386         fpu_swap_kvm_fpstate(&vcpu->arch.guest_fpu, true);
10387         trace_kvm_fpu(1);
10388 }
10389
10390 /* When vcpu_run ends, restore user space FPU context. */
10391 static void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
10392 {
10393         fpu_swap_kvm_fpstate(&vcpu->arch.guest_fpu, false);
10394         ++vcpu->stat.fpu_reload;
10395         trace_kvm_fpu(0);
10396 }
10397
10398 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu)
10399 {
10400         struct kvm_run *kvm_run = vcpu->run;
10401         int r;
10402
10403         vcpu_load(vcpu);
10404         kvm_sigset_activate(vcpu);
10405         kvm_run->flags = 0;
10406         kvm_load_guest_fpu(vcpu);
10407
10408         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
10409                 if (kvm_run->immediate_exit) {
10410                         r = -EINTR;
10411                         goto out;
10412                 }
10413                 /*
10414                  * It should be impossible for the hypervisor timer to be in
10415                  * use before KVM has ever run the vCPU.
10416                  */
10417                 WARN_ON_ONCE(kvm_lapic_hv_timer_in_use(vcpu));
10418                 kvm_vcpu_block(vcpu);
10419                 if (kvm_apic_accept_events(vcpu) < 0) {
10420                         r = 0;
10421                         goto out;
10422                 }
10423                 kvm_clear_request(KVM_REQ_UNHALT, vcpu);
10424                 r = -EAGAIN;
10425                 if (signal_pending(current)) {
10426                         r = -EINTR;
10427                         kvm_run->exit_reason = KVM_EXIT_INTR;
10428                         ++vcpu->stat.signal_exits;
10429                 }
10430                 goto out;
10431         }
10432
10433         if ((kvm_run->kvm_valid_regs & ~KVM_SYNC_X86_VALID_FIELDS) ||
10434             (kvm_run->kvm_dirty_regs & ~KVM_SYNC_X86_VALID_FIELDS)) {
10435                 r = -EINVAL;
10436                 goto out;
10437         }
10438
10439         if (kvm_run->kvm_dirty_regs) {
10440                 r = sync_regs(vcpu);
10441                 if (r != 0)
10442                         goto out;
10443         }
10444
10445         /* re-sync apic's tpr */
10446         if (!lapic_in_kernel(vcpu)) {
10447                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
10448                         r = -EINVAL;
10449                         goto out;
10450                 }
10451         }
10452
10453         if (unlikely(vcpu->arch.complete_userspace_io)) {
10454                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
10455                 vcpu->arch.complete_userspace_io = NULL;
10456                 r = cui(vcpu);
10457                 if (r <= 0)
10458                         goto out;
10459         } else
10460                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
10461
10462         if (kvm_run->immediate_exit) {
10463                 r = -EINTR;
10464                 goto out;
10465         }
10466
10467         r = static_call(kvm_x86_vcpu_pre_run)(vcpu);
10468         if (r <= 0)
10469                 goto out;
10470
10471         r = vcpu_run(vcpu);
10472
10473 out:
10474         kvm_put_guest_fpu(vcpu);
10475         if (kvm_run->kvm_valid_regs)
10476                 store_regs(vcpu);
10477         post_kvm_run_save(vcpu);
10478         kvm_sigset_deactivate(vcpu);
10479
10480         vcpu_put(vcpu);
10481         return r;
10482 }
10483
10484 static void __get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
10485 {
10486         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
10487                 /*
10488                  * We are here if userspace calls get_regs() in the middle of
10489                  * instruction emulation. Registers state needs to be copied
10490                  * back from emulation context to vcpu. Userspace shouldn't do
10491                  * that usually, but some bad designed PV devices (vmware
10492                  * backdoor interface) need this to work
10493                  */
10494                 emulator_writeback_register_cache(vcpu->arch.emulate_ctxt);
10495                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
10496         }
10497         regs->rax = kvm_rax_read(vcpu);
10498         regs->rbx = kvm_rbx_read(vcpu);
10499         regs->rcx = kvm_rcx_read(vcpu);
10500         regs->rdx = kvm_rdx_read(vcpu);
10501         regs->rsi = kvm_rsi_read(vcpu);
10502         regs->rdi = kvm_rdi_read(vcpu);
10503         regs->rsp = kvm_rsp_read(vcpu);
10504         regs->rbp = kvm_rbp_read(vcpu);
10505 #ifdef CONFIG_X86_64
10506         regs->r8 = kvm_r8_read(vcpu);
10507         regs->r9 = kvm_r9_read(vcpu);
10508         regs->r10 = kvm_r10_read(vcpu);
10509         regs->r11 = kvm_r11_read(vcpu);
10510         regs->r12 = kvm_r12_read(vcpu);
10511         regs->r13 = kvm_r13_read(vcpu);
10512         regs->r14 = kvm_r14_read(vcpu);
10513         regs->r15 = kvm_r15_read(vcpu);
10514 #endif
10515
10516         regs->rip = kvm_rip_read(vcpu);
10517         regs->rflags = kvm_get_rflags(vcpu);
10518 }
10519
10520 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
10521 {
10522         vcpu_load(vcpu);
10523         __get_regs(vcpu, regs);
10524         vcpu_put(vcpu);
10525         return 0;
10526 }
10527
10528 static void __set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
10529 {
10530         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
10531         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
10532
10533         kvm_rax_write(vcpu, regs->rax);
10534         kvm_rbx_write(vcpu, regs->rbx);
10535         kvm_rcx_write(vcpu, regs->rcx);
10536         kvm_rdx_write(vcpu, regs->rdx);
10537         kvm_rsi_write(vcpu, regs->rsi);
10538         kvm_rdi_write(vcpu, regs->rdi);
10539         kvm_rsp_write(vcpu, regs->rsp);
10540         kvm_rbp_write(vcpu, regs->rbp);
10541 #ifdef CONFIG_X86_64
10542         kvm_r8_write(vcpu, regs->r8);
10543         kvm_r9_write(vcpu, regs->r9);
10544         kvm_r10_write(vcpu, regs->r10);
10545         kvm_r11_write(vcpu, regs->r11);
10546         kvm_r12_write(vcpu, regs->r12);
10547         kvm_r13_write(vcpu, regs->r13);
10548         kvm_r14_write(vcpu, regs->r14);
10549         kvm_r15_write(vcpu, regs->r15);
10550 #endif
10551
10552         kvm_rip_write(vcpu, regs->rip);
10553         kvm_set_rflags(vcpu, regs->rflags | X86_EFLAGS_FIXED);
10554
10555         vcpu->arch.exception.pending = false;
10556
10557         kvm_make_request(KVM_REQ_EVENT, vcpu);
10558 }
10559
10560 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
10561 {
10562         vcpu_load(vcpu);
10563         __set_regs(vcpu, regs);
10564         vcpu_put(vcpu);
10565         return 0;
10566 }
10567
10568 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
10569 {
10570         struct kvm_segment cs;
10571
10572         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
10573         *db = cs.db;
10574         *l = cs.l;
10575 }
10576 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
10577
10578 static void __get_sregs_common(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
10579 {
10580         struct desc_ptr dt;
10581
10582         if (vcpu->arch.guest_state_protected)
10583                 goto skip_protected_regs;
10584
10585         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
10586         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
10587         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
10588         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
10589         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
10590         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
10591
10592         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
10593         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
10594
10595         static_call(kvm_x86_get_idt)(vcpu, &dt);
10596         sregs->idt.limit = dt.size;
10597         sregs->idt.base = dt.address;
10598         static_call(kvm_x86_get_gdt)(vcpu, &dt);
10599         sregs->gdt.limit = dt.size;
10600         sregs->gdt.base = dt.address;
10601
10602         sregs->cr2 = vcpu->arch.cr2;
10603         sregs->cr3 = kvm_read_cr3(vcpu);
10604
10605 skip_protected_regs:
10606         sregs->cr0 = kvm_read_cr0(vcpu);
10607         sregs->cr4 = kvm_read_cr4(vcpu);
10608         sregs->cr8 = kvm_get_cr8(vcpu);
10609         sregs->efer = vcpu->arch.efer;
10610         sregs->apic_base = kvm_get_apic_base(vcpu);
10611 }
10612
10613 static void __get_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
10614 {
10615         __get_sregs_common(vcpu, sregs);
10616
10617         if (vcpu->arch.guest_state_protected)
10618                 return;
10619
10620         if (vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft)
10621                 set_bit(vcpu->arch.interrupt.nr,
10622                         (unsigned long *)sregs->interrupt_bitmap);
10623 }
10624
10625 static void __get_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2)
10626 {
10627         int i;
10628
10629         __get_sregs_common(vcpu, (struct kvm_sregs *)sregs2);
10630
10631         if (vcpu->arch.guest_state_protected)
10632                 return;
10633
10634         if (is_pae_paging(vcpu)) {
10635                 for (i = 0 ; i < 4 ; i++)
10636                         sregs2->pdptrs[i] = kvm_pdptr_read(vcpu, i);
10637                 sregs2->flags |= KVM_SREGS2_FLAGS_PDPTRS_VALID;
10638         }
10639 }
10640
10641 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
10642                                   struct kvm_sregs *sregs)
10643 {
10644         vcpu_load(vcpu);
10645         __get_sregs(vcpu, sregs);
10646         vcpu_put(vcpu);
10647         return 0;
10648 }
10649
10650 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
10651                                     struct kvm_mp_state *mp_state)
10652 {
10653         int r;
10654
10655         vcpu_load(vcpu);
10656         if (kvm_mpx_supported())
10657                 kvm_load_guest_fpu(vcpu);
10658
10659         r = kvm_apic_accept_events(vcpu);
10660         if (r < 0)
10661                 goto out;
10662         r = 0;
10663
10664         if ((vcpu->arch.mp_state == KVM_MP_STATE_HALTED ||
10665              vcpu->arch.mp_state == KVM_MP_STATE_AP_RESET_HOLD) &&
10666             vcpu->arch.pv.pv_unhalted)
10667                 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
10668         else
10669                 mp_state->mp_state = vcpu->arch.mp_state;
10670
10671 out:
10672         if (kvm_mpx_supported())
10673                 kvm_put_guest_fpu(vcpu);
10674         vcpu_put(vcpu);
10675         return r;
10676 }
10677
10678 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
10679                                     struct kvm_mp_state *mp_state)
10680 {
10681         int ret = -EINVAL;
10682
10683         vcpu_load(vcpu);
10684
10685         if (!lapic_in_kernel(vcpu) &&
10686             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
10687                 goto out;
10688
10689         /*
10690          * KVM_MP_STATE_INIT_RECEIVED means the processor is in
10691          * INIT state; latched init should be reported using
10692          * KVM_SET_VCPU_EVENTS, so reject it here.
10693          */
10694         if ((kvm_vcpu_latch_init(vcpu) || vcpu->arch.smi_pending) &&
10695             (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED ||
10696              mp_state->mp_state == KVM_MP_STATE_INIT_RECEIVED))
10697                 goto out;
10698
10699         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
10700                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
10701                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
10702         } else
10703                 vcpu->arch.mp_state = mp_state->mp_state;
10704         kvm_make_request(KVM_REQ_EVENT, vcpu);
10705
10706         ret = 0;
10707 out:
10708         vcpu_put(vcpu);
10709         return ret;
10710 }
10711
10712 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
10713                     int reason, bool has_error_code, u32 error_code)
10714 {
10715         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
10716         int ret;
10717
10718         init_emulate_ctxt(vcpu);
10719
10720         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
10721                                    has_error_code, error_code);
10722         if (ret) {
10723                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
10724                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
10725                 vcpu->run->internal.ndata = 0;
10726                 return 0;
10727         }
10728
10729         kvm_rip_write(vcpu, ctxt->eip);
10730         kvm_set_rflags(vcpu, ctxt->eflags);
10731         return 1;
10732 }
10733 EXPORT_SYMBOL_GPL(kvm_task_switch);
10734
10735 static bool kvm_is_valid_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
10736 {
10737         if ((sregs->efer & EFER_LME) && (sregs->cr0 & X86_CR0_PG)) {
10738                 /*
10739                  * When EFER.LME and CR0.PG are set, the processor is in
10740                  * 64-bit mode (though maybe in a 32-bit code segment).
10741                  * CR4.PAE and EFER.LMA must be set.
10742                  */
10743                 if (!(sregs->cr4 & X86_CR4_PAE) || !(sregs->efer & EFER_LMA))
10744                         return false;
10745                 if (kvm_vcpu_is_illegal_gpa(vcpu, sregs->cr3))
10746                         return false;
10747         } else {
10748                 /*
10749                  * Not in 64-bit mode: EFER.LMA is clear and the code
10750                  * segment cannot be 64-bit.
10751                  */
10752                 if (sregs->efer & EFER_LMA || sregs->cs.l)
10753                         return false;
10754         }
10755
10756         return kvm_is_valid_cr4(vcpu, sregs->cr4);
10757 }
10758
10759 static int __set_sregs_common(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs,
10760                 int *mmu_reset_needed, bool update_pdptrs)
10761 {
10762         struct msr_data apic_base_msr;
10763         int idx;
10764         struct desc_ptr dt;
10765
10766         if (!kvm_is_valid_sregs(vcpu, sregs))
10767                 return -EINVAL;
10768
10769         apic_base_msr.data = sregs->apic_base;
10770         apic_base_msr.host_initiated = true;
10771         if (kvm_set_apic_base(vcpu, &apic_base_msr))
10772                 return -EINVAL;
10773
10774         if (vcpu->arch.guest_state_protected)
10775                 return 0;
10776
10777         dt.size = sregs->idt.limit;
10778         dt.address = sregs->idt.base;
10779         static_call(kvm_x86_set_idt)(vcpu, &dt);
10780         dt.size = sregs->gdt.limit;
10781         dt.address = sregs->gdt.base;
10782         static_call(kvm_x86_set_gdt)(vcpu, &dt);
10783
10784         vcpu->arch.cr2 = sregs->cr2;
10785         *mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
10786         vcpu->arch.cr3 = sregs->cr3;
10787         kvm_register_mark_dirty(vcpu, VCPU_EXREG_CR3);
10788         static_call_cond(kvm_x86_post_set_cr3)(vcpu, sregs->cr3);
10789
10790         kvm_set_cr8(vcpu, sregs->cr8);
10791
10792         *mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
10793         static_call(kvm_x86_set_efer)(vcpu, sregs->efer);
10794
10795         *mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
10796         static_call(kvm_x86_set_cr0)(vcpu, sregs->cr0);
10797         vcpu->arch.cr0 = sregs->cr0;
10798
10799         *mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
10800         static_call(kvm_x86_set_cr4)(vcpu, sregs->cr4);
10801
10802         if (update_pdptrs) {
10803                 idx = srcu_read_lock(&vcpu->kvm->srcu);
10804                 if (is_pae_paging(vcpu)) {
10805                         load_pdptrs(vcpu, kvm_read_cr3(vcpu));
10806                         *mmu_reset_needed = 1;
10807                 }
10808                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
10809         }
10810
10811         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
10812         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
10813         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
10814         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
10815         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
10816         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
10817
10818         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
10819         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
10820
10821         update_cr8_intercept(vcpu);
10822
10823         /* Older userspace won't unhalt the vcpu on reset. */
10824         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
10825             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
10826             !is_protmode(vcpu))
10827                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
10828
10829         return 0;
10830 }
10831
10832 static int __set_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
10833 {
10834         int pending_vec, max_bits;
10835         int mmu_reset_needed = 0;
10836         int ret = __set_sregs_common(vcpu, sregs, &mmu_reset_needed, true);
10837
10838         if (ret)
10839                 return ret;
10840
10841         if (mmu_reset_needed)
10842                 kvm_mmu_reset_context(vcpu);
10843
10844         max_bits = KVM_NR_INTERRUPTS;
10845         pending_vec = find_first_bit(
10846                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
10847
10848         if (pending_vec < max_bits) {
10849                 kvm_queue_interrupt(vcpu, pending_vec, false);
10850                 pr_debug("Set back pending irq %d\n", pending_vec);
10851                 kvm_make_request(KVM_REQ_EVENT, vcpu);
10852         }
10853         return 0;
10854 }
10855
10856 static int __set_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2)
10857 {
10858         int mmu_reset_needed = 0;
10859         bool valid_pdptrs = sregs2->flags & KVM_SREGS2_FLAGS_PDPTRS_VALID;
10860         bool pae = (sregs2->cr0 & X86_CR0_PG) && (sregs2->cr4 & X86_CR4_PAE) &&
10861                 !(sregs2->efer & EFER_LMA);
10862         int i, ret;
10863
10864         if (sregs2->flags & ~KVM_SREGS2_FLAGS_PDPTRS_VALID)
10865                 return -EINVAL;
10866
10867         if (valid_pdptrs && (!pae || vcpu->arch.guest_state_protected))
10868                 return -EINVAL;
10869
10870         ret = __set_sregs_common(vcpu, (struct kvm_sregs *)sregs2,
10871                                  &mmu_reset_needed, !valid_pdptrs);
10872         if (ret)
10873                 return ret;
10874
10875         if (valid_pdptrs) {
10876                 for (i = 0; i < 4 ; i++)
10877                         kvm_pdptr_write(vcpu, i, sregs2->pdptrs[i]);
10878
10879                 kvm_register_mark_dirty(vcpu, VCPU_EXREG_PDPTR);
10880                 mmu_reset_needed = 1;
10881                 vcpu->arch.pdptrs_from_userspace = true;
10882         }
10883         if (mmu_reset_needed)
10884                 kvm_mmu_reset_context(vcpu);
10885         return 0;
10886 }
10887
10888 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
10889                                   struct kvm_sregs *sregs)
10890 {
10891         int ret;
10892
10893         vcpu_load(vcpu);
10894         ret = __set_sregs(vcpu, sregs);
10895         vcpu_put(vcpu);
10896         return ret;
10897 }
10898
10899 static void kvm_arch_vcpu_guestdbg_update_apicv_inhibit(struct kvm *kvm)
10900 {
10901         bool inhibit = false;
10902         struct kvm_vcpu *vcpu;
10903         unsigned long i;
10904
10905         down_write(&kvm->arch.apicv_update_lock);
10906
10907         kvm_for_each_vcpu(i, vcpu, kvm) {
10908                 if (vcpu->guest_debug & KVM_GUESTDBG_BLOCKIRQ) {
10909                         inhibit = true;
10910                         break;
10911                 }
10912         }
10913         __kvm_request_apicv_update(kvm, !inhibit, APICV_INHIBIT_REASON_BLOCKIRQ);
10914         up_write(&kvm->arch.apicv_update_lock);
10915 }
10916
10917 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
10918                                         struct kvm_guest_debug *dbg)
10919 {
10920         unsigned long rflags;
10921         int i, r;
10922
10923         if (vcpu->arch.guest_state_protected)
10924                 return -EINVAL;
10925
10926         vcpu_load(vcpu);
10927
10928         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
10929                 r = -EBUSY;
10930                 if (vcpu->arch.exception.pending)
10931                         goto out;
10932                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
10933                         kvm_queue_exception(vcpu, DB_VECTOR);
10934                 else
10935                         kvm_queue_exception(vcpu, BP_VECTOR);
10936         }
10937
10938         /*
10939          * Read rflags as long as potentially injected trace flags are still
10940          * filtered out.
10941          */
10942         rflags = kvm_get_rflags(vcpu);
10943
10944         vcpu->guest_debug = dbg->control;
10945         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
10946                 vcpu->guest_debug = 0;
10947
10948         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
10949                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
10950                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
10951                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
10952         } else {
10953                 for (i = 0; i < KVM_NR_DB_REGS; i++)
10954                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
10955         }
10956         kvm_update_dr7(vcpu);
10957
10958         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
10959                 vcpu->arch.singlestep_rip = kvm_get_linear_rip(vcpu);
10960
10961         /*
10962          * Trigger an rflags update that will inject or remove the trace
10963          * flags.
10964          */
10965         kvm_set_rflags(vcpu, rflags);
10966
10967         static_call(kvm_x86_update_exception_bitmap)(vcpu);
10968
10969         kvm_arch_vcpu_guestdbg_update_apicv_inhibit(vcpu->kvm);
10970
10971         r = 0;
10972
10973 out:
10974         vcpu_put(vcpu);
10975         return r;
10976 }
10977
10978 /*
10979  * Translate a guest virtual address to a guest physical address.
10980  */
10981 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
10982                                     struct kvm_translation *tr)
10983 {
10984         unsigned long vaddr = tr->linear_address;
10985         gpa_t gpa;
10986         int idx;
10987
10988         vcpu_load(vcpu);
10989
10990         idx = srcu_read_lock(&vcpu->kvm->srcu);
10991         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
10992         srcu_read_unlock(&vcpu->kvm->srcu, idx);
10993         tr->physical_address = gpa;
10994         tr->valid = gpa != UNMAPPED_GVA;
10995         tr->writeable = 1;
10996         tr->usermode = 0;
10997
10998         vcpu_put(vcpu);
10999         return 0;
11000 }
11001
11002 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
11003 {
11004         struct fxregs_state *fxsave;
11005
11006         if (fpstate_is_confidential(&vcpu->arch.guest_fpu))
11007                 return 0;
11008
11009         vcpu_load(vcpu);
11010
11011         fxsave = &vcpu->arch.guest_fpu.fpstate->regs.fxsave;
11012         memcpy(fpu->fpr, fxsave->st_space, 128);
11013         fpu->fcw = fxsave->cwd;
11014         fpu->fsw = fxsave->swd;
11015         fpu->ftwx = fxsave->twd;
11016         fpu->last_opcode = fxsave->fop;
11017         fpu->last_ip = fxsave->rip;
11018         fpu->last_dp = fxsave->rdp;
11019         memcpy(fpu->xmm, fxsave->xmm_space, sizeof(fxsave->xmm_space));
11020
11021         vcpu_put(vcpu);
11022         return 0;
11023 }
11024
11025 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
11026 {
11027         struct fxregs_state *fxsave;
11028
11029         if (fpstate_is_confidential(&vcpu->arch.guest_fpu))
11030                 return 0;
11031
11032         vcpu_load(vcpu);
11033
11034         fxsave = &vcpu->arch.guest_fpu.fpstate->regs.fxsave;
11035
11036         memcpy(fxsave->st_space, fpu->fpr, 128);
11037         fxsave->cwd = fpu->fcw;
11038         fxsave->swd = fpu->fsw;
11039         fxsave->twd = fpu->ftwx;
11040         fxsave->fop = fpu->last_opcode;
11041         fxsave->rip = fpu->last_ip;
11042         fxsave->rdp = fpu->last_dp;
11043         memcpy(fxsave->xmm_space, fpu->xmm, sizeof(fxsave->xmm_space));
11044
11045         vcpu_put(vcpu);
11046         return 0;
11047 }
11048
11049 static void store_regs(struct kvm_vcpu *vcpu)
11050 {
11051         BUILD_BUG_ON(sizeof(struct kvm_sync_regs) > SYNC_REGS_SIZE_BYTES);
11052
11053         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_REGS)
11054                 __get_regs(vcpu, &vcpu->run->s.regs.regs);
11055
11056         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_SREGS)
11057                 __get_sregs(vcpu, &vcpu->run->s.regs.sregs);
11058
11059         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_EVENTS)
11060                 kvm_vcpu_ioctl_x86_get_vcpu_events(
11061                                 vcpu, &vcpu->run->s.regs.events);
11062 }
11063
11064 static int sync_regs(struct kvm_vcpu *vcpu)
11065 {
11066         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_REGS) {
11067                 __set_regs(vcpu, &vcpu->run->s.regs.regs);
11068                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_REGS;
11069         }
11070         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_SREGS) {
11071                 if (__set_sregs(vcpu, &vcpu->run->s.regs.sregs))
11072                         return -EINVAL;
11073                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_SREGS;
11074         }
11075         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_EVENTS) {
11076                 if (kvm_vcpu_ioctl_x86_set_vcpu_events(
11077                                 vcpu, &vcpu->run->s.regs.events))
11078                         return -EINVAL;
11079                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_EVENTS;
11080         }
11081
11082         return 0;
11083 }
11084
11085 int kvm_arch_vcpu_precreate(struct kvm *kvm, unsigned int id)
11086 {
11087         if (kvm_check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
11088                 pr_warn_once("kvm: SMP vm created on host with unstable TSC; "
11089                              "guest TSC will not be reliable\n");
11090
11091         return 0;
11092 }
11093
11094 int kvm_arch_vcpu_create(struct kvm_vcpu *vcpu)
11095 {
11096         struct page *page;
11097         int r;
11098
11099         vcpu->arch.last_vmentry_cpu = -1;
11100         vcpu->arch.regs_avail = ~0;
11101         vcpu->arch.regs_dirty = ~0;
11102
11103         if (!irqchip_in_kernel(vcpu->kvm) || kvm_vcpu_is_reset_bsp(vcpu))
11104                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
11105         else
11106                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
11107
11108         r = kvm_mmu_create(vcpu);
11109         if (r < 0)
11110                 return r;
11111
11112         if (irqchip_in_kernel(vcpu->kvm)) {
11113                 r = kvm_create_lapic(vcpu, lapic_timer_advance_ns);
11114                 if (r < 0)
11115                         goto fail_mmu_destroy;
11116                 if (kvm_apicv_activated(vcpu->kvm))
11117                         vcpu->arch.apicv_active = true;
11118         } else
11119                 static_branch_inc(&kvm_has_noapic_vcpu);
11120
11121         r = -ENOMEM;
11122
11123         page = alloc_page(GFP_KERNEL_ACCOUNT | __GFP_ZERO);
11124         if (!page)
11125                 goto fail_free_lapic;
11126         vcpu->arch.pio_data = page_address(page);
11127
11128         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
11129                                        GFP_KERNEL_ACCOUNT);
11130         if (!vcpu->arch.mce_banks)
11131                 goto fail_free_pio_data;
11132         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
11133
11134         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask,
11135                                 GFP_KERNEL_ACCOUNT))
11136                 goto fail_free_mce_banks;
11137
11138         if (!alloc_emulate_ctxt(vcpu))
11139                 goto free_wbinvd_dirty_mask;
11140
11141         if (!fpu_alloc_guest_fpstate(&vcpu->arch.guest_fpu)) {
11142                 pr_err("kvm: failed to allocate vcpu's fpu\n");
11143                 goto free_emulate_ctxt;
11144         }
11145
11146         vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
11147         vcpu->arch.reserved_gpa_bits = kvm_vcpu_reserved_gpa_bits_raw(vcpu);
11148
11149         vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
11150
11151         kvm_async_pf_hash_reset(vcpu);
11152         kvm_pmu_init(vcpu);
11153
11154         vcpu->arch.pending_external_vector = -1;
11155         vcpu->arch.preempted_in_kernel = false;
11156
11157 #if IS_ENABLED(CONFIG_HYPERV)
11158         vcpu->arch.hv_root_tdp = INVALID_PAGE;
11159 #endif
11160
11161         r = static_call(kvm_x86_vcpu_create)(vcpu);
11162         if (r)
11163                 goto free_guest_fpu;
11164
11165         vcpu->arch.arch_capabilities = kvm_get_arch_capabilities();
11166         vcpu->arch.msr_platform_info = MSR_PLATFORM_INFO_CPUID_FAULT;
11167         kvm_vcpu_mtrr_init(vcpu);
11168         vcpu_load(vcpu);
11169         kvm_set_tsc_khz(vcpu, max_tsc_khz);
11170         kvm_vcpu_reset(vcpu, false);
11171         kvm_init_mmu(vcpu);
11172         vcpu_put(vcpu);
11173         return 0;
11174
11175 free_guest_fpu:
11176         fpu_free_guest_fpstate(&vcpu->arch.guest_fpu);
11177 free_emulate_ctxt:
11178         kmem_cache_free(x86_emulator_cache, vcpu->arch.emulate_ctxt);
11179 free_wbinvd_dirty_mask:
11180         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
11181 fail_free_mce_banks:
11182         kfree(vcpu->arch.mce_banks);
11183 fail_free_pio_data:
11184         free_page((unsigned long)vcpu->arch.pio_data);
11185 fail_free_lapic:
11186         kvm_free_lapic(vcpu);
11187 fail_mmu_destroy:
11188         kvm_mmu_destroy(vcpu);
11189         return r;
11190 }
11191
11192 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
11193 {
11194         struct kvm *kvm = vcpu->kvm;
11195
11196         if (mutex_lock_killable(&vcpu->mutex))
11197                 return;
11198         vcpu_load(vcpu);
11199         kvm_synchronize_tsc(vcpu, 0);
11200         vcpu_put(vcpu);
11201
11202         /* poll control enabled by default */
11203         vcpu->arch.msr_kvm_poll_control = 1;
11204
11205         mutex_unlock(&vcpu->mutex);
11206
11207         if (kvmclock_periodic_sync && vcpu->vcpu_idx == 0)
11208                 schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
11209                                                 KVMCLOCK_SYNC_PERIOD);
11210 }
11211
11212 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
11213 {
11214         int idx;
11215
11216         kvmclock_reset(vcpu);
11217
11218         static_call(kvm_x86_vcpu_free)(vcpu);
11219
11220         kmem_cache_free(x86_emulator_cache, vcpu->arch.emulate_ctxt);
11221         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
11222         fpu_free_guest_fpstate(&vcpu->arch.guest_fpu);
11223
11224         kvm_hv_vcpu_uninit(vcpu);
11225         kvm_pmu_destroy(vcpu);
11226         kfree(vcpu->arch.mce_banks);
11227         kvm_free_lapic(vcpu);
11228         idx = srcu_read_lock(&vcpu->kvm->srcu);
11229         kvm_mmu_destroy(vcpu);
11230         srcu_read_unlock(&vcpu->kvm->srcu, idx);
11231         free_page((unsigned long)vcpu->arch.pio_data);
11232         kvfree(vcpu->arch.cpuid_entries);
11233         if (!lapic_in_kernel(vcpu))
11234                 static_branch_dec(&kvm_has_noapic_vcpu);
11235 }
11236
11237 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
11238 {
11239         struct kvm_cpuid_entry2 *cpuid_0x1;
11240         unsigned long old_cr0 = kvm_read_cr0(vcpu);
11241         unsigned long new_cr0;
11242
11243         /*
11244          * Several of the "set" flows, e.g. ->set_cr0(), read other registers
11245          * to handle side effects.  RESET emulation hits those flows and relies
11246          * on emulated/virtualized registers, including those that are loaded
11247          * into hardware, to be zeroed at vCPU creation.  Use CRs as a sentinel
11248          * to detect improper or missing initialization.
11249          */
11250         WARN_ON_ONCE(!init_event &&
11251                      (old_cr0 || kvm_read_cr3(vcpu) || kvm_read_cr4(vcpu)));
11252
11253         kvm_lapic_reset(vcpu, init_event);
11254
11255         vcpu->arch.hflags = 0;
11256
11257         vcpu->arch.smi_pending = 0;
11258         vcpu->arch.smi_count = 0;
11259         atomic_set(&vcpu->arch.nmi_queued, 0);
11260         vcpu->arch.nmi_pending = 0;
11261         vcpu->arch.nmi_injected = false;
11262         kvm_clear_interrupt_queue(vcpu);
11263         kvm_clear_exception_queue(vcpu);
11264
11265         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
11266         kvm_update_dr0123(vcpu);
11267         vcpu->arch.dr6 = DR6_ACTIVE_LOW;
11268         vcpu->arch.dr7 = DR7_FIXED_1;
11269         kvm_update_dr7(vcpu);
11270
11271         vcpu->arch.cr2 = 0;
11272
11273         kvm_make_request(KVM_REQ_EVENT, vcpu);
11274         vcpu->arch.apf.msr_en_val = 0;
11275         vcpu->arch.apf.msr_int_val = 0;
11276         vcpu->arch.st.msr_val = 0;
11277
11278         kvmclock_reset(vcpu);
11279
11280         kvm_clear_async_pf_completion_queue(vcpu);
11281         kvm_async_pf_hash_reset(vcpu);
11282         vcpu->arch.apf.halted = false;
11283
11284         if (vcpu->arch.guest_fpu.fpstate && kvm_mpx_supported()) {
11285                 struct fpstate *fpstate = vcpu->arch.guest_fpu.fpstate;
11286
11287                 /*
11288                  * To avoid have the INIT path from kvm_apic_has_events() that be
11289                  * called with loaded FPU and does not let userspace fix the state.
11290                  */
11291                 if (init_event)
11292                         kvm_put_guest_fpu(vcpu);
11293
11294                 fpstate_clear_xstate_component(fpstate, XFEATURE_BNDREGS);
11295                 fpstate_clear_xstate_component(fpstate, XFEATURE_BNDCSR);
11296
11297                 if (init_event)
11298                         kvm_load_guest_fpu(vcpu);
11299         }
11300
11301         if (!init_event) {
11302                 kvm_pmu_reset(vcpu);
11303                 vcpu->arch.smbase = 0x30000;
11304
11305                 vcpu->arch.msr_misc_features_enables = 0;
11306
11307                 __kvm_set_xcr(vcpu, 0, XFEATURE_MASK_FP);
11308                 __kvm_set_msr(vcpu, MSR_IA32_XSS, 0, true);
11309         }
11310
11311         /* All GPRs except RDX (handled below) are zeroed on RESET/INIT. */
11312         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
11313         kvm_register_mark_dirty(vcpu, VCPU_REGS_RSP);
11314
11315         /*
11316          * Fall back to KVM's default Family/Model/Stepping of 0x600 (P6/Athlon)
11317          * if no CPUID match is found.  Note, it's impossible to get a match at
11318          * RESET since KVM emulates RESET before exposing the vCPU to userspace,
11319          * i.e. it's impossible for kvm_find_cpuid_entry() to find a valid entry
11320          * on RESET.  But, go through the motions in case that's ever remedied.
11321          */
11322         cpuid_0x1 = kvm_find_cpuid_entry(vcpu, 1, 0);
11323         kvm_rdx_write(vcpu, cpuid_0x1 ? cpuid_0x1->eax : 0x600);
11324
11325         static_call(kvm_x86_vcpu_reset)(vcpu, init_event);
11326
11327         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
11328         kvm_rip_write(vcpu, 0xfff0);
11329
11330         vcpu->arch.cr3 = 0;
11331         kvm_register_mark_dirty(vcpu, VCPU_EXREG_CR3);
11332
11333         /*
11334          * CR0.CD/NW are set on RESET, preserved on INIT.  Note, some versions
11335          * of Intel's SDM list CD/NW as being set on INIT, but they contradict
11336          * (or qualify) that with a footnote stating that CD/NW are preserved.
11337          */
11338         new_cr0 = X86_CR0_ET;
11339         if (init_event)
11340                 new_cr0 |= (old_cr0 & (X86_CR0_NW | X86_CR0_CD));
11341         else
11342                 new_cr0 |= X86_CR0_NW | X86_CR0_CD;
11343
11344         static_call(kvm_x86_set_cr0)(vcpu, new_cr0);
11345         static_call(kvm_x86_set_cr4)(vcpu, 0);
11346         static_call(kvm_x86_set_efer)(vcpu, 0);
11347         static_call(kvm_x86_update_exception_bitmap)(vcpu);
11348
11349         /*
11350          * Reset the MMU context if paging was enabled prior to INIT (which is
11351          * implied if CR0.PG=1 as CR0 will be '0' prior to RESET).  Unlike the
11352          * standard CR0/CR4/EFER modification paths, only CR0.PG needs to be
11353          * checked because it is unconditionally cleared on INIT and all other
11354          * paging related bits are ignored if paging is disabled, i.e. CR0.WP,
11355          * CR4, and EFER changes are all irrelevant if CR0.PG was '0'.
11356          */
11357         if (old_cr0 & X86_CR0_PG)
11358                 kvm_mmu_reset_context(vcpu);
11359
11360         /*
11361          * Intel's SDM states that all TLB entries are flushed on INIT.  AMD's
11362          * APM states the TLBs are untouched by INIT, but it also states that
11363          * the TLBs are flushed on "External initialization of the processor."
11364          * Flush the guest TLB regardless of vendor, there is no meaningful
11365          * benefit in relying on the guest to flush the TLB immediately after
11366          * INIT.  A spurious TLB flush is benign and likely negligible from a
11367          * performance perspective.
11368          */
11369         if (init_event)
11370                 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu);
11371 }
11372 EXPORT_SYMBOL_GPL(kvm_vcpu_reset);
11373
11374 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
11375 {
11376         struct kvm_segment cs;
11377
11378         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
11379         cs.selector = vector << 8;
11380         cs.base = vector << 12;
11381         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
11382         kvm_rip_write(vcpu, 0);
11383 }
11384 EXPORT_SYMBOL_GPL(kvm_vcpu_deliver_sipi_vector);
11385
11386 int kvm_arch_hardware_enable(void)
11387 {
11388         struct kvm *kvm;
11389         struct kvm_vcpu *vcpu;
11390         unsigned long i;
11391         int ret;
11392         u64 local_tsc;
11393         u64 max_tsc = 0;
11394         bool stable, backwards_tsc = false;
11395
11396         kvm_user_return_msr_cpu_online();
11397         ret = static_call(kvm_x86_hardware_enable)();
11398         if (ret != 0)
11399                 return ret;
11400
11401         local_tsc = rdtsc();
11402         stable = !kvm_check_tsc_unstable();
11403         list_for_each_entry(kvm, &vm_list, vm_list) {
11404                 kvm_for_each_vcpu(i, vcpu, kvm) {
11405                         if (!stable && vcpu->cpu == smp_processor_id())
11406                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
11407                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
11408                                 backwards_tsc = true;
11409                                 if (vcpu->arch.last_host_tsc > max_tsc)
11410                                         max_tsc = vcpu->arch.last_host_tsc;
11411                         }
11412                 }
11413         }
11414
11415         /*
11416          * Sometimes, even reliable TSCs go backwards.  This happens on
11417          * platforms that reset TSC during suspend or hibernate actions, but
11418          * maintain synchronization.  We must compensate.  Fortunately, we can
11419          * detect that condition here, which happens early in CPU bringup,
11420          * before any KVM threads can be running.  Unfortunately, we can't
11421          * bring the TSCs fully up to date with real time, as we aren't yet far
11422          * enough into CPU bringup that we know how much real time has actually
11423          * elapsed; our helper function, ktime_get_boottime_ns() will be using boot
11424          * variables that haven't been updated yet.
11425          *
11426          * So we simply find the maximum observed TSC above, then record the
11427          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
11428          * the adjustment will be applied.  Note that we accumulate
11429          * adjustments, in case multiple suspend cycles happen before some VCPU
11430          * gets a chance to run again.  In the event that no KVM threads get a
11431          * chance to run, we will miss the entire elapsed period, as we'll have
11432          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
11433          * loose cycle time.  This isn't too big a deal, since the loss will be
11434          * uniform across all VCPUs (not to mention the scenario is extremely
11435          * unlikely). It is possible that a second hibernate recovery happens
11436          * much faster than a first, causing the observed TSC here to be
11437          * smaller; this would require additional padding adjustment, which is
11438          * why we set last_host_tsc to the local tsc observed here.
11439          *
11440          * N.B. - this code below runs only on platforms with reliable TSC,
11441          * as that is the only way backwards_tsc is set above.  Also note
11442          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
11443          * have the same delta_cyc adjustment applied if backwards_tsc
11444          * is detected.  Note further, this adjustment is only done once,
11445          * as we reset last_host_tsc on all VCPUs to stop this from being
11446          * called multiple times (one for each physical CPU bringup).
11447          *
11448          * Platforms with unreliable TSCs don't have to deal with this, they
11449          * will be compensated by the logic in vcpu_load, which sets the TSC to
11450          * catchup mode.  This will catchup all VCPUs to real time, but cannot
11451          * guarantee that they stay in perfect synchronization.
11452          */
11453         if (backwards_tsc) {
11454                 u64 delta_cyc = max_tsc - local_tsc;
11455                 list_for_each_entry(kvm, &vm_list, vm_list) {
11456                         kvm->arch.backwards_tsc_observed = true;
11457                         kvm_for_each_vcpu(i, vcpu, kvm) {
11458                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
11459                                 vcpu->arch.last_host_tsc = local_tsc;
11460                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
11461                         }
11462
11463                         /*
11464                          * We have to disable TSC offset matching.. if you were
11465                          * booting a VM while issuing an S4 host suspend....
11466                          * you may have some problem.  Solving this issue is
11467                          * left as an exercise to the reader.
11468                          */
11469                         kvm->arch.last_tsc_nsec = 0;
11470                         kvm->arch.last_tsc_write = 0;
11471                 }
11472
11473         }
11474         return 0;
11475 }
11476
11477 void kvm_arch_hardware_disable(void)
11478 {
11479         static_call(kvm_x86_hardware_disable)();
11480         drop_user_return_notifiers();
11481 }
11482
11483 int kvm_arch_hardware_setup(void *opaque)
11484 {
11485         struct kvm_x86_init_ops *ops = opaque;
11486         int r;
11487
11488         rdmsrl_safe(MSR_EFER, &host_efer);
11489
11490         if (boot_cpu_has(X86_FEATURE_XSAVES))
11491                 rdmsrl(MSR_IA32_XSS, host_xss);
11492
11493         r = ops->hardware_setup();
11494         if (r != 0)
11495                 return r;
11496
11497         memcpy(&kvm_x86_ops, ops->runtime_ops, sizeof(kvm_x86_ops));
11498         kvm_ops_static_call_update();
11499
11500         kvm_register_perf_callbacks(ops->handle_intel_pt_intr);
11501
11502         if (!kvm_cpu_cap_has(X86_FEATURE_XSAVES))
11503                 supported_xss = 0;
11504
11505 #define __kvm_cpu_cap_has(UNUSED_, f) kvm_cpu_cap_has(f)
11506         cr4_reserved_bits = __cr4_reserved_bits(__kvm_cpu_cap_has, UNUSED_);
11507 #undef __kvm_cpu_cap_has
11508
11509         if (kvm_has_tsc_control) {
11510                 /*
11511                  * Make sure the user can only configure tsc_khz values that
11512                  * fit into a signed integer.
11513                  * A min value is not calculated because it will always
11514                  * be 1 on all machines.
11515                  */
11516                 u64 max = min(0x7fffffffULL,
11517                               __scale_tsc(kvm_max_tsc_scaling_ratio, tsc_khz));
11518                 kvm_max_guest_tsc_khz = max;
11519
11520                 kvm_default_tsc_scaling_ratio = 1ULL << kvm_tsc_scaling_ratio_frac_bits;
11521         }
11522
11523         kvm_init_msr_list();
11524         return 0;
11525 }
11526
11527 void kvm_arch_hardware_unsetup(void)
11528 {
11529         kvm_unregister_perf_callbacks();
11530
11531         static_call(kvm_x86_hardware_unsetup)();
11532 }
11533
11534 int kvm_arch_check_processor_compat(void *opaque)
11535 {
11536         struct cpuinfo_x86 *c = &cpu_data(smp_processor_id());
11537         struct kvm_x86_init_ops *ops = opaque;
11538
11539         WARN_ON(!irqs_disabled());
11540
11541         if (__cr4_reserved_bits(cpu_has, c) !=
11542             __cr4_reserved_bits(cpu_has, &boot_cpu_data))
11543                 return -EIO;
11544
11545         return ops->check_processor_compatibility();
11546 }
11547
11548 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
11549 {
11550         return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
11551 }
11552 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp);
11553
11554 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
11555 {
11556         return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
11557 }
11558
11559 __read_mostly DEFINE_STATIC_KEY_FALSE(kvm_has_noapic_vcpu);
11560 EXPORT_SYMBOL_GPL(kvm_has_noapic_vcpu);
11561
11562 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
11563 {
11564         struct kvm_pmu *pmu = vcpu_to_pmu(vcpu);
11565
11566         vcpu->arch.l1tf_flush_l1d = true;
11567         if (pmu->version && unlikely(pmu->event_count)) {
11568                 pmu->need_cleanup = true;
11569                 kvm_make_request(KVM_REQ_PMU, vcpu);
11570         }
11571         static_call(kvm_x86_sched_in)(vcpu, cpu);
11572 }
11573
11574 void kvm_arch_free_vm(struct kvm *kvm)
11575 {
11576         kfree(to_kvm_hv(kvm)->hv_pa_pg);
11577         __kvm_arch_free_vm(kvm);
11578 }
11579
11580
11581 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
11582 {
11583         int ret;
11584         unsigned long flags;
11585
11586         if (type)
11587                 return -EINVAL;
11588
11589         ret = kvm_page_track_init(kvm);
11590         if (ret)
11591                 return ret;
11592
11593         INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
11594         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
11595         INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
11596         INIT_LIST_HEAD(&kvm->arch.lpage_disallowed_mmu_pages);
11597         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
11598         atomic_set(&kvm->arch.noncoherent_dma_count, 0);
11599
11600         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
11601         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
11602         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
11603         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
11604                 &kvm->arch.irq_sources_bitmap);
11605
11606         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
11607         mutex_init(&kvm->arch.apic_map_lock);
11608         seqcount_raw_spinlock_init(&kvm->arch.pvclock_sc, &kvm->arch.tsc_write_lock);
11609         kvm->arch.kvmclock_offset = -get_kvmclock_base_ns();
11610
11611         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
11612         pvclock_update_vm_gtod_copy(kvm);
11613         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
11614
11615         kvm->arch.guest_can_read_msr_platform_info = true;
11616
11617 #if IS_ENABLED(CONFIG_HYPERV)
11618         spin_lock_init(&kvm->arch.hv_root_tdp_lock);
11619         kvm->arch.hv_root_tdp = INVALID_PAGE;
11620 #endif
11621
11622         INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
11623         INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
11624
11625         kvm_apicv_init(kvm);
11626         kvm_hv_init_vm(kvm);
11627         kvm_mmu_init_vm(kvm);
11628         kvm_xen_init_vm(kvm);
11629
11630         return static_call(kvm_x86_vm_init)(kvm);
11631 }
11632
11633 int kvm_arch_post_init_vm(struct kvm *kvm)
11634 {
11635         return kvm_mmu_post_init_vm(kvm);
11636 }
11637
11638 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
11639 {
11640         vcpu_load(vcpu);
11641         kvm_mmu_unload(vcpu);
11642         vcpu_put(vcpu);
11643 }
11644
11645 static void kvm_free_vcpus(struct kvm *kvm)
11646 {
11647         unsigned long i;
11648         struct kvm_vcpu *vcpu;
11649
11650         /*
11651          * Unpin any mmu pages first.
11652          */
11653         kvm_for_each_vcpu(i, vcpu, kvm) {
11654                 kvm_clear_async_pf_completion_queue(vcpu);
11655                 kvm_unload_vcpu_mmu(vcpu);
11656         }
11657
11658         kvm_destroy_vcpus(kvm);
11659 }
11660
11661 void kvm_arch_sync_events(struct kvm *kvm)
11662 {
11663         cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
11664         cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
11665         kvm_free_pit(kvm);
11666 }
11667
11668 /**
11669  * __x86_set_memory_region: Setup KVM internal memory slot
11670  *
11671  * @kvm: the kvm pointer to the VM.
11672  * @id: the slot ID to setup.
11673  * @gpa: the GPA to install the slot (unused when @size == 0).
11674  * @size: the size of the slot. Set to zero to uninstall a slot.
11675  *
11676  * This function helps to setup a KVM internal memory slot.  Specify
11677  * @size > 0 to install a new slot, while @size == 0 to uninstall a
11678  * slot.  The return code can be one of the following:
11679  *
11680  *   HVA:           on success (uninstall will return a bogus HVA)
11681  *   -errno:        on error
11682  *
11683  * The caller should always use IS_ERR() to check the return value
11684  * before use.  Note, the KVM internal memory slots are guaranteed to
11685  * remain valid and unchanged until the VM is destroyed, i.e., the
11686  * GPA->HVA translation will not change.  However, the HVA is a user
11687  * address, i.e. its accessibility is not guaranteed, and must be
11688  * accessed via __copy_{to,from}_user().
11689  */
11690 void __user * __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa,
11691                                       u32 size)
11692 {
11693         int i, r;
11694         unsigned long hva, old_npages;
11695         struct kvm_memslots *slots = kvm_memslots(kvm);
11696         struct kvm_memory_slot *slot;
11697
11698         /* Called with kvm->slots_lock held.  */
11699         if (WARN_ON(id >= KVM_MEM_SLOTS_NUM))
11700                 return ERR_PTR_USR(-EINVAL);
11701
11702         slot = id_to_memslot(slots, id);
11703         if (size) {
11704                 if (slot && slot->npages)
11705                         return ERR_PTR_USR(-EEXIST);
11706
11707                 /*
11708                  * MAP_SHARED to prevent internal slot pages from being moved
11709                  * by fork()/COW.
11710                  */
11711                 hva = vm_mmap(NULL, 0, size, PROT_READ | PROT_WRITE,
11712                               MAP_SHARED | MAP_ANONYMOUS, 0);
11713                 if (IS_ERR((void *)hva))
11714                         return (void __user *)hva;
11715         } else {
11716                 if (!slot || !slot->npages)
11717                         return NULL;
11718
11719                 old_npages = slot->npages;
11720                 hva = slot->userspace_addr;
11721         }
11722
11723         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
11724                 struct kvm_userspace_memory_region m;
11725
11726                 m.slot = id | (i << 16);
11727                 m.flags = 0;
11728                 m.guest_phys_addr = gpa;
11729                 m.userspace_addr = hva;
11730                 m.memory_size = size;
11731                 r = __kvm_set_memory_region(kvm, &m);
11732                 if (r < 0)
11733                         return ERR_PTR_USR(r);
11734         }
11735
11736         if (!size)
11737                 vm_munmap(hva, old_npages * PAGE_SIZE);
11738
11739         return (void __user *)hva;
11740 }
11741 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
11742
11743 void kvm_arch_pre_destroy_vm(struct kvm *kvm)
11744 {
11745         kvm_mmu_pre_destroy_vm(kvm);
11746 }
11747
11748 void kvm_arch_destroy_vm(struct kvm *kvm)
11749 {
11750         if (current->mm == kvm->mm) {
11751                 /*
11752                  * Free memory regions allocated on behalf of userspace,
11753                  * unless the the memory map has changed due to process exit
11754                  * or fd copying.
11755                  */
11756                 mutex_lock(&kvm->slots_lock);
11757                 __x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT,
11758                                         0, 0);
11759                 __x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT,
11760                                         0, 0);
11761                 __x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, 0, 0);
11762                 mutex_unlock(&kvm->slots_lock);
11763         }
11764         static_call_cond(kvm_x86_vm_destroy)(kvm);
11765         kvm_free_msr_filter(srcu_dereference_check(kvm->arch.msr_filter, &kvm->srcu, 1));
11766         kvm_pic_destroy(kvm);
11767         kvm_ioapic_destroy(kvm);
11768         kvm_free_vcpus(kvm);
11769         kvfree(rcu_dereference_check(kvm->arch.apic_map, 1));
11770         kfree(srcu_dereference_check(kvm->arch.pmu_event_filter, &kvm->srcu, 1));
11771         kvm_mmu_uninit_vm(kvm);
11772         kvm_page_track_cleanup(kvm);
11773         kvm_xen_destroy_vm(kvm);
11774         kvm_hv_destroy_vm(kvm);
11775 }
11776
11777 static void memslot_rmap_free(struct kvm_memory_slot *slot)
11778 {
11779         int i;
11780
11781         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
11782                 kvfree(slot->arch.rmap[i]);
11783                 slot->arch.rmap[i] = NULL;
11784         }
11785 }
11786
11787 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *slot)
11788 {
11789         int i;
11790
11791         memslot_rmap_free(slot);
11792
11793         for (i = 1; i < KVM_NR_PAGE_SIZES; ++i) {
11794                 kvfree(slot->arch.lpage_info[i - 1]);
11795                 slot->arch.lpage_info[i - 1] = NULL;
11796         }
11797
11798         kvm_page_track_free_memslot(slot);
11799 }
11800
11801 int memslot_rmap_alloc(struct kvm_memory_slot *slot, unsigned long npages)
11802 {
11803         const int sz = sizeof(*slot->arch.rmap[0]);
11804         int i;
11805
11806         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
11807                 int level = i + 1;
11808                 int lpages = __kvm_mmu_slot_lpages(slot, npages, level);
11809
11810                 if (slot->arch.rmap[i])
11811                         continue;
11812
11813                 slot->arch.rmap[i] = kvcalloc(lpages, sz, GFP_KERNEL_ACCOUNT);
11814                 if (!slot->arch.rmap[i]) {
11815                         memslot_rmap_free(slot);
11816                         return -ENOMEM;
11817                 }
11818         }
11819
11820         return 0;
11821 }
11822
11823 static int kvm_alloc_memslot_metadata(struct kvm *kvm,
11824                                       struct kvm_memory_slot *slot)
11825 {
11826         unsigned long npages = slot->npages;
11827         int i, r;
11828
11829         /*
11830          * Clear out the previous array pointers for the KVM_MR_MOVE case.  The
11831          * old arrays will be freed by __kvm_set_memory_region() if installing
11832          * the new memslot is successful.
11833          */
11834         memset(&slot->arch, 0, sizeof(slot->arch));
11835
11836         if (kvm_memslots_have_rmaps(kvm)) {
11837                 r = memslot_rmap_alloc(slot, npages);
11838                 if (r)
11839                         return r;
11840         }
11841
11842         for (i = 1; i < KVM_NR_PAGE_SIZES; ++i) {
11843                 struct kvm_lpage_info *linfo;
11844                 unsigned long ugfn;
11845                 int lpages;
11846                 int level = i + 1;
11847
11848                 lpages = __kvm_mmu_slot_lpages(slot, npages, level);
11849
11850                 linfo = kvcalloc(lpages, sizeof(*linfo), GFP_KERNEL_ACCOUNT);
11851                 if (!linfo)
11852                         goto out_free;
11853
11854                 slot->arch.lpage_info[i - 1] = linfo;
11855
11856                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
11857                         linfo[0].disallow_lpage = 1;
11858                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
11859                         linfo[lpages - 1].disallow_lpage = 1;
11860                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
11861                 /*
11862                  * If the gfn and userspace address are not aligned wrt each
11863                  * other, disable large page support for this slot.
11864                  */
11865                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1)) {
11866                         unsigned long j;
11867
11868                         for (j = 0; j < lpages; ++j)
11869                                 linfo[j].disallow_lpage = 1;
11870                 }
11871         }
11872
11873         if (kvm_page_track_create_memslot(kvm, slot, npages))
11874                 goto out_free;
11875
11876         return 0;
11877
11878 out_free:
11879         memslot_rmap_free(slot);
11880
11881         for (i = 1; i < KVM_NR_PAGE_SIZES; ++i) {
11882                 kvfree(slot->arch.lpage_info[i - 1]);
11883                 slot->arch.lpage_info[i - 1] = NULL;
11884         }
11885         return -ENOMEM;
11886 }
11887
11888 void kvm_arch_memslots_updated(struct kvm *kvm, u64 gen)
11889 {
11890         struct kvm_vcpu *vcpu;
11891         unsigned long i;
11892
11893         /*
11894          * memslots->generation has been incremented.
11895          * mmio generation may have reached its maximum value.
11896          */
11897         kvm_mmu_invalidate_mmio_sptes(kvm, gen);
11898
11899         /* Force re-initialization of steal_time cache */
11900         kvm_for_each_vcpu(i, vcpu, kvm)
11901                 kvm_vcpu_kick(vcpu);
11902 }
11903
11904 int kvm_arch_prepare_memory_region(struct kvm *kvm,
11905                                    const struct kvm_memory_slot *old,
11906                                    struct kvm_memory_slot *new,
11907                                    enum kvm_mr_change change)
11908 {
11909         if (change == KVM_MR_CREATE || change == KVM_MR_MOVE)
11910                 return kvm_alloc_memslot_metadata(kvm, new);
11911
11912         if (change == KVM_MR_FLAGS_ONLY)
11913                 memcpy(&new->arch, &old->arch, sizeof(old->arch));
11914         else if (WARN_ON_ONCE(change != KVM_MR_DELETE))
11915                 return -EIO;
11916
11917         return 0;
11918 }
11919
11920
11921 static void kvm_mmu_update_cpu_dirty_logging(struct kvm *kvm, bool enable)
11922 {
11923         struct kvm_arch *ka = &kvm->arch;
11924
11925         if (!kvm_x86_ops.cpu_dirty_log_size)
11926                 return;
11927
11928         if ((enable && ++ka->cpu_dirty_logging_count == 1) ||
11929             (!enable && --ka->cpu_dirty_logging_count == 0))
11930                 kvm_make_all_cpus_request(kvm, KVM_REQ_UPDATE_CPU_DIRTY_LOGGING);
11931
11932         WARN_ON_ONCE(ka->cpu_dirty_logging_count < 0);
11933 }
11934
11935 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
11936                                      struct kvm_memory_slot *old,
11937                                      const struct kvm_memory_slot *new,
11938                                      enum kvm_mr_change change)
11939 {
11940         u32 old_flags = old ? old->flags : 0;
11941         u32 new_flags = new ? new->flags : 0;
11942         bool log_dirty_pages = new_flags & KVM_MEM_LOG_DIRTY_PAGES;
11943
11944         /*
11945          * Update CPU dirty logging if dirty logging is being toggled.  This
11946          * applies to all operations.
11947          */
11948         if ((old_flags ^ new_flags) & KVM_MEM_LOG_DIRTY_PAGES)
11949                 kvm_mmu_update_cpu_dirty_logging(kvm, log_dirty_pages);
11950
11951         /*
11952          * Nothing more to do for RO slots (which can't be dirtied and can't be
11953          * made writable) or CREATE/MOVE/DELETE of a slot.
11954          *
11955          * For a memslot with dirty logging disabled:
11956          * CREATE:      No dirty mappings will already exist.
11957          * MOVE/DELETE: The old mappings will already have been cleaned up by
11958          *              kvm_arch_flush_shadow_memslot()
11959          *
11960          * For a memslot with dirty logging enabled:
11961          * CREATE:      No shadow pages exist, thus nothing to write-protect
11962          *              and no dirty bits to clear.
11963          * MOVE/DELETE: The old mappings will already have been cleaned up by
11964          *              kvm_arch_flush_shadow_memslot().
11965          */
11966         if ((change != KVM_MR_FLAGS_ONLY) || (new_flags & KVM_MEM_READONLY))
11967                 return;
11968
11969         /*
11970          * READONLY and non-flags changes were filtered out above, and the only
11971          * other flag is LOG_DIRTY_PAGES, i.e. something is wrong if dirty
11972          * logging isn't being toggled on or off.
11973          */
11974         if (WARN_ON_ONCE(!((old_flags ^ new_flags) & KVM_MEM_LOG_DIRTY_PAGES)))
11975                 return;
11976
11977         if (!log_dirty_pages) {
11978                 /*
11979                  * Dirty logging tracks sptes in 4k granularity, meaning that
11980                  * large sptes have to be split.  If live migration succeeds,
11981                  * the guest in the source machine will be destroyed and large
11982                  * sptes will be created in the destination.  However, if the
11983                  * guest continues to run in the source machine (for example if
11984                  * live migration fails), small sptes will remain around and
11985                  * cause bad performance.
11986                  *
11987                  * Scan sptes if dirty logging has been stopped, dropping those
11988                  * which can be collapsed into a single large-page spte.  Later
11989                  * page faults will create the large-page sptes.
11990                  */
11991                 kvm_mmu_zap_collapsible_sptes(kvm, new);
11992         } else {
11993                 /*
11994                  * Initially-all-set does not require write protecting any page,
11995                  * because they're all assumed to be dirty.
11996                  */
11997                 if (kvm_dirty_log_manual_protect_and_init_set(kvm))
11998                         return;
11999
12000                 if (kvm_x86_ops.cpu_dirty_log_size) {
12001                         kvm_mmu_slot_leaf_clear_dirty(kvm, new);
12002                         kvm_mmu_slot_remove_write_access(kvm, new, PG_LEVEL_2M);
12003                 } else {
12004                         kvm_mmu_slot_remove_write_access(kvm, new, PG_LEVEL_4K);
12005                 }
12006         }
12007 }
12008
12009 void kvm_arch_commit_memory_region(struct kvm *kvm,
12010                                 struct kvm_memory_slot *old,
12011                                 const struct kvm_memory_slot *new,
12012                                 enum kvm_mr_change change)
12013 {
12014         if (!kvm->arch.n_requested_mmu_pages &&
12015             (change == KVM_MR_CREATE || change == KVM_MR_DELETE)) {
12016                 unsigned long nr_mmu_pages;
12017
12018                 nr_mmu_pages = kvm->nr_memslot_pages / KVM_MEMSLOT_PAGES_TO_MMU_PAGES_RATIO;
12019                 nr_mmu_pages = max(nr_mmu_pages, KVM_MIN_ALLOC_MMU_PAGES);
12020                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
12021         }
12022
12023         kvm_mmu_slot_apply_flags(kvm, old, new, change);
12024
12025         /* Free the arrays associated with the old memslot. */
12026         if (change == KVM_MR_MOVE)
12027                 kvm_arch_free_memslot(kvm, old);
12028 }
12029
12030 void kvm_arch_flush_shadow_all(struct kvm *kvm)
12031 {
12032         kvm_mmu_zap_all(kvm);
12033 }
12034
12035 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
12036                                    struct kvm_memory_slot *slot)
12037 {
12038         kvm_page_track_flush_slot(kvm, slot);
12039 }
12040
12041 static inline bool kvm_guest_apic_has_interrupt(struct kvm_vcpu *vcpu)
12042 {
12043         return (is_guest_mode(vcpu) &&
12044                         kvm_x86_ops.guest_apic_has_interrupt &&
12045                         static_call(kvm_x86_guest_apic_has_interrupt)(vcpu));
12046 }
12047
12048 static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
12049 {
12050         if (!list_empty_careful(&vcpu->async_pf.done))
12051                 return true;
12052
12053         if (kvm_apic_has_events(vcpu))
12054                 return true;
12055
12056         if (vcpu->arch.pv.pv_unhalted)
12057                 return true;
12058
12059         if (vcpu->arch.exception.pending)
12060                 return true;
12061
12062         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
12063             (vcpu->arch.nmi_pending &&
12064              static_call(kvm_x86_nmi_allowed)(vcpu, false)))
12065                 return true;
12066
12067         if (kvm_test_request(KVM_REQ_SMI, vcpu) ||
12068             (vcpu->arch.smi_pending &&
12069              static_call(kvm_x86_smi_allowed)(vcpu, false)))
12070                 return true;
12071
12072         if (kvm_arch_interrupt_allowed(vcpu) &&
12073             (kvm_cpu_has_interrupt(vcpu) ||
12074             kvm_guest_apic_has_interrupt(vcpu)))
12075                 return true;
12076
12077         if (kvm_hv_has_stimer_pending(vcpu))
12078                 return true;
12079
12080         if (is_guest_mode(vcpu) &&
12081             kvm_x86_ops.nested_ops->hv_timer_pending &&
12082             kvm_x86_ops.nested_ops->hv_timer_pending(vcpu))
12083                 return true;
12084
12085         return false;
12086 }
12087
12088 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
12089 {
12090         return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu);
12091 }
12092
12093 bool kvm_arch_dy_has_pending_interrupt(struct kvm_vcpu *vcpu)
12094 {
12095         if (vcpu->arch.apicv_active && static_call(kvm_x86_dy_apicv_has_pending_interrupt)(vcpu))
12096                 return true;
12097
12098         return false;
12099 }
12100
12101 bool kvm_arch_dy_runnable(struct kvm_vcpu *vcpu)
12102 {
12103         if (READ_ONCE(vcpu->arch.pv.pv_unhalted))
12104                 return true;
12105
12106         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
12107                 kvm_test_request(KVM_REQ_SMI, vcpu) ||
12108                  kvm_test_request(KVM_REQ_EVENT, vcpu))
12109                 return true;
12110
12111         return kvm_arch_dy_has_pending_interrupt(vcpu);
12112 }
12113
12114 bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu *vcpu)
12115 {
12116         if (vcpu->arch.guest_state_protected)
12117                 return true;
12118
12119         return vcpu->arch.preempted_in_kernel;
12120 }
12121
12122 unsigned long kvm_arch_vcpu_get_ip(struct kvm_vcpu *vcpu)
12123 {
12124         return kvm_rip_read(vcpu);
12125 }
12126
12127 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
12128 {
12129         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
12130 }
12131
12132 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
12133 {
12134         return static_call(kvm_x86_interrupt_allowed)(vcpu, false);
12135 }
12136
12137 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
12138 {
12139         /* Can't read the RIP when guest state is protected, just return 0 */
12140         if (vcpu->arch.guest_state_protected)
12141                 return 0;
12142
12143         if (is_64_bit_mode(vcpu))
12144                 return kvm_rip_read(vcpu);
12145         return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
12146                      kvm_rip_read(vcpu));
12147 }
12148 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
12149
12150 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
12151 {
12152         return kvm_get_linear_rip(vcpu) == linear_rip;
12153 }
12154 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
12155
12156 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
12157 {
12158         unsigned long rflags;
12159
12160         rflags = static_call(kvm_x86_get_rflags)(vcpu);
12161         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
12162                 rflags &= ~X86_EFLAGS_TF;
12163         return rflags;
12164 }
12165 EXPORT_SYMBOL_GPL(kvm_get_rflags);
12166
12167 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
12168 {
12169         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
12170             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
12171                 rflags |= X86_EFLAGS_TF;
12172         static_call(kvm_x86_set_rflags)(vcpu, rflags);
12173 }
12174
12175 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
12176 {
12177         __kvm_set_rflags(vcpu, rflags);
12178         kvm_make_request(KVM_REQ_EVENT, vcpu);
12179 }
12180 EXPORT_SYMBOL_GPL(kvm_set_rflags);
12181
12182 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
12183 {
12184         int r;
12185
12186         if ((vcpu->arch.mmu->direct_map != work->arch.direct_map) ||
12187               work->wakeup_all)
12188                 return;
12189
12190         r = kvm_mmu_reload(vcpu);
12191         if (unlikely(r))
12192                 return;
12193
12194         if (!vcpu->arch.mmu->direct_map &&
12195               work->arch.cr3 != vcpu->arch.mmu->get_guest_pgd(vcpu))
12196                 return;
12197
12198         kvm_mmu_do_page_fault(vcpu, work->cr2_or_gpa, 0, true);
12199 }
12200
12201 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
12202 {
12203         BUILD_BUG_ON(!is_power_of_2(ASYNC_PF_PER_VCPU));
12204
12205         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
12206 }
12207
12208 static inline u32 kvm_async_pf_next_probe(u32 key)
12209 {
12210         return (key + 1) & (ASYNC_PF_PER_VCPU - 1);
12211 }
12212
12213 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
12214 {
12215         u32 key = kvm_async_pf_hash_fn(gfn);
12216
12217         while (vcpu->arch.apf.gfns[key] != ~0)
12218                 key = kvm_async_pf_next_probe(key);
12219
12220         vcpu->arch.apf.gfns[key] = gfn;
12221 }
12222
12223 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
12224 {
12225         int i;
12226         u32 key = kvm_async_pf_hash_fn(gfn);
12227
12228         for (i = 0; i < ASYNC_PF_PER_VCPU &&
12229                      (vcpu->arch.apf.gfns[key] != gfn &&
12230                       vcpu->arch.apf.gfns[key] != ~0); i++)
12231                 key = kvm_async_pf_next_probe(key);
12232
12233         return key;
12234 }
12235
12236 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
12237 {
12238         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
12239 }
12240
12241 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
12242 {
12243         u32 i, j, k;
12244
12245         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
12246
12247         if (WARN_ON_ONCE(vcpu->arch.apf.gfns[i] != gfn))
12248                 return;
12249
12250         while (true) {
12251                 vcpu->arch.apf.gfns[i] = ~0;
12252                 do {
12253                         j = kvm_async_pf_next_probe(j);
12254                         if (vcpu->arch.apf.gfns[j] == ~0)
12255                                 return;
12256                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
12257                         /*
12258                          * k lies cyclically in ]i,j]
12259                          * |    i.k.j |
12260                          * |....j i.k.| or  |.k..j i...|
12261                          */
12262                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
12263                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
12264                 i = j;
12265         }
12266 }
12267
12268 static inline int apf_put_user_notpresent(struct kvm_vcpu *vcpu)
12269 {
12270         u32 reason = KVM_PV_REASON_PAGE_NOT_PRESENT;
12271
12272         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &reason,
12273                                       sizeof(reason));
12274 }
12275
12276 static inline int apf_put_user_ready(struct kvm_vcpu *vcpu, u32 token)
12277 {
12278         unsigned int offset = offsetof(struct kvm_vcpu_pv_apf_data, token);
12279
12280         return kvm_write_guest_offset_cached(vcpu->kvm, &vcpu->arch.apf.data,
12281                                              &token, offset, sizeof(token));
12282 }
12283
12284 static inline bool apf_pageready_slot_free(struct kvm_vcpu *vcpu)
12285 {
12286         unsigned int offset = offsetof(struct kvm_vcpu_pv_apf_data, token);
12287         u32 val;
12288
12289         if (kvm_read_guest_offset_cached(vcpu->kvm, &vcpu->arch.apf.data,
12290                                          &val, offset, sizeof(val)))
12291                 return false;
12292
12293         return !val;
12294 }
12295
12296 static bool kvm_can_deliver_async_pf(struct kvm_vcpu *vcpu)
12297 {
12298         if (!vcpu->arch.apf.delivery_as_pf_vmexit && is_guest_mode(vcpu))
12299                 return false;
12300
12301         if (!kvm_pv_async_pf_enabled(vcpu) ||
12302             (vcpu->arch.apf.send_user_only && static_call(kvm_x86_get_cpl)(vcpu) == 0))
12303                 return false;
12304
12305         return true;
12306 }
12307
12308 bool kvm_can_do_async_pf(struct kvm_vcpu *vcpu)
12309 {
12310         if (unlikely(!lapic_in_kernel(vcpu) ||
12311                      kvm_event_needs_reinjection(vcpu) ||
12312                      vcpu->arch.exception.pending))
12313                 return false;
12314
12315         if (kvm_hlt_in_guest(vcpu->kvm) && !kvm_can_deliver_async_pf(vcpu))
12316                 return false;
12317
12318         /*
12319          * If interrupts are off we cannot even use an artificial
12320          * halt state.
12321          */
12322         return kvm_arch_interrupt_allowed(vcpu);
12323 }
12324
12325 bool kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
12326                                      struct kvm_async_pf *work)
12327 {
12328         struct x86_exception fault;
12329
12330         trace_kvm_async_pf_not_present(work->arch.token, work->cr2_or_gpa);
12331         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
12332
12333         if (kvm_can_deliver_async_pf(vcpu) &&
12334             !apf_put_user_notpresent(vcpu)) {
12335                 fault.vector = PF_VECTOR;
12336                 fault.error_code_valid = true;
12337                 fault.error_code = 0;
12338                 fault.nested_page_fault = false;
12339                 fault.address = work->arch.token;
12340                 fault.async_page_fault = true;
12341                 kvm_inject_page_fault(vcpu, &fault);
12342                 return true;
12343         } else {
12344                 /*
12345                  * It is not possible to deliver a paravirtualized asynchronous
12346                  * page fault, but putting the guest in an artificial halt state
12347                  * can be beneficial nevertheless: if an interrupt arrives, we
12348                  * can deliver it timely and perhaps the guest will schedule
12349                  * another process.  When the instruction that triggered a page
12350                  * fault is retried, hopefully the page will be ready in the host.
12351                  */
12352                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
12353                 return false;
12354         }
12355 }
12356
12357 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
12358                                  struct kvm_async_pf *work)
12359 {
12360         struct kvm_lapic_irq irq = {
12361                 .delivery_mode = APIC_DM_FIXED,
12362                 .vector = vcpu->arch.apf.vec
12363         };
12364
12365         if (work->wakeup_all)
12366                 work->arch.token = ~0; /* broadcast wakeup */
12367         else
12368                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
12369         trace_kvm_async_pf_ready(work->arch.token, work->cr2_or_gpa);
12370
12371         if ((work->wakeup_all || work->notpresent_injected) &&
12372             kvm_pv_async_pf_enabled(vcpu) &&
12373             !apf_put_user_ready(vcpu, work->arch.token)) {
12374                 vcpu->arch.apf.pageready_pending = true;
12375                 kvm_apic_set_irq(vcpu, &irq, NULL);
12376         }
12377
12378         vcpu->arch.apf.halted = false;
12379         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
12380 }
12381
12382 void kvm_arch_async_page_present_queued(struct kvm_vcpu *vcpu)
12383 {
12384         kvm_make_request(KVM_REQ_APF_READY, vcpu);
12385         if (!vcpu->arch.apf.pageready_pending)
12386                 kvm_vcpu_kick(vcpu);
12387 }
12388
12389 bool kvm_arch_can_dequeue_async_page_present(struct kvm_vcpu *vcpu)
12390 {
12391         if (!kvm_pv_async_pf_enabled(vcpu))
12392                 return true;
12393         else
12394                 return kvm_lapic_enabled(vcpu) && apf_pageready_slot_free(vcpu);
12395 }
12396
12397 void kvm_arch_start_assignment(struct kvm *kvm)
12398 {
12399         if (atomic_inc_return(&kvm->arch.assigned_device_count) == 1)
12400                 static_call_cond(kvm_x86_start_assignment)(kvm);
12401 }
12402 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
12403
12404 void kvm_arch_end_assignment(struct kvm *kvm)
12405 {
12406         atomic_dec(&kvm->arch.assigned_device_count);
12407 }
12408 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
12409
12410 bool kvm_arch_has_assigned_device(struct kvm *kvm)
12411 {
12412         return atomic_read(&kvm->arch.assigned_device_count);
12413 }
12414 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
12415
12416 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
12417 {
12418         atomic_inc(&kvm->arch.noncoherent_dma_count);
12419 }
12420 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
12421
12422 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
12423 {
12424         atomic_dec(&kvm->arch.noncoherent_dma_count);
12425 }
12426 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
12427
12428 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
12429 {
12430         return atomic_read(&kvm->arch.noncoherent_dma_count);
12431 }
12432 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
12433
12434 bool kvm_arch_has_irq_bypass(void)
12435 {
12436         return true;
12437 }
12438
12439 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
12440                                       struct irq_bypass_producer *prod)
12441 {
12442         struct kvm_kernel_irqfd *irqfd =
12443                 container_of(cons, struct kvm_kernel_irqfd, consumer);
12444         int ret;
12445
12446         irqfd->producer = prod;
12447         kvm_arch_start_assignment(irqfd->kvm);
12448         ret = static_call(kvm_x86_update_pi_irte)(irqfd->kvm,
12449                                          prod->irq, irqfd->gsi, 1);
12450
12451         if (ret)
12452                 kvm_arch_end_assignment(irqfd->kvm);
12453
12454         return ret;
12455 }
12456
12457 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
12458                                       struct irq_bypass_producer *prod)
12459 {
12460         int ret;
12461         struct kvm_kernel_irqfd *irqfd =
12462                 container_of(cons, struct kvm_kernel_irqfd, consumer);
12463
12464         WARN_ON(irqfd->producer != prod);
12465         irqfd->producer = NULL;
12466
12467         /*
12468          * When producer of consumer is unregistered, we change back to
12469          * remapped mode, so we can re-use the current implementation
12470          * when the irq is masked/disabled or the consumer side (KVM
12471          * int this case doesn't want to receive the interrupts.
12472         */
12473         ret = static_call(kvm_x86_update_pi_irte)(irqfd->kvm, prod->irq, irqfd->gsi, 0);
12474         if (ret)
12475                 printk(KERN_INFO "irq bypass consumer (token %p) unregistration"
12476                        " fails: %d\n", irqfd->consumer.token, ret);
12477
12478         kvm_arch_end_assignment(irqfd->kvm);
12479 }
12480
12481 int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
12482                                    uint32_t guest_irq, bool set)
12483 {
12484         return static_call(kvm_x86_update_pi_irte)(kvm, host_irq, guest_irq, set);
12485 }
12486
12487 bool kvm_arch_irqfd_route_changed(struct kvm_kernel_irq_routing_entry *old,
12488                                   struct kvm_kernel_irq_routing_entry *new)
12489 {
12490         if (new->type != KVM_IRQ_ROUTING_MSI)
12491                 return true;
12492
12493         return !!memcmp(&old->msi, &new->msi, sizeof(new->msi));
12494 }
12495
12496 bool kvm_vector_hashing_enabled(void)
12497 {
12498         return vector_hashing;
12499 }
12500
12501 bool kvm_arch_no_poll(struct kvm_vcpu *vcpu)
12502 {
12503         return (vcpu->arch.msr_kvm_poll_control & 1) == 0;
12504 }
12505 EXPORT_SYMBOL_GPL(kvm_arch_no_poll);
12506
12507
12508 int kvm_spec_ctrl_test_value(u64 value)
12509 {
12510         /*
12511          * test that setting IA32_SPEC_CTRL to given value
12512          * is allowed by the host processor
12513          */
12514
12515         u64 saved_value;
12516         unsigned long flags;
12517         int ret = 0;
12518
12519         local_irq_save(flags);
12520
12521         if (rdmsrl_safe(MSR_IA32_SPEC_CTRL, &saved_value))
12522                 ret = 1;
12523         else if (wrmsrl_safe(MSR_IA32_SPEC_CTRL, value))
12524                 ret = 1;
12525         else
12526                 wrmsrl(MSR_IA32_SPEC_CTRL, saved_value);
12527
12528         local_irq_restore(flags);
12529
12530         return ret;
12531 }
12532 EXPORT_SYMBOL_GPL(kvm_spec_ctrl_test_value);
12533
12534 void kvm_fixup_and_inject_pf_error(struct kvm_vcpu *vcpu, gva_t gva, u16 error_code)
12535 {
12536         struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
12537         struct x86_exception fault;
12538         u32 access = error_code &
12539                 (PFERR_WRITE_MASK | PFERR_FETCH_MASK | PFERR_USER_MASK);
12540
12541         if (!(error_code & PFERR_PRESENT_MASK) ||
12542             mmu->gva_to_gpa(vcpu, mmu, gva, access, &fault) != UNMAPPED_GVA) {
12543                 /*
12544                  * If vcpu->arch.walk_mmu->gva_to_gpa succeeded, the page
12545                  * tables probably do not match the TLB.  Just proceed
12546                  * with the error code that the processor gave.
12547                  */
12548                 fault.vector = PF_VECTOR;
12549                 fault.error_code_valid = true;
12550                 fault.error_code = error_code;
12551                 fault.nested_page_fault = false;
12552                 fault.address = gva;
12553         }
12554         vcpu->arch.walk_mmu->inject_page_fault(vcpu, &fault);
12555 }
12556 EXPORT_SYMBOL_GPL(kvm_fixup_and_inject_pf_error);
12557
12558 /*
12559  * Handles kvm_read/write_guest_virt*() result and either injects #PF or returns
12560  * KVM_EXIT_INTERNAL_ERROR for cases not currently handled by KVM. Return value
12561  * indicates whether exit to userspace is needed.
12562  */
12563 int kvm_handle_memory_failure(struct kvm_vcpu *vcpu, int r,
12564                               struct x86_exception *e)
12565 {
12566         if (r == X86EMUL_PROPAGATE_FAULT) {
12567                 kvm_inject_emulated_page_fault(vcpu, e);
12568                 return 1;
12569         }
12570
12571         /*
12572          * In case kvm_read/write_guest_virt*() failed with X86EMUL_IO_NEEDED
12573          * while handling a VMX instruction KVM could've handled the request
12574          * correctly by exiting to userspace and performing I/O but there
12575          * doesn't seem to be a real use-case behind such requests, just return
12576          * KVM_EXIT_INTERNAL_ERROR for now.
12577          */
12578         kvm_prepare_emulation_failure_exit(vcpu);
12579
12580         return 0;
12581 }
12582 EXPORT_SYMBOL_GPL(kvm_handle_memory_failure);
12583
12584 int kvm_handle_invpcid(struct kvm_vcpu *vcpu, unsigned long type, gva_t gva)
12585 {
12586         bool pcid_enabled;
12587         struct x86_exception e;
12588         struct {
12589                 u64 pcid;
12590                 u64 gla;
12591         } operand;
12592         int r;
12593
12594         r = kvm_read_guest_virt(vcpu, gva, &operand, sizeof(operand), &e);
12595         if (r != X86EMUL_CONTINUE)
12596                 return kvm_handle_memory_failure(vcpu, r, &e);
12597
12598         if (operand.pcid >> 12 != 0) {
12599                 kvm_inject_gp(vcpu, 0);
12600                 return 1;
12601         }
12602
12603         pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
12604
12605         switch (type) {
12606         case INVPCID_TYPE_INDIV_ADDR:
12607                 if ((!pcid_enabled && (operand.pcid != 0)) ||
12608                     is_noncanonical_address(operand.gla, vcpu)) {
12609                         kvm_inject_gp(vcpu, 0);
12610                         return 1;
12611                 }
12612                 kvm_mmu_invpcid_gva(vcpu, operand.gla, operand.pcid);
12613                 return kvm_skip_emulated_instruction(vcpu);
12614
12615         case INVPCID_TYPE_SINGLE_CTXT:
12616                 if (!pcid_enabled && (operand.pcid != 0)) {
12617                         kvm_inject_gp(vcpu, 0);
12618                         return 1;
12619                 }
12620
12621                 kvm_invalidate_pcid(vcpu, operand.pcid);
12622                 return kvm_skip_emulated_instruction(vcpu);
12623
12624         case INVPCID_TYPE_ALL_NON_GLOBAL:
12625                 /*
12626                  * Currently, KVM doesn't mark global entries in the shadow
12627                  * page tables, so a non-global flush just degenerates to a
12628                  * global flush. If needed, we could optimize this later by
12629                  * keeping track of global entries in shadow page tables.
12630                  */
12631
12632                 fallthrough;
12633         case INVPCID_TYPE_ALL_INCL_GLOBAL:
12634                 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu);
12635                 return kvm_skip_emulated_instruction(vcpu);
12636
12637         default:
12638                 kvm_inject_gp(vcpu, 0);
12639                 return 1;
12640         }
12641 }
12642 EXPORT_SYMBOL_GPL(kvm_handle_invpcid);
12643
12644 static int complete_sev_es_emulated_mmio(struct kvm_vcpu *vcpu)
12645 {
12646         struct kvm_run *run = vcpu->run;
12647         struct kvm_mmio_fragment *frag;
12648         unsigned int len;
12649
12650         BUG_ON(!vcpu->mmio_needed);
12651
12652         /* Complete previous fragment */
12653         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
12654         len = min(8u, frag->len);
12655         if (!vcpu->mmio_is_write)
12656                 memcpy(frag->data, run->mmio.data, len);
12657
12658         if (frag->len <= 8) {
12659                 /* Switch to the next fragment. */
12660                 frag++;
12661                 vcpu->mmio_cur_fragment++;
12662         } else {
12663                 /* Go forward to the next mmio piece. */
12664                 frag->data += len;
12665                 frag->gpa += len;
12666                 frag->len -= len;
12667         }
12668
12669         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
12670                 vcpu->mmio_needed = 0;
12671
12672                 // VMG change, at this point, we're always done
12673                 // RIP has already been advanced
12674                 return 1;
12675         }
12676
12677         // More MMIO is needed
12678         run->mmio.phys_addr = frag->gpa;
12679         run->mmio.len = min(8u, frag->len);
12680         run->mmio.is_write = vcpu->mmio_is_write;
12681         if (run->mmio.is_write)
12682                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
12683         run->exit_reason = KVM_EXIT_MMIO;
12684
12685         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
12686
12687         return 0;
12688 }
12689
12690 int kvm_sev_es_mmio_write(struct kvm_vcpu *vcpu, gpa_t gpa, unsigned int bytes,
12691                           void *data)
12692 {
12693         int handled;
12694         struct kvm_mmio_fragment *frag;
12695
12696         if (!data)
12697                 return -EINVAL;
12698
12699         handled = write_emultor.read_write_mmio(vcpu, gpa, bytes, data);
12700         if (handled == bytes)
12701                 return 1;
12702
12703         bytes -= handled;
12704         gpa += handled;
12705         data += handled;
12706
12707         /*TODO: Check if need to increment number of frags */
12708         frag = vcpu->mmio_fragments;
12709         vcpu->mmio_nr_fragments = 1;
12710         frag->len = bytes;
12711         frag->gpa = gpa;
12712         frag->data = data;
12713
12714         vcpu->mmio_needed = 1;
12715         vcpu->mmio_cur_fragment = 0;
12716
12717         vcpu->run->mmio.phys_addr = gpa;
12718         vcpu->run->mmio.len = min(8u, frag->len);
12719         vcpu->run->mmio.is_write = 1;
12720         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
12721         vcpu->run->exit_reason = KVM_EXIT_MMIO;
12722
12723         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
12724
12725         return 0;
12726 }
12727 EXPORT_SYMBOL_GPL(kvm_sev_es_mmio_write);
12728
12729 int kvm_sev_es_mmio_read(struct kvm_vcpu *vcpu, gpa_t gpa, unsigned int bytes,
12730                          void *data)
12731 {
12732         int handled;
12733         struct kvm_mmio_fragment *frag;
12734
12735         if (!data)
12736                 return -EINVAL;
12737
12738         handled = read_emultor.read_write_mmio(vcpu, gpa, bytes, data);
12739         if (handled == bytes)
12740                 return 1;
12741
12742         bytes -= handled;
12743         gpa += handled;
12744         data += handled;
12745
12746         /*TODO: Check if need to increment number of frags */
12747         frag = vcpu->mmio_fragments;
12748         vcpu->mmio_nr_fragments = 1;
12749         frag->len = bytes;
12750         frag->gpa = gpa;
12751         frag->data = data;
12752
12753         vcpu->mmio_needed = 1;
12754         vcpu->mmio_cur_fragment = 0;
12755
12756         vcpu->run->mmio.phys_addr = gpa;
12757         vcpu->run->mmio.len = min(8u, frag->len);
12758         vcpu->run->mmio.is_write = 0;
12759         vcpu->run->exit_reason = KVM_EXIT_MMIO;
12760
12761         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
12762
12763         return 0;
12764 }
12765 EXPORT_SYMBOL_GPL(kvm_sev_es_mmio_read);
12766
12767 static int kvm_sev_es_outs(struct kvm_vcpu *vcpu, unsigned int size,
12768                            unsigned int port);
12769
12770 static int complete_sev_es_emulated_outs(struct kvm_vcpu *vcpu)
12771 {
12772         int size = vcpu->arch.pio.size;
12773         int port = vcpu->arch.pio.port;
12774
12775         vcpu->arch.pio.count = 0;
12776         if (vcpu->arch.sev_pio_count)
12777                 return kvm_sev_es_outs(vcpu, size, port);
12778         return 1;
12779 }
12780
12781 static int kvm_sev_es_outs(struct kvm_vcpu *vcpu, unsigned int size,
12782                            unsigned int port)
12783 {
12784         for (;;) {
12785                 unsigned int count =
12786                         min_t(unsigned int, PAGE_SIZE / size, vcpu->arch.sev_pio_count);
12787                 int ret = emulator_pio_out(vcpu, size, port, vcpu->arch.sev_pio_data, count);
12788
12789                 /* memcpy done already by emulator_pio_out.  */
12790                 vcpu->arch.sev_pio_count -= count;
12791                 vcpu->arch.sev_pio_data += count * vcpu->arch.pio.size;
12792                 if (!ret)
12793                         break;
12794
12795                 /* Emulation done by the kernel.  */
12796                 if (!vcpu->arch.sev_pio_count)
12797                         return 1;
12798         }
12799
12800         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_outs;
12801         return 0;
12802 }
12803
12804 static int kvm_sev_es_ins(struct kvm_vcpu *vcpu, unsigned int size,
12805                           unsigned int port);
12806
12807 static void advance_sev_es_emulated_ins(struct kvm_vcpu *vcpu)
12808 {
12809         unsigned count = vcpu->arch.pio.count;
12810         complete_emulator_pio_in(vcpu, vcpu->arch.sev_pio_data);
12811         vcpu->arch.sev_pio_count -= count;
12812         vcpu->arch.sev_pio_data += count * vcpu->arch.pio.size;
12813 }
12814
12815 static int complete_sev_es_emulated_ins(struct kvm_vcpu *vcpu)
12816 {
12817         int size = vcpu->arch.pio.size;
12818         int port = vcpu->arch.pio.port;
12819
12820         advance_sev_es_emulated_ins(vcpu);
12821         if (vcpu->arch.sev_pio_count)
12822                 return kvm_sev_es_ins(vcpu, size, port);
12823         return 1;
12824 }
12825
12826 static int kvm_sev_es_ins(struct kvm_vcpu *vcpu, unsigned int size,
12827                           unsigned int port)
12828 {
12829         for (;;) {
12830                 unsigned int count =
12831                         min_t(unsigned int, PAGE_SIZE / size, vcpu->arch.sev_pio_count);
12832                 if (!__emulator_pio_in(vcpu, size, port, count))
12833                         break;
12834
12835                 /* Emulation done by the kernel.  */
12836                 advance_sev_es_emulated_ins(vcpu);
12837                 if (!vcpu->arch.sev_pio_count)
12838                         return 1;
12839         }
12840
12841         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_ins;
12842         return 0;
12843 }
12844
12845 int kvm_sev_es_string_io(struct kvm_vcpu *vcpu, unsigned int size,
12846                          unsigned int port, void *data,  unsigned int count,
12847                          int in)
12848 {
12849         vcpu->arch.sev_pio_data = data;
12850         vcpu->arch.sev_pio_count = count;
12851         return in ? kvm_sev_es_ins(vcpu, size, port)
12852                   : kvm_sev_es_outs(vcpu, size, port);
12853 }
12854 EXPORT_SYMBOL_GPL(kvm_sev_es_string_io);
12855
12856 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_entry);
12857 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
12858 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
12859 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
12860 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
12861 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
12862 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
12863 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
12864 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
12865 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
12866 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
12867 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmenter_failed);
12868 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
12869 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
12870 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
12871 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
12872 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window_update);
12873 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);
12874 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update);
12875 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access);
12876 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi);
12877 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_ga_log);
12878 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_apicv_update_request);
12879 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_apicv_accept_irq);
12880 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_enter);
12881 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_exit);
12882 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_msr_protocol_enter);
12883 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_msr_protocol_exit);