arch/x86/kvm/x86.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Kernel-based Virtual Machine driver for Linux
   4  *
   5  * derived from drivers/kvm/kvm_main.c
   6  *
   7  * Copyright (C) 2006 Qumranet, Inc.
   8  * Copyright (C) 2008 Qumranet, Inc.
   9  * Copyright IBM Corporation, 2008
  10  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  11  *
  12  * Authors:
  13  *   Avi Kivity   <avi@qumranet.com>
  14  *   Yaniv Kamay  <yaniv@qumranet.com>
  15  *   Amit Shah    <amit.shah@qumranet.com>
  16  *   Ben-Ami Yassour <benami@il.ibm.com>
  17  */
  18
  19 #include <linux/kvm_host.h>
  20 #include "irq.h"
  21 #include "ioapic.h"
  22 #include "mmu.h"
  23 #include "i8254.h"
  24 #include "tss.h"
  25 #include "kvm_cache_regs.h"
  26 #include "kvm_emulate.h"
  27 #include "x86.h"
  28 #include "cpuid.h"
  29 #include "pmu.h"
  30 #include "hyperv.h"
  31 #include "lapic.h"
  32 #include "xen.h"
  33
  34 #include <linux/clocksource.h>
  35 #include <linux/interrupt.h>
  36 #include <linux/kvm.h>
  37 #include <linux/fs.h>
  38 #include <linux/vmalloc.h>
  39 #include <linux/export.h>
  40 #include <linux/moduleparam.h>
  41 #include <linux/mman.h>
  42 #include <linux/highmem.h>
  43 #include <linux/iommu.h>
  44 #include <linux/intel-iommu.h>
  45 #include <linux/cpufreq.h>
  46 #include <linux/user-return-notifier.h>
  47 #include <linux/srcu.h>
  48 #include <linux/slab.h>
  49 #include <linux/perf_event.h>
  50 #include <linux/uaccess.h>
  51 #include <linux/hash.h>
  52 #include <linux/pci.h>
  53 #include <linux/timekeeper_internal.h>
  54 #include <linux/pvclock_gtod.h>
  55 #include <linux/kvm_irqfd.h>
  56 #include <linux/irqbypass.h>
  57 #include <linux/sched/stat.h>
  58 #include <linux/sched/isolation.h>
  59 #include <linux/mem_encrypt.h>
  60 #include <linux/entry-kvm.h>
  61 #include <linux/suspend.h>
  62
  63 #include <trace/events/kvm.h>
  64
  65 #include <asm/debugreg.h>
  66 #include <asm/msr.h>
  67 #include <asm/desc.h>
  68 #include <asm/mce.h>
  69 #include <linux/kernel_stat.h>
  70 #include <asm/fpu/internal.h> /* Ugh! */
  71 #include <asm/pvclock.h>
  72 #include <asm/div64.h>
  73 #include <asm/irq_remapping.h>
  74 #include <asm/mshyperv.h>
  75 #include <asm/hypervisor.h>
  76 #include <asm/tlbflush.h>
  77 #include <asm/intel_pt.h>
  78 #include <asm/emulate_prefix.h>
  79 #include <asm/sgx.h>
  80 #include <clocksource/hyperv_timer.h>
  81
  82 #define CREATE_TRACE_POINTS
  83 #include "trace.h"
  84
  85 #define MAX_IO_MSRS 256
  86 #define KVM_MAX_MCE_BANKS 32
  87 u64 __read_mostly kvm_mce_cap_supported = MCG_CTL_P | MCG_SER_P;
  88 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported);
  89
  90 #define emul_to_vcpu(ctxt) \
  91         ((struct kvm_vcpu *)(ctxt)->vcpu)
  92
  93 /* EFER defaults:
  94  * - enable syscall per default because its emulated by KVM
  95  * - enable LME and LMA per default on 64 bit KVM
  96  */
  97 #ifdef CONFIG_X86_64
  98 static
  99 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
 100 #else
 101 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
 102 #endif
 103
 104 static u64 __read_mostly cr4_reserved_bits = CR4_RESERVED_BITS;
 105
 106 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
 107                                     KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
 108
 109 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
 110 static void process_nmi(struct kvm_vcpu *vcpu);
 111 static void process_smi(struct kvm_vcpu *vcpu);
 112 static void enter_smm(struct kvm_vcpu *vcpu);
 113 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
 114 static void store_regs(struct kvm_vcpu *vcpu);
 115 static int sync_regs(struct kvm_vcpu *vcpu);
 116
 117 struct kvm_x86_ops kvm_x86_ops __read_mostly;
 118 EXPORT_SYMBOL_GPL(kvm_x86_ops);
 119
 120 #define KVM_X86_OP(func)                                             \
 121         DEFINE_STATIC_CALL_NULL(kvm_x86_##func,                      \
 122                                 *(((struct kvm_x86_ops *)0)->func));
 123 #define KVM_X86_OP_NULL KVM_X86_OP
 124 #include <asm/kvm-x86-ops.h>
 125 EXPORT_STATIC_CALL_GPL(kvm_x86_get_cs_db_l_bits);
 126 EXPORT_STATIC_CALL_GPL(kvm_x86_cache_reg);
 127 EXPORT_STATIC_CALL_GPL(kvm_x86_tlb_flush_current);
 128
 129 static bool __read_mostly ignore_msrs = 0;
 130 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
 131
 132 bool __read_mostly report_ignored_msrs = true;
 133 module_param(report_ignored_msrs, bool, S_IRUGO | S_IWUSR);
 134 EXPORT_SYMBOL_GPL(report_ignored_msrs);
 135
 136 unsigned int min_timer_period_us = 200;
 137 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
 138
 139 static bool __read_mostly kvmclock_periodic_sync = true;
 140 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
 141
 142 bool __read_mostly kvm_has_tsc_control;
 143 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
 144 u32  __read_mostly kvm_max_guest_tsc_khz;
 145 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 146 u8   __read_mostly kvm_tsc_scaling_ratio_frac_bits;
 147 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits);
 148 u64  __read_mostly kvm_max_tsc_scaling_ratio;
 149 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio);
 150 u64 __read_mostly kvm_default_tsc_scaling_ratio;
 151 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio);
 152 bool __read_mostly kvm_has_bus_lock_exit;
 153 EXPORT_SYMBOL_GPL(kvm_has_bus_lock_exit);
 154
 155 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 156 static u32 __read_mostly tsc_tolerance_ppm = 250;
 157 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 158
 159 /*
 160  * lapic timer advance (tscdeadline mode only) in nanoseconds.  '-1' enables
 161  * adaptive tuning starting from default advancement of 1000ns.  '0' disables
 162  * advancement entirely.  Any other value is used as-is and disables adaptive
 163  * tuning, i.e. allows privileged userspace to set an exact advancement time.
 164  */
 165 static int __read_mostly lapic_timer_advance_ns = -1;
 166 module_param(lapic_timer_advance_ns, int, S_IRUGO | S_IWUSR);
 167
 168 static bool __read_mostly vector_hashing = true;
 169 module_param(vector_hashing, bool, S_IRUGO);
 170
 171 bool __read_mostly enable_vmware_backdoor = false;
 172 module_param(enable_vmware_backdoor, bool, S_IRUGO);
 173 EXPORT_SYMBOL_GPL(enable_vmware_backdoor);
 174
 175 static bool __read_mostly force_emulation_prefix = false;
 176 module_param(force_emulation_prefix, bool, S_IRUGO);
 177
 178 int __read_mostly pi_inject_timer = -1;
 179 module_param(pi_inject_timer, bint, S_IRUGO | S_IWUSR);
 180
 181 /*
 182  * Restoring the host value for MSRs that are only consumed when running in
 183  * usermode, e.g. SYSCALL MSRs and TSC_AUX, can be deferred until the CPU
 184  * returns to userspace, i.e. the kernel can run with the guest's value.
 185  */
 186 #define KVM_MAX_NR_USER_RETURN_MSRS 16
 187
 188 struct kvm_user_return_msrs {
 189         struct user_return_notifier urn;
 190         bool registered;
 191         struct kvm_user_return_msr_values {
 192                 u64 host;
 193                 u64 curr;
 194         } values[KVM_MAX_NR_USER_RETURN_MSRS];
 195 };
 196
 197 u32 __read_mostly kvm_nr_uret_msrs;
 198 EXPORT_SYMBOL_GPL(kvm_nr_uret_msrs);
 199 static u32 __read_mostly kvm_uret_msrs_list[KVM_MAX_NR_USER_RETURN_MSRS];
 200 static struct kvm_user_return_msrs __percpu *user_return_msrs;
 201
 202 #define KVM_SUPPORTED_XCR0     (XFEATURE_MASK_FP | XFEATURE_MASK_SSE \
 203                                 | XFEATURE_MASK_YMM | XFEATURE_MASK_BNDREGS \
 204                                 | XFEATURE_MASK_BNDCSR | XFEATURE_MASK_AVX512 \
 205                                 | XFEATURE_MASK_PKRU)
 206
 207 u64 __read_mostly host_efer;
 208 EXPORT_SYMBOL_GPL(host_efer);
 209
 210 bool __read_mostly allow_smaller_maxphyaddr = 0;
 211 EXPORT_SYMBOL_GPL(allow_smaller_maxphyaddr);
 212
 213 bool __read_mostly enable_apicv = true;
 214 EXPORT_SYMBOL_GPL(enable_apicv);
 215
 216 u64 __read_mostly host_xss;
 217 EXPORT_SYMBOL_GPL(host_xss);
 218 u64 __read_mostly supported_xss;
 219 EXPORT_SYMBOL_GPL(supported_xss);
 220
 221 struct kvm_stats_debugfs_item debugfs_entries[] = {
 222         VCPU_STAT("pf_fixed", pf_fixed),
 223         VCPU_STAT("pf_guest", pf_guest),
 224         VCPU_STAT("tlb_flush", tlb_flush),
 225         VCPU_STAT("invlpg", invlpg),
 226         VCPU_STAT("exits", exits),
 227         VCPU_STAT("io_exits", io_exits),
 228         VCPU_STAT("mmio_exits", mmio_exits),
 229         VCPU_STAT("signal_exits", signal_exits),
 230         VCPU_STAT("irq_window", irq_window_exits),
 231         VCPU_STAT("nmi_window", nmi_window_exits),
 232         VCPU_STAT("halt_exits", halt_exits),
 233         VCPU_STAT("halt_successful_poll", halt_successful_poll),
 234         VCPU_STAT("halt_attempted_poll", halt_attempted_poll),
 235         VCPU_STAT("halt_poll_invalid", halt_poll_invalid),
 236         VCPU_STAT("halt_wakeup", halt_wakeup),
 237         VCPU_STAT("hypercalls", hypercalls),
 238         VCPU_STAT("request_irq", request_irq_exits),
 239         VCPU_STAT("irq_exits", irq_exits),
 240         VCPU_STAT("host_state_reload", host_state_reload),
 241         VCPU_STAT("fpu_reload", fpu_reload),
 242         VCPU_STAT("insn_emulation", insn_emulation),
 243         VCPU_STAT("insn_emulation_fail", insn_emulation_fail),
 244         VCPU_STAT("irq_injections", irq_injections),
 245         VCPU_STAT("nmi_injections", nmi_injections),
 246         VCPU_STAT("req_event", req_event),
 247         VCPU_STAT("l1d_flush", l1d_flush),
 248         VCPU_STAT("halt_poll_success_ns", halt_poll_success_ns),
 249         VCPU_STAT("halt_poll_fail_ns", halt_poll_fail_ns),
 250         VCPU_STAT("nested_run", nested_run),
 251         VCPU_STAT("directed_yield_attempted", directed_yield_attempted),
 252         VCPU_STAT("directed_yield_successful", directed_yield_successful),
 253         VM_STAT("mmu_shadow_zapped", mmu_shadow_zapped),
 254         VM_STAT("mmu_pte_write", mmu_pte_write),
 255         VM_STAT("mmu_pde_zapped", mmu_pde_zapped),
 256         VM_STAT("mmu_flooded", mmu_flooded),
 257         VM_STAT("mmu_recycled", mmu_recycled),
 258         VM_STAT("mmu_cache_miss", mmu_cache_miss),
 259         VM_STAT("mmu_unsync", mmu_unsync),
 260         VM_STAT("remote_tlb_flush", remote_tlb_flush),
 261         VM_STAT("largepages", lpages, .mode = 0444),
 262         VM_STAT("nx_largepages_splitted", nx_lpage_splits, .mode = 0444),
 263         VM_STAT("max_mmu_page_hash_collisions", max_mmu_page_hash_collisions),
 264         { NULL }
 265 };
 266
 267 u64 __read_mostly host_xcr0;
 268 u64 __read_mostly supported_xcr0;
 269 EXPORT_SYMBOL_GPL(supported_xcr0);
 270
 271 static struct kmem_cache *x86_fpu_cache;
 272
 273 static struct kmem_cache *x86_emulator_cache;
 274
 275 /*
 276  * When called, it means the previous get/set msr reached an invalid msr.
 277  * Return true if we want to ignore/silent this failed msr access.
 278  */
 279 static bool kvm_msr_ignored_check(u32 msr, u64 data, bool write)
 280 {
 281         const char *op = write ? "wrmsr" : "rdmsr";
 282
 283         if (ignore_msrs) {
 284                 if (report_ignored_msrs)
 285                         kvm_pr_unimpl("ignored %s: 0x%x data 0x%llx\n",
 286                                       op, msr, data);
 287                 /* Mask the error */
 288                 return true;
 289         } else {
 290                 kvm_debug_ratelimited("unhandled %s: 0x%x data 0x%llx\n",
 291                                       op, msr, data);
 292                 return false;
 293         }
 294 }
 295
 296 static struct kmem_cache *kvm_alloc_emulator_cache(void)
 297 {
 298         unsigned int useroffset = offsetof(struct x86_emulate_ctxt, src);
 299         unsigned int size = sizeof(struct x86_emulate_ctxt);
 300
 301         return kmem_cache_create_usercopy("x86_emulator", size,
 302                                           __alignof__(struct x86_emulate_ctxt),
 303                                           SLAB_ACCOUNT, useroffset,
 304                                           size - useroffset, NULL);
 305 }
 306
 307 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 308
 309 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 310 {
 311         int i;
 312         for (i = 0; i < ASYNC_PF_PER_VCPU; i++)
 313                 vcpu->arch.apf.gfns[i] = ~0;
 314 }
 315
 316 static void kvm_on_user_return(struct user_return_notifier *urn)
 317 {
 318         unsigned slot;
 319         struct kvm_user_return_msrs *msrs
 320                 = container_of(urn, struct kvm_user_return_msrs, urn);
 321         struct kvm_user_return_msr_values *values;
 322         unsigned long flags;
 323
 324         /*
 325          * Disabling irqs at this point since the following code could be
 326          * interrupted and executed through kvm_arch_hardware_disable()
 327          */
 328         local_irq_save(flags);
 329         if (msrs->registered) {
 330                 msrs->registered = false;
 331                 user_return_notifier_unregister(urn);
 332         }
 333         local_irq_restore(flags);
 334         for (slot = 0; slot < kvm_nr_uret_msrs; ++slot) {
 335                 values = &msrs->values[slot];
 336                 if (values->host != values->curr) {
 337                         wrmsrl(kvm_uret_msrs_list[slot], values->host);
 338                         values->curr = values->host;
 339                 }
 340         }
 341 }
 342
 343 static int kvm_probe_user_return_msr(u32 msr)
 344 {
 345         u64 val;
 346         int ret;
 347
 348         preempt_disable();
 349         ret = rdmsrl_safe(msr, &val);
 350         if (ret)
 351                 goto out;
 352         ret = wrmsrl_safe(msr, val);
 353 out:
 354         preempt_enable();
 355         return ret;
 356 }
 357
 358 int kvm_add_user_return_msr(u32 msr)
 359 {
 360         BUG_ON(kvm_nr_uret_msrs >= KVM_MAX_NR_USER_RETURN_MSRS);
 361
 362         if (kvm_probe_user_return_msr(msr))
 363                 return -1;
 364
 365         kvm_uret_msrs_list[kvm_nr_uret_msrs] = msr;
 366         return kvm_nr_uret_msrs++;
 367 }
 368 EXPORT_SYMBOL_GPL(kvm_add_user_return_msr);
 369
 370 int kvm_find_user_return_msr(u32 msr)
 371 {
 372         int i;
 373
 374         for (i = 0; i < kvm_nr_uret_msrs; ++i) {
 375                 if (kvm_uret_msrs_list[i] == msr)
 376                         return i;
 377         }
 378         return -1;
 379 }
 380 EXPORT_SYMBOL_GPL(kvm_find_user_return_msr);
 381
 382 static void kvm_user_return_msr_cpu_online(void)
 383 {
 384         unsigned int cpu = smp_processor_id();
 385         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 386         u64 value;
 387         int i;
 388
 389         for (i = 0; i < kvm_nr_uret_msrs; ++i) {
 390                 rdmsrl_safe(kvm_uret_msrs_list[i], &value);
 391                 msrs->values[i].host = value;
 392                 msrs->values[i].curr = value;
 393         }
 394 }
 395
 396 int kvm_set_user_return_msr(unsigned slot, u64 value, u64 mask)
 397 {
 398         unsigned int cpu = smp_processor_id();
 399         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 400         int err;
 401
 402         value = (value & mask) | (msrs->values[slot].host & ~mask);
 403         if (value == msrs->values[slot].curr)
 404                 return 0;
 405         err = wrmsrl_safe(kvm_uret_msrs_list[slot], value);
 406         if (err)
 407                 return 1;
 408
 409         msrs->values[slot].curr = value;
 410         if (!msrs->registered) {
 411                 msrs->urn.on_user_return = kvm_on_user_return;
 412                 user_return_notifier_register(&msrs->urn);
 413                 msrs->registered = true;
 414         }
 415         return 0;
 416 }
 417 EXPORT_SYMBOL_GPL(kvm_set_user_return_msr);
 418
 419 static void drop_user_return_notifiers(void)
 420 {
 421         unsigned int cpu = smp_processor_id();
 422         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 423
 424         if (msrs->registered)
 425                 kvm_on_user_return(&msrs->urn);
 426 }
 427
 428 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 429 {
 430         return vcpu->arch.apic_base;
 431 }
 432 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 433
 434 enum lapic_mode kvm_get_apic_mode(struct kvm_vcpu *vcpu)
 435 {
 436         return kvm_apic_mode(kvm_get_apic_base(vcpu));
 437 }
 438 EXPORT_SYMBOL_GPL(kvm_get_apic_mode);
 439
 440 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 441 {
 442         enum lapic_mode old_mode = kvm_get_apic_mode(vcpu);
 443         enum lapic_mode new_mode = kvm_apic_mode(msr_info->data);
 444         u64 reserved_bits = kvm_vcpu_reserved_gpa_bits_raw(vcpu) | 0x2ff |
 445                 (guest_cpuid_has(vcpu, X86_FEATURE_X2APIC) ? 0 : X2APIC_ENABLE);
 446
 447         if ((msr_info->data & reserved_bits) != 0 || new_mode == LAPIC_MODE_INVALID)
 448                 return 1;
 449         if (!msr_info->host_initiated) {
 450                 if (old_mode == LAPIC_MODE_X2APIC && new_mode == LAPIC_MODE_XAPIC)
 451                         return 1;
 452                 if (old_mode == LAPIC_MODE_DISABLED && new_mode == LAPIC_MODE_X2APIC)
 453                         return 1;
 454         }
 455
 456         kvm_lapic_set_base(vcpu, msr_info->data);
 457         kvm_recalculate_apic_map(vcpu->kvm);
 458         return 0;
 459 }
 460 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 461
 462 asmlinkage __visible noinstr void kvm_spurious_fault(void)
 463 {
 464         /* Fault while not rebooting.  We want the trace. */
 465         BUG_ON(!kvm_rebooting);
 466 }
 467 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 468
 469 #define EXCPT_BENIGN            0
 470 #define EXCPT_CONTRIBUTORY      1
 471 #define EXCPT_PF                2
 472
 473 static int exception_class(int vector)
 474 {
 475         switch (vector) {
 476         case PF_VECTOR:
 477                 return EXCPT_PF;
 478         case DE_VECTOR:
 479         case TS_VECTOR:
 480         case NP_VECTOR:
 481         case SS_VECTOR:
 482         case GP_VECTOR:
 483                 return EXCPT_CONTRIBUTORY;
 484         default:
 485                 break;
 486         }
 487         return EXCPT_BENIGN;
 488 }
 489
 490 #define EXCPT_FAULT             0
 491 #define EXCPT_TRAP              1
 492 #define EXCPT_ABORT             2
 493 #define EXCPT_INTERRUPT         3
 494
 495 static int exception_type(int vector)
 496 {
 497         unsigned int mask;
 498
 499         if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
 500                 return EXCPT_INTERRUPT;
 501
 502         mask = 1 << vector;
 503
 504         /* #DB is trap, as instruction watchpoints are handled elsewhere */
 505         if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
 506                 return EXCPT_TRAP;
 507
 508         if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
 509                 return EXCPT_ABORT;
 510
 511         /* Reserved exceptions will result in fault */
 512         return EXCPT_FAULT;
 513 }
 514
 515 void kvm_deliver_exception_payload(struct kvm_vcpu *vcpu)
 516 {
 517         unsigned nr = vcpu->arch.exception.nr;
 518         bool has_payload = vcpu->arch.exception.has_payload;
 519         unsigned long payload = vcpu->arch.exception.payload;
 520
 521         if (!has_payload)
 522                 return;
 523
 524         switch (nr) {
 525         case DB_VECTOR:
 526                 /*
 527                  * "Certain debug exceptions may clear bit 0-3.  The
 528                  * remaining contents of the DR6 register are never
 529                  * cleared by the processor".
 530                  */
 531                 vcpu->arch.dr6 &= ~DR_TRAP_BITS;
 532                 /*
 533                  * In order to reflect the #DB exception payload in guest
 534                  * dr6, three components need to be considered: active low
 535                  * bit, FIXED_1 bits and active high bits (e.g. DR6_BD,
 536                  * DR6_BS and DR6_BT)
 537                  * DR6_ACTIVE_LOW contains the FIXED_1 and active low bits.
 538                  * In the target guest dr6:
 539                  * FIXED_1 bits should always be set.
 540                  * Active low bits should be cleared if 1-setting in payload.
 541                  * Active high bits should be set if 1-setting in payload.
 542                  *
 543                  * Note, the payload is compatible with the pending debug
 544                  * exceptions/exit qualification under VMX, that active_low bits
 545                  * are active high in payload.
 546                  * So they need to be flipped for DR6.
 547                  */
 548                 vcpu->arch.dr6 |= DR6_ACTIVE_LOW;
 549                 vcpu->arch.dr6 |= payload;
 550                 vcpu->arch.dr6 ^= payload & DR6_ACTIVE_LOW;
 551
 552                 /*
 553                  * The #DB payload is defined as compatible with the 'pending
 554                  * debug exceptions' field under VMX, not DR6. While bit 12 is
 555                  * defined in the 'pending debug exceptions' field (enabled
 556                  * breakpoint), it is reserved and must be zero in DR6.
 557                  */
 558                 vcpu->arch.dr6 &= ~BIT(12);
 559                 break;
 560         case PF_VECTOR:
 561                 vcpu->arch.cr2 = payload;
 562                 break;
 563         }
 564
 565         vcpu->arch.exception.has_payload = false;
 566         vcpu->arch.exception.payload = 0;
 567 }
 568 EXPORT_SYMBOL_GPL(kvm_deliver_exception_payload);
 569
 570 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 571                 unsigned nr, bool has_error, u32 error_code,
 572                 bool has_payload, unsigned long payload, bool reinject)
 573 {
 574         u32 prev_nr;
 575         int class1, class2;
 576
 577         kvm_make_request(KVM_REQ_EVENT, vcpu);
 578
 579         if (!vcpu->arch.exception.pending && !vcpu->arch.exception.injected) {
 580         queue:
 581                 if (reinject) {
 582                         /*
 583                          * On vmentry, vcpu->arch.exception.pending is only
 584                          * true if an event injection was blocked by
 585                          * nested_run_pending.  In that case, however,
 586                          * vcpu_enter_guest requests an immediate exit,
 587                          * and the guest shouldn't proceed far enough to
 588                          * need reinjection.
 589                          */
 590                         WARN_ON_ONCE(vcpu->arch.exception.pending);
 591                         vcpu->arch.exception.injected = true;
 592                         if (WARN_ON_ONCE(has_payload)) {
 593                                 /*
 594                                  * A reinjected event has already
 595                                  * delivered its payload.
 596                                  */
 597                                 has_payload = false;
 598                                 payload = 0;
 599                         }
 600                 } else {
 601                         vcpu->arch.exception.pending = true;
 602                         vcpu->arch.exception.injected = false;
 603                 }
 604                 vcpu->arch.exception.has_error_code = has_error;
 605                 vcpu->arch.exception.nr = nr;
 606                 vcpu->arch.exception.error_code = error_code;
 607                 vcpu->arch.exception.has_payload = has_payload;
 608                 vcpu->arch.exception.payload = payload;
 609                 if (!is_guest_mode(vcpu))
 610                         kvm_deliver_exception_payload(vcpu);
 611                 return;
 612         }
 613
 614         /* to check exception */
 615         prev_nr = vcpu->arch.exception.nr;
 616         if (prev_nr == DF_VECTOR) {
 617                 /* triple fault -> shutdown */
 618                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 619                 return;
 620         }
 621         class1 = exception_class(prev_nr);
 622         class2 = exception_class(nr);
 623         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 624                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 625                 /*
 626                  * Generate double fault per SDM Table 5-5.  Set
 627                  * exception.pending = true so that the double fault
 628                  * can trigger a nested vmexit.
 629                  */
 630                 vcpu->arch.exception.pending = true;
 631                 vcpu->arch.exception.injected = false;
 632                 vcpu->arch.exception.has_error_code = true;
 633                 vcpu->arch.exception.nr = DF_VECTOR;
 634                 vcpu->arch.exception.error_code = 0;
 635                 vcpu->arch.exception.has_payload = false;
 636                 vcpu->arch.exception.payload = 0;
 637         } else
 638                 /* replace previous exception with a new one in a hope
 639                    that instruction re-execution will regenerate lost
 640                    exception */
 641                 goto queue;
 642 }
 643
 644 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 645 {
 646         kvm_multiple_exception(vcpu, nr, false, 0, false, 0, false);
 647 }
 648 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 649
 650 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 651 {
 652         kvm_multiple_exception(vcpu, nr, false, 0, false, 0, true);
 653 }
 654 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 655
 656 void kvm_queue_exception_p(struct kvm_vcpu *vcpu, unsigned nr,
 657                            unsigned long payload)
 658 {
 659         kvm_multiple_exception(vcpu, nr, false, 0, true, payload, false);
 660 }
 661 EXPORT_SYMBOL_GPL(kvm_queue_exception_p);
 662
 663 static void kvm_queue_exception_e_p(struct kvm_vcpu *vcpu, unsigned nr,
 664                                     u32 error_code, unsigned long payload)
 665 {
 666         kvm_multiple_exception(vcpu, nr, true, error_code,
 667                                true, payload, false);
 668 }
 669
 670 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 671 {
 672         if (err)
 673                 kvm_inject_gp(vcpu, 0);
 674         else
 675                 return kvm_skip_emulated_instruction(vcpu);
 676
 677         return 1;
 678 }
 679 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 680
 681 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 682 {
 683         ++vcpu->stat.pf_guest;
 684         vcpu->arch.exception.nested_apf =
 685                 is_guest_mode(vcpu) && fault->async_page_fault;
 686         if (vcpu->arch.exception.nested_apf) {
 687                 vcpu->arch.apf.nested_apf_token = fault->address;
 688                 kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 689         } else {
 690                 kvm_queue_exception_e_p(vcpu, PF_VECTOR, fault->error_code,
 691                                         fault->address);
 692         }
 693 }
 694 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 695
 696 bool kvm_inject_emulated_page_fault(struct kvm_vcpu *vcpu,
 697                                     struct x86_exception *fault)
 698 {
 699         struct kvm_mmu *fault_mmu;
 700         WARN_ON_ONCE(fault->vector != PF_VECTOR);
 701
 702         fault_mmu = fault->nested_page_fault ? vcpu->arch.mmu :
 703                                                vcpu->arch.walk_mmu;
 704
 705         /*
 706          * Invalidate the TLB entry for the faulting address, if it exists,
 707          * else the access will fault indefinitely (and to emulate hardware).
 708          */
 709         if ((fault->error_code & PFERR_PRESENT_MASK) &&
 710             !(fault->error_code & PFERR_RSVD_MASK))
 711                 kvm_mmu_invalidate_gva(vcpu, fault_mmu, fault->address,
 712                                        fault_mmu->root_hpa);
 713
 714         fault_mmu->inject_page_fault(vcpu, fault);
 715         return fault->nested_page_fault;
 716 }
 717 EXPORT_SYMBOL_GPL(kvm_inject_emulated_page_fault);
 718
 719 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 720 {
 721         atomic_inc(&vcpu->arch.nmi_queued);
 722         kvm_make_request(KVM_REQ_NMI, vcpu);
 723 }
 724 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 725
 726 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 727 {
 728         kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, false);
 729 }
 730 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 731
 732 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 733 {
 734         kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, true);
 735 }
 736 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 737
 738 /*
 739  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 740  * a #GP and return false.
 741  */
 742 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 743 {
 744         if (static_call(kvm_x86_get_cpl)(vcpu) <= required_cpl)
 745                 return true;
 746         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 747         return false;
 748 }
 749 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 750
 751 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
 752 {
 753         if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 754                 return true;
 755
 756         kvm_queue_exception(vcpu, UD_VECTOR);
 757         return false;
 758 }
 759 EXPORT_SYMBOL_GPL(kvm_require_dr);
 760
 761 /*
 762  * This function will be used to read from the physical memory of the currently
 763  * running guest. The difference to kvm_vcpu_read_guest_page is that this function
 764  * can read from guest physical or from the guest's guest physical memory.
 765  */
 766 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 767                             gfn_t ngfn, void *data, int offset, int len,
 768                             u32 access)
 769 {
 770         struct x86_exception exception;
 771         gfn_t real_gfn;
 772         gpa_t ngpa;
 773
 774         ngpa     = gfn_to_gpa(ngfn);
 775         real_gfn = mmu->translate_gpa(vcpu, ngpa, access, &exception);
 776         if (real_gfn == UNMAPPED_GVA)
 777                 return -EFAULT;
 778
 779         real_gfn = gpa_to_gfn(real_gfn);
 780
 781         return kvm_vcpu_read_guest_page(vcpu, real_gfn, data, offset, len);
 782 }
 783 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 784
 785 static int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 786                                void *data, int offset, int len, u32 access)
 787 {
 788         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 789                                        data, offset, len, access);
 790 }
 791
 792 static inline u64 pdptr_rsvd_bits(struct kvm_vcpu *vcpu)
 793 {
 794         return vcpu->arch.reserved_gpa_bits | rsvd_bits(5, 8) | rsvd_bits(1, 2);
 795 }
 796
 797 /*
 798  * Load the pae pdptrs.  Return 1 if they are all valid, 0 otherwise.
 799  */
 800 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 801 {
 802         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 803         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 804         int i;
 805         int ret;
 806         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 807
 808         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 809                                       offset * sizeof(u64), sizeof(pdpte),
 810                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 811         if (ret < 0) {
 812                 ret = 0;
 813                 goto out;
 814         }
 815         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 816                 if ((pdpte[i] & PT_PRESENT_MASK) &&
 817                     (pdpte[i] & pdptr_rsvd_bits(vcpu))) {
 818                         ret = 0;
 819                         goto out;
 820                 }
 821         }
 822         ret = 1;
 823
 824         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 825         kvm_register_mark_dirty(vcpu, VCPU_EXREG_PDPTR);
 826
 827 out:
 828
 829         return ret;
 830 }
 831 EXPORT_SYMBOL_GPL(load_pdptrs);
 832
 833 bool pdptrs_changed(struct kvm_vcpu *vcpu)
 834 {
 835         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 836         int offset;
 837         gfn_t gfn;
 838         int r;
 839
 840         if (!is_pae_paging(vcpu))
 841                 return false;
 842
 843         if (!kvm_register_is_available(vcpu, VCPU_EXREG_PDPTR))
 844                 return true;
 845
 846         gfn = (kvm_read_cr3(vcpu) & 0xffffffe0ul) >> PAGE_SHIFT;
 847         offset = (kvm_read_cr3(vcpu) & 0xffffffe0ul) & (PAGE_SIZE - 1);
 848         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 849                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 850         if (r < 0)
 851                 return true;
 852
 853         return memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 854 }
 855 EXPORT_SYMBOL_GPL(pdptrs_changed);
 856
 857 void kvm_post_set_cr0(struct kvm_vcpu *vcpu, unsigned long old_cr0, unsigned long cr0)
 858 {
 859         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP;
 860
 861         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 862                 kvm_clear_async_pf_completion_queue(vcpu);
 863                 kvm_async_pf_hash_reset(vcpu);
 864         }
 865
 866         if ((cr0 ^ old_cr0) & update_bits)
 867                 kvm_mmu_reset_context(vcpu);
 868
 869         if (((cr0 ^ old_cr0) & X86_CR0_CD) &&
 870             kvm_arch_has_noncoherent_dma(vcpu->kvm) &&
 871             !kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
 872                 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
 873 }
 874 EXPORT_SYMBOL_GPL(kvm_post_set_cr0);
 875
 876 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 877 {
 878         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 879         unsigned long pdptr_bits = X86_CR0_CD | X86_CR0_NW | X86_CR0_PG;
 880
 881         cr0 |= X86_CR0_ET;
 882
 883 #ifdef CONFIG_X86_64
 884         if (cr0 & 0xffffffff00000000UL)
 885                 return 1;
 886 #endif
 887
 888         cr0 &= ~CR0_RESERVED_BITS;
 889
 890         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 891                 return 1;
 892
 893         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 894                 return 1;
 895
 896 #ifdef CONFIG_X86_64
 897         if ((vcpu->arch.efer & EFER_LME) && !is_paging(vcpu) &&
 898             (cr0 & X86_CR0_PG)) {
 899                 int cs_db, cs_l;
 900
 901                 if (!is_pae(vcpu))
 902                         return 1;
 903                 static_call(kvm_x86_get_cs_db_l_bits)(vcpu, &cs_db, &cs_l);
 904                 if (cs_l)
 905                         return 1;
 906         }
 907 #endif
 908         if (!(vcpu->arch.efer & EFER_LME) && (cr0 & X86_CR0_PG) &&
 909             is_pae(vcpu) && ((cr0 ^ old_cr0) & pdptr_bits) &&
 910             !load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu)))
 911                 return 1;
 912
 913         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
 914                 return 1;
 915
 916         static_call(kvm_x86_set_cr0)(vcpu, cr0);
 917
 918         kvm_post_set_cr0(vcpu, old_cr0, cr0);
 919
 920         return 0;
 921 }
 922 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 923
 924 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 925 {
 926         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 927 }
 928 EXPORT_SYMBOL_GPL(kvm_lmsw);
 929
 930 void kvm_load_guest_xsave_state(struct kvm_vcpu *vcpu)
 931 {
 932         if (vcpu->arch.guest_state_protected)
 933                 return;
 934
 935         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE)) {
 936
 937                 if (vcpu->arch.xcr0 != host_xcr0)
 938                         xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 939
 940                 if (vcpu->arch.xsaves_enabled &&
 941                     vcpu->arch.ia32_xss != host_xss)
 942                         wrmsrl(MSR_IA32_XSS, vcpu->arch.ia32_xss);
 943         }
 944
 945         if (static_cpu_has(X86_FEATURE_PKU) &&
 946             (kvm_read_cr4_bits(vcpu, X86_CR4_PKE) ||
 947              (vcpu->arch.xcr0 & XFEATURE_MASK_PKRU)) &&
 948             vcpu->arch.pkru != vcpu->arch.host_pkru)
 949                 __write_pkru(vcpu->arch.pkru);
 950 }
 951 EXPORT_SYMBOL_GPL(kvm_load_guest_xsave_state);
 952
 953 void kvm_load_host_xsave_state(struct kvm_vcpu *vcpu)
 954 {
 955         if (vcpu->arch.guest_state_protected)
 956                 return;
 957
 958         if (static_cpu_has(X86_FEATURE_PKU) &&
 959             (kvm_read_cr4_bits(vcpu, X86_CR4_PKE) ||
 960              (vcpu->arch.xcr0 & XFEATURE_MASK_PKRU))) {
 961                 vcpu->arch.pkru = rdpkru();
 962                 if (vcpu->arch.pkru != vcpu->arch.host_pkru)
 963                         __write_pkru(vcpu->arch.host_pkru);
 964         }
 965
 966         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE)) {
 967
 968                 if (vcpu->arch.xcr0 != host_xcr0)
 969                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
 970
 971                 if (vcpu->arch.xsaves_enabled &&
 972                     vcpu->arch.ia32_xss != host_xss)
 973                         wrmsrl(MSR_IA32_XSS, host_xss);
 974         }
 975
 976 }
 977 EXPORT_SYMBOL_GPL(kvm_load_host_xsave_state);
 978
 979 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 980 {
 981         u64 xcr0 = xcr;
 982         u64 old_xcr0 = vcpu->arch.xcr0;
 983         u64 valid_bits;
 984
 985         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 986         if (index != XCR_XFEATURE_ENABLED_MASK)
 987                 return 1;
 988         if (!(xcr0 & XFEATURE_MASK_FP))
 989                 return 1;
 990         if ((xcr0 & XFEATURE_MASK_YMM) && !(xcr0 & XFEATURE_MASK_SSE))
 991                 return 1;
 992
 993         /*
 994          * Do not allow the guest to set bits that we do not support
 995          * saving.  However, xcr0 bit 0 is always set, even if the
 996          * emulated CPU does not support XSAVE (see fx_init).
 997          */
 998         valid_bits = vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FP;
 999         if (xcr0 & ~valid_bits)
1000                 return 1;
1001
1002         if ((!(xcr0 & XFEATURE_MASK_BNDREGS)) !=
1003             (!(xcr0 & XFEATURE_MASK_BNDCSR)))
1004                 return 1;
1005
1006         if (xcr0 & XFEATURE_MASK_AVX512) {
1007                 if (!(xcr0 & XFEATURE_MASK_YMM))
1008                         return 1;
1009                 if ((xcr0 & XFEATURE_MASK_AVX512) != XFEATURE_MASK_AVX512)
1010                         return 1;
1011         }
1012         vcpu->arch.xcr0 = xcr0;
1013
1014         if ((xcr0 ^ old_xcr0) & XFEATURE_MASK_EXTEND)
1015                 kvm_update_cpuid_runtime(vcpu);
1016         return 0;
1017 }
1018
1019 int kvm_emulate_xsetbv(struct kvm_vcpu *vcpu)
1020 {
1021         if (static_call(kvm_x86_get_cpl)(vcpu) != 0 ||
1022             __kvm_set_xcr(vcpu, kvm_rcx_read(vcpu), kvm_read_edx_eax(vcpu))) {
1023                 kvm_inject_gp(vcpu, 0);
1024                 return 1;
1025         }
1026
1027         return kvm_skip_emulated_instruction(vcpu);
1028 }
1029 EXPORT_SYMBOL_GPL(kvm_emulate_xsetbv);
1030
1031 bool kvm_is_valid_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
1032 {
1033         if (cr4 & cr4_reserved_bits)
1034                 return false;
1035
1036         if (cr4 & vcpu->arch.cr4_guest_rsvd_bits)
1037                 return false;
1038
1039         return static_call(kvm_x86_is_valid_cr4)(vcpu, cr4);
1040 }
1041 EXPORT_SYMBOL_GPL(kvm_is_valid_cr4);
1042
1043 void kvm_post_set_cr4(struct kvm_vcpu *vcpu, unsigned long old_cr4, unsigned long cr4)
1044 {
1045         unsigned long mmu_role_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
1046                                       X86_CR4_SMEP | X86_CR4_SMAP | X86_CR4_PKE;
1047
1048         if (((cr4 ^ old_cr4) & mmu_role_bits) ||
1049             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
1050                 kvm_mmu_reset_context(vcpu);
1051 }
1052 EXPORT_SYMBOL_GPL(kvm_post_set_cr4);
1053
1054 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
1055 {
1056         unsigned long old_cr4 = kvm_read_cr4(vcpu);
1057         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
1058                                    X86_CR4_SMEP;
1059
1060         if (!kvm_is_valid_cr4(vcpu, cr4))
1061                 return 1;
1062
1063         if (is_long_mode(vcpu)) {
1064                 if (!(cr4 & X86_CR4_PAE))
1065                         return 1;
1066                 if ((cr4 ^ old_cr4) & X86_CR4_LA57)
1067                         return 1;
1068         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
1069                    && ((cr4 ^ old_cr4) & pdptr_bits)
1070                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
1071                                    kvm_read_cr3(vcpu)))
1072                 return 1;
1073
1074         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
1075                 if (!guest_cpuid_has(vcpu, X86_FEATURE_PCID))
1076                         return 1;
1077
1078                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
1079                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
1080                         return 1;
1081         }
1082
1083         static_call(kvm_x86_set_cr4)(vcpu, cr4);
1084
1085         kvm_post_set_cr4(vcpu, old_cr4, cr4);
1086
1087         return 0;
1088 }
1089 EXPORT_SYMBOL_GPL(kvm_set_cr4);
1090
1091 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
1092 {
1093         bool skip_tlb_flush = false;
1094 #ifdef CONFIG_X86_64
1095         bool pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
1096
1097         if (pcid_enabled) {
1098                 skip_tlb_flush = cr3 & X86_CR3_PCID_NOFLUSH;
1099                 cr3 &= ~X86_CR3_PCID_NOFLUSH;
1100         }
1101 #endif
1102
1103         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
1104                 if (!skip_tlb_flush) {
1105                         kvm_mmu_sync_roots(vcpu);
1106                         kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
1107                 }
1108                 return 0;
1109         }
1110
1111         /*
1112          * Do not condition the GPA check on long mode, this helper is used to
1113          * stuff CR3, e.g. for RSM emulation, and there is no guarantee that
1114          * the current vCPU mode is accurate.
1115          */
1116         if (kvm_vcpu_is_illegal_gpa(vcpu, cr3))
1117                 return 1;
1118
1119         if (is_pae_paging(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
1120                 return 1;
1121
1122         kvm_mmu_new_pgd(vcpu, cr3, skip_tlb_flush, skip_tlb_flush);
1123         vcpu->arch.cr3 = cr3;
1124         kvm_register_mark_available(vcpu, VCPU_EXREG_CR3);
1125
1126         return 0;
1127 }
1128 EXPORT_SYMBOL_GPL(kvm_set_cr3);
1129
1130 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
1131 {
1132         if (cr8 & CR8_RESERVED_BITS)
1133                 return 1;
1134         if (lapic_in_kernel(vcpu))
1135                 kvm_lapic_set_tpr(vcpu, cr8);
1136         else
1137                 vcpu->arch.cr8 = cr8;
1138         return 0;
1139 }
1140 EXPORT_SYMBOL_GPL(kvm_set_cr8);
1141
1142 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
1143 {
1144         if (lapic_in_kernel(vcpu))
1145                 return kvm_lapic_get_cr8(vcpu);
1146         else
1147                 return vcpu->arch.cr8;
1148 }
1149 EXPORT_SYMBOL_GPL(kvm_get_cr8);
1150
1151 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
1152 {
1153         int i;
1154
1155         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
1156                 for (i = 0; i < KVM_NR_DB_REGS; i++)
1157                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
1158                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_RELOAD;
1159         }
1160 }
1161
1162 void kvm_update_dr7(struct kvm_vcpu *vcpu)
1163 {
1164         unsigned long dr7;
1165
1166         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
1167                 dr7 = vcpu->arch.guest_debug_dr7;
1168         else
1169                 dr7 = vcpu->arch.dr7;
1170         static_call(kvm_x86_set_dr7)(vcpu, dr7);
1171         vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
1172         if (dr7 & DR7_BP_EN_MASK)
1173                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
1174 }
1175 EXPORT_SYMBOL_GPL(kvm_update_dr7);
1176
1177 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
1178 {
1179         u64 fixed = DR6_FIXED_1;
1180
1181         if (!guest_cpuid_has(vcpu, X86_FEATURE_RTM))
1182                 fixed |= DR6_RTM;
1183
1184         if (!guest_cpuid_has(vcpu, X86_FEATURE_BUS_LOCK_DETECT))
1185                 fixed |= DR6_BUS_LOCK;
1186         return fixed;
1187 }
1188
1189 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
1190 {
1191         size_t size = ARRAY_SIZE(vcpu->arch.db);
1192
1193         switch (dr) {
1194         case 0 ... 3:
1195                 vcpu->arch.db[array_index_nospec(dr, size)] = val;
1196                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
1197                         vcpu->arch.eff_db[dr] = val;
1198                 break;
1199         case 4:
1200         case 6:
1201                 if (!kvm_dr6_valid(val))
1202                         return 1; /* #GP */
1203                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
1204                 break;
1205         case 5:
1206         default: /* 7 */
1207                 if (!kvm_dr7_valid(val))
1208                         return 1; /* #GP */
1209                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
1210                 kvm_update_dr7(vcpu);
1211                 break;
1212         }
1213
1214         return 0;
1215 }
1216 EXPORT_SYMBOL_GPL(kvm_set_dr);
1217
1218 void kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
1219 {
1220         size_t size = ARRAY_SIZE(vcpu->arch.db);
1221
1222         switch (dr) {
1223         case 0 ... 3:
1224                 *val = vcpu->arch.db[array_index_nospec(dr, size)];
1225                 break;
1226         case 4:
1227         case 6:
1228                 *val = vcpu->arch.dr6;
1229                 break;
1230         case 5:
1231         default: /* 7 */
1232                 *val = vcpu->arch.dr7;
1233                 break;
1234         }
1235 }
1236 EXPORT_SYMBOL_GPL(kvm_get_dr);
1237
1238 int kvm_emulate_rdpmc(struct kvm_vcpu *vcpu)
1239 {
1240         u32 ecx = kvm_rcx_read(vcpu);
1241         u64 data;
1242
1243         if (kvm_pmu_rdpmc(vcpu, ecx, &data)) {
1244                 kvm_inject_gp(vcpu, 0);
1245                 return 1;
1246         }
1247
1248         kvm_rax_write(vcpu, (u32)data);
1249         kvm_rdx_write(vcpu, data >> 32);
1250         return kvm_skip_emulated_instruction(vcpu);
1251 }
1252 EXPORT_SYMBOL_GPL(kvm_emulate_rdpmc);
1253
1254 /*
1255  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
1256  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
1257  *
1258  * The three MSR lists(msrs_to_save, emulated_msrs, msr_based_features)
1259  * extract the supported MSRs from the related const lists.
1260  * msrs_to_save is selected from the msrs_to_save_all to reflect the
1261  * capabilities of the host cpu. This capabilities test skips MSRs that are
1262  * kvm-specific. Those are put in emulated_msrs_all; filtering of emulated_msrs
1263  * may depend on host virtualization features rather than host cpu features.
1264  */
1265
1266 static const u32 msrs_to_save_all[] = {
1267         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
1268         MSR_STAR,
1269 #ifdef CONFIG_X86_64
1270         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
1271 #endif
1272         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
1273         MSR_IA32_FEAT_CTL, MSR_IA32_BNDCFGS, MSR_TSC_AUX,
1274         MSR_IA32_SPEC_CTRL,
1275         MSR_IA32_RTIT_CTL, MSR_IA32_RTIT_STATUS, MSR_IA32_RTIT_CR3_MATCH,
1276         MSR_IA32_RTIT_OUTPUT_BASE, MSR_IA32_RTIT_OUTPUT_MASK,
1277         MSR_IA32_RTIT_ADDR0_A, MSR_IA32_RTIT_ADDR0_B,
1278         MSR_IA32_RTIT_ADDR1_A, MSR_IA32_RTIT_ADDR1_B,
1279         MSR_IA32_RTIT_ADDR2_A, MSR_IA32_RTIT_ADDR2_B,
1280         MSR_IA32_RTIT_ADDR3_A, MSR_IA32_RTIT_ADDR3_B,
1281         MSR_IA32_UMWAIT_CONTROL,
1282
1283         MSR_ARCH_PERFMON_FIXED_CTR0, MSR_ARCH_PERFMON_FIXED_CTR1,
1284         MSR_ARCH_PERFMON_FIXED_CTR0 + 2, MSR_ARCH_PERFMON_FIXED_CTR0 + 3,
1285         MSR_CORE_PERF_FIXED_CTR_CTRL, MSR_CORE_PERF_GLOBAL_STATUS,
1286         MSR_CORE_PERF_GLOBAL_CTRL, MSR_CORE_PERF_GLOBAL_OVF_CTRL,
1287         MSR_ARCH_PERFMON_PERFCTR0, MSR_ARCH_PERFMON_PERFCTR1,
1288         MSR_ARCH_PERFMON_PERFCTR0 + 2, MSR_ARCH_PERFMON_PERFCTR0 + 3,
1289         MSR_ARCH_PERFMON_PERFCTR0 + 4, MSR_ARCH_PERFMON_PERFCTR0 + 5,
1290         MSR_ARCH_PERFMON_PERFCTR0 + 6, MSR_ARCH_PERFMON_PERFCTR0 + 7,
1291         MSR_ARCH_PERFMON_PERFCTR0 + 8, MSR_ARCH_PERFMON_PERFCTR0 + 9,
1292         MSR_ARCH_PERFMON_PERFCTR0 + 10, MSR_ARCH_PERFMON_PERFCTR0 + 11,
1293         MSR_ARCH_PERFMON_PERFCTR0 + 12, MSR_ARCH_PERFMON_PERFCTR0 + 13,
1294         MSR_ARCH_PERFMON_PERFCTR0 + 14, MSR_ARCH_PERFMON_PERFCTR0 + 15,
1295         MSR_ARCH_PERFMON_PERFCTR0 + 16, MSR_ARCH_PERFMON_PERFCTR0 + 17,
1296         MSR_ARCH_PERFMON_EVENTSEL0, MSR_ARCH_PERFMON_EVENTSEL1,
1297         MSR_ARCH_PERFMON_EVENTSEL0 + 2, MSR_ARCH_PERFMON_EVENTSEL0 + 3,
1298         MSR_ARCH_PERFMON_EVENTSEL0 + 4, MSR_ARCH_PERFMON_EVENTSEL0 + 5,
1299         MSR_ARCH_PERFMON_EVENTSEL0 + 6, MSR_ARCH_PERFMON_EVENTSEL0 + 7,
1300         MSR_ARCH_PERFMON_EVENTSEL0 + 8, MSR_ARCH_PERFMON_EVENTSEL0 + 9,
1301         MSR_ARCH_PERFMON_EVENTSEL0 + 10, MSR_ARCH_PERFMON_EVENTSEL0 + 11,
1302         MSR_ARCH_PERFMON_EVENTSEL0 + 12, MSR_ARCH_PERFMON_EVENTSEL0 + 13,
1303         MSR_ARCH_PERFMON_EVENTSEL0 + 14, MSR_ARCH_PERFMON_EVENTSEL0 + 15,
1304         MSR_ARCH_PERFMON_EVENTSEL0 + 16, MSR_ARCH_PERFMON_EVENTSEL0 + 17,
1305 };
1306
1307 static u32 msrs_to_save[ARRAY_SIZE(msrs_to_save_all)];
1308 static unsigned num_msrs_to_save;
1309
1310 static const u32 emulated_msrs_all[] = {
1311         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
1312         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
1313         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
1314         HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
1315         HV_X64_MSR_TSC_FREQUENCY, HV_X64_MSR_APIC_FREQUENCY,
1316         HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
1317         HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
1318         HV_X64_MSR_RESET,
1319         HV_X64_MSR_VP_INDEX,
1320         HV_X64_MSR_VP_RUNTIME,
1321         HV_X64_MSR_SCONTROL,
1322         HV_X64_MSR_STIMER0_CONFIG,
1323         HV_X64_MSR_VP_ASSIST_PAGE,
1324         HV_X64_MSR_REENLIGHTENMENT_CONTROL, HV_X64_MSR_TSC_EMULATION_CONTROL,
1325         HV_X64_MSR_TSC_EMULATION_STATUS,
1326         HV_X64_MSR_SYNDBG_OPTIONS,
1327         HV_X64_MSR_SYNDBG_CONTROL, HV_X64_MSR_SYNDBG_STATUS,
1328         HV_X64_MSR_SYNDBG_SEND_BUFFER, HV_X64_MSR_SYNDBG_RECV_BUFFER,
1329         HV_X64_MSR_SYNDBG_PENDING_BUFFER,
1330
1331         MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
1332         MSR_KVM_PV_EOI_EN, MSR_KVM_ASYNC_PF_INT, MSR_KVM_ASYNC_PF_ACK,
1333
1334         MSR_IA32_TSC_ADJUST,
1335         MSR_IA32_TSC_DEADLINE,
1336         MSR_IA32_ARCH_CAPABILITIES,
1337         MSR_IA32_PERF_CAPABILITIES,
1338         MSR_IA32_MISC_ENABLE,
1339         MSR_IA32_MCG_STATUS,
1340         MSR_IA32_MCG_CTL,
1341         MSR_IA32_MCG_EXT_CTL,
1342         MSR_IA32_SMBASE,
1343         MSR_SMI_COUNT,
1344         MSR_PLATFORM_INFO,
1345         MSR_MISC_FEATURES_ENABLES,
1346         MSR_AMD64_VIRT_SPEC_CTRL,
1347         MSR_IA32_POWER_CTL,
1348         MSR_IA32_UCODE_REV,
1349
1350         /*
1351          * The following list leaves out MSRs whose values are determined
1352          * by arch/x86/kvm/vmx/nested.c based on CPUID or other MSRs.
1353          * We always support the "true" VMX control MSRs, even if the host
1354          * processor does not, so I am putting these registers here rather
1355          * than in msrs_to_save_all.
1356          */
1357         MSR_IA32_VMX_BASIC,
1358         MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1359         MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1360         MSR_IA32_VMX_TRUE_EXIT_CTLS,
1361         MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1362         MSR_IA32_VMX_MISC,
1363         MSR_IA32_VMX_CR0_FIXED0,
1364         MSR_IA32_VMX_CR4_FIXED0,
1365         MSR_IA32_VMX_VMCS_ENUM,
1366         MSR_IA32_VMX_PROCBASED_CTLS2,
1367         MSR_IA32_VMX_EPT_VPID_CAP,
1368         MSR_IA32_VMX_VMFUNC,
1369
1370         MSR_K7_HWCR,
1371         MSR_KVM_POLL_CONTROL,
1372 };
1373
1374 static u32 emulated_msrs[ARRAY_SIZE(emulated_msrs_all)];
1375 static unsigned num_emulated_msrs;
1376
1377 /*
1378  * List of msr numbers which are used to expose MSR-based features that
1379  * can be used by a hypervisor to validate requested CPU features.
1380  */
1381 static const u32 msr_based_features_all[] = {
1382         MSR_IA32_VMX_BASIC,
1383         MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1384         MSR_IA32_VMX_PINBASED_CTLS,
1385         MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1386         MSR_IA32_VMX_PROCBASED_CTLS,
1387         MSR_IA32_VMX_TRUE_EXIT_CTLS,
1388         MSR_IA32_VMX_EXIT_CTLS,
1389         MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1390         MSR_IA32_VMX_ENTRY_CTLS,
1391         MSR_IA32_VMX_MISC,
1392         MSR_IA32_VMX_CR0_FIXED0,
1393         MSR_IA32_VMX_CR0_FIXED1,
1394         MSR_IA32_VMX_CR4_FIXED0,
1395         MSR_IA32_VMX_CR4_FIXED1,
1396         MSR_IA32_VMX_VMCS_ENUM,
1397         MSR_IA32_VMX_PROCBASED_CTLS2,
1398         MSR_IA32_VMX_EPT_VPID_CAP,
1399         MSR_IA32_VMX_VMFUNC,
1400
1401         MSR_F10H_DECFG,
1402         MSR_IA32_UCODE_REV,
1403         MSR_IA32_ARCH_CAPABILITIES,
1404         MSR_IA32_PERF_CAPABILITIES,
1405 };
1406
1407 static u32 msr_based_features[ARRAY_SIZE(msr_based_features_all)];
1408 static unsigned int num_msr_based_features;
1409
1410 static u64 kvm_get_arch_capabilities(void)
1411 {
1412         u64 data = 0;
1413
1414         if (boot_cpu_has(X86_FEATURE_ARCH_CAPABILITIES))
1415                 rdmsrl(MSR_IA32_ARCH_CAPABILITIES, data);
1416
1417         /*
1418          * If nx_huge_pages is enabled, KVM's shadow paging will ensure that
1419          * the nested hypervisor runs with NX huge pages.  If it is not,
1420          * L1 is anyway vulnerable to ITLB_MULTIHIT exploits from other
1421          * L1 guests, so it need not worry about its own (L2) guests.
1422          */
1423         data |= ARCH_CAP_PSCHANGE_MC_NO;
1424
1425         /*
1426          * If we're doing cache flushes (either "always" or "cond")
1427          * we will do one whenever the guest does a vmlaunch/vmresume.
1428          * If an outer hypervisor is doing the cache flush for us
1429          * (VMENTER_L1D_FLUSH_NESTED_VM), we can safely pass that
1430          * capability to the guest too, and if EPT is disabled we're not
1431          * vulnerable.  Overall, only VMENTER_L1D_FLUSH_NEVER will
1432          * require a nested hypervisor to do a flush of its own.
1433          */
1434         if (l1tf_vmx_mitigation != VMENTER_L1D_FLUSH_NEVER)
1435                 data |= ARCH_CAP_SKIP_VMENTRY_L1DFLUSH;
1436
1437         if (!boot_cpu_has_bug(X86_BUG_CPU_MELTDOWN))
1438                 data |= ARCH_CAP_RDCL_NO;
1439         if (!boot_cpu_has_bug(X86_BUG_SPEC_STORE_BYPASS))
1440                 data |= ARCH_CAP_SSB_NO;
1441         if (!boot_cpu_has_bug(X86_BUG_MDS))
1442                 data |= ARCH_CAP_MDS_NO;
1443
1444         if (!boot_cpu_has(X86_FEATURE_RTM)) {
1445                 /*
1446                  * If RTM=0 because the kernel has disabled TSX, the host might
1447                  * have TAA_NO or TSX_CTRL.  Clear TAA_NO (the guest sees RTM=0
1448                  * and therefore knows that there cannot be TAA) but keep
1449                  * TSX_CTRL: some buggy userspaces leave it set on tsx=on hosts,
1450                  * and we want to allow migrating those guests to tsx=off hosts.
1451                  */
1452                 data &= ~ARCH_CAP_TAA_NO;
1453         } else if (!boot_cpu_has_bug(X86_BUG_TAA)) {
1454                 data |= ARCH_CAP_TAA_NO;
1455         } else {
1456                 /*
1457                  * Nothing to do here; we emulate TSX_CTRL if present on the
1458                  * host so the guest can choose between disabling TSX or
1459                  * using VERW to clear CPU buffers.
1460                  */
1461         }
1462
1463         return data;
1464 }
1465
1466 static int kvm_get_msr_feature(struct kvm_msr_entry *msr)
1467 {
1468         switch (msr->index) {
1469         case MSR_IA32_ARCH_CAPABILITIES:
1470                 msr->data = kvm_get_arch_capabilities();
1471                 break;
1472         case MSR_IA32_UCODE_REV:
1473                 rdmsrl_safe(msr->index, &msr->data);
1474                 break;
1475         default:
1476                 return static_call(kvm_x86_get_msr_feature)(msr);
1477         }
1478         return 0;
1479 }
1480
1481 static int do_get_msr_feature(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1482 {
1483         struct kvm_msr_entry msr;
1484         int r;
1485
1486         msr.index = index;
1487         r = kvm_get_msr_feature(&msr);
1488
1489         if (r == KVM_MSR_RET_INVALID) {
1490                 /* Unconditionally clear the output for simplicity */
1491                 *data = 0;
1492                 if (kvm_msr_ignored_check(index, 0, false))
1493                         r = 0;
1494         }
1495
1496         if (r)
1497                 return r;
1498
1499         *data = msr.data;
1500
1501         return 0;
1502 }
1503
1504 static bool __kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1505 {
1506         if (efer & EFER_FFXSR && !guest_cpuid_has(vcpu, X86_FEATURE_FXSR_OPT))
1507                 return false;
1508
1509         if (efer & EFER_SVME && !guest_cpuid_has(vcpu, X86_FEATURE_SVM))
1510                 return false;
1511
1512         if (efer & (EFER_LME | EFER_LMA) &&
1513             !guest_cpuid_has(vcpu, X86_FEATURE_LM))
1514                 return false;
1515
1516         if (efer & EFER_NX && !guest_cpuid_has(vcpu, X86_FEATURE_NX))
1517                 return false;
1518
1519         return true;
1520
1521 }
1522 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1523 {
1524         if (efer & efer_reserved_bits)
1525                 return false;
1526
1527         return __kvm_valid_efer(vcpu, efer);
1528 }
1529 EXPORT_SYMBOL_GPL(kvm_valid_efer);
1530
1531 static int set_efer(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
1532 {
1533         u64 old_efer = vcpu->arch.efer;
1534         u64 efer = msr_info->data;
1535         int r;
1536
1537         if (efer & efer_reserved_bits)
1538                 return 1;
1539
1540         if (!msr_info->host_initiated) {
1541                 if (!__kvm_valid_efer(vcpu, efer))
1542                         return 1;
1543
1544                 if (is_paging(vcpu) &&
1545                     (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1546                         return 1;
1547         }
1548
1549         efer &= ~EFER_LMA;
1550         efer |= vcpu->arch.efer & EFER_LMA;
1551
1552         r = static_call(kvm_x86_set_efer)(vcpu, efer);
1553         if (r) {
1554                 WARN_ON(r > 0);
1555                 return r;
1556         }
1557
1558         /* Update reserved bits */
1559         if ((efer ^ old_efer) & EFER_NX)
1560                 kvm_mmu_reset_context(vcpu);
1561
1562         return 0;
1563 }
1564
1565 void kvm_enable_efer_bits(u64 mask)
1566 {
1567        efer_reserved_bits &= ~mask;
1568 }
1569 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1570
1571 bool kvm_msr_allowed(struct kvm_vcpu *vcpu, u32 index, u32 type)
1572 {
1573         struct kvm_x86_msr_filter *msr_filter;
1574         struct msr_bitmap_range *ranges;
1575         struct kvm *kvm = vcpu->kvm;
1576         bool allowed;
1577         int idx;
1578         u32 i;
1579
1580         /* x2APIC MSRs do not support filtering. */
1581         if (index >= 0x800 && index <= 0x8ff)
1582                 return true;
1583
1584         idx = srcu_read_lock(&kvm->srcu);
1585
1586         msr_filter = srcu_dereference(kvm->arch.msr_filter, &kvm->srcu);
1587         if (!msr_filter) {
1588                 allowed = true;
1589                 goto out;
1590         }
1591
1592         allowed = msr_filter->default_allow;
1593         ranges = msr_filter->ranges;
1594
1595         for (i = 0; i < msr_filter->count; i++) {
1596                 u32 start = ranges[i].base;
1597                 u32 end = start + ranges[i].nmsrs;
1598                 u32 flags = ranges[i].flags;
1599                 unsigned long *bitmap = ranges[i].bitmap;
1600
1601                 if ((index >= start) && (index < end) && (flags & type)) {
1602                         allowed = !!test_bit(index - start, bitmap);
1603                         break;
1604                 }
1605         }
1606
1607 out:
1608         srcu_read_unlock(&kvm->srcu, idx);
1609
1610         return allowed;
1611 }
1612 EXPORT_SYMBOL_GPL(kvm_msr_allowed);
1613
1614 /*
1615  * Write @data into the MSR specified by @index.  Select MSR specific fault
1616  * checks are bypassed if @host_initiated is %true.
1617  * Returns 0 on success, non-0 otherwise.
1618  * Assumes vcpu_load() was already called.
1619  */
1620 static int __kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data,
1621                          bool host_initiated)
1622 {
1623         struct msr_data msr;
1624
1625         if (!host_initiated && !kvm_msr_allowed(vcpu, index, KVM_MSR_FILTER_WRITE))
1626                 return KVM_MSR_RET_FILTERED;
1627
1628         switch (index) {
1629         case MSR_FS_BASE:
1630         case MSR_GS_BASE:
1631         case MSR_KERNEL_GS_BASE:
1632         case MSR_CSTAR:
1633         case MSR_LSTAR:
1634                 if (is_noncanonical_address(data, vcpu))
1635                         return 1;
1636                 break;
1637         case MSR_IA32_SYSENTER_EIP:
1638         case MSR_IA32_SYSENTER_ESP:
1639                 /*
1640                  * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1641                  * non-canonical address is written on Intel but not on
1642                  * AMD (which ignores the top 32-bits, because it does
1643                  * not implement 64-bit SYSENTER).
1644                  *
1645                  * 64-bit code should hence be able to write a non-canonical
1646                  * value on AMD.  Making the address canonical ensures that
1647                  * vmentry does not fail on Intel after writing a non-canonical
1648                  * value, and that something deterministic happens if the guest
1649                  * invokes 64-bit SYSENTER.
1650                  */
1651                 data = get_canonical(data, vcpu_virt_addr_bits(vcpu));
1652                 break;
1653         case MSR_TSC_AUX:
1654                 if (!kvm_is_supported_user_return_msr(MSR_TSC_AUX))
1655                         return 1;
1656
1657                 if (!host_initiated &&
1658                     !guest_cpuid_has(vcpu, X86_FEATURE_RDTSCP) &&
1659                     !guest_cpuid_has(vcpu, X86_FEATURE_RDPID))
1660                         return 1;
1661
1662                 /*
1663                  * Per Intel's SDM, bits 63:32 are reserved, but AMD's APM has
1664                  * incomplete and conflicting architectural behavior.  Current
1665                  * AMD CPUs completely ignore bits 63:32, i.e. they aren't
1666                  * reserved and always read as zeros.  Enforce Intel's reserved
1667                  * bits check if and only if the guest CPU is Intel, and clear
1668                  * the bits in all other cases.  This ensures cross-vendor
1669                  * migration will provide consistent behavior for the guest.
1670                  */
1671                 if (guest_cpuid_is_intel(vcpu) && (data >> 32) != 0)
1672                         return 1;
1673
1674                 data = (u32)data;
1675                 break;
1676         }
1677
1678         msr.data = data;
1679         msr.index = index;
1680         msr.host_initiated = host_initiated;
1681
1682         return static_call(kvm_x86_set_msr)(vcpu, &msr);
1683 }
1684
1685 static int kvm_set_msr_ignored_check(struct kvm_vcpu *vcpu,
1686                                      u32 index, u64 data, bool host_initiated)
1687 {
1688         int ret = __kvm_set_msr(vcpu, index, data, host_initiated);
1689
1690         if (ret == KVM_MSR_RET_INVALID)
1691                 if (kvm_msr_ignored_check(index, data, true))
1692                         ret = 0;
1693
1694         return ret;
1695 }
1696
1697 /*
1698  * Read the MSR specified by @index into @data.  Select MSR specific fault
1699  * checks are bypassed if @host_initiated is %true.
1700  * Returns 0 on success, non-0 otherwise.
1701  * Assumes vcpu_load() was already called.
1702  */
1703 int __kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data,
1704                   bool host_initiated)
1705 {
1706         struct msr_data msr;
1707         int ret;
1708
1709         if (!host_initiated && !kvm_msr_allowed(vcpu, index, KVM_MSR_FILTER_READ))
1710                 return KVM_MSR_RET_FILTERED;
1711
1712         switch (index) {
1713         case MSR_TSC_AUX:
1714                 if (!kvm_is_supported_user_return_msr(MSR_TSC_AUX))
1715                         return 1;
1716
1717                 if (!host_initiated &&
1718                     !guest_cpuid_has(vcpu, X86_FEATURE_RDTSCP) &&
1719                     !guest_cpuid_has(vcpu, X86_FEATURE_RDPID))
1720                         return 1;
1721                 break;
1722         }
1723
1724         msr.index = index;
1725         msr.host_initiated = host_initiated;
1726
1727         ret = static_call(kvm_x86_get_msr)(vcpu, &msr);
1728         if (!ret)
1729                 *data = msr.data;
1730         return ret;
1731 }
1732
1733 static int kvm_get_msr_ignored_check(struct kvm_vcpu *vcpu,
1734                                      u32 index, u64 *data, bool host_initiated)
1735 {
1736         int ret = __kvm_get_msr(vcpu, index, data, host_initiated);
1737
1738         if (ret == KVM_MSR_RET_INVALID) {
1739                 /* Unconditionally clear *data for simplicity */
1740                 *data = 0;
1741                 if (kvm_msr_ignored_check(index, 0, false))
1742                         ret = 0;
1743         }
1744
1745         return ret;
1746 }
1747
1748 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data)
1749 {
1750         return kvm_get_msr_ignored_check(vcpu, index, data, false);
1751 }
1752 EXPORT_SYMBOL_GPL(kvm_get_msr);
1753
1754 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data)
1755 {
1756         return kvm_set_msr_ignored_check(vcpu, index, data, false);
1757 }
1758 EXPORT_SYMBOL_GPL(kvm_set_msr);
1759
1760 static int complete_emulated_rdmsr(struct kvm_vcpu *vcpu)
1761 {
1762         int err = vcpu->run->msr.error;
1763         if (!err) {
1764                 kvm_rax_write(vcpu, (u32)vcpu->run->msr.data);
1765                 kvm_rdx_write(vcpu, vcpu->run->msr.data >> 32);
1766         }
1767
1768         return static_call(kvm_x86_complete_emulated_msr)(vcpu, err);
1769 }
1770
1771 static int complete_emulated_wrmsr(struct kvm_vcpu *vcpu)
1772 {
1773         return static_call(kvm_x86_complete_emulated_msr)(vcpu, vcpu->run->msr.error);
1774 }
1775
1776 static u64 kvm_msr_reason(int r)
1777 {
1778         switch (r) {
1779         case KVM_MSR_RET_INVALID:
1780                 return KVM_MSR_EXIT_REASON_UNKNOWN;
1781         case KVM_MSR_RET_FILTERED:
1782                 return KVM_MSR_EXIT_REASON_FILTER;
1783         default:
1784                 return KVM_MSR_EXIT_REASON_INVAL;
1785         }
1786 }
1787
1788 static int kvm_msr_user_space(struct kvm_vcpu *vcpu, u32 index,
1789                               u32 exit_reason, u64 data,
1790                               int (*completion)(struct kvm_vcpu *vcpu),
1791                               int r)
1792 {
1793         u64 msr_reason = kvm_msr_reason(r);
1794
1795         /* Check if the user wanted to know about this MSR fault */
1796         if (!(vcpu->kvm->arch.user_space_msr_mask & msr_reason))
1797                 return 0;
1798
1799         vcpu->run->exit_reason = exit_reason;
1800         vcpu->run->msr.error = 0;
1801         memset(vcpu->run->msr.pad, 0, sizeof(vcpu->run->msr.pad));
1802         vcpu->run->msr.reason = msr_reason;
1803         vcpu->run->msr.index = index;
1804         vcpu->run->msr.data = data;
1805         vcpu->arch.complete_userspace_io = completion;
1806
1807         return 1;
1808 }
1809
1810 static int kvm_get_msr_user_space(struct kvm_vcpu *vcpu, u32 index, int r)
1811 {
1812         return kvm_msr_user_space(vcpu, index, KVM_EXIT_X86_RDMSR, 0,
1813                                    complete_emulated_rdmsr, r);
1814 }
1815
1816 static int kvm_set_msr_user_space(struct kvm_vcpu *vcpu, u32 index, u64 data, int r)
1817 {
1818         return kvm_msr_user_space(vcpu, index, KVM_EXIT_X86_WRMSR, data,
1819                                    complete_emulated_wrmsr, r);
1820 }
1821
1822 int kvm_emulate_rdmsr(struct kvm_vcpu *vcpu)
1823 {
1824         u32 ecx = kvm_rcx_read(vcpu);
1825         u64 data;
1826         int r;
1827
1828         r = kvm_get_msr(vcpu, ecx, &data);
1829
1830         /* MSR read failed? See if we should ask user space */
1831         if (r && kvm_get_msr_user_space(vcpu, ecx, r)) {
1832                 /* Bounce to user space */
1833                 return 0;
1834         }
1835
1836         if (!r) {
1837                 trace_kvm_msr_read(ecx, data);
1838
1839                 kvm_rax_write(vcpu, data & -1u);
1840                 kvm_rdx_write(vcpu, (data >> 32) & -1u);
1841         } else {
1842                 trace_kvm_msr_read_ex(ecx);
1843         }
1844
1845         return static_call(kvm_x86_complete_emulated_msr)(vcpu, r);
1846 }
1847 EXPORT_SYMBOL_GPL(kvm_emulate_rdmsr);
1848
1849 int kvm_emulate_wrmsr(struct kvm_vcpu *vcpu)
1850 {
1851         u32 ecx = kvm_rcx_read(vcpu);
1852         u64 data = kvm_read_edx_eax(vcpu);
1853         int r;
1854
1855         r = kvm_set_msr(vcpu, ecx, data);
1856
1857         /* MSR write failed? See if we should ask user space */
1858         if (r && kvm_set_msr_user_space(vcpu, ecx, data, r))
1859                 /* Bounce to user space */
1860                 return 0;
1861
1862         /* Signal all other negative errors to userspace */
1863         if (r < 0)
1864                 return r;
1865
1866         if (!r)
1867                 trace_kvm_msr_write(ecx, data);
1868         else
1869                 trace_kvm_msr_write_ex(ecx, data);
1870
1871         return static_call(kvm_x86_complete_emulated_msr)(vcpu, r);
1872 }
1873 EXPORT_SYMBOL_GPL(kvm_emulate_wrmsr);
1874
1875 int kvm_emulate_as_nop(struct kvm_vcpu *vcpu)
1876 {
1877         return kvm_skip_emulated_instruction(vcpu);
1878 }
1879 EXPORT_SYMBOL_GPL(kvm_emulate_as_nop);
1880
1881 int kvm_emulate_invd(struct kvm_vcpu *vcpu)
1882 {
1883         /* Treat an INVD instruction as a NOP and just skip it. */
1884         return kvm_emulate_as_nop(vcpu);
1885 }
1886 EXPORT_SYMBOL_GPL(kvm_emulate_invd);
1887
1888 int kvm_emulate_mwait(struct kvm_vcpu *vcpu)
1889 {
1890         pr_warn_once("kvm: MWAIT instruction emulated as NOP!\n");
1891         return kvm_emulate_as_nop(vcpu);
1892 }
1893 EXPORT_SYMBOL_GPL(kvm_emulate_mwait);
1894
1895 int kvm_handle_invalid_op(struct kvm_vcpu *vcpu)
1896 {
1897         kvm_queue_exception(vcpu, UD_VECTOR);
1898         return 1;
1899 }
1900 EXPORT_SYMBOL_GPL(kvm_handle_invalid_op);
1901
1902 int kvm_emulate_monitor(struct kvm_vcpu *vcpu)
1903 {
1904         pr_warn_once("kvm: MONITOR instruction emulated as NOP!\n");
1905         return kvm_emulate_as_nop(vcpu);
1906 }
1907 EXPORT_SYMBOL_GPL(kvm_emulate_monitor);
1908
1909 static inline bool kvm_vcpu_exit_request(struct kvm_vcpu *vcpu)
1910 {
1911         xfer_to_guest_mode_prepare();
1912         return vcpu->mode == EXITING_GUEST_MODE || kvm_request_pending(vcpu) ||
1913                 xfer_to_guest_mode_work_pending();
1914 }
1915
1916 /*
1917  * The fast path for frequent and performance sensitive wrmsr emulation,
1918  * i.e. the sending of IPI, sending IPI early in the VM-Exit flow reduces
1919  * the latency of virtual IPI by avoiding the expensive bits of transitioning
1920  * from guest to host, e.g. reacquiring KVM's SRCU lock. In contrast to the
1921  * other cases which must be called after interrupts are enabled on the host.
1922  */
1923 static int handle_fastpath_set_x2apic_icr_irqoff(struct kvm_vcpu *vcpu, u64 data)
1924 {
1925         if (!lapic_in_kernel(vcpu) || !apic_x2apic_mode(vcpu->arch.apic))
1926                 return 1;
1927
1928         if (((data & APIC_SHORT_MASK) == APIC_DEST_NOSHORT) &&
1929                 ((data & APIC_DEST_MASK) == APIC_DEST_PHYSICAL) &&
1930                 ((data & APIC_MODE_MASK) == APIC_DM_FIXED) &&
1931                 ((u32)(data >> 32) != X2APIC_BROADCAST)) {
1932
1933                 data &= ~(1 << 12);
1934                 kvm_apic_send_ipi(vcpu->arch.apic, (u32)data, (u32)(data >> 32));
1935                 kvm_lapic_set_reg(vcpu->arch.apic, APIC_ICR2, (u32)(data >> 32));
1936                 kvm_lapic_set_reg(vcpu->arch.apic, APIC_ICR, (u32)data);
1937                 trace_kvm_apic_write(APIC_ICR, (u32)data);
1938                 return 0;
1939         }
1940
1941         return 1;
1942 }
1943
1944 static int handle_fastpath_set_tscdeadline(struct kvm_vcpu *vcpu, u64 data)
1945 {
1946         if (!kvm_can_use_hv_timer(vcpu))
1947                 return 1;
1948
1949         kvm_set_lapic_tscdeadline_msr(vcpu, data);
1950         return 0;
1951 }
1952
1953 fastpath_t handle_fastpath_set_msr_irqoff(struct kvm_vcpu *vcpu)
1954 {
1955         u32 msr = kvm_rcx_read(vcpu);
1956         u64 data;
1957         fastpath_t ret = EXIT_FASTPATH_NONE;
1958
1959         switch (msr) {
1960         case APIC_BASE_MSR + (APIC_ICR >> 4):
1961                 data = kvm_read_edx_eax(vcpu);
1962                 if (!handle_fastpath_set_x2apic_icr_irqoff(vcpu, data)) {
1963                         kvm_skip_emulated_instruction(vcpu);
1964                         ret = EXIT_FASTPATH_EXIT_HANDLED;
1965                 }
1966                 break;
1967         case MSR_IA32_TSC_DEADLINE:
1968                 data = kvm_read_edx_eax(vcpu);
1969                 if (!handle_fastpath_set_tscdeadline(vcpu, data)) {
1970                         kvm_skip_emulated_instruction(vcpu);
1971                         ret = EXIT_FASTPATH_REENTER_GUEST;
1972                 }
1973                 break;
1974         default:
1975                 break;
1976         }
1977
1978         if (ret != EXIT_FASTPATH_NONE)
1979                 trace_kvm_msr_write(msr, data);
1980
1981         return ret;
1982 }
1983 EXPORT_SYMBOL_GPL(handle_fastpath_set_msr_irqoff);
1984
1985 /*
1986  * Adapt set_msr() to msr_io()'s calling convention
1987  */
1988 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1989 {
1990         return kvm_get_msr_ignored_check(vcpu, index, data, true);
1991 }
1992
1993 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1994 {
1995         return kvm_set_msr_ignored_check(vcpu, index, *data, true);
1996 }
1997
1998 #ifdef CONFIG_X86_64
1999 struct pvclock_clock {
2000         int vclock_mode;
2001         u64 cycle_last;
2002         u64 mask;
2003         u32 mult;
2004         u32 shift;
2005         u64 base_cycles;
2006         u64 offset;
2007 };
2008
2009 struct pvclock_gtod_data {
2010         seqcount_t      seq;
2011
2012         struct pvclock_clock clock; /* extract of a clocksource struct */
2013         struct pvclock_clock raw_clock; /* extract of a clocksource struct */
2014
2015         ktime_t         offs_boot;
2016         u64             wall_time_sec;
2017 };
2018
2019 static struct pvclock_gtod_data pvclock_gtod_data;
2020
2021 static void update_pvclock_gtod(struct timekeeper *tk)
2022 {
2023         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
2024
2025         write_seqcount_begin(&vdata->seq);
2026
2027         /* copy pvclock gtod data */
2028         vdata->clock.vclock_mode        = tk->tkr_mono.clock->vdso_clock_mode;
2029         vdata->clock.cycle_last         = tk->tkr_mono.cycle_last;
2030         vdata->clock.mask               = tk->tkr_mono.mask;
2031         vdata->clock.mult               = tk->tkr_mono.mult;
2032         vdata->clock.shift              = tk->tkr_mono.shift;
2033         vdata->clock.base_cycles        = tk->tkr_mono.xtime_nsec;
2034         vdata->clock.offset             = tk->tkr_mono.base;
2035
2036         vdata->raw_clock.vclock_mode    = tk->tkr_raw.clock->vdso_clock_mode;
2037         vdata->raw_clock.cycle_last     = tk->tkr_raw.cycle_last;
2038         vdata->raw_clock.mask           = tk->tkr_raw.mask;
2039         vdata->raw_clock.mult           = tk->tkr_raw.mult;
2040         vdata->raw_clock.shift          = tk->tkr_raw.shift;
2041         vdata->raw_clock.base_cycles    = tk->tkr_raw.xtime_nsec;
2042         vdata->raw_clock.offset         = tk->tkr_raw.base;
2043
2044         vdata->wall_time_sec            = tk->xtime_sec;
2045
2046         vdata->offs_boot                = tk->offs_boot;
2047
2048         write_seqcount_end(&vdata->seq);
2049 }
2050
2051 static s64 get_kvmclock_base_ns(void)
2052 {
2053         /* Count up from boot time, but with the frequency of the raw clock.  */
2054         return ktime_to_ns(ktime_add(ktime_get_raw(), pvclock_gtod_data.offs_boot));
2055 }
2056 #else
2057 static s64 get_kvmclock_base_ns(void)
2058 {
2059         /* Master clock not used, so we can just use CLOCK_BOOTTIME.  */
2060         return ktime_get_boottime_ns();
2061 }
2062 #endif
2063
2064 void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock, int sec_hi_ofs)
2065 {
2066         int version;
2067         int r;
2068         struct pvclock_wall_clock wc;
2069         u32 wc_sec_hi;
2070         u64 wall_nsec;
2071
2072         if (!wall_clock)
2073                 return;
2074
2075         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
2076         if (r)
2077                 return;
2078
2079         if (version & 1)
2080                 ++version;  /* first time write, random junk */
2081
2082         ++version;
2083
2084         if (kvm_write_guest(kvm, wall_clock, &version, sizeof(version)))
2085                 return;
2086
2087         /*
2088          * The guest calculates current wall clock time by adding
2089          * system time (updated by kvm_guest_time_update below) to the
2090          * wall clock specified here.  We do the reverse here.
2091          */
2092         wall_nsec = ktime_get_real_ns() - get_kvmclock_ns(kvm);
2093
2094         wc.nsec = do_div(wall_nsec, 1000000000);
2095         wc.sec = (u32)wall_nsec; /* overflow in 2106 guest time */
2096         wc.version = version;
2097
2098         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
2099
2100         if (sec_hi_ofs) {
2101                 wc_sec_hi = wall_nsec >> 32;
2102                 kvm_write_guest(kvm, wall_clock + sec_hi_ofs,
2103                                 &wc_sec_hi, sizeof(wc_sec_hi));
2104         }
2105
2106         version++;
2107         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
2108 }
2109
2110 static void kvm_write_system_time(struct kvm_vcpu *vcpu, gpa_t system_time,
2111                                   bool old_msr, bool host_initiated)
2112 {
2113         struct kvm_arch *ka = &vcpu->kvm->arch;
2114
2115         if (vcpu->vcpu_id == 0 && !host_initiated) {
2116                 if (ka->boot_vcpu_runs_old_kvmclock != old_msr)
2117                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2118
2119                 ka->boot_vcpu_runs_old_kvmclock = old_msr;
2120         }
2121
2122         vcpu->arch.time = system_time;
2123         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2124
2125         /* we verify if the enable bit is set... */
2126         vcpu->arch.pv_time_enabled = false;
2127         if (!(system_time & 1))
2128                 return;
2129
2130         if (!kvm_gfn_to_hva_cache_init(vcpu->kvm,
2131                                        &vcpu->arch.pv_time, system_time & ~1ULL,
2132                                        sizeof(struct pvclock_vcpu_time_info)))
2133                 vcpu->arch.pv_time_enabled = true;
2134
2135         return;
2136 }
2137
2138 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
2139 {
2140         do_shl32_div32(dividend, divisor);
2141         return dividend;
2142 }
2143
2144 static void kvm_get_time_scale(uint64_t scaled_hz, uint64_t base_hz,
2145                                s8 *pshift, u32 *pmultiplier)
2146 {
2147         uint64_t scaled64;
2148         int32_t  shift = 0;
2149         uint64_t tps64;
2150         uint32_t tps32;
2151
2152         tps64 = base_hz;
2153         scaled64 = scaled_hz;
2154         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
2155                 tps64 >>= 1;
2156                 shift--;
2157         }
2158
2159         tps32 = (uint32_t)tps64;
2160         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
2161                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
2162                         scaled64 >>= 1;
2163                 else
2164                         tps32 <<= 1;
2165                 shift++;
2166         }
2167
2168         *pshift = shift;
2169         *pmultiplier = div_frac(scaled64, tps32);
2170 }
2171
2172 #ifdef CONFIG_X86_64
2173 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
2174 #endif
2175
2176 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
2177 static unsigned long max_tsc_khz;
2178
2179 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
2180 {
2181         u64 v = (u64)khz * (1000000 + ppm);
2182         do_div(v, 1000000);
2183         return v;
2184 }
2185
2186 static void kvm_vcpu_write_tsc_multiplier(struct kvm_vcpu *vcpu, u64 l1_multiplier);
2187
2188 static int set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale)
2189 {
2190         u64 ratio;
2191
2192         /* Guest TSC same frequency as host TSC? */
2193         if (!scale) {
2194                 kvm_vcpu_write_tsc_multiplier(vcpu, kvm_default_tsc_scaling_ratio);
2195                 return 0;
2196         }
2197
2198         /* TSC scaling supported? */
2199         if (!kvm_has_tsc_control) {
2200                 if (user_tsc_khz > tsc_khz) {
2201                         vcpu->arch.tsc_catchup = 1;
2202                         vcpu->arch.tsc_always_catchup = 1;
2203                         return 0;
2204                 } else {
2205                         pr_warn_ratelimited("user requested TSC rate below hardware speed\n");
2206                         return -1;
2207                 }
2208         }
2209
2210         /* TSC scaling required  - calculate ratio */
2211         ratio = mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits,
2212                                 user_tsc_khz, tsc_khz);
2213
2214         if (ratio == 0 || ratio >= kvm_max_tsc_scaling_ratio) {
2215                 pr_warn_ratelimited("Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
2216                                     user_tsc_khz);
2217                 return -1;
2218         }
2219
2220         kvm_vcpu_write_tsc_multiplier(vcpu, ratio);
2221         return 0;
2222 }
2223
2224 static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz)
2225 {
2226         u32 thresh_lo, thresh_hi;
2227         int use_scaling = 0;
2228
2229         /* tsc_khz can be zero if TSC calibration fails */
2230         if (user_tsc_khz == 0) {
2231                 /* set tsc_scaling_ratio to a safe value */
2232                 kvm_vcpu_write_tsc_multiplier(vcpu, kvm_default_tsc_scaling_ratio);
2233                 return -1;
2234         }
2235
2236         /* Compute a scale to convert nanoseconds in TSC cycles */
2237         kvm_get_time_scale(user_tsc_khz * 1000LL, NSEC_PER_SEC,
2238                            &vcpu->arch.virtual_tsc_shift,
2239                            &vcpu->arch.virtual_tsc_mult);
2240         vcpu->arch.virtual_tsc_khz = user_tsc_khz;
2241
2242         /*
2243          * Compute the variation in TSC rate which is acceptable
2244          * within the range of tolerance and decide if the
2245          * rate being applied is within that bounds of the hardware
2246          * rate.  If so, no scaling or compensation need be done.
2247          */
2248         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
2249         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
2250         if (user_tsc_khz < thresh_lo || user_tsc_khz > thresh_hi) {
2251                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz, thresh_lo, thresh_hi);
2252                 use_scaling = 1;
2253         }
2254         return set_tsc_khz(vcpu, user_tsc_khz, use_scaling);
2255 }
2256
2257 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
2258 {
2259         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
2260                                       vcpu->arch.virtual_tsc_mult,
2261                                       vcpu->arch.virtual_tsc_shift);
2262         tsc += vcpu->arch.this_tsc_write;
2263         return tsc;
2264 }
2265
2266 static inline int gtod_is_based_on_tsc(int mode)
2267 {
2268         return mode == VDSO_CLOCKMODE_TSC || mode == VDSO_CLOCKMODE_HVCLOCK;
2269 }
2270
2271 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
2272 {
2273 #ifdef CONFIG_X86_64
2274         bool vcpus_matched;
2275         struct kvm_arch *ka = &vcpu->kvm->arch;
2276         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2277
2278         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
2279                          atomic_read(&vcpu->kvm->online_vcpus));
2280
2281         /*
2282          * Once the masterclock is enabled, always perform request in
2283          * order to update it.
2284          *
2285          * In order to enable masterclock, the host clocksource must be TSC
2286          * and the vcpus need to have matched TSCs.  When that happens,
2287          * perform request to enable masterclock.
2288          */
2289         if (ka->use_master_clock ||
2290             (gtod_is_based_on_tsc(gtod->clock.vclock_mode) && vcpus_matched))
2291                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2292
2293         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
2294                             atomic_read(&vcpu->kvm->online_vcpus),
2295                             ka->use_master_clock, gtod->clock.vclock_mode);
2296 #endif
2297 }
2298
2299 /*
2300  * Multiply tsc by a fixed point number represented by ratio.
2301  *
2302  * The most significant 64-N bits (mult) of ratio represent the
2303  * integral part of the fixed point number; the remaining N bits
2304  * (frac) represent the fractional part, ie. ratio represents a fixed
2305  * point number (mult + frac * 2^(-N)).
2306  *
2307  * N equals to kvm_tsc_scaling_ratio_frac_bits.
2308  */
2309 static inline u64 __scale_tsc(u64 ratio, u64 tsc)
2310 {
2311         return mul_u64_u64_shr(tsc, ratio, kvm_tsc_scaling_ratio_frac_bits);
2312 }
2313
2314 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc, u64 ratio)
2315 {
2316         u64 _tsc = tsc;
2317
2318         if (ratio != kvm_default_tsc_scaling_ratio)
2319                 _tsc = __scale_tsc(ratio, tsc);
2320
2321         return _tsc;
2322 }
2323 EXPORT_SYMBOL_GPL(kvm_scale_tsc);
2324
2325 static u64 kvm_compute_l1_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
2326 {
2327         u64 tsc;
2328
2329         tsc = kvm_scale_tsc(vcpu, rdtsc(), vcpu->arch.l1_tsc_scaling_ratio);
2330
2331         return target_tsc - tsc;
2332 }
2333
2334 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc)
2335 {
2336         return vcpu->arch.l1_tsc_offset +
2337                 kvm_scale_tsc(vcpu, host_tsc, vcpu->arch.l1_tsc_scaling_ratio);
2338 }
2339 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc);
2340
2341 u64 kvm_calc_nested_tsc_offset(u64 l1_offset, u64 l2_offset, u64 l2_multiplier)
2342 {
2343         u64 nested_offset;
2344
2345         if (l2_multiplier == kvm_default_tsc_scaling_ratio)
2346                 nested_offset = l1_offset;
2347         else
2348                 nested_offset = mul_s64_u64_shr((s64) l1_offset, l2_multiplier,
2349                                                 kvm_tsc_scaling_ratio_frac_bits);
2350
2351         nested_offset += l2_offset;
2352         return nested_offset;
2353 }
2354 EXPORT_SYMBOL_GPL(kvm_calc_nested_tsc_offset);
2355
2356 u64 kvm_calc_nested_tsc_multiplier(u64 l1_multiplier, u64 l2_multiplier)
2357 {
2358         if (l2_multiplier != kvm_default_tsc_scaling_ratio)
2359                 return mul_u64_u64_shr(l1_multiplier, l2_multiplier,
2360                                        kvm_tsc_scaling_ratio_frac_bits);
2361
2362         return l1_multiplier;
2363 }
2364 EXPORT_SYMBOL_GPL(kvm_calc_nested_tsc_multiplier);
2365
2366 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu *vcpu, u64 l1_offset)
2367 {
2368         trace_kvm_write_tsc_offset(vcpu->vcpu_id,
2369                                    vcpu->arch.l1_tsc_offset,
2370                                    l1_offset);
2371
2372         vcpu->arch.l1_tsc_offset = l1_offset;
2373
2374         /*
2375          * If we are here because L1 chose not to trap WRMSR to TSC then
2376          * according to the spec this should set L1's TSC (as opposed to
2377          * setting L1's offset for L2).
2378          */
2379         if (is_guest_mode(vcpu))
2380                 vcpu->arch.tsc_offset = kvm_calc_nested_tsc_offset(
2381                         l1_offset,
2382                         static_call(kvm_x86_get_l2_tsc_offset)(vcpu),
2383                         static_call(kvm_x86_get_l2_tsc_multiplier)(vcpu));
2384         else
2385                 vcpu->arch.tsc_offset = l1_offset;
2386
2387         static_call(kvm_x86_write_tsc_offset)(vcpu, vcpu->arch.tsc_offset);
2388 }
2389
2390 static void kvm_vcpu_write_tsc_multiplier(struct kvm_vcpu *vcpu, u64 l1_multiplier)
2391 {
2392         vcpu->arch.l1_tsc_scaling_ratio = l1_multiplier;
2393
2394         /* Userspace is changing the multiplier while L2 is active */
2395         if (is_guest_mode(vcpu))
2396                 vcpu->arch.tsc_scaling_ratio = kvm_calc_nested_tsc_multiplier(
2397                         l1_multiplier,
2398                         static_call(kvm_x86_get_l2_tsc_multiplier)(vcpu));
2399         else
2400                 vcpu->arch.tsc_scaling_ratio = l1_multiplier;
2401
2402         if (kvm_has_tsc_control)
2403                 static_call(kvm_x86_write_tsc_multiplier)(
2404                         vcpu, vcpu->arch.tsc_scaling_ratio);
2405 }
2406
2407 static inline bool kvm_check_tsc_unstable(void)
2408 {
2409 #ifdef CONFIG_X86_64
2410         /*
2411          * TSC is marked unstable when we're running on Hyper-V,
2412          * 'TSC page' clocksource is good.
2413          */
2414         if (pvclock_gtod_data.clock.vclock_mode == VDSO_CLOCKMODE_HVCLOCK)
2415                 return false;
2416 #endif
2417         return check_tsc_unstable();
2418 }
2419
2420 static void kvm_synchronize_tsc(struct kvm_vcpu *vcpu, u64 data)
2421 {
2422         struct kvm *kvm = vcpu->kvm;
2423         u64 offset, ns, elapsed;
2424         unsigned long flags;
2425         bool matched;
2426         bool already_matched;
2427         bool synchronizing = false;
2428
2429         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
2430         offset = kvm_compute_l1_tsc_offset(vcpu, data);
2431         ns = get_kvmclock_base_ns();
2432         elapsed = ns - kvm->arch.last_tsc_nsec;
2433
2434         if (vcpu->arch.virtual_tsc_khz) {
2435                 if (data == 0) {
2436                         /*
2437                          * detection of vcpu initialization -- need to sync
2438                          * with other vCPUs. This particularly helps to keep
2439                          * kvm_clock stable after CPU hotplug
2440                          */
2441                         synchronizing = true;
2442                 } else {
2443                         u64 tsc_exp = kvm->arch.last_tsc_write +
2444                                                 nsec_to_cycles(vcpu, elapsed);
2445                         u64 tsc_hz = vcpu->arch.virtual_tsc_khz * 1000LL;
2446                         /*
2447                          * Special case: TSC write with a small delta (1 second)
2448                          * of virtual cycle time against real time is
2449                          * interpreted as an attempt to synchronize the CPU.
2450                          */
2451                         synchronizing = data < tsc_exp + tsc_hz &&
2452                                         data + tsc_hz > tsc_exp;
2453                 }
2454         }
2455
2456         /*
2457          * For a reliable TSC, we can match TSC offsets, and for an unstable
2458          * TSC, we add elapsed time in this computation.  We could let the
2459          * compensation code attempt to catch up if we fall behind, but
2460          * it's better to try to match offsets from the beginning.
2461          */
2462         if (synchronizing &&
2463             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
2464                 if (!kvm_check_tsc_unstable()) {
2465                         offset = kvm->arch.cur_tsc_offset;
2466                 } else {
2467                         u64 delta = nsec_to_cycles(vcpu, elapsed);
2468                         data += delta;
2469                         offset = kvm_compute_l1_tsc_offset(vcpu, data);
2470                 }
2471                 matched = true;
2472                 already_matched = (vcpu->arch.this_tsc_generation == kvm->arch.cur_tsc_generation);
2473         } else {
2474                 /*
2475                  * We split periods of matched TSC writes into generations.
2476                  * For each generation, we track the original measured
2477                  * nanosecond time, offset, and write, so if TSCs are in
2478                  * sync, we can match exact offset, and if not, we can match
2479                  * exact software computation in compute_guest_tsc()
2480                  *
2481                  * These values are tracked in kvm->arch.cur_xxx variables.
2482                  */
2483                 kvm->arch.cur_tsc_generation++;
2484                 kvm->arch.cur_tsc_nsec = ns;
2485                 kvm->arch.cur_tsc_write = data;
2486                 kvm->arch.cur_tsc_offset = offset;
2487                 matched = false;
2488         }
2489
2490         /*
2491          * We also track th most recent recorded KHZ, write and time to
2492          * allow the matching interval to be extended at each write.
2493          */
2494         kvm->arch.last_tsc_nsec = ns;
2495         kvm->arch.last_tsc_write = data;
2496         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
2497
2498         vcpu->arch.last_guest_tsc = data;
2499
2500         /* Keep track of which generation this VCPU has synchronized to */
2501         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
2502         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
2503         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
2504
2505         kvm_vcpu_write_tsc_offset(vcpu, offset);
2506         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
2507
2508         spin_lock_irqsave(&kvm->arch.pvclock_gtod_sync_lock, flags);
2509         if (!matched) {
2510                 kvm->arch.nr_vcpus_matched_tsc = 0;
2511         } else if (!already_matched) {
2512                 kvm->arch.nr_vcpus_matched_tsc++;
2513         }
2514
2515         kvm_track_tsc_matching(vcpu);
2516         spin_unlock_irqrestore(&kvm->arch.pvclock_gtod_sync_lock, flags);
2517 }
2518
2519 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
2520                                            s64 adjustment)
2521 {
2522         u64 tsc_offset = vcpu->arch.l1_tsc_offset;
2523         kvm_vcpu_write_tsc_offset(vcpu, tsc_offset + adjustment);
2524 }
2525
2526 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
2527 {
2528         if (vcpu->arch.l1_tsc_scaling_ratio != kvm_default_tsc_scaling_ratio)
2529                 WARN_ON(adjustment < 0);
2530         adjustment = kvm_scale_tsc(vcpu, (u64) adjustment,
2531                                    vcpu->arch.l1_tsc_scaling_ratio);
2532         adjust_tsc_offset_guest(vcpu, adjustment);
2533 }
2534
2535 #ifdef CONFIG_X86_64
2536
2537 static u64 read_tsc(void)
2538 {
2539         u64 ret = (u64)rdtsc_ordered();
2540         u64 last = pvclock_gtod_data.clock.cycle_last;
2541
2542         if (likely(ret >= last))
2543                 return ret;
2544
2545         /*
2546          * GCC likes to generate cmov here, but this branch is extremely
2547          * predictable (it's just a function of time and the likely is
2548          * very likely) and there's a data dependence, so force GCC
2549          * to generate a branch instead.  I don't barrier() because
2550          * we don't actually need a barrier, and if this function
2551          * ever gets inlined it will generate worse code.
2552          */
2553         asm volatile ("");
2554         return last;
2555 }
2556
2557 static inline u64 vgettsc(struct pvclock_clock *clock, u64 *tsc_timestamp,
2558                           int *mode)
2559 {
2560         long v;
2561         u64 tsc_pg_val;
2562
2563         switch (clock->vclock_mode) {
2564         case VDSO_CLOCKMODE_HVCLOCK:
2565                 tsc_pg_val = hv_read_tsc_page_tsc(hv_get_tsc_page(),
2566                                                   tsc_timestamp);
2567                 if (tsc_pg_val != U64_MAX) {
2568                         /* TSC page valid */
2569                         *mode = VDSO_CLOCKMODE_HVCLOCK;
2570                         v = (tsc_pg_val - clock->cycle_last) &
2571                                 clock->mask;
2572                 } else {
2573                         /* TSC page invalid */
2574                         *mode = VDSO_CLOCKMODE_NONE;
2575                 }
2576                 break;
2577         case VDSO_CLOCKMODE_TSC:
2578                 *mode = VDSO_CLOCKMODE_TSC;
2579                 *tsc_timestamp = read_tsc();
2580                 v = (*tsc_timestamp - clock->cycle_last) &
2581                         clock->mask;
2582                 break;
2583         default:
2584                 *mode = VDSO_CLOCKMODE_NONE;
2585         }
2586
2587         if (*mode == VDSO_CLOCKMODE_NONE)
2588                 *tsc_timestamp = v = 0;
2589
2590         return v * clock->mult;
2591 }
2592
2593 static int do_monotonic_raw(s64 *t, u64 *tsc_timestamp)
2594 {
2595         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2596         unsigned long seq;
2597         int mode;
2598         u64 ns;
2599
2600         do {
2601                 seq = read_seqcount_begin(&gtod->seq);
2602                 ns = gtod->raw_clock.base_cycles;
2603                 ns += vgettsc(&gtod->raw_clock, tsc_timestamp, &mode);
2604                 ns >>= gtod->raw_clock.shift;
2605                 ns += ktime_to_ns(ktime_add(gtod->raw_clock.offset, gtod->offs_boot));
2606         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
2607         *t = ns;
2608
2609         return mode;
2610 }
2611
2612 static int do_realtime(struct timespec64 *ts, u64 *tsc_timestamp)
2613 {
2614         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2615         unsigned long seq;
2616         int mode;
2617         u64 ns;
2618
2619         do {
2620                 seq = read_seqcount_begin(&gtod->seq);
2621                 ts->tv_sec = gtod->wall_time_sec;
2622                 ns = gtod->clock.base_cycles;
2623                 ns += vgettsc(&gtod->clock, tsc_timestamp, &mode);
2624                 ns >>= gtod->clock.shift;
2625         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
2626
2627         ts->tv_sec += __iter_div_u64_rem(ns, NSEC_PER_SEC, &ns);
2628         ts->tv_nsec = ns;
2629
2630         return mode;
2631 }
2632
2633 /* returns true if host is using TSC based clocksource */
2634 static bool kvm_get_time_and_clockread(s64 *kernel_ns, u64 *tsc_timestamp)
2635 {
2636         /* checked again under seqlock below */
2637         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2638                 return false;
2639
2640         return gtod_is_based_on_tsc(do_monotonic_raw(kernel_ns,
2641                                                       tsc_timestamp));
2642 }
2643
2644 /* returns true if host is using TSC based clocksource */
2645 static bool kvm_get_walltime_and_clockread(struct timespec64 *ts,
2646                                            u64 *tsc_timestamp)
2647 {
2648         /* checked again under seqlock below */
2649         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2650                 return false;
2651
2652         return gtod_is_based_on_tsc(do_realtime(ts, tsc_timestamp));
2653 }
2654 #endif
2655
2656 /*
2657  *
2658  * Assuming a stable TSC across physical CPUS, and a stable TSC
2659  * across virtual CPUs, the following condition is possible.
2660  * Each numbered line represents an event visible to both
2661  * CPUs at the next numbered event.
2662  *
2663  * "timespecX" represents host monotonic time. "tscX" represents
2664  * RDTSC value.
2665  *
2666  *              VCPU0 on CPU0           |       VCPU1 on CPU1
2667  *
2668  * 1.  read timespec0,tsc0
2669  * 2.                                   | timespec1 = timespec0 + N
2670  *                                      | tsc1 = tsc0 + M
2671  * 3. transition to guest               | transition to guest
2672  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
2673  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
2674  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
2675  *
2676  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
2677  *
2678  *      - ret0 < ret1
2679  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
2680  *              ...
2681  *      - 0 < N - M => M < N
2682  *
2683  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
2684  * always the case (the difference between two distinct xtime instances
2685  * might be smaller then the difference between corresponding TSC reads,
2686  * when updating guest vcpus pvclock areas).
2687  *
2688  * To avoid that problem, do not allow visibility of distinct
2689  * system_timestamp/tsc_timestamp values simultaneously: use a master
2690  * copy of host monotonic time values. Update that master copy
2691  * in lockstep.
2692  *
2693  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
2694  *
2695  */
2696
2697 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
2698 {
2699 #ifdef CONFIG_X86_64
2700         struct kvm_arch *ka = &kvm->arch;
2701         int vclock_mode;
2702         bool host_tsc_clocksource, vcpus_matched;
2703
2704         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
2705                         atomic_read(&kvm->online_vcpus));
2706
2707         /*
2708          * If the host uses TSC clock, then passthrough TSC as stable
2709          * to the guest.
2710          */
2711         host_tsc_clocksource = kvm_get_time_and_clockread(
2712                                         &ka->master_kernel_ns,
2713                                         &ka->master_cycle_now);
2714
2715         ka->use_master_clock = host_tsc_clocksource && vcpus_matched
2716                                 && !ka->backwards_tsc_observed
2717                                 && !ka->boot_vcpu_runs_old_kvmclock;
2718
2719         if (ka->use_master_clock)
2720                 atomic_set(&kvm_guest_has_master_clock, 1);
2721
2722         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
2723         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
2724                                         vcpus_matched);
2725 #endif
2726 }
2727
2728 void kvm_make_mclock_inprogress_request(struct kvm *kvm)
2729 {
2730         kvm_make_all_cpus_request(kvm, KVM_REQ_MCLOCK_INPROGRESS);
2731 }
2732
2733 static void kvm_gen_update_masterclock(struct kvm *kvm)
2734 {
2735 #ifdef CONFIG_X86_64
2736         int i;
2737         struct kvm_vcpu *vcpu;
2738         struct kvm_arch *ka = &kvm->arch;
2739         unsigned long flags;
2740
2741         kvm_hv_invalidate_tsc_page(kvm);
2742
2743         kvm_make_mclock_inprogress_request(kvm);
2744
2745         /* no guest entries from this point */
2746         spin_lock_irqsave(&ka->pvclock_gtod_sync_lock, flags);
2747         pvclock_update_vm_gtod_copy(kvm);
2748         spin_unlock_irqrestore(&ka->pvclock_gtod_sync_lock, flags);
2749
2750         kvm_for_each_vcpu(i, vcpu, kvm)
2751                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2752
2753         /* guest entries allowed */
2754         kvm_for_each_vcpu(i, vcpu, kvm)
2755                 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
2756 #endif
2757 }
2758
2759 u64 get_kvmclock_ns(struct kvm *kvm)
2760 {
2761         struct kvm_arch *ka = &kvm->arch;
2762         struct pvclock_vcpu_time_info hv_clock;
2763         unsigned long flags;
2764         u64 ret;
2765
2766         spin_lock_irqsave(&ka->pvclock_gtod_sync_lock, flags);
2767         if (!ka->use_master_clock) {
2768                 spin_unlock_irqrestore(&ka->pvclock_gtod_sync_lock, flags);
2769                 return get_kvmclock_base_ns() + ka->kvmclock_offset;
2770         }
2771
2772         hv_clock.tsc_timestamp = ka->master_cycle_now;
2773         hv_clock.system_time = ka->master_kernel_ns + ka->kvmclock_offset;
2774         spin_unlock_irqrestore(&ka->pvclock_gtod_sync_lock, flags);
2775
2776         /* both __this_cpu_read() and rdtsc() should be on the same cpu */
2777         get_cpu();
2778
2779         if (__this_cpu_read(cpu_tsc_khz)) {
2780                 kvm_get_time_scale(NSEC_PER_SEC, __this_cpu_read(cpu_tsc_khz) * 1000LL,
2781                                    &hv_clock.tsc_shift,
2782                                    &hv_clock.tsc_to_system_mul);
2783                 ret = __pvclock_read_cycles(&hv_clock, rdtsc());
2784         } else
2785                 ret = get_kvmclock_base_ns() + ka->kvmclock_offset;
2786
2787         put_cpu();
2788
2789         return ret;
2790 }
2791
2792 static void kvm_setup_pvclock_page(struct kvm_vcpu *v,
2793                                    struct gfn_to_hva_cache *cache,
2794                                    unsigned int offset)
2795 {
2796         struct kvm_vcpu_arch *vcpu = &v->arch;
2797         struct pvclock_vcpu_time_info guest_hv_clock;
2798
2799         if (unlikely(kvm_read_guest_offset_cached(v->kvm, cache,
2800                 &guest_hv_clock, offset, sizeof(guest_hv_clock))))
2801                 return;
2802
2803         /* This VCPU is paused, but it's legal for a guest to read another
2804          * VCPU's kvmclock, so we really have to follow the specification where
2805          * it says that version is odd if data is being modified, and even after
2806          * it is consistent.
2807          *
2808          * Version field updates must be kept separate.  This is because
2809          * kvm_write_guest_cached might use a "rep movs" instruction, and
2810          * writes within a string instruction are weakly ordered.  So there
2811          * are three writes overall.
2812          *
2813          * As a small optimization, only write the version field in the first
2814          * and third write.  The vcpu->pv_time cache is still valid, because the
2815          * version field is the first in the struct.
2816          */
2817         BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info, version) != 0);
2818
2819         if (guest_hv_clock.version & 1)
2820                 ++guest_hv_clock.version;  /* first time write, random junk */
2821
2822         vcpu->hv_clock.version = guest_hv_clock.version + 1;
2823         kvm_write_guest_offset_cached(v->kvm, cache,
2824                                       &vcpu->hv_clock, offset,
2825                                       sizeof(vcpu->hv_clock.version));
2826
2827         smp_wmb();
2828
2829         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
2830         vcpu->hv_clock.flags |= (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
2831
2832         if (vcpu->pvclock_set_guest_stopped_request) {
2833                 vcpu->hv_clock.flags |= PVCLOCK_GUEST_STOPPED;
2834                 vcpu->pvclock_set_guest_stopped_request = false;
2835         }
2836
2837         trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
2838
2839         kvm_write_guest_offset_cached(v->kvm, cache,
2840                                       &vcpu->hv_clock, offset,
2841                                       sizeof(vcpu->hv_clock));
2842
2843         smp_wmb();
2844
2845         vcpu->hv_clock.version++;
2846         kvm_write_guest_offset_cached(v->kvm, cache,
2847                                      &vcpu->hv_clock, offset,
2848                                      sizeof(vcpu->hv_clock.version));
2849 }
2850
2851 static int kvm_guest_time_update(struct kvm_vcpu *v)
2852 {
2853         unsigned long flags, tgt_tsc_khz;
2854         struct kvm_vcpu_arch *vcpu = &v->arch;
2855         struct kvm_arch *ka = &v->kvm->arch;
2856         s64 kernel_ns;
2857         u64 tsc_timestamp, host_tsc;
2858         u8 pvclock_flags;
2859         bool use_master_clock;
2860
2861         kernel_ns = 0;
2862         host_tsc = 0;
2863
2864         /*
2865          * If the host uses TSC clock, then passthrough TSC as stable
2866          * to the guest.
2867          */
2868         spin_lock_irqsave(&ka->pvclock_gtod_sync_lock, flags);
2869         use_master_clock = ka->use_master_clock;
2870         if (use_master_clock) {
2871                 host_tsc = ka->master_cycle_now;
2872                 kernel_ns = ka->master_kernel_ns;
2873         }
2874         spin_unlock_irqrestore(&ka->pvclock_gtod_sync_lock, flags);
2875
2876         /* Keep irq disabled to prevent changes to the clock */
2877         local_irq_save(flags);
2878         tgt_tsc_khz = __this_cpu_read(cpu_tsc_khz);
2879         if (unlikely(tgt_tsc_khz == 0)) {
2880                 local_irq_restore(flags);
2881                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2882                 return 1;
2883         }
2884         if (!use_master_clock) {
2885                 host_tsc = rdtsc();
2886                 kernel_ns = get_kvmclock_base_ns();
2887         }
2888
2889         tsc_timestamp = kvm_read_l1_tsc(v, host_tsc);
2890
2891         /*
2892          * We may have to catch up the TSC to match elapsed wall clock
2893          * time for two reasons, even if kvmclock is used.
2894          *   1) CPU could have been running below the maximum TSC rate
2895          *   2) Broken TSC compensation resets the base at each VCPU
2896          *      entry to avoid unknown leaps of TSC even when running
2897          *      again on the same CPU.  This may cause apparent elapsed
2898          *      time to disappear, and the guest to stand still or run
2899          *      very slowly.
2900          */
2901         if (vcpu->tsc_catchup) {
2902                 u64 tsc = compute_guest_tsc(v, kernel_ns);
2903                 if (tsc > tsc_timestamp) {
2904                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
2905                         tsc_timestamp = tsc;
2906                 }
2907         }
2908
2909         local_irq_restore(flags);
2910
2911         /* With all the info we got, fill in the values */
2912
2913         if (kvm_has_tsc_control)
2914                 tgt_tsc_khz = kvm_scale_tsc(v, tgt_tsc_khz,
2915                                             v->arch.l1_tsc_scaling_ratio);
2916
2917         if (unlikely(vcpu->hw_tsc_khz != tgt_tsc_khz)) {
2918                 kvm_get_time_scale(NSEC_PER_SEC, tgt_tsc_khz * 1000LL,
2919                                    &vcpu->hv_clock.tsc_shift,
2920                                    &vcpu->hv_clock.tsc_to_system_mul);
2921                 vcpu->hw_tsc_khz = tgt_tsc_khz;
2922         }
2923
2924         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
2925         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
2926         vcpu->last_guest_tsc = tsc_timestamp;
2927
2928         /* If the host uses TSC clocksource, then it is stable */
2929         pvclock_flags = 0;
2930         if (use_master_clock)
2931                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
2932
2933         vcpu->hv_clock.flags = pvclock_flags;
2934
2935         if (vcpu->pv_time_enabled)
2936                 kvm_setup_pvclock_page(v, &vcpu->pv_time, 0);
2937         if (vcpu->xen.vcpu_info_set)
2938                 kvm_setup_pvclock_page(v, &vcpu->xen.vcpu_info_cache,
2939                                        offsetof(struct compat_vcpu_info, time));
2940         if (vcpu->xen.vcpu_time_info_set)
2941                 kvm_setup_pvclock_page(v, &vcpu->xen.vcpu_time_info_cache, 0);
2942         if (v == kvm_get_vcpu(v->kvm, 0))
2943                 kvm_hv_setup_tsc_page(v->kvm, &vcpu->hv_clock);
2944         return 0;
2945 }
2946
2947 /*
2948  * kvmclock updates which are isolated to a given vcpu, such as
2949  * vcpu->cpu migration, should not allow system_timestamp from
2950  * the rest of the vcpus to remain static. Otherwise ntp frequency
2951  * correction applies to one vcpu's system_timestamp but not
2952  * the others.
2953  *
2954  * So in those cases, request a kvmclock update for all vcpus.
2955  * We need to rate-limit these requests though, as they can
2956  * considerably slow guests that have a large number of vcpus.
2957  * The time for a remote vcpu to update its kvmclock is bound
2958  * by the delay we use to rate-limit the updates.
2959  */
2960
2961 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
2962
2963 static void kvmclock_update_fn(struct work_struct *work)
2964 {
2965         int i;
2966         struct delayed_work *dwork = to_delayed_work(work);
2967         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
2968                                            kvmclock_update_work);
2969         struct kvm *kvm = container_of(ka, struct kvm, arch);
2970         struct kvm_vcpu *vcpu;
2971
2972         kvm_for_each_vcpu(i, vcpu, kvm) {
2973                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2974                 kvm_vcpu_kick(vcpu);
2975         }
2976 }
2977
2978 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
2979 {
2980         struct kvm *kvm = v->kvm;
2981
2982         kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2983         schedule_delayed_work(&kvm->arch.kvmclock_update_work,
2984                                         KVMCLOCK_UPDATE_DELAY);
2985 }
2986
2987 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
2988
2989 static void kvmclock_sync_fn(struct work_struct *work)
2990 {
2991         struct delayed_work *dwork = to_delayed_work(work);
2992         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
2993                                            kvmclock_sync_work);
2994         struct kvm *kvm = container_of(ka, struct kvm, arch);
2995
2996         if (!kvmclock_periodic_sync)
2997                 return;
2998
2999         schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
3000         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
3001                                         KVMCLOCK_SYNC_PERIOD);
3002 }
3003
3004 /*
3005  * On AMD, HWCR[McStatusWrEn] controls whether setting MCi_STATUS results in #GP.
3006  */
3007 static bool can_set_mci_status(struct kvm_vcpu *vcpu)
3008 {
3009         /* McStatusWrEn enabled? */
3010         if (guest_cpuid_is_amd_or_hygon(vcpu))
3011                 return !!(vcpu->arch.msr_hwcr & BIT_ULL(18));
3012
3013         return false;
3014 }
3015
3016 static int set_msr_mce(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3017 {
3018         u64 mcg_cap = vcpu->arch.mcg_cap;
3019         unsigned bank_num = mcg_cap & 0xff;
3020         u32 msr = msr_info->index;
3021         u64 data = msr_info->data;
3022
3023         switch (msr) {
3024         case MSR_IA32_MCG_STATUS:
3025                 vcpu->arch.mcg_status = data;
3026                 break;
3027         case MSR_IA32_MCG_CTL:
3028                 if (!(mcg_cap & MCG_CTL_P) &&
3029                     (data || !msr_info->host_initiated))
3030                         return 1;
3031                 if (data != 0 && data != ~(u64)0)
3032                         return 1;
3033                 vcpu->arch.mcg_ctl = data;
3034                 break;
3035         default:
3036                 if (msr >= MSR_IA32_MC0_CTL &&
3037                     msr < MSR_IA32_MCx_CTL(bank_num)) {
3038                         u32 offset = array_index_nospec(
3039                                 msr - MSR_IA32_MC0_CTL,
3040                                 MSR_IA32_MCx_CTL(bank_num) - MSR_IA32_MC0_CTL);
3041
3042                         /* only 0 or all 1s can be written to IA32_MCi_CTL
3043                          * some Linux kernels though clear bit 10 in bank 4 to
3044                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
3045                          * this to avoid an uncatched #GP in the guest
3046                          */
3047                         if ((offset & 0x3) == 0 &&
3048                             data != 0 && (data | (1 << 10)) != ~(u64)0)
3049                                 return -1;
3050
3051                         /* MCi_STATUS */
3052                         if (!msr_info->host_initiated &&
3053                             (offset & 0x3) == 1 && data != 0) {
3054                                 if (!can_set_mci_status(vcpu))
3055                                         return -1;
3056                         }
3057
3058                         vcpu->arch.mce_banks[offset] = data;
3059                         break;
3060                 }
3061                 return 1;
3062         }
3063         return 0;
3064 }
3065
3066 static inline bool kvm_pv_async_pf_enabled(struct kvm_vcpu *vcpu)
3067 {
3068         u64 mask = KVM_ASYNC_PF_ENABLED | KVM_ASYNC_PF_DELIVERY_AS_INT;
3069
3070         return (vcpu->arch.apf.msr_en_val & mask) == mask;
3071 }
3072
3073 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
3074 {
3075         gpa_t gpa = data & ~0x3f;
3076
3077         /* Bits 4:5 are reserved, Should be zero */
3078         if (data & 0x30)
3079                 return 1;
3080
3081         if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_VMEXIT) &&
3082             (data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT))
3083                 return 1;
3084
3085         if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT) &&
3086             (data & KVM_ASYNC_PF_DELIVERY_AS_INT))
3087                 return 1;
3088
3089         if (!lapic_in_kernel(vcpu))
3090                 return data ? 1 : 0;
3091
3092         vcpu->arch.apf.msr_en_val = data;
3093
3094         if (!kvm_pv_async_pf_enabled(vcpu)) {
3095                 kvm_clear_async_pf_completion_queue(vcpu);
3096                 kvm_async_pf_hash_reset(vcpu);
3097                 return 0;
3098         }
3099
3100         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
3101                                         sizeof(u64)))
3102                 return 1;
3103
3104         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
3105         vcpu->arch.apf.delivery_as_pf_vmexit = data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT;
3106
3107         kvm_async_pf_wakeup_all(vcpu);
3108
3109         return 0;
3110 }
3111
3112 static int kvm_pv_enable_async_pf_int(struct kvm_vcpu *vcpu, u64 data)
3113 {
3114         /* Bits 8-63 are reserved */
3115         if (data >> 8)
3116                 return 1;
3117
3118         if (!lapic_in_kernel(vcpu))
3119                 return 1;
3120
3121         vcpu->arch.apf.msr_int_val = data;
3122
3123         vcpu->arch.apf.vec = data & KVM_ASYNC_PF_VEC_MASK;
3124
3125         return 0;
3126 }
3127
3128 static void kvmclock_reset(struct kvm_vcpu *vcpu)
3129 {
3130         vcpu->arch.pv_time_enabled = false;
3131         vcpu->arch.time = 0;
3132 }
3133
3134 static void kvm_vcpu_flush_tlb_all(struct kvm_vcpu *vcpu)
3135 {
3136         ++vcpu->stat.tlb_flush;
3137         static_call(kvm_x86_tlb_flush_all)(vcpu);
3138 }
3139
3140 static void kvm_vcpu_flush_tlb_guest(struct kvm_vcpu *vcpu)
3141 {
3142         ++vcpu->stat.tlb_flush;
3143
3144         if (!tdp_enabled) {
3145                /*
3146                  * A TLB flush on behalf of the guest is equivalent to
3147                  * INVPCID(all), toggling CR4.PGE, etc., which requires
3148                  * a forced sync of the shadow page tables.  Unload the
3149                  * entire MMU here and the subsequent load will sync the
3150                  * shadow page tables, and also flush the TLB.
3151                  */
3152                 kvm_mmu_unload(vcpu);
3153                 return;
3154         }
3155
3156         static_call(kvm_x86_tlb_flush_guest)(vcpu);
3157 }
3158
3159 static void record_steal_time(struct kvm_vcpu *vcpu)
3160 {
3161         struct kvm_host_map map;
3162         struct kvm_steal_time *st;
3163
3164         if (kvm_xen_msr_enabled(vcpu->kvm)) {
3165                 kvm_xen_runstate_set_running(vcpu);
3166                 return;
3167         }
3168
3169         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
3170                 return;
3171
3172         /* -EAGAIN is returned in atomic context so we can just return. */
3173         if (kvm_map_gfn(vcpu, vcpu->arch.st.msr_val >> PAGE_SHIFT,
3174                         &map, &vcpu->arch.st.cache, false))
3175                 return;
3176
3177         st = map.hva +
3178                 offset_in_page(vcpu->arch.st.msr_val & KVM_STEAL_VALID_BITS);
3179
3180         /*
3181          * Doing a TLB flush here, on the guest's behalf, can avoid
3182          * expensive IPIs.
3183          */
3184         if (guest_pv_has(vcpu, KVM_FEATURE_PV_TLB_FLUSH)) {
3185                 u8 st_preempted = xchg(&st->preempted, 0);
3186
3187                 trace_kvm_pv_tlb_flush(vcpu->vcpu_id,
3188                                        st_preempted & KVM_VCPU_FLUSH_TLB);
3189                 if (st_preempted & KVM_VCPU_FLUSH_TLB)
3190                         kvm_vcpu_flush_tlb_guest(vcpu);
3191         } else {
3192                 st->preempted = 0;
3193         }
3194
3195         vcpu->arch.st.preempted = 0;
3196
3197         if (st->version & 1)
3198                 st->version += 1;  /* first time write, random junk */
3199
3200         st->version += 1;
3201
3202         smp_wmb();
3203
3204         st->steal += current->sched_info.run_delay -
3205                 vcpu->arch.st.last_steal;
3206         vcpu->arch.st.last_steal = current->sched_info.run_delay;
3207
3208         smp_wmb();
3209
3210         st->version += 1;
3211
3212         kvm_unmap_gfn(vcpu, &map, &vcpu->arch.st.cache, true, false);
3213 }
3214
3215 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3216 {
3217         bool pr = false;
3218         u32 msr = msr_info->index;
3219         u64 data = msr_info->data;
3220
3221         if (msr && msr == vcpu->kvm->arch.xen_hvm_config.msr)
3222                 return kvm_xen_write_hypercall_page(vcpu, data);
3223
3224         switch (msr) {
3225         case MSR_AMD64_NB_CFG:
3226         case MSR_IA32_UCODE_WRITE:
3227         case MSR_VM_HSAVE_PA:
3228         case MSR_AMD64_PATCH_LOADER:
3229         case MSR_AMD64_BU_CFG2:
3230         case MSR_AMD64_DC_CFG:
3231         case MSR_F15H_EX_CFG:
3232                 break;
3233
3234         case MSR_IA32_UCODE_REV:
3235                 if (msr_info->host_initiated)
3236                         vcpu->arch.microcode_version = data;
3237                 break;
3238         case MSR_IA32_ARCH_CAPABILITIES:
3239                 if (!msr_info->host_initiated)
3240                         return 1;
3241                 vcpu->arch.arch_capabilities = data;
3242                 break;
3243         case MSR_IA32_PERF_CAPABILITIES: {
3244                 struct kvm_msr_entry msr_ent = {.index = msr, .data = 0};
3245
3246                 if (!msr_info->host_initiated)
3247                         return 1;
3248                 if (guest_cpuid_has(vcpu, X86_FEATURE_PDCM) && kvm_get_msr_feature(&msr_ent))
3249                         return 1;
3250                 if (data & ~msr_ent.data)
3251                         return 1;
3252
3253                 vcpu->arch.perf_capabilities = data;
3254
3255                 return 0;
3256                 }
3257         case MSR_EFER:
3258                 return set_efer(vcpu, msr_info);
3259         case MSR_K7_HWCR:
3260                 data &= ~(u64)0x40;     /* ignore flush filter disable */
3261                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
3262                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
3263
3264                 /* Handle McStatusWrEn */
3265                 if (data == BIT_ULL(18)) {
3266                         vcpu->arch.msr_hwcr = data;
3267                 } else if (data != 0) {
3268                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
3269                                     data);
3270                         return 1;
3271                 }
3272                 break;
3273         case MSR_FAM10H_MMIO_CONF_BASE:
3274                 if (data != 0) {
3275                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
3276                                     "0x%llx\n", data);
3277                         return 1;
3278                 }
3279                 break;
3280         case 0x200 ... 0x2ff:
3281                 return kvm_mtrr_set_msr(vcpu, msr, data);
3282         case MSR_IA32_APICBASE:
3283                 return kvm_set_apic_base(vcpu, msr_info);
3284         case APIC_BASE_MSR ... APIC_BASE_MSR + 0xff:
3285                 return kvm_x2apic_msr_write(vcpu, msr, data);
3286         case MSR_IA32_TSC_DEADLINE:
3287                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
3288                 break;
3289         case MSR_IA32_TSC_ADJUST:
3290                 if (guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST)) {
3291                         if (!msr_info->host_initiated) {
3292                                 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
3293                                 adjust_tsc_offset_guest(vcpu, adj);
3294                         }
3295                         vcpu->arch.ia32_tsc_adjust_msr = data;
3296                 }
3297                 break;
3298         case MSR_IA32_MISC_ENABLE:
3299                 if (!kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT) &&
3300                     ((vcpu->arch.ia32_misc_enable_msr ^ data) & MSR_IA32_MISC_ENABLE_MWAIT)) {
3301                         if (!guest_cpuid_has(vcpu, X86_FEATURE_XMM3))
3302                                 return 1;
3303                         vcpu->arch.ia32_misc_enable_msr = data;
3304                         kvm_update_cpuid_runtime(vcpu);
3305                 } else {
3306                         vcpu->arch.ia32_misc_enable_msr = data;
3307                 }
3308                 break;
3309         case MSR_IA32_SMBASE:
3310                 if (!msr_info->host_initiated)
3311                         return 1;
3312                 vcpu->arch.smbase = data;
3313                 break;
3314         case MSR_IA32_POWER_CTL:
3315                 vcpu->arch.msr_ia32_power_ctl = data;
3316                 break;
3317         case MSR_IA32_TSC:
3318                 if (msr_info->host_initiated) {
3319                         kvm_synchronize_tsc(vcpu, data);
3320                 } else {
3321                         u64 adj = kvm_compute_l1_tsc_offset(vcpu, data) - vcpu->arch.l1_tsc_offset;
3322                         adjust_tsc_offset_guest(vcpu, adj);
3323                         vcpu->arch.ia32_tsc_adjust_msr += adj;
3324                 }
3325                 break;
3326         case MSR_IA32_XSS:
3327                 if (!msr_info->host_initiated &&
3328                     !guest_cpuid_has(vcpu, X86_FEATURE_XSAVES))
3329                         return 1;
3330                 /*
3331                  * KVM supports exposing PT to the guest, but does not support
3332                  * IA32_XSS[bit 8]. Guests have to use RDMSR/WRMSR rather than
3333                  * XSAVES/XRSTORS to save/restore PT MSRs.
3334                  */
3335                 if (data & ~supported_xss)
3336                         return 1;
3337                 vcpu->arch.ia32_xss = data;
3338                 break;
3339         case MSR_SMI_COUNT:
3340                 if (!msr_info->host_initiated)
3341                         return 1;
3342                 vcpu->arch.smi_count = data;
3343                 break;
3344         case MSR_KVM_WALL_CLOCK_NEW:
3345                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3346                         return 1;
3347
3348                 vcpu->kvm->arch.wall_clock = data;
3349                 kvm_write_wall_clock(vcpu->kvm, data, 0);
3350                 break;
3351         case MSR_KVM_WALL_CLOCK:
3352                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3353                         return 1;
3354
3355                 vcpu->kvm->arch.wall_clock = data;
3356                 kvm_write_wall_clock(vcpu->kvm, data, 0);
3357                 break;
3358         case MSR_KVM_SYSTEM_TIME_NEW:
3359                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3360                         return 1;
3361
3362                 kvm_write_system_time(vcpu, data, false, msr_info->host_initiated);
3363                 break;
3364         case MSR_KVM_SYSTEM_TIME:
3365                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3366                         return 1;
3367
3368                 kvm_write_system_time(vcpu, data, true,  msr_info->host_initiated);
3369                 break;
3370         case MSR_KVM_ASYNC_PF_EN:
3371                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3372                         return 1;
3373
3374                 if (kvm_pv_enable_async_pf(vcpu, data))
3375                         return 1;
3376                 break;
3377         case MSR_KVM_ASYNC_PF_INT:
3378                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3379                         return 1;
3380
3381                 if (kvm_pv_enable_async_pf_int(vcpu, data))
3382                         return 1;
3383                 break;
3384         case MSR_KVM_ASYNC_PF_ACK:
3385                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3386                         return 1;
3387                 if (data & 0x1) {
3388                         vcpu->arch.apf.pageready_pending = false;
3389                         kvm_check_async_pf_completion(vcpu);
3390                 }
3391                 break;
3392         case MSR_KVM_STEAL_TIME:
3393                 if (!guest_pv_has(vcpu, KVM_FEATURE_STEAL_TIME))
3394                         return 1;
3395
3396                 if (unlikely(!sched_info_on()))
3397                         return 1;
3398
3399                 if (data & KVM_STEAL_RESERVED_MASK)
3400                         return 1;
3401
3402                 vcpu->arch.st.msr_val = data;
3403
3404                 if (!(data & KVM_MSR_ENABLED))
3405                         break;
3406
3407                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
3408
3409                 break;
3410         case MSR_KVM_PV_EOI_EN:
3411                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_EOI))
3412                         return 1;
3413
3414                 if (kvm_lapic_enable_pv_eoi(vcpu, data, sizeof(u8)))
3415                         return 1;
3416                 break;
3417
3418         case MSR_KVM_POLL_CONTROL:
3419                 if (!guest_pv_has(vcpu, KVM_FEATURE_POLL_CONTROL))
3420                         return 1;
3421
3422                 /* only enable bit supported */
3423                 if (data & (-1ULL << 1))
3424                         return 1;
3425
3426                 vcpu->arch.msr_kvm_poll_control = data;
3427                 break;
3428
3429         case MSR_IA32_MCG_CTL:
3430         case MSR_IA32_MCG_STATUS:
3431         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
3432                 return set_msr_mce(vcpu, msr_info);
3433
3434         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
3435         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
3436                 pr = true;
3437                 fallthrough;
3438         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
3439         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
3440                 if (kvm_pmu_is_valid_msr(vcpu, msr))
3441                         return kvm_pmu_set_msr(vcpu, msr_info);
3442
3443                 if (pr || data != 0)
3444                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
3445                                     "0x%x data 0x%llx\n", msr, data);
3446                 break;
3447         case MSR_K7_CLK_CTL:
3448                 /*
3449                  * Ignore all writes to this no longer documented MSR.
3450                  * Writes are only relevant for old K7 processors,
3451                  * all pre-dating SVM, but a recommended workaround from
3452                  * AMD for these chips. It is possible to specify the
3453                  * affected processor models on the command line, hence
3454                  * the need to ignore the workaround.
3455                  */
3456                 break;
3457         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
3458         case HV_X64_MSR_SYNDBG_CONTROL ... HV_X64_MSR_SYNDBG_PENDING_BUFFER:
3459         case HV_X64_MSR_SYNDBG_OPTIONS:
3460         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
3461         case HV_X64_MSR_CRASH_CTL:
3462         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
3463         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
3464         case HV_X64_MSR_TSC_EMULATION_CONTROL:
3465         case HV_X64_MSR_TSC_EMULATION_STATUS:
3466                 return kvm_hv_set_msr_common(vcpu, msr, data,
3467                                              msr_info->host_initiated);
3468         case MSR_IA32_BBL_CR_CTL3:
3469                 /* Drop writes to this legacy MSR -- see rdmsr
3470                  * counterpart for further detail.
3471                  */
3472                 if (report_ignored_msrs)
3473                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data 0x%llx\n",
3474                                 msr, data);
3475                 break;
3476         case MSR_AMD64_OSVW_ID_LENGTH:
3477                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3478                         return 1;
3479                 vcpu->arch.osvw.length = data;
3480                 break;
3481         case MSR_AMD64_OSVW_STATUS:
3482                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3483                         return 1;
3484                 vcpu->arch.osvw.status = data;
3485                 break;
3486         case MSR_PLATFORM_INFO:
3487                 if (!msr_info->host_initiated ||
3488                     (!(data & MSR_PLATFORM_INFO_CPUID_FAULT) &&
3489                      cpuid_fault_enabled(vcpu)))
3490                         return 1;
3491                 vcpu->arch.msr_platform_info = data;
3492                 break;
3493         case MSR_MISC_FEATURES_ENABLES:
3494                 if (data & ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT ||
3495                     (data & MSR_MISC_FEATURES_ENABLES_CPUID_FAULT &&
3496                      !supports_cpuid_fault(vcpu)))
3497                         return 1;
3498                 vcpu->arch.msr_misc_features_enables = data;
3499                 break;
3500         default:
3501                 if (kvm_pmu_is_valid_msr(vcpu, msr))
3502                         return kvm_pmu_set_msr(vcpu, msr_info);
3503                 return KVM_MSR_RET_INVALID;
3504         }
3505         return 0;
3506 }
3507 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
3508
3509 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata, bool host)
3510 {
3511         u64 data;
3512         u64 mcg_cap = vcpu->arch.mcg_cap;
3513         unsigned bank_num = mcg_cap & 0xff;
3514
3515         switch (msr) {
3516         case MSR_IA32_P5_MC_ADDR:
3517         case MSR_IA32_P5_MC_TYPE:
3518                 data = 0;
3519                 break;
3520         case MSR_IA32_MCG_CAP:
3521                 data = vcpu->arch.mcg_cap;
3522                 break;
3523         case MSR_IA32_MCG_CTL:
3524                 if (!(mcg_cap & MCG_CTL_P) && !host)
3525                         return 1;
3526                 data = vcpu->arch.mcg_ctl;
3527                 break;
3528         case MSR_IA32_MCG_STATUS:
3529                 data = vcpu->arch.mcg_status;
3530                 break;
3531         default:
3532                 if (msr >= MSR_IA32_MC0_CTL &&
3533                     msr < MSR_IA32_MCx_CTL(bank_num)) {
3534                         u32 offset = array_index_nospec(
3535                                 msr - MSR_IA32_MC0_CTL,
3536                                 MSR_IA32_MCx_CTL(bank_num) - MSR_IA32_MC0_CTL);
3537
3538                         data = vcpu->arch.mce_banks[offset];
3539                         break;
3540                 }
3541                 return 1;
3542         }
3543         *pdata = data;
3544         return 0;
3545 }
3546
3547 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3548 {
3549         switch (msr_info->index) {
3550         case MSR_IA32_PLATFORM_ID:
3551         case MSR_IA32_EBL_CR_POWERON:
3552         case MSR_IA32_LASTBRANCHFROMIP:
3553         case MSR_IA32_LASTBRANCHTOIP:
3554         case MSR_IA32_LASTINTFROMIP:
3555         case MSR_IA32_LASTINTTOIP:
3556         case MSR_K8_SYSCFG:
3557         case MSR_K8_TSEG_ADDR:
3558         case MSR_K8_TSEG_MASK:
3559         case MSR_VM_HSAVE_PA:
3560         case MSR_K8_INT_PENDING_MSG:
3561         case MSR_AMD64_NB_CFG:
3562         case MSR_FAM10H_MMIO_CONF_BASE:
3563         case MSR_AMD64_BU_CFG2:
3564         case MSR_IA32_PERF_CTL:
3565         case MSR_AMD64_DC_CFG:
3566         case MSR_F15H_EX_CFG:
3567         /*
3568          * Intel Sandy Bridge CPUs must support the RAPL (running average power
3569          * limit) MSRs. Just return 0, as we do not want to expose the host
3570          * data here. Do not conditionalize this on CPUID, as KVM does not do
3571          * so for existing CPU-specific MSRs.
3572          */
3573         case MSR_RAPL_POWER_UNIT:
3574         case MSR_PP0_ENERGY_STATUS:     /* Power plane 0 (core) */
3575         case MSR_PP1_ENERGY_STATUS:     /* Power plane 1 (graphics uncore) */
3576         case MSR_PKG_ENERGY_STATUS:     /* Total package */
3577         case MSR_DRAM_ENERGY_STATUS:    /* DRAM controller */
3578                 msr_info->data = 0;
3579                 break;
3580         case MSR_F15H_PERF_CTL0 ... MSR_F15H_PERF_CTR5:
3581                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3582                         return kvm_pmu_get_msr(vcpu, msr_info);
3583                 if (!msr_info->host_initiated)
3584                         return 1;
3585                 msr_info->data = 0;
3586                 break;
3587         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
3588         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
3589         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
3590         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
3591                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3592                         return kvm_pmu_get_msr(vcpu, msr_info);
3593                 msr_info->data = 0;
3594                 break;
3595         case MSR_IA32_UCODE_REV:
3596                 msr_info->data = vcpu->arch.microcode_version;
3597                 break;
3598         case MSR_IA32_ARCH_CAPABILITIES:
3599                 if (!msr_info->host_initiated &&
3600                     !guest_cpuid_has(vcpu, X86_FEATURE_ARCH_CAPABILITIES))
3601                         return 1;
3602                 msr_info->data = vcpu->arch.arch_capabilities;
3603                 break;
3604         case MSR_IA32_PERF_CAPABILITIES:
3605                 if (!msr_info->host_initiated &&
3606                     !guest_cpuid_has(vcpu, X86_FEATURE_PDCM))
3607                         return 1;
3608                 msr_info->data = vcpu->arch.perf_capabilities;
3609                 break;
3610         case MSR_IA32_POWER_CTL:
3611                 msr_info->data = vcpu->arch.msr_ia32_power_ctl;
3612                 break;
3613         case MSR_IA32_TSC: {
3614                 /*
3615                  * Intel SDM states that MSR_IA32_TSC read adds the TSC offset
3616                  * even when not intercepted. AMD manual doesn't explicitly
3617                  * state this but appears to behave the same.
3618                  *
3619                  * On userspace reads and writes, however, we unconditionally
3620                  * return L1's TSC value to ensure backwards-compatible
3621                  * behavior for migration.
3622                  */
3623                 u64 offset, ratio;
3624
3625                 if (msr_info->host_initiated) {
3626                         offset = vcpu->arch.l1_tsc_offset;
3627                         ratio = vcpu->arch.l1_tsc_scaling_ratio;
3628                 } else {
3629                         offset = vcpu->arch.tsc_offset;
3630                         ratio = vcpu->arch.tsc_scaling_ratio;
3631                 }
3632
3633                 msr_info->data = kvm_scale_tsc(vcpu, rdtsc(), ratio) + offset;
3634                 break;
3635         }
3636         case MSR_MTRRcap:
3637         case 0x200 ... 0x2ff:
3638                 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
3639         case 0xcd: /* fsb frequency */
3640                 msr_info->data = 3;
3641                 break;
3642                 /*
3643                  * MSR_EBC_FREQUENCY_ID
3644                  * Conservative value valid for even the basic CPU models.
3645                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
3646                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
3647                  * and 266MHz for model 3, or 4. Set Core Clock
3648                  * Frequency to System Bus Frequency Ratio to 1 (bits
3649                  * 31:24) even though these are only valid for CPU
3650                  * models > 2, however guests may end up dividing or
3651                  * multiplying by zero otherwise.
3652                  */
3653         case MSR_EBC_FREQUENCY_ID:
3654                 msr_info->data = 1 << 24;
3655                 break;
3656         case MSR_IA32_APICBASE:
3657                 msr_info->data = kvm_get_apic_base(vcpu);
3658                 break;
3659         case APIC_BASE_MSR ... APIC_BASE_MSR + 0xff:
3660                 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
3661         case MSR_IA32_TSC_DEADLINE:
3662                 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
3663                 break;
3664         case MSR_IA32_TSC_ADJUST:
3665                 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
3666                 break;
3667         case MSR_IA32_MISC_ENABLE:
3668                 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
3669                 break;
3670         case MSR_IA32_SMBASE:
3671                 if (!msr_info->host_initiated)
3672                         return 1;
3673                 msr_info->data = vcpu->arch.smbase;
3674                 break;
3675         case MSR_SMI_COUNT:
3676                 msr_info->data = vcpu->arch.smi_count;
3677                 break;
3678         case MSR_IA32_PERF_STATUS:
3679                 /* TSC increment by tick */
3680                 msr_info->data = 1000ULL;
3681                 /* CPU multiplier */
3682                 msr_info->data |= (((uint64_t)4ULL) << 40);
3683                 break;
3684         case MSR_EFER:
3685                 msr_info->data = vcpu->arch.efer;
3686                 break;
3687         case MSR_KVM_WALL_CLOCK:
3688                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3689                         return 1;
3690
3691                 msr_info->data = vcpu->kvm->arch.wall_clock;
3692                 break;
3693         case MSR_KVM_WALL_CLOCK_NEW:
3694                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3695                         return 1;
3696
3697                 msr_info->data = vcpu->kvm->arch.wall_clock;
3698                 break;
3699         case MSR_KVM_SYSTEM_TIME:
3700                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3701                         return 1;
3702
3703                 msr_info->data = vcpu->arch.time;
3704                 break;
3705         case MSR_KVM_SYSTEM_TIME_NEW:
3706                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3707                         return 1;
3708
3709                 msr_info->data = vcpu->arch.time;
3710                 break;
3711         case MSR_KVM_ASYNC_PF_EN:
3712                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3713                         return 1;
3714
3715                 msr_info->data = vcpu->arch.apf.msr_en_val;
3716                 break;
3717         case MSR_KVM_ASYNC_PF_INT:
3718                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3719                         return 1;
3720
3721                 msr_info->data = vcpu->arch.apf.msr_int_val;
3722                 break;
3723         case MSR_KVM_ASYNC_PF_ACK:
3724                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3725                         return 1;
3726
3727                 msr_info->data = 0;
3728                 break;
3729         case MSR_KVM_STEAL_TIME:
3730                 if (!guest_pv_has(vcpu, KVM_FEATURE_STEAL_TIME))
3731                         return 1;
3732
3733                 msr_info->data = vcpu->arch.st.msr_val;
3734                 break;
3735         case MSR_KVM_PV_EOI_EN:
3736                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_EOI))
3737                         return 1;
3738
3739                 msr_info->data = vcpu->arch.pv_eoi.msr_val;
3740                 break;
3741         case MSR_KVM_POLL_CONTROL:
3742                 if (!guest_pv_has(vcpu, KVM_FEATURE_POLL_CONTROL))
3743                         return 1;
3744
3745                 msr_info->data = vcpu->arch.msr_kvm_poll_control;
3746                 break;
3747         case MSR_IA32_P5_MC_ADDR:
3748         case MSR_IA32_P5_MC_TYPE:
3749         case MSR_IA32_MCG_CAP:
3750         case MSR_IA32_MCG_CTL:
3751         case MSR_IA32_MCG_STATUS:
3752         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
3753                 return get_msr_mce(vcpu, msr_info->index, &msr_info->data,
3754                                    msr_info->host_initiated);
3755         case MSR_IA32_XSS:
3756                 if (!msr_info->host_initiated &&
3757                     !guest_cpuid_has(vcpu, X86_FEATURE_XSAVES))
3758                         return 1;
3759                 msr_info->data = vcpu->arch.ia32_xss;
3760                 break;
3761         case MSR_K7_CLK_CTL:
3762                 /*
3763                  * Provide expected ramp-up count for K7. All other
3764                  * are set to zero, indicating minimum divisors for
3765                  * every field.
3766                  *
3767                  * This prevents guest kernels on AMD host with CPU
3768                  * type 6, model 8 and higher from exploding due to
3769                  * the rdmsr failing.
3770                  */
3771                 msr_info->data = 0x20000000;
3772                 break;
3773         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
3774         case HV_X64_MSR_SYNDBG_CONTROL ... HV_X64_MSR_SYNDBG_PENDING_BUFFER:
3775         case HV_X64_MSR_SYNDBG_OPTIONS:
3776         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
3777         case HV_X64_MSR_CRASH_CTL:
3778         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
3779         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
3780         case HV_X64_MSR_TSC_EMULATION_CONTROL:
3781         case HV_X64_MSR_TSC_EMULATION_STATUS:
3782                 return kvm_hv_get_msr_common(vcpu,
3783                                              msr_info->index, &msr_info->data,
3784                                              msr_info->host_initiated);
3785         case MSR_IA32_BBL_CR_CTL3:
3786                 /* This legacy MSR exists but isn't fully documented in current
3787                  * silicon.  It is however accessed by winxp in very narrow
3788                  * scenarios where it sets bit #19, itself documented as
3789                  * a "reserved" bit.  Best effort attempt to source coherent
3790                  * read data here should the balance of the register be
3791                  * interpreted by the guest:
3792                  *
3793                  * L2 cache control register 3: 64GB range, 256KB size,
3794                  * enabled, latency 0x1, configured
3795                  */
3796                 msr_info->data = 0xbe702111;
3797                 break;
3798         case MSR_AMD64_OSVW_ID_LENGTH:
3799                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3800                         return 1;
3801                 msr_info->data = vcpu->arch.osvw.length;
3802                 break;
3803         case MSR_AMD64_OSVW_STATUS:
3804                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3805                         return 1;
3806                 msr_info->data = vcpu->arch.osvw.status;
3807                 break;
3808         case MSR_PLATFORM_INFO:
3809                 if (!msr_info->host_initiated &&
3810                     !vcpu->kvm->arch.guest_can_read_msr_platform_info)
3811                         return 1;
3812                 msr_info->data = vcpu->arch.msr_platform_info;
3813                 break;
3814         case MSR_MISC_FEATURES_ENABLES:
3815                 msr_info->data = vcpu->arch.msr_misc_features_enables;
3816                 break;
3817         case MSR_K7_HWCR:
3818                 msr_info->data = vcpu->arch.msr_hwcr;
3819                 break;
3820         default:
3821                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3822                         return kvm_pmu_get_msr(vcpu, msr_info);
3823                 return KVM_MSR_RET_INVALID;
3824         }
3825         return 0;
3826 }
3827 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
3828
3829 /*
3830  * Read or write a bunch of msrs. All parameters are kernel addresses.
3831  *
3832  * @return number of msrs set successfully.
3833  */
3834 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
3835                     struct kvm_msr_entry *entries,
3836                     int (*do_msr)(struct kvm_vcpu *vcpu,
3837                                   unsigned index, u64 *data))
3838 {
3839         int i;
3840
3841         for (i = 0; i < msrs->nmsrs; ++i)
3842                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
3843                         break;
3844
3845         return i;
3846 }
3847
3848 /*
3849  * Read or write a bunch of msrs. Parameters are user addresses.
3850  *
3851  * @return number of msrs set successfully.
3852  */
3853 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
3854                   int (*do_msr)(struct kvm_vcpu *vcpu,
3855                                 unsigned index, u64 *data),
3856                   int writeback)
3857 {
3858         struct kvm_msrs msrs;
3859         struct kvm_msr_entry *entries;
3860         int r, n;
3861         unsigned size;
3862
3863         r = -EFAULT;
3864         if (copy_from_user(&msrs, user_msrs, sizeof(msrs)))
3865                 goto out;
3866
3867         r = -E2BIG;
3868         if (msrs.nmsrs >= MAX_IO_MSRS)
3869                 goto out;
3870
3871         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
3872         entries = memdup_user(user_msrs->entries, size);
3873         if (IS_ERR(entries)) {
3874                 r = PTR_ERR(entries);
3875                 goto out;
3876         }
3877
3878         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
3879         if (r < 0)
3880                 goto out_free;
3881
3882         r = -EFAULT;
3883         if (writeback && copy_to_user(user_msrs->entries, entries, size))
3884                 goto out_free;
3885
3886         r = n;
3887
3888 out_free:
3889         kfree(entries);
3890 out:
3891         return r;
3892 }
3893
3894 static inline bool kvm_can_mwait_in_guest(void)
3895 {
3896         return boot_cpu_has(X86_FEATURE_MWAIT) &&
3897                 !boot_cpu_has_bug(X86_BUG_MONITOR) &&
3898                 boot_cpu_has(X86_FEATURE_ARAT);
3899 }
3900
3901 static int kvm_ioctl_get_supported_hv_cpuid(struct kvm_vcpu *vcpu,
3902                                             struct kvm_cpuid2 __user *cpuid_arg)
3903 {
3904         struct kvm_cpuid2 cpuid;
3905         int r;
3906
3907         r = -EFAULT;
3908         if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
3909                 return r;
3910
3911         r = kvm_get_hv_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3912         if (r)
3913                 return r;
3914
3915         r = -EFAULT;
3916         if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
3917                 return r;
3918
3919         return 0;
3920 }
3921
3922 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
3923 {
3924         int r = 0;
3925
3926         switch (ext) {
3927         case KVM_CAP_IRQCHIP:
3928         case KVM_CAP_HLT:
3929         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
3930         case KVM_CAP_SET_TSS_ADDR:
3931         case KVM_CAP_EXT_CPUID:
3932         case KVM_CAP_EXT_EMUL_CPUID:
3933         case KVM_CAP_CLOCKSOURCE:
3934         case KVM_CAP_PIT:
3935         case KVM_CAP_NOP_IO_DELAY:
3936         case KVM_CAP_MP_STATE:
3937         case KVM_CAP_SYNC_MMU:
3938         case KVM_CAP_USER_NMI:
3939         case KVM_CAP_REINJECT_CONTROL:
3940         case KVM_CAP_IRQ_INJECT_STATUS:
3941         case KVM_CAP_IOEVENTFD:
3942         case KVM_CAP_IOEVENTFD_NO_LENGTH:
3943         case KVM_CAP_PIT2:
3944         case KVM_CAP_PIT_STATE2:
3945         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
3946         case KVM_CAP_VCPU_EVENTS:
3947         case KVM_CAP_HYPERV:
3948         case KVM_CAP_HYPERV_VAPIC:
3949         case KVM_CAP_HYPERV_SPIN:
3950         case KVM_CAP_HYPERV_SYNIC:
3951         case KVM_CAP_HYPERV_SYNIC2:
3952         case KVM_CAP_HYPERV_VP_INDEX:
3953         case KVM_CAP_HYPERV_EVENTFD:
3954         case KVM_CAP_HYPERV_TLBFLUSH:
3955         case KVM_CAP_HYPERV_SEND_IPI:
3956         case KVM_CAP_HYPERV_CPUID:
3957         case KVM_CAP_SYS_HYPERV_CPUID:
3958         case KVM_CAP_PCI_SEGMENT:
3959         case KVM_CAP_DEBUGREGS:
3960         case KVM_CAP_X86_ROBUST_SINGLESTEP:
3961         case KVM_CAP_XSAVE:
3962         case KVM_CAP_ASYNC_PF:
3963         case KVM_CAP_ASYNC_PF_INT:
3964         case KVM_CAP_GET_TSC_KHZ:
3965         case KVM_CAP_KVMCLOCK_CTRL:
3966         case KVM_CAP_READONLY_MEM:
3967         case KVM_CAP_HYPERV_TIME:
3968         case KVM_CAP_IOAPIC_POLARITY_IGNORED:
3969         case KVM_CAP_TSC_DEADLINE_TIMER:
3970         case KVM_CAP_DISABLE_QUIRKS:
3971         case KVM_CAP_SET_BOOT_CPU_ID:
3972         case KVM_CAP_SPLIT_IRQCHIP:
3973         case KVM_CAP_IMMEDIATE_EXIT:
3974         case KVM_CAP_PMU_EVENT_FILTER:
3975         case KVM_CAP_GET_MSR_FEATURES:
3976         case KVM_CAP_MSR_PLATFORM_INFO:
3977         case KVM_CAP_EXCEPTION_PAYLOAD:
3978         case KVM_CAP_SET_GUEST_DEBUG:
3979         case KVM_CAP_LAST_CPU:
3980         case KVM_CAP_X86_USER_SPACE_MSR:
3981         case KVM_CAP_X86_MSR_FILTER:
3982         case KVM_CAP_ENFORCE_PV_FEATURE_CPUID:
3983 #ifdef CONFIG_X86_SGX_KVM
3984         case KVM_CAP_SGX_ATTRIBUTE:
3985 #endif
3986         case KVM_CAP_VM_COPY_ENC_CONTEXT_FROM:
3987                 r = 1;
3988                 break;
3989         case KVM_CAP_SET_GUEST_DEBUG2:
3990                 return KVM_GUESTDBG_VALID_MASK;
3991 #ifdef CONFIG_KVM_XEN
3992         case KVM_CAP_XEN_HVM:
3993                 r = KVM_XEN_HVM_CONFIG_HYPERCALL_MSR |
3994                     KVM_XEN_HVM_CONFIG_INTERCEPT_HCALL |
3995                     KVM_XEN_HVM_CONFIG_SHARED_INFO;
3996                 if (sched_info_on())
3997                         r |= KVM_XEN_HVM_CONFIG_RUNSTATE;
3998                 break;
3999 #endif
4000         case KVM_CAP_SYNC_REGS:
4001                 r = KVM_SYNC_X86_VALID_FIELDS;
4002                 break;
4003         case KVM_CAP_ADJUST_CLOCK:
4004                 r = KVM_CLOCK_TSC_STABLE;
4005                 break;
4006         case KVM_CAP_X86_DISABLE_EXITS:
4007                 r |=  KVM_X86_DISABLE_EXITS_HLT | KVM_X86_DISABLE_EXITS_PAUSE |
4008                       KVM_X86_DISABLE_EXITS_CSTATE;
4009                 if(kvm_can_mwait_in_guest())
4010                         r |= KVM_X86_DISABLE_EXITS_MWAIT;
4011                 break;
4012         case KVM_CAP_X86_SMM:
4013                 /* SMBASE is usually relocated above 1M on modern chipsets,
4014                  * and SMM handlers might indeed rely on 4G segment limits,
4015                  * so do not report SMM to be available if real mode is
4016                  * emulated via vm86 mode.  Still, do not go to great lengths
4017                  * to avoid userspace's usage of the feature, because it is a
4018                  * fringe case that is not enabled except via specific settings
4019                  * of the module parameters.
4020                  */
4021                 r = static_call(kvm_x86_has_emulated_msr)(kvm, MSR_IA32_SMBASE);
4022                 break;
4023         case KVM_CAP_VAPIC:
4024                 r = !static_call(kvm_x86_cpu_has_accelerated_tpr)();
4025                 break;
4026         case KVM_CAP_NR_VCPUS:
4027                 r = KVM_SOFT_MAX_VCPUS;
4028                 break;
4029         case KVM_CAP_MAX_VCPUS:
4030                 r = KVM_MAX_VCPUS;
4031                 break;
4032         case KVM_CAP_MAX_VCPU_ID:
4033                 r = KVM_MAX_VCPU_ID;
4034                 break;
4035         case KVM_CAP_PV_MMU:    /* obsolete */
4036                 r = 0;
4037                 break;
4038         case KVM_CAP_MCE:
4039                 r = KVM_MAX_MCE_BANKS;
4040                 break;
4041         case KVM_CAP_XCRS:
4042                 r = boot_cpu_has(X86_FEATURE_XSAVE);
4043                 break;
4044         case KVM_CAP_TSC_CONTROL:
4045                 r = kvm_has_tsc_control;
4046                 break;
4047         case KVM_CAP_X2APIC_API:
4048                 r = KVM_X2APIC_API_VALID_FLAGS;
4049                 break;
4050         case KVM_CAP_NESTED_STATE:
4051                 r = kvm_x86_ops.nested_ops->get_state ?
4052                         kvm_x86_ops.nested_ops->get_state(NULL, NULL, 0) : 0;
4053                 break;
4054         case KVM_CAP_HYPERV_DIRECT_TLBFLUSH:
4055                 r = kvm_x86_ops.enable_direct_tlbflush != NULL;
4056                 break;
4057         case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
4058                 r = kvm_x86_ops.nested_ops->enable_evmcs != NULL;
4059                 break;
4060         case KVM_CAP_SMALLER_MAXPHYADDR:
4061                 r = (int) allow_smaller_maxphyaddr;
4062                 break;
4063         case KVM_CAP_STEAL_TIME:
4064                 r = sched_info_on();
4065                 break;
4066         case KVM_CAP_X86_BUS_LOCK_EXIT:
4067                 if (kvm_has_bus_lock_exit)
4068                         r = KVM_BUS_LOCK_DETECTION_OFF |
4069                             KVM_BUS_LOCK_DETECTION_EXIT;
4070                 else
4071                         r = 0;
4072                 break;
4073         default:
4074                 break;
4075         }
4076         return r;
4077
4078 }
4079
4080 long kvm_arch_dev_ioctl(struct file *filp,
4081                         unsigned int ioctl, unsigned long arg)
4082 {
4083         void __user *argp = (void __user *)arg;
4084         long r;
4085
4086         switch (ioctl) {
4087         case KVM_GET_MSR_INDEX_LIST: {
4088                 struct kvm_msr_list __user *user_msr_list = argp;
4089                 struct kvm_msr_list msr_list;
4090                 unsigned n;
4091
4092                 r = -EFAULT;
4093                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
4094                         goto out;
4095                 n = msr_list.nmsrs;
4096                 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
4097                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
4098                         goto out;
4099                 r = -E2BIG;
4100                 if (n < msr_list.nmsrs)
4101                         goto out;
4102                 r = -EFAULT;
4103                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
4104                                  num_msrs_to_save * sizeof(u32)))
4105                         goto out;
4106                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
4107                                  &emulated_msrs,
4108                                  num_emulated_msrs * sizeof(u32)))
4109                         goto out;
4110                 r = 0;
4111                 break;
4112         }
4113         case KVM_GET_SUPPORTED_CPUID:
4114         case KVM_GET_EMULATED_CPUID: {
4115                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4116                 struct kvm_cpuid2 cpuid;
4117
4118                 r = -EFAULT;
4119                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4120                         goto out;
4121
4122                 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
4123                                             ioctl);
4124                 if (r)
4125                         goto out;
4126
4127                 r = -EFAULT;
4128                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
4129                         goto out;
4130                 r = 0;
4131                 break;
4132         }
4133         case KVM_X86_GET_MCE_CAP_SUPPORTED:
4134                 r = -EFAULT;
4135                 if (copy_to_user(argp, &kvm_mce_cap_supported,
4136                                  sizeof(kvm_mce_cap_supported)))
4137                         goto out;
4138                 r = 0;
4139                 break;
4140         case KVM_GET_MSR_FEATURE_INDEX_LIST: {
4141                 struct kvm_msr_list __user *user_msr_list = argp;
4142                 struct kvm_msr_list msr_list;
4143                 unsigned int n;
4144
4145                 r = -EFAULT;
4146                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
4147                         goto out;
4148                 n = msr_list.nmsrs;
4149                 msr_list.nmsrs = num_msr_based_features;
4150                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
4151                         goto out;
4152                 r = -E2BIG;
4153                 if (n < msr_list.nmsrs)
4154                         goto out;
4155                 r = -EFAULT;
4156                 if (copy_to_user(user_msr_list->indices, &msr_based_features,
4157                                  num_msr_based_features * sizeof(u32)))
4158                         goto out;
4159                 r = 0;
4160                 break;
4161         }
4162         case KVM_GET_MSRS:
4163                 r = msr_io(NULL, argp, do_get_msr_feature, 1);
4164                 break;
4165         case KVM_GET_SUPPORTED_HV_CPUID:
4166                 r = kvm_ioctl_get_supported_hv_cpuid(NULL, argp);
4167                 break;
4168         default:
4169                 r = -EINVAL;
4170                 break;
4171         }
4172 out:
4173         return r;
4174 }
4175
4176 static void wbinvd_ipi(void *garbage)
4177 {
4178         wbinvd();
4179 }
4180
4181 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
4182 {
4183         return kvm_arch_has_noncoherent_dma(vcpu->kvm);
4184 }
4185
4186 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
4187 {
4188         /* Address WBINVD may be executed by guest */
4189         if (need_emulate_wbinvd(vcpu)) {
4190                 if (static_call(kvm_x86_has_wbinvd_exit)())
4191                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4192                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
4193                         smp_call_function_single(vcpu->cpu,
4194                                         wbinvd_ipi, NULL, 1);
4195         }
4196
4197         static_call(kvm_x86_vcpu_load)(vcpu, cpu);
4198
4199         /* Save host pkru register if supported */
4200         vcpu->arch.host_pkru = read_pkru();
4201
4202         /* Apply any externally detected TSC adjustments (due to suspend) */
4203         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
4204                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
4205                 vcpu->arch.tsc_offset_adjustment = 0;
4206                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4207         }
4208
4209         if (unlikely(vcpu->cpu != cpu) || kvm_check_tsc_unstable()) {
4210                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
4211                                 rdtsc() - vcpu->arch.last_host_tsc;
4212                 if (tsc_delta < 0)
4213                         mark_tsc_unstable("KVM discovered backwards TSC");
4214
4215                 if (kvm_check_tsc_unstable()) {
4216                         u64 offset = kvm_compute_l1_tsc_offset(vcpu,
4217                                                 vcpu->arch.last_guest_tsc);
4218                         kvm_vcpu_write_tsc_offset(vcpu, offset);
4219                         vcpu->arch.tsc_catchup = 1;
4220                 }
4221
4222                 if (kvm_lapic_hv_timer_in_use(vcpu))
4223                         kvm_lapic_restart_hv_timer(vcpu);
4224
4225                 /*
4226                  * On a host with synchronized TSC, there is no need to update
4227                  * kvmclock on vcpu->cpu migration
4228                  */
4229                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
4230                         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
4231                 if (vcpu->cpu != cpu)
4232                         kvm_make_request(KVM_REQ_MIGRATE_TIMER, vcpu);
4233                 vcpu->cpu = cpu;
4234         }
4235
4236         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
4237 }
4238
4239 static void kvm_steal_time_set_preempted(struct kvm_vcpu *vcpu)
4240 {
4241         struct kvm_host_map map;
4242         struct kvm_steal_time *st;
4243
4244         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
4245                 return;
4246
4247         if (vcpu->arch.st.preempted)
4248                 return;
4249
4250         if (kvm_map_gfn(vcpu, vcpu->arch.st.msr_val >> PAGE_SHIFT, &map,
4251                         &vcpu->arch.st.cache, true))
4252                 return;
4253
4254         st = map.hva +
4255                 offset_in_page(vcpu->arch.st.msr_val & KVM_STEAL_VALID_BITS);
4256
4257         st->preempted = vcpu->arch.st.preempted = KVM_VCPU_PREEMPTED;
4258
4259         kvm_unmap_gfn(vcpu, &map, &vcpu->arch.st.cache, true, true);
4260 }
4261
4262 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
4263 {
4264         int idx;
4265
4266         if (vcpu->preempted && !vcpu->arch.guest_state_protected)
4267                 vcpu->arch.preempted_in_kernel = !static_call(kvm_x86_get_cpl)(vcpu);
4268
4269         /*
4270          * Take the srcu lock as memslots will be accessed to check the gfn
4271          * cache generation against the memslots generation.
4272          */
4273         idx = srcu_read_lock(&vcpu->kvm->srcu);
4274         if (kvm_xen_msr_enabled(vcpu->kvm))
4275                 kvm_xen_runstate_set_preempted(vcpu);
4276         else
4277                 kvm_steal_time_set_preempted(vcpu);
4278         srcu_read_unlock(&vcpu->kvm->srcu, idx);
4279
4280         static_call(kvm_x86_vcpu_put)(vcpu);
4281         vcpu->arch.last_host_tsc = rdtsc();
4282         /*
4283          * If userspace has set any breakpoints or watchpoints, dr6 is restored
4284          * on every vmexit, but if not, we might have a stale dr6 from the
4285          * guest. do_debug expects dr6 to be cleared after it runs, do the same.
4286          */
4287         set_debugreg(0, 6);
4288 }
4289
4290 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
4291                                     struct kvm_lapic_state *s)
4292 {
4293         if (vcpu->arch.apicv_active)
4294                 static_call(kvm_x86_sync_pir_to_irr)(vcpu);
4295
4296         return kvm_apic_get_state(vcpu, s);
4297 }
4298
4299 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
4300                                     struct kvm_lapic_state *s)
4301 {
4302         int r;
4303
4304         r = kvm_apic_set_state(vcpu, s);
4305         if (r)
4306                 return r;
4307         update_cr8_intercept(vcpu);
4308
4309         return 0;
4310 }
4311
4312 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu *vcpu)
4313 {
4314         /*
4315          * We can accept userspace's request for interrupt injection
4316          * as long as we have a place to store the interrupt number.
4317          * The actual injection will happen when the CPU is able to
4318          * deliver the interrupt.
4319          */
4320         if (kvm_cpu_has_extint(vcpu))
4321                 return false;
4322
4323         /* Acknowledging ExtINT does not happen if LINT0 is masked.  */
4324         return (!lapic_in_kernel(vcpu) ||
4325                 kvm_apic_accept_pic_intr(vcpu));
4326 }
4327
4328 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu *vcpu)
4329 {
4330         return kvm_arch_interrupt_allowed(vcpu) &&
4331                 kvm_cpu_accept_dm_intr(vcpu);
4332 }
4333
4334 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
4335                                     struct kvm_interrupt *irq)
4336 {
4337         if (irq->irq >= KVM_NR_INTERRUPTS)
4338                 return -EINVAL;
4339
4340         if (!irqchip_in_kernel(vcpu->kvm)) {
4341                 kvm_queue_interrupt(vcpu, irq->irq, false);
4342                 kvm_make_request(KVM_REQ_EVENT, vcpu);
4343                 return 0;
4344         }
4345
4346         /*
4347          * With in-kernel LAPIC, we only use this to inject EXTINT, so
4348          * fail for in-kernel 8259.
4349          */
4350         if (pic_in_kernel(vcpu->kvm))
4351                 return -ENXIO;
4352
4353         if (vcpu->arch.pending_external_vector != -1)
4354                 return -EEXIST;
4355
4356         vcpu->arch.pending_external_vector = irq->irq;
4357         kvm_make_request(KVM_REQ_EVENT, vcpu);
4358         return 0;
4359 }
4360
4361 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
4362 {
4363         kvm_inject_nmi(vcpu);
4364
4365         return 0;
4366 }
4367
4368 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
4369 {
4370         kvm_make_request(KVM_REQ_SMI, vcpu);
4371
4372         return 0;
4373 }
4374
4375 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
4376                                            struct kvm_tpr_access_ctl *tac)
4377 {
4378         if (tac->flags)
4379                 return -EINVAL;
4380         vcpu->arch.tpr_access_reporting = !!tac->enabled;
4381         return 0;
4382 }
4383
4384 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
4385                                         u64 mcg_cap)
4386 {
4387         int r;
4388         unsigned bank_num = mcg_cap & 0xff, bank;
4389
4390         r = -EINVAL;
4391         if (!bank_num || bank_num > KVM_MAX_MCE_BANKS)
4392                 goto out;
4393         if (mcg_cap & ~(kvm_mce_cap_supported | 0xff | 0xff0000))
4394                 goto out;
4395         r = 0;
4396         vcpu->arch.mcg_cap = mcg_cap;
4397         /* Init IA32_MCG_CTL to all 1s */
4398         if (mcg_cap & MCG_CTL_P)
4399                 vcpu->arch.mcg_ctl = ~(u64)0;
4400         /* Init IA32_MCi_CTL to all 1s */
4401         for (bank = 0; bank < bank_num; bank++)
4402                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
4403
4404         static_call(kvm_x86_setup_mce)(vcpu);
4405 out:
4406         return r;
4407 }
4408
4409 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
4410                                       struct kvm_x86_mce *mce)
4411 {
4412         u64 mcg_cap = vcpu->arch.mcg_cap;
4413         unsigned bank_num = mcg_cap & 0xff;
4414         u64 *banks = vcpu->arch.mce_banks;
4415
4416         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
4417                 return -EINVAL;
4418         /*
4419          * if IA32_MCG_CTL is not all 1s, the uncorrected error
4420          * reporting is disabled
4421          */
4422         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
4423             vcpu->arch.mcg_ctl != ~(u64)0)
4424                 return 0;
4425         banks += 4 * mce->bank;
4426         /*
4427          * if IA32_MCi_CTL is not all 1s, the uncorrected error
4428          * reporting is disabled for the bank
4429          */
4430         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
4431                 return 0;
4432         if (mce->status & MCI_STATUS_UC) {
4433                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
4434                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
4435                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
4436                         return 0;
4437                 }
4438                 if (banks[1] & MCI_STATUS_VAL)
4439                         mce->status |= MCI_STATUS_OVER;
4440                 banks[2] = mce->addr;
4441                 banks[3] = mce->misc;
4442                 vcpu->arch.mcg_status = mce->mcg_status;
4443                 banks[1] = mce->status;
4444                 kvm_queue_exception(vcpu, MC_VECTOR);
4445         } else if (!(banks[1] & MCI_STATUS_VAL)
4446                    || !(banks[1] & MCI_STATUS_UC)) {
4447                 if (banks[1] & MCI_STATUS_VAL)
4448                         mce->status |= MCI_STATUS_OVER;
4449                 banks[2] = mce->addr;
4450                 banks[3] = mce->misc;
4451                 banks[1] = mce->status;
4452         } else
4453                 banks[1] |= MCI_STATUS_OVER;
4454         return 0;
4455 }
4456
4457 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
4458                                                struct kvm_vcpu_events *events)
4459 {
4460         process_nmi(vcpu);
4461
4462         if (kvm_check_request(KVM_REQ_SMI, vcpu))
4463                 process_smi(vcpu);
4464
4465         /*
4466          * In guest mode, payload delivery should be deferred,
4467          * so that the L1 hypervisor can intercept #PF before
4468          * CR2 is modified (or intercept #DB before DR6 is
4469          * modified under nVMX). Unless the per-VM capability,
4470          * KVM_CAP_EXCEPTION_PAYLOAD, is set, we may not defer the delivery of
4471          * an exception payload and handle after a KVM_GET_VCPU_EVENTS. Since we
4472          * opportunistically defer the exception payload, deliver it if the
4473          * capability hasn't been requested before processing a
4474          * KVM_GET_VCPU_EVENTS.
4475          */
4476         if (!vcpu->kvm->arch.exception_payload_enabled &&
4477             vcpu->arch.exception.pending && vcpu->arch.exception.has_payload)
4478                 kvm_deliver_exception_payload(vcpu);
4479
4480         /*
4481          * The API doesn't provide the instruction length for software
4482          * exceptions, so don't report them. As long as the guest RIP
4483          * isn't advanced, we should expect to encounter the exception
4484          * again.
4485          */
4486         if (kvm_exception_is_soft(vcpu->arch.exception.nr)) {
4487                 events->exception.injected = 0;
4488                 events->exception.pending = 0;
4489         } else {
4490                 events->exception.injected = vcpu->arch.exception.injected;
4491                 events->exception.pending = vcpu->arch.exception.pending;
4492                 /*
4493                  * For ABI compatibility, deliberately conflate
4494                  * pending and injected exceptions when
4495                  * KVM_CAP_EXCEPTION_PAYLOAD isn't enabled.
4496                  */
4497                 if (!vcpu->kvm->arch.exception_payload_enabled)
4498                         events->exception.injected |=
4499                                 vcpu->arch.exception.pending;
4500         }
4501         events->exception.nr = vcpu->arch.exception.nr;
4502         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
4503         events->exception.error_code = vcpu->arch.exception.error_code;
4504         events->exception_has_payload = vcpu->arch.exception.has_payload;
4505         events->exception_payload = vcpu->arch.exception.payload;
4506
4507         events->interrupt.injected =
4508                 vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft;
4509         events->interrupt.nr = vcpu->arch.interrupt.nr;
4510         events->interrupt.soft = 0;
4511         events->interrupt.shadow = static_call(kvm_x86_get_interrupt_shadow)(vcpu);
4512
4513         events->nmi.injected = vcpu->arch.nmi_injected;
4514         events->nmi.pending = vcpu->arch.nmi_pending != 0;
4515         events->nmi.masked = static_call(kvm_x86_get_nmi_mask)(vcpu);
4516         events->nmi.pad = 0;
4517
4518         events->sipi_vector = 0; /* never valid when reporting to user space */
4519
4520         events->smi.smm = is_smm(vcpu);
4521         events->smi.pending = vcpu->arch.smi_pending;
4522         events->smi.smm_inside_nmi =
4523                 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
4524         events->smi.latched_init = kvm_lapic_latched_init(vcpu);
4525
4526         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
4527                          | KVM_VCPUEVENT_VALID_SHADOW
4528                          | KVM_VCPUEVENT_VALID_SMM);
4529         if (vcpu->kvm->arch.exception_payload_enabled)
4530                 events->flags |= KVM_VCPUEVENT_VALID_PAYLOAD;
4531
4532         memset(&events->reserved, 0, sizeof(events->reserved));
4533 }
4534
4535 static void kvm_smm_changed(struct kvm_vcpu *vcpu);
4536
4537 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
4538                                               struct kvm_vcpu_events *events)
4539 {
4540         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
4541                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
4542                               | KVM_VCPUEVENT_VALID_SHADOW
4543                               | KVM_VCPUEVENT_VALID_SMM
4544                               | KVM_VCPUEVENT_VALID_PAYLOAD))
4545                 return -EINVAL;
4546
4547         if (events->flags & KVM_VCPUEVENT_VALID_PAYLOAD) {
4548                 if (!vcpu->kvm->arch.exception_payload_enabled)
4549                         return -EINVAL;
4550                 if (events->exception.pending)
4551                         events->exception.injected = 0;
4552                 else
4553                         events->exception_has_payload = 0;
4554         } else {
4555                 events->exception.pending = 0;
4556                 events->exception_has_payload = 0;
4557         }
4558
4559         if ((events->exception.injected || events->exception.pending) &&
4560             (events->exception.nr > 31 || events->exception.nr == NMI_VECTOR))
4561                 return -EINVAL;
4562
4563         /* INITs are latched while in SMM */
4564         if (events->flags & KVM_VCPUEVENT_VALID_SMM &&
4565             (events->smi.smm || events->smi.pending) &&
4566             vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED)
4567                 return -EINVAL;
4568
4569         process_nmi(vcpu);
4570         vcpu->arch.exception.injected = events->exception.injected;
4571         vcpu->arch.exception.pending = events->exception.pending;
4572         vcpu->arch.exception.nr = events->exception.nr;
4573         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
4574         vcpu->arch.exception.error_code = events->exception.error_code;
4575         vcpu->arch.exception.has_payload = events->exception_has_payload;
4576         vcpu->arch.exception.payload = events->exception_payload;
4577
4578         vcpu->arch.interrupt.injected = events->interrupt.injected;
4579         vcpu->arch.interrupt.nr = events->interrupt.nr;
4580         vcpu->arch.interrupt.soft = events->interrupt.soft;
4581         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
4582                 static_call(kvm_x86_set_interrupt_shadow)(vcpu,
4583                                                 events->interrupt.shadow);
4584
4585         vcpu->arch.nmi_injected = events->nmi.injected;
4586         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
4587                 vcpu->arch.nmi_pending = events->nmi.pending;
4588         static_call(kvm_x86_set_nmi_mask)(vcpu, events->nmi.masked);
4589
4590         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
4591             lapic_in_kernel(vcpu))
4592                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
4593
4594         if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
4595                 if (!!(vcpu->arch.hflags & HF_SMM_MASK) != events->smi.smm) {
4596                         if (events->smi.smm)
4597                                 vcpu->arch.hflags |= HF_SMM_MASK;
4598                         else
4599                                 vcpu->arch.hflags &= ~HF_SMM_MASK;
4600                         kvm_smm_changed(vcpu);
4601                 }
4602
4603                 vcpu->arch.smi_pending = events->smi.pending;
4604
4605                 if (events->smi.smm) {
4606                         if (events->smi.smm_inside_nmi)
4607                                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
4608                         else
4609                                 vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
4610                 }
4611
4612                 if (lapic_in_kernel(vcpu)) {
4613                         if (events->smi.latched_init)
4614                                 set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
4615                         else
4616                                 clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
4617                 }
4618         }
4619
4620         kvm_make_request(KVM_REQ_EVENT, vcpu);
4621
4622         return 0;
4623 }
4624
4625 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
4626                                              struct kvm_debugregs *dbgregs)
4627 {
4628         unsigned long val;
4629
4630         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
4631         kvm_get_dr(vcpu, 6, &val);
4632         dbgregs->dr6 = val;
4633         dbgregs->dr7 = vcpu->arch.dr7;
4634         dbgregs->flags = 0;
4635         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
4636 }
4637
4638 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
4639                                             struct kvm_debugregs *dbgregs)
4640 {
4641         if (dbgregs->flags)
4642                 return -EINVAL;
4643
4644         if (!kvm_dr6_valid(dbgregs->dr6))
4645                 return -EINVAL;
4646         if (!kvm_dr7_valid(dbgregs->dr7))
4647                 return -EINVAL;
4648
4649         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
4650         kvm_update_dr0123(vcpu);
4651         vcpu->arch.dr6 = dbgregs->dr6;
4652         vcpu->arch.dr7 = dbgregs->dr7;
4653         kvm_update_dr7(vcpu);
4654
4655         return 0;
4656 }
4657
4658 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
4659
4660 static void fill_xsave(u8 *dest, struct kvm_vcpu *vcpu)
4661 {
4662         struct xregs_state *xsave = &vcpu->arch.guest_fpu->state.xsave;
4663         u64 xstate_bv = xsave->header.xfeatures;
4664         u64 valid;
4665
4666         /*
4667          * Copy legacy XSAVE area, to avoid complications with CPUID
4668          * leaves 0 and 1 in the loop below.
4669          */
4670         memcpy(dest, xsave, XSAVE_HDR_OFFSET);
4671
4672         /* Set XSTATE_BV */
4673         xstate_bv &= vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FPSSE;
4674         *(u64 *)(dest + XSAVE_HDR_OFFSET) = xstate_bv;
4675
4676         /*
4677          * Copy each region from the possibly compacted offset to the
4678          * non-compacted offset.
4679          */
4680         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
4681         while (valid) {
4682                 u64 xfeature_mask = valid & -valid;
4683                 int xfeature_nr = fls64(xfeature_mask) - 1;
4684                 void *src = get_xsave_addr(xsave, xfeature_nr);
4685
4686                 if (src) {
4687                         u32 size, offset, ecx, edx;
4688                         cpuid_count(XSTATE_CPUID, xfeature_nr,
4689                                     &size, &offset, &ecx, &edx);
4690                         if (xfeature_nr == XFEATURE_PKRU)
4691                                 memcpy(dest + offset, &vcpu->arch.pkru,
4692                                        sizeof(vcpu->arch.pkru));
4693                         else
4694                                 memcpy(dest + offset, src, size);
4695
4696                 }
4697
4698                 valid -= xfeature_mask;
4699         }
4700 }
4701
4702 static void load_xsave(struct kvm_vcpu *vcpu, u8 *src)
4703 {
4704         struct xregs_state *xsave = &vcpu->arch.guest_fpu->state.xsave;
4705         u64 xstate_bv = *(u64 *)(src + XSAVE_HDR_OFFSET);
4706         u64 valid;
4707
4708         /*
4709          * Copy legacy XSAVE area, to avoid complications with CPUID
4710          * leaves 0 and 1 in the loop below.
4711          */
4712         memcpy(xsave, src, XSAVE_HDR_OFFSET);
4713
4714         /* Set XSTATE_BV and possibly XCOMP_BV.  */
4715         xsave->header.xfeatures = xstate_bv;
4716         if (boot_cpu_has(X86_FEATURE_XSAVES))
4717                 xsave->header.xcomp_bv = host_xcr0 | XSTATE_COMPACTION_ENABLED;
4718
4719         /*
4720          * Copy each region from the non-compacted offset to the
4721          * possibly compacted offset.
4722          */
4723         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
4724         while (valid) {
4725                 u64 xfeature_mask = valid & -valid;
4726                 int xfeature_nr = fls64(xfeature_mask) - 1;
4727                 void *dest = get_xsave_addr(xsave, xfeature_nr);
4728
4729                 if (dest) {
4730                         u32 size, offset, ecx, edx;
4731                         cpuid_count(XSTATE_CPUID, xfeature_nr,
4732                                     &size, &offset, &ecx, &edx);
4733                         if (xfeature_nr == XFEATURE_PKRU)
4734                                 memcpy(&vcpu->arch.pkru, src + offset,
4735                                        sizeof(vcpu->arch.pkru));
4736                         else
4737                                 memcpy(dest, src + offset, size);
4738                 }
4739
4740                 valid -= xfeature_mask;
4741         }
4742 }
4743
4744 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
4745                                          struct kvm_xsave *guest_xsave)
4746 {
4747         if (!vcpu->arch.guest_fpu)
4748                 return;
4749
4750         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
4751                 memset(guest_xsave, 0, sizeof(struct kvm_xsave));
4752                 fill_xsave((u8 *) guest_xsave->region, vcpu);
4753         } else {
4754                 memcpy(guest_xsave->region,
4755                         &vcpu->arch.guest_fpu->state.fxsave,
4756                         sizeof(struct fxregs_state));
4757                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
4758                         XFEATURE_MASK_FPSSE;
4759         }
4760 }
4761
4762 #define XSAVE_MXCSR_OFFSET 24
4763
4764 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
4765                                         struct kvm_xsave *guest_xsave)
4766 {
4767         u64 xstate_bv;
4768         u32 mxcsr;
4769
4770         if (!vcpu->arch.guest_fpu)
4771                 return 0;
4772
4773         xstate_bv = *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
4774         mxcsr = *(u32 *)&guest_xsave->region[XSAVE_MXCSR_OFFSET / sizeof(u32)];
4775
4776         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
4777                 /*
4778                  * Here we allow setting states that are not present in
4779                  * CPUID leaf 0xD, index 0, EDX:EAX.  This is for compatibility
4780                  * with old userspace.
4781                  */
4782                 if (xstate_bv & ~supported_xcr0 || mxcsr & ~mxcsr_feature_mask)
4783                         return -EINVAL;
4784                 load_xsave(vcpu, (u8 *)guest_xsave->region);
4785         } else {
4786                 if (xstate_bv & ~XFEATURE_MASK_FPSSE ||
4787                         mxcsr & ~mxcsr_feature_mask)
4788                         return -EINVAL;
4789                 memcpy(&vcpu->arch.guest_fpu->state.fxsave,
4790                         guest_xsave->region, sizeof(struct fxregs_state));
4791         }
4792         return 0;
4793 }
4794
4795 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
4796                                         struct kvm_xcrs *guest_xcrs)
4797 {
4798         if (!boot_cpu_has(X86_FEATURE_XSAVE)) {
4799                 guest_xcrs->nr_xcrs = 0;
4800                 return;
4801         }
4802
4803         guest_xcrs->nr_xcrs = 1;
4804         guest_xcrs->flags = 0;
4805         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
4806         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
4807 }
4808
4809 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
4810                                        struct kvm_xcrs *guest_xcrs)
4811 {
4812         int i, r = 0;
4813
4814         if (!boot_cpu_has(X86_FEATURE_XSAVE))
4815                 return -EINVAL;
4816
4817         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
4818                 return -EINVAL;
4819
4820         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
4821                 /* Only support XCR0 currently */
4822                 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
4823                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
4824                                 guest_xcrs->xcrs[i].value);
4825                         break;
4826                 }
4827         if (r)
4828                 r = -EINVAL;
4829         return r;
4830 }
4831
4832 /*
4833  * kvm_set_guest_paused() indicates to the guest kernel that it has been
4834  * stopped by the hypervisor.  This function will be called from the host only.
4835  * EINVAL is returned when the host attempts to set the flag for a guest that
4836  * does not support pv clocks.
4837  */
4838 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
4839 {
4840         if (!vcpu->arch.pv_time_enabled)
4841                 return -EINVAL;
4842         vcpu->arch.pvclock_set_guest_stopped_request = true;
4843         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4844         return 0;
4845 }
4846
4847 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
4848                                      struct kvm_enable_cap *cap)
4849 {
4850         int r;
4851         uint16_t vmcs_version;
4852         void __user *user_ptr;
4853
4854         if (cap->flags)
4855                 return -EINVAL;
4856
4857         switch (cap->cap) {
4858         case KVM_CAP_HYPERV_SYNIC2:
4859                 if (cap->args[0])
4860                         return -EINVAL;
4861                 fallthrough;
4862
4863         case KVM_CAP_HYPERV_SYNIC:
4864                 if (!irqchip_in_kernel(vcpu->kvm))
4865                         return -EINVAL;
4866                 return kvm_hv_activate_synic(vcpu, cap->cap ==
4867                                              KVM_CAP_HYPERV_SYNIC2);
4868         case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
4869                 if (!kvm_x86_ops.nested_ops->enable_evmcs)
4870                         return -ENOTTY;
4871                 r = kvm_x86_ops.nested_ops->enable_evmcs(vcpu, &vmcs_version);
4872                 if (!r) {
4873                         user_ptr = (void __user *)(uintptr_t)cap->args[0];
4874                         if (copy_to_user(user_ptr, &vmcs_version,
4875                                          sizeof(vmcs_version)))
4876                                 r = -EFAULT;
4877                 }
4878                 return r;
4879         case KVM_CAP_HYPERV_DIRECT_TLBFLUSH:
4880                 if (!kvm_x86_ops.enable_direct_tlbflush)
4881                         return -ENOTTY;
4882
4883                 return static_call(kvm_x86_enable_direct_tlbflush)(vcpu);
4884
4885         case KVM_CAP_ENFORCE_PV_FEATURE_CPUID:
4886                 vcpu->arch.pv_cpuid.enforce = cap->args[0];
4887                 if (vcpu->arch.pv_cpuid.enforce)
4888                         kvm_update_pv_runtime(vcpu);
4889
4890                 return 0;
4891         default:
4892                 return -EINVAL;
4893         }
4894 }
4895
4896 long kvm_arch_vcpu_ioctl(struct file *filp,
4897                          unsigned int ioctl, unsigned long arg)
4898 {
4899         struct kvm_vcpu *vcpu = filp->private_data;
4900         void __user *argp = (void __user *)arg;
4901         int r;
4902         union {
4903                 struct kvm_lapic_state *lapic;
4904                 struct kvm_xsave *xsave;
4905                 struct kvm_xcrs *xcrs;
4906                 void *buffer;
4907         } u;
4908
4909         vcpu_load(vcpu);
4910
4911         u.buffer = NULL;
4912         switch (ioctl) {
4913         case KVM_GET_LAPIC: {
4914                 r = -EINVAL;
4915                 if (!lapic_in_kernel(vcpu))
4916                         goto out;
4917                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state),
4918                                 GFP_KERNEL_ACCOUNT);
4919
4920                 r = -ENOMEM;
4921                 if (!u.lapic)
4922                         goto out;
4923                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
4924                 if (r)
4925                         goto out;
4926                 r = -EFAULT;
4927                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
4928                         goto out;
4929                 r = 0;
4930                 break;
4931         }
4932         case KVM_SET_LAPIC: {
4933                 r = -EINVAL;
4934                 if (!lapic_in_kernel(vcpu))
4935                         goto out;
4936                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
4937                 if (IS_ERR(u.lapic)) {
4938                         r = PTR_ERR(u.lapic);
4939                         goto out_nofree;
4940                 }
4941
4942                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
4943                 break;
4944         }
4945         case KVM_INTERRUPT: {
4946                 struct kvm_interrupt irq;
4947
4948                 r = -EFAULT;
4949                 if (copy_from_user(&irq, argp, sizeof(irq)))
4950                         goto out;
4951                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
4952                 break;
4953         }
4954         case KVM_NMI: {
4955                 r = kvm_vcpu_ioctl_nmi(vcpu);
4956                 break;
4957         }
4958         case KVM_SMI: {
4959                 r = kvm_vcpu_ioctl_smi(vcpu);
4960                 break;
4961         }
4962         case KVM_SET_CPUID: {
4963                 struct kvm_cpuid __user *cpuid_arg = argp;
4964                 struct kvm_cpuid cpuid;
4965
4966                 r = -EFAULT;
4967                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4968                         goto out;
4969                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
4970                 break;
4971         }
4972         case KVM_SET_CPUID2: {
4973                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4974                 struct kvm_cpuid2 cpuid;
4975
4976                 r = -EFAULT;
4977                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4978                         goto out;
4979                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
4980                                               cpuid_arg->entries);
4981                 break;
4982         }
4983         case KVM_GET_CPUID2: {
4984                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4985                 struct kvm_cpuid2 cpuid;
4986
4987                 r = -EFAULT;
4988                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4989                         goto out;
4990                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
4991                                               cpuid_arg->entries);
4992                 if (r)
4993                         goto out;
4994                 r = -EFAULT;
4995                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
4996                         goto out;
4997                 r = 0;
4998                 break;
4999         }
5000         case KVM_GET_MSRS: {
5001                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
5002                 r = msr_io(vcpu, argp, do_get_msr, 1);
5003                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5004                 break;
5005         }
5006         case KVM_SET_MSRS: {
5007                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
5008                 r = msr_io(vcpu, argp, do_set_msr, 0);
5009                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5010                 break;
5011         }
5012         case KVM_TPR_ACCESS_REPORTING: {
5013                 struct kvm_tpr_access_ctl tac;
5014
5015                 r = -EFAULT;
5016                 if (copy_from_user(&tac, argp, sizeof(tac)))
5017                         goto out;
5018                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
5019                 if (r)
5020                         goto out;
5021                 r = -EFAULT;
5022                 if (copy_to_user(argp, &tac, sizeof(tac)))
5023                         goto out;
5024                 r = 0;
5025                 break;
5026         };
5027         case KVM_SET_VAPIC_ADDR: {
5028                 struct kvm_vapic_addr va;
5029                 int idx;
5030
5031                 r = -EINVAL;
5032                 if (!lapic_in_kernel(vcpu))
5033                         goto out;
5034                 r = -EFAULT;
5035                 if (copy_from_user(&va, argp, sizeof(va)))
5036                         goto out;
5037                 idx = srcu_read_lock(&vcpu->kvm->srcu);
5038                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
5039                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5040                 break;
5041         }
5042         case KVM_X86_SETUP_MCE: {
5043                 u64 mcg_cap;
5044
5045                 r = -EFAULT;
5046                 if (copy_from_user(&mcg_cap, argp, sizeof(mcg_cap)))
5047                         goto out;
5048                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
5049                 break;
5050         }
5051         case KVM_X86_SET_MCE: {
5052                 struct kvm_x86_mce mce;
5053
5054                 r = -EFAULT;
5055                 if (copy_from_user(&mce, argp, sizeof(mce)))
5056                         goto out;
5057                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
5058                 break;
5059         }
5060         case KVM_GET_VCPU_EVENTS: {
5061                 struct kvm_vcpu_events events;
5062
5063                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
5064
5065                 r = -EFAULT;
5066                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
5067                         break;
5068                 r = 0;
5069                 break;
5070         }
5071         case KVM_SET_VCPU_EVENTS: {
5072                 struct kvm_vcpu_events events;
5073
5074                 r = -EFAULT;
5075                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
5076                         break;
5077
5078                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
5079                 break;
5080         }
5081         case KVM_GET_DEBUGREGS: {
5082                 struct kvm_debugregs dbgregs;
5083
5084                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
5085
5086                 r = -EFAULT;
5087                 if (copy_to_user(argp, &dbgregs,
5088                                  sizeof(struct kvm_debugregs)))
5089                         break;
5090                 r = 0;
5091                 break;
5092         }
5093         case KVM_SET_DEBUGREGS: {
5094                 struct kvm_debugregs dbgregs;
5095
5096                 r = -EFAULT;
5097                 if (copy_from_user(&dbgregs, argp,
5098                                    sizeof(struct kvm_debugregs)))
5099                         break;
5100
5101                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
5102                 break;
5103         }
5104         case KVM_GET_XSAVE: {
5105                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL_ACCOUNT);
5106                 r = -ENOMEM;
5107                 if (!u.xsave)
5108                         break;
5109
5110                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
5111
5112                 r = -EFAULT;
5113                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
5114                         break;
5115                 r = 0;
5116                 break;
5117         }
5118         case KVM_SET_XSAVE: {
5119                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
5120                 if (IS_ERR(u.xsave)) {
5121                         r = PTR_ERR(u.xsave);
5122                         goto out_nofree;
5123                 }
5124
5125                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
5126                 break;
5127         }
5128         case KVM_GET_XCRS: {
5129                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL_ACCOUNT);
5130                 r = -ENOMEM;
5131                 if (!u.xcrs)
5132                         break;
5133
5134                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
5135
5136                 r = -EFAULT;
5137                 if (copy_to_user(argp, u.xcrs,
5138                                  sizeof(struct kvm_xcrs)))
5139                         break;
5140                 r = 0;
5141                 break;
5142         }
5143         case KVM_SET_XCRS: {
5144                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
5145                 if (IS_ERR(u.xcrs)) {
5146                         r = PTR_ERR(u.xcrs);
5147                         goto out_nofree;
5148                 }
5149
5150                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
5151                 break;
5152         }
5153         case KVM_SET_TSC_KHZ: {
5154                 u32 user_tsc_khz;
5155
5156                 r = -EINVAL;
5157                 user_tsc_khz = (u32)arg;
5158
5159                 if (kvm_has_tsc_control &&
5160                     user_tsc_khz >= kvm_max_guest_tsc_khz)
5161                         goto out;
5162
5163                 if (user_tsc_khz == 0)
5164                         user_tsc_khz = tsc_khz;
5165
5166                 if (!kvm_set_tsc_khz(vcpu, user_tsc_khz))
5167                         r = 0;
5168
5169                 goto out;
5170         }
5171         case KVM_GET_TSC_KHZ: {
5172                 r = vcpu->arch.virtual_tsc_khz;
5173                 goto out;
5174         }
5175         case KVM_KVMCLOCK_CTRL: {
5176                 r = kvm_set_guest_paused(vcpu);
5177                 goto out;
5178         }
5179         case KVM_ENABLE_CAP: {
5180                 struct kvm_enable_cap cap;
5181
5182                 r = -EFAULT;
5183                 if (copy_from_user(&cap, argp, sizeof(cap)))
5184                         goto out;
5185                 r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap);
5186                 break;
5187         }
5188         case KVM_GET_NESTED_STATE: {
5189                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
5190                 u32 user_data_size;
5191
5192                 r = -EINVAL;
5193                 if (!kvm_x86_ops.nested_ops->get_state)
5194                         break;
5195
5196                 BUILD_BUG_ON(sizeof(user_data_size) != sizeof(user_kvm_nested_state->size));
5197                 r = -EFAULT;
5198                 if (get_user(user_data_size, &user_kvm_nested_state->size))
5199                         break;
5200
5201                 r = kvm_x86_ops.nested_ops->get_state(vcpu, user_kvm_nested_state,
5202                                                      user_data_size);
5203                 if (r < 0)
5204                         break;
5205
5206                 if (r > user_data_size) {
5207                         if (put_user(r, &user_kvm_nested_state->size))
5208                                 r = -EFAULT;
5209                         else
5210                                 r = -E2BIG;
5211                         break;
5212                 }
5213
5214                 r = 0;
5215                 break;
5216         }
5217         case KVM_SET_NESTED_STATE: {
5218                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
5219                 struct kvm_nested_state kvm_state;
5220                 int idx;
5221
5222                 r = -EINVAL;
5223                 if (!kvm_x86_ops.nested_ops->set_state)
5224                         break;
5225
5226                 r = -EFAULT;
5227                 if (copy_from_user(&kvm_state, user_kvm_nested_state, sizeof(kvm_state)))
5228                         break;
5229
5230                 r = -EINVAL;
5231                 if (kvm_state.size < sizeof(kvm_state))
5232                         break;
5233
5234                 if (kvm_state.flags &
5235                     ~(KVM_STATE_NESTED_RUN_PENDING | KVM_STATE_NESTED_GUEST_MODE
5236                       | KVM_STATE_NESTED_EVMCS | KVM_STATE_NESTED_MTF_PENDING
5237                       | KVM_STATE_NESTED_GIF_SET))
5238                         break;
5239
5240                 /* nested_run_pending implies guest_mode.  */
5241                 if ((kvm_state.flags & KVM_STATE_NESTED_RUN_PENDING)
5242                     && !(kvm_state.flags & KVM_STATE_NESTED_GUEST_MODE))
5243                         break;
5244
5245                 idx = srcu_read_lock(&vcpu->kvm->srcu);
5246                 r = kvm_x86_ops.nested_ops->set_state(vcpu, user_kvm_nested_state, &kvm_state);
5247                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5248                 break;
5249         }
5250         case KVM_GET_SUPPORTED_HV_CPUID:
5251                 r = kvm_ioctl_get_supported_hv_cpuid(vcpu, argp);
5252                 break;
5253 #ifdef CONFIG_KVM_XEN
5254         case KVM_XEN_VCPU_GET_ATTR: {
5255                 struct kvm_xen_vcpu_attr xva;
5256
5257                 r = -EFAULT;
5258                 if (copy_from_user(&xva, argp, sizeof(xva)))
5259                         goto out;
5260                 r = kvm_xen_vcpu_get_attr(vcpu, &xva);
5261                 if (!r && copy_to_user(argp, &xva, sizeof(xva)))
5262                         r = -EFAULT;
5263                 break;
5264         }
5265         case KVM_XEN_VCPU_SET_ATTR: {
5266                 struct kvm_xen_vcpu_attr xva;
5267
5268                 r = -EFAULT;
5269                 if (copy_from_user(&xva, argp, sizeof(xva)))
5270                         goto out;
5271                 r = kvm_xen_vcpu_set_attr(vcpu, &xva);
5272                 break;
5273         }
5274 #endif
5275         default:
5276                 r = -EINVAL;
5277         }
5278 out:
5279         kfree(u.buffer);
5280 out_nofree:
5281         vcpu_put(vcpu);
5282         return r;
5283 }
5284
5285 vm_fault_t kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
5286 {
5287         return VM_FAULT_SIGBUS;
5288 }
5289
5290 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
5291 {
5292         int ret;
5293
5294         if (addr > (unsigned int)(-3 * PAGE_SIZE))
5295                 return -EINVAL;
5296         ret = static_call(kvm_x86_set_tss_addr)(kvm, addr);
5297         return ret;
5298 }
5299
5300 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
5301                                               u64 ident_addr)
5302 {
5303         return static_call(kvm_x86_set_identity_map_addr)(kvm, ident_addr);
5304 }
5305
5306 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
5307                                          unsigned long kvm_nr_mmu_pages)
5308 {
5309         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
5310                 return -EINVAL;
5311
5312         mutex_lock(&kvm->slots_lock);
5313
5314         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
5315         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
5316
5317         mutex_unlock(&kvm->slots_lock);
5318         return 0;
5319 }
5320
5321 static unsigned long kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
5322 {
5323         return kvm->arch.n_max_mmu_pages;
5324 }
5325
5326 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
5327 {
5328         struct kvm_pic *pic = kvm->arch.vpic;
5329         int r;
5330
5331         r = 0;
5332         switch (chip->chip_id) {
5333         case KVM_IRQCHIP_PIC_MASTER:
5334                 memcpy(&chip->chip.pic, &pic->pics[0],
5335                         sizeof(struct kvm_pic_state));
5336                 break;
5337         case KVM_IRQCHIP_PIC_SLAVE:
5338                 memcpy(&chip->chip.pic, &pic->pics[1],
5339                         sizeof(struct kvm_pic_state));
5340                 break;
5341         case KVM_IRQCHIP_IOAPIC:
5342                 kvm_get_ioapic(kvm, &chip->chip.ioapic);
5343                 break;
5344         default:
5345                 r = -EINVAL;
5346                 break;
5347         }
5348         return r;
5349 }
5350
5351 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
5352 {
5353         struct kvm_pic *pic = kvm->arch.vpic;
5354         int r;
5355
5356         r = 0;
5357         switch (chip->chip_id) {
5358         case KVM_IRQCHIP_PIC_MASTER:
5359                 spin_lock(&pic->lock);
5360                 memcpy(&pic->pics[0], &chip->chip.pic,
5361                         sizeof(struct kvm_pic_state));
5362                 spin_unlock(&pic->lock);
5363                 break;
5364         case KVM_IRQCHIP_PIC_SLAVE:
5365                 spin_lock(&pic->lock);
5366                 memcpy(&pic->pics[1], &chip->chip.pic,
5367                         sizeof(struct kvm_pic_state));
5368                 spin_unlock(&pic->lock);
5369                 break;
5370         case KVM_IRQCHIP_IOAPIC:
5371                 kvm_set_ioapic(kvm, &chip->chip.ioapic);
5372                 break;
5373         default:
5374                 r = -EINVAL;
5375                 break;
5376         }
5377         kvm_pic_update_irq(pic);
5378         return r;
5379 }
5380
5381 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
5382 {
5383         struct kvm_kpit_state *kps = &kvm->arch.vpit->pit_state;
5384
5385         BUILD_BUG_ON(sizeof(*ps) != sizeof(kps->channels));
5386
5387         mutex_lock(&kps->lock);
5388         memcpy(ps, &kps->channels, sizeof(*ps));
5389         mutex_unlock(&kps->lock);
5390         return 0;
5391 }
5392
5393 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
5394 {
5395         int i;
5396         struct kvm_pit *pit = kvm->arch.vpit;
5397
5398         mutex_lock(&pit->pit_state.lock);
5399         memcpy(&pit->pit_state.channels, ps, sizeof(*ps));
5400         for (i = 0; i < 3; i++)
5401                 kvm_pit_load_count(pit, i, ps->channels[i].count, 0);
5402         mutex_unlock(&pit->pit_state.lock);
5403         return 0;
5404 }
5405
5406 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
5407 {
5408         mutex_lock(&kvm->arch.vpit->pit_state.lock);
5409         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
5410                 sizeof(ps->channels));
5411         ps->flags = kvm->arch.vpit->pit_state.flags;
5412         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
5413         memset(&ps->reserved, 0, sizeof(ps->reserved));
5414         return 0;
5415 }
5416
5417 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
5418 {
5419         int start = 0;
5420         int i;
5421         u32 prev_legacy, cur_legacy;
5422         struct kvm_pit *pit = kvm->arch.vpit;
5423
5424         mutex_lock(&pit->pit_state.lock);
5425         prev_legacy = pit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
5426         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
5427         if (!prev_legacy && cur_legacy)
5428                 start = 1;
5429         memcpy(&pit->pit_state.channels, &ps->channels,
5430                sizeof(pit->pit_state.channels));
5431         pit->pit_state.flags = ps->flags;
5432         for (i = 0; i < 3; i++)
5433                 kvm_pit_load_count(pit, i, pit->pit_state.channels[i].count,
5434                                    start && i == 0);
5435         mutex_unlock(&pit->pit_state.lock);
5436         return 0;
5437 }
5438
5439 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
5440                                  struct kvm_reinject_control *control)
5441 {
5442         struct kvm_pit *pit = kvm->arch.vpit;
5443
5444         /* pit->pit_state.lock was overloaded to prevent userspace from getting
5445          * an inconsistent state after running multiple KVM_REINJECT_CONTROL
5446          * ioctls in parallel.  Use a separate lock if that ioctl isn't rare.
5447          */
5448         mutex_lock(&pit->pit_state.lock);
5449         kvm_pit_set_reinject(pit, control->pit_reinject);
5450         mutex_unlock(&pit->pit_state.lock);
5451
5452         return 0;
5453 }
5454
5455 void kvm_arch_sync_dirty_log(struct kvm *kvm, struct kvm_memory_slot *memslot)
5456 {
5457
5458         /*
5459          * Flush all CPUs' dirty log buffers to the  dirty_bitmap.  Called
5460          * before reporting dirty_bitmap to userspace.  KVM flushes the buffers
5461          * on all VM-Exits, thus we only need to kick running vCPUs to force a
5462          * VM-Exit.
5463          */
5464         struct kvm_vcpu *vcpu;
5465         int i;
5466
5467         kvm_for_each_vcpu(i, vcpu, kvm)
5468                 kvm_vcpu_kick(vcpu);
5469 }
5470
5471 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
5472                         bool line_status)
5473 {
5474         if (!irqchip_in_kernel(kvm))
5475                 return -ENXIO;
5476
5477         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
5478                                         irq_event->irq, irq_event->level,
5479                                         line_status);
5480         return 0;
5481 }
5482
5483 int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
5484                             struct kvm_enable_cap *cap)
5485 {
5486         int r;
5487
5488         if (cap->flags)
5489                 return -EINVAL;
5490
5491         switch (cap->cap) {
5492         case KVM_CAP_DISABLE_QUIRKS:
5493                 kvm->arch.disabled_quirks = cap->args[0];
5494                 r = 0;
5495                 break;
5496         case KVM_CAP_SPLIT_IRQCHIP: {
5497                 mutex_lock(&kvm->lock);
5498                 r = -EINVAL;
5499                 if (cap->args[0] > MAX_NR_RESERVED_IOAPIC_PINS)
5500                         goto split_irqchip_unlock;
5501                 r = -EEXIST;
5502                 if (irqchip_in_kernel(kvm))
5503                         goto split_irqchip_unlock;
5504                 if (kvm->created_vcpus)
5505                         goto split_irqchip_unlock;
5506                 r = kvm_setup_empty_irq_routing(kvm);
5507                 if (r)
5508                         goto split_irqchip_unlock;
5509                 /* Pairs with irqchip_in_kernel. */
5510                 smp_wmb();
5511                 kvm->arch.irqchip_mode = KVM_IRQCHIP_SPLIT;
5512                 kvm->arch.nr_reserved_ioapic_pins = cap->args[0];
5513                 r = 0;
5514 split_irqchip_unlock:
5515                 mutex_unlock(&kvm->lock);
5516                 break;
5517         }
5518         case KVM_CAP_X2APIC_API:
5519                 r = -EINVAL;
5520                 if (cap->args[0] & ~KVM_X2APIC_API_VALID_FLAGS)
5521                         break;
5522
5523                 if (cap->args[0] & KVM_X2APIC_API_USE_32BIT_IDS)
5524                         kvm->arch.x2apic_format = true;
5525                 if (cap->args[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
5526                         kvm->arch.x2apic_broadcast_quirk_disabled = true;
5527
5528                 r = 0;
5529                 break;
5530         case KVM_CAP_X86_DISABLE_EXITS:
5531                 r = -EINVAL;
5532                 if (cap->args[0] & ~KVM_X86_DISABLE_VALID_EXITS)
5533                         break;
5534
5535                 if ((cap->args[0] & KVM_X86_DISABLE_EXITS_MWAIT) &&
5536                         kvm_can_mwait_in_guest())
5537                         kvm->arch.mwait_in_guest = true;
5538                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_HLT)
5539                         kvm->arch.hlt_in_guest = true;
5540                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_PAUSE)
5541                         kvm->arch.pause_in_guest = true;
5542                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_CSTATE)
5543                         kvm->arch.cstate_in_guest = true;
5544                 r = 0;
5545                 break;
5546         case KVM_CAP_MSR_PLATFORM_INFO:
5547                 kvm->arch.guest_can_read_msr_platform_info = cap->args[0];
5548                 r = 0;
5549                 break;
5550         case KVM_CAP_EXCEPTION_PAYLOAD:
5551                 kvm->arch.exception_payload_enabled = cap->args[0];
5552                 r = 0;
5553                 break;
5554         case KVM_CAP_X86_USER_SPACE_MSR:
5555                 kvm->arch.user_space_msr_mask = cap->args[0];
5556                 r = 0;
5557                 break;
5558         case KVM_CAP_X86_BUS_LOCK_EXIT:
5559                 r = -EINVAL;
5560                 if (cap->args[0] & ~KVM_BUS_LOCK_DETECTION_VALID_MODE)
5561                         break;
5562
5563                 if ((cap->args[0] & KVM_BUS_LOCK_DETECTION_OFF) &&
5564                     (cap->args[0] & KVM_BUS_LOCK_DETECTION_EXIT))
5565                         break;
5566
5567                 if (kvm_has_bus_lock_exit &&
5568                     cap->args[0] & KVM_BUS_LOCK_DETECTION_EXIT)
5569                         kvm->arch.bus_lock_detection_enabled = true;
5570                 r = 0;
5571                 break;
5572 #ifdef CONFIG_X86_SGX_KVM
5573         case KVM_CAP_SGX_ATTRIBUTE: {
5574                 unsigned long allowed_attributes = 0;
5575
5576                 r = sgx_set_attribute(&allowed_attributes, cap->args[0]);
5577                 if (r)
5578                         break;
5579
5580                 /* KVM only supports the PROVISIONKEY privileged attribute. */
5581                 if ((allowed_attributes & SGX_ATTR_PROVISIONKEY) &&
5582                     !(allowed_attributes & ~SGX_ATTR_PROVISIONKEY))
5583                         kvm->arch.sgx_provisioning_allowed = true;
5584                 else
5585                         r = -EINVAL;
5586                 break;
5587         }
5588 #endif
5589         case KVM_CAP_VM_COPY_ENC_CONTEXT_FROM:
5590                 r = -EINVAL;
5591                 if (kvm_x86_ops.vm_copy_enc_context_from)
5592                         r = kvm_x86_ops.vm_copy_enc_context_from(kvm, cap->args[0]);
5593                 return r;
5594         default:
5595                 r = -EINVAL;
5596                 break;
5597         }
5598         return r;
5599 }
5600
5601 static struct kvm_x86_msr_filter *kvm_alloc_msr_filter(bool default_allow)
5602 {
5603         struct kvm_x86_msr_filter *msr_filter;
5604
5605         msr_filter = kzalloc(sizeof(*msr_filter), GFP_KERNEL_ACCOUNT);
5606         if (!msr_filter)
5607                 return NULL;
5608
5609         msr_filter->default_allow = default_allow;
5610         return msr_filter;
5611 }
5612
5613 static void kvm_free_msr_filter(struct kvm_x86_msr_filter *msr_filter)
5614 {
5615         u32 i;
5616
5617         if (!msr_filter)
5618                 return;
5619
5620         for (i = 0; i < msr_filter->count; i++)
5621                 kfree(msr_filter->ranges[i].bitmap);
5622
5623         kfree(msr_filter);
5624 }
5625
5626 static int kvm_add_msr_filter(struct kvm_x86_msr_filter *msr_filter,
5627                               struct kvm_msr_filter_range *user_range)
5628 {
5629         unsigned long *bitmap = NULL;
5630         size_t bitmap_size;
5631
5632         if (!user_range->nmsrs)
5633                 return 0;
5634
5635         if (user_range->flags & ~(KVM_MSR_FILTER_READ | KVM_MSR_FILTER_WRITE))
5636                 return -EINVAL;
5637
5638         if (!user_range->flags)
5639                 return -EINVAL;
5640
5641         bitmap_size = BITS_TO_LONGS(user_range->nmsrs) * sizeof(long);
5642         if (!bitmap_size || bitmap_size > KVM_MSR_FILTER_MAX_BITMAP_SIZE)
5643                 return -EINVAL;
5644
5645         bitmap = memdup_user((__user u8*)user_range->bitmap, bitmap_size);
5646         if (IS_ERR(bitmap))
5647                 return PTR_ERR(bitmap);
5648
5649         msr_filter->ranges[msr_filter->count] = (struct msr_bitmap_range) {
5650                 .flags = user_range->flags,
5651                 .base = user_range->base,
5652                 .nmsrs = user_range->nmsrs,
5653                 .bitmap = bitmap,
5654         };
5655
5656         msr_filter->count++;
5657         return 0;
5658 }
5659
5660 static int kvm_vm_ioctl_set_msr_filter(struct kvm *kvm, void __user *argp)
5661 {
5662         struct kvm_msr_filter __user *user_msr_filter = argp;
5663         struct kvm_x86_msr_filter *new_filter, *old_filter;
5664         struct kvm_msr_filter filter;
5665         bool default_allow;
5666         bool empty = true;
5667         int r = 0;
5668         u32 i;
5669
5670         if (copy_from_user(&filter, user_msr_filter, sizeof(filter)))
5671                 return -EFAULT;
5672
5673         for (i = 0; i < ARRAY_SIZE(filter.ranges); i++)
5674                 empty &= !filter.ranges[i].nmsrs;
5675
5676         default_allow = !(filter.flags & KVM_MSR_FILTER_DEFAULT_DENY);
5677         if (empty && !default_allow)
5678                 return -EINVAL;
5679
5680         new_filter = kvm_alloc_msr_filter(default_allow);
5681         if (!new_filter)
5682                 return -ENOMEM;
5683
5684         for (i = 0; i < ARRAY_SIZE(filter.ranges); i++) {
5685                 r = kvm_add_msr_filter(new_filter, &filter.ranges[i]);
5686                 if (r) {
5687                         kvm_free_msr_filter(new_filter);
5688                         return r;
5689                 }
5690         }
5691
5692         mutex_lock(&kvm->lock);
5693
5694         /* The per-VM filter is protected by kvm->lock... */
5695         old_filter = srcu_dereference_check(kvm->arch.msr_filter, &kvm->srcu, 1);
5696
5697         rcu_assign_pointer(kvm->arch.msr_filter, new_filter);
5698         synchronize_srcu(&kvm->srcu);
5699
5700         kvm_free_msr_filter(old_filter);
5701
5702         kvm_make_all_cpus_request(kvm, KVM_REQ_MSR_FILTER_CHANGED);
5703         mutex_unlock(&kvm->lock);
5704
5705         return 0;
5706 }
5707
5708 #ifdef CONFIG_HAVE_KVM_PM_NOTIFIER
5709 static int kvm_arch_suspend_notifier(struct kvm *kvm)
5710 {
5711         struct kvm_vcpu *vcpu;
5712         int i, ret = 0;
5713
5714         mutex_lock(&kvm->lock);
5715         kvm_for_each_vcpu(i, vcpu, kvm) {
5716                 if (!vcpu->arch.pv_time_enabled)
5717                         continue;
5718
5719                 ret = kvm_set_guest_paused(vcpu);
5720                 if (ret) {
5721                         kvm_err("Failed to pause guest VCPU%d: %d\n",
5722                                 vcpu->vcpu_id, ret);
5723                         break;
5724                 }
5725         }
5726         mutex_unlock(&kvm->lock);
5727
5728         return ret ? NOTIFY_BAD : NOTIFY_DONE;
5729 }
5730
5731 int kvm_arch_pm_notifier(struct kvm *kvm, unsigned long state)
5732 {
5733         switch (state) {
5734         case PM_HIBERNATION_PREPARE:
5735         case PM_SUSPEND_PREPARE:
5736                 return kvm_arch_suspend_notifier(kvm);
5737         }
5738
5739         return NOTIFY_DONE;
5740 }
5741 #endif /* CONFIG_HAVE_KVM_PM_NOTIFIER */
5742
5743 long kvm_arch_vm_ioctl(struct file *filp,
5744                        unsigned int ioctl, unsigned long arg)
5745 {
5746         struct kvm *kvm = filp->private_data;
5747         void __user *argp = (void __user *)arg;
5748         int r = -ENOTTY;
5749         /*
5750          * This union makes it completely explicit to gcc-3.x
5751          * that these two variables' stack usage should be
5752          * combined, not added together.
5753          */
5754         union {
5755                 struct kvm_pit_state ps;
5756                 struct kvm_pit_state2 ps2;
5757                 struct kvm_pit_config pit_config;
5758         } u;
5759
5760         switch (ioctl) {
5761         case KVM_SET_TSS_ADDR:
5762                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
5763                 break;
5764         case KVM_SET_IDENTITY_MAP_ADDR: {
5765                 u64 ident_addr;
5766
5767                 mutex_lock(&kvm->lock);
5768                 r = -EINVAL;
5769                 if (kvm->created_vcpus)
5770                         goto set_identity_unlock;
5771                 r = -EFAULT;
5772                 if (copy_from_user(&ident_addr, argp, sizeof(ident_addr)))
5773                         goto set_identity_unlock;
5774                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
5775 set_identity_unlock:
5776                 mutex_unlock(&kvm->lock);
5777                 break;
5778         }
5779         case KVM_SET_NR_MMU_PAGES:
5780                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
5781                 break;
5782         case KVM_GET_NR_MMU_PAGES:
5783                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
5784                 break;
5785         case KVM_CREATE_IRQCHIP: {
5786                 mutex_lock(&kvm->lock);
5787
5788                 r = -EEXIST;
5789                 if (irqchip_in_kernel(kvm))
5790                         goto create_irqchip_unlock;
5791
5792                 r = -EINVAL;
5793                 if (kvm->created_vcpus)
5794                         goto create_irqchip_unlock;
5795
5796                 r = kvm_pic_init(kvm);
5797                 if (r)
5798                         goto create_irqchip_unlock;
5799
5800                 r = kvm_ioapic_init(kvm);
5801                 if (r) {
5802                         kvm_pic_destroy(kvm);
5803                         goto create_irqchip_unlock;
5804                 }
5805
5806                 r = kvm_setup_default_irq_routing(kvm);
5807                 if (r) {
5808                         kvm_ioapic_destroy(kvm);
5809                         kvm_pic_destroy(kvm);
5810                         goto create_irqchip_unlock;
5811                 }
5812                 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
5813                 smp_wmb();
5814                 kvm->arch.irqchip_mode = KVM_IRQCHIP_KERNEL;
5815         create_irqchip_unlock:
5816                 mutex_unlock(&kvm->lock);
5817                 break;
5818         }
5819         case KVM_CREATE_PIT:
5820                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
5821                 goto create_pit;
5822         case KVM_CREATE_PIT2:
5823                 r = -EFAULT;
5824                 if (copy_from_user(&u.pit_config, argp,
5825                                    sizeof(struct kvm_pit_config)))
5826                         goto out;
5827         create_pit:
5828                 mutex_lock(&kvm->lock);
5829                 r = -EEXIST;
5830                 if (kvm->arch.vpit)
5831                         goto create_pit_unlock;
5832                 r = -ENOMEM;
5833                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
5834                 if (kvm->arch.vpit)
5835                         r = 0;
5836         create_pit_unlock:
5837                 mutex_unlock(&kvm->lock);
5838                 break;
5839         case KVM_GET_IRQCHIP: {
5840                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
5841                 struct kvm_irqchip *chip;
5842
5843                 chip = memdup_user(argp, sizeof(*chip));
5844                 if (IS_ERR(chip)) {
5845                         r = PTR_ERR(chip);
5846                         goto out;
5847                 }
5848
5849                 r = -ENXIO;
5850                 if (!irqchip_kernel(kvm))
5851                         goto get_irqchip_out;
5852                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
5853                 if (r)
5854                         goto get_irqchip_out;
5855                 r = -EFAULT;
5856                 if (copy_to_user(argp, chip, sizeof(*chip)))
5857                         goto get_irqchip_out;
5858                 r = 0;
5859         get_irqchip_out:
5860                 kfree(chip);
5861                 break;
5862         }
5863         case KVM_SET_IRQCHIP: {
5864                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
5865                 struct kvm_irqchip *chip;
5866
5867                 chip = memdup_user(argp, sizeof(*chip));
5868                 if (IS_ERR(chip)) {
5869                         r = PTR_ERR(chip);
5870                         goto out;
5871                 }
5872
5873                 r = -ENXIO;
5874                 if (!irqchip_kernel(kvm))
5875                         goto set_irqchip_out;
5876                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
5877         set_irqchip_out:
5878                 kfree(chip);
5879                 break;
5880         }
5881         case KVM_GET_PIT: {
5882                 r = -EFAULT;
5883                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
5884                         goto out;
5885                 r = -ENXIO;
5886                 if (!kvm->arch.vpit)
5887                         goto out;
5888                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
5889                 if (r)
5890                         goto out;
5891                 r = -EFAULT;
5892                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
5893                         goto out;
5894                 r = 0;
5895                 break;
5896         }
5897         case KVM_SET_PIT: {
5898                 r = -EFAULT;
5899                 if (copy_from_user(&u.ps, argp, sizeof(u.ps)))
5900                         goto out;
5901                 mutex_lock(&kvm->lock);
5902                 r = -ENXIO;
5903                 if (!kvm->arch.vpit)
5904                         goto set_pit_out;
5905                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
5906 set_pit_out:
5907                 mutex_unlock(&kvm->lock);
5908                 break;
5909         }
5910         case KVM_GET_PIT2: {
5911                 r = -ENXIO;
5912                 if (!kvm->arch.vpit)
5913                         goto out;
5914                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
5915                 if (r)
5916                         goto out;
5917                 r = -EFAULT;
5918                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
5919                         goto out;
5920                 r = 0;
5921                 break;
5922         }
5923         case KVM_SET_PIT2: {
5924                 r = -EFAULT;
5925                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
5926                         goto out;
5927                 mutex_lock(&kvm->lock);
5928                 r = -ENXIO;
5929                 if (!kvm->arch.vpit)
5930                         goto set_pit2_out;
5931                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
5932 set_pit2_out:
5933                 mutex_unlock(&kvm->lock);
5934                 break;
5935         }
5936         case KVM_REINJECT_CONTROL: {
5937                 struct kvm_reinject_control control;
5938                 r =  -EFAULT;
5939                 if (copy_from_user(&control, argp, sizeof(control)))
5940                         goto out;
5941                 r = -ENXIO;
5942                 if (!kvm->arch.vpit)
5943                         goto out;
5944                 r = kvm_vm_ioctl_reinject(kvm, &control);
5945                 break;
5946         }
5947         case KVM_SET_BOOT_CPU_ID:
5948                 r = 0;
5949                 mutex_lock(&kvm->lock);
5950                 if (kvm->created_vcpus)
5951                         r = -EBUSY;
5952                 else
5953                         kvm->arch.bsp_vcpu_id = arg;
5954                 mutex_unlock(&kvm->lock);
5955                 break;
5956 #ifdef CONFIG_KVM_XEN
5957         case KVM_XEN_HVM_CONFIG: {
5958                 struct kvm_xen_hvm_config xhc;
5959                 r = -EFAULT;
5960                 if (copy_from_user(&xhc, argp, sizeof(xhc)))
5961                         goto out;
5962                 r = kvm_xen_hvm_config(kvm, &xhc);
5963                 break;
5964         }
5965         case KVM_XEN_HVM_GET_ATTR: {
5966                 struct kvm_xen_hvm_attr xha;
5967
5968                 r = -EFAULT;
5969                 if (copy_from_user(&xha, argp, sizeof(xha)))
5970                         goto out;
5971                 r = kvm_xen_hvm_get_attr(kvm, &xha);
5972                 if (!r && copy_to_user(argp, &xha, sizeof(xha)))
5973                         r = -EFAULT;
5974                 break;
5975         }
5976         case KVM_XEN_HVM_SET_ATTR: {
5977                 struct kvm_xen_hvm_attr xha;
5978
5979                 r = -EFAULT;
5980                 if (copy_from_user(&xha, argp, sizeof(xha)))
5981                         goto out;
5982                 r = kvm_xen_hvm_set_attr(kvm, &xha);
5983                 break;
5984         }
5985 #endif
5986         case KVM_SET_CLOCK: {
5987                 struct kvm_arch *ka = &kvm->arch;
5988                 struct kvm_clock_data user_ns;
5989                 u64 now_ns;
5990
5991                 r = -EFAULT;
5992                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
5993                         goto out;
5994
5995                 r = -EINVAL;
5996                 if (user_ns.flags)
5997                         goto out;
5998
5999                 r = 0;
6000                 /*
6001                  * TODO: userspace has to take care of races with VCPU_RUN, so
6002                  * kvm_gen_update_masterclock() can be cut down to locked
6003                  * pvclock_update_vm_gtod_copy().
6004                  */
6005                 kvm_gen_update_masterclock(kvm);
6006
6007                 /*
6008                  * This pairs with kvm_guest_time_update(): when masterclock is
6009                  * in use, we use master_kernel_ns + kvmclock_offset to set
6010                  * unsigned 'system_time' so if we use get_kvmclock_ns() (which
6011                  * is slightly ahead) here we risk going negative on unsigned
6012                  * 'system_time' when 'user_ns.clock' is very small.
6013                  */
6014                 spin_lock_irq(&ka->pvclock_gtod_sync_lock);
6015                 if (kvm->arch.use_master_clock)
6016                         now_ns = ka->master_kernel_ns;
6017                 else
6018                         now_ns = get_kvmclock_base_ns();
6019                 ka->kvmclock_offset = user_ns.clock - now_ns;
6020                 spin_unlock_irq(&ka->pvclock_gtod_sync_lock);
6021
6022                 kvm_make_all_cpus_request(kvm, KVM_REQ_CLOCK_UPDATE);
6023                 break;
6024         }
6025         case KVM_GET_CLOCK: {
6026                 struct kvm_clock_data user_ns;
6027                 u64 now_ns;
6028
6029                 now_ns = get_kvmclock_ns(kvm);
6030                 user_ns.clock = now_ns;
6031                 user_ns.flags = kvm->arch.use_master_clock ? KVM_CLOCK_TSC_STABLE : 0;
6032                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
6033
6034                 r = -EFAULT;
6035                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
6036                         goto out;
6037                 r = 0;
6038                 break;
6039         }
6040         case KVM_MEMORY_ENCRYPT_OP: {
6041                 r = -ENOTTY;
6042                 if (kvm_x86_ops.mem_enc_op)
6043                         r = static_call(kvm_x86_mem_enc_op)(kvm, argp);
6044                 break;
6045         }
6046         case KVM_MEMORY_ENCRYPT_REG_REGION: {
6047                 struct kvm_enc_region region;
6048
6049                 r = -EFAULT;
6050                 if (copy_from_user(&region, argp, sizeof(region)))
6051                         goto out;
6052
6053                 r = -ENOTTY;
6054                 if (kvm_x86_ops.mem_enc_reg_region)
6055                         r = static_call(kvm_x86_mem_enc_reg_region)(kvm, &region);
6056                 break;
6057         }
6058         case KVM_MEMORY_ENCRYPT_UNREG_REGION: {
6059                 struct kvm_enc_region region;
6060
6061                 r = -EFAULT;
6062                 if (copy_from_user(&region, argp, sizeof(region)))
6063                         goto out;
6064
6065                 r = -ENOTTY;
6066                 if (kvm_x86_ops.mem_enc_unreg_region)
6067                         r = static_call(kvm_x86_mem_enc_unreg_region)(kvm, &region);
6068                 break;
6069         }
6070         case KVM_HYPERV_EVENTFD: {
6071                 struct kvm_hyperv_eventfd hvevfd;
6072
6073                 r = -EFAULT;
6074                 if (copy_from_user(&hvevfd, argp, sizeof(hvevfd)))
6075                         goto out;
6076                 r = kvm_vm_ioctl_hv_eventfd(kvm, &hvevfd);
6077                 break;
6078         }
6079         case KVM_SET_PMU_EVENT_FILTER:
6080                 r = kvm_vm_ioctl_set_pmu_event_filter(kvm, argp);
6081                 break;
6082         case KVM_X86_SET_MSR_FILTER:
6083                 r = kvm_vm_ioctl_set_msr_filter(kvm, argp);
6084                 break;
6085         default:
6086                 r = -ENOTTY;
6087         }
6088 out:
6089         return r;
6090 }
6091
6092 static void kvm_init_msr_list(void)
6093 {
6094         struct x86_pmu_capability x86_pmu;
6095         u32 dummy[2];
6096         unsigned i;
6097
6098         BUILD_BUG_ON_MSG(INTEL_PMC_MAX_FIXED != 4,
6099                          "Please update the fixed PMCs in msrs_to_saved_all[]");
6100
6101         perf_get_x86_pmu_capability(&x86_pmu);
6102
6103         num_msrs_to_save = 0;
6104         num_emulated_msrs = 0;
6105         num_msr_based_features = 0;
6106
6107         for (i = 0; i < ARRAY_SIZE(msrs_to_save_all); i++) {
6108                 if (rdmsr_safe(msrs_to_save_all[i], &dummy[0], &dummy[1]) < 0)
6109                         continue;
6110
6111                 /*
6112                  * Even MSRs that are valid in the host may not be exposed
6113                  * to the guests in some cases.
6114                  */
6115                 switch (msrs_to_save_all[i]) {
6116                 case MSR_IA32_BNDCFGS:
6117                         if (!kvm_mpx_supported())
6118                                 continue;
6119                         break;
6120                 case MSR_TSC_AUX:
6121                         if (!kvm_cpu_cap_has(X86_FEATURE_RDTSCP) &&
6122                             !kvm_cpu_cap_has(X86_FEATURE_RDPID))
6123                                 continue;
6124                         break;
6125                 case MSR_IA32_UMWAIT_CONTROL:
6126                         if (!kvm_cpu_cap_has(X86_FEATURE_WAITPKG))
6127                                 continue;
6128                         break;
6129                 case MSR_IA32_RTIT_CTL:
6130                 case MSR_IA32_RTIT_STATUS:
6131                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT))
6132                                 continue;
6133                         break;
6134                 case MSR_IA32_RTIT_CR3_MATCH:
6135                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
6136                             !intel_pt_validate_hw_cap(PT_CAP_cr3_filtering))
6137                                 continue;
6138                         break;
6139                 case MSR_IA32_RTIT_OUTPUT_BASE:
6140                 case MSR_IA32_RTIT_OUTPUT_MASK:
6141                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
6142                                 (!intel_pt_validate_hw_cap(PT_CAP_topa_output) &&
6143                                  !intel_pt_validate_hw_cap(PT_CAP_single_range_output)))
6144                                 continue;
6145                         break;
6146                 case MSR_IA32_RTIT_ADDR0_A ... MSR_IA32_RTIT_ADDR3_B:
6147                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
6148                                 msrs_to_save_all[i] - MSR_IA32_RTIT_ADDR0_A >=
6149                                 intel_pt_validate_hw_cap(PT_CAP_num_address_ranges) * 2)
6150                                 continue;
6151                         break;
6152                 case MSR_ARCH_PERFMON_PERFCTR0 ... MSR_ARCH_PERFMON_PERFCTR0 + 17:
6153                         if (msrs_to_save_all[i] - MSR_ARCH_PERFMON_PERFCTR0 >=
6154                             min(INTEL_PMC_MAX_GENERIC, x86_pmu.num_counters_gp))
6155                                 continue;
6156                         break;
6157                 case MSR_ARCH_PERFMON_EVENTSEL0 ... MSR_ARCH_PERFMON_EVENTSEL0 + 17:
6158                         if (msrs_to_save_all[i] - MSR_ARCH_PERFMON_EVENTSEL0 >=
6159                             min(INTEL_PMC_MAX_GENERIC, x86_pmu.num_counters_gp))
6160                                 continue;
6161                         break;
6162                 default:
6163                         break;
6164                 }
6165
6166                 msrs_to_save[num_msrs_to_save++] = msrs_to_save_all[i];
6167         }
6168
6169         for (i = 0; i < ARRAY_SIZE(emulated_msrs_all); i++) {
6170                 if (!static_call(kvm_x86_has_emulated_msr)(NULL, emulated_msrs_all[i]))
6171                         continue;
6172
6173                 emulated_msrs[num_emulated_msrs++] = emulated_msrs_all[i];
6174         }
6175
6176         for (i = 0; i < ARRAY_SIZE(msr_based_features_all); i++) {
6177                 struct kvm_msr_entry msr;
6178
6179                 msr.index = msr_based_features_all[i];
6180                 if (kvm_get_msr_feature(&msr))
6181                         continue;
6182
6183                 msr_based_features[num_msr_based_features++] = msr_based_features_all[i];
6184         }
6185 }
6186
6187 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
6188                            const void *v)
6189 {
6190         int handled = 0;
6191         int n;
6192
6193         do {
6194                 n = min(len, 8);
6195                 if (!(lapic_in_kernel(vcpu) &&
6196                       !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
6197                     && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
6198                         break;
6199                 handled += n;
6200                 addr += n;
6201                 len -= n;
6202                 v += n;
6203         } while (len);
6204
6205         return handled;
6206 }
6207
6208 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
6209 {
6210         int handled = 0;
6211         int n;
6212
6213         do {
6214                 n = min(len, 8);
6215                 if (!(lapic_in_kernel(vcpu) &&
6216                       !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
6217                                          addr, n, v))
6218                     && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
6219                         break;
6220                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, v);
6221                 handled += n;
6222                 addr += n;
6223                 len -= n;
6224                 v += n;
6225         } while (len);
6226
6227         return handled;
6228 }
6229
6230 static void kvm_set_segment(struct kvm_vcpu *vcpu,
6231                         struct kvm_segment *var, int seg)
6232 {
6233         static_call(kvm_x86_set_segment)(vcpu, var, seg);
6234 }
6235
6236 void kvm_get_segment(struct kvm_vcpu *vcpu,
6237                      struct kvm_segment *var, int seg)
6238 {
6239         static_call(kvm_x86_get_segment)(vcpu, var, seg);
6240 }
6241
6242 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
6243                            struct x86_exception *exception)
6244 {
6245         gpa_t t_gpa;
6246
6247         BUG_ON(!mmu_is_nested(vcpu));
6248
6249         /* NPT walks are always user-walks */
6250         access |= PFERR_USER_MASK;
6251         t_gpa  = vcpu->arch.mmu->gva_to_gpa(vcpu, gpa, access, exception);
6252
6253         return t_gpa;
6254 }
6255
6256 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
6257                               struct x86_exception *exception)
6258 {
6259         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6260         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
6261 }
6262 EXPORT_SYMBOL_GPL(kvm_mmu_gva_to_gpa_read);
6263
6264  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
6265                                 struct x86_exception *exception)
6266 {
6267         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6268         access |= PFERR_FETCH_MASK;
6269         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
6270 }
6271
6272 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
6273                                struct x86_exception *exception)
6274 {
6275         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6276         access |= PFERR_WRITE_MASK;
6277         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
6278 }
6279 EXPORT_SYMBOL_GPL(kvm_mmu_gva_to_gpa_write);
6280
6281 /* uses this to access any guest's mapped memory without checking CPL */
6282 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
6283                                 struct x86_exception *exception)
6284 {
6285         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
6286 }
6287
6288 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
6289                                       struct kvm_vcpu *vcpu, u32 access,
6290                                       struct x86_exception *exception)
6291 {
6292         void *data = val;
6293         int r = X86EMUL_CONTINUE;
6294
6295         while (bytes) {
6296                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
6297                                                             exception);
6298                 unsigned offset = addr & (PAGE_SIZE-1);
6299                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
6300                 int ret;
6301
6302                 if (gpa == UNMAPPED_GVA)
6303                         return X86EMUL_PROPAGATE_FAULT;
6304                 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
6305                                                offset, toread);
6306                 if (ret < 0) {
6307                         r = X86EMUL_IO_NEEDED;
6308                         goto out;
6309                 }
6310
6311                 bytes -= toread;
6312                 data += toread;
6313                 addr += toread;
6314         }
6315 out:
6316         return r;
6317 }
6318
6319 /* used for instruction fetching */
6320 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
6321                                 gva_t addr, void *val, unsigned int bytes,
6322                                 struct x86_exception *exception)
6323 {
6324         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6325         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6326         unsigned offset;
6327         int ret;
6328
6329         /* Inline kvm_read_guest_virt_helper for speed.  */
6330         gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access|PFERR_FETCH_MASK,
6331                                                     exception);
6332         if (unlikely(gpa == UNMAPPED_GVA))
6333                 return X86EMUL_PROPAGATE_FAULT;
6334
6335         offset = addr & (PAGE_SIZE-1);
6336         if (WARN_ON(offset + bytes > PAGE_SIZE))
6337                 bytes = (unsigned)PAGE_SIZE - offset;
6338         ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
6339                                        offset, bytes);
6340         if (unlikely(ret < 0))
6341                 return X86EMUL_IO_NEEDED;
6342
6343         return X86EMUL_CONTINUE;
6344 }
6345
6346 int kvm_read_guest_virt(struct kvm_vcpu *vcpu,
6347                                gva_t addr, void *val, unsigned int bytes,
6348                                struct x86_exception *exception)
6349 {
6350         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6351
6352         /*
6353          * FIXME: this should call handle_emulation_failure if X86EMUL_IO_NEEDED
6354          * is returned, but our callers are not ready for that and they blindly
6355          * call kvm_inject_page_fault.  Ensure that they at least do not leak
6356          * uninitialized kernel stack memory into cr2 and error code.
6357          */
6358         memset(exception, 0, sizeof(*exception));
6359         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
6360                                           exception);
6361 }
6362 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
6363
6364 static int emulator_read_std(struct x86_emulate_ctxt *ctxt,
6365                              gva_t addr, void *val, unsigned int bytes,
6366                              struct x86_exception *exception, bool system)
6367 {
6368         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6369         u32 access = 0;
6370
6371         if (!system && static_call(kvm_x86_get_cpl)(vcpu) == 3)
6372                 access |= PFERR_USER_MASK;
6373
6374         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access, exception);
6375 }
6376
6377 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt *ctxt,
6378                 unsigned long addr, void *val, unsigned int bytes)
6379 {
6380         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6381         int r = kvm_vcpu_read_guest(vcpu, addr, val, bytes);
6382
6383         return r < 0 ? X86EMUL_IO_NEEDED : X86EMUL_CONTINUE;
6384 }
6385
6386 static int kvm_write_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
6387                                       struct kvm_vcpu *vcpu, u32 access,
6388                                       struct x86_exception *exception)
6389 {
6390         void *data = val;
6391         int r = X86EMUL_CONTINUE;
6392
6393         while (bytes) {
6394                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
6395                                                              access,
6396                                                              exception);
6397                 unsigned offset = addr & (PAGE_SIZE-1);
6398                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
6399                 int ret;
6400
6401                 if (gpa == UNMAPPED_GVA)
6402                         return X86EMUL_PROPAGATE_FAULT;
6403                 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
6404                 if (ret < 0) {
6405                         r = X86EMUL_IO_NEEDED;
6406                         goto out;
6407                 }
6408
6409                 bytes -= towrite;
6410                 data += towrite;
6411                 addr += towrite;
6412         }
6413 out:
6414         return r;
6415 }
6416
6417 static int emulator_write_std(struct x86_emulate_ctxt *ctxt, gva_t addr, void *val,
6418                               unsigned int bytes, struct x86_exception *exception,
6419                               bool system)
6420 {
6421         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6422         u32 access = PFERR_WRITE_MASK;
6423
6424         if (!system && static_call(kvm_x86_get_cpl)(vcpu) == 3)
6425                 access |= PFERR_USER_MASK;
6426
6427         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
6428                                            access, exception);
6429 }
6430
6431 int kvm_write_guest_virt_system(struct kvm_vcpu *vcpu, gva_t addr, void *val,
6432                                 unsigned int bytes, struct x86_exception *exception)
6433 {
6434         /* kvm_write_guest_virt_system can pull in tons of pages. */
6435         vcpu->arch.l1tf_flush_l1d = true;
6436
6437         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
6438                                            PFERR_WRITE_MASK, exception);
6439 }
6440 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
6441
6442 int handle_ud(struct kvm_vcpu *vcpu)
6443 {
6444         static const char kvm_emulate_prefix[] = { __KVM_EMULATE_PREFIX };
6445         int emul_type = EMULTYPE_TRAP_UD;
6446         char sig[5]; /* ud2; .ascii "kvm" */
6447         struct x86_exception e;
6448
6449         if (unlikely(!static_call(kvm_x86_can_emulate_instruction)(vcpu, NULL, 0)))
6450                 return 1;
6451
6452         if (force_emulation_prefix &&
6453             kvm_read_guest_virt(vcpu, kvm_get_linear_rip(vcpu),
6454                                 sig, sizeof(sig), &e) == 0 &&
6455             memcmp(sig, kvm_emulate_prefix, sizeof(sig)) == 0) {
6456                 kvm_rip_write(vcpu, kvm_rip_read(vcpu) + sizeof(sig));
6457                 emul_type = EMULTYPE_TRAP_UD_FORCED;
6458         }
6459
6460         return kvm_emulate_instruction(vcpu, emul_type);
6461 }
6462 EXPORT_SYMBOL_GPL(handle_ud);
6463
6464 static int vcpu_is_mmio_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
6465                             gpa_t gpa, bool write)
6466 {
6467         /* For APIC access vmexit */
6468         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
6469                 return 1;
6470
6471         if (vcpu_match_mmio_gpa(vcpu, gpa)) {
6472                 trace_vcpu_match_mmio(gva, gpa, write, true);
6473                 return 1;
6474         }
6475
6476         return 0;
6477 }
6478
6479 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
6480                                 gpa_t *gpa, struct x86_exception *exception,
6481                                 bool write)
6482 {
6483         u32 access = ((static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0)
6484                 | (write ? PFERR_WRITE_MASK : 0);
6485
6486         /*
6487          * currently PKRU is only applied to ept enabled guest so
6488          * there is no pkey in EPT page table for L1 guest or EPT
6489          * shadow page table for L2 guest.
6490          */
6491         if (vcpu_match_mmio_gva(vcpu, gva)
6492             && !permission_fault(vcpu, vcpu->arch.walk_mmu,
6493                                  vcpu->arch.mmio_access, 0, access)) {
6494                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
6495                                         (gva & (PAGE_SIZE - 1));
6496                 trace_vcpu_match_mmio(gva, *gpa, write, false);
6497                 return 1;
6498         }
6499
6500         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
6501
6502         if (*gpa == UNMAPPED_GVA)
6503                 return -1;
6504
6505         return vcpu_is_mmio_gpa(vcpu, gva, *gpa, write);
6506 }
6507
6508 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
6509                         const void *val, int bytes)
6510 {
6511         int ret;
6512
6513         ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
6514         if (ret < 0)
6515                 return 0;
6516         kvm_page_track_write(vcpu, gpa, val, bytes);
6517         return 1;
6518 }
6519
6520 struct read_write_emulator_ops {
6521         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
6522                                   int bytes);
6523         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
6524                                   void *val, int bytes);
6525         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
6526                                int bytes, void *val);
6527         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
6528                                     void *val, int bytes);
6529         bool write;
6530 };
6531
6532 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
6533 {
6534         if (vcpu->mmio_read_completed) {
6535                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
6536                                vcpu->mmio_fragments[0].gpa, val);
6537                 vcpu->mmio_read_completed = 0;
6538                 return 1;
6539         }
6540
6541         return 0;
6542 }
6543
6544 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
6545                         void *val, int bytes)
6546 {
6547         return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
6548 }
6549
6550 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
6551                          void *val, int bytes)
6552 {
6553         return emulator_write_phys(vcpu, gpa, val, bytes);
6554 }
6555
6556 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
6557 {
6558         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, val);
6559         return vcpu_mmio_write(vcpu, gpa, bytes, val);
6560 }
6561
6562 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
6563                           void *val, int bytes)
6564 {
6565         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, NULL);
6566         return X86EMUL_IO_NEEDED;
6567 }
6568
6569 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
6570                            void *val, int bytes)
6571 {
6572         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
6573
6574         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
6575         return X86EMUL_CONTINUE;
6576 }
6577
6578 static const struct read_write_emulator_ops read_emultor = {
6579         .read_write_prepare = read_prepare,
6580         .read_write_emulate = read_emulate,
6581         .read_write_mmio = vcpu_mmio_read,
6582         .read_write_exit_mmio = read_exit_mmio,
6583 };
6584
6585 static const struct read_write_emulator_ops write_emultor = {
6586         .read_write_emulate = write_emulate,
6587         .read_write_mmio = write_mmio,
6588         .read_write_exit_mmio = write_exit_mmio,
6589         .write = true,
6590 };
6591
6592 static int emulator_read_write_onepage(unsigned long addr, void *val,
6593                                        unsigned int bytes,
6594                                        struct x86_exception *exception,
6595                                        struct kvm_vcpu *vcpu,
6596                                        const struct read_write_emulator_ops *ops)
6597 {
6598         gpa_t gpa;
6599         int handled, ret;
6600         bool write = ops->write;
6601         struct kvm_mmio_fragment *frag;
6602         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
6603
6604         /*
6605          * If the exit was due to a NPF we may already have a GPA.
6606          * If the GPA is present, use it to avoid the GVA to GPA table walk.
6607          * Note, this cannot be used on string operations since string
6608          * operation using rep will only have the initial GPA from the NPF
6609          * occurred.
6610          */
6611         if (ctxt->gpa_available && emulator_can_use_gpa(ctxt) &&
6612             (addr & ~PAGE_MASK) == (ctxt->gpa_val & ~PAGE_MASK)) {
6613                 gpa = ctxt->gpa_val;
6614                 ret = vcpu_is_mmio_gpa(vcpu, addr, gpa, write);
6615         } else {
6616                 ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
6617                 if (ret < 0)
6618                         return X86EMUL_PROPAGATE_FAULT;
6619         }
6620
6621         if (!ret && ops->read_write_emulate(vcpu, gpa, val, bytes))
6622                 return X86EMUL_CONTINUE;
6623
6624         /*
6625          * Is this MMIO handled locally?
6626          */
6627         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
6628         if (handled == bytes)
6629                 return X86EMUL_CONTINUE;
6630
6631         gpa += handled;
6632         bytes -= handled;
6633         val += handled;
6634
6635         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
6636         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
6637         frag->gpa = gpa;
6638         frag->data = val;
6639         frag->len = bytes;
6640         return X86EMUL_CONTINUE;
6641 }
6642
6643 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
6644                         unsigned long addr,
6645                         void *val, unsigned int bytes,
6646                         struct x86_exception *exception,
6647                         const struct read_write_emulator_ops *ops)
6648 {
6649         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6650         gpa_t gpa;
6651         int rc;
6652
6653         if (ops->read_write_prepare &&
6654                   ops->read_write_prepare(vcpu, val, bytes))
6655                 return X86EMUL_CONTINUE;
6656
6657         vcpu->mmio_nr_fragments = 0;
6658
6659         /* Crossing a page boundary? */
6660         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
6661                 int now;
6662
6663                 now = -addr & ~PAGE_MASK;
6664                 rc = emulator_read_write_onepage(addr, val, now, exception,
6665                                                  vcpu, ops);
6666
6667                 if (rc != X86EMUL_CONTINUE)
6668                         return rc;
6669                 addr += now;
6670                 if (ctxt->mode != X86EMUL_MODE_PROT64)
6671                         addr = (u32)addr;
6672                 val += now;
6673                 bytes -= now;
6674         }
6675
6676         rc = emulator_read_write_onepage(addr, val, bytes, exception,
6677                                          vcpu, ops);
6678         if (rc != X86EMUL_CONTINUE)
6679                 return rc;
6680
6681         if (!vcpu->mmio_nr_fragments)
6682                 return rc;
6683
6684         gpa = vcpu->mmio_fragments[0].gpa;
6685
6686         vcpu->mmio_needed = 1;
6687         vcpu->mmio_cur_fragment = 0;
6688
6689         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
6690         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
6691         vcpu->run->exit_reason = KVM_EXIT_MMIO;
6692         vcpu->run->mmio.phys_addr = gpa;
6693
6694         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
6695 }
6696
6697 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
6698                                   unsigned long addr,
6699                                   void *val,
6700                                   unsigned int bytes,
6701                                   struct x86_exception *exception)
6702 {
6703         return emulator_read_write(ctxt, addr, val, bytes,
6704                                    exception, &read_emultor);
6705 }
6706
6707 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
6708                             unsigned long addr,
6709                             const void *val,
6710                             unsigned int bytes,
6711                             struct x86_exception *exception)
6712 {
6713         return emulator_read_write(ctxt, addr, (void *)val, bytes,
6714                                    exception, &write_emultor);
6715 }
6716
6717 #define CMPXCHG_TYPE(t, ptr, old, new) \
6718         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
6719
6720 #ifdef CONFIG_X86_64
6721 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
6722 #else
6723 #  define CMPXCHG64(ptr, old, new) \
6724         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
6725 #endif
6726
6727 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
6728                                      unsigned long addr,
6729                                      const void *old,
6730                                      const void *new,
6731                                      unsigned int bytes,
6732                                      struct x86_exception *exception)
6733 {
6734         struct kvm_host_map map;
6735         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6736         u64 page_line_mask;
6737         gpa_t gpa;
6738         char *kaddr;
6739         bool exchanged;
6740
6741         /* guests cmpxchg8b have to be emulated atomically */
6742         if (bytes > 8 || (bytes & (bytes - 1)))
6743                 goto emul_write;
6744
6745         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
6746
6747         if (gpa == UNMAPPED_GVA ||
6748             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
6749                 goto emul_write;
6750
6751         /*
6752          * Emulate the atomic as a straight write to avoid #AC if SLD is
6753          * enabled in the host and the access splits a cache line.
6754          */
6755         if (boot_cpu_has(X86_FEATURE_SPLIT_LOCK_DETECT))
6756                 page_line_mask = ~(cache_line_size() - 1);
6757         else
6758                 page_line_mask = PAGE_MASK;
6759
6760         if (((gpa + bytes - 1) & page_line_mask) != (gpa & page_line_mask))
6761                 goto emul_write;
6762
6763         if (kvm_vcpu_map(vcpu, gpa_to_gfn(gpa), &map))
6764                 goto emul_write;
6765
6766         kaddr = map.hva + offset_in_page(gpa);
6767
6768         switch (bytes) {
6769         case 1:
6770                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
6771                 break;
6772         case 2:
6773                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
6774                 break;
6775         case 4:
6776                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
6777                 break;
6778         case 8:
6779                 exchanged = CMPXCHG64(kaddr, old, new);
6780                 break;
6781         default:
6782                 BUG();
6783         }
6784
6785         kvm_vcpu_unmap(vcpu, &map, true);
6786
6787         if (!exchanged)
6788                 return X86EMUL_CMPXCHG_FAILED;
6789
6790         kvm_page_track_write(vcpu, gpa, new, bytes);
6791
6792         return X86EMUL_CONTINUE;
6793
6794 emul_write:
6795         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
6796
6797         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
6798 }
6799
6800 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
6801 {
6802         int r = 0, i;
6803
6804         for (i = 0; i < vcpu->arch.pio.count; i++) {
6805                 if (vcpu->arch.pio.in)
6806                         r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
6807                                             vcpu->arch.pio.size, pd);
6808                 else
6809                         r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
6810                                              vcpu->arch.pio.port, vcpu->arch.pio.size,
6811                                              pd);
6812                 if (r)
6813                         break;
6814                 pd += vcpu->arch.pio.size;
6815         }
6816         return r;
6817 }
6818
6819 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
6820                                unsigned short port, void *val,
6821                                unsigned int count, bool in)
6822 {
6823         vcpu->arch.pio.port = port;
6824         vcpu->arch.pio.in = in;
6825         vcpu->arch.pio.count  = count;
6826         vcpu->arch.pio.size = size;
6827
6828         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
6829                 vcpu->arch.pio.count = 0;
6830                 return 1;
6831         }
6832
6833         vcpu->run->exit_reason = KVM_EXIT_IO;
6834         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
6835         vcpu->run->io.size = size;
6836         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
6837         vcpu->run->io.count = count;
6838         vcpu->run->io.port = port;
6839
6840         return 0;
6841 }
6842
6843 static int emulator_pio_in(struct kvm_vcpu *vcpu, int size,
6844                            unsigned short port, void *val, unsigned int count)
6845 {
6846         int ret;
6847
6848         if (vcpu->arch.pio.count)
6849                 goto data_avail;
6850
6851         memset(vcpu->arch.pio_data, 0, size * count);
6852
6853         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
6854         if (ret) {
6855 data_avail:
6856                 memcpy(val, vcpu->arch.pio_data, size * count);
6857                 trace_kvm_pio(KVM_PIO_IN, port, size, count, vcpu->arch.pio_data);
6858                 vcpu->arch.pio.count = 0;
6859                 return 1;
6860         }
6861
6862         return 0;
6863 }
6864
6865 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
6866                                     int size, unsigned short port, void *val,
6867                                     unsigned int count)
6868 {
6869         return emulator_pio_in(emul_to_vcpu(ctxt), size, port, val, count);
6870
6871 }
6872
6873 static int emulator_pio_out(struct kvm_vcpu *vcpu, int size,
6874                             unsigned short port, const void *val,
6875                             unsigned int count)
6876 {
6877         memcpy(vcpu->arch.pio_data, val, size * count);
6878         trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
6879         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
6880 }
6881
6882 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
6883                                      int size, unsigned short port,
6884                                      const void *val, unsigned int count)
6885 {
6886         return emulator_pio_out(emul_to_vcpu(ctxt), size, port, val, count);
6887 }
6888
6889 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
6890 {
6891         return static_call(kvm_x86_get_segment_base)(vcpu, seg);
6892 }
6893
6894 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
6895 {
6896         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
6897 }
6898
6899 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
6900 {
6901         if (!need_emulate_wbinvd(vcpu))
6902                 return X86EMUL_CONTINUE;
6903
6904         if (static_call(kvm_x86_has_wbinvd_exit)()) {
6905                 int cpu = get_cpu();
6906
6907                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
6908                 on_each_cpu_mask(vcpu->arch.wbinvd_dirty_mask,
6909                                 wbinvd_ipi, NULL, 1);
6910                 put_cpu();
6911                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
6912         } else
6913                 wbinvd();
6914         return X86EMUL_CONTINUE;
6915 }
6916
6917 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
6918 {
6919         kvm_emulate_wbinvd_noskip(vcpu);
6920         return kvm_skip_emulated_instruction(vcpu);
6921 }
6922 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
6923
6924
6925
6926 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
6927 {
6928         kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
6929 }
6930
6931 static void emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
6932                             unsigned long *dest)
6933 {
6934         kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
6935 }
6936
6937 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
6938                            unsigned long value)
6939 {
6940
6941         return kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
6942 }
6943
6944 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
6945 {
6946         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
6947 }
6948
6949 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
6950 {
6951         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6952         unsigned long value;
6953
6954         switch (cr) {
6955         case 0:
6956                 value = kvm_read_cr0(vcpu);
6957                 break;
6958         case 2:
6959                 value = vcpu->arch.cr2;
6960                 break;
6961         case 3:
6962                 value = kvm_read_cr3(vcpu);
6963                 break;
6964         case 4:
6965                 value = kvm_read_cr4(vcpu);
6966                 break;
6967         case 8:
6968                 value = kvm_get_cr8(vcpu);
6969                 break;
6970         default:
6971                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
6972                 return 0;
6973         }
6974
6975         return value;
6976 }
6977
6978 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
6979 {
6980         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6981         int res = 0;
6982
6983         switch (cr) {
6984         case 0:
6985                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
6986                 break;
6987         case 2:
6988                 vcpu->arch.cr2 = val;
6989                 break;
6990         case 3:
6991                 res = kvm_set_cr3(vcpu, val);
6992                 break;
6993         case 4:
6994                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
6995                 break;
6996         case 8:
6997                 res = kvm_set_cr8(vcpu, val);
6998                 break;
6999         default:
7000                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
7001                 res = -1;
7002         }
7003
7004         return res;
7005 }
7006
7007 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
7008 {
7009         return static_call(kvm_x86_get_cpl)(emul_to_vcpu(ctxt));
7010 }
7011
7012 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
7013 {
7014         static_call(kvm_x86_get_gdt)(emul_to_vcpu(ctxt), dt);
7015 }
7016
7017 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
7018 {
7019         static_call(kvm_x86_get_idt)(emul_to_vcpu(ctxt), dt);
7020 }
7021
7022 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
7023 {
7024         static_call(kvm_x86_set_gdt)(emul_to_vcpu(ctxt), dt);
7025 }
7026
7027 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
7028 {
7029         static_call(kvm_x86_set_idt)(emul_to_vcpu(ctxt), dt);
7030 }
7031
7032 static unsigned long emulator_get_cached_segment_base(
7033         struct x86_emulate_ctxt *ctxt, int seg)
7034 {
7035         return get_segment_base(emul_to_vcpu(ctxt), seg);
7036 }
7037
7038 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
7039                                  struct desc_struct *desc, u32 *base3,
7040                                  int seg)
7041 {
7042         struct kvm_segment var;
7043
7044         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
7045         *selector = var.selector;
7046
7047         if (var.unusable) {
7048                 memset(desc, 0, sizeof(*desc));
7049                 if (base3)
7050                         *base3 = 0;
7051                 return false;
7052         }
7053
7054         if (var.g)
7055                 var.limit >>= 12;
7056         set_desc_limit(desc, var.limit);
7057         set_desc_base(desc, (unsigned long)var.base);
7058 #ifdef CONFIG_X86_64
7059         if (base3)
7060                 *base3 = var.base >> 32;
7061 #endif
7062         desc->type = var.type;
7063         desc->s = var.s;
7064         desc->dpl = var.dpl;
7065         desc->p = var.present;
7066         desc->avl = var.avl;
7067         desc->l = var.l;
7068         desc->d = var.db;
7069         desc->g = var.g;
7070
7071         return true;
7072 }
7073
7074 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
7075                                  struct desc_struct *desc, u32 base3,
7076                                  int seg)
7077 {
7078         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7079         struct kvm_segment var;
7080
7081         var.selector = selector;
7082         var.base = get_desc_base(desc);
7083 #ifdef CONFIG_X86_64
7084         var.base |= ((u64)base3) << 32;
7085 #endif
7086         var.limit = get_desc_limit(desc);
7087         if (desc->g)
7088                 var.limit = (var.limit << 12) | 0xfff;
7089         var.type = desc->type;
7090         var.dpl = desc->dpl;
7091         var.db = desc->d;
7092         var.s = desc->s;
7093         var.l = desc->l;
7094         var.g = desc->g;
7095         var.avl = desc->avl;
7096         var.present = desc->p;
7097         var.unusable = !var.present;
7098         var.padding = 0;
7099
7100         kvm_set_segment(vcpu, &var, seg);
7101         return;
7102 }
7103
7104 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
7105                             u32 msr_index, u64 *pdata)
7106 {
7107         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7108         int r;
7109
7110         r = kvm_get_msr(vcpu, msr_index, pdata);
7111
7112         if (r && kvm_get_msr_user_space(vcpu, msr_index, r)) {
7113                 /* Bounce to user space */
7114                 return X86EMUL_IO_NEEDED;
7115         }
7116
7117         return r;
7118 }
7119
7120 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
7121                             u32 msr_index, u64 data)
7122 {
7123         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7124         int r;
7125
7126         r = kvm_set_msr(vcpu, msr_index, data);
7127
7128         if (r && kvm_set_msr_user_space(vcpu, msr_index, data, r)) {
7129                 /* Bounce to user space */
7130                 return X86EMUL_IO_NEEDED;
7131         }
7132
7133         return r;
7134 }
7135
7136 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
7137 {
7138         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7139
7140         return vcpu->arch.smbase;
7141 }
7142
7143 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
7144 {
7145         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7146
7147         vcpu->arch.smbase = smbase;
7148 }
7149
7150 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
7151                               u32 pmc)
7152 {
7153         return kvm_pmu_is_valid_rdpmc_ecx(emul_to_vcpu(ctxt), pmc);
7154 }
7155
7156 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
7157                              u32 pmc, u64 *pdata)
7158 {
7159         return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
7160 }
7161
7162 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
7163 {
7164         emul_to_vcpu(ctxt)->arch.halt_request = 1;
7165 }
7166
7167 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
7168                               struct x86_instruction_info *info,
7169                               enum x86_intercept_stage stage)
7170 {
7171         return static_call(kvm_x86_check_intercept)(emul_to_vcpu(ctxt), info, stage,
7172                                             &ctxt->exception);
7173 }
7174
7175 static bool emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
7176                               u32 *eax, u32 *ebx, u32 *ecx, u32 *edx,
7177                               bool exact_only)
7178 {
7179         return kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx, exact_only);
7180 }
7181
7182 static bool emulator_guest_has_long_mode(struct x86_emulate_ctxt *ctxt)
7183 {
7184         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_LM);
7185 }
7186
7187 static bool emulator_guest_has_movbe(struct x86_emulate_ctxt *ctxt)
7188 {
7189         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_MOVBE);
7190 }
7191
7192 static bool emulator_guest_has_fxsr(struct x86_emulate_ctxt *ctxt)
7193 {
7194         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_FXSR);
7195 }
7196
7197 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
7198 {
7199         return kvm_register_read_raw(emul_to_vcpu(ctxt), reg);
7200 }
7201
7202 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
7203 {
7204         kvm_register_write_raw(emul_to_vcpu(ctxt), reg, val);
7205 }
7206
7207 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
7208 {
7209         static_call(kvm_x86_set_nmi_mask)(emul_to_vcpu(ctxt), masked);
7210 }
7211
7212 static unsigned emulator_get_hflags(struct x86_emulate_ctxt *ctxt)
7213 {
7214         return emul_to_vcpu(ctxt)->arch.hflags;
7215 }
7216
7217 static void emulator_exiting_smm(struct x86_emulate_ctxt *ctxt)
7218 {
7219         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7220
7221         vcpu->arch.hflags &= ~(HF_SMM_MASK | HF_SMM_INSIDE_NMI_MASK);
7222         kvm_smm_changed(vcpu);
7223 }
7224
7225 static int emulator_pre_leave_smm(struct x86_emulate_ctxt *ctxt,
7226                                   const char *smstate)
7227 {
7228         return static_call(kvm_x86_pre_leave_smm)(emul_to_vcpu(ctxt), smstate);
7229 }
7230
7231 static void emulator_post_leave_smm(struct x86_emulate_ctxt *ctxt)
7232 {
7233         kvm_mmu_reset_context(emul_to_vcpu(ctxt));
7234 }
7235
7236 static void emulator_triple_fault(struct x86_emulate_ctxt *ctxt)
7237 {
7238         kvm_make_request(KVM_REQ_TRIPLE_FAULT, emul_to_vcpu(ctxt));
7239 }
7240
7241 static int emulator_set_xcr(struct x86_emulate_ctxt *ctxt, u32 index, u64 xcr)
7242 {
7243         return __kvm_set_xcr(emul_to_vcpu(ctxt), index, xcr);
7244 }
7245
7246 static const struct x86_emulate_ops emulate_ops = {
7247         .read_gpr            = emulator_read_gpr,
7248         .write_gpr           = emulator_write_gpr,
7249         .read_std            = emulator_read_std,
7250         .write_std           = emulator_write_std,
7251         .read_phys           = kvm_read_guest_phys_system,
7252         .fetch               = kvm_fetch_guest_virt,
7253         .read_emulated       = emulator_read_emulated,
7254         .write_emulated      = emulator_write_emulated,
7255         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
7256         .invlpg              = emulator_invlpg,
7257         .pio_in_emulated     = emulator_pio_in_emulated,
7258         .pio_out_emulated    = emulator_pio_out_emulated,
7259         .get_segment         = emulator_get_segment,
7260         .set_segment         = emulator_set_segment,
7261         .get_cached_segment_base = emulator_get_cached_segment_base,
7262         .get_gdt             = emulator_get_gdt,
7263         .get_idt             = emulator_get_idt,
7264         .set_gdt             = emulator_set_gdt,
7265         .set_idt             = emulator_set_idt,
7266         .get_cr              = emulator_get_cr,
7267         .set_cr              = emulator_set_cr,
7268         .cpl                 = emulator_get_cpl,
7269         .get_dr              = emulator_get_dr,
7270         .set_dr              = emulator_set_dr,
7271         .get_smbase          = emulator_get_smbase,
7272         .set_smbase          = emulator_set_smbase,
7273         .set_msr             = emulator_set_msr,
7274         .get_msr             = emulator_get_msr,
7275         .check_pmc           = emulator_check_pmc,
7276         .read_pmc            = emulator_read_pmc,
7277         .halt                = emulator_halt,
7278         .wbinvd              = emulator_wbinvd,
7279         .fix_hypercall       = emulator_fix_hypercall,
7280         .intercept           = emulator_intercept,
7281         .get_cpuid           = emulator_get_cpuid,
7282         .guest_has_long_mode = emulator_guest_has_long_mode,
7283         .guest_has_movbe     = emulator_guest_has_movbe,
7284         .guest_has_fxsr      = emulator_guest_has_fxsr,
7285         .set_nmi_mask        = emulator_set_nmi_mask,
7286         .get_hflags          = emulator_get_hflags,
7287         .exiting_smm         = emulator_exiting_smm,
7288         .pre_leave_smm       = emulator_pre_leave_smm,
7289         .post_leave_smm      = emulator_post_leave_smm,
7290         .triple_fault        = emulator_triple_fault,
7291         .set_xcr             = emulator_set_xcr,
7292 };
7293
7294 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
7295 {
7296         u32 int_shadow = static_call(kvm_x86_get_interrupt_shadow)(vcpu);
7297         /*
7298          * an sti; sti; sequence only disable interrupts for the first
7299          * instruction. So, if the last instruction, be it emulated or
7300          * not, left the system with the INT_STI flag enabled, it
7301          * means that the last instruction is an sti. We should not
7302          * leave the flag on in this case. The same goes for mov ss
7303          */
7304         if (int_shadow & mask)
7305                 mask = 0;
7306         if (unlikely(int_shadow || mask)) {
7307                 static_call(kvm_x86_set_interrupt_shadow)(vcpu, mask);
7308                 if (!mask)
7309                         kvm_make_request(KVM_REQ_EVENT, vcpu);
7310         }
7311 }
7312
7313 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
7314 {
7315         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7316         if (ctxt->exception.vector == PF_VECTOR)
7317                 return kvm_inject_emulated_page_fault(vcpu, &ctxt->exception);
7318
7319         if (ctxt->exception.error_code_valid)
7320                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
7321                                       ctxt->exception.error_code);
7322         else
7323                 kvm_queue_exception(vcpu, ctxt->exception.vector);
7324         return false;
7325 }
7326
7327 static struct x86_emulate_ctxt *alloc_emulate_ctxt(struct kvm_vcpu *vcpu)
7328 {
7329         struct x86_emulate_ctxt *ctxt;
7330
7331         ctxt = kmem_cache_zalloc(x86_emulator_cache, GFP_KERNEL_ACCOUNT);
7332         if (!ctxt) {
7333                 pr_err("kvm: failed to allocate vcpu's emulator\n");
7334                 return NULL;
7335         }
7336
7337         ctxt->vcpu = vcpu;
7338         ctxt->ops = &emulate_ops;
7339         vcpu->arch.emulate_ctxt = ctxt;
7340
7341         return ctxt;
7342 }
7343
7344 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
7345 {
7346         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7347         int cs_db, cs_l;
7348
7349         static_call(kvm_x86_get_cs_db_l_bits)(vcpu, &cs_db, &cs_l);
7350
7351         ctxt->gpa_available = false;
7352         ctxt->eflags = kvm_get_rflags(vcpu);
7353         ctxt->tf = (ctxt->eflags & X86_EFLAGS_TF) != 0;
7354
7355         ctxt->eip = kvm_rip_read(vcpu);
7356         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
7357                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
7358                      (cs_l && is_long_mode(vcpu))       ? X86EMUL_MODE_PROT64 :
7359                      cs_db                              ? X86EMUL_MODE_PROT32 :
7360                                                           X86EMUL_MODE_PROT16;
7361         BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
7362         BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
7363         BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
7364
7365         ctxt->interruptibility = 0;
7366         ctxt->have_exception = false;
7367         ctxt->exception.vector = -1;
7368         ctxt->perm_ok = false;
7369
7370         init_decode_cache(ctxt);
7371         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
7372 }
7373
7374 void kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
7375 {
7376         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7377         int ret;
7378
7379         init_emulate_ctxt(vcpu);
7380
7381         ctxt->op_bytes = 2;
7382         ctxt->ad_bytes = 2;
7383         ctxt->_eip = ctxt->eip + inc_eip;
7384         ret = emulate_int_real(ctxt, irq);
7385
7386         if (ret != X86EMUL_CONTINUE) {
7387                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
7388         } else {
7389                 ctxt->eip = ctxt->_eip;
7390                 kvm_rip_write(vcpu, ctxt->eip);
7391                 kvm_set_rflags(vcpu, ctxt->eflags);
7392         }
7393 }
7394 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
7395
7396 static int handle_emulation_failure(struct kvm_vcpu *vcpu, int emulation_type)
7397 {
7398         ++vcpu->stat.insn_emulation_fail;
7399         trace_kvm_emulate_insn_failed(vcpu);
7400
7401         if (emulation_type & EMULTYPE_VMWARE_GP) {
7402                 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
7403                 return 1;
7404         }
7405
7406         if (emulation_type & EMULTYPE_SKIP) {
7407                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
7408                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
7409                 vcpu->run->internal.ndata = 0;
7410                 return 0;
7411         }
7412
7413         kvm_queue_exception(vcpu, UD_VECTOR);
7414
7415         if (!is_guest_mode(vcpu) && static_call(kvm_x86_get_cpl)(vcpu) == 0) {
7416                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
7417                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
7418                 vcpu->run->internal.ndata = 0;
7419                 return 0;
7420         }
7421
7422         return 1;
7423 }
7424
7425 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa,
7426                                   bool write_fault_to_shadow_pgtable,
7427                                   int emulation_type)
7428 {
7429         gpa_t gpa = cr2_or_gpa;
7430         kvm_pfn_t pfn;
7431
7432         if (!(emulation_type & EMULTYPE_ALLOW_RETRY_PF))
7433                 return false;
7434
7435         if (WARN_ON_ONCE(is_guest_mode(vcpu)) ||
7436             WARN_ON_ONCE(!(emulation_type & EMULTYPE_PF)))
7437                 return false;
7438
7439         if (!vcpu->arch.mmu->direct_map) {
7440                 /*
7441                  * Write permission should be allowed since only
7442                  * write access need to be emulated.
7443                  */
7444                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2_or_gpa, NULL);
7445
7446                 /*
7447                  * If the mapping is invalid in guest, let cpu retry
7448                  * it to generate fault.
7449                  */
7450                 if (gpa == UNMAPPED_GVA)
7451                         return true;
7452         }
7453
7454         /*
7455          * Do not retry the unhandleable instruction if it faults on the
7456          * readonly host memory, otherwise it will goto a infinite loop:
7457          * retry instruction -> write #PF -> emulation fail -> retry
7458          * instruction -> ...
7459          */
7460         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
7461
7462         /*
7463          * If the instruction failed on the error pfn, it can not be fixed,
7464          * report the error to userspace.
7465          */
7466         if (is_error_noslot_pfn(pfn))
7467                 return false;
7468
7469         kvm_release_pfn_clean(pfn);
7470
7471         /* The instructions are well-emulated on direct mmu. */
7472         if (vcpu->arch.mmu->direct_map) {
7473                 unsigned int indirect_shadow_pages;
7474
7475                 write_lock(&vcpu->kvm->mmu_lock);
7476                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
7477                 write_unlock(&vcpu->kvm->mmu_lock);
7478
7479                 if (indirect_shadow_pages)
7480                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
7481
7482                 return true;
7483         }
7484
7485         /*
7486          * if emulation was due to access to shadowed page table
7487          * and it failed try to unshadow page and re-enter the
7488          * guest to let CPU execute the instruction.
7489          */
7490         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
7491
7492         /*
7493          * If the access faults on its page table, it can not
7494          * be fixed by unprotecting shadow page and it should
7495          * be reported to userspace.
7496          */
7497         return !write_fault_to_shadow_pgtable;
7498 }
7499
7500 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
7501                               gpa_t cr2_or_gpa,  int emulation_type)
7502 {
7503         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7504         unsigned long last_retry_eip, last_retry_addr, gpa = cr2_or_gpa;
7505
7506         last_retry_eip = vcpu->arch.last_retry_eip;
7507         last_retry_addr = vcpu->arch.last_retry_addr;
7508
7509         /*
7510          * If the emulation is caused by #PF and it is non-page_table
7511          * writing instruction, it means the VM-EXIT is caused by shadow
7512          * page protected, we can zap the shadow page and retry this
7513          * instruction directly.
7514          *
7515          * Note: if the guest uses a non-page-table modifying instruction
7516          * on the PDE that points to the instruction, then we will unmap
7517          * the instruction and go to an infinite loop. So, we cache the
7518          * last retried eip and the last fault address, if we meet the eip
7519          * and the address again, we can break out of the potential infinite
7520          * loop.
7521          */
7522         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
7523
7524         if (!(emulation_type & EMULTYPE_ALLOW_RETRY_PF))
7525                 return false;
7526
7527         if (WARN_ON_ONCE(is_guest_mode(vcpu)) ||
7528             WARN_ON_ONCE(!(emulation_type & EMULTYPE_PF)))
7529                 return false;
7530
7531         if (x86_page_table_writing_insn(ctxt))
7532                 return false;
7533
7534         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2_or_gpa)
7535                 return false;
7536
7537         vcpu->arch.last_retry_eip = ctxt->eip;
7538         vcpu->arch.last_retry_addr = cr2_or_gpa;
7539
7540         if (!vcpu->arch.mmu->direct_map)
7541                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2_or_gpa, NULL);
7542
7543         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
7544
7545         return true;
7546 }
7547
7548 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
7549 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
7550
7551 static void kvm_smm_changed(struct kvm_vcpu *vcpu)
7552 {
7553         if (!(vcpu->arch.hflags & HF_SMM_MASK)) {
7554                 /* This is a good place to trace that we are exiting SMM.  */
7555                 trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, false);
7556
7557                 /* Process a latched INIT or SMI, if any.  */
7558                 kvm_make_request(KVM_REQ_EVENT, vcpu);
7559         }
7560
7561         kvm_mmu_reset_context(vcpu);
7562 }
7563
7564 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
7565                                 unsigned long *db)
7566 {
7567         u32 dr6 = 0;
7568         int i;
7569         u32 enable, rwlen;
7570
7571         enable = dr7;
7572         rwlen = dr7 >> 16;
7573         for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
7574                 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
7575                         dr6 |= (1 << i);
7576         return dr6;
7577 }
7578
7579 static int kvm_vcpu_do_singlestep(struct kvm_vcpu *vcpu)
7580 {
7581         struct kvm_run *kvm_run = vcpu->run;
7582
7583         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
7584                 kvm_run->debug.arch.dr6 = DR6_BS | DR6_ACTIVE_LOW;
7585                 kvm_run->debug.arch.pc = kvm_get_linear_rip(vcpu);
7586                 kvm_run->debug.arch.exception = DB_VECTOR;
7587                 kvm_run->exit_reason = KVM_EXIT_DEBUG;
7588                 return 0;
7589         }
7590         kvm_queue_exception_p(vcpu, DB_VECTOR, DR6_BS);
7591         return 1;
7592 }
7593
7594 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu)
7595 {
7596         unsigned long rflags = static_call(kvm_x86_get_rflags)(vcpu);
7597         int r;
7598
7599         r = static_call(kvm_x86_skip_emulated_instruction)(vcpu);
7600         if (unlikely(!r))
7601                 return 0;
7602
7603         /*
7604          * rflags is the old, "raw" value of the flags.  The new value has
7605          * not been saved yet.
7606          *
7607          * This is correct even for TF set by the guest, because "the
7608          * processor will not generate this exception after the instruction
7609          * that sets the TF flag".
7610          */
7611         if (unlikely(rflags & X86_EFLAGS_TF))
7612                 r = kvm_vcpu_do_singlestep(vcpu);
7613         return r;
7614 }
7615 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction);
7616
7617 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
7618 {
7619         if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
7620             (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
7621                 struct kvm_run *kvm_run = vcpu->run;
7622                 unsigned long eip = kvm_get_linear_rip(vcpu);
7623                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
7624                                            vcpu->arch.guest_debug_dr7,
7625                                            vcpu->arch.eff_db);
7626
7627                 if (dr6 != 0) {
7628                         kvm_run->debug.arch.dr6 = dr6 | DR6_ACTIVE_LOW;
7629                         kvm_run->debug.arch.pc = eip;
7630                         kvm_run->debug.arch.exception = DB_VECTOR;
7631                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
7632                         *r = 0;
7633                         return true;
7634                 }
7635         }
7636
7637         if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
7638             !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
7639                 unsigned long eip = kvm_get_linear_rip(vcpu);
7640                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
7641                                            vcpu->arch.dr7,
7642                                            vcpu->arch.db);
7643
7644                 if (dr6 != 0) {
7645                         kvm_queue_exception_p(vcpu, DB_VECTOR, dr6);
7646                         *r = 1;
7647                         return true;
7648                 }
7649         }
7650
7651         return false;
7652 }
7653
7654 static bool is_vmware_backdoor_opcode(struct x86_emulate_ctxt *ctxt)
7655 {
7656         switch (ctxt->opcode_len) {
7657         case 1:
7658                 switch (ctxt->b) {
7659                 case 0xe4:      /* IN */
7660                 case 0xe5:
7661                 case 0xec:
7662                 case 0xed:
7663                 case 0xe6:      /* OUT */
7664                 case 0xe7:
7665                 case 0xee:
7666                 case 0xef:
7667                 case 0x6c:      /* INS */
7668                 case 0x6d:
7669                 case 0x6e:      /* OUTS */
7670                 case 0x6f:
7671                         return true;
7672                 }
7673                 break;
7674         case 2:
7675                 switch (ctxt->b) {
7676                 case 0x33:      /* RDPMC */
7677                         return true;
7678                 }
7679                 break;
7680         }
7681
7682         return false;
7683 }
7684
7685 /*
7686  * Decode to be emulated instruction. Return EMULATION_OK if success.
7687  */
7688 int x86_decode_emulated_instruction(struct kvm_vcpu *vcpu, int emulation_type,
7689                                     void *insn, int insn_len)
7690 {
7691         int r = EMULATION_OK;
7692         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7693
7694         init_emulate_ctxt(vcpu);
7695
7696         /*
7697          * We will reenter on the same instruction since we do not set
7698          * complete_userspace_io. This does not handle watchpoints yet,
7699          * those would be handled in the emulate_ops.
7700          */
7701         if (!(emulation_type & EMULTYPE_SKIP) &&
7702             kvm_vcpu_check_breakpoint(vcpu, &r))
7703                 return r;
7704
7705         r = x86_decode_insn(ctxt, insn, insn_len, emulation_type);
7706
7707         trace_kvm_emulate_insn_start(vcpu);
7708         ++vcpu->stat.insn_emulation;
7709
7710         return r;
7711 }
7712 EXPORT_SYMBOL_GPL(x86_decode_emulated_instruction);
7713
7714 int x86_emulate_instruction(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa,
7715                             int emulation_type, void *insn, int insn_len)
7716 {
7717         int r;
7718         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7719         bool writeback = true;
7720         bool write_fault_to_spt;
7721
7722         if (unlikely(!static_call(kvm_x86_can_emulate_instruction)(vcpu, insn, insn_len)))
7723                 return 1;
7724
7725         vcpu->arch.l1tf_flush_l1d = true;
7726
7727         /*
7728          * Clear write_fault_to_shadow_pgtable here to ensure it is
7729          * never reused.
7730          */
7731         write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
7732         vcpu->arch.write_fault_to_shadow_pgtable = false;
7733
7734         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
7735                 kvm_clear_exception_queue(vcpu);
7736
7737                 r = x86_decode_emulated_instruction(vcpu, emulation_type,
7738                                                     insn, insn_len);
7739                 if (r != EMULATION_OK)  {
7740                         if ((emulation_type & EMULTYPE_TRAP_UD) ||
7741                             (emulation_type & EMULTYPE_TRAP_UD_FORCED)) {
7742                                 kvm_queue_exception(vcpu, UD_VECTOR);
7743                                 return 1;
7744                         }
7745                         if (reexecute_instruction(vcpu, cr2_or_gpa,
7746                                                   write_fault_to_spt,
7747                                                   emulation_type))
7748                                 return 1;
7749                         if (ctxt->have_exception) {
7750                                 /*
7751                                  * #UD should result in just EMULATION_FAILED, and trap-like
7752                                  * exception should not be encountered during decode.
7753                                  */
7754                                 WARN_ON_ONCE(ctxt->exception.vector == UD_VECTOR ||
7755                                              exception_type(ctxt->exception.vector) == EXCPT_TRAP);
7756                                 inject_emulated_exception(vcpu);
7757                                 return 1;
7758                         }
7759                         return handle_emulation_failure(vcpu, emulation_type);
7760                 }
7761         }
7762
7763         if ((emulation_type & EMULTYPE_VMWARE_GP) &&
7764             !is_vmware_backdoor_opcode(ctxt)) {
7765                 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
7766                 return 1;
7767         }
7768
7769         /*
7770          * Note, EMULTYPE_SKIP is intended for use *only* by vendor callbacks
7771          * for kvm_skip_emulated_instruction().  The caller is responsible for
7772          * updating interruptibility state and injecting single-step #DBs.
7773          */
7774         if (emulation_type & EMULTYPE_SKIP) {
7775                 kvm_rip_write(vcpu, ctxt->_eip);
7776                 if (ctxt->eflags & X86_EFLAGS_RF)
7777                         kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
7778                 return 1;
7779         }
7780
7781         if (retry_instruction(ctxt, cr2_or_gpa, emulation_type))
7782                 return 1;
7783
7784         /* this is needed for vmware backdoor interface to work since it
7785            changes registers values  during IO operation */
7786         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
7787                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
7788                 emulator_invalidate_register_cache(ctxt);
7789         }
7790
7791 restart:
7792         if (emulation_type & EMULTYPE_PF) {
7793                 /* Save the faulting GPA (cr2) in the address field */
7794                 ctxt->exception.address = cr2_or_gpa;
7795
7796                 /* With shadow page tables, cr2 contains a GVA or nGPA. */
7797                 if (vcpu->arch.mmu->direct_map) {
7798                         ctxt->gpa_available = true;
7799                         ctxt->gpa_val = cr2_or_gpa;
7800                 }
7801         } else {
7802                 /* Sanitize the address out of an abundance of paranoia. */
7803                 ctxt->exception.address = 0;
7804         }
7805
7806         r = x86_emulate_insn(ctxt);
7807
7808         if (r == EMULATION_INTERCEPTED)
7809                 return 1;
7810
7811         if (r == EMULATION_FAILED) {
7812                 if (reexecute_instruction(vcpu, cr2_or_gpa, write_fault_to_spt,
7813                                         emulation_type))
7814                         return 1;
7815
7816                 return handle_emulation_failure(vcpu, emulation_type);
7817         }
7818
7819         if (ctxt->have_exception) {
7820                 r = 1;
7821                 if (inject_emulated_exception(vcpu))
7822                         return r;
7823         } else if (vcpu->arch.pio.count) {
7824                 if (!vcpu->arch.pio.in) {
7825                         /* FIXME: return into emulator if single-stepping.  */
7826                         vcpu->arch.pio.count = 0;
7827                 } else {
7828                         writeback = false;
7829                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
7830                 }
7831                 r = 0;
7832         } else if (vcpu->mmio_needed) {
7833                 ++vcpu->stat.mmio_exits;
7834
7835                 if (!vcpu->mmio_is_write)
7836                         writeback = false;
7837                 r = 0;
7838                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
7839         } else if (r == EMULATION_RESTART)
7840                 goto restart;
7841         else
7842                 r = 1;
7843
7844         if (writeback) {
7845                 unsigned long rflags = static_call(kvm_x86_get_rflags)(vcpu);
7846                 toggle_interruptibility(vcpu, ctxt->interruptibility);
7847                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
7848                 if (!ctxt->have_exception ||
7849                     exception_type(ctxt->exception.vector) == EXCPT_TRAP) {
7850                         kvm_rip_write(vcpu, ctxt->eip);
7851                         if (r && (ctxt->tf || (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)))
7852                                 r = kvm_vcpu_do_singlestep(vcpu);
7853                         if (kvm_x86_ops.update_emulated_instruction)
7854                                 static_call(kvm_x86_update_emulated_instruction)(vcpu);
7855                         __kvm_set_rflags(vcpu, ctxt->eflags);
7856                 }
7857
7858                 /*
7859                  * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
7860                  * do nothing, and it will be requested again as soon as
7861                  * the shadow expires.  But we still need to check here,
7862                  * because POPF has no interrupt shadow.
7863                  */
7864                 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
7865                         kvm_make_request(KVM_REQ_EVENT, vcpu);
7866         } else
7867                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
7868
7869         return r;
7870 }
7871
7872 int kvm_emulate_instruction(struct kvm_vcpu *vcpu, int emulation_type)
7873 {
7874         return x86_emulate_instruction(vcpu, 0, emulation_type, NULL, 0);
7875 }
7876 EXPORT_SYMBOL_GPL(kvm_emulate_instruction);
7877
7878 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu *vcpu,
7879                                         void *insn, int insn_len)
7880 {
7881         return x86_emulate_instruction(vcpu, 0, 0, insn, insn_len);
7882 }
7883 EXPORT_SYMBOL_GPL(kvm_emulate_instruction_from_buffer);
7884
7885 static int complete_fast_pio_out_port_0x7e(struct kvm_vcpu *vcpu)
7886 {
7887         vcpu->arch.pio.count = 0;
7888         return 1;
7889 }
7890
7891 static int complete_fast_pio_out(struct kvm_vcpu *vcpu)
7892 {
7893         vcpu->arch.pio.count = 0;
7894
7895         if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip)))
7896                 return 1;
7897
7898         return kvm_skip_emulated_instruction(vcpu);
7899 }
7900
7901 static int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size,
7902                             unsigned short port)
7903 {
7904         unsigned long val = kvm_rax_read(vcpu);
7905         int ret = emulator_pio_out(vcpu, size, port, &val, 1);
7906
7907         if (ret)
7908                 return ret;
7909
7910         /*
7911          * Workaround userspace that relies on old KVM behavior of %rip being
7912          * incremented prior to exiting to userspace to handle "OUT 0x7e".
7913          */
7914         if (port == 0x7e &&
7915             kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_OUT_7E_INC_RIP)) {
7916                 vcpu->arch.complete_userspace_io =
7917                         complete_fast_pio_out_port_0x7e;
7918                 kvm_skip_emulated_instruction(vcpu);
7919         } else {
7920                 vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
7921                 vcpu->arch.complete_userspace_io = complete_fast_pio_out;
7922         }
7923         return 0;
7924 }
7925
7926 static int complete_fast_pio_in(struct kvm_vcpu *vcpu)
7927 {
7928         unsigned long val;
7929
7930         /* We should only ever be called with arch.pio.count equal to 1 */
7931         BUG_ON(vcpu->arch.pio.count != 1);
7932
7933         if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip))) {
7934                 vcpu->arch.pio.count = 0;
7935                 return 1;
7936         }
7937
7938         /* For size less than 4 we merge, else we zero extend */
7939         val = (vcpu->arch.pio.size < 4) ? kvm_rax_read(vcpu) : 0;
7940
7941         /*
7942          * Since vcpu->arch.pio.count == 1 let emulator_pio_in perform
7943          * the copy and tracing
7944          */
7945         emulator_pio_in(vcpu, vcpu->arch.pio.size, vcpu->arch.pio.port, &val, 1);
7946         kvm_rax_write(vcpu, val);
7947
7948         return kvm_skip_emulated_instruction(vcpu);
7949 }
7950
7951 static int kvm_fast_pio_in(struct kvm_vcpu *vcpu, int size,
7952                            unsigned short port)
7953 {
7954         unsigned long val;
7955         int ret;
7956
7957         /* For size less than 4 we merge, else we zero extend */
7958         val = (size < 4) ? kvm_rax_read(vcpu) : 0;
7959
7960         ret = emulator_pio_in(vcpu, size, port, &val, 1);
7961         if (ret) {
7962                 kvm_rax_write(vcpu, val);
7963                 return ret;
7964         }
7965
7966         vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
7967         vcpu->arch.complete_userspace_io = complete_fast_pio_in;
7968
7969         return 0;
7970 }
7971
7972 int kvm_fast_pio(struct kvm_vcpu *vcpu, int size, unsigned short port, int in)
7973 {
7974         int ret;
7975
7976         if (in)
7977                 ret = kvm_fast_pio_in(vcpu, size, port);
7978         else
7979                 ret = kvm_fast_pio_out(vcpu, size, port);
7980         return ret && kvm_skip_emulated_instruction(vcpu);
7981 }
7982 EXPORT_SYMBOL_GPL(kvm_fast_pio);
7983
7984 static int kvmclock_cpu_down_prep(unsigned int cpu)
7985 {
7986         __this_cpu_write(cpu_tsc_khz, 0);
7987         return 0;
7988 }
7989
7990 static void tsc_khz_changed(void *data)
7991 {
7992         struct cpufreq_freqs *freq = data;
7993         unsigned long khz = 0;
7994
7995         if (data)
7996                 khz = freq->new;
7997         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
7998                 khz = cpufreq_quick_get(raw_smp_processor_id());
7999         if (!khz)
8000                 khz = tsc_khz;
8001         __this_cpu_write(cpu_tsc_khz, khz);
8002 }
8003
8004 #ifdef CONFIG_X86_64
8005 static void kvm_hyperv_tsc_notifier(void)
8006 {
8007         struct kvm *kvm;
8008         struct kvm_vcpu *vcpu;
8009         int cpu;
8010         unsigned long flags;
8011
8012         mutex_lock(&kvm_lock);
8013         list_for_each_entry(kvm, &vm_list, vm_list)
8014                 kvm_make_mclock_inprogress_request(kvm);
8015
8016         hyperv_stop_tsc_emulation();
8017
8018         /* TSC frequency always matches when on Hyper-V */
8019         for_each_present_cpu(cpu)
8020                 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
8021         kvm_max_guest_tsc_khz = tsc_khz;
8022
8023         list_for_each_entry(kvm, &vm_list, vm_list) {
8024                 struct kvm_arch *ka = &kvm->arch;
8025
8026                 spin_lock_irqsave(&ka->pvclock_gtod_sync_lock, flags);
8027                 pvclock_update_vm_gtod_copy(kvm);
8028                 spin_unlock_irqrestore(&ka->pvclock_gtod_sync_lock, flags);
8029
8030                 kvm_for_each_vcpu(cpu, vcpu, kvm)
8031                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
8032
8033                 kvm_for_each_vcpu(cpu, vcpu, kvm)
8034                         kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
8035         }
8036         mutex_unlock(&kvm_lock);
8037 }
8038 #endif
8039
8040 static void __kvmclock_cpufreq_notifier(struct cpufreq_freqs *freq, int cpu)
8041 {
8042         struct kvm *kvm;
8043         struct kvm_vcpu *vcpu;
8044         int i, send_ipi = 0;
8045
8046         /*
8047          * We allow guests to temporarily run on slowing clocks,
8048          * provided we notify them after, or to run on accelerating
8049          * clocks, provided we notify them before.  Thus time never
8050          * goes backwards.
8051          *
8052          * However, we have a problem.  We can't atomically update
8053          * the frequency of a given CPU from this function; it is
8054          * merely a notifier, which can be called from any CPU.
8055          * Changing the TSC frequency at arbitrary points in time
8056          * requires a recomputation of local variables related to
8057          * the TSC for each VCPU.  We must flag these local variables
8058          * to be updated and be sure the update takes place with the
8059          * new frequency before any guests proceed.
8060          *
8061          * Unfortunately, the combination of hotplug CPU and frequency
8062          * change creates an intractable locking scenario; the order
8063          * of when these callouts happen is undefined with respect to
8064          * CPU hotplug, and they can race with each other.  As such,
8065          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
8066          * undefined; you can actually have a CPU frequency change take
8067          * place in between the computation of X and the setting of the
8068          * variable.  To protect against this problem, all updates of
8069          * the per_cpu tsc_khz variable are done in an interrupt
8070          * protected IPI, and all callers wishing to update the value
8071          * must wait for a synchronous IPI to complete (which is trivial
8072          * if the caller is on the CPU already).  This establishes the
8073          * necessary total order on variable updates.
8074          *
8075          * Note that because a guest time update may take place
8076          * anytime after the setting of the VCPU's request bit, the
8077          * correct TSC value must be set before the request.  However,
8078          * to ensure the update actually makes it to any guest which
8079          * starts running in hardware virtualization between the set
8080          * and the acquisition of the spinlock, we must also ping the
8081          * CPU after setting the request bit.
8082          *
8083          */
8084
8085         smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
8086
8087         mutex_lock(&kvm_lock);
8088         list_for_each_entry(kvm, &vm_list, vm_list) {
8089                 kvm_for_each_vcpu(i, vcpu, kvm) {
8090                         if (vcpu->cpu != cpu)
8091                                 continue;
8092                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
8093                         if (vcpu->cpu != raw_smp_processor_id())
8094                                 send_ipi = 1;
8095                 }
8096         }
8097         mutex_unlock(&kvm_lock);
8098
8099         if (freq->old < freq->new && send_ipi) {
8100                 /*
8101                  * We upscale the frequency.  Must make the guest
8102                  * doesn't see old kvmclock values while running with
8103                  * the new frequency, otherwise we risk the guest sees
8104                  * time go backwards.
8105                  *
8106                  * In case we update the frequency for another cpu
8107                  * (which might be in guest context) send an interrupt
8108                  * to kick the cpu out of guest context.  Next time
8109                  * guest context is entered kvmclock will be updated,
8110                  * so the guest will not see stale values.
8111                  */
8112                 smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
8113         }
8114 }
8115
8116 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
8117                                      void *data)
8118 {
8119         struct cpufreq_freqs *freq = data;
8120         int cpu;
8121
8122         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
8123                 return 0;
8124         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
8125                 return 0;
8126
8127         for_each_cpu(cpu, freq->policy->cpus)
8128                 __kvmclock_cpufreq_notifier(freq, cpu);
8129
8130         return 0;
8131 }
8132
8133 static struct notifier_block kvmclock_cpufreq_notifier_block = {
8134         .notifier_call  = kvmclock_cpufreq_notifier
8135 };
8136
8137 static int kvmclock_cpu_online(unsigned int cpu)
8138 {
8139         tsc_khz_changed(NULL);
8140         return 0;
8141 }
8142
8143 static void kvm_timer_init(void)
8144 {
8145         max_tsc_khz = tsc_khz;
8146
8147         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
8148 #ifdef CONFIG_CPU_FREQ
8149                 struct cpufreq_policy *policy;
8150                 int cpu;
8151
8152                 cpu = get_cpu();
8153                 policy = cpufreq_cpu_get(cpu);
8154                 if (policy) {
8155                         if (policy->cpuinfo.max_freq)
8156                                 max_tsc_khz = policy->cpuinfo.max_freq;
8157                         cpufreq_cpu_put(policy);
8158                 }
8159                 put_cpu();
8160 #endif
8161                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
8162                                           CPUFREQ_TRANSITION_NOTIFIER);
8163         }
8164
8165         cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE, "x86/kvm/clk:online",
8166                           kvmclock_cpu_online, kvmclock_cpu_down_prep);
8167 }
8168
8169 DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
8170 EXPORT_PER_CPU_SYMBOL_GPL(current_vcpu);
8171
8172 int kvm_is_in_guest(void)
8173 {
8174         return __this_cpu_read(current_vcpu) != NULL;
8175 }
8176
8177 static int kvm_is_user_mode(void)
8178 {
8179         int user_mode = 3;
8180
8181         if (__this_cpu_read(current_vcpu))
8182                 user_mode = static_call(kvm_x86_get_cpl)(__this_cpu_read(current_vcpu));
8183
8184         return user_mode != 0;
8185 }
8186
8187 static unsigned long kvm_get_guest_ip(void)
8188 {
8189         unsigned long ip = 0;
8190
8191         if (__this_cpu_read(current_vcpu))
8192                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
8193
8194         return ip;
8195 }
8196
8197 static void kvm_handle_intel_pt_intr(void)
8198 {
8199         struct kvm_vcpu *vcpu = __this_cpu_read(current_vcpu);
8200
8201         kvm_make_request(KVM_REQ_PMI, vcpu);
8202         __set_bit(MSR_CORE_PERF_GLOBAL_OVF_CTRL_TRACE_TOPA_PMI_BIT,
8203                         (unsigned long *)&vcpu->arch.pmu.global_status);
8204 }
8205
8206 static struct perf_guest_info_callbacks kvm_guest_cbs = {
8207         .is_in_guest            = kvm_is_in_guest,
8208         .is_user_mode           = kvm_is_user_mode,
8209         .get_guest_ip           = kvm_get_guest_ip,
8210         .handle_intel_pt_intr   = kvm_handle_intel_pt_intr,
8211 };
8212
8213 #ifdef CONFIG_X86_64
8214 static void pvclock_gtod_update_fn(struct work_struct *work)
8215 {
8216         struct kvm *kvm;
8217
8218         struct kvm_vcpu *vcpu;
8219         int i;
8220
8221         mutex_lock(&kvm_lock);
8222         list_for_each_entry(kvm, &vm_list, vm_list)
8223                 kvm_for_each_vcpu(i, vcpu, kvm)
8224                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
8225         atomic_set(&kvm_guest_has_master_clock, 0);
8226         mutex_unlock(&kvm_lock);
8227 }
8228
8229 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
8230
8231 /*
8232  * Indirection to move queue_work() out of the tk_core.seq write held
8233  * region to prevent possible deadlocks against time accessors which
8234  * are invoked with work related locks held.
8235  */
8236 static void pvclock_irq_work_fn(struct irq_work *w)
8237 {
8238         queue_work(system_long_wq, &pvclock_gtod_work);
8239 }
8240
8241 static DEFINE_IRQ_WORK(pvclock_irq_work, pvclock_irq_work_fn);
8242
8243 /*
8244  * Notification about pvclock gtod data update.
8245  */
8246 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
8247                                void *priv)
8248 {
8249         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
8250         struct timekeeper *tk = priv;
8251
8252         update_pvclock_gtod(tk);
8253
8254         /*
8255          * Disable master clock if host does not trust, or does not use,
8256          * TSC based clocksource. Delegate queue_work() to irq_work as
8257          * this is invoked with tk_core.seq write held.
8258          */
8259         if (!gtod_is_based_on_tsc(gtod->clock.vclock_mode) &&
8260             atomic_read(&kvm_guest_has_master_clock) != 0)
8261                 irq_work_queue(&pvclock_irq_work);
8262         return 0;
8263 }
8264
8265 static struct notifier_block pvclock_gtod_notifier = {
8266         .notifier_call = pvclock_gtod_notify,
8267 };
8268 #endif
8269
8270 int kvm_arch_init(void *opaque)
8271 {
8272         struct kvm_x86_init_ops *ops = opaque;
8273         int r;
8274
8275         if (kvm_x86_ops.hardware_enable) {
8276                 printk(KERN_ERR "kvm: already loaded the other module\n");
8277                 r = -EEXIST;
8278                 goto out;
8279         }
8280
8281         if (!ops->cpu_has_kvm_support()) {
8282                 pr_err_ratelimited("kvm: no hardware support\n");
8283                 r = -EOPNOTSUPP;
8284                 goto out;
8285         }
8286         if (ops->disabled_by_bios()) {
8287                 pr_err_ratelimited("kvm: disabled by bios\n");
8288                 r = -EOPNOTSUPP;
8289                 goto out;
8290         }
8291
8292         /*
8293          * KVM explicitly assumes that the guest has an FPU and
8294          * FXSAVE/FXRSTOR. For example, the KVM_GET_FPU explicitly casts the
8295          * vCPU's FPU state as a fxregs_state struct.
8296          */
8297         if (!boot_cpu_has(X86_FEATURE_FPU) || !boot_cpu_has(X86_FEATURE_FXSR)) {
8298                 printk(KERN_ERR "kvm: inadequate fpu\n");
8299                 r = -EOPNOTSUPP;
8300                 goto out;
8301         }
8302
8303         r = -ENOMEM;
8304         x86_fpu_cache = kmem_cache_create("x86_fpu", sizeof(struct fpu),
8305                                           __alignof__(struct fpu), SLAB_ACCOUNT,
8306                                           NULL);
8307         if (!x86_fpu_cache) {
8308                 printk(KERN_ERR "kvm: failed to allocate cache for x86 fpu\n");
8309                 goto out;
8310         }
8311
8312         x86_emulator_cache = kvm_alloc_emulator_cache();
8313         if (!x86_emulator_cache) {
8314                 pr_err("kvm: failed to allocate cache for x86 emulator\n");
8315                 goto out_free_x86_fpu_cache;
8316         }
8317
8318         user_return_msrs = alloc_percpu(struct kvm_user_return_msrs);
8319         if (!user_return_msrs) {
8320                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_user_return_msrs\n");
8321                 goto out_free_x86_emulator_cache;
8322         }
8323         kvm_nr_uret_msrs = 0;
8324
8325         r = kvm_mmu_module_init();
8326         if (r)
8327                 goto out_free_percpu;
8328
8329         kvm_timer_init();
8330
8331         perf_register_guest_info_callbacks(&kvm_guest_cbs);
8332
8333         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
8334                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
8335                 supported_xcr0 = host_xcr0 & KVM_SUPPORTED_XCR0;
8336         }
8337
8338         if (pi_inject_timer == -1)
8339                 pi_inject_timer = housekeeping_enabled(HK_FLAG_TIMER);
8340 #ifdef CONFIG_X86_64
8341         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
8342
8343         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
8344                 set_hv_tscchange_cb(kvm_hyperv_tsc_notifier);
8345 #endif
8346
8347         return 0;
8348
8349 out_free_percpu:
8350         free_percpu(user_return_msrs);
8351 out_free_x86_emulator_cache:
8352         kmem_cache_destroy(x86_emulator_cache);
8353 out_free_x86_fpu_cache:
8354         kmem_cache_destroy(x86_fpu_cache);
8355 out:
8356         return r;
8357 }
8358
8359 void kvm_arch_exit(void)
8360 {
8361 #ifdef CONFIG_X86_64
8362         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
8363                 clear_hv_tscchange_cb();
8364 #endif
8365         kvm_lapic_exit();
8366         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
8367
8368         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
8369                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
8370                                             CPUFREQ_TRANSITION_NOTIFIER);
8371         cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE);
8372 #ifdef CONFIG_X86_64
8373         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
8374         irq_work_sync(&pvclock_irq_work);
8375         cancel_work_sync(&pvclock_gtod_work);
8376 #endif
8377         kvm_x86_ops.hardware_enable = NULL;
8378         kvm_mmu_module_exit();
8379         free_percpu(user_return_msrs);
8380         kmem_cache_destroy(x86_emulator_cache);
8381         kmem_cache_destroy(x86_fpu_cache);
8382 #ifdef CONFIG_KVM_XEN
8383         static_key_deferred_flush(&kvm_xen_enabled);
8384         WARN_ON(static_branch_unlikely(&kvm_xen_enabled.key));
8385 #endif
8386 }
8387
8388 static int __kvm_vcpu_halt(struct kvm_vcpu *vcpu, int state, int reason)
8389 {
8390         ++vcpu->stat.halt_exits;
8391         if (lapic_in_kernel(vcpu)) {
8392                 vcpu->arch.mp_state = state;
8393                 return 1;
8394         } else {
8395                 vcpu->run->exit_reason = reason;
8396                 return 0;
8397         }
8398 }
8399
8400 int kvm_vcpu_halt(struct kvm_vcpu *vcpu)
8401 {
8402         return __kvm_vcpu_halt(vcpu, KVM_MP_STATE_HALTED, KVM_EXIT_HLT);
8403 }
8404 EXPORT_SYMBOL_GPL(kvm_vcpu_halt);
8405
8406 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
8407 {
8408         int ret = kvm_skip_emulated_instruction(vcpu);
8409         /*
8410          * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
8411          * KVM_EXIT_DEBUG here.
8412          */
8413         return kvm_vcpu_halt(vcpu) && ret;
8414 }
8415 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
8416
8417 int kvm_emulate_ap_reset_hold(struct kvm_vcpu *vcpu)
8418 {
8419         int ret = kvm_skip_emulated_instruction(vcpu);
8420
8421         return __kvm_vcpu_halt(vcpu, KVM_MP_STATE_AP_RESET_HOLD, KVM_EXIT_AP_RESET_HOLD) && ret;
8422 }
8423 EXPORT_SYMBOL_GPL(kvm_emulate_ap_reset_hold);
8424
8425 #ifdef CONFIG_X86_64
8426 static int kvm_pv_clock_pairing(struct kvm_vcpu *vcpu, gpa_t paddr,
8427                                 unsigned long clock_type)
8428 {
8429         struct kvm_clock_pairing clock_pairing;
8430         struct timespec64 ts;
8431         u64 cycle;
8432         int ret;
8433
8434         if (clock_type != KVM_CLOCK_PAIRING_WALLCLOCK)
8435                 return -KVM_EOPNOTSUPP;
8436
8437         if (!kvm_get_walltime_and_clockread(&ts, &cycle))
8438                 return -KVM_EOPNOTSUPP;
8439
8440         clock_pairing.sec = ts.tv_sec;
8441         clock_pairing.nsec = ts.tv_nsec;
8442         clock_pairing.tsc = kvm_read_l1_tsc(vcpu, cycle);
8443         clock_pairing.flags = 0;
8444         memset(&clock_pairing.pad, 0, sizeof(clock_pairing.pad));
8445
8446         ret = 0;
8447         if (kvm_write_guest(vcpu->kvm, paddr, &clock_pairing,
8448                             sizeof(struct kvm_clock_pairing)))
8449                 ret = -KVM_EFAULT;
8450
8451         return ret;
8452 }
8453 #endif
8454
8455 /*
8456  * kvm_pv_kick_cpu_op:  Kick a vcpu.
8457  *
8458  * @apicid - apicid of vcpu to be kicked.
8459  */
8460 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
8461 {
8462         struct kvm_lapic_irq lapic_irq;
8463
8464         lapic_irq.shorthand = APIC_DEST_NOSHORT;
8465         lapic_irq.dest_mode = APIC_DEST_PHYSICAL;
8466         lapic_irq.level = 0;
8467         lapic_irq.dest_id = apicid;
8468         lapic_irq.msi_redir_hint = false;
8469
8470         lapic_irq.delivery_mode = APIC_DM_REMRD;
8471         kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
8472 }
8473
8474 bool kvm_apicv_activated(struct kvm *kvm)
8475 {
8476         return (READ_ONCE(kvm->arch.apicv_inhibit_reasons) == 0);
8477 }
8478 EXPORT_SYMBOL_GPL(kvm_apicv_activated);
8479
8480 static void kvm_apicv_init(struct kvm *kvm)
8481 {
8482         if (enable_apicv)
8483                 clear_bit(APICV_INHIBIT_REASON_DISABLE,
8484                           &kvm->arch.apicv_inhibit_reasons);
8485         else
8486                 set_bit(APICV_INHIBIT_REASON_DISABLE,
8487                         &kvm->arch.apicv_inhibit_reasons);
8488 }
8489
8490 static void kvm_sched_yield(struct kvm_vcpu *vcpu, unsigned long dest_id)
8491 {
8492         struct kvm_vcpu *target = NULL;
8493         struct kvm_apic_map *map;
8494
8495         vcpu->stat.directed_yield_attempted++;
8496
8497         if (single_task_running())
8498                 goto no_yield;
8499
8500         rcu_read_lock();
8501         map = rcu_dereference(vcpu->kvm->arch.apic_map);
8502
8503         if (likely(map) && dest_id <= map->max_apic_id && map->phys_map[dest_id])
8504                 target = map->phys_map[dest_id]->vcpu;
8505
8506         rcu_read_unlock();
8507
8508         if (!target || !READ_ONCE(target->ready))
8509                 goto no_yield;
8510
8511         /* Ignore requests to yield to self */
8512         if (vcpu == target)
8513                 goto no_yield;
8514
8515         if (kvm_vcpu_yield_to(target) <= 0)
8516                 goto no_yield;
8517
8518         vcpu->stat.directed_yield_successful++;
8519
8520 no_yield:
8521         return;
8522 }
8523
8524 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
8525 {
8526         unsigned long nr, a0, a1, a2, a3, ret;
8527         int op_64_bit;
8528
8529         if (kvm_xen_hypercall_enabled(vcpu->kvm))
8530                 return kvm_xen_hypercall(vcpu);
8531
8532         if (kvm_hv_hypercall_enabled(vcpu))
8533                 return kvm_hv_hypercall(vcpu);
8534
8535         nr = kvm_rax_read(vcpu);
8536         a0 = kvm_rbx_read(vcpu);
8537         a1 = kvm_rcx_read(vcpu);
8538         a2 = kvm_rdx_read(vcpu);
8539         a3 = kvm_rsi_read(vcpu);
8540
8541         trace_kvm_hypercall(nr, a0, a1, a2, a3);
8542
8543         op_64_bit = is_64_bit_mode(vcpu);
8544         if (!op_64_bit) {
8545                 nr &= 0xFFFFFFFF;
8546                 a0 &= 0xFFFFFFFF;
8547                 a1 &= 0xFFFFFFFF;
8548                 a2 &= 0xFFFFFFFF;
8549                 a3 &= 0xFFFFFFFF;
8550         }
8551
8552         if (static_call(kvm_x86_get_cpl)(vcpu) != 0) {
8553                 ret = -KVM_EPERM;
8554                 goto out;
8555         }
8556
8557         ret = -KVM_ENOSYS;
8558
8559         switch (nr) {
8560         case KVM_HC_VAPIC_POLL_IRQ:
8561                 ret = 0;
8562                 break;
8563         case KVM_HC_KICK_CPU:
8564                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_UNHALT))
8565                         break;
8566
8567                 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
8568                 kvm_sched_yield(vcpu, a1);
8569                 ret = 0;
8570                 break;
8571 #ifdef CONFIG_X86_64
8572         case KVM_HC_CLOCK_PAIRING:
8573                 ret = kvm_pv_clock_pairing(vcpu, a0, a1);
8574                 break;
8575 #endif
8576         case KVM_HC_SEND_IPI:
8577                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_SEND_IPI))
8578                         break;
8579
8580                 ret = kvm_pv_send_ipi(vcpu->kvm, a0, a1, a2, a3, op_64_bit);
8581                 break;
8582         case KVM_HC_SCHED_YIELD:
8583                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_SCHED_YIELD))
8584                         break;
8585
8586                 kvm_sched_yield(vcpu, a0);
8587                 ret = 0;
8588                 break;
8589         default:
8590                 ret = -KVM_ENOSYS;
8591                 break;
8592         }
8593 out:
8594         if (!op_64_bit)
8595                 ret = (u32)ret;
8596         kvm_rax_write(vcpu, ret);
8597
8598         ++vcpu->stat.hypercalls;
8599         return kvm_skip_emulated_instruction(vcpu);
8600 }
8601 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
8602
8603 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
8604 {
8605         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
8606         char instruction[3];
8607         unsigned long rip = kvm_rip_read(vcpu);
8608
8609         static_call(kvm_x86_patch_hypercall)(vcpu, instruction);
8610
8611         return emulator_write_emulated(ctxt, rip, instruction, 3,
8612                 &ctxt->exception);
8613 }
8614
8615 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
8616 {
8617         return vcpu->run->request_interrupt_window &&
8618                 likely(!pic_in_kernel(vcpu->kvm));
8619 }
8620
8621 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
8622 {
8623         struct kvm_run *kvm_run = vcpu->run;
8624
8625         /*
8626          * if_flag is obsolete and useless, so do not bother
8627          * setting it for SEV-ES guests.  Userspace can just
8628          * use kvm_run->ready_for_interrupt_injection.
8629          */
8630         kvm_run->if_flag = !vcpu->arch.guest_state_protected
8631                 && (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
8632
8633         kvm_run->cr8 = kvm_get_cr8(vcpu);
8634         kvm_run->apic_base = kvm_get_apic_base(vcpu);
8635         kvm_run->ready_for_interrupt_injection =
8636                 pic_in_kernel(vcpu->kvm) ||
8637                 kvm_vcpu_ready_for_interrupt_injection(vcpu);
8638
8639         if (is_smm(vcpu))
8640                 kvm_run->flags |= KVM_RUN_X86_SMM;
8641 }
8642
8643 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
8644 {
8645         int max_irr, tpr;
8646
8647         if (!kvm_x86_ops.update_cr8_intercept)
8648                 return;
8649
8650         if (!lapic_in_kernel(vcpu))
8651                 return;
8652
8653         if (vcpu->arch.apicv_active)
8654                 return;
8655
8656         if (!vcpu->arch.apic->vapic_addr)
8657                 max_irr = kvm_lapic_find_highest_irr(vcpu);
8658         else
8659                 max_irr = -1;
8660
8661         if (max_irr != -1)
8662                 max_irr >>= 4;
8663
8664         tpr = kvm_lapic_get_cr8(vcpu);
8665
8666         static_call(kvm_x86_update_cr8_intercept)(vcpu, tpr, max_irr);
8667 }
8668
8669
8670 int kvm_check_nested_events(struct kvm_vcpu *vcpu)
8671 {
8672         if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
8673                 kvm_x86_ops.nested_ops->triple_fault(vcpu);
8674                 return 1;
8675         }
8676
8677         return kvm_x86_ops.nested_ops->check_events(vcpu);
8678 }
8679
8680 static void kvm_inject_exception(struct kvm_vcpu *vcpu)
8681 {
8682         if (vcpu->arch.exception.error_code && !is_protmode(vcpu))
8683                 vcpu->arch.exception.error_code = false;
8684         static_call(kvm_x86_queue_exception)(vcpu);
8685 }
8686
8687 static int inject_pending_event(struct kvm_vcpu *vcpu, bool *req_immediate_exit)
8688 {
8689         int r;
8690         bool can_inject = true;
8691
8692         /* try to reinject previous events if any */
8693
8694         if (vcpu->arch.exception.injected) {
8695                 kvm_inject_exception(vcpu);
8696                 can_inject = false;
8697         }
8698         /*
8699          * Do not inject an NMI or interrupt if there is a pending
8700          * exception.  Exceptions and interrupts are recognized at
8701          * instruction boundaries, i.e. the start of an instruction.
8702          * Trap-like exceptions, e.g. #DB, have higher priority than
8703          * NMIs and interrupts, i.e. traps are recognized before an
8704          * NMI/interrupt that's pending on the same instruction.
8705          * Fault-like exceptions, e.g. #GP and #PF, are the lowest
8706          * priority, but are only generated (pended) during instruction
8707          * execution, i.e. a pending fault-like exception means the
8708          * fault occurred on the *previous* instruction and must be
8709          * serviced prior to recognizing any new events in order to
8710          * fully complete the previous instruction.
8711          */
8712         else if (!vcpu->arch.exception.pending) {
8713                 if (vcpu->arch.nmi_injected) {
8714                         static_call(kvm_x86_set_nmi)(vcpu);
8715                         can_inject = false;
8716                 } else if (vcpu->arch.interrupt.injected) {
8717                         static_call(kvm_x86_set_irq)(vcpu);
8718                         can_inject = false;
8719                 }
8720         }
8721
8722         WARN_ON_ONCE(vcpu->arch.exception.injected &&
8723                      vcpu->arch.exception.pending);
8724
8725         /*
8726          * Call check_nested_events() even if we reinjected a previous event
8727          * in order for caller to determine if it should require immediate-exit
8728          * from L2 to L1 due to pending L1 events which require exit
8729          * from L2 to L1.
8730          */
8731         if (is_guest_mode(vcpu)) {
8732                 r = kvm_check_nested_events(vcpu);
8733                 if (r < 0)
8734                         goto out;
8735         }
8736
8737         /* try to inject new event if pending */
8738         if (vcpu->arch.exception.pending) {
8739                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
8740                                         vcpu->arch.exception.has_error_code,
8741                                         vcpu->arch.exception.error_code);
8742
8743                 vcpu->arch.exception.pending = false;
8744                 vcpu->arch.exception.injected = true;
8745
8746                 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
8747                         __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
8748                                              X86_EFLAGS_RF);
8749
8750                 if (vcpu->arch.exception.nr == DB_VECTOR) {
8751                         kvm_deliver_exception_payload(vcpu);
8752                         if (vcpu->arch.dr7 & DR7_GD) {
8753                                 vcpu->arch.dr7 &= ~DR7_GD;
8754                                 kvm_update_dr7(vcpu);
8755                         }
8756                 }
8757
8758                 kvm_inject_exception(vcpu);
8759                 can_inject = false;
8760         }
8761
8762         /*
8763          * Finally, inject interrupt events.  If an event cannot be injected
8764          * due to architectural conditions (e.g. IF=0) a window-open exit
8765          * will re-request KVM_REQ_EVENT.  Sometimes however an event is pending
8766          * and can architecturally be injected, but we cannot do it right now:
8767          * an interrupt could have arrived just now and we have to inject it
8768          * as a vmexit, or there could already an event in the queue, which is
8769          * indicated by can_inject.  In that case we request an immediate exit
8770          * in order to make progress and get back here for another iteration.
8771          * The kvm_x86_ops hooks communicate this by returning -EBUSY.
8772          */
8773         if (vcpu->arch.smi_pending) {
8774                 r = can_inject ? static_call(kvm_x86_smi_allowed)(vcpu, true) : -EBUSY;
8775                 if (r < 0)
8776                         goto out;
8777                 if (r) {
8778                         vcpu->arch.smi_pending = false;
8779                         ++vcpu->arch.smi_count;
8780                         enter_smm(vcpu);
8781                         can_inject = false;
8782                 } else
8783                         static_call(kvm_x86_enable_smi_window)(vcpu);
8784         }
8785
8786         if (vcpu->arch.nmi_pending) {
8787                 r = can_inject ? static_call(kvm_x86_nmi_allowed)(vcpu, true) : -EBUSY;
8788                 if (r < 0)
8789                         goto out;
8790                 if (r) {
8791                         --vcpu->arch.nmi_pending;
8792                         vcpu->arch.nmi_injected = true;
8793                         static_call(kvm_x86_set_nmi)(vcpu);
8794                         can_inject = false;
8795                         WARN_ON(static_call(kvm_x86_nmi_allowed)(vcpu, true) < 0);
8796                 }
8797                 if (vcpu->arch.nmi_pending)
8798                         static_call(kvm_x86_enable_nmi_window)(vcpu);
8799         }
8800
8801         if (kvm_cpu_has_injectable_intr(vcpu)) {
8802                 r = can_inject ? static_call(kvm_x86_interrupt_allowed)(vcpu, true) : -EBUSY;
8803                 if (r < 0)
8804                         goto out;
8805                 if (r) {
8806                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu), false);
8807                         static_call(kvm_x86_set_irq)(vcpu);
8808                         WARN_ON(static_call(kvm_x86_interrupt_allowed)(vcpu, true) < 0);
8809                 }
8810                 if (kvm_cpu_has_injectable_intr(vcpu))
8811                         static_call(kvm_x86_enable_irq_window)(vcpu);
8812         }
8813
8814         if (is_guest_mode(vcpu) &&
8815             kvm_x86_ops.nested_ops->hv_timer_pending &&
8816             kvm_x86_ops.nested_ops->hv_timer_pending(vcpu))
8817                 *req_immediate_exit = true;
8818
8819         WARN_ON(vcpu->arch.exception.pending);
8820         return 0;
8821
8822 out:
8823         if (r == -EBUSY) {
8824                 *req_immediate_exit = true;
8825                 r = 0;
8826         }
8827         return r;
8828 }
8829
8830 static void process_nmi(struct kvm_vcpu *vcpu)
8831 {
8832         unsigned limit = 2;
8833
8834         /*
8835          * x86 is limited to one NMI running, and one NMI pending after it.
8836          * If an NMI is already in progress, limit further NMIs to just one.
8837          * Otherwise, allow two (and we'll inject the first one immediately).
8838          */
8839         if (static_call(kvm_x86_get_nmi_mask)(vcpu) || vcpu->arch.nmi_injected)
8840                 limit = 1;
8841
8842         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
8843         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
8844         kvm_make_request(KVM_REQ_EVENT, vcpu);
8845 }
8846
8847 static u32 enter_smm_get_segment_flags(struct kvm_segment *seg)
8848 {
8849         u32 flags = 0;
8850         flags |= seg->g       << 23;
8851         flags |= seg->db      << 22;
8852         flags |= seg->l       << 21;
8853         flags |= seg->avl     << 20;
8854         flags |= seg->present << 15;
8855         flags |= seg->dpl     << 13;
8856         flags |= seg->s       << 12;
8857         flags |= seg->type    << 8;
8858         return flags;
8859 }
8860
8861 static void enter_smm_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
8862 {
8863         struct kvm_segment seg;
8864         int offset;
8865
8866         kvm_get_segment(vcpu, &seg, n);
8867         put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
8868
8869         if (n < 3)
8870                 offset = 0x7f84 + n * 12;
8871         else
8872                 offset = 0x7f2c + (n - 3) * 12;
8873
8874         put_smstate(u32, buf, offset + 8, seg.base);
8875         put_smstate(u32, buf, offset + 4, seg.limit);
8876         put_smstate(u32, buf, offset, enter_smm_get_segment_flags(&seg));
8877 }
8878
8879 #ifdef CONFIG_X86_64
8880 static void enter_smm_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
8881 {
8882         struct kvm_segment seg;
8883         int offset;
8884         u16 flags;
8885
8886         kvm_get_segment(vcpu, &seg, n);
8887         offset = 0x7e00 + n * 16;
8888
8889         flags = enter_smm_get_segment_flags(&seg) >> 8;
8890         put_smstate(u16, buf, offset, seg.selector);
8891         put_smstate(u16, buf, offset + 2, flags);
8892         put_smstate(u32, buf, offset + 4, seg.limit);
8893         put_smstate(u64, buf, offset + 8, seg.base);
8894 }
8895 #endif
8896
8897 static void enter_smm_save_state_32(struct kvm_vcpu *vcpu, char *buf)
8898 {
8899         struct desc_ptr dt;
8900         struct kvm_segment seg;
8901         unsigned long val;
8902         int i;
8903
8904         put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
8905         put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
8906         put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
8907         put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
8908
8909         for (i = 0; i < 8; i++)
8910                 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read_raw(vcpu, i));
8911
8912         kvm_get_dr(vcpu, 6, &val);
8913         put_smstate(u32, buf, 0x7fcc, (u32)val);
8914         kvm_get_dr(vcpu, 7, &val);
8915         put_smstate(u32, buf, 0x7fc8, (u32)val);
8916
8917         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
8918         put_smstate(u32, buf, 0x7fc4, seg.selector);
8919         put_smstate(u32, buf, 0x7f64, seg.base);
8920         put_smstate(u32, buf, 0x7f60, seg.limit);
8921         put_smstate(u32, buf, 0x7f5c, enter_smm_get_segment_flags(&seg));
8922
8923         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
8924         put_smstate(u32, buf, 0x7fc0, seg.selector);
8925         put_smstate(u32, buf, 0x7f80, seg.base);
8926         put_smstate(u32, buf, 0x7f7c, seg.limit);
8927         put_smstate(u32, buf, 0x7f78, enter_smm_get_segment_flags(&seg));
8928
8929         static_call(kvm_x86_get_gdt)(vcpu, &dt);
8930         put_smstate(u32, buf, 0x7f74, dt.address);
8931         put_smstate(u32, buf, 0x7f70, dt.size);
8932
8933         static_call(kvm_x86_get_idt)(vcpu, &dt);
8934         put_smstate(u32, buf, 0x7f58, dt.address);
8935         put_smstate(u32, buf, 0x7f54, dt.size);
8936
8937         for (i = 0; i < 6; i++)
8938                 enter_smm_save_seg_32(vcpu, buf, i);
8939
8940         put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
8941
8942         /* revision id */
8943         put_smstate(u32, buf, 0x7efc, 0x00020000);
8944         put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
8945 }
8946
8947 #ifdef CONFIG_X86_64
8948 static void enter_smm_save_state_64(struct kvm_vcpu *vcpu, char *buf)
8949 {
8950         struct desc_ptr dt;
8951         struct kvm_segment seg;
8952         unsigned long val;
8953         int i;
8954
8955         for (i = 0; i < 16; i++)
8956                 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read_raw(vcpu, i));
8957
8958         put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
8959         put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
8960
8961         kvm_get_dr(vcpu, 6, &val);
8962         put_smstate(u64, buf, 0x7f68, val);
8963         kvm_get_dr(vcpu, 7, &val);
8964         put_smstate(u64, buf, 0x7f60, val);
8965
8966         put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
8967         put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
8968         put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
8969
8970         put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
8971
8972         /* revision id */
8973         put_smstate(u32, buf, 0x7efc, 0x00020064);
8974
8975         put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
8976
8977         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
8978         put_smstate(u16, buf, 0x7e90, seg.selector);
8979         put_smstate(u16, buf, 0x7e92, enter_smm_get_segment_flags(&seg) >> 8);
8980         put_smstate(u32, buf, 0x7e94, seg.limit);
8981         put_smstate(u64, buf, 0x7e98, seg.base);
8982
8983         static_call(kvm_x86_get_idt)(vcpu, &dt);
8984         put_smstate(u32, buf, 0x7e84, dt.size);
8985         put_smstate(u64, buf, 0x7e88, dt.address);
8986
8987         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
8988         put_smstate(u16, buf, 0x7e70, seg.selector);
8989         put_smstate(u16, buf, 0x7e72, enter_smm_get_segment_flags(&seg) >> 8);
8990         put_smstate(u32, buf, 0x7e74, seg.limit);
8991         put_smstate(u64, buf, 0x7e78, seg.base);
8992
8993         static_call(kvm_x86_get_gdt)(vcpu, &dt);
8994         put_smstate(u32, buf, 0x7e64, dt.size);
8995         put_smstate(u64, buf, 0x7e68, dt.address);
8996
8997         for (i = 0; i < 6; i++)
8998                 enter_smm_save_seg_64(vcpu, buf, i);
8999 }
9000 #endif
9001
9002 static void enter_smm(struct kvm_vcpu *vcpu)
9003 {
9004         struct kvm_segment cs, ds;
9005         struct desc_ptr dt;
9006         char buf[512];
9007         u32 cr0;
9008
9009         trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, true);
9010         memset(buf, 0, 512);
9011 #ifdef CONFIG_X86_64
9012         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
9013                 enter_smm_save_state_64(vcpu, buf);
9014         else
9015 #endif
9016                 enter_smm_save_state_32(vcpu, buf);
9017
9018         /*
9019          * Give pre_enter_smm() a chance to make ISA-specific changes to the
9020          * vCPU state (e.g. leave guest mode) after we've saved the state into
9021          * the SMM state-save area.
9022          */
9023         static_call(kvm_x86_pre_enter_smm)(vcpu, buf);
9024
9025         vcpu->arch.hflags |= HF_SMM_MASK;
9026         kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
9027
9028         if (static_call(kvm_x86_get_nmi_mask)(vcpu))
9029                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
9030         else
9031                 static_call(kvm_x86_set_nmi_mask)(vcpu, true);
9032
9033         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
9034         kvm_rip_write(vcpu, 0x8000);
9035
9036         cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
9037         static_call(kvm_x86_set_cr0)(vcpu, cr0);
9038         vcpu->arch.cr0 = cr0;
9039
9040         static_call(kvm_x86_set_cr4)(vcpu, 0);
9041
9042         /* Undocumented: IDT limit is set to zero on entry to SMM.  */
9043         dt.address = dt.size = 0;
9044         static_call(kvm_x86_set_idt)(vcpu, &dt);
9045
9046         kvm_set_dr(vcpu, 7, DR7_FIXED_1);
9047
9048         cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
9049         cs.base = vcpu->arch.smbase;
9050
9051         ds.selector = 0;
9052         ds.base = 0;
9053
9054         cs.limit    = ds.limit = 0xffffffff;
9055         cs.type     = ds.type = 0x3;
9056         cs.dpl      = ds.dpl = 0;
9057         cs.db       = ds.db = 0;
9058         cs.s        = ds.s = 1;
9059         cs.l        = ds.l = 0;
9060         cs.g        = ds.g = 1;
9061         cs.avl      = ds.avl = 0;
9062         cs.present  = ds.present = 1;
9063         cs.unusable = ds.unusable = 0;
9064         cs.padding  = ds.padding = 0;
9065
9066         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
9067         kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
9068         kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
9069         kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
9070         kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
9071         kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
9072
9073 #ifdef CONFIG_X86_64
9074         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
9075                 static_call(kvm_x86_set_efer)(vcpu, 0);
9076 #endif
9077
9078         kvm_update_cpuid_runtime(vcpu);
9079         kvm_mmu_reset_context(vcpu);
9080 }
9081
9082 static void process_smi(struct kvm_vcpu *vcpu)
9083 {
9084         vcpu->arch.smi_pending = true;
9085         kvm_make_request(KVM_REQ_EVENT, vcpu);
9086 }
9087
9088 void kvm_make_scan_ioapic_request_mask(struct kvm *kvm,
9089                                        unsigned long *vcpu_bitmap)
9090 {
9091         cpumask_var_t cpus;
9092
9093         zalloc_cpumask_var(&cpus, GFP_ATOMIC);
9094
9095         kvm_make_vcpus_request_mask(kvm, KVM_REQ_SCAN_IOAPIC,
9096                                     NULL, vcpu_bitmap, cpus);
9097
9098         free_cpumask_var(cpus);
9099 }
9100
9101 void kvm_make_scan_ioapic_request(struct kvm *kvm)
9102 {
9103         kvm_make_all_cpus_request(kvm, KVM_REQ_SCAN_IOAPIC);
9104 }
9105
9106 void kvm_vcpu_update_apicv(struct kvm_vcpu *vcpu)
9107 {
9108         if (!lapic_in_kernel(vcpu))
9109                 return;
9110
9111         vcpu->arch.apicv_active = kvm_apicv_activated(vcpu->kvm);
9112         kvm_apic_update_apicv(vcpu);
9113         static_call(kvm_x86_refresh_apicv_exec_ctrl)(vcpu);
9114 }
9115 EXPORT_SYMBOL_GPL(kvm_vcpu_update_apicv);
9116
9117 /*
9118  * NOTE: Do not hold any lock prior to calling this.
9119  *
9120  * In particular, kvm_request_apicv_update() expects kvm->srcu not to be
9121  * locked, because it calls __x86_set_memory_region() which does
9122  * synchronize_srcu(&kvm->srcu).
9123  */
9124 void kvm_request_apicv_update(struct kvm *kvm, bool activate, ulong bit)
9125 {
9126         struct kvm_vcpu *except;
9127         unsigned long old, new, expected;
9128
9129         if (!kvm_x86_ops.check_apicv_inhibit_reasons ||
9130             !static_call(kvm_x86_check_apicv_inhibit_reasons)(bit))
9131                 return;
9132
9133         old = READ_ONCE(kvm->arch.apicv_inhibit_reasons);
9134         do {
9135                 expected = new = old;
9136                 if (activate)
9137                         __clear_bit(bit, &new);
9138                 else
9139                         __set_bit(bit, &new);
9140                 if (new == old)
9141                         break;
9142                 old = cmpxchg(&kvm->arch.apicv_inhibit_reasons, expected, new);
9143         } while (old != expected);
9144
9145         if (!!old == !!new)
9146                 return;
9147
9148         trace_kvm_apicv_update_request(activate, bit);
9149         if (kvm_x86_ops.pre_update_apicv_exec_ctrl)
9150                 static_call(kvm_x86_pre_update_apicv_exec_ctrl)(kvm, activate);
9151
9152         /*
9153          * Sending request to update APICV for all other vcpus,
9154          * while update the calling vcpu immediately instead of
9155          * waiting for another #VMEXIT to handle the request.
9156          */
9157         except = kvm_get_running_vcpu();
9158         kvm_make_all_cpus_request_except(kvm, KVM_REQ_APICV_UPDATE,
9159                                          except);
9160         if (except)
9161                 kvm_vcpu_update_apicv(except);
9162 }
9163 EXPORT_SYMBOL_GPL(kvm_request_apicv_update);
9164
9165 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
9166 {
9167         if (!kvm_apic_present(vcpu))
9168                 return;
9169
9170         bitmap_zero(vcpu->arch.ioapic_handled_vectors, 256);
9171
9172         if (irqchip_split(vcpu->kvm))
9173                 kvm_scan_ioapic_routes(vcpu, vcpu->arch.ioapic_handled_vectors);
9174         else {
9175                 if (vcpu->arch.apicv_active)
9176                         static_call(kvm_x86_sync_pir_to_irr)(vcpu);
9177                 if (ioapic_in_kernel(vcpu->kvm))
9178                         kvm_ioapic_scan_entry(vcpu, vcpu->arch.ioapic_handled_vectors);
9179         }
9180
9181         if (is_guest_mode(vcpu))
9182                 vcpu->arch.load_eoi_exitmap_pending = true;
9183         else
9184                 kvm_make_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu);
9185 }
9186
9187 static void vcpu_load_eoi_exitmap(struct kvm_vcpu *vcpu)
9188 {
9189         u64 eoi_exit_bitmap[4];
9190
9191         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
9192                 return;
9193
9194         if (to_hv_vcpu(vcpu))
9195                 bitmap_or((ulong *)eoi_exit_bitmap,
9196                           vcpu->arch.ioapic_handled_vectors,
9197                           to_hv_synic(vcpu)->vec_bitmap, 256);
9198
9199         static_call(kvm_x86_load_eoi_exitmap)(vcpu, eoi_exit_bitmap);
9200 }
9201
9202 void kvm_arch_mmu_notifier_invalidate_range(struct kvm *kvm,
9203                                             unsigned long start, unsigned long end)
9204 {
9205         unsigned long apic_address;
9206
9207         /*
9208          * The physical address of apic access page is stored in the VMCS.
9209          * Update it when it becomes invalid.
9210          */
9211         apic_address = gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
9212         if (start <= apic_address && apic_address < end)
9213                 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
9214 }
9215
9216 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
9217 {
9218         if (!lapic_in_kernel(vcpu))
9219                 return;
9220
9221         if (!kvm_x86_ops.set_apic_access_page_addr)
9222                 return;
9223
9224         static_call(kvm_x86_set_apic_access_page_addr)(vcpu);
9225 }
9226
9227 void __kvm_request_immediate_exit(struct kvm_vcpu *vcpu)
9228 {
9229         smp_send_reschedule(vcpu->cpu);
9230 }
9231 EXPORT_SYMBOL_GPL(__kvm_request_immediate_exit);
9232
9233 /*
9234  * Returns 1 to let vcpu_run() continue the guest execution loop without
9235  * exiting to the userspace.  Otherwise, the value will be returned to the
9236  * userspace.
9237  */
9238 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
9239 {
9240         int r;
9241         bool req_int_win =
9242                 dm_request_for_irq_injection(vcpu) &&
9243                 kvm_cpu_accept_dm_intr(vcpu);
9244         fastpath_t exit_fastpath;
9245
9246         bool req_immediate_exit = false;
9247
9248         /* Forbid vmenter if vcpu dirty ring is soft-full */
9249         if (unlikely(vcpu->kvm->dirty_ring_size &&
9250                      kvm_dirty_ring_soft_full(&vcpu->dirty_ring))) {
9251                 vcpu->run->exit_reason = KVM_EXIT_DIRTY_RING_FULL;
9252                 trace_kvm_dirty_ring_exit(vcpu);
9253                 r = 0;
9254                 goto out;
9255         }
9256
9257         if (kvm_request_pending(vcpu)) {
9258                 if (kvm_check_request(KVM_REQ_GET_NESTED_STATE_PAGES, vcpu)) {
9259                         if (unlikely(!kvm_x86_ops.nested_ops->get_nested_state_pages(vcpu))) {
9260                                 r = 0;
9261                                 goto out;
9262                         }
9263                 }
9264                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
9265                         kvm_mmu_unload(vcpu);
9266                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
9267                         __kvm_migrate_timers(vcpu);
9268                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
9269                         kvm_gen_update_masterclock(vcpu->kvm);
9270                 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
9271                         kvm_gen_kvmclock_update(vcpu);
9272                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
9273                         r = kvm_guest_time_update(vcpu);
9274                         if (unlikely(r))
9275                                 goto out;
9276                 }
9277                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
9278                         kvm_mmu_sync_roots(vcpu);
9279                 if (kvm_check_request(KVM_REQ_LOAD_MMU_PGD, vcpu))
9280                         kvm_mmu_load_pgd(vcpu);
9281                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu)) {
9282                         kvm_vcpu_flush_tlb_all(vcpu);
9283
9284                         /* Flushing all ASIDs flushes the current ASID... */
9285                         kvm_clear_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
9286                 }
9287                 if (kvm_check_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu))
9288                         kvm_vcpu_flush_tlb_current(vcpu);
9289                 if (kvm_check_request(KVM_REQ_HV_TLB_FLUSH, vcpu))
9290                         kvm_vcpu_flush_tlb_guest(vcpu);
9291
9292                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
9293                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
9294                         r = 0;
9295                         goto out;
9296                 }
9297                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
9298                         if (is_guest_mode(vcpu)) {
9299                                 kvm_x86_ops.nested_ops->triple_fault(vcpu);
9300                         } else {
9301                                 vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
9302                                 vcpu->mmio_needed = 0;
9303                                 r = 0;
9304                                 goto out;
9305                         }
9306                 }
9307                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
9308                         /* Page is swapped out. Do synthetic halt */
9309                         vcpu->arch.apf.halted = true;
9310                         r = 1;
9311                         goto out;
9312                 }
9313                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
9314                         record_steal_time(vcpu);
9315                 if (kvm_check_request(KVM_REQ_SMI, vcpu))
9316                         process_smi(vcpu);
9317                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
9318                         process_nmi(vcpu);
9319                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
9320                         kvm_pmu_handle_event(vcpu);
9321                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
9322                         kvm_pmu_deliver_pmi(vcpu);
9323                 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT, vcpu)) {
9324                         BUG_ON(vcpu->arch.pending_ioapic_eoi > 255);
9325                         if (test_bit(vcpu->arch.pending_ioapic_eoi,
9326                                      vcpu->arch.ioapic_handled_vectors)) {
9327                                 vcpu->run->exit_reason = KVM_EXIT_IOAPIC_EOI;
9328                                 vcpu->run->eoi.vector =
9329                                                 vcpu->arch.pending_ioapic_eoi;
9330                                 r = 0;
9331                                 goto out;
9332                         }
9333                 }
9334                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
9335                         vcpu_scan_ioapic(vcpu);
9336                 if (kvm_check_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu))
9337                         vcpu_load_eoi_exitmap(vcpu);
9338                 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
9339                         kvm_vcpu_reload_apic_access_page(vcpu);
9340                 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
9341                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
9342                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
9343                         r = 0;
9344                         goto out;
9345                 }
9346                 if (kvm_check_request(KVM_REQ_HV_RESET, vcpu)) {
9347                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
9348                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_RESET;
9349                         r = 0;
9350                         goto out;
9351                 }
9352                 if (kvm_check_request(KVM_REQ_HV_EXIT, vcpu)) {
9353                         struct kvm_vcpu_hv *hv_vcpu = to_hv_vcpu(vcpu);
9354
9355                         vcpu->run->exit_reason = KVM_EXIT_HYPERV;
9356                         vcpu->run->hyperv = hv_vcpu->exit;
9357                         r = 0;
9358                         goto out;
9359                 }
9360
9361                 /*
9362                  * KVM_REQ_HV_STIMER has to be processed after
9363                  * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
9364                  * depend on the guest clock being up-to-date
9365                  */
9366                 if (kvm_check_request(KVM_REQ_HV_STIMER, vcpu))
9367                         kvm_hv_process_stimers(vcpu);
9368                 if (kvm_check_request(KVM_REQ_APICV_UPDATE, vcpu))
9369                         kvm_vcpu_update_apicv(vcpu);
9370                 if (kvm_check_request(KVM_REQ_APF_READY, vcpu))
9371                         kvm_check_async_pf_completion(vcpu);
9372                 if (kvm_check_request(KVM_REQ_MSR_FILTER_CHANGED, vcpu))
9373                         static_call(kvm_x86_msr_filter_changed)(vcpu);
9374
9375                 if (kvm_check_request(KVM_REQ_UPDATE_CPU_DIRTY_LOGGING, vcpu))
9376                         static_call(kvm_x86_update_cpu_dirty_logging)(vcpu);
9377         }
9378
9379         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win ||
9380             kvm_xen_has_interrupt(vcpu)) {
9381                 ++vcpu->stat.req_event;
9382                 r = kvm_apic_accept_events(vcpu);
9383                 if (r < 0) {
9384                         r = 0;
9385                         goto out;
9386                 }
9387                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
9388                         r = 1;
9389                         goto out;
9390                 }
9391
9392                 r = inject_pending_event(vcpu, &req_immediate_exit);
9393                 if (r < 0) {
9394                         r = 0;
9395                         goto out;
9396                 }
9397                 if (req_int_win)
9398                         static_call(kvm_x86_enable_irq_window)(vcpu);
9399
9400                 if (kvm_lapic_enabled(vcpu)) {
9401                         update_cr8_intercept(vcpu);
9402                         kvm_lapic_sync_to_vapic(vcpu);
9403                 }
9404         }
9405
9406         r = kvm_mmu_reload(vcpu);
9407         if (unlikely(r)) {
9408                 goto cancel_injection;
9409         }
9410
9411         preempt_disable();
9412
9413         static_call(kvm_x86_prepare_guest_switch)(vcpu);
9414
9415         /*
9416          * Disable IRQs before setting IN_GUEST_MODE.  Posted interrupt
9417          * IPI are then delayed after guest entry, which ensures that they
9418          * result in virtual interrupt delivery.
9419          */
9420         local_irq_disable();
9421         vcpu->mode = IN_GUEST_MODE;
9422
9423         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
9424
9425         /*
9426          * 1) We should set ->mode before checking ->requests.  Please see
9427          * the comment in kvm_vcpu_exiting_guest_mode().
9428          *
9429          * 2) For APICv, we should set ->mode before checking PID.ON. This
9430          * pairs with the memory barrier implicit in pi_test_and_set_on
9431          * (see vmx_deliver_posted_interrupt).
9432          *
9433          * 3) This also orders the write to mode from any reads to the page
9434          * tables done while the VCPU is running.  Please see the comment
9435          * in kvm_flush_remote_tlbs.
9436          */
9437         smp_mb__after_srcu_read_unlock();
9438
9439         /*
9440          * This handles the case where a posted interrupt was
9441          * notified with kvm_vcpu_kick.
9442          */
9443         if (kvm_lapic_enabled(vcpu) && vcpu->arch.apicv_active)
9444                 static_call(kvm_x86_sync_pir_to_irr)(vcpu);
9445
9446         if (kvm_vcpu_exit_request(vcpu)) {
9447                 vcpu->mode = OUTSIDE_GUEST_MODE;
9448                 smp_wmb();
9449                 local_irq_enable();
9450                 preempt_enable();
9451                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
9452                 r = 1;
9453                 goto cancel_injection;
9454         }
9455
9456         if (req_immediate_exit) {
9457                 kvm_make_request(KVM_REQ_EVENT, vcpu);
9458                 static_call(kvm_x86_request_immediate_exit)(vcpu);
9459         }
9460
9461         fpregs_assert_state_consistent();
9462         if (test_thread_flag(TIF_NEED_FPU_LOAD))
9463                 switch_fpu_return();
9464
9465         if (unlikely(vcpu->arch.switch_db_regs)) {
9466                 set_debugreg(0, 7);
9467                 set_debugreg(vcpu->arch.eff_db[0], 0);
9468                 set_debugreg(vcpu->arch.eff_db[1], 1);
9469                 set_debugreg(vcpu->arch.eff_db[2], 2);
9470                 set_debugreg(vcpu->arch.eff_db[3], 3);
9471                 set_debugreg(vcpu->arch.dr6, 6);
9472                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
9473         }
9474
9475         for (;;) {
9476                 exit_fastpath = static_call(kvm_x86_run)(vcpu);
9477                 if (likely(exit_fastpath != EXIT_FASTPATH_REENTER_GUEST))
9478                         break;
9479
9480                 if (unlikely(kvm_vcpu_exit_request(vcpu))) {
9481                         exit_fastpath = EXIT_FASTPATH_EXIT_HANDLED;
9482                         break;
9483                 }
9484
9485                 if (vcpu->arch.apicv_active)
9486                         static_call(kvm_x86_sync_pir_to_irr)(vcpu);
9487         }
9488
9489         /*
9490          * Do this here before restoring debug registers on the host.  And
9491          * since we do this before handling the vmexit, a DR access vmexit
9492          * can (a) read the correct value of the debug registers, (b) set
9493          * KVM_DEBUGREG_WONT_EXIT again.
9494          */
9495         if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
9496                 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
9497                 static_call(kvm_x86_sync_dirty_debug_regs)(vcpu);
9498                 kvm_update_dr0123(vcpu);
9499                 kvm_update_dr7(vcpu);
9500                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
9501         }
9502
9503         /*
9504          * If the guest has used debug registers, at least dr7
9505          * will be disabled while returning to the host.
9506          * If we don't have active breakpoints in the host, we don't
9507          * care about the messed up debug address registers. But if
9508          * we have some of them active, restore the old state.
9509          */
9510         if (hw_breakpoint_active())
9511                 hw_breakpoint_restore();
9512
9513         vcpu->arch.last_vmentry_cpu = vcpu->cpu;
9514         vcpu->arch.last_guest_tsc = kvm_read_l1_tsc(vcpu, rdtsc());
9515
9516         vcpu->mode = OUTSIDE_GUEST_MODE;
9517         smp_wmb();
9518
9519         static_call(kvm_x86_handle_exit_irqoff)(vcpu);
9520
9521         /*
9522          * Consume any pending interrupts, including the possible source of
9523          * VM-Exit on SVM and any ticks that occur between VM-Exit and now.
9524          * An instruction is required after local_irq_enable() to fully unblock
9525          * interrupts on processors that implement an interrupt shadow, the
9526          * stat.exits increment will do nicely.
9527          */
9528         kvm_before_interrupt(vcpu);
9529         local_irq_enable();
9530         ++vcpu->stat.exits;
9531         local_irq_disable();
9532         kvm_after_interrupt(vcpu);
9533
9534         /*
9535          * Wait until after servicing IRQs to account guest time so that any
9536          * ticks that occurred while running the guest are properly accounted
9537          * to the guest.  Waiting until IRQs are enabled degrades the accuracy
9538          * of accounting via context tracking, but the loss of accuracy is
9539          * acceptable for all known use cases.
9540          */
9541         vtime_account_guest_exit();
9542
9543         if (lapic_in_kernel(vcpu)) {
9544                 s64 delta = vcpu->arch.apic->lapic_timer.advance_expire_delta;
9545                 if (delta != S64_MIN) {
9546                         trace_kvm_wait_lapic_expire(vcpu->vcpu_id, delta);
9547                         vcpu->arch.apic->lapic_timer.advance_expire_delta = S64_MIN;
9548                 }
9549         }
9550
9551         local_irq_enable();
9552         preempt_enable();
9553
9554         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
9555
9556         /*
9557          * Profile KVM exit RIPs:
9558          */
9559         if (unlikely(prof_on == KVM_PROFILING)) {
9560                 unsigned long rip = kvm_rip_read(vcpu);
9561                 profile_hit(KVM_PROFILING, (void *)rip);
9562         }
9563
9564         if (unlikely(vcpu->arch.tsc_always_catchup))
9565                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
9566
9567         if (vcpu->arch.apic_attention)
9568                 kvm_lapic_sync_from_vapic(vcpu);
9569
9570         r = static_call(kvm_x86_handle_exit)(vcpu, exit_fastpath);
9571         return r;
9572
9573 cancel_injection:
9574         if (req_immediate_exit)
9575                 kvm_make_request(KVM_REQ_EVENT, vcpu);
9576         static_call(kvm_x86_cancel_injection)(vcpu);
9577         if (unlikely(vcpu->arch.apic_attention))
9578                 kvm_lapic_sync_from_vapic(vcpu);
9579 out:
9580         return r;
9581 }
9582
9583 static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
9584 {
9585         if (!kvm_arch_vcpu_runnable(vcpu) &&
9586             (!kvm_x86_ops.pre_block || static_call(kvm_x86_pre_block)(vcpu) == 0)) {
9587                 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
9588                 kvm_vcpu_block(vcpu);
9589                 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
9590
9591                 if (kvm_x86_ops.post_block)
9592                         static_call(kvm_x86_post_block)(vcpu);
9593
9594                 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
9595                         return 1;
9596         }
9597
9598         if (kvm_apic_accept_events(vcpu) < 0)
9599                 return 0;
9600         switch(vcpu->arch.mp_state) {
9601         case KVM_MP_STATE_HALTED:
9602         case KVM_MP_STATE_AP_RESET_HOLD:
9603                 vcpu->arch.pv.pv_unhalted = false;
9604                 vcpu->arch.mp_state =
9605                         KVM_MP_STATE_RUNNABLE;
9606                 fallthrough;
9607         case KVM_MP_STATE_RUNNABLE:
9608                 vcpu->arch.apf.halted = false;
9609                 break;
9610         case KVM_MP_STATE_INIT_RECEIVED:
9611                 break;
9612         default:
9613                 return -EINTR;
9614         }
9615         return 1;
9616 }
9617
9618 static inline bool kvm_vcpu_running(struct kvm_vcpu *vcpu)
9619 {
9620         if (is_guest_mode(vcpu))
9621                 kvm_check_nested_events(vcpu);
9622
9623         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
9624                 !vcpu->arch.apf.halted);
9625 }
9626
9627 static int vcpu_run(struct kvm_vcpu *vcpu)
9628 {
9629         int r;
9630         struct kvm *kvm = vcpu->kvm;
9631
9632         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
9633         vcpu->arch.l1tf_flush_l1d = true;
9634
9635         for (;;) {
9636                 if (kvm_vcpu_running(vcpu)) {
9637                         r = vcpu_enter_guest(vcpu);
9638                 } else {
9639                         r = vcpu_block(kvm, vcpu);
9640                 }
9641
9642                 if (r <= 0)
9643                         break;
9644
9645                 kvm_clear_request(KVM_REQ_UNBLOCK, vcpu);
9646                 if (kvm_cpu_has_pending_timer(vcpu))
9647                         kvm_inject_pending_timer_irqs(vcpu);
9648
9649                 if (dm_request_for_irq_injection(vcpu) &&
9650                         kvm_vcpu_ready_for_interrupt_injection(vcpu)) {
9651                         r = 0;
9652                         vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
9653                         ++vcpu->stat.request_irq_exits;
9654                         break;
9655                 }
9656
9657                 if (__xfer_to_guest_mode_work_pending()) {
9658                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
9659                         r = xfer_to_guest_mode_handle_work(vcpu);
9660                         if (r)
9661                                 return r;
9662                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
9663                 }
9664         }
9665
9666         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
9667
9668         return r;
9669 }
9670
9671 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
9672 {
9673         int r;
9674
9675         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
9676         r = kvm_emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
9677         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
9678         return r;
9679 }
9680
9681 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
9682 {
9683         BUG_ON(!vcpu->arch.pio.count);
9684
9685         return complete_emulated_io(vcpu);
9686 }
9687
9688 /*
9689  * Implements the following, as a state machine:
9690  *
9691  * read:
9692  *   for each fragment
9693  *     for each mmio piece in the fragment
9694  *       write gpa, len
9695  *       exit
9696  *       copy data
9697  *   execute insn
9698  *
9699  * write:
9700  *   for each fragment
9701  *     for each mmio piece in the fragment
9702  *       write gpa, len
9703  *       copy data
9704  *       exit
9705  */
9706 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
9707 {
9708         struct kvm_run *run = vcpu->run;
9709         struct kvm_mmio_fragment *frag;
9710         unsigned len;
9711
9712         BUG_ON(!vcpu->mmio_needed);
9713
9714         /* Complete previous fragment */
9715         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
9716         len = min(8u, frag->len);
9717         if (!vcpu->mmio_is_write)
9718                 memcpy(frag->data, run->mmio.data, len);
9719
9720         if (frag->len <= 8) {
9721                 /* Switch to the next fragment. */
9722                 frag++;
9723                 vcpu->mmio_cur_fragment++;
9724         } else {
9725                 /* Go forward to the next mmio piece. */
9726                 frag->data += len;
9727                 frag->gpa += len;
9728                 frag->len -= len;
9729         }
9730
9731         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
9732                 vcpu->mmio_needed = 0;
9733
9734                 /* FIXME: return into emulator if single-stepping.  */
9735                 if (vcpu->mmio_is_write)
9736                         return 1;
9737                 vcpu->mmio_read_completed = 1;
9738                 return complete_emulated_io(vcpu);
9739         }
9740
9741         run->exit_reason = KVM_EXIT_MMIO;
9742         run->mmio.phys_addr = frag->gpa;
9743         if (vcpu->mmio_is_write)
9744                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
9745         run->mmio.len = min(8u, frag->len);
9746         run->mmio.is_write = vcpu->mmio_is_write;
9747         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
9748         return 0;
9749 }
9750
9751 static void kvm_save_current_fpu(struct fpu *fpu)
9752 {
9753         /*
9754          * If the target FPU state is not resident in the CPU registers, just
9755          * memcpy() from current, else save CPU state directly to the target.
9756          */
9757         if (test_thread_flag(TIF_NEED_FPU_LOAD))
9758                 memcpy(&fpu->state, &current->thread.fpu.state,
9759                        fpu_kernel_xstate_size);
9760         else
9761                 copy_fpregs_to_fpstate(fpu);
9762 }
9763
9764 /* Swap (qemu) user FPU context for the guest FPU context. */
9765 static void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
9766 {
9767         fpregs_lock();
9768
9769         kvm_save_current_fpu(vcpu->arch.user_fpu);
9770
9771         /*
9772          * Guests with protected state can't have it set by the hypervisor,
9773          * so skip trying to set it.
9774          */
9775         if (vcpu->arch.guest_fpu)
9776                 /* PKRU is separately restored in kvm_x86_ops.run. */
9777                 __copy_kernel_to_fpregs(&vcpu->arch.guest_fpu->state,
9778                                         ~XFEATURE_MASK_PKRU);
9779
9780         fpregs_mark_activate();
9781         fpregs_unlock();
9782
9783         trace_kvm_fpu(1);
9784 }
9785
9786 /* When vcpu_run ends, restore user space FPU context. */
9787 static void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
9788 {
9789         fpregs_lock();
9790
9791         /*
9792          * Guests with protected state can't have it read by the hypervisor,
9793          * so skip trying to save it.
9794          */
9795         if (vcpu->arch.guest_fpu)
9796                 kvm_save_current_fpu(vcpu->arch.guest_fpu);
9797
9798         copy_kernel_to_fpregs(&vcpu->arch.user_fpu->state);
9799
9800         fpregs_mark_activate();
9801         fpregs_unlock();
9802
9803         ++vcpu->stat.fpu_reload;
9804         trace_kvm_fpu(0);
9805 }
9806
9807 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu)
9808 {
9809         struct kvm_run *kvm_run = vcpu->run;
9810         int r;
9811
9812         vcpu_load(vcpu);
9813         kvm_sigset_activate(vcpu);
9814         kvm_run->flags = 0;
9815         kvm_load_guest_fpu(vcpu);
9816
9817         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
9818                 if (kvm_run->immediate_exit) {
9819                         r = -EINTR;
9820                         goto out;
9821                 }
9822                 kvm_vcpu_block(vcpu);
9823                 if (kvm_apic_accept_events(vcpu) < 0) {
9824                         r = 0;
9825                         goto out;
9826                 }
9827                 kvm_clear_request(KVM_REQ_UNHALT, vcpu);
9828                 r = -EAGAIN;
9829                 if (signal_pending(current)) {
9830                         r = -EINTR;
9831                         kvm_run->exit_reason = KVM_EXIT_INTR;
9832                         ++vcpu->stat.signal_exits;
9833                 }
9834                 goto out;
9835         }
9836
9837         if (kvm_run->kvm_valid_regs & ~KVM_SYNC_X86_VALID_FIELDS) {
9838                 r = -EINVAL;
9839                 goto out;
9840         }
9841
9842         if (kvm_run->kvm_dirty_regs) {
9843                 r = sync_regs(vcpu);
9844                 if (r != 0)
9845                         goto out;
9846         }
9847
9848         /* re-sync apic's tpr */
9849         if (!lapic_in_kernel(vcpu)) {
9850                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
9851                         r = -EINVAL;
9852                         goto out;
9853                 }
9854         }
9855
9856         if (unlikely(vcpu->arch.complete_userspace_io)) {
9857                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
9858                 vcpu->arch.complete_userspace_io = NULL;
9859                 r = cui(vcpu);
9860                 if (r <= 0)
9861                         goto out;
9862         } else
9863                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
9864
9865         if (kvm_run->immediate_exit)
9866                 r = -EINTR;
9867         else
9868                 r = vcpu_run(vcpu);
9869
9870 out:
9871         kvm_put_guest_fpu(vcpu);
9872         if (kvm_run->kvm_valid_regs)
9873                 store_regs(vcpu);
9874         post_kvm_run_save(vcpu);
9875         kvm_sigset_deactivate(vcpu);
9876
9877         vcpu_put(vcpu);
9878         return r;
9879 }
9880
9881 static void __get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
9882 {
9883         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
9884                 /*
9885                  * We are here if userspace calls get_regs() in the middle of
9886                  * instruction emulation. Registers state needs to be copied
9887                  * back from emulation context to vcpu. Userspace shouldn't do
9888                  * that usually, but some bad designed PV devices (vmware
9889                  * backdoor interface) need this to work
9890                  */
9891                 emulator_writeback_register_cache(vcpu->arch.emulate_ctxt);
9892                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
9893         }
9894         regs->rax = kvm_rax_read(vcpu);
9895         regs->rbx = kvm_rbx_read(vcpu);
9896         regs->rcx = kvm_rcx_read(vcpu);
9897         regs->rdx = kvm_rdx_read(vcpu);
9898         regs->rsi = kvm_rsi_read(vcpu);
9899         regs->rdi = kvm_rdi_read(vcpu);
9900         regs->rsp = kvm_rsp_read(vcpu);
9901         regs->rbp = kvm_rbp_read(vcpu);
9902 #ifdef CONFIG_X86_64
9903         regs->r8 = kvm_r8_read(vcpu);
9904         regs->r9 = kvm_r9_read(vcpu);
9905         regs->r10 = kvm_r10_read(vcpu);
9906         regs->r11 = kvm_r11_read(vcpu);
9907         regs->r12 = kvm_r12_read(vcpu);
9908         regs->r13 = kvm_r13_read(vcpu);
9909         regs->r14 = kvm_r14_read(vcpu);
9910         regs->r15 = kvm_r15_read(vcpu);
9911 #endif
9912
9913         regs->rip = kvm_rip_read(vcpu);
9914         regs->rflags = kvm_get_rflags(vcpu);
9915 }
9916
9917 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
9918 {
9919         vcpu_load(vcpu);
9920         __get_regs(vcpu, regs);
9921         vcpu_put(vcpu);
9922         return 0;
9923 }
9924
9925 static void __set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
9926 {
9927         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
9928         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
9929
9930         kvm_rax_write(vcpu, regs->rax);
9931         kvm_rbx_write(vcpu, regs->rbx);
9932         kvm_rcx_write(vcpu, regs->rcx);
9933         kvm_rdx_write(vcpu, regs->rdx);
9934         kvm_rsi_write(vcpu, regs->rsi);
9935         kvm_rdi_write(vcpu, regs->rdi);
9936         kvm_rsp_write(vcpu, regs->rsp);
9937         kvm_rbp_write(vcpu, regs->rbp);
9938 #ifdef CONFIG_X86_64
9939         kvm_r8_write(vcpu, regs->r8);
9940         kvm_r9_write(vcpu, regs->r9);
9941         kvm_r10_write(vcpu, regs->r10);
9942         kvm_r11_write(vcpu, regs->r11);
9943         kvm_r12_write(vcpu, regs->r12);
9944         kvm_r13_write(vcpu, regs->r13);
9945         kvm_r14_write(vcpu, regs->r14);
9946         kvm_r15_write(vcpu, regs->r15);
9947 #endif
9948
9949         kvm_rip_write(vcpu, regs->rip);
9950         kvm_set_rflags(vcpu, regs->rflags | X86_EFLAGS_FIXED);
9951
9952         vcpu->arch.exception.pending = false;
9953
9954         kvm_make_request(KVM_REQ_EVENT, vcpu);
9955 }
9956
9957 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
9958 {
9959         vcpu_load(vcpu);
9960         __set_regs(vcpu, regs);
9961         vcpu_put(vcpu);
9962         return 0;
9963 }
9964
9965 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
9966 {
9967         struct kvm_segment cs;
9968
9969         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
9970         *db = cs.db;
9971         *l = cs.l;
9972 }
9973 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
9974
9975 static void __get_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
9976 {
9977         struct desc_ptr dt;
9978
9979         if (vcpu->arch.guest_state_protected)
9980                 goto skip_protected_regs;
9981
9982         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
9983         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
9984         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
9985         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
9986         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
9987         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
9988
9989         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
9990         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
9991
9992         static_call(kvm_x86_get_idt)(vcpu, &dt);
9993         sregs->idt.limit = dt.size;
9994         sregs->idt.base = dt.address;
9995         static_call(kvm_x86_get_gdt)(vcpu, &dt);
9996         sregs->gdt.limit = dt.size;
9997         sregs->gdt.base = dt.address;
9998
9999         sregs->cr2 = vcpu->arch.cr2;
10000         sregs->cr3 = kvm_read_cr3(vcpu);
10001
10002 skip_protected_regs:
10003         sregs->cr0 = kvm_read_cr0(vcpu);
10004         sregs->cr4 = kvm_read_cr4(vcpu);
10005         sregs->cr8 = kvm_get_cr8(vcpu);
10006         sregs->efer = vcpu->arch.efer;
10007         sregs->apic_base = kvm_get_apic_base(vcpu);
10008
10009         memset(sregs->interrupt_bitmap, 0, sizeof(sregs->interrupt_bitmap));
10010
10011         if (vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft)
10012                 set_bit(vcpu->arch.interrupt.nr,
10013                         (unsigned long *)sregs->interrupt_bitmap);
10014 }
10015
10016 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
10017                                   struct kvm_sregs *sregs)
10018 {
10019         vcpu_load(vcpu);
10020         __get_sregs(vcpu, sregs);
10021         vcpu_put(vcpu);
10022         return 0;
10023 }
10024
10025 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
10026                                     struct kvm_mp_state *mp_state)
10027 {
10028         int r;
10029
10030         vcpu_load(vcpu);
10031         if (kvm_mpx_supported())
10032                 kvm_load_guest_fpu(vcpu);
10033
10034         r = kvm_apic_accept_events(vcpu);
10035         if (r < 0)
10036                 goto out;
10037         r = 0;
10038
10039         if ((vcpu->arch.mp_state == KVM_MP_STATE_HALTED ||
10040              vcpu->arch.mp_state == KVM_MP_STATE_AP_RESET_HOLD) &&
10041             vcpu->arch.pv.pv_unhalted)
10042                 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
10043         else
10044                 mp_state->mp_state = vcpu->arch.mp_state;
10045
10046 out:
10047         if (kvm_mpx_supported())
10048                 kvm_put_guest_fpu(vcpu);
10049         vcpu_put(vcpu);
10050         return r;
10051 }
10052
10053 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
10054                                     struct kvm_mp_state *mp_state)
10055 {
10056         int ret = -EINVAL;
10057
10058         vcpu_load(vcpu);
10059
10060         if (!lapic_in_kernel(vcpu) &&
10061             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
10062                 goto out;
10063
10064         /*
10065          * KVM_MP_STATE_INIT_RECEIVED means the processor is in
10066          * INIT state; latched init should be reported using
10067          * KVM_SET_VCPU_EVENTS, so reject it here.
10068          */
10069         if ((kvm_vcpu_latch_init(vcpu) || vcpu->arch.smi_pending) &&
10070             (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED ||
10071              mp_state->mp_state == KVM_MP_STATE_INIT_RECEIVED))
10072                 goto out;
10073
10074         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
10075                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
10076                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
10077         } else
10078                 vcpu->arch.mp_state = mp_state->mp_state;
10079         kvm_make_request(KVM_REQ_EVENT, vcpu);
10080
10081         ret = 0;
10082 out:
10083         vcpu_put(vcpu);
10084         return ret;
10085 }
10086
10087 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
10088                     int reason, bool has_error_code, u32 error_code)
10089 {
10090         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
10091         int ret;
10092
10093         init_emulate_ctxt(vcpu);
10094
10095         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
10096                                    has_error_code, error_code);
10097         if (ret) {
10098                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
10099                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
10100                 vcpu->run->internal.ndata = 0;
10101                 return 0;
10102         }
10103
10104         kvm_rip_write(vcpu, ctxt->eip);
10105         kvm_set_rflags(vcpu, ctxt->eflags);
10106         return 1;
10107 }
10108 EXPORT_SYMBOL_GPL(kvm_task_switch);
10109
10110 static bool kvm_is_valid_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
10111 {
10112         if ((sregs->efer & EFER_LME) && (sregs->cr0 & X86_CR0_PG)) {
10113                 /*
10114                  * When EFER.LME and CR0.PG are set, the processor is in
10115                  * 64-bit mode (though maybe in a 32-bit code segment).
10116                  * CR4.PAE and EFER.LMA must be set.
10117                  */
10118                 if (!(sregs->cr4 & X86_CR4_PAE) || !(sregs->efer & EFER_LMA))
10119                         return false;
10120                 if (kvm_vcpu_is_illegal_gpa(vcpu, sregs->cr3))
10121                         return false;
10122         } else {
10123                 /*
10124                  * Not in 64-bit mode: EFER.LMA is clear and the code
10125                  * segment cannot be 64-bit.
10126                  */
10127                 if (sregs->efer & EFER_LMA || sregs->cs.l)
10128                         return false;
10129         }
10130
10131         return kvm_is_valid_cr4(vcpu, sregs->cr4);
10132 }
10133
10134 static int __set_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
10135 {
10136         struct msr_data apic_base_msr;
10137         int mmu_reset_needed = 0;
10138         int pending_vec, max_bits, idx;
10139         struct desc_ptr dt;
10140         int ret = -EINVAL;
10141
10142         if (!kvm_is_valid_sregs(vcpu, sregs))
10143                 goto out;
10144
10145         apic_base_msr.data = sregs->apic_base;
10146         apic_base_msr.host_initiated = true;
10147         if (kvm_set_apic_base(vcpu, &apic_base_msr))
10148                 goto out;
10149
10150         if (vcpu->arch.guest_state_protected)
10151                 goto skip_protected_regs;
10152
10153         dt.size = sregs->idt.limit;
10154         dt.address = sregs->idt.base;
10155         static_call(kvm_x86_set_idt)(vcpu, &dt);
10156         dt.size = sregs->gdt.limit;
10157         dt.address = sregs->gdt.base;
10158         static_call(kvm_x86_set_gdt)(vcpu, &dt);
10159
10160         vcpu->arch.cr2 = sregs->cr2;
10161         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
10162         vcpu->arch.cr3 = sregs->cr3;
10163         kvm_register_mark_available(vcpu, VCPU_EXREG_CR3);
10164
10165         kvm_set_cr8(vcpu, sregs->cr8);
10166
10167         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
10168         static_call(kvm_x86_set_efer)(vcpu, sregs->efer);
10169
10170         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
10171         static_call(kvm_x86_set_cr0)(vcpu, sregs->cr0);
10172         vcpu->arch.cr0 = sregs->cr0;
10173
10174         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
10175         static_call(kvm_x86_set_cr4)(vcpu, sregs->cr4);
10176
10177         idx = srcu_read_lock(&vcpu->kvm->srcu);
10178         if (is_pae_paging(vcpu)) {
10179                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
10180                 mmu_reset_needed = 1;
10181         }
10182         srcu_read_unlock(&vcpu->kvm->srcu, idx);
10183
10184         if (mmu_reset_needed)
10185                 kvm_mmu_reset_context(vcpu);
10186
10187         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
10188         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
10189         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
10190         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
10191         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
10192         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
10193
10194         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
10195         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
10196
10197         update_cr8_intercept(vcpu);
10198
10199         /* Older userspace won't unhalt the vcpu on reset. */
10200         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
10201             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
10202             !is_protmode(vcpu))
10203                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
10204
10205 skip_protected_regs:
10206         max_bits = KVM_NR_INTERRUPTS;
10207         pending_vec = find_first_bit(
10208                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
10209         if (pending_vec < max_bits) {
10210                 kvm_queue_interrupt(vcpu, pending_vec, false);
10211                 pr_debug("Set back pending irq %d\n", pending_vec);
10212         }
10213
10214         kvm_make_request(KVM_REQ_EVENT, vcpu);
10215
10216         ret = 0;
10217 out:
10218         return ret;
10219 }
10220
10221 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
10222                                   struct kvm_sregs *sregs)
10223 {
10224         int ret;
10225
10226         vcpu_load(vcpu);
10227         ret = __set_sregs(vcpu, sregs);
10228         vcpu_put(vcpu);
10229         return ret;
10230 }
10231
10232 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
10233                                         struct kvm_guest_debug *dbg)
10234 {
10235         unsigned long rflags;
10236         int i, r;
10237
10238         if (vcpu->arch.guest_state_protected)
10239                 return -EINVAL;
10240
10241         vcpu_load(vcpu);
10242
10243         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
10244                 r = -EBUSY;
10245                 if (vcpu->arch.exception.pending)
10246                         goto out;
10247                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
10248                         kvm_queue_exception(vcpu, DB_VECTOR);
10249                 else
10250                         kvm_queue_exception(vcpu, BP_VECTOR);
10251         }
10252
10253         /*
10254          * Read rflags as long as potentially injected trace flags are still
10255          * filtered out.
10256          */
10257         rflags = kvm_get_rflags(vcpu);
10258
10259         vcpu->guest_debug = dbg->control;
10260         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
10261                 vcpu->guest_debug = 0;
10262
10263         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
10264                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
10265                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
10266                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
10267         } else {
10268                 for (i = 0; i < KVM_NR_DB_REGS; i++)
10269                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
10270         }
10271         kvm_update_dr7(vcpu);
10272
10273         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
10274                 vcpu->arch.singlestep_rip = kvm_get_linear_rip(vcpu);
10275
10276         /*
10277          * Trigger an rflags update that will inject or remove the trace
10278          * flags.
10279          */
10280         kvm_set_rflags(vcpu, rflags);
10281
10282         static_call(kvm_x86_update_exception_bitmap)(vcpu);
10283
10284         r = 0;
10285
10286 out:
10287         vcpu_put(vcpu);
10288         return r;
10289 }
10290
10291 /*
10292  * Translate a guest virtual address to a guest physical address.
10293  */
10294 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
10295                                     struct kvm_translation *tr)
10296 {
10297         unsigned long vaddr = tr->linear_address;
10298         gpa_t gpa;
10299         int idx;
10300
10301         vcpu_load(vcpu);
10302
10303         idx = srcu_read_lock(&vcpu->kvm->srcu);
10304         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
10305         srcu_read_unlock(&vcpu->kvm->srcu, idx);
10306         tr->physical_address = gpa;
10307         tr->valid = gpa != UNMAPPED_GVA;
10308         tr->writeable = 1;
10309         tr->usermode = 0;
10310
10311         vcpu_put(vcpu);
10312         return 0;
10313 }
10314
10315 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
10316 {
10317         struct fxregs_state *fxsave;
10318
10319         if (!vcpu->arch.guest_fpu)
10320                 return 0;
10321
10322         vcpu_load(vcpu);
10323
10324         fxsave = &vcpu->arch.guest_fpu->state.fxsave;
10325         memcpy(fpu->fpr, fxsave->st_space, 128);
10326         fpu->fcw = fxsave->cwd;
10327         fpu->fsw = fxsave->swd;
10328         fpu->ftwx = fxsave->twd;
10329         fpu->last_opcode = fxsave->fop;
10330         fpu->last_ip = fxsave->rip;
10331         fpu->last_dp = fxsave->rdp;
10332         memcpy(fpu->xmm, fxsave->xmm_space, sizeof(fxsave->xmm_space));
10333
10334         vcpu_put(vcpu);
10335         return 0;
10336 }
10337
10338 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
10339 {
10340         struct fxregs_state *fxsave;
10341
10342         if (!vcpu->arch.guest_fpu)
10343                 return 0;
10344
10345         vcpu_load(vcpu);
10346
10347         fxsave = &vcpu->arch.guest_fpu->state.fxsave;
10348
10349         memcpy(fxsave->st_space, fpu->fpr, 128);
10350         fxsave->cwd = fpu->fcw;
10351         fxsave->swd = fpu->fsw;
10352         fxsave->twd = fpu->ftwx;
10353         fxsave->fop = fpu->last_opcode;
10354         fxsave->rip = fpu->last_ip;
10355         fxsave->rdp = fpu->last_dp;
10356         memcpy(fxsave->xmm_space, fpu->xmm, sizeof(fxsave->xmm_space));
10357
10358         vcpu_put(vcpu);
10359         return 0;
10360 }
10361
10362 static void store_regs(struct kvm_vcpu *vcpu)
10363 {
10364         BUILD_BUG_ON(sizeof(struct kvm_sync_regs) > SYNC_REGS_SIZE_BYTES);
10365
10366         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_REGS)
10367                 __get_regs(vcpu, &vcpu->run->s.regs.regs);
10368
10369         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_SREGS)
10370                 __get_sregs(vcpu, &vcpu->run->s.regs.sregs);
10371
10372         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_EVENTS)
10373                 kvm_vcpu_ioctl_x86_get_vcpu_events(
10374                                 vcpu, &vcpu->run->s.regs.events);
10375 }
10376
10377 static int sync_regs(struct kvm_vcpu *vcpu)
10378 {
10379         if (vcpu->run->kvm_dirty_regs & ~KVM_SYNC_X86_VALID_FIELDS)
10380                 return -EINVAL;
10381
10382         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_REGS) {
10383                 __set_regs(vcpu, &vcpu->run->s.regs.regs);
10384                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_REGS;
10385         }
10386         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_SREGS) {
10387                 if (__set_sregs(vcpu, &vcpu->run->s.regs.sregs))
10388                         return -EINVAL;
10389                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_SREGS;
10390         }
10391         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_EVENTS) {
10392                 if (kvm_vcpu_ioctl_x86_set_vcpu_events(
10393                                 vcpu, &vcpu->run->s.regs.events))
10394                         return -EINVAL;
10395                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_EVENTS;
10396         }
10397
10398         return 0;
10399 }
10400
10401 static void fx_init(struct kvm_vcpu *vcpu)
10402 {
10403         if (!vcpu->arch.guest_fpu)
10404                 return;
10405
10406         fpstate_init(&vcpu->arch.guest_fpu->state);
10407         if (boot_cpu_has(X86_FEATURE_XSAVES))
10408                 vcpu->arch.guest_fpu->state.xsave.header.xcomp_bv =
10409                         host_xcr0 | XSTATE_COMPACTION_ENABLED;
10410
10411         /*
10412          * Ensure guest xcr0 is valid for loading
10413          */
10414         vcpu->arch.xcr0 = XFEATURE_MASK_FP;
10415
10416         vcpu->arch.cr0 |= X86_CR0_ET;
10417 }
10418
10419 void kvm_free_guest_fpu(struct kvm_vcpu *vcpu)
10420 {
10421         if (vcpu->arch.guest_fpu) {
10422                 kmem_cache_free(x86_fpu_cache, vcpu->arch.guest_fpu);
10423                 vcpu->arch.guest_fpu = NULL;
10424         }
10425 }
10426 EXPORT_SYMBOL_GPL(kvm_free_guest_fpu);
10427
10428 int kvm_arch_vcpu_precreate(struct kvm *kvm, unsigned int id)
10429 {
10430         if (kvm_check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
10431                 pr_warn_once("kvm: SMP vm created on host with unstable TSC; "
10432                              "guest TSC will not be reliable\n");
10433
10434         return 0;
10435 }
10436
10437 int kvm_arch_vcpu_create(struct kvm_vcpu *vcpu)
10438 {
10439         struct page *page;
10440         int r;
10441
10442         if (!irqchip_in_kernel(vcpu->kvm) || kvm_vcpu_is_reset_bsp(vcpu))
10443                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
10444         else
10445                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
10446
10447         r = kvm_mmu_create(vcpu);
10448         if (r < 0)
10449                 return r;
10450
10451         if (irqchip_in_kernel(vcpu->kvm)) {
10452                 r = kvm_create_lapic(vcpu, lapic_timer_advance_ns);
10453                 if (r < 0)
10454                         goto fail_mmu_destroy;
10455                 if (kvm_apicv_activated(vcpu->kvm))
10456                         vcpu->arch.apicv_active = true;
10457         } else
10458                 static_branch_inc(&kvm_has_noapic_vcpu);
10459
10460         r = -ENOMEM;
10461
10462         page = alloc_page(GFP_KERNEL_ACCOUNT | __GFP_ZERO);
10463         if (!page)
10464                 goto fail_free_lapic;
10465         vcpu->arch.pio_data = page_address(page);
10466
10467         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
10468                                        GFP_KERNEL_ACCOUNT);
10469         if (!vcpu->arch.mce_banks)
10470                 goto fail_free_pio_data;
10471         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
10472
10473         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask,
10474                                 GFP_KERNEL_ACCOUNT))
10475                 goto fail_free_mce_banks;
10476
10477         if (!alloc_emulate_ctxt(vcpu))
10478                 goto free_wbinvd_dirty_mask;
10479
10480         vcpu->arch.user_fpu = kmem_cache_zalloc(x86_fpu_cache,
10481                                                 GFP_KERNEL_ACCOUNT);
10482         if (!vcpu->arch.user_fpu) {
10483                 pr_err("kvm: failed to allocate userspace's fpu\n");
10484                 goto free_emulate_ctxt;
10485         }
10486
10487         vcpu->arch.guest_fpu = kmem_cache_zalloc(x86_fpu_cache,
10488                                                  GFP_KERNEL_ACCOUNT);
10489         if (!vcpu->arch.guest_fpu) {
10490                 pr_err("kvm: failed to allocate vcpu's fpu\n");
10491                 goto free_user_fpu;
10492         }
10493         fx_init(vcpu);
10494
10495         vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
10496         vcpu->arch.reserved_gpa_bits = kvm_vcpu_reserved_gpa_bits_raw(vcpu);
10497
10498         vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
10499
10500         kvm_async_pf_hash_reset(vcpu);
10501         kvm_pmu_init(vcpu);
10502
10503         vcpu->arch.pending_external_vector = -1;
10504         vcpu->arch.preempted_in_kernel = false;
10505
10506         r = static_call(kvm_x86_vcpu_create)(vcpu);
10507         if (r)
10508                 goto free_guest_fpu;
10509
10510         vcpu->arch.arch_capabilities = kvm_get_arch_capabilities();
10511         vcpu->arch.msr_platform_info = MSR_PLATFORM_INFO_CPUID_FAULT;
10512         kvm_vcpu_mtrr_init(vcpu);
10513         vcpu_load(vcpu);
10514         kvm_set_tsc_khz(vcpu, max_tsc_khz);
10515         kvm_vcpu_reset(vcpu, false);
10516         kvm_init_mmu(vcpu, false);
10517         vcpu_put(vcpu);
10518         return 0;
10519
10520 free_guest_fpu:
10521         kvm_free_guest_fpu(vcpu);
10522 free_user_fpu:
10523         kmem_cache_free(x86_fpu_cache, vcpu->arch.user_fpu);
10524 free_emulate_ctxt:
10525         kmem_cache_free(x86_emulator_cache, vcpu->arch.emulate_ctxt);
10526 free_wbinvd_dirty_mask:
10527         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
10528 fail_free_mce_banks:
10529         kfree(vcpu->arch.mce_banks);
10530 fail_free_pio_data:
10531         free_page((unsigned long)vcpu->arch.pio_data);
10532 fail_free_lapic:
10533         kvm_free_lapic(vcpu);
10534 fail_mmu_destroy:
10535         kvm_mmu_destroy(vcpu);
10536         return r;
10537 }
10538
10539 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
10540 {
10541         struct kvm *kvm = vcpu->kvm;
10542
10543         if (mutex_lock_killable(&vcpu->mutex))
10544                 return;
10545         vcpu_load(vcpu);
10546         kvm_synchronize_tsc(vcpu, 0);
10547         vcpu_put(vcpu);
10548
10549         /* poll control enabled by default */
10550         vcpu->arch.msr_kvm_poll_control = 1;
10551
10552         mutex_unlock(&vcpu->mutex);
10553
10554         if (kvmclock_periodic_sync && vcpu->vcpu_idx == 0)
10555                 schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
10556                                                 KVMCLOCK_SYNC_PERIOD);
10557 }
10558
10559 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
10560 {
10561         struct gfn_to_pfn_cache *cache = &vcpu->arch.st.cache;
10562         int idx;
10563
10564         kvm_release_pfn(cache->pfn, cache->dirty, cache);
10565
10566         kvmclock_reset(vcpu);
10567
10568         static_call(kvm_x86_vcpu_free)(vcpu);
10569
10570         kmem_cache_free(x86_emulator_cache, vcpu->arch.emulate_ctxt);
10571         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
10572         kmem_cache_free(x86_fpu_cache, vcpu->arch.user_fpu);
10573         kvm_free_guest_fpu(vcpu);
10574
10575         kvm_hv_vcpu_uninit(vcpu);
10576         kvm_pmu_destroy(vcpu);
10577         kfree(vcpu->arch.mce_banks);
10578         kvm_free_lapic(vcpu);
10579         idx = srcu_read_lock(&vcpu->kvm->srcu);
10580         kvm_mmu_destroy(vcpu);
10581         srcu_read_unlock(&vcpu->kvm->srcu, idx);
10582         free_page((unsigned long)vcpu->arch.pio_data);
10583         kvfree(vcpu->arch.cpuid_entries);
10584         if (!lapic_in_kernel(vcpu))
10585                 static_branch_dec(&kvm_has_noapic_vcpu);
10586 }
10587
10588 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
10589 {
10590         kvm_lapic_reset(vcpu, init_event);
10591
10592         vcpu->arch.hflags = 0;
10593
10594         vcpu->arch.smi_pending = 0;
10595         vcpu->arch.smi_count = 0;
10596         atomic_set(&vcpu->arch.nmi_queued, 0);
10597         vcpu->arch.nmi_pending = 0;
10598         vcpu->arch.nmi_injected = false;
10599         kvm_clear_interrupt_queue(vcpu);
10600         kvm_clear_exception_queue(vcpu);
10601
10602         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
10603         kvm_update_dr0123(vcpu);
10604         vcpu->arch.dr6 = DR6_ACTIVE_LOW;
10605         vcpu->arch.dr7 = DR7_FIXED_1;
10606         kvm_update_dr7(vcpu);
10607
10608         vcpu->arch.cr2 = 0;
10609
10610         kvm_make_request(KVM_REQ_EVENT, vcpu);
10611         vcpu->arch.apf.msr_en_val = 0;
10612         vcpu->arch.apf.msr_int_val = 0;
10613         vcpu->arch.st.msr_val = 0;
10614
10615         kvmclock_reset(vcpu);
10616
10617         kvm_clear_async_pf_completion_queue(vcpu);
10618         kvm_async_pf_hash_reset(vcpu);
10619         vcpu->arch.apf.halted = false;
10620
10621         if (vcpu->arch.guest_fpu && kvm_mpx_supported()) {
10622                 void *mpx_state_buffer;
10623
10624                 /*
10625                  * To avoid have the INIT path from kvm_apic_has_events() that be
10626                  * called with loaded FPU and does not let userspace fix the state.
10627                  */
10628                 if (init_event)
10629                         kvm_put_guest_fpu(vcpu);
10630                 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu->state.xsave,
10631                                         XFEATURE_BNDREGS);
10632                 if (mpx_state_buffer)
10633                         memset(mpx_state_buffer, 0, sizeof(struct mpx_bndreg_state));
10634                 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu->state.xsave,
10635                                         XFEATURE_BNDCSR);
10636                 if (mpx_state_buffer)
10637                         memset(mpx_state_buffer, 0, sizeof(struct mpx_bndcsr));
10638                 if (init_event)
10639                         kvm_load_guest_fpu(vcpu);
10640         }
10641
10642         if (!init_event) {
10643                 kvm_pmu_reset(vcpu);
10644                 vcpu->arch.smbase = 0x30000;
10645
10646                 vcpu->arch.msr_misc_features_enables = 0;
10647
10648                 vcpu->arch.xcr0 = XFEATURE_MASK_FP;
10649         }
10650
10651         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
10652         vcpu->arch.regs_avail = ~0;
10653         vcpu->arch.regs_dirty = ~0;
10654
10655         vcpu->arch.ia32_xss = 0;
10656
10657         static_call(kvm_x86_vcpu_reset)(vcpu, init_event);
10658 }
10659
10660 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
10661 {
10662         struct kvm_segment cs;
10663
10664         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
10665         cs.selector = vector << 8;
10666         cs.base = vector << 12;
10667         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
10668         kvm_rip_write(vcpu, 0);
10669 }
10670 EXPORT_SYMBOL_GPL(kvm_vcpu_deliver_sipi_vector);
10671
10672 int kvm_arch_hardware_enable(void)
10673 {
10674         struct kvm *kvm;
10675         struct kvm_vcpu *vcpu;
10676         int i;
10677         int ret;
10678         u64 local_tsc;
10679         u64 max_tsc = 0;
10680         bool stable, backwards_tsc = false;
10681
10682         kvm_user_return_msr_cpu_online();
10683         ret = static_call(kvm_x86_hardware_enable)();
10684         if (ret != 0)
10685                 return ret;
10686
10687         local_tsc = rdtsc();
10688         stable = !kvm_check_tsc_unstable();
10689         list_for_each_entry(kvm, &vm_list, vm_list) {
10690                 kvm_for_each_vcpu(i, vcpu, kvm) {
10691                         if (!stable && vcpu->cpu == smp_processor_id())
10692                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
10693                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
10694                                 backwards_tsc = true;
10695                                 if (vcpu->arch.last_host_tsc > max_tsc)
10696                                         max_tsc = vcpu->arch.last_host_tsc;
10697                         }
10698                 }
10699         }
10700
10701         /*
10702          * Sometimes, even reliable TSCs go backwards.  This happens on
10703          * platforms that reset TSC during suspend or hibernate actions, but
10704          * maintain synchronization.  We must compensate.  Fortunately, we can
10705          * detect that condition here, which happens early in CPU bringup,
10706          * before any KVM threads can be running.  Unfortunately, we can't
10707          * bring the TSCs fully up to date with real time, as we aren't yet far
10708          * enough into CPU bringup that we know how much real time has actually
10709          * elapsed; our helper function, ktime_get_boottime_ns() will be using boot
10710          * variables that haven't been updated yet.
10711          *
10712          * So we simply find the maximum observed TSC above, then record the
10713          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
10714          * the adjustment will be applied.  Note that we accumulate
10715          * adjustments, in case multiple suspend cycles happen before some VCPU
10716          * gets a chance to run again.  In the event that no KVM threads get a
10717          * chance to run, we will miss the entire elapsed period, as we'll have
10718          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
10719          * loose cycle time.  This isn't too big a deal, since the loss will be
10720          * uniform across all VCPUs (not to mention the scenario is extremely
10721          * unlikely). It is possible that a second hibernate recovery happens
10722          * much faster than a first, causing the observed TSC here to be
10723          * smaller; this would require additional padding adjustment, which is
10724          * why we set last_host_tsc to the local tsc observed here.
10725          *
10726          * N.B. - this code below runs only on platforms with reliable TSC,
10727          * as that is the only way backwards_tsc is set above.  Also note
10728          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
10729          * have the same delta_cyc adjustment applied if backwards_tsc
10730          * is detected.  Note further, this adjustment is only done once,
10731          * as we reset last_host_tsc on all VCPUs to stop this from being
10732          * called multiple times (one for each physical CPU bringup).
10733          *
10734          * Platforms with unreliable TSCs don't have to deal with this, they
10735          * will be compensated by the logic in vcpu_load, which sets the TSC to
10736          * catchup mode.  This will catchup all VCPUs to real time, but cannot
10737          * guarantee that they stay in perfect synchronization.
10738          */
10739         if (backwards_tsc) {
10740                 u64 delta_cyc = max_tsc - local_tsc;
10741                 list_for_each_entry(kvm, &vm_list, vm_list) {
10742                         kvm->arch.backwards_tsc_observed = true;
10743                         kvm_for_each_vcpu(i, vcpu, kvm) {
10744                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
10745                                 vcpu->arch.last_host_tsc = local_tsc;
10746                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
10747                         }
10748
10749                         /*
10750                          * We have to disable TSC offset matching.. if you were
10751                          * booting a VM while issuing an S4 host suspend....
10752                          * you may have some problem.  Solving this issue is
10753                          * left as an exercise to the reader.
10754                          */
10755                         kvm->arch.last_tsc_nsec = 0;
10756                         kvm->arch.last_tsc_write = 0;
10757                 }
10758
10759         }
10760         return 0;
10761 }
10762
10763 void kvm_arch_hardware_disable(void)
10764 {
10765         static_call(kvm_x86_hardware_disable)();
10766         drop_user_return_notifiers();
10767 }
10768
10769 int kvm_arch_hardware_setup(void *opaque)
10770 {
10771         struct kvm_x86_init_ops *ops = opaque;
10772         int r;
10773
10774         rdmsrl_safe(MSR_EFER, &host_efer);
10775
10776         if (boot_cpu_has(X86_FEATURE_XSAVES))
10777                 rdmsrl(MSR_IA32_XSS, host_xss);
10778
10779         r = ops->hardware_setup();
10780         if (r != 0)
10781                 return r;
10782
10783         memcpy(&kvm_x86_ops, ops->runtime_ops, sizeof(kvm_x86_ops));
10784         kvm_ops_static_call_update();
10785
10786         if (!kvm_cpu_cap_has(X86_FEATURE_XSAVES))
10787                 supported_xss = 0;
10788
10789 #define __kvm_cpu_cap_has(UNUSED_, f) kvm_cpu_cap_has(f)
10790         cr4_reserved_bits = __cr4_reserved_bits(__kvm_cpu_cap_has, UNUSED_);
10791 #undef __kvm_cpu_cap_has
10792
10793         if (kvm_has_tsc_control) {
10794                 /*
10795                  * Make sure the user can only configure tsc_khz values that
10796                  * fit into a signed integer.
10797                  * A min value is not calculated because it will always
10798                  * be 1 on all machines.
10799                  */
10800                 u64 max = min(0x7fffffffULL,
10801                               __scale_tsc(kvm_max_tsc_scaling_ratio, tsc_khz));
10802                 kvm_max_guest_tsc_khz = max;
10803
10804                 kvm_default_tsc_scaling_ratio = 1ULL << kvm_tsc_scaling_ratio_frac_bits;
10805         }
10806
10807         kvm_init_msr_list();
10808         return 0;
10809 }
10810
10811 void kvm_arch_hardware_unsetup(void)
10812 {
10813         static_call(kvm_x86_hardware_unsetup)();
10814 }
10815
10816 int kvm_arch_check_processor_compat(void *opaque)
10817 {
10818         struct cpuinfo_x86 *c = &cpu_data(smp_processor_id());
10819         struct kvm_x86_init_ops *ops = opaque;
10820
10821         WARN_ON(!irqs_disabled());
10822
10823         if (__cr4_reserved_bits(cpu_has, c) !=
10824             __cr4_reserved_bits(cpu_has, &boot_cpu_data))
10825                 return -EIO;
10826
10827         return ops->check_processor_compatibility();
10828 }
10829
10830 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
10831 {
10832         return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
10833 }
10834 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp);
10835
10836 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
10837 {
10838         return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
10839 }
10840
10841 __read_mostly DEFINE_STATIC_KEY_FALSE(kvm_has_noapic_vcpu);
10842 EXPORT_SYMBOL_GPL(kvm_has_noapic_vcpu);
10843
10844 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
10845 {
10846         struct kvm_pmu *pmu = vcpu_to_pmu(vcpu);
10847
10848         vcpu->arch.l1tf_flush_l1d = true;
10849         if (pmu->version && unlikely(pmu->event_count)) {
10850                 pmu->need_cleanup = true;
10851                 kvm_make_request(KVM_REQ_PMU, vcpu);
10852         }
10853         static_call(kvm_x86_sched_in)(vcpu, cpu);
10854 }
10855
10856 void kvm_arch_free_vm(struct kvm *kvm)
10857 {
10858         kfree(to_kvm_hv(kvm)->hv_pa_pg);
10859         vfree(kvm);
10860 }
10861
10862
10863 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
10864 {
10865         if (type)
10866                 return -EINVAL;
10867
10868         INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
10869         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
10870         INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
10871         INIT_LIST_HEAD(&kvm->arch.lpage_disallowed_mmu_pages);
10872         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
10873         atomic_set(&kvm->arch.noncoherent_dma_count, 0);
10874
10875         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
10876         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
10877         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
10878         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
10879                 &kvm->arch.irq_sources_bitmap);
10880
10881         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
10882         mutex_init(&kvm->arch.apic_map_lock);
10883         spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
10884
10885         kvm->arch.kvmclock_offset = -get_kvmclock_base_ns();
10886         pvclock_update_vm_gtod_copy(kvm);
10887
10888         kvm->arch.guest_can_read_msr_platform_info = true;
10889
10890         INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
10891         INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
10892
10893         kvm_apicv_init(kvm);
10894         kvm_hv_init_vm(kvm);
10895         kvm_page_track_init(kvm);
10896         kvm_mmu_init_vm(kvm);
10897
10898         return static_call(kvm_x86_vm_init)(kvm);
10899 }
10900
10901 int kvm_arch_post_init_vm(struct kvm *kvm)
10902 {
10903         return kvm_mmu_post_init_vm(kvm);
10904 }
10905
10906 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
10907 {
10908         vcpu_load(vcpu);
10909         kvm_mmu_unload(vcpu);
10910         vcpu_put(vcpu);
10911 }
10912
10913 static void kvm_free_vcpus(struct kvm *kvm)
10914 {
10915         unsigned int i;
10916         struct kvm_vcpu *vcpu;
10917
10918         /*
10919          * Unpin any mmu pages first.
10920          */
10921         kvm_for_each_vcpu(i, vcpu, kvm) {
10922                 kvm_clear_async_pf_completion_queue(vcpu);
10923                 kvm_unload_vcpu_mmu(vcpu);
10924         }
10925         kvm_for_each_vcpu(i, vcpu, kvm)
10926                 kvm_vcpu_destroy(vcpu);
10927
10928         mutex_lock(&kvm->lock);
10929         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
10930                 kvm->vcpus[i] = NULL;
10931
10932         atomic_set(&kvm->online_vcpus, 0);
10933         mutex_unlock(&kvm->lock);
10934 }
10935
10936 void kvm_arch_sync_events(struct kvm *kvm)
10937 {
10938         cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
10939         cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
10940         kvm_free_pit(kvm);
10941 }
10942
10943 #define  ERR_PTR_USR(e)  ((void __user *)ERR_PTR(e))
10944
10945 /**
10946  * __x86_set_memory_region: Setup KVM internal memory slot
10947  *
10948  * @kvm: the kvm pointer to the VM.
10949  * @id: the slot ID to setup.
10950  * @gpa: the GPA to install the slot (unused when @size == 0).
10951  * @size: the size of the slot. Set to zero to uninstall a slot.
10952  *
10953  * This function helps to setup a KVM internal memory slot.  Specify
10954  * @size > 0 to install a new slot, while @size == 0 to uninstall a
10955  * slot.  The return code can be one of the following:
10956  *
10957  *   HVA:           on success (uninstall will return a bogus HVA)
10958  *   -errno:        on error
10959  *
10960  * The caller should always use IS_ERR() to check the return value
10961  * before use.  Note, the KVM internal memory slots are guaranteed to
10962  * remain valid and unchanged until the VM is destroyed, i.e., the
10963  * GPA->HVA translation will not change.  However, the HVA is a user
10964  * address, i.e. its accessibility is not guaranteed, and must be
10965  * accessed via __copy_{to,from}_user().
10966  */
10967 void __user * __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa,
10968                                       u32 size)
10969 {
10970         int i, r;
10971         unsigned long hva, old_npages;
10972         struct kvm_memslots *slots = kvm_memslots(kvm);
10973         struct kvm_memory_slot *slot;
10974
10975         /* Called with kvm->slots_lock held.  */
10976         if (WARN_ON(id >= KVM_MEM_SLOTS_NUM))
10977                 return ERR_PTR_USR(-EINVAL);
10978
10979         slot = id_to_memslot(slots, id);
10980         if (size) {
10981                 if (slot && slot->npages)
10982                         return ERR_PTR_USR(-EEXIST);
10983
10984                 /*
10985                  * MAP_SHARED to prevent internal slot pages from being moved
10986                  * by fork()/COW.
10987                  */
10988                 hva = vm_mmap(NULL, 0, size, PROT_READ | PROT_WRITE,
10989                               MAP_SHARED | MAP_ANONYMOUS, 0);
10990                 if (IS_ERR((void *)hva))
10991                         return (void __user *)hva;
10992         } else {
10993                 if (!slot || !slot->npages)
10994                         return NULL;
10995
10996                 old_npages = slot->npages;
10997                 hva = slot->userspace_addr;
10998         }
10999
11000         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
11001                 struct kvm_userspace_memory_region m;
11002
11003                 m.slot = id | (i << 16);
11004                 m.flags = 0;
11005                 m.guest_phys_addr = gpa;
11006                 m.userspace_addr = hva;
11007                 m.memory_size = size;
11008                 r = __kvm_set_memory_region(kvm, &m);
11009                 if (r < 0)
11010                         return ERR_PTR_USR(r);
11011         }
11012
11013         if (!size)
11014                 vm_munmap(hva, old_npages * PAGE_SIZE);
11015
11016         return (void __user *)hva;
11017 }
11018 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
11019
11020 void kvm_arch_pre_destroy_vm(struct kvm *kvm)
11021 {
11022         kvm_mmu_pre_destroy_vm(kvm);
11023 }
11024
11025 void kvm_arch_destroy_vm(struct kvm *kvm)
11026 {
11027         if (current->mm == kvm->mm) {
11028                 /*
11029                  * Free memory regions allocated on behalf of userspace,
11030                  * unless the the memory map has changed due to process exit
11031                  * or fd copying.
11032                  */
11033                 mutex_lock(&kvm->slots_lock);
11034                 __x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT,
11035                                         0, 0);
11036                 __x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT,
11037                                         0, 0);
11038                 __x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, 0, 0);
11039                 mutex_unlock(&kvm->slots_lock);
11040         }
11041         static_call_cond(kvm_x86_vm_destroy)(kvm);
11042         kvm_free_msr_filter(srcu_dereference_check(kvm->arch.msr_filter, &kvm->srcu, 1));
11043         kvm_pic_destroy(kvm);
11044         kvm_ioapic_destroy(kvm);
11045         kvm_free_vcpus(kvm);
11046         kvfree(rcu_dereference_check(kvm->arch.apic_map, 1));
11047         kfree(srcu_dereference_check(kvm->arch.pmu_event_filter, &kvm->srcu, 1));
11048         kvm_mmu_uninit_vm(kvm);
11049         kvm_page_track_cleanup(kvm);
11050         kvm_xen_destroy_vm(kvm);
11051         kvm_hv_destroy_vm(kvm);
11052 }
11053
11054 static void memslot_rmap_free(struct kvm_memory_slot *slot)
11055 {
11056         int i;
11057
11058         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
11059                 kvfree(slot->arch.rmap[i]);
11060                 slot->arch.rmap[i] = NULL;
11061         }
11062 }
11063
11064 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *slot)
11065 {
11066         int i;
11067
11068         memslot_rmap_free(slot);
11069
11070         for (i = 1; i < KVM_NR_PAGE_SIZES; ++i) {
11071                 kvfree(slot->arch.lpage_info[i - 1]);
11072                 slot->arch.lpage_info[i - 1] = NULL;
11073         }
11074
11075         kvm_page_track_free_memslot(slot);
11076 }
11077
11078 static int memslot_rmap_alloc(struct kvm_memory_slot *slot,
11079                               unsigned long npages)
11080 {
11081         const int sz = sizeof(*slot->arch.rmap[0]);
11082         int i;
11083
11084         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
11085                 int level = i + 1;
11086                 int lpages = gfn_to_index(slot->base_gfn + npages - 1,
11087                                           slot->base_gfn, level) + 1;
11088
11089                 WARN_ON(slot->arch.rmap[i]);
11090
11091                 slot->arch.rmap[i] = kvcalloc(lpages, sz, GFP_KERNEL_ACCOUNT);
11092                 if (!slot->arch.rmap[i]) {
11093                         memslot_rmap_free(slot);
11094                         return -ENOMEM;
11095                 }
11096         }
11097
11098         return 0;
11099 }
11100
11101 int alloc_all_memslots_rmaps(struct kvm *kvm)
11102 {
11103         struct kvm_memslots *slots;
11104         struct kvm_memory_slot *slot;
11105         int r, i;
11106
11107         /*
11108          * Check if memslots alreday have rmaps early before acquiring
11109          * the slots_arch_lock below.
11110          */
11111         if (kvm_memslots_have_rmaps(kvm))
11112                 return 0;
11113
11114         mutex_lock(&kvm->slots_arch_lock);
11115
11116         /*
11117          * Read memslots_have_rmaps again, under the slots arch lock,
11118          * before allocating the rmaps
11119          */
11120         if (kvm_memslots_have_rmaps(kvm)) {
11121                 mutex_unlock(&kvm->slots_arch_lock);
11122                 return 0;
11123         }
11124
11125         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
11126                 slots = __kvm_memslots(kvm, i);
11127                 kvm_for_each_memslot(slot, slots) {
11128                         r = memslot_rmap_alloc(slot, slot->npages);
11129                         if (r) {
11130                                 mutex_unlock(&kvm->slots_arch_lock);
11131                                 return r;
11132                         }
11133                 }
11134         }
11135
11136         /*
11137          * Ensure that memslots_have_rmaps becomes true strictly after
11138          * all the rmap pointers are set.
11139          */
11140         smp_store_release(&kvm->arch.memslots_have_rmaps, true);
11141         mutex_unlock(&kvm->slots_arch_lock);
11142         return 0;
11143 }
11144
11145 static int kvm_alloc_memslot_metadata(struct kvm *kvm,
11146                                       struct kvm_memory_slot *slot,
11147                                       unsigned long npages)
11148 {
11149         int i, r;
11150
11151         /*
11152          * Clear out the previous array pointers for the KVM_MR_MOVE case.  The
11153          * old arrays will be freed by __kvm_set_memory_region() if installing
11154          * the new memslot is successful.
11155          */
11156         memset(&slot->arch, 0, sizeof(slot->arch));
11157
11158         if (kvm_memslots_have_rmaps(kvm)) {
11159                 r = memslot_rmap_alloc(slot, npages);
11160                 if (r)
11161                         return r;
11162         }
11163
11164         for (i = 1; i < KVM_NR_PAGE_SIZES; ++i) {
11165                 struct kvm_lpage_info *linfo;
11166                 unsigned long ugfn;
11167                 int lpages;
11168                 int level = i + 1;
11169
11170                 lpages = gfn_to_index(slot->base_gfn + npages - 1,
11171                                       slot->base_gfn, level) + 1;
11172
11173                 linfo = kvcalloc(lpages, sizeof(*linfo), GFP_KERNEL_ACCOUNT);
11174                 if (!linfo)
11175                         goto out_free;
11176
11177                 slot->arch.lpage_info[i - 1] = linfo;
11178
11179                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
11180                         linfo[0].disallow_lpage = 1;
11181                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
11182                         linfo[lpages - 1].disallow_lpage = 1;
11183                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
11184                 /*
11185                  * If the gfn and userspace address are not aligned wrt each
11186                  * other, disable large page support for this slot.
11187                  */
11188                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1)) {
11189                         unsigned long j;
11190
11191                         for (j = 0; j < lpages; ++j)
11192                                 linfo[j].disallow_lpage = 1;
11193                 }
11194         }
11195
11196         if (kvm_page_track_create_memslot(slot, npages))
11197                 goto out_free;
11198
11199         return 0;
11200
11201 out_free:
11202         memslot_rmap_free(slot);
11203
11204         for (i = 1; i < KVM_NR_PAGE_SIZES; ++i) {
11205                 kvfree(slot->arch.lpage_info[i - 1]);
11206                 slot->arch.lpage_info[i - 1] = NULL;
11207         }
11208         return -ENOMEM;
11209 }
11210
11211 void kvm_arch_memslots_updated(struct kvm *kvm, u64 gen)
11212 {
11213         struct kvm_vcpu *vcpu;
11214         int i;
11215
11216         /*
11217          * memslots->generation has been incremented.
11218          * mmio generation may have reached its maximum value.
11219          */
11220         kvm_mmu_invalidate_mmio_sptes(kvm, gen);
11221
11222         /* Force re-initialization of steal_time cache */
11223         kvm_for_each_vcpu(i, vcpu, kvm)
11224                 kvm_vcpu_kick(vcpu);
11225 }
11226
11227 int kvm_arch_prepare_memory_region(struct kvm *kvm,
11228                                 struct kvm_memory_slot *memslot,
11229                                 const struct kvm_userspace_memory_region *mem,
11230                                 enum kvm_mr_change change)
11231 {
11232         if (change == KVM_MR_CREATE || change == KVM_MR_MOVE)
11233                 return kvm_alloc_memslot_metadata(kvm, memslot,
11234                                                   mem->memory_size >> PAGE_SHIFT);
11235         return 0;
11236 }
11237
11238
11239 static void kvm_mmu_update_cpu_dirty_logging(struct kvm *kvm, bool enable)
11240 {
11241         struct kvm_arch *ka = &kvm->arch;
11242
11243         if (!kvm_x86_ops.cpu_dirty_log_size)
11244                 return;
11245
11246         if ((enable && ++ka->cpu_dirty_logging_count == 1) ||
11247             (!enable && --ka->cpu_dirty_logging_count == 0))
11248                 kvm_make_all_cpus_request(kvm, KVM_REQ_UPDATE_CPU_DIRTY_LOGGING);
11249
11250         WARN_ON_ONCE(ka->cpu_dirty_logging_count < 0);
11251 }
11252
11253 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
11254                                      struct kvm_memory_slot *old,
11255                                      struct kvm_memory_slot *new,
11256                                      enum kvm_mr_change change)
11257 {
11258         bool log_dirty_pages = new->flags & KVM_MEM_LOG_DIRTY_PAGES;
11259
11260         /*
11261          * Update CPU dirty logging if dirty logging is being toggled.  This
11262          * applies to all operations.
11263          */
11264         if ((old->flags ^ new->flags) & KVM_MEM_LOG_DIRTY_PAGES)
11265                 kvm_mmu_update_cpu_dirty_logging(kvm, log_dirty_pages);
11266
11267         /*
11268          * Nothing more to do for RO slots (which can't be dirtied and can't be
11269          * made writable) or CREATE/MOVE/DELETE of a slot.
11270          *
11271          * For a memslot with dirty logging disabled:
11272          * CREATE:      No dirty mappings will already exist.
11273          * MOVE/DELETE: The old mappings will already have been cleaned up by
11274          *              kvm_arch_flush_shadow_memslot()
11275          *
11276          * For a memslot with dirty logging enabled:
11277          * CREATE:      No shadow pages exist, thus nothing to write-protect
11278          *              and no dirty bits to clear.
11279          * MOVE/DELETE: The old mappings will already have been cleaned up by
11280          *              kvm_arch_flush_shadow_memslot().
11281          */
11282         if ((change != KVM_MR_FLAGS_ONLY) || (new->flags & KVM_MEM_READONLY))
11283                 return;
11284
11285         /*
11286          * READONLY and non-flags changes were filtered out above, and the only
11287          * other flag is LOG_DIRTY_PAGES, i.e. something is wrong if dirty
11288          * logging isn't being toggled on or off.
11289          */
11290         if (WARN_ON_ONCE(!((old->flags ^ new->flags) & KVM_MEM_LOG_DIRTY_PAGES)))
11291                 return;
11292
11293         if (!log_dirty_pages) {
11294                 /*
11295                  * Dirty logging tracks sptes in 4k granularity, meaning that
11296                  * large sptes have to be split.  If live migration succeeds,
11297                  * the guest in the source machine will be destroyed and large
11298                  * sptes will be created in the destination.  However, if the
11299                  * guest continues to run in the source machine (for example if
11300                  * live migration fails), small sptes will remain around and
11301                  * cause bad performance.
11302                  *
11303                  * Scan sptes if dirty logging has been stopped, dropping those
11304                  * which can be collapsed into a single large-page spte.  Later
11305                  * page faults will create the large-page sptes.
11306                  */
11307                 kvm_mmu_zap_collapsible_sptes(kvm, new);
11308         } else {
11309                 /*
11310                  * Initially-all-set does not require write protecting any page,
11311                  * because they're all assumed to be dirty.
11312                  */
11313                 if (kvm_dirty_log_manual_protect_and_init_set(kvm))
11314                         return;
11315
11316                 if (kvm_x86_ops.cpu_dirty_log_size) {
11317                         kvm_mmu_slot_leaf_clear_dirty(kvm, new);
11318                         kvm_mmu_slot_remove_write_access(kvm, new, PG_LEVEL_2M);
11319                 } else {
11320                         kvm_mmu_slot_remove_write_access(kvm, new, PG_LEVEL_4K);
11321                 }
11322         }
11323 }
11324
11325 void kvm_arch_commit_memory_region(struct kvm *kvm,
11326                                 const struct kvm_userspace_memory_region *mem,
11327                                 struct kvm_memory_slot *old,
11328                                 const struct kvm_memory_slot *new,
11329                                 enum kvm_mr_change change)
11330 {
11331         if (!kvm->arch.n_requested_mmu_pages)
11332                 kvm_mmu_change_mmu_pages(kvm,
11333                                 kvm_mmu_calculate_default_mmu_pages(kvm));
11334
11335         /*
11336          * FIXME: const-ify all uses of struct kvm_memory_slot.
11337          */
11338         kvm_mmu_slot_apply_flags(kvm, old, (struct kvm_memory_slot *) new, change);
11339
11340         /* Free the arrays associated with the old memslot. */
11341         if (change == KVM_MR_MOVE)
11342                 kvm_arch_free_memslot(kvm, old);
11343 }
11344
11345 void kvm_arch_flush_shadow_all(struct kvm *kvm)
11346 {
11347         kvm_mmu_zap_all(kvm);
11348 }
11349
11350 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
11351                                    struct kvm_memory_slot *slot)
11352 {
11353         kvm_page_track_flush_slot(kvm, slot);
11354 }
11355
11356 static inline bool kvm_guest_apic_has_interrupt(struct kvm_vcpu *vcpu)
11357 {
11358         return (is_guest_mode(vcpu) &&
11359                         kvm_x86_ops.guest_apic_has_interrupt &&
11360                         static_call(kvm_x86_guest_apic_has_interrupt)(vcpu));
11361 }
11362
11363 static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
11364 {
11365         if (!list_empty_careful(&vcpu->async_pf.done))
11366                 return true;
11367
11368         if (kvm_apic_has_events(vcpu))
11369                 return true;
11370
11371         if (vcpu->arch.pv.pv_unhalted)
11372                 return true;
11373
11374         if (vcpu->arch.exception.pending)
11375                 return true;
11376
11377         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
11378             (vcpu->arch.nmi_pending &&
11379              static_call(kvm_x86_nmi_allowed)(vcpu, false)))
11380                 return true;
11381
11382         if (kvm_test_request(KVM_REQ_SMI, vcpu) ||
11383             (vcpu->arch.smi_pending &&
11384              static_call(kvm_x86_smi_allowed)(vcpu, false)))
11385                 return true;
11386
11387         if (kvm_arch_interrupt_allowed(vcpu) &&
11388             (kvm_cpu_has_interrupt(vcpu) ||
11389             kvm_guest_apic_has_interrupt(vcpu)))
11390                 return true;
11391
11392         if (kvm_hv_has_stimer_pending(vcpu))
11393                 return true;
11394
11395         if (is_guest_mode(vcpu) &&
11396             kvm_x86_ops.nested_ops->hv_timer_pending &&
11397             kvm_x86_ops.nested_ops->hv_timer_pending(vcpu))
11398                 return true;
11399
11400         return false;
11401 }
11402
11403 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
11404 {
11405         return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu);
11406 }
11407
11408 bool kvm_arch_dy_has_pending_interrupt(struct kvm_vcpu *vcpu)
11409 {
11410         if (vcpu->arch.apicv_active && static_call(kvm_x86_dy_apicv_has_pending_interrupt)(vcpu))
11411                 return true;
11412
11413         return false;
11414 }
11415
11416 bool kvm_arch_dy_runnable(struct kvm_vcpu *vcpu)
11417 {
11418         if (READ_ONCE(vcpu->arch.pv.pv_unhalted))
11419                 return true;
11420
11421         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
11422                 kvm_test_request(KVM_REQ_SMI, vcpu) ||
11423                  kvm_test_request(KVM_REQ_EVENT, vcpu))
11424                 return true;
11425
11426         return kvm_arch_dy_has_pending_interrupt(vcpu);
11427 }
11428
11429 bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu *vcpu)
11430 {
11431         if (vcpu->arch.guest_state_protected)
11432                 return true;
11433
11434         return vcpu->arch.preempted_in_kernel;
11435 }
11436
11437 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
11438 {
11439         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
11440 }
11441
11442 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
11443 {
11444         return static_call(kvm_x86_interrupt_allowed)(vcpu, false);
11445 }
11446
11447 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
11448 {
11449         /* Can't read the RIP when guest state is protected, just return 0 */
11450         if (vcpu->arch.guest_state_protected)
11451                 return 0;
11452
11453         if (is_64_bit_mode(vcpu))
11454                 return kvm_rip_read(vcpu);
11455         return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
11456                      kvm_rip_read(vcpu));
11457 }
11458 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
11459
11460 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
11461 {
11462         return kvm_get_linear_rip(vcpu) == linear_rip;
11463 }
11464 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
11465
11466 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
11467 {
11468         unsigned long rflags;
11469
11470         rflags = static_call(kvm_x86_get_rflags)(vcpu);
11471         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
11472                 rflags &= ~X86_EFLAGS_TF;
11473         return rflags;
11474 }
11475 EXPORT_SYMBOL_GPL(kvm_get_rflags);
11476
11477 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
11478 {
11479         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
11480             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
11481                 rflags |= X86_EFLAGS_TF;
11482         static_call(kvm_x86_set_rflags)(vcpu, rflags);
11483 }
11484
11485 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
11486 {
11487         __kvm_set_rflags(vcpu, rflags);
11488         kvm_make_request(KVM_REQ_EVENT, vcpu);
11489 }
11490 EXPORT_SYMBOL_GPL(kvm_set_rflags);
11491
11492 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
11493 {
11494         int r;
11495
11496         if ((vcpu->arch.mmu->direct_map != work->arch.direct_map) ||
11497               work->wakeup_all)
11498                 return;
11499
11500         r = kvm_mmu_reload(vcpu);
11501         if (unlikely(r))
11502                 return;
11503
11504         if (!vcpu->arch.mmu->direct_map &&
11505               work->arch.cr3 != vcpu->arch.mmu->get_guest_pgd(vcpu))
11506                 return;
11507
11508         kvm_mmu_do_page_fault(vcpu, work->cr2_or_gpa, 0, true);
11509 }
11510
11511 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
11512 {
11513         BUILD_BUG_ON(!is_power_of_2(ASYNC_PF_PER_VCPU));
11514
11515         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
11516 }
11517
11518 static inline u32 kvm_async_pf_next_probe(u32 key)
11519 {
11520         return (key + 1) & (ASYNC_PF_PER_VCPU - 1);
11521 }
11522
11523 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
11524 {
11525         u32 key = kvm_async_pf_hash_fn(gfn);
11526
11527         while (vcpu->arch.apf.gfns[key] != ~0)
11528                 key = kvm_async_pf_next_probe(key);
11529
11530         vcpu->arch.apf.gfns[key] = gfn;
11531 }
11532
11533 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
11534 {
11535         int i;
11536         u32 key = kvm_async_pf_hash_fn(gfn);
11537
11538         for (i = 0; i < ASYNC_PF_PER_VCPU &&
11539                      (vcpu->arch.apf.gfns[key] != gfn &&
11540                       vcpu->arch.apf.gfns[key] != ~0); i++)
11541                 key = kvm_async_pf_next_probe(key);
11542
11543         return key;
11544 }
11545
11546 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
11547 {
11548         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
11549 }
11550
11551 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
11552 {
11553         u32 i, j, k;
11554
11555         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
11556
11557         if (WARN_ON_ONCE(vcpu->arch.apf.gfns[i] != gfn))
11558                 return;
11559
11560         while (true) {
11561                 vcpu->arch.apf.gfns[i] = ~0;
11562                 do {
11563                         j = kvm_async_pf_next_probe(j);
11564                         if (vcpu->arch.apf.gfns[j] == ~0)
11565                                 return;
11566                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
11567                         /*
11568                          * k lies cyclically in ]i,j]
11569                          * |    i.k.j |
11570                          * |....j i.k.| or  |.k..j i...|
11571                          */
11572                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
11573                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
11574                 i = j;
11575         }
11576 }
11577
11578 static inline int apf_put_user_notpresent(struct kvm_vcpu *vcpu)
11579 {
11580         u32 reason = KVM_PV_REASON_PAGE_NOT_PRESENT;
11581
11582         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &reason,
11583                                       sizeof(reason));
11584 }
11585
11586 static inline int apf_put_user_ready(struct kvm_vcpu *vcpu, u32 token)
11587 {
11588         unsigned int offset = offsetof(struct kvm_vcpu_pv_apf_data, token);
11589
11590         return kvm_write_guest_offset_cached(vcpu->kvm, &vcpu->arch.apf.data,
11591                                              &token, offset, sizeof(token));
11592 }
11593
11594 static inline bool apf_pageready_slot_free(struct kvm_vcpu *vcpu)
11595 {
11596         unsigned int offset = offsetof(struct kvm_vcpu_pv_apf_data, token);
11597         u32 val;
11598
11599         if (kvm_read_guest_offset_cached(vcpu->kvm, &vcpu->arch.apf.data,
11600                                          &val, offset, sizeof(val)))
11601                 return false;
11602
11603         return !val;
11604 }
11605
11606 static bool kvm_can_deliver_async_pf(struct kvm_vcpu *vcpu)
11607 {
11608         if (!vcpu->arch.apf.delivery_as_pf_vmexit && is_guest_mode(vcpu))
11609                 return false;
11610
11611         if (!kvm_pv_async_pf_enabled(vcpu) ||
11612             (vcpu->arch.apf.send_user_only && static_call(kvm_x86_get_cpl)(vcpu) == 0))
11613                 return false;
11614
11615         return true;
11616 }
11617
11618 bool kvm_can_do_async_pf(struct kvm_vcpu *vcpu)
11619 {
11620         if (unlikely(!lapic_in_kernel(vcpu) ||
11621                      kvm_event_needs_reinjection(vcpu) ||
11622                      vcpu->arch.exception.pending))
11623                 return false;
11624
11625         if (kvm_hlt_in_guest(vcpu->kvm) && !kvm_can_deliver_async_pf(vcpu))
11626                 return false;
11627
11628         /*
11629          * If interrupts are off we cannot even use an artificial
11630          * halt state.
11631          */
11632         return kvm_arch_interrupt_allowed(vcpu);
11633 }
11634
11635 bool kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
11636                                      struct kvm_async_pf *work)
11637 {
11638         struct x86_exception fault;
11639
11640         trace_kvm_async_pf_not_present(work->arch.token, work->cr2_or_gpa);
11641         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
11642
11643         if (kvm_can_deliver_async_pf(vcpu) &&
11644             !apf_put_user_notpresent(vcpu)) {
11645                 fault.vector = PF_VECTOR;
11646                 fault.error_code_valid = true;
11647                 fault.error_code = 0;
11648                 fault.nested_page_fault = false;
11649                 fault.address = work->arch.token;
11650                 fault.async_page_fault = true;
11651                 kvm_inject_page_fault(vcpu, &fault);
11652                 return true;
11653         } else {
11654                 /*
11655                  * It is not possible to deliver a paravirtualized asynchronous
11656                  * page fault, but putting the guest in an artificial halt state
11657                  * can be beneficial nevertheless: if an interrupt arrives, we
11658                  * can deliver it timely and perhaps the guest will schedule
11659                  * another process.  When the instruction that triggered a page
11660                  * fault is retried, hopefully the page will be ready in the host.
11661                  */
11662                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
11663                 return false;
11664         }
11665 }
11666
11667 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
11668                                  struct kvm_async_pf *work)
11669 {
11670         struct kvm_lapic_irq irq = {
11671                 .delivery_mode = APIC_DM_FIXED,
11672                 .vector = vcpu->arch.apf.vec
11673         };
11674
11675         if (work->wakeup_all)
11676                 work->arch.token = ~0; /* broadcast wakeup */
11677         else
11678                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
11679         trace_kvm_async_pf_ready(work->arch.token, work->cr2_or_gpa);
11680
11681         if ((work->wakeup_all || work->notpresent_injected) &&
11682             kvm_pv_async_pf_enabled(vcpu) &&
11683             !apf_put_user_ready(vcpu, work->arch.token)) {
11684                 vcpu->arch.apf.pageready_pending = true;
11685                 kvm_apic_set_irq(vcpu, &irq, NULL);
11686         }
11687
11688         vcpu->arch.apf.halted = false;
11689         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
11690 }
11691
11692 void kvm_arch_async_page_present_queued(struct kvm_vcpu *vcpu)
11693 {
11694         kvm_make_request(KVM_REQ_APF_READY, vcpu);
11695         if (!vcpu->arch.apf.pageready_pending)
11696                 kvm_vcpu_kick(vcpu);
11697 }
11698
11699 bool kvm_arch_can_dequeue_async_page_present(struct kvm_vcpu *vcpu)
11700 {
11701         if (!kvm_pv_async_pf_enabled(vcpu))
11702                 return true;
11703         else
11704                 return kvm_lapic_enabled(vcpu) && apf_pageready_slot_free(vcpu);
11705 }
11706
11707 void kvm_arch_start_assignment(struct kvm *kvm)
11708 {
11709         if (atomic_inc_return(&kvm->arch.assigned_device_count) == 1)
11710                 static_call_cond(kvm_x86_start_assignment)(kvm);
11711 }
11712 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
11713
11714 void kvm_arch_end_assignment(struct kvm *kvm)
11715 {
11716         atomic_dec(&kvm->arch.assigned_device_count);
11717 }
11718 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
11719
11720 bool kvm_arch_has_assigned_device(struct kvm *kvm)
11721 {
11722         return atomic_read(&kvm->arch.assigned_device_count);
11723 }
11724 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
11725
11726 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
11727 {
11728         atomic_inc(&kvm->arch.noncoherent_dma_count);
11729 }
11730 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
11731
11732 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
11733 {
11734         atomic_dec(&kvm->arch.noncoherent_dma_count);
11735 }
11736 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
11737
11738 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
11739 {
11740         return atomic_read(&kvm->arch.noncoherent_dma_count);
11741 }
11742 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
11743
11744 bool kvm_arch_has_irq_bypass(void)
11745 {
11746         return true;
11747 }
11748
11749 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
11750                                       struct irq_bypass_producer *prod)
11751 {
11752         struct kvm_kernel_irqfd *irqfd =
11753                 container_of(cons, struct kvm_kernel_irqfd, consumer);
11754         int ret;
11755
11756         irqfd->producer = prod;
11757         kvm_arch_start_assignment(irqfd->kvm);
11758         ret = static_call(kvm_x86_update_pi_irte)(irqfd->kvm,
11759                                          prod->irq, irqfd->gsi, 1);
11760
11761         if (ret)
11762                 kvm_arch_end_assignment(irqfd->kvm);
11763
11764         return ret;
11765 }
11766
11767 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
11768                                       struct irq_bypass_producer *prod)
11769 {
11770         int ret;
11771         struct kvm_kernel_irqfd *irqfd =
11772                 container_of(cons, struct kvm_kernel_irqfd, consumer);
11773
11774         WARN_ON(irqfd->producer != prod);
11775         irqfd->producer = NULL;
11776
11777         /*
11778          * When producer of consumer is unregistered, we change back to
11779          * remapped mode, so we can re-use the current implementation
11780          * when the irq is masked/disabled or the consumer side (KVM
11781          * int this case doesn't want to receive the interrupts.
11782         */
11783         ret = static_call(kvm_x86_update_pi_irte)(irqfd->kvm, prod->irq, irqfd->gsi, 0);
11784         if (ret)
11785                 printk(KERN_INFO "irq bypass consumer (token %p) unregistration"
11786                        " fails: %d\n", irqfd->consumer.token, ret);
11787
11788         kvm_arch_end_assignment(irqfd->kvm);
11789 }
11790
11791 int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
11792                                    uint32_t guest_irq, bool set)
11793 {
11794         return static_call(kvm_x86_update_pi_irte)(kvm, host_irq, guest_irq, set);
11795 }
11796
11797 bool kvm_vector_hashing_enabled(void)
11798 {
11799         return vector_hashing;
11800 }
11801
11802 bool kvm_arch_no_poll(struct kvm_vcpu *vcpu)
11803 {
11804         return (vcpu->arch.msr_kvm_poll_control & 1) == 0;
11805 }
11806 EXPORT_SYMBOL_GPL(kvm_arch_no_poll);
11807
11808
11809 int kvm_spec_ctrl_test_value(u64 value)
11810 {
11811         /*
11812          * test that setting IA32_SPEC_CTRL to given value
11813          * is allowed by the host processor
11814          */
11815
11816         u64 saved_value;
11817         unsigned long flags;
11818         int ret = 0;
11819
11820         local_irq_save(flags);
11821
11822         if (rdmsrl_safe(MSR_IA32_SPEC_CTRL, &saved_value))
11823                 ret = 1;
11824         else if (wrmsrl_safe(MSR_IA32_SPEC_CTRL, value))
11825                 ret = 1;
11826         else
11827                 wrmsrl(MSR_IA32_SPEC_CTRL, saved_value);
11828
11829         local_irq_restore(flags);
11830
11831         return ret;
11832 }
11833 EXPORT_SYMBOL_GPL(kvm_spec_ctrl_test_value);
11834
11835 void kvm_fixup_and_inject_pf_error(struct kvm_vcpu *vcpu, gva_t gva, u16 error_code)
11836 {
11837         struct x86_exception fault;
11838         u32 access = error_code &
11839                 (PFERR_WRITE_MASK | PFERR_FETCH_MASK | PFERR_USER_MASK);
11840
11841         if (!(error_code & PFERR_PRESENT_MASK) ||
11842             vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, &fault) != UNMAPPED_GVA) {
11843                 /*
11844                  * If vcpu->arch.walk_mmu->gva_to_gpa succeeded, the page
11845                  * tables probably do not match the TLB.  Just proceed
11846                  * with the error code that the processor gave.
11847                  */
11848                 fault.vector = PF_VECTOR;
11849                 fault.error_code_valid = true;
11850                 fault.error_code = error_code;
11851                 fault.nested_page_fault = false;
11852                 fault.address = gva;
11853         }
11854         vcpu->arch.walk_mmu->inject_page_fault(vcpu, &fault);
11855 }
11856 EXPORT_SYMBOL_GPL(kvm_fixup_and_inject_pf_error);
11857
11858 /*
11859  * Handles kvm_read/write_guest_virt*() result and either injects #PF or returns
11860  * KVM_EXIT_INTERNAL_ERROR for cases not currently handled by KVM. Return value
11861  * indicates whether exit to userspace is needed.
11862  */
11863 int kvm_handle_memory_failure(struct kvm_vcpu *vcpu, int r,
11864                               struct x86_exception *e)
11865 {
11866         if (r == X86EMUL_PROPAGATE_FAULT) {
11867                 kvm_inject_emulated_page_fault(vcpu, e);
11868                 return 1;
11869         }
11870
11871         /*
11872          * In case kvm_read/write_guest_virt*() failed with X86EMUL_IO_NEEDED
11873          * while handling a VMX instruction KVM could've handled the request
11874          * correctly by exiting to userspace and performing I/O but there
11875          * doesn't seem to be a real use-case behind such requests, just return
11876          * KVM_EXIT_INTERNAL_ERROR for now.
11877          */
11878         vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
11879         vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
11880         vcpu->run->internal.ndata = 0;
11881
11882         return 0;
11883 }
11884 EXPORT_SYMBOL_GPL(kvm_handle_memory_failure);
11885
11886 int kvm_handle_invpcid(struct kvm_vcpu *vcpu, unsigned long type, gva_t gva)
11887 {
11888         bool pcid_enabled;
11889         struct x86_exception e;
11890         unsigned i;
11891         unsigned long roots_to_free = 0;
11892         struct {
11893                 u64 pcid;
11894                 u64 gla;
11895         } operand;
11896         int r;
11897
11898         r = kvm_read_guest_virt(vcpu, gva, &operand, sizeof(operand), &e);
11899         if (r != X86EMUL_CONTINUE)
11900                 return kvm_handle_memory_failure(vcpu, r, &e);
11901
11902         if (operand.pcid >> 12 != 0) {
11903                 kvm_inject_gp(vcpu, 0);
11904                 return 1;
11905         }
11906
11907         pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
11908
11909         switch (type) {
11910         case INVPCID_TYPE_INDIV_ADDR:
11911                 if ((!pcid_enabled && (operand.pcid != 0)) ||
11912                     is_noncanonical_address(operand.gla, vcpu)) {
11913                         kvm_inject_gp(vcpu, 0);
11914                         return 1;
11915                 }
11916                 kvm_mmu_invpcid_gva(vcpu, operand.gla, operand.pcid);
11917                 return kvm_skip_emulated_instruction(vcpu);
11918
11919         case INVPCID_TYPE_SINGLE_CTXT:
11920                 if (!pcid_enabled && (operand.pcid != 0)) {
11921                         kvm_inject_gp(vcpu, 0);
11922                         return 1;
11923                 }
11924
11925                 if (kvm_get_active_pcid(vcpu) == operand.pcid) {
11926                         kvm_mmu_sync_roots(vcpu);
11927                         kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
11928                 }
11929
11930                 for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++)
11931                         if (kvm_get_pcid(vcpu, vcpu->arch.mmu->prev_roots[i].pgd)
11932                             == operand.pcid)
11933                                 roots_to_free |= KVM_MMU_ROOT_PREVIOUS(i);
11934
11935                 kvm_mmu_free_roots(vcpu, vcpu->arch.mmu, roots_to_free);
11936                 /*
11937                  * If neither the current cr3 nor any of the prev_roots use the
11938                  * given PCID, then nothing needs to be done here because a
11939                  * resync will happen anyway before switching to any other CR3.
11940                  */
11941
11942                 return kvm_skip_emulated_instruction(vcpu);
11943
11944         case INVPCID_TYPE_ALL_NON_GLOBAL:
11945                 /*
11946                  * Currently, KVM doesn't mark global entries in the shadow
11947                  * page tables, so a non-global flush just degenerates to a
11948                  * global flush. If needed, we could optimize this later by
11949                  * keeping track of global entries in shadow page tables.
11950                  */
11951
11952                 fallthrough;
11953         case INVPCID_TYPE_ALL_INCL_GLOBAL:
11954                 kvm_make_request(KVM_REQ_MMU_RELOAD, vcpu);
11955                 return kvm_skip_emulated_instruction(vcpu);
11956
11957         default:
11958                 BUG(); /* We have already checked above that type <= 3 */
11959         }
11960 }
11961 EXPORT_SYMBOL_GPL(kvm_handle_invpcid);
11962
11963 static int complete_sev_es_emulated_mmio(struct kvm_vcpu *vcpu)
11964 {
11965         struct kvm_run *run = vcpu->run;
11966         struct kvm_mmio_fragment *frag;
11967         unsigned int len;
11968
11969         BUG_ON(!vcpu->mmio_needed);
11970
11971         /* Complete previous fragment */
11972         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
11973         len = min(8u, frag->len);
11974         if (!vcpu->mmio_is_write)
11975                 memcpy(frag->data, run->mmio.data, len);
11976
11977         if (frag->len <= 8) {
11978                 /* Switch to the next fragment. */
11979                 frag++;
11980                 vcpu->mmio_cur_fragment++;
11981         } else {
11982                 /* Go forward to the next mmio piece. */
11983                 frag->data += len;
11984                 frag->gpa += len;
11985                 frag->len -= len;
11986         }
11987
11988         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
11989                 vcpu->mmio_needed = 0;
11990
11991                 // VMG change, at this point, we're always done
11992                 // RIP has already been advanced
11993                 return 1;
11994         }
11995
11996         // More MMIO is needed
11997         run->mmio.phys_addr = frag->gpa;
11998         run->mmio.len = min(8u, frag->len);
11999         run->mmio.is_write = vcpu->mmio_is_write;
12000         if (run->mmio.is_write)
12001                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
12002         run->exit_reason = KVM_EXIT_MMIO;
12003
12004         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
12005
12006         return 0;
12007 }
12008
12009 int kvm_sev_es_mmio_write(struct kvm_vcpu *vcpu, gpa_t gpa, unsigned int bytes,
12010                           void *data)
12011 {
12012         int handled;
12013         struct kvm_mmio_fragment *frag;
12014
12015         if (!data)
12016                 return -EINVAL;
12017
12018         handled = write_emultor.read_write_mmio(vcpu, gpa, bytes, data);
12019         if (handled == bytes)
12020                 return 1;
12021
12022         bytes -= handled;
12023         gpa += handled;
12024         data += handled;
12025
12026         /*TODO: Check if need to increment number of frags */
12027         frag = vcpu->mmio_fragments;
12028         vcpu->mmio_nr_fragments = 1;
12029         frag->len = bytes;
12030         frag->gpa = gpa;
12031         frag->data = data;
12032
12033         vcpu->mmio_needed = 1;
12034         vcpu->mmio_cur_fragment = 0;
12035
12036         vcpu->run->mmio.phys_addr = gpa;
12037         vcpu->run->mmio.len = min(8u, frag->len);
12038         vcpu->run->mmio.is_write = 1;
12039         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
12040         vcpu->run->exit_reason = KVM_EXIT_MMIO;
12041
12042         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
12043
12044         return 0;
12045 }
12046 EXPORT_SYMBOL_GPL(kvm_sev_es_mmio_write);
12047
12048 int kvm_sev_es_mmio_read(struct kvm_vcpu *vcpu, gpa_t gpa, unsigned int bytes,
12049                          void *data)
12050 {
12051         int handled;
12052         struct kvm_mmio_fragment *frag;
12053
12054         if (!data)
12055                 return -EINVAL;
12056
12057         handled = read_emultor.read_write_mmio(vcpu, gpa, bytes, data);
12058         if (handled == bytes)
12059                 return 1;
12060
12061         bytes -= handled;
12062         gpa += handled;
12063         data += handled;
12064
12065         /*TODO: Check if need to increment number of frags */
12066         frag = vcpu->mmio_fragments;
12067         vcpu->mmio_nr_fragments = 1;
12068         frag->len = bytes;
12069         frag->gpa = gpa;
12070         frag->data = data;
12071
12072         vcpu->mmio_needed = 1;
12073         vcpu->mmio_cur_fragment = 0;
12074
12075         vcpu->run->mmio.phys_addr = gpa;
12076         vcpu->run->mmio.len = min(8u, frag->len);
12077         vcpu->run->mmio.is_write = 0;
12078         vcpu->run->exit_reason = KVM_EXIT_MMIO;
12079
12080         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
12081
12082         return 0;
12083 }
12084 EXPORT_SYMBOL_GPL(kvm_sev_es_mmio_read);
12085
12086 static int complete_sev_es_emulated_ins(struct kvm_vcpu *vcpu)
12087 {
12088         memcpy(vcpu->arch.guest_ins_data, vcpu->arch.pio_data,
12089                vcpu->arch.pio.count * vcpu->arch.pio.size);
12090         vcpu->arch.pio.count = 0;
12091
12092         return 1;
12093 }
12094
12095 static int kvm_sev_es_outs(struct kvm_vcpu *vcpu, unsigned int size,
12096                            unsigned int port, void *data,  unsigned int count)
12097 {
12098         int ret;
12099
12100         ret = emulator_pio_out_emulated(vcpu->arch.emulate_ctxt, size, port,
12101                                         data, count);
12102         if (ret)
12103                 return ret;
12104
12105         vcpu->arch.pio.count = 0;
12106
12107         return 0;
12108 }
12109
12110 static int kvm_sev_es_ins(struct kvm_vcpu *vcpu, unsigned int size,
12111                           unsigned int port, void *data, unsigned int count)
12112 {
12113         int ret;
12114
12115         ret = emulator_pio_in_emulated(vcpu->arch.emulate_ctxt, size, port,
12116                                        data, count);
12117         if (ret) {
12118                 vcpu->arch.pio.count = 0;
12119         } else {
12120                 vcpu->arch.guest_ins_data = data;
12121                 vcpu->arch.complete_userspace_io = complete_sev_es_emulated_ins;
12122         }
12123
12124         return 0;
12125 }
12126
12127 int kvm_sev_es_string_io(struct kvm_vcpu *vcpu, unsigned int size,
12128                          unsigned int port, void *data,  unsigned int count,
12129                          int in)
12130 {
12131         return in ? kvm_sev_es_ins(vcpu, size, port, data, count)
12132                   : kvm_sev_es_outs(vcpu, size, port, data, count);
12133 }
12134 EXPORT_SYMBOL_GPL(kvm_sev_es_string_io);
12135
12136 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_entry);
12137 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
12138 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
12139 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
12140 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
12141 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
12142 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
12143 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
12144 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
12145 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
12146 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
12147 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmenter_failed);
12148 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
12149 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
12150 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
12151 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
12152 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window_update);
12153 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);
12154 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update);
12155 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access);
12156 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi);
12157 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_ga_log);
12158 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_apicv_update_request);
12159 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_enter);
12160 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_exit);
12161 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_msr_protocol_enter);
12162 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_msr_protocol_exit);