arch/x86/kvm/x86.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Kernel-based Virtual Machine driver for Linux
   4  *
   5  * derived from drivers/kvm/kvm_main.c
   6  *
   7  * Copyright (C) 2006 Qumranet, Inc.
   8  * Copyright (C) 2008 Qumranet, Inc.
   9  * Copyright IBM Corporation, 2008
  10  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  11  *
  12  * Authors:
  13  *   Avi Kivity   <avi@qumranet.com>
  14  *   Yaniv Kamay  <yaniv@qumranet.com>
  15  *   Amit Shah    <amit.shah@qumranet.com>
  16  *   Ben-Ami Yassour <benami@il.ibm.com>
  17  */
  18
  19 #include <linux/kvm_host.h>
  20 #include "irq.h"
  21 #include "ioapic.h"
  22 #include "mmu.h"
  23 #include "i8254.h"
  24 #include "tss.h"
  25 #include "kvm_cache_regs.h"
  26 #include "kvm_emulate.h"
  27 #include "x86.h"
  28 #include "cpuid.h"
  29 #include "pmu.h"
  30 #include "hyperv.h"
  31 #include "lapic.h"
  32 #include "xen.h"
  33
  34 #include <linux/clocksource.h>
  35 #include <linux/interrupt.h>
  36 #include <linux/kvm.h>
  37 #include <linux/fs.h>
  38 #include <linux/vmalloc.h>
  39 #include <linux/export.h>
  40 #include <linux/moduleparam.h>
  41 #include <linux/mman.h>
  42 #include <linux/highmem.h>
  43 #include <linux/iommu.h>
  44 #include <linux/intel-iommu.h>
  45 #include <linux/cpufreq.h>
  46 #include <linux/user-return-notifier.h>
  47 #include <linux/srcu.h>
  48 #include <linux/slab.h>
  49 #include <linux/perf_event.h>
  50 #include <linux/uaccess.h>
  51 #include <linux/hash.h>
  52 #include <linux/pci.h>
  53 #include <linux/timekeeper_internal.h>
  54 #include <linux/pvclock_gtod.h>
  55 #include <linux/kvm_irqfd.h>
  56 #include <linux/irqbypass.h>
  57 #include <linux/sched/stat.h>
  58 #include <linux/sched/isolation.h>
  59 #include <linux/mem_encrypt.h>
  60 #include <linux/entry-kvm.h>
  61
  62 #include <trace/events/kvm.h>
  63
  64 #include <asm/debugreg.h>
  65 #include <asm/msr.h>
  66 #include <asm/desc.h>
  67 #include <asm/mce.h>
  68 #include <linux/kernel_stat.h>
  69 #include <asm/fpu/internal.h> /* Ugh! */
  70 #include <asm/pvclock.h>
  71 #include <asm/div64.h>
  72 #include <asm/irq_remapping.h>
  73 #include <asm/mshyperv.h>
  74 #include <asm/hypervisor.h>
  75 #include <asm/tlbflush.h>
  76 #include <asm/intel_pt.h>
  77 #include <asm/emulate_prefix.h>
  78 #include <asm/sgx.h>
  79 #include <clocksource/hyperv_timer.h>
  80
  81 #define CREATE_TRACE_POINTS
  82 #include "trace.h"
  83
  84 #define MAX_IO_MSRS 256
  85 #define KVM_MAX_MCE_BANKS 32
  86 u64 __read_mostly kvm_mce_cap_supported = MCG_CTL_P | MCG_SER_P;
  87 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported);
  88
  89 #define emul_to_vcpu(ctxt) \
  90         ((struct kvm_vcpu *)(ctxt)->vcpu)
  91
  92 /* EFER defaults:
  93  * - enable syscall per default because its emulated by KVM
  94  * - enable LME and LMA per default on 64 bit KVM
  95  */
  96 #ifdef CONFIG_X86_64
  97 static
  98 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  99 #else
 100 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
 101 #endif
 102
 103 static u64 __read_mostly cr4_reserved_bits = CR4_RESERVED_BITS;
 104
 105 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
 106                                     KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
 107
 108 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
 109 static void process_nmi(struct kvm_vcpu *vcpu);
 110 static void process_smi(struct kvm_vcpu *vcpu);
 111 static void enter_smm(struct kvm_vcpu *vcpu);
 112 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
 113 static void store_regs(struct kvm_vcpu *vcpu);
 114 static int sync_regs(struct kvm_vcpu *vcpu);
 115
 116 struct kvm_x86_ops kvm_x86_ops __read_mostly;
 117 EXPORT_SYMBOL_GPL(kvm_x86_ops);
 118
 119 #define KVM_X86_OP(func)                                             \
 120         DEFINE_STATIC_CALL_NULL(kvm_x86_##func,                      \
 121                                 *(((struct kvm_x86_ops *)0)->func));
 122 #define KVM_X86_OP_NULL KVM_X86_OP
 123 #include <asm/kvm-x86-ops.h>
 124 EXPORT_STATIC_CALL_GPL(kvm_x86_get_cs_db_l_bits);
 125 EXPORT_STATIC_CALL_GPL(kvm_x86_cache_reg);
 126 EXPORT_STATIC_CALL_GPL(kvm_x86_tlb_flush_current);
 127
 128 static bool __read_mostly ignore_msrs = 0;
 129 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
 130
 131 bool __read_mostly report_ignored_msrs = true;
 132 module_param(report_ignored_msrs, bool, S_IRUGO | S_IWUSR);
 133 EXPORT_SYMBOL_GPL(report_ignored_msrs);
 134
 135 unsigned int min_timer_period_us = 200;
 136 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
 137
 138 static bool __read_mostly kvmclock_periodic_sync = true;
 139 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
 140
 141 bool __read_mostly kvm_has_tsc_control;
 142 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
 143 u32  __read_mostly kvm_max_guest_tsc_khz;
 144 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 145 u8   __read_mostly kvm_tsc_scaling_ratio_frac_bits;
 146 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits);
 147 u64  __read_mostly kvm_max_tsc_scaling_ratio;
 148 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio);
 149 u64 __read_mostly kvm_default_tsc_scaling_ratio;
 150 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio);
 151 bool __read_mostly kvm_has_bus_lock_exit;
 152 EXPORT_SYMBOL_GPL(kvm_has_bus_lock_exit);
 153
 154 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 155 static u32 __read_mostly tsc_tolerance_ppm = 250;
 156 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 157
 158 /*
 159  * lapic timer advance (tscdeadline mode only) in nanoseconds.  '-1' enables
 160  * adaptive tuning starting from default advancement of 1000ns.  '0' disables
 161  * advancement entirely.  Any other value is used as-is and disables adaptive
 162  * tuning, i.e. allows privileged userspace to set an exact advancement time.
 163  */
 164 static int __read_mostly lapic_timer_advance_ns = -1;
 165 module_param(lapic_timer_advance_ns, int, S_IRUGO | S_IWUSR);
 166
 167 static bool __read_mostly vector_hashing = true;
 168 module_param(vector_hashing, bool, S_IRUGO);
 169
 170 bool __read_mostly enable_vmware_backdoor = false;
 171 module_param(enable_vmware_backdoor, bool, S_IRUGO);
 172 EXPORT_SYMBOL_GPL(enable_vmware_backdoor);
 173
 174 static bool __read_mostly force_emulation_prefix = false;
 175 module_param(force_emulation_prefix, bool, S_IRUGO);
 176
 177 int __read_mostly pi_inject_timer = -1;
 178 module_param(pi_inject_timer, bint, S_IRUGO | S_IWUSR);
 179
 180 /*
 181  * Restoring the host value for MSRs that are only consumed when running in
 182  * usermode, e.g. SYSCALL MSRs and TSC_AUX, can be deferred until the CPU
 183  * returns to userspace, i.e. the kernel can run with the guest's value.
 184  */
 185 #define KVM_MAX_NR_USER_RETURN_MSRS 16
 186
 187 struct kvm_user_return_msrs {
 188         struct user_return_notifier urn;
 189         bool registered;
 190         struct kvm_user_return_msr_values {
 191                 u64 host;
 192                 u64 curr;
 193         } values[KVM_MAX_NR_USER_RETURN_MSRS];
 194 };
 195
 196 u32 __read_mostly kvm_nr_uret_msrs;
 197 EXPORT_SYMBOL_GPL(kvm_nr_uret_msrs);
 198 static u32 __read_mostly kvm_uret_msrs_list[KVM_MAX_NR_USER_RETURN_MSRS];
 199 static struct kvm_user_return_msrs __percpu *user_return_msrs;
 200
 201 #define KVM_SUPPORTED_XCR0     (XFEATURE_MASK_FP | XFEATURE_MASK_SSE \
 202                                 | XFEATURE_MASK_YMM | XFEATURE_MASK_BNDREGS \
 203                                 | XFEATURE_MASK_BNDCSR | XFEATURE_MASK_AVX512 \
 204                                 | XFEATURE_MASK_PKRU)
 205
 206 u64 __read_mostly host_efer;
 207 EXPORT_SYMBOL_GPL(host_efer);
 208
 209 bool __read_mostly allow_smaller_maxphyaddr = 0;
 210 EXPORT_SYMBOL_GPL(allow_smaller_maxphyaddr);
 211
 212 u64 __read_mostly host_xss;
 213 EXPORT_SYMBOL_GPL(host_xss);
 214 u64 __read_mostly supported_xss;
 215 EXPORT_SYMBOL_GPL(supported_xss);
 216
 217 struct kvm_stats_debugfs_item debugfs_entries[] = {
 218         VCPU_STAT("pf_fixed", pf_fixed),
 219         VCPU_STAT("pf_guest", pf_guest),
 220         VCPU_STAT("tlb_flush", tlb_flush),
 221         VCPU_STAT("invlpg", invlpg),
 222         VCPU_STAT("exits", exits),
 223         VCPU_STAT("io_exits", io_exits),
 224         VCPU_STAT("mmio_exits", mmio_exits),
 225         VCPU_STAT("signal_exits", signal_exits),
 226         VCPU_STAT("irq_window", irq_window_exits),
 227         VCPU_STAT("nmi_window", nmi_window_exits),
 228         VCPU_STAT("halt_exits", halt_exits),
 229         VCPU_STAT("halt_successful_poll", halt_successful_poll),
 230         VCPU_STAT("halt_attempted_poll", halt_attempted_poll),
 231         VCPU_STAT("halt_poll_invalid", halt_poll_invalid),
 232         VCPU_STAT("halt_wakeup", halt_wakeup),
 233         VCPU_STAT("hypercalls", hypercalls),
 234         VCPU_STAT("request_irq", request_irq_exits),
 235         VCPU_STAT("irq_exits", irq_exits),
 236         VCPU_STAT("host_state_reload", host_state_reload),
 237         VCPU_STAT("fpu_reload", fpu_reload),
 238         VCPU_STAT("insn_emulation", insn_emulation),
 239         VCPU_STAT("insn_emulation_fail", insn_emulation_fail),
 240         VCPU_STAT("irq_injections", irq_injections),
 241         VCPU_STAT("nmi_injections", nmi_injections),
 242         VCPU_STAT("req_event", req_event),
 243         VCPU_STAT("l1d_flush", l1d_flush),
 244         VCPU_STAT("halt_poll_success_ns", halt_poll_success_ns),
 245         VCPU_STAT("halt_poll_fail_ns", halt_poll_fail_ns),
 246         VCPU_STAT("nested_run", nested_run),
 247         VCPU_STAT("directed_yield_attempted", directed_yield_attempted),
 248         VCPU_STAT("directed_yield_successful", directed_yield_successful),
 249         VM_STAT("mmu_shadow_zapped", mmu_shadow_zapped),
 250         VM_STAT("mmu_pte_write", mmu_pte_write),
 251         VM_STAT("mmu_pde_zapped", mmu_pde_zapped),
 252         VM_STAT("mmu_flooded", mmu_flooded),
 253         VM_STAT("mmu_recycled", mmu_recycled),
 254         VM_STAT("mmu_cache_miss", mmu_cache_miss),
 255         VM_STAT("mmu_unsync", mmu_unsync),
 256         VM_STAT("remote_tlb_flush", remote_tlb_flush),
 257         VM_STAT("largepages", lpages, .mode = 0444),
 258         VM_STAT("nx_largepages_splitted", nx_lpage_splits, .mode = 0444),
 259         VM_STAT("max_mmu_page_hash_collisions", max_mmu_page_hash_collisions),
 260         { NULL }
 261 };
 262
 263 u64 __read_mostly host_xcr0;
 264 u64 __read_mostly supported_xcr0;
 265 EXPORT_SYMBOL_GPL(supported_xcr0);
 266
 267 static struct kmem_cache *x86_fpu_cache;
 268
 269 static struct kmem_cache *x86_emulator_cache;
 270
 271 /*
 272  * When called, it means the previous get/set msr reached an invalid msr.
 273  * Return true if we want to ignore/silent this failed msr access.
 274  */
 275 static bool kvm_msr_ignored_check(u32 msr, u64 data, bool write)
 276 {
 277         const char *op = write ? "wrmsr" : "rdmsr";
 278
 279         if (ignore_msrs) {
 280                 if (report_ignored_msrs)
 281                         kvm_pr_unimpl("ignored %s: 0x%x data 0x%llx\n",
 282                                       op, msr, data);
 283                 /* Mask the error */
 284                 return true;
 285         } else {
 286                 kvm_debug_ratelimited("unhandled %s: 0x%x data 0x%llx\n",
 287                                       op, msr, data);
 288                 return false;
 289         }
 290 }
 291
 292 static struct kmem_cache *kvm_alloc_emulator_cache(void)
 293 {
 294         unsigned int useroffset = offsetof(struct x86_emulate_ctxt, src);
 295         unsigned int size = sizeof(struct x86_emulate_ctxt);
 296
 297         return kmem_cache_create_usercopy("x86_emulator", size,
 298                                           __alignof__(struct x86_emulate_ctxt),
 299                                           SLAB_ACCOUNT, useroffset,
 300                                           size - useroffset, NULL);
 301 }
 302
 303 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 304
 305 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 306 {
 307         int i;
 308         for (i = 0; i < ASYNC_PF_PER_VCPU; i++)
 309                 vcpu->arch.apf.gfns[i] = ~0;
 310 }
 311
 312 static void kvm_on_user_return(struct user_return_notifier *urn)
 313 {
 314         unsigned slot;
 315         struct kvm_user_return_msrs *msrs
 316                 = container_of(urn, struct kvm_user_return_msrs, urn);
 317         struct kvm_user_return_msr_values *values;
 318         unsigned long flags;
 319
 320         /*
 321          * Disabling irqs at this point since the following code could be
 322          * interrupted and executed through kvm_arch_hardware_disable()
 323          */
 324         local_irq_save(flags);
 325         if (msrs->registered) {
 326                 msrs->registered = false;
 327                 user_return_notifier_unregister(urn);
 328         }
 329         local_irq_restore(flags);
 330         for (slot = 0; slot < kvm_nr_uret_msrs; ++slot) {
 331                 values = &msrs->values[slot];
 332                 if (values->host != values->curr) {
 333                         wrmsrl(kvm_uret_msrs_list[slot], values->host);
 334                         values->curr = values->host;
 335                 }
 336         }
 337 }
 338
 339 static int kvm_probe_user_return_msr(u32 msr)
 340 {
 341         u64 val;
 342         int ret;
 343
 344         preempt_disable();
 345         ret = rdmsrl_safe(msr, &val);
 346         if (ret)
 347                 goto out;
 348         ret = wrmsrl_safe(msr, val);
 349 out:
 350         preempt_enable();
 351         return ret;
 352 }
 353
 354 int kvm_add_user_return_msr(u32 msr)
 355 {
 356         BUG_ON(kvm_nr_uret_msrs >= KVM_MAX_NR_USER_RETURN_MSRS);
 357
 358         if (kvm_probe_user_return_msr(msr))
 359                 return -1;
 360
 361         kvm_uret_msrs_list[kvm_nr_uret_msrs] = msr;
 362         return kvm_nr_uret_msrs++;
 363 }
 364 EXPORT_SYMBOL_GPL(kvm_add_user_return_msr);
 365
 366 int kvm_find_user_return_msr(u32 msr)
 367 {
 368         int i;
 369
 370         for (i = 0; i < kvm_nr_uret_msrs; ++i) {
 371                 if (kvm_uret_msrs_list[i] == msr)
 372                         return i;
 373         }
 374         return -1;
 375 }
 376 EXPORT_SYMBOL_GPL(kvm_find_user_return_msr);
 377
 378 static void kvm_user_return_msr_cpu_online(void)
 379 {
 380         unsigned int cpu = smp_processor_id();
 381         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 382         u64 value;
 383         int i;
 384
 385         for (i = 0; i < kvm_nr_uret_msrs; ++i) {
 386                 rdmsrl_safe(kvm_uret_msrs_list[i], &value);
 387                 msrs->values[i].host = value;
 388                 msrs->values[i].curr = value;
 389         }
 390 }
 391
 392 int kvm_set_user_return_msr(unsigned slot, u64 value, u64 mask)
 393 {
 394         unsigned int cpu = smp_processor_id();
 395         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 396         int err;
 397
 398         value = (value & mask) | (msrs->values[slot].host & ~mask);
 399         if (value == msrs->values[slot].curr)
 400                 return 0;
 401         err = wrmsrl_safe(kvm_uret_msrs_list[slot], value);
 402         if (err)
 403                 return 1;
 404
 405         msrs->values[slot].curr = value;
 406         if (!msrs->registered) {
 407                 msrs->urn.on_user_return = kvm_on_user_return;
 408                 user_return_notifier_register(&msrs->urn);
 409                 msrs->registered = true;
 410         }
 411         return 0;
 412 }
 413 EXPORT_SYMBOL_GPL(kvm_set_user_return_msr);
 414
 415 static void drop_user_return_notifiers(void)
 416 {
 417         unsigned int cpu = smp_processor_id();
 418         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 419
 420         if (msrs->registered)
 421                 kvm_on_user_return(&msrs->urn);
 422 }
 423
 424 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 425 {
 426         return vcpu->arch.apic_base;
 427 }
 428 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 429
 430 enum lapic_mode kvm_get_apic_mode(struct kvm_vcpu *vcpu)
 431 {
 432         return kvm_apic_mode(kvm_get_apic_base(vcpu));
 433 }
 434 EXPORT_SYMBOL_GPL(kvm_get_apic_mode);
 435
 436 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 437 {
 438         enum lapic_mode old_mode = kvm_get_apic_mode(vcpu);
 439         enum lapic_mode new_mode = kvm_apic_mode(msr_info->data);
 440         u64 reserved_bits = kvm_vcpu_reserved_gpa_bits_raw(vcpu) | 0x2ff |
 441                 (guest_cpuid_has(vcpu, X86_FEATURE_X2APIC) ? 0 : X2APIC_ENABLE);
 442
 443         if ((msr_info->data & reserved_bits) != 0 || new_mode == LAPIC_MODE_INVALID)
 444                 return 1;
 445         if (!msr_info->host_initiated) {
 446                 if (old_mode == LAPIC_MODE_X2APIC && new_mode == LAPIC_MODE_XAPIC)
 447                         return 1;
 448                 if (old_mode == LAPIC_MODE_DISABLED && new_mode == LAPIC_MODE_X2APIC)
 449                         return 1;
 450         }
 451
 452         kvm_lapic_set_base(vcpu, msr_info->data);
 453         kvm_recalculate_apic_map(vcpu->kvm);
 454         return 0;
 455 }
 456 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 457
 458 asmlinkage __visible noinstr void kvm_spurious_fault(void)
 459 {
 460         /* Fault while not rebooting.  We want the trace. */
 461         BUG_ON(!kvm_rebooting);
 462 }
 463 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 464
 465 #define EXCPT_BENIGN            0
 466 #define EXCPT_CONTRIBUTORY      1
 467 #define EXCPT_PF                2
 468
 469 static int exception_class(int vector)
 470 {
 471         switch (vector) {
 472         case PF_VECTOR:
 473                 return EXCPT_PF;
 474         case DE_VECTOR:
 475         case TS_VECTOR:
 476         case NP_VECTOR:
 477         case SS_VECTOR:
 478         case GP_VECTOR:
 479                 return EXCPT_CONTRIBUTORY;
 480         default:
 481                 break;
 482         }
 483         return EXCPT_BENIGN;
 484 }
 485
 486 #define EXCPT_FAULT             0
 487 #define EXCPT_TRAP              1
 488 #define EXCPT_ABORT             2
 489 #define EXCPT_INTERRUPT         3
 490
 491 static int exception_type(int vector)
 492 {
 493         unsigned int mask;
 494
 495         if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
 496                 return EXCPT_INTERRUPT;
 497
 498         mask = 1 << vector;
 499
 500         /* #DB is trap, as instruction watchpoints are handled elsewhere */
 501         if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
 502                 return EXCPT_TRAP;
 503
 504         if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
 505                 return EXCPT_ABORT;
 506
 507         /* Reserved exceptions will result in fault */
 508         return EXCPT_FAULT;
 509 }
 510
 511 void kvm_deliver_exception_payload(struct kvm_vcpu *vcpu)
 512 {
 513         unsigned nr = vcpu->arch.exception.nr;
 514         bool has_payload = vcpu->arch.exception.has_payload;
 515         unsigned long payload = vcpu->arch.exception.payload;
 516
 517         if (!has_payload)
 518                 return;
 519
 520         switch (nr) {
 521         case DB_VECTOR:
 522                 /*
 523                  * "Certain debug exceptions may clear bit 0-3.  The
 524                  * remaining contents of the DR6 register are never
 525                  * cleared by the processor".
 526                  */
 527                 vcpu->arch.dr6 &= ~DR_TRAP_BITS;
 528                 /*
 529                  * In order to reflect the #DB exception payload in guest
 530                  * dr6, three components need to be considered: active low
 531                  * bit, FIXED_1 bits and active high bits (e.g. DR6_BD,
 532                  * DR6_BS and DR6_BT)
 533                  * DR6_ACTIVE_LOW contains the FIXED_1 and active low bits.
 534                  * In the target guest dr6:
 535                  * FIXED_1 bits should always be set.
 536                  * Active low bits should be cleared if 1-setting in payload.
 537                  * Active high bits should be set if 1-setting in payload.
 538                  *
 539                  * Note, the payload is compatible with the pending debug
 540                  * exceptions/exit qualification under VMX, that active_low bits
 541                  * are active high in payload.
 542                  * So they need to be flipped for DR6.
 543                  */
 544                 vcpu->arch.dr6 |= DR6_ACTIVE_LOW;
 545                 vcpu->arch.dr6 |= payload;
 546                 vcpu->arch.dr6 ^= payload & DR6_ACTIVE_LOW;
 547
 548                 /*
 549                  * The #DB payload is defined as compatible with the 'pending
 550                  * debug exceptions' field under VMX, not DR6. While bit 12 is
 551                  * defined in the 'pending debug exceptions' field (enabled
 552                  * breakpoint), it is reserved and must be zero in DR6.
 553                  */
 554                 vcpu->arch.dr6 &= ~BIT(12);
 555                 break;
 556         case PF_VECTOR:
 557                 vcpu->arch.cr2 = payload;
 558                 break;
 559         }
 560
 561         vcpu->arch.exception.has_payload = false;
 562         vcpu->arch.exception.payload = 0;
 563 }
 564 EXPORT_SYMBOL_GPL(kvm_deliver_exception_payload);
 565
 566 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 567                 unsigned nr, bool has_error, u32 error_code,
 568                 bool has_payload, unsigned long payload, bool reinject)
 569 {
 570         u32 prev_nr;
 571         int class1, class2;
 572
 573         kvm_make_request(KVM_REQ_EVENT, vcpu);
 574
 575         if (!vcpu->arch.exception.pending && !vcpu->arch.exception.injected) {
 576         queue:
 577                 if (reinject) {
 578                         /*
 579                          * On vmentry, vcpu->arch.exception.pending is only
 580                          * true if an event injection was blocked by
 581                          * nested_run_pending.  In that case, however,
 582                          * vcpu_enter_guest requests an immediate exit,
 583                          * and the guest shouldn't proceed far enough to
 584                          * need reinjection.
 585                          */
 586                         WARN_ON_ONCE(vcpu->arch.exception.pending);
 587                         vcpu->arch.exception.injected = true;
 588                         if (WARN_ON_ONCE(has_payload)) {
 589                                 /*
 590                                  * A reinjected event has already
 591                                  * delivered its payload.
 592                                  */
 593                                 has_payload = false;
 594                                 payload = 0;
 595                         }
 596                 } else {
 597                         vcpu->arch.exception.pending = true;
 598                         vcpu->arch.exception.injected = false;
 599                 }
 600                 vcpu->arch.exception.has_error_code = has_error;
 601                 vcpu->arch.exception.nr = nr;
 602                 vcpu->arch.exception.error_code = error_code;
 603                 vcpu->arch.exception.has_payload = has_payload;
 604                 vcpu->arch.exception.payload = payload;
 605                 if (!is_guest_mode(vcpu))
 606                         kvm_deliver_exception_payload(vcpu);
 607                 return;
 608         }
 609
 610         /* to check exception */
 611         prev_nr = vcpu->arch.exception.nr;
 612         if (prev_nr == DF_VECTOR) {
 613                 /* triple fault -> shutdown */
 614                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 615                 return;
 616         }
 617         class1 = exception_class(prev_nr);
 618         class2 = exception_class(nr);
 619         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 620                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 621                 /*
 622                  * Generate double fault per SDM Table 5-5.  Set
 623                  * exception.pending = true so that the double fault
 624                  * can trigger a nested vmexit.
 625                  */
 626                 vcpu->arch.exception.pending = true;
 627                 vcpu->arch.exception.injected = false;
 628                 vcpu->arch.exception.has_error_code = true;
 629                 vcpu->arch.exception.nr = DF_VECTOR;
 630                 vcpu->arch.exception.error_code = 0;
 631                 vcpu->arch.exception.has_payload = false;
 632                 vcpu->arch.exception.payload = 0;
 633         } else
 634                 /* replace previous exception with a new one in a hope
 635                    that instruction re-execution will regenerate lost
 636                    exception */
 637                 goto queue;
 638 }
 639
 640 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 641 {
 642         kvm_multiple_exception(vcpu, nr, false, 0, false, 0, false);
 643 }
 644 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 645
 646 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 647 {
 648         kvm_multiple_exception(vcpu, nr, false, 0, false, 0, true);
 649 }
 650 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 651
 652 void kvm_queue_exception_p(struct kvm_vcpu *vcpu, unsigned nr,
 653                            unsigned long payload)
 654 {
 655         kvm_multiple_exception(vcpu, nr, false, 0, true, payload, false);
 656 }
 657 EXPORT_SYMBOL_GPL(kvm_queue_exception_p);
 658
 659 static void kvm_queue_exception_e_p(struct kvm_vcpu *vcpu, unsigned nr,
 660                                     u32 error_code, unsigned long payload)
 661 {
 662         kvm_multiple_exception(vcpu, nr, true, error_code,
 663                                true, payload, false);
 664 }
 665
 666 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 667 {
 668         if (err)
 669                 kvm_inject_gp(vcpu, 0);
 670         else
 671                 return kvm_skip_emulated_instruction(vcpu);
 672
 673         return 1;
 674 }
 675 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 676
 677 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 678 {
 679         ++vcpu->stat.pf_guest;
 680         vcpu->arch.exception.nested_apf =
 681                 is_guest_mode(vcpu) && fault->async_page_fault;
 682         if (vcpu->arch.exception.nested_apf) {
 683                 vcpu->arch.apf.nested_apf_token = fault->address;
 684                 kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 685         } else {
 686                 kvm_queue_exception_e_p(vcpu, PF_VECTOR, fault->error_code,
 687                                         fault->address);
 688         }
 689 }
 690 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 691
 692 bool kvm_inject_emulated_page_fault(struct kvm_vcpu *vcpu,
 693                                     struct x86_exception *fault)
 694 {
 695         struct kvm_mmu *fault_mmu;
 696         WARN_ON_ONCE(fault->vector != PF_VECTOR);
 697
 698         fault_mmu = fault->nested_page_fault ? vcpu->arch.mmu :
 699                                                vcpu->arch.walk_mmu;
 700
 701         /*
 702          * Invalidate the TLB entry for the faulting address, if it exists,
 703          * else the access will fault indefinitely (and to emulate hardware).
 704          */
 705         if ((fault->error_code & PFERR_PRESENT_MASK) &&
 706             !(fault->error_code & PFERR_RSVD_MASK))
 707                 kvm_mmu_invalidate_gva(vcpu, fault_mmu, fault->address,
 708                                        fault_mmu->root_hpa);
 709
 710         fault_mmu->inject_page_fault(vcpu, fault);
 711         return fault->nested_page_fault;
 712 }
 713 EXPORT_SYMBOL_GPL(kvm_inject_emulated_page_fault);
 714
 715 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 716 {
 717         atomic_inc(&vcpu->arch.nmi_queued);
 718         kvm_make_request(KVM_REQ_NMI, vcpu);
 719 }
 720 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 721
 722 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 723 {
 724         kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, false);
 725 }
 726 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 727
 728 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 729 {
 730         kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, true);
 731 }
 732 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 733
 734 /*
 735  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 736  * a #GP and return false.
 737  */
 738 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 739 {
 740         if (static_call(kvm_x86_get_cpl)(vcpu) <= required_cpl)
 741                 return true;
 742         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 743         return false;
 744 }
 745 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 746
 747 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
 748 {
 749         if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 750                 return true;
 751
 752         kvm_queue_exception(vcpu, UD_VECTOR);
 753         return false;
 754 }
 755 EXPORT_SYMBOL_GPL(kvm_require_dr);
 756
 757 /*
 758  * This function will be used to read from the physical memory of the currently
 759  * running guest. The difference to kvm_vcpu_read_guest_page is that this function
 760  * can read from guest physical or from the guest's guest physical memory.
 761  */
 762 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 763                             gfn_t ngfn, void *data, int offset, int len,
 764                             u32 access)
 765 {
 766         struct x86_exception exception;
 767         gfn_t real_gfn;
 768         gpa_t ngpa;
 769
 770         ngpa     = gfn_to_gpa(ngfn);
 771         real_gfn = mmu->translate_gpa(vcpu, ngpa, access, &exception);
 772         if (real_gfn == UNMAPPED_GVA)
 773                 return -EFAULT;
 774
 775         real_gfn = gpa_to_gfn(real_gfn);
 776
 777         return kvm_vcpu_read_guest_page(vcpu, real_gfn, data, offset, len);
 778 }
 779 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 780
 781 static int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 782                                void *data, int offset, int len, u32 access)
 783 {
 784         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 785                                        data, offset, len, access);
 786 }
 787
 788 static inline u64 pdptr_rsvd_bits(struct kvm_vcpu *vcpu)
 789 {
 790         return vcpu->arch.reserved_gpa_bits | rsvd_bits(5, 8) | rsvd_bits(1, 2);
 791 }
 792
 793 /*
 794  * Load the pae pdptrs.  Return 1 if they are all valid, 0 otherwise.
 795  */
 796 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 797 {
 798         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 799         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 800         int i;
 801         int ret;
 802         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 803
 804         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 805                                       offset * sizeof(u64), sizeof(pdpte),
 806                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 807         if (ret < 0) {
 808                 ret = 0;
 809                 goto out;
 810         }
 811         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 812                 if ((pdpte[i] & PT_PRESENT_MASK) &&
 813                     (pdpte[i] & pdptr_rsvd_bits(vcpu))) {
 814                         ret = 0;
 815                         goto out;
 816                 }
 817         }
 818         ret = 1;
 819
 820         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 821         kvm_register_mark_dirty(vcpu, VCPU_EXREG_PDPTR);
 822
 823 out:
 824
 825         return ret;
 826 }
 827 EXPORT_SYMBOL_GPL(load_pdptrs);
 828
 829 bool pdptrs_changed(struct kvm_vcpu *vcpu)
 830 {
 831         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 832         int offset;
 833         gfn_t gfn;
 834         int r;
 835
 836         if (!is_pae_paging(vcpu))
 837                 return false;
 838
 839         if (!kvm_register_is_available(vcpu, VCPU_EXREG_PDPTR))
 840                 return true;
 841
 842         gfn = (kvm_read_cr3(vcpu) & 0xffffffe0ul) >> PAGE_SHIFT;
 843         offset = (kvm_read_cr3(vcpu) & 0xffffffe0ul) & (PAGE_SIZE - 1);
 844         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 845                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 846         if (r < 0)
 847                 return true;
 848
 849         return memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 850 }
 851 EXPORT_SYMBOL_GPL(pdptrs_changed);
 852
 853 void kvm_post_set_cr0(struct kvm_vcpu *vcpu, unsigned long old_cr0, unsigned long cr0)
 854 {
 855         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP;
 856
 857         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 858                 kvm_clear_async_pf_completion_queue(vcpu);
 859                 kvm_async_pf_hash_reset(vcpu);
 860         }
 861
 862         if ((cr0 ^ old_cr0) & update_bits)
 863                 kvm_mmu_reset_context(vcpu);
 864
 865         if (((cr0 ^ old_cr0) & X86_CR0_CD) &&
 866             kvm_arch_has_noncoherent_dma(vcpu->kvm) &&
 867             !kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
 868                 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
 869 }
 870 EXPORT_SYMBOL_GPL(kvm_post_set_cr0);
 871
 872 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 873 {
 874         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 875         unsigned long pdptr_bits = X86_CR0_CD | X86_CR0_NW | X86_CR0_PG;
 876
 877         cr0 |= X86_CR0_ET;
 878
 879 #ifdef CONFIG_X86_64
 880         if (cr0 & 0xffffffff00000000UL)
 881                 return 1;
 882 #endif
 883
 884         cr0 &= ~CR0_RESERVED_BITS;
 885
 886         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 887                 return 1;
 888
 889         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 890                 return 1;
 891
 892 #ifdef CONFIG_X86_64
 893         if ((vcpu->arch.efer & EFER_LME) && !is_paging(vcpu) &&
 894             (cr0 & X86_CR0_PG)) {
 895                 int cs_db, cs_l;
 896
 897                 if (!is_pae(vcpu))
 898                         return 1;
 899                 static_call(kvm_x86_get_cs_db_l_bits)(vcpu, &cs_db, &cs_l);
 900                 if (cs_l)
 901                         return 1;
 902         }
 903 #endif
 904         if (!(vcpu->arch.efer & EFER_LME) && (cr0 & X86_CR0_PG) &&
 905             is_pae(vcpu) && ((cr0 ^ old_cr0) & pdptr_bits) &&
 906             !load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu)))
 907                 return 1;
 908
 909         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
 910                 return 1;
 911
 912         static_call(kvm_x86_set_cr0)(vcpu, cr0);
 913
 914         kvm_post_set_cr0(vcpu, old_cr0, cr0);
 915
 916         return 0;
 917 }
 918 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 919
 920 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 921 {
 922         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 923 }
 924 EXPORT_SYMBOL_GPL(kvm_lmsw);
 925
 926 void kvm_load_guest_xsave_state(struct kvm_vcpu *vcpu)
 927 {
 928         if (vcpu->arch.guest_state_protected)
 929                 return;
 930
 931         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE)) {
 932
 933                 if (vcpu->arch.xcr0 != host_xcr0)
 934                         xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 935
 936                 if (vcpu->arch.xsaves_enabled &&
 937                     vcpu->arch.ia32_xss != host_xss)
 938                         wrmsrl(MSR_IA32_XSS, vcpu->arch.ia32_xss);
 939         }
 940
 941         if (static_cpu_has(X86_FEATURE_PKU) &&
 942             (kvm_read_cr4_bits(vcpu, X86_CR4_PKE) ||
 943              (vcpu->arch.xcr0 & XFEATURE_MASK_PKRU)) &&
 944             vcpu->arch.pkru != vcpu->arch.host_pkru)
 945                 __write_pkru(vcpu->arch.pkru);
 946 }
 947 EXPORT_SYMBOL_GPL(kvm_load_guest_xsave_state);
 948
 949 void kvm_load_host_xsave_state(struct kvm_vcpu *vcpu)
 950 {
 951         if (vcpu->arch.guest_state_protected)
 952                 return;
 953
 954         if (static_cpu_has(X86_FEATURE_PKU) &&
 955             (kvm_read_cr4_bits(vcpu, X86_CR4_PKE) ||
 956              (vcpu->arch.xcr0 & XFEATURE_MASK_PKRU))) {
 957                 vcpu->arch.pkru = rdpkru();
 958                 if (vcpu->arch.pkru != vcpu->arch.host_pkru)
 959                         __write_pkru(vcpu->arch.host_pkru);
 960         }
 961
 962         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE)) {
 963
 964                 if (vcpu->arch.xcr0 != host_xcr0)
 965                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
 966
 967                 if (vcpu->arch.xsaves_enabled &&
 968                     vcpu->arch.ia32_xss != host_xss)
 969                         wrmsrl(MSR_IA32_XSS, host_xss);
 970         }
 971
 972 }
 973 EXPORT_SYMBOL_GPL(kvm_load_host_xsave_state);
 974
 975 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 976 {
 977         u64 xcr0 = xcr;
 978         u64 old_xcr0 = vcpu->arch.xcr0;
 979         u64 valid_bits;
 980
 981         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 982         if (index != XCR_XFEATURE_ENABLED_MASK)
 983                 return 1;
 984         if (!(xcr0 & XFEATURE_MASK_FP))
 985                 return 1;
 986         if ((xcr0 & XFEATURE_MASK_YMM) && !(xcr0 & XFEATURE_MASK_SSE))
 987                 return 1;
 988
 989         /*
 990          * Do not allow the guest to set bits that we do not support
 991          * saving.  However, xcr0 bit 0 is always set, even if the
 992          * emulated CPU does not support XSAVE (see fx_init).
 993          */
 994         valid_bits = vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FP;
 995         if (xcr0 & ~valid_bits)
 996                 return 1;
 997
 998         if ((!(xcr0 & XFEATURE_MASK_BNDREGS)) !=
 999             (!(xcr0 & XFEATURE_MASK_BNDCSR)))
1000                 return 1;
1001
1002         if (xcr0 & XFEATURE_MASK_AVX512) {
1003                 if (!(xcr0 & XFEATURE_MASK_YMM))
1004                         return 1;
1005                 if ((xcr0 & XFEATURE_MASK_AVX512) != XFEATURE_MASK_AVX512)
1006                         return 1;
1007         }
1008         vcpu->arch.xcr0 = xcr0;
1009
1010         if ((xcr0 ^ old_xcr0) & XFEATURE_MASK_EXTEND)
1011                 kvm_update_cpuid_runtime(vcpu);
1012         return 0;
1013 }
1014
1015 int kvm_emulate_xsetbv(struct kvm_vcpu *vcpu)
1016 {
1017         if (static_call(kvm_x86_get_cpl)(vcpu) != 0 ||
1018             __kvm_set_xcr(vcpu, kvm_rcx_read(vcpu), kvm_read_edx_eax(vcpu))) {
1019                 kvm_inject_gp(vcpu, 0);
1020                 return 1;
1021         }
1022
1023         return kvm_skip_emulated_instruction(vcpu);
1024 }
1025 EXPORT_SYMBOL_GPL(kvm_emulate_xsetbv);
1026
1027 bool kvm_is_valid_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
1028 {
1029         if (cr4 & cr4_reserved_bits)
1030                 return false;
1031
1032         if (cr4 & vcpu->arch.cr4_guest_rsvd_bits)
1033                 return false;
1034
1035         return static_call(kvm_x86_is_valid_cr4)(vcpu, cr4);
1036 }
1037 EXPORT_SYMBOL_GPL(kvm_is_valid_cr4);
1038
1039 void kvm_post_set_cr4(struct kvm_vcpu *vcpu, unsigned long old_cr4, unsigned long cr4)
1040 {
1041         unsigned long mmu_role_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
1042                                       X86_CR4_SMEP | X86_CR4_SMAP | X86_CR4_PKE;
1043
1044         if (((cr4 ^ old_cr4) & mmu_role_bits) ||
1045             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
1046                 kvm_mmu_reset_context(vcpu);
1047 }
1048 EXPORT_SYMBOL_GPL(kvm_post_set_cr4);
1049
1050 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
1051 {
1052         unsigned long old_cr4 = kvm_read_cr4(vcpu);
1053         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
1054                                    X86_CR4_SMEP;
1055
1056         if (!kvm_is_valid_cr4(vcpu, cr4))
1057                 return 1;
1058
1059         if (is_long_mode(vcpu)) {
1060                 if (!(cr4 & X86_CR4_PAE))
1061                         return 1;
1062                 if ((cr4 ^ old_cr4) & X86_CR4_LA57)
1063                         return 1;
1064         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
1065                    && ((cr4 ^ old_cr4) & pdptr_bits)
1066                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
1067                                    kvm_read_cr3(vcpu)))
1068                 return 1;
1069
1070         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
1071                 if (!guest_cpuid_has(vcpu, X86_FEATURE_PCID))
1072                         return 1;
1073
1074                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
1075                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
1076                         return 1;
1077         }
1078
1079         static_call(kvm_x86_set_cr4)(vcpu, cr4);
1080
1081         kvm_post_set_cr4(vcpu, old_cr4, cr4);
1082
1083         return 0;
1084 }
1085 EXPORT_SYMBOL_GPL(kvm_set_cr4);
1086
1087 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
1088 {
1089         bool skip_tlb_flush = false;
1090 #ifdef CONFIG_X86_64
1091         bool pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
1092
1093         if (pcid_enabled) {
1094                 skip_tlb_flush = cr3 & X86_CR3_PCID_NOFLUSH;
1095                 cr3 &= ~X86_CR3_PCID_NOFLUSH;
1096         }
1097 #endif
1098
1099         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
1100                 if (!skip_tlb_flush) {
1101                         kvm_mmu_sync_roots(vcpu);
1102                         kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
1103                 }
1104                 return 0;
1105         }
1106
1107         /*
1108          * Do not condition the GPA check on long mode, this helper is used to
1109          * stuff CR3, e.g. for RSM emulation, and there is no guarantee that
1110          * the current vCPU mode is accurate.
1111          */
1112         if (kvm_vcpu_is_illegal_gpa(vcpu, cr3))
1113                 return 1;
1114
1115         if (is_pae_paging(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
1116                 return 1;
1117
1118         kvm_mmu_new_pgd(vcpu, cr3, skip_tlb_flush, skip_tlb_flush);
1119         vcpu->arch.cr3 = cr3;
1120         kvm_register_mark_available(vcpu, VCPU_EXREG_CR3);
1121
1122         return 0;
1123 }
1124 EXPORT_SYMBOL_GPL(kvm_set_cr3);
1125
1126 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
1127 {
1128         if (cr8 & CR8_RESERVED_BITS)
1129                 return 1;
1130         if (lapic_in_kernel(vcpu))
1131                 kvm_lapic_set_tpr(vcpu, cr8);
1132         else
1133                 vcpu->arch.cr8 = cr8;
1134         return 0;
1135 }
1136 EXPORT_SYMBOL_GPL(kvm_set_cr8);
1137
1138 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
1139 {
1140         if (lapic_in_kernel(vcpu))
1141                 return kvm_lapic_get_cr8(vcpu);
1142         else
1143                 return vcpu->arch.cr8;
1144 }
1145 EXPORT_SYMBOL_GPL(kvm_get_cr8);
1146
1147 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
1148 {
1149         int i;
1150
1151         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
1152                 for (i = 0; i < KVM_NR_DB_REGS; i++)
1153                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
1154                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_RELOAD;
1155         }
1156 }
1157
1158 void kvm_update_dr7(struct kvm_vcpu *vcpu)
1159 {
1160         unsigned long dr7;
1161
1162         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
1163                 dr7 = vcpu->arch.guest_debug_dr7;
1164         else
1165                 dr7 = vcpu->arch.dr7;
1166         static_call(kvm_x86_set_dr7)(vcpu, dr7);
1167         vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
1168         if (dr7 & DR7_BP_EN_MASK)
1169                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
1170 }
1171 EXPORT_SYMBOL_GPL(kvm_update_dr7);
1172
1173 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
1174 {
1175         u64 fixed = DR6_FIXED_1;
1176
1177         if (!guest_cpuid_has(vcpu, X86_FEATURE_RTM))
1178                 fixed |= DR6_RTM;
1179
1180         if (!guest_cpuid_has(vcpu, X86_FEATURE_BUS_LOCK_DETECT))
1181                 fixed |= DR6_BUS_LOCK;
1182         return fixed;
1183 }
1184
1185 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
1186 {
1187         size_t size = ARRAY_SIZE(vcpu->arch.db);
1188
1189         switch (dr) {
1190         case 0 ... 3:
1191                 vcpu->arch.db[array_index_nospec(dr, size)] = val;
1192                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
1193                         vcpu->arch.eff_db[dr] = val;
1194                 break;
1195         case 4:
1196         case 6:
1197                 if (!kvm_dr6_valid(val))
1198                         return 1; /* #GP */
1199                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
1200                 break;
1201         case 5:
1202         default: /* 7 */
1203                 if (!kvm_dr7_valid(val))
1204                         return 1; /* #GP */
1205                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
1206                 kvm_update_dr7(vcpu);
1207                 break;
1208         }
1209
1210         return 0;
1211 }
1212 EXPORT_SYMBOL_GPL(kvm_set_dr);
1213
1214 void kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
1215 {
1216         size_t size = ARRAY_SIZE(vcpu->arch.db);
1217
1218         switch (dr) {
1219         case 0 ... 3:
1220                 *val = vcpu->arch.db[array_index_nospec(dr, size)];
1221                 break;
1222         case 4:
1223         case 6:
1224                 *val = vcpu->arch.dr6;
1225                 break;
1226         case 5:
1227         default: /* 7 */
1228                 *val = vcpu->arch.dr7;
1229                 break;
1230         }
1231 }
1232 EXPORT_SYMBOL_GPL(kvm_get_dr);
1233
1234 int kvm_emulate_rdpmc(struct kvm_vcpu *vcpu)
1235 {
1236         u32 ecx = kvm_rcx_read(vcpu);
1237         u64 data;
1238
1239         if (kvm_pmu_rdpmc(vcpu, ecx, &data)) {
1240                 kvm_inject_gp(vcpu, 0);
1241                 return 1;
1242         }
1243
1244         kvm_rax_write(vcpu, (u32)data);
1245         kvm_rdx_write(vcpu, data >> 32);
1246         return kvm_skip_emulated_instruction(vcpu);
1247 }
1248 EXPORT_SYMBOL_GPL(kvm_emulate_rdpmc);
1249
1250 /*
1251  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
1252  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
1253  *
1254  * The three MSR lists(msrs_to_save, emulated_msrs, msr_based_features)
1255  * extract the supported MSRs from the related const lists.
1256  * msrs_to_save is selected from the msrs_to_save_all to reflect the
1257  * capabilities of the host cpu. This capabilities test skips MSRs that are
1258  * kvm-specific. Those are put in emulated_msrs_all; filtering of emulated_msrs
1259  * may depend on host virtualization features rather than host cpu features.
1260  */
1261
1262 static const u32 msrs_to_save_all[] = {
1263         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
1264         MSR_STAR,
1265 #ifdef CONFIG_X86_64
1266         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
1267 #endif
1268         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
1269         MSR_IA32_FEAT_CTL, MSR_IA32_BNDCFGS, MSR_TSC_AUX,
1270         MSR_IA32_SPEC_CTRL,
1271         MSR_IA32_RTIT_CTL, MSR_IA32_RTIT_STATUS, MSR_IA32_RTIT_CR3_MATCH,
1272         MSR_IA32_RTIT_OUTPUT_BASE, MSR_IA32_RTIT_OUTPUT_MASK,
1273         MSR_IA32_RTIT_ADDR0_A, MSR_IA32_RTIT_ADDR0_B,
1274         MSR_IA32_RTIT_ADDR1_A, MSR_IA32_RTIT_ADDR1_B,
1275         MSR_IA32_RTIT_ADDR2_A, MSR_IA32_RTIT_ADDR2_B,
1276         MSR_IA32_RTIT_ADDR3_A, MSR_IA32_RTIT_ADDR3_B,
1277         MSR_IA32_UMWAIT_CONTROL,
1278
1279         MSR_ARCH_PERFMON_FIXED_CTR0, MSR_ARCH_PERFMON_FIXED_CTR1,
1280         MSR_ARCH_PERFMON_FIXED_CTR0 + 2, MSR_ARCH_PERFMON_FIXED_CTR0 + 3,
1281         MSR_CORE_PERF_FIXED_CTR_CTRL, MSR_CORE_PERF_GLOBAL_STATUS,
1282         MSR_CORE_PERF_GLOBAL_CTRL, MSR_CORE_PERF_GLOBAL_OVF_CTRL,
1283         MSR_ARCH_PERFMON_PERFCTR0, MSR_ARCH_PERFMON_PERFCTR1,
1284         MSR_ARCH_PERFMON_PERFCTR0 + 2, MSR_ARCH_PERFMON_PERFCTR0 + 3,
1285         MSR_ARCH_PERFMON_PERFCTR0 + 4, MSR_ARCH_PERFMON_PERFCTR0 + 5,
1286         MSR_ARCH_PERFMON_PERFCTR0 + 6, MSR_ARCH_PERFMON_PERFCTR0 + 7,
1287         MSR_ARCH_PERFMON_PERFCTR0 + 8, MSR_ARCH_PERFMON_PERFCTR0 + 9,
1288         MSR_ARCH_PERFMON_PERFCTR0 + 10, MSR_ARCH_PERFMON_PERFCTR0 + 11,
1289         MSR_ARCH_PERFMON_PERFCTR0 + 12, MSR_ARCH_PERFMON_PERFCTR0 + 13,
1290         MSR_ARCH_PERFMON_PERFCTR0 + 14, MSR_ARCH_PERFMON_PERFCTR0 + 15,
1291         MSR_ARCH_PERFMON_PERFCTR0 + 16, MSR_ARCH_PERFMON_PERFCTR0 + 17,
1292         MSR_ARCH_PERFMON_EVENTSEL0, MSR_ARCH_PERFMON_EVENTSEL1,
1293         MSR_ARCH_PERFMON_EVENTSEL0 + 2, MSR_ARCH_PERFMON_EVENTSEL0 + 3,
1294         MSR_ARCH_PERFMON_EVENTSEL0 + 4, MSR_ARCH_PERFMON_EVENTSEL0 + 5,
1295         MSR_ARCH_PERFMON_EVENTSEL0 + 6, MSR_ARCH_PERFMON_EVENTSEL0 + 7,
1296         MSR_ARCH_PERFMON_EVENTSEL0 + 8, MSR_ARCH_PERFMON_EVENTSEL0 + 9,
1297         MSR_ARCH_PERFMON_EVENTSEL0 + 10, MSR_ARCH_PERFMON_EVENTSEL0 + 11,
1298         MSR_ARCH_PERFMON_EVENTSEL0 + 12, MSR_ARCH_PERFMON_EVENTSEL0 + 13,
1299         MSR_ARCH_PERFMON_EVENTSEL0 + 14, MSR_ARCH_PERFMON_EVENTSEL0 + 15,
1300         MSR_ARCH_PERFMON_EVENTSEL0 + 16, MSR_ARCH_PERFMON_EVENTSEL0 + 17,
1301 };
1302
1303 static u32 msrs_to_save[ARRAY_SIZE(msrs_to_save_all)];
1304 static unsigned num_msrs_to_save;
1305
1306 static const u32 emulated_msrs_all[] = {
1307         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
1308         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
1309         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
1310         HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
1311         HV_X64_MSR_TSC_FREQUENCY, HV_X64_MSR_APIC_FREQUENCY,
1312         HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
1313         HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
1314         HV_X64_MSR_RESET,
1315         HV_X64_MSR_VP_INDEX,
1316         HV_X64_MSR_VP_RUNTIME,
1317         HV_X64_MSR_SCONTROL,
1318         HV_X64_MSR_STIMER0_CONFIG,
1319         HV_X64_MSR_VP_ASSIST_PAGE,
1320         HV_X64_MSR_REENLIGHTENMENT_CONTROL, HV_X64_MSR_TSC_EMULATION_CONTROL,
1321         HV_X64_MSR_TSC_EMULATION_STATUS,
1322         HV_X64_MSR_SYNDBG_OPTIONS,
1323         HV_X64_MSR_SYNDBG_CONTROL, HV_X64_MSR_SYNDBG_STATUS,
1324         HV_X64_MSR_SYNDBG_SEND_BUFFER, HV_X64_MSR_SYNDBG_RECV_BUFFER,
1325         HV_X64_MSR_SYNDBG_PENDING_BUFFER,
1326
1327         MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
1328         MSR_KVM_PV_EOI_EN, MSR_KVM_ASYNC_PF_INT, MSR_KVM_ASYNC_PF_ACK,
1329
1330         MSR_IA32_TSC_ADJUST,
1331         MSR_IA32_TSC_DEADLINE,
1332         MSR_IA32_ARCH_CAPABILITIES,
1333         MSR_IA32_PERF_CAPABILITIES,
1334         MSR_IA32_MISC_ENABLE,
1335         MSR_IA32_MCG_STATUS,
1336         MSR_IA32_MCG_CTL,
1337         MSR_IA32_MCG_EXT_CTL,
1338         MSR_IA32_SMBASE,
1339         MSR_SMI_COUNT,
1340         MSR_PLATFORM_INFO,
1341         MSR_MISC_FEATURES_ENABLES,
1342         MSR_AMD64_VIRT_SPEC_CTRL,
1343         MSR_IA32_POWER_CTL,
1344         MSR_IA32_UCODE_REV,
1345
1346         /*
1347          * The following list leaves out MSRs whose values are determined
1348          * by arch/x86/kvm/vmx/nested.c based on CPUID or other MSRs.
1349          * We always support the "true" VMX control MSRs, even if the host
1350          * processor does not, so I am putting these registers here rather
1351          * than in msrs_to_save_all.
1352          */
1353         MSR_IA32_VMX_BASIC,
1354         MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1355         MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1356         MSR_IA32_VMX_TRUE_EXIT_CTLS,
1357         MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1358         MSR_IA32_VMX_MISC,
1359         MSR_IA32_VMX_CR0_FIXED0,
1360         MSR_IA32_VMX_CR4_FIXED0,
1361         MSR_IA32_VMX_VMCS_ENUM,
1362         MSR_IA32_VMX_PROCBASED_CTLS2,
1363         MSR_IA32_VMX_EPT_VPID_CAP,
1364         MSR_IA32_VMX_VMFUNC,
1365
1366         MSR_K7_HWCR,
1367         MSR_KVM_POLL_CONTROL,
1368 };
1369
1370 static u32 emulated_msrs[ARRAY_SIZE(emulated_msrs_all)];
1371 static unsigned num_emulated_msrs;
1372
1373 /*
1374  * List of msr numbers which are used to expose MSR-based features that
1375  * can be used by a hypervisor to validate requested CPU features.
1376  */
1377 static const u32 msr_based_features_all[] = {
1378         MSR_IA32_VMX_BASIC,
1379         MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1380         MSR_IA32_VMX_PINBASED_CTLS,
1381         MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1382         MSR_IA32_VMX_PROCBASED_CTLS,
1383         MSR_IA32_VMX_TRUE_EXIT_CTLS,
1384         MSR_IA32_VMX_EXIT_CTLS,
1385         MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1386         MSR_IA32_VMX_ENTRY_CTLS,
1387         MSR_IA32_VMX_MISC,
1388         MSR_IA32_VMX_CR0_FIXED0,
1389         MSR_IA32_VMX_CR0_FIXED1,
1390         MSR_IA32_VMX_CR4_FIXED0,
1391         MSR_IA32_VMX_CR4_FIXED1,
1392         MSR_IA32_VMX_VMCS_ENUM,
1393         MSR_IA32_VMX_PROCBASED_CTLS2,
1394         MSR_IA32_VMX_EPT_VPID_CAP,
1395         MSR_IA32_VMX_VMFUNC,
1396
1397         MSR_F10H_DECFG,
1398         MSR_IA32_UCODE_REV,
1399         MSR_IA32_ARCH_CAPABILITIES,
1400         MSR_IA32_PERF_CAPABILITIES,
1401 };
1402
1403 static u32 msr_based_features[ARRAY_SIZE(msr_based_features_all)];
1404 static unsigned int num_msr_based_features;
1405
1406 static u64 kvm_get_arch_capabilities(void)
1407 {
1408         u64 data = 0;
1409
1410         if (boot_cpu_has(X86_FEATURE_ARCH_CAPABILITIES))
1411                 rdmsrl(MSR_IA32_ARCH_CAPABILITIES, data);
1412
1413         /*
1414          * If nx_huge_pages is enabled, KVM's shadow paging will ensure that
1415          * the nested hypervisor runs with NX huge pages.  If it is not,
1416          * L1 is anyway vulnerable to ITLB_MULTIHIT exploits from other
1417          * L1 guests, so it need not worry about its own (L2) guests.
1418          */
1419         data |= ARCH_CAP_PSCHANGE_MC_NO;
1420
1421         /*
1422          * If we're doing cache flushes (either "always" or "cond")
1423          * we will do one whenever the guest does a vmlaunch/vmresume.
1424          * If an outer hypervisor is doing the cache flush for us
1425          * (VMENTER_L1D_FLUSH_NESTED_VM), we can safely pass that
1426          * capability to the guest too, and if EPT is disabled we're not
1427          * vulnerable.  Overall, only VMENTER_L1D_FLUSH_NEVER will
1428          * require a nested hypervisor to do a flush of its own.
1429          */
1430         if (l1tf_vmx_mitigation != VMENTER_L1D_FLUSH_NEVER)
1431                 data |= ARCH_CAP_SKIP_VMENTRY_L1DFLUSH;
1432
1433         if (!boot_cpu_has_bug(X86_BUG_CPU_MELTDOWN))
1434                 data |= ARCH_CAP_RDCL_NO;
1435         if (!boot_cpu_has_bug(X86_BUG_SPEC_STORE_BYPASS))
1436                 data |= ARCH_CAP_SSB_NO;
1437         if (!boot_cpu_has_bug(X86_BUG_MDS))
1438                 data |= ARCH_CAP_MDS_NO;
1439
1440         if (!boot_cpu_has(X86_FEATURE_RTM)) {
1441                 /*
1442                  * If RTM=0 because the kernel has disabled TSX, the host might
1443                  * have TAA_NO or TSX_CTRL.  Clear TAA_NO (the guest sees RTM=0
1444                  * and therefore knows that there cannot be TAA) but keep
1445                  * TSX_CTRL: some buggy userspaces leave it set on tsx=on hosts,
1446                  * and we want to allow migrating those guests to tsx=off hosts.
1447                  */
1448                 data &= ~ARCH_CAP_TAA_NO;
1449         } else if (!boot_cpu_has_bug(X86_BUG_TAA)) {
1450                 data |= ARCH_CAP_TAA_NO;
1451         } else {
1452                 /*
1453                  * Nothing to do here; we emulate TSX_CTRL if present on the
1454                  * host so the guest can choose between disabling TSX or
1455                  * using VERW to clear CPU buffers.
1456                  */
1457         }
1458
1459         return data;
1460 }
1461
1462 static int kvm_get_msr_feature(struct kvm_msr_entry *msr)
1463 {
1464         switch (msr->index) {
1465         case MSR_IA32_ARCH_CAPABILITIES:
1466                 msr->data = kvm_get_arch_capabilities();
1467                 break;
1468         case MSR_IA32_UCODE_REV:
1469                 rdmsrl_safe(msr->index, &msr->data);
1470                 break;
1471         default:
1472                 return static_call(kvm_x86_get_msr_feature)(msr);
1473         }
1474         return 0;
1475 }
1476
1477 static int do_get_msr_feature(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1478 {
1479         struct kvm_msr_entry msr;
1480         int r;
1481
1482         msr.index = index;
1483         r = kvm_get_msr_feature(&msr);
1484
1485         if (r == KVM_MSR_RET_INVALID) {
1486                 /* Unconditionally clear the output for simplicity */
1487                 *data = 0;
1488                 if (kvm_msr_ignored_check(index, 0, false))
1489                         r = 0;
1490         }
1491
1492         if (r)
1493                 return r;
1494
1495         *data = msr.data;
1496
1497         return 0;
1498 }
1499
1500 static bool __kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1501 {
1502         if (efer & EFER_FFXSR && !guest_cpuid_has(vcpu, X86_FEATURE_FXSR_OPT))
1503                 return false;
1504
1505         if (efer & EFER_SVME && !guest_cpuid_has(vcpu, X86_FEATURE_SVM))
1506                 return false;
1507
1508         if (efer & (EFER_LME | EFER_LMA) &&
1509             !guest_cpuid_has(vcpu, X86_FEATURE_LM))
1510                 return false;
1511
1512         if (efer & EFER_NX && !guest_cpuid_has(vcpu, X86_FEATURE_NX))
1513                 return false;
1514
1515         return true;
1516
1517 }
1518 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1519 {
1520         if (efer & efer_reserved_bits)
1521                 return false;
1522
1523         return __kvm_valid_efer(vcpu, efer);
1524 }
1525 EXPORT_SYMBOL_GPL(kvm_valid_efer);
1526
1527 static int set_efer(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
1528 {
1529         u64 old_efer = vcpu->arch.efer;
1530         u64 efer = msr_info->data;
1531         int r;
1532
1533         if (efer & efer_reserved_bits)
1534                 return 1;
1535
1536         if (!msr_info->host_initiated) {
1537                 if (!__kvm_valid_efer(vcpu, efer))
1538                         return 1;
1539
1540                 if (is_paging(vcpu) &&
1541                     (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1542                         return 1;
1543         }
1544
1545         efer &= ~EFER_LMA;
1546         efer |= vcpu->arch.efer & EFER_LMA;
1547
1548         r = static_call(kvm_x86_set_efer)(vcpu, efer);
1549         if (r) {
1550                 WARN_ON(r > 0);
1551                 return r;
1552         }
1553
1554         /* Update reserved bits */
1555         if ((efer ^ old_efer) & EFER_NX)
1556                 kvm_mmu_reset_context(vcpu);
1557
1558         return 0;
1559 }
1560
1561 void kvm_enable_efer_bits(u64 mask)
1562 {
1563        efer_reserved_bits &= ~mask;
1564 }
1565 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1566
1567 bool kvm_msr_allowed(struct kvm_vcpu *vcpu, u32 index, u32 type)
1568 {
1569         struct kvm_x86_msr_filter *msr_filter;
1570         struct msr_bitmap_range *ranges;
1571         struct kvm *kvm = vcpu->kvm;
1572         bool allowed;
1573         int idx;
1574         u32 i;
1575
1576         /* x2APIC MSRs do not support filtering. */
1577         if (index >= 0x800 && index <= 0x8ff)
1578                 return true;
1579
1580         idx = srcu_read_lock(&kvm->srcu);
1581
1582         msr_filter = srcu_dereference(kvm->arch.msr_filter, &kvm->srcu);
1583         if (!msr_filter) {
1584                 allowed = true;
1585                 goto out;
1586         }
1587
1588         allowed = msr_filter->default_allow;
1589         ranges = msr_filter->ranges;
1590
1591         for (i = 0; i < msr_filter->count; i++) {
1592                 u32 start = ranges[i].base;
1593                 u32 end = start + ranges[i].nmsrs;
1594                 u32 flags = ranges[i].flags;
1595                 unsigned long *bitmap = ranges[i].bitmap;
1596
1597                 if ((index >= start) && (index < end) && (flags & type)) {
1598                         allowed = !!test_bit(index - start, bitmap);
1599                         break;
1600                 }
1601         }
1602
1603 out:
1604         srcu_read_unlock(&kvm->srcu, idx);
1605
1606         return allowed;
1607 }
1608 EXPORT_SYMBOL_GPL(kvm_msr_allowed);
1609
1610 /*
1611  * Write @data into the MSR specified by @index.  Select MSR specific fault
1612  * checks are bypassed if @host_initiated is %true.
1613  * Returns 0 on success, non-0 otherwise.
1614  * Assumes vcpu_load() was already called.
1615  */
1616 static int __kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data,
1617                          bool host_initiated)
1618 {
1619         struct msr_data msr;
1620
1621         if (!host_initiated && !kvm_msr_allowed(vcpu, index, KVM_MSR_FILTER_WRITE))
1622                 return KVM_MSR_RET_FILTERED;
1623
1624         switch (index) {
1625         case MSR_FS_BASE:
1626         case MSR_GS_BASE:
1627         case MSR_KERNEL_GS_BASE:
1628         case MSR_CSTAR:
1629         case MSR_LSTAR:
1630                 if (is_noncanonical_address(data, vcpu))
1631                         return 1;
1632                 break;
1633         case MSR_IA32_SYSENTER_EIP:
1634         case MSR_IA32_SYSENTER_ESP:
1635                 /*
1636                  * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1637                  * non-canonical address is written on Intel but not on
1638                  * AMD (which ignores the top 32-bits, because it does
1639                  * not implement 64-bit SYSENTER).
1640                  *
1641                  * 64-bit code should hence be able to write a non-canonical
1642                  * value on AMD.  Making the address canonical ensures that
1643                  * vmentry does not fail on Intel after writing a non-canonical
1644                  * value, and that something deterministic happens if the guest
1645                  * invokes 64-bit SYSENTER.
1646                  */
1647                 data = get_canonical(data, vcpu_virt_addr_bits(vcpu));
1648                 break;
1649         case MSR_TSC_AUX:
1650                 if (!kvm_is_supported_user_return_msr(MSR_TSC_AUX))
1651                         return 1;
1652
1653                 if (!host_initiated &&
1654                     !guest_cpuid_has(vcpu, X86_FEATURE_RDTSCP) &&
1655                     !guest_cpuid_has(vcpu, X86_FEATURE_RDPID))
1656                         return 1;
1657
1658                 /*
1659                  * Per Intel's SDM, bits 63:32 are reserved, but AMD's APM has
1660                  * incomplete and conflicting architectural behavior.  Current
1661                  * AMD CPUs completely ignore bits 63:32, i.e. they aren't
1662                  * reserved and always read as zeros.  Enforce Intel's reserved
1663                  * bits check if and only if the guest CPU is Intel, and clear
1664                  * the bits in all other cases.  This ensures cross-vendor
1665                  * migration will provide consistent behavior for the guest.
1666                  */
1667                 if (guest_cpuid_is_intel(vcpu) && (data >> 32) != 0)
1668                         return 1;
1669
1670                 data = (u32)data;
1671                 break;
1672         }
1673
1674         msr.data = data;
1675         msr.index = index;
1676         msr.host_initiated = host_initiated;
1677
1678         return static_call(kvm_x86_set_msr)(vcpu, &msr);
1679 }
1680
1681 static int kvm_set_msr_ignored_check(struct kvm_vcpu *vcpu,
1682                                      u32 index, u64 data, bool host_initiated)
1683 {
1684         int ret = __kvm_set_msr(vcpu, index, data, host_initiated);
1685
1686         if (ret == KVM_MSR_RET_INVALID)
1687                 if (kvm_msr_ignored_check(index, data, true))
1688                         ret = 0;
1689
1690         return ret;
1691 }
1692
1693 /*
1694  * Read the MSR specified by @index into @data.  Select MSR specific fault
1695  * checks are bypassed if @host_initiated is %true.
1696  * Returns 0 on success, non-0 otherwise.
1697  * Assumes vcpu_load() was already called.
1698  */
1699 int __kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data,
1700                   bool host_initiated)
1701 {
1702         struct msr_data msr;
1703         int ret;
1704
1705         if (!host_initiated && !kvm_msr_allowed(vcpu, index, KVM_MSR_FILTER_READ))
1706                 return KVM_MSR_RET_FILTERED;
1707
1708         switch (index) {
1709         case MSR_TSC_AUX:
1710                 if (!kvm_is_supported_user_return_msr(MSR_TSC_AUX))
1711                         return 1;
1712
1713                 if (!host_initiated &&
1714                     !guest_cpuid_has(vcpu, X86_FEATURE_RDTSCP) &&
1715                     !guest_cpuid_has(vcpu, X86_FEATURE_RDPID))
1716                         return 1;
1717                 break;
1718         }
1719
1720         msr.index = index;
1721         msr.host_initiated = host_initiated;
1722
1723         ret = static_call(kvm_x86_get_msr)(vcpu, &msr);
1724         if (!ret)
1725                 *data = msr.data;
1726         return ret;
1727 }
1728
1729 static int kvm_get_msr_ignored_check(struct kvm_vcpu *vcpu,
1730                                      u32 index, u64 *data, bool host_initiated)
1731 {
1732         int ret = __kvm_get_msr(vcpu, index, data, host_initiated);
1733
1734         if (ret == KVM_MSR_RET_INVALID) {
1735                 /* Unconditionally clear *data for simplicity */
1736                 *data = 0;
1737                 if (kvm_msr_ignored_check(index, 0, false))
1738                         ret = 0;
1739         }
1740
1741         return ret;
1742 }
1743
1744 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data)
1745 {
1746         return kvm_get_msr_ignored_check(vcpu, index, data, false);
1747 }
1748 EXPORT_SYMBOL_GPL(kvm_get_msr);
1749
1750 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data)
1751 {
1752         return kvm_set_msr_ignored_check(vcpu, index, data, false);
1753 }
1754 EXPORT_SYMBOL_GPL(kvm_set_msr);
1755
1756 static int complete_emulated_rdmsr(struct kvm_vcpu *vcpu)
1757 {
1758         int err = vcpu->run->msr.error;
1759         if (!err) {
1760                 kvm_rax_write(vcpu, (u32)vcpu->run->msr.data);
1761                 kvm_rdx_write(vcpu, vcpu->run->msr.data >> 32);
1762         }
1763
1764         return static_call(kvm_x86_complete_emulated_msr)(vcpu, err);
1765 }
1766
1767 static int complete_emulated_wrmsr(struct kvm_vcpu *vcpu)
1768 {
1769         return static_call(kvm_x86_complete_emulated_msr)(vcpu, vcpu->run->msr.error);
1770 }
1771
1772 static u64 kvm_msr_reason(int r)
1773 {
1774         switch (r) {
1775         case KVM_MSR_RET_INVALID:
1776                 return KVM_MSR_EXIT_REASON_UNKNOWN;
1777         case KVM_MSR_RET_FILTERED:
1778                 return KVM_MSR_EXIT_REASON_FILTER;
1779         default:
1780                 return KVM_MSR_EXIT_REASON_INVAL;
1781         }
1782 }
1783
1784 static int kvm_msr_user_space(struct kvm_vcpu *vcpu, u32 index,
1785                               u32 exit_reason, u64 data,
1786                               int (*completion)(struct kvm_vcpu *vcpu),
1787                               int r)
1788 {
1789         u64 msr_reason = kvm_msr_reason(r);
1790
1791         /* Check if the user wanted to know about this MSR fault */
1792         if (!(vcpu->kvm->arch.user_space_msr_mask & msr_reason))
1793                 return 0;
1794
1795         vcpu->run->exit_reason = exit_reason;
1796         vcpu->run->msr.error = 0;
1797         memset(vcpu->run->msr.pad, 0, sizeof(vcpu->run->msr.pad));
1798         vcpu->run->msr.reason = msr_reason;
1799         vcpu->run->msr.index = index;
1800         vcpu->run->msr.data = data;
1801         vcpu->arch.complete_userspace_io = completion;
1802
1803         return 1;
1804 }
1805
1806 static int kvm_get_msr_user_space(struct kvm_vcpu *vcpu, u32 index, int r)
1807 {
1808         return kvm_msr_user_space(vcpu, index, KVM_EXIT_X86_RDMSR, 0,
1809                                    complete_emulated_rdmsr, r);
1810 }
1811
1812 static int kvm_set_msr_user_space(struct kvm_vcpu *vcpu, u32 index, u64 data, int r)
1813 {
1814         return kvm_msr_user_space(vcpu, index, KVM_EXIT_X86_WRMSR, data,
1815                                    complete_emulated_wrmsr, r);
1816 }
1817
1818 int kvm_emulate_rdmsr(struct kvm_vcpu *vcpu)
1819 {
1820         u32 ecx = kvm_rcx_read(vcpu);
1821         u64 data;
1822         int r;
1823
1824         r = kvm_get_msr(vcpu, ecx, &data);
1825
1826         /* MSR read failed? See if we should ask user space */
1827         if (r && kvm_get_msr_user_space(vcpu, ecx, r)) {
1828                 /* Bounce to user space */
1829                 return 0;
1830         }
1831
1832         if (!r) {
1833                 trace_kvm_msr_read(ecx, data);
1834
1835                 kvm_rax_write(vcpu, data & -1u);
1836                 kvm_rdx_write(vcpu, (data >> 32) & -1u);
1837         } else {
1838                 trace_kvm_msr_read_ex(ecx);
1839         }
1840
1841         return static_call(kvm_x86_complete_emulated_msr)(vcpu, r);
1842 }
1843 EXPORT_SYMBOL_GPL(kvm_emulate_rdmsr);
1844
1845 int kvm_emulate_wrmsr(struct kvm_vcpu *vcpu)
1846 {
1847         u32 ecx = kvm_rcx_read(vcpu);
1848         u64 data = kvm_read_edx_eax(vcpu);
1849         int r;
1850
1851         r = kvm_set_msr(vcpu, ecx, data);
1852
1853         /* MSR write failed? See if we should ask user space */
1854         if (r && kvm_set_msr_user_space(vcpu, ecx, data, r))
1855                 /* Bounce to user space */
1856                 return 0;
1857
1858         /* Signal all other negative errors to userspace */
1859         if (r < 0)
1860                 return r;
1861
1862         if (!r)
1863                 trace_kvm_msr_write(ecx, data);
1864         else
1865                 trace_kvm_msr_write_ex(ecx, data);
1866
1867         return static_call(kvm_x86_complete_emulated_msr)(vcpu, r);
1868 }
1869 EXPORT_SYMBOL_GPL(kvm_emulate_wrmsr);
1870
1871 int kvm_emulate_as_nop(struct kvm_vcpu *vcpu)
1872 {
1873         return kvm_skip_emulated_instruction(vcpu);
1874 }
1875 EXPORT_SYMBOL_GPL(kvm_emulate_as_nop);
1876
1877 int kvm_emulate_invd(struct kvm_vcpu *vcpu)
1878 {
1879         /* Treat an INVD instruction as a NOP and just skip it. */
1880         return kvm_emulate_as_nop(vcpu);
1881 }
1882 EXPORT_SYMBOL_GPL(kvm_emulate_invd);
1883
1884 int kvm_emulate_mwait(struct kvm_vcpu *vcpu)
1885 {
1886         pr_warn_once("kvm: MWAIT instruction emulated as NOP!\n");
1887         return kvm_emulate_as_nop(vcpu);
1888 }
1889 EXPORT_SYMBOL_GPL(kvm_emulate_mwait);
1890
1891 int kvm_handle_invalid_op(struct kvm_vcpu *vcpu)
1892 {
1893         kvm_queue_exception(vcpu, UD_VECTOR);
1894         return 1;
1895 }
1896 EXPORT_SYMBOL_GPL(kvm_handle_invalid_op);
1897
1898 int kvm_emulate_monitor(struct kvm_vcpu *vcpu)
1899 {
1900         pr_warn_once("kvm: MONITOR instruction emulated as NOP!\n");
1901         return kvm_emulate_as_nop(vcpu);
1902 }
1903 EXPORT_SYMBOL_GPL(kvm_emulate_monitor);
1904
1905 static inline bool kvm_vcpu_exit_request(struct kvm_vcpu *vcpu)
1906 {
1907         xfer_to_guest_mode_prepare();
1908         return vcpu->mode == EXITING_GUEST_MODE || kvm_request_pending(vcpu) ||
1909                 xfer_to_guest_mode_work_pending();
1910 }
1911
1912 /*
1913  * The fast path for frequent and performance sensitive wrmsr emulation,
1914  * i.e. the sending of IPI, sending IPI early in the VM-Exit flow reduces
1915  * the latency of virtual IPI by avoiding the expensive bits of transitioning
1916  * from guest to host, e.g. reacquiring KVM's SRCU lock. In contrast to the
1917  * other cases which must be called after interrupts are enabled on the host.
1918  */
1919 static int handle_fastpath_set_x2apic_icr_irqoff(struct kvm_vcpu *vcpu, u64 data)
1920 {
1921         if (!lapic_in_kernel(vcpu) || !apic_x2apic_mode(vcpu->arch.apic))
1922                 return 1;
1923
1924         if (((data & APIC_SHORT_MASK) == APIC_DEST_NOSHORT) &&
1925                 ((data & APIC_DEST_MASK) == APIC_DEST_PHYSICAL) &&
1926                 ((data & APIC_MODE_MASK) == APIC_DM_FIXED) &&
1927                 ((u32)(data >> 32) != X2APIC_BROADCAST)) {
1928
1929                 data &= ~(1 << 12);
1930                 kvm_apic_send_ipi(vcpu->arch.apic, (u32)data, (u32)(data >> 32));
1931                 kvm_lapic_set_reg(vcpu->arch.apic, APIC_ICR2, (u32)(data >> 32));
1932                 kvm_lapic_set_reg(vcpu->arch.apic, APIC_ICR, (u32)data);
1933                 trace_kvm_apic_write(APIC_ICR, (u32)data);
1934                 return 0;
1935         }
1936
1937         return 1;
1938 }
1939
1940 static int handle_fastpath_set_tscdeadline(struct kvm_vcpu *vcpu, u64 data)
1941 {
1942         if (!kvm_can_use_hv_timer(vcpu))
1943                 return 1;
1944
1945         kvm_set_lapic_tscdeadline_msr(vcpu, data);
1946         return 0;
1947 }
1948
1949 fastpath_t handle_fastpath_set_msr_irqoff(struct kvm_vcpu *vcpu)
1950 {
1951         u32 msr = kvm_rcx_read(vcpu);
1952         u64 data;
1953         fastpath_t ret = EXIT_FASTPATH_NONE;
1954
1955         switch (msr) {
1956         case APIC_BASE_MSR + (APIC_ICR >> 4):
1957                 data = kvm_read_edx_eax(vcpu);
1958                 if (!handle_fastpath_set_x2apic_icr_irqoff(vcpu, data)) {
1959                         kvm_skip_emulated_instruction(vcpu);
1960                         ret = EXIT_FASTPATH_EXIT_HANDLED;
1961                 }
1962                 break;
1963         case MSR_IA32_TSC_DEADLINE:
1964                 data = kvm_read_edx_eax(vcpu);
1965                 if (!handle_fastpath_set_tscdeadline(vcpu, data)) {
1966                         kvm_skip_emulated_instruction(vcpu);
1967                         ret = EXIT_FASTPATH_REENTER_GUEST;
1968                 }
1969                 break;
1970         default:
1971                 break;
1972         }
1973
1974         if (ret != EXIT_FASTPATH_NONE)
1975                 trace_kvm_msr_write(msr, data);
1976
1977         return ret;
1978 }
1979 EXPORT_SYMBOL_GPL(handle_fastpath_set_msr_irqoff);
1980
1981 /*
1982  * Adapt set_msr() to msr_io()'s calling convention
1983  */
1984 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1985 {
1986         return kvm_get_msr_ignored_check(vcpu, index, data, true);
1987 }
1988
1989 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1990 {
1991         return kvm_set_msr_ignored_check(vcpu, index, *data, true);
1992 }
1993
1994 #ifdef CONFIG_X86_64
1995 struct pvclock_clock {
1996         int vclock_mode;
1997         u64 cycle_last;
1998         u64 mask;
1999         u32 mult;
2000         u32 shift;
2001         u64 base_cycles;
2002         u64 offset;
2003 };
2004
2005 struct pvclock_gtod_data {
2006         seqcount_t      seq;
2007
2008         struct pvclock_clock clock; /* extract of a clocksource struct */
2009         struct pvclock_clock raw_clock; /* extract of a clocksource struct */
2010
2011         ktime_t         offs_boot;
2012         u64             wall_time_sec;
2013 };
2014
2015 static struct pvclock_gtod_data pvclock_gtod_data;
2016
2017 static void update_pvclock_gtod(struct timekeeper *tk)
2018 {
2019         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
2020
2021         write_seqcount_begin(&vdata->seq);
2022
2023         /* copy pvclock gtod data */
2024         vdata->clock.vclock_mode        = tk->tkr_mono.clock->vdso_clock_mode;
2025         vdata->clock.cycle_last         = tk->tkr_mono.cycle_last;
2026         vdata->clock.mask               = tk->tkr_mono.mask;
2027         vdata->clock.mult               = tk->tkr_mono.mult;
2028         vdata->clock.shift              = tk->tkr_mono.shift;
2029         vdata->clock.base_cycles        = tk->tkr_mono.xtime_nsec;
2030         vdata->clock.offset             = tk->tkr_mono.base;
2031
2032         vdata->raw_clock.vclock_mode    = tk->tkr_raw.clock->vdso_clock_mode;
2033         vdata->raw_clock.cycle_last     = tk->tkr_raw.cycle_last;
2034         vdata->raw_clock.mask           = tk->tkr_raw.mask;
2035         vdata->raw_clock.mult           = tk->tkr_raw.mult;
2036         vdata->raw_clock.shift          = tk->tkr_raw.shift;
2037         vdata->raw_clock.base_cycles    = tk->tkr_raw.xtime_nsec;
2038         vdata->raw_clock.offset         = tk->tkr_raw.base;
2039
2040         vdata->wall_time_sec            = tk->xtime_sec;
2041
2042         vdata->offs_boot                = tk->offs_boot;
2043
2044         write_seqcount_end(&vdata->seq);
2045 }
2046
2047 static s64 get_kvmclock_base_ns(void)
2048 {
2049         /* Count up from boot time, but with the frequency of the raw clock.  */
2050         return ktime_to_ns(ktime_add(ktime_get_raw(), pvclock_gtod_data.offs_boot));
2051 }
2052 #else
2053 static s64 get_kvmclock_base_ns(void)
2054 {
2055         /* Master clock not used, so we can just use CLOCK_BOOTTIME.  */
2056         return ktime_get_boottime_ns();
2057 }
2058 #endif
2059
2060 void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock, int sec_hi_ofs)
2061 {
2062         int version;
2063         int r;
2064         struct pvclock_wall_clock wc;
2065         u32 wc_sec_hi;
2066         u64 wall_nsec;
2067
2068         if (!wall_clock)
2069                 return;
2070
2071         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
2072         if (r)
2073                 return;
2074
2075         if (version & 1)
2076                 ++version;  /* first time write, random junk */
2077
2078         ++version;
2079
2080         if (kvm_write_guest(kvm, wall_clock, &version, sizeof(version)))
2081                 return;
2082
2083         /*
2084          * The guest calculates current wall clock time by adding
2085          * system time (updated by kvm_guest_time_update below) to the
2086          * wall clock specified here.  We do the reverse here.
2087          */
2088         wall_nsec = ktime_get_real_ns() - get_kvmclock_ns(kvm);
2089
2090         wc.nsec = do_div(wall_nsec, 1000000000);
2091         wc.sec = (u32)wall_nsec; /* overflow in 2106 guest time */
2092         wc.version = version;
2093
2094         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
2095
2096         if (sec_hi_ofs) {
2097                 wc_sec_hi = wall_nsec >> 32;
2098                 kvm_write_guest(kvm, wall_clock + sec_hi_ofs,
2099                                 &wc_sec_hi, sizeof(wc_sec_hi));
2100         }
2101
2102         version++;
2103         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
2104 }
2105
2106 static void kvm_write_system_time(struct kvm_vcpu *vcpu, gpa_t system_time,
2107                                   bool old_msr, bool host_initiated)
2108 {
2109         struct kvm_arch *ka = &vcpu->kvm->arch;
2110
2111         if (vcpu->vcpu_id == 0 && !host_initiated) {
2112                 if (ka->boot_vcpu_runs_old_kvmclock != old_msr)
2113                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2114
2115                 ka->boot_vcpu_runs_old_kvmclock = old_msr;
2116         }
2117
2118         vcpu->arch.time = system_time;
2119         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2120
2121         /* we verify if the enable bit is set... */
2122         vcpu->arch.pv_time_enabled = false;
2123         if (!(system_time & 1))
2124                 return;
2125
2126         if (!kvm_gfn_to_hva_cache_init(vcpu->kvm,
2127                                        &vcpu->arch.pv_time, system_time & ~1ULL,
2128                                        sizeof(struct pvclock_vcpu_time_info)))
2129                 vcpu->arch.pv_time_enabled = true;
2130
2131         return;
2132 }
2133
2134 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
2135 {
2136         do_shl32_div32(dividend, divisor);
2137         return dividend;
2138 }
2139
2140 static void kvm_get_time_scale(uint64_t scaled_hz, uint64_t base_hz,
2141                                s8 *pshift, u32 *pmultiplier)
2142 {
2143         uint64_t scaled64;
2144         int32_t  shift = 0;
2145         uint64_t tps64;
2146         uint32_t tps32;
2147
2148         tps64 = base_hz;
2149         scaled64 = scaled_hz;
2150         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
2151                 tps64 >>= 1;
2152                 shift--;
2153         }
2154
2155         tps32 = (uint32_t)tps64;
2156         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
2157                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
2158                         scaled64 >>= 1;
2159                 else
2160                         tps32 <<= 1;
2161                 shift++;
2162         }
2163
2164         *pshift = shift;
2165         *pmultiplier = div_frac(scaled64, tps32);
2166 }
2167
2168 #ifdef CONFIG_X86_64
2169 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
2170 #endif
2171
2172 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
2173 static unsigned long max_tsc_khz;
2174
2175 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
2176 {
2177         u64 v = (u64)khz * (1000000 + ppm);
2178         do_div(v, 1000000);
2179         return v;
2180 }
2181
2182 static int set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale)
2183 {
2184         u64 ratio;
2185
2186         /* Guest TSC same frequency as host TSC? */
2187         if (!scale) {
2188                 vcpu->arch.l1_tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
2189                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
2190                 return 0;
2191         }
2192
2193         /* TSC scaling supported? */
2194         if (!kvm_has_tsc_control) {
2195                 if (user_tsc_khz > tsc_khz) {
2196                         vcpu->arch.tsc_catchup = 1;
2197                         vcpu->arch.tsc_always_catchup = 1;
2198                         return 0;
2199                 } else {
2200                         pr_warn_ratelimited("user requested TSC rate below hardware speed\n");
2201                         return -1;
2202                 }
2203         }
2204
2205         /* TSC scaling required  - calculate ratio */
2206         ratio = mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits,
2207                                 user_tsc_khz, tsc_khz);
2208
2209         if (ratio == 0 || ratio >= kvm_max_tsc_scaling_ratio) {
2210                 pr_warn_ratelimited("Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
2211                                     user_tsc_khz);
2212                 return -1;
2213         }
2214
2215         vcpu->arch.l1_tsc_scaling_ratio = vcpu->arch.tsc_scaling_ratio = ratio;
2216         return 0;
2217 }
2218
2219 static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz)
2220 {
2221         u32 thresh_lo, thresh_hi;
2222         int use_scaling = 0;
2223
2224         /* tsc_khz can be zero if TSC calibration fails */
2225         if (user_tsc_khz == 0) {
2226                 /* set tsc_scaling_ratio to a safe value */
2227                 vcpu->arch.l1_tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
2228                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
2229                 return -1;
2230         }
2231
2232         /* Compute a scale to convert nanoseconds in TSC cycles */
2233         kvm_get_time_scale(user_tsc_khz * 1000LL, NSEC_PER_SEC,
2234                            &vcpu->arch.virtual_tsc_shift,
2235                            &vcpu->arch.virtual_tsc_mult);
2236         vcpu->arch.virtual_tsc_khz = user_tsc_khz;
2237
2238         /*
2239          * Compute the variation in TSC rate which is acceptable
2240          * within the range of tolerance and decide if the
2241          * rate being applied is within that bounds of the hardware
2242          * rate.  If so, no scaling or compensation need be done.
2243          */
2244         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
2245         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
2246         if (user_tsc_khz < thresh_lo || user_tsc_khz > thresh_hi) {
2247                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz, thresh_lo, thresh_hi);
2248                 use_scaling = 1;
2249         }
2250         return set_tsc_khz(vcpu, user_tsc_khz, use_scaling);
2251 }
2252
2253 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
2254 {
2255         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
2256                                       vcpu->arch.virtual_tsc_mult,
2257                                       vcpu->arch.virtual_tsc_shift);
2258         tsc += vcpu->arch.this_tsc_write;
2259         return tsc;
2260 }
2261
2262 static inline int gtod_is_based_on_tsc(int mode)
2263 {
2264         return mode == VDSO_CLOCKMODE_TSC || mode == VDSO_CLOCKMODE_HVCLOCK;
2265 }
2266
2267 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
2268 {
2269 #ifdef CONFIG_X86_64
2270         bool vcpus_matched;
2271         struct kvm_arch *ka = &vcpu->kvm->arch;
2272         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2273
2274         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
2275                          atomic_read(&vcpu->kvm->online_vcpus));
2276
2277         /*
2278          * Once the masterclock is enabled, always perform request in
2279          * order to update it.
2280          *
2281          * In order to enable masterclock, the host clocksource must be TSC
2282          * and the vcpus need to have matched TSCs.  When that happens,
2283          * perform request to enable masterclock.
2284          */
2285         if (ka->use_master_clock ||
2286             (gtod_is_based_on_tsc(gtod->clock.vclock_mode) && vcpus_matched))
2287                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2288
2289         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
2290                             atomic_read(&vcpu->kvm->online_vcpus),
2291                             ka->use_master_clock, gtod->clock.vclock_mode);
2292 #endif
2293 }
2294
2295 /*
2296  * Multiply tsc by a fixed point number represented by ratio.
2297  *
2298  * The most significant 64-N bits (mult) of ratio represent the
2299  * integral part of the fixed point number; the remaining N bits
2300  * (frac) represent the fractional part, ie. ratio represents a fixed
2301  * point number (mult + frac * 2^(-N)).
2302  *
2303  * N equals to kvm_tsc_scaling_ratio_frac_bits.
2304  */
2305 static inline u64 __scale_tsc(u64 ratio, u64 tsc)
2306 {
2307         return mul_u64_u64_shr(tsc, ratio, kvm_tsc_scaling_ratio_frac_bits);
2308 }
2309
2310 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc)
2311 {
2312         u64 _tsc = tsc;
2313         u64 ratio = vcpu->arch.tsc_scaling_ratio;
2314
2315         if (ratio != kvm_default_tsc_scaling_ratio)
2316                 _tsc = __scale_tsc(ratio, tsc);
2317
2318         return _tsc;
2319 }
2320 EXPORT_SYMBOL_GPL(kvm_scale_tsc);
2321
2322 static u64 kvm_compute_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
2323 {
2324         u64 tsc;
2325
2326         tsc = kvm_scale_tsc(vcpu, rdtsc());
2327
2328         return target_tsc - tsc;
2329 }
2330
2331 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc)
2332 {
2333         return vcpu->arch.l1_tsc_offset + kvm_scale_tsc(vcpu, host_tsc);
2334 }
2335 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc);
2336
2337 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu *vcpu, u64 offset)
2338 {
2339         vcpu->arch.l1_tsc_offset = offset;
2340         vcpu->arch.tsc_offset = static_call(kvm_x86_write_l1_tsc_offset)(vcpu, offset);
2341 }
2342
2343 static inline bool kvm_check_tsc_unstable(void)
2344 {
2345 #ifdef CONFIG_X86_64
2346         /*
2347          * TSC is marked unstable when we're running on Hyper-V,
2348          * 'TSC page' clocksource is good.
2349          */
2350         if (pvclock_gtod_data.clock.vclock_mode == VDSO_CLOCKMODE_HVCLOCK)
2351                 return false;
2352 #endif
2353         return check_tsc_unstable();
2354 }
2355
2356 static void kvm_synchronize_tsc(struct kvm_vcpu *vcpu, u64 data)
2357 {
2358         struct kvm *kvm = vcpu->kvm;
2359         u64 offset, ns, elapsed;
2360         unsigned long flags;
2361         bool matched;
2362         bool already_matched;
2363         bool synchronizing = false;
2364
2365         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
2366         offset = kvm_compute_tsc_offset(vcpu, data);
2367         ns = get_kvmclock_base_ns();
2368         elapsed = ns - kvm->arch.last_tsc_nsec;
2369
2370         if (vcpu->arch.virtual_tsc_khz) {
2371                 if (data == 0) {
2372                         /*
2373                          * detection of vcpu initialization -- need to sync
2374                          * with other vCPUs. This particularly helps to keep
2375                          * kvm_clock stable after CPU hotplug
2376                          */
2377                         synchronizing = true;
2378                 } else {
2379                         u64 tsc_exp = kvm->arch.last_tsc_write +
2380                                                 nsec_to_cycles(vcpu, elapsed);
2381                         u64 tsc_hz = vcpu->arch.virtual_tsc_khz * 1000LL;
2382                         /*
2383                          * Special case: TSC write with a small delta (1 second)
2384                          * of virtual cycle time against real time is
2385                          * interpreted as an attempt to synchronize the CPU.
2386                          */
2387                         synchronizing = data < tsc_exp + tsc_hz &&
2388                                         data + tsc_hz > tsc_exp;
2389                 }
2390         }
2391
2392         /*
2393          * For a reliable TSC, we can match TSC offsets, and for an unstable
2394          * TSC, we add elapsed time in this computation.  We could let the
2395          * compensation code attempt to catch up if we fall behind, but
2396          * it's better to try to match offsets from the beginning.
2397          */
2398         if (synchronizing &&
2399             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
2400                 if (!kvm_check_tsc_unstable()) {
2401                         offset = kvm->arch.cur_tsc_offset;
2402                 } else {
2403                         u64 delta = nsec_to_cycles(vcpu, elapsed);
2404                         data += delta;
2405                         offset = kvm_compute_tsc_offset(vcpu, data);
2406                 }
2407                 matched = true;
2408                 already_matched = (vcpu->arch.this_tsc_generation == kvm->arch.cur_tsc_generation);
2409         } else {
2410                 /*
2411                  * We split periods of matched TSC writes into generations.
2412                  * For each generation, we track the original measured
2413                  * nanosecond time, offset, and write, so if TSCs are in
2414                  * sync, we can match exact offset, and if not, we can match
2415                  * exact software computation in compute_guest_tsc()
2416                  *
2417                  * These values are tracked in kvm->arch.cur_xxx variables.
2418                  */
2419                 kvm->arch.cur_tsc_generation++;
2420                 kvm->arch.cur_tsc_nsec = ns;
2421                 kvm->arch.cur_tsc_write = data;
2422                 kvm->arch.cur_tsc_offset = offset;
2423                 matched = false;
2424         }
2425
2426         /*
2427          * We also track th most recent recorded KHZ, write and time to
2428          * allow the matching interval to be extended at each write.
2429          */
2430         kvm->arch.last_tsc_nsec = ns;
2431         kvm->arch.last_tsc_write = data;
2432         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
2433
2434         vcpu->arch.last_guest_tsc = data;
2435
2436         /* Keep track of which generation this VCPU has synchronized to */
2437         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
2438         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
2439         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
2440
2441         kvm_vcpu_write_tsc_offset(vcpu, offset);
2442         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
2443
2444         spin_lock_irqsave(&kvm->arch.pvclock_gtod_sync_lock, flags);
2445         if (!matched) {
2446                 kvm->arch.nr_vcpus_matched_tsc = 0;
2447         } else if (!already_matched) {
2448                 kvm->arch.nr_vcpus_matched_tsc++;
2449         }
2450
2451         kvm_track_tsc_matching(vcpu);
2452         spin_unlock_irqrestore(&kvm->arch.pvclock_gtod_sync_lock, flags);
2453 }
2454
2455 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
2456                                            s64 adjustment)
2457 {
2458         u64 tsc_offset = vcpu->arch.l1_tsc_offset;
2459         kvm_vcpu_write_tsc_offset(vcpu, tsc_offset + adjustment);
2460 }
2461
2462 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
2463 {
2464         if (vcpu->arch.l1_tsc_scaling_ratio != kvm_default_tsc_scaling_ratio)
2465                 WARN_ON(adjustment < 0);
2466         adjustment = kvm_scale_tsc(vcpu, (u64) adjustment);
2467         adjust_tsc_offset_guest(vcpu, adjustment);
2468 }
2469
2470 #ifdef CONFIG_X86_64
2471
2472 static u64 read_tsc(void)
2473 {
2474         u64 ret = (u64)rdtsc_ordered();
2475         u64 last = pvclock_gtod_data.clock.cycle_last;
2476
2477         if (likely(ret >= last))
2478                 return ret;
2479
2480         /*
2481          * GCC likes to generate cmov here, but this branch is extremely
2482          * predictable (it's just a function of time and the likely is
2483          * very likely) and there's a data dependence, so force GCC
2484          * to generate a branch instead.  I don't barrier() because
2485          * we don't actually need a barrier, and if this function
2486          * ever gets inlined it will generate worse code.
2487          */
2488         asm volatile ("");
2489         return last;
2490 }
2491
2492 static inline u64 vgettsc(struct pvclock_clock *clock, u64 *tsc_timestamp,
2493                           int *mode)
2494 {
2495         long v;
2496         u64 tsc_pg_val;
2497
2498         switch (clock->vclock_mode) {
2499         case VDSO_CLOCKMODE_HVCLOCK:
2500                 tsc_pg_val = hv_read_tsc_page_tsc(hv_get_tsc_page(),
2501                                                   tsc_timestamp);
2502                 if (tsc_pg_val != U64_MAX) {
2503                         /* TSC page valid */
2504                         *mode = VDSO_CLOCKMODE_HVCLOCK;
2505                         v = (tsc_pg_val - clock->cycle_last) &
2506                                 clock->mask;
2507                 } else {
2508                         /* TSC page invalid */
2509                         *mode = VDSO_CLOCKMODE_NONE;
2510                 }
2511                 break;
2512         case VDSO_CLOCKMODE_TSC:
2513                 *mode = VDSO_CLOCKMODE_TSC;
2514                 *tsc_timestamp = read_tsc();
2515                 v = (*tsc_timestamp - clock->cycle_last) &
2516                         clock->mask;
2517                 break;
2518         default:
2519                 *mode = VDSO_CLOCKMODE_NONE;
2520         }
2521
2522         if (*mode == VDSO_CLOCKMODE_NONE)
2523                 *tsc_timestamp = v = 0;
2524
2525         return v * clock->mult;
2526 }
2527
2528 static int do_monotonic_raw(s64 *t, u64 *tsc_timestamp)
2529 {
2530         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2531         unsigned long seq;
2532         int mode;
2533         u64 ns;
2534
2535         do {
2536                 seq = read_seqcount_begin(&gtod->seq);
2537                 ns = gtod->raw_clock.base_cycles;
2538                 ns += vgettsc(&gtod->raw_clock, tsc_timestamp, &mode);
2539                 ns >>= gtod->raw_clock.shift;
2540                 ns += ktime_to_ns(ktime_add(gtod->raw_clock.offset, gtod->offs_boot));
2541         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
2542         *t = ns;
2543
2544         return mode;
2545 }
2546
2547 static int do_realtime(struct timespec64 *ts, u64 *tsc_timestamp)
2548 {
2549         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2550         unsigned long seq;
2551         int mode;
2552         u64 ns;
2553
2554         do {
2555                 seq = read_seqcount_begin(&gtod->seq);
2556                 ts->tv_sec = gtod->wall_time_sec;
2557                 ns = gtod->clock.base_cycles;
2558                 ns += vgettsc(&gtod->clock, tsc_timestamp, &mode);
2559                 ns >>= gtod->clock.shift;
2560         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
2561
2562         ts->tv_sec += __iter_div_u64_rem(ns, NSEC_PER_SEC, &ns);
2563         ts->tv_nsec = ns;
2564
2565         return mode;
2566 }
2567
2568 /* returns true if host is using TSC based clocksource */
2569 static bool kvm_get_time_and_clockread(s64 *kernel_ns, u64 *tsc_timestamp)
2570 {
2571         /* checked again under seqlock below */
2572         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2573                 return false;
2574
2575         return gtod_is_based_on_tsc(do_monotonic_raw(kernel_ns,
2576                                                       tsc_timestamp));
2577 }
2578
2579 /* returns true if host is using TSC based clocksource */
2580 static bool kvm_get_walltime_and_clockread(struct timespec64 *ts,
2581                                            u64 *tsc_timestamp)
2582 {
2583         /* checked again under seqlock below */
2584         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2585                 return false;
2586
2587         return gtod_is_based_on_tsc(do_realtime(ts, tsc_timestamp));
2588 }
2589 #endif
2590
2591 /*
2592  *
2593  * Assuming a stable TSC across physical CPUS, and a stable TSC
2594  * across virtual CPUs, the following condition is possible.
2595  * Each numbered line represents an event visible to both
2596  * CPUs at the next numbered event.
2597  *
2598  * "timespecX" represents host monotonic time. "tscX" represents
2599  * RDTSC value.
2600  *
2601  *              VCPU0 on CPU0           |       VCPU1 on CPU1
2602  *
2603  * 1.  read timespec0,tsc0
2604  * 2.                                   | timespec1 = timespec0 + N
2605  *                                      | tsc1 = tsc0 + M
2606  * 3. transition to guest               | transition to guest
2607  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
2608  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
2609  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
2610  *
2611  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
2612  *
2613  *      - ret0 < ret1
2614  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
2615  *              ...
2616  *      - 0 < N - M => M < N
2617  *
2618  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
2619  * always the case (the difference between two distinct xtime instances
2620  * might be smaller then the difference between corresponding TSC reads,
2621  * when updating guest vcpus pvclock areas).
2622  *
2623  * To avoid that problem, do not allow visibility of distinct
2624  * system_timestamp/tsc_timestamp values simultaneously: use a master
2625  * copy of host monotonic time values. Update that master copy
2626  * in lockstep.
2627  *
2628  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
2629  *
2630  */
2631
2632 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
2633 {
2634 #ifdef CONFIG_X86_64
2635         struct kvm_arch *ka = &kvm->arch;
2636         int vclock_mode;
2637         bool host_tsc_clocksource, vcpus_matched;
2638
2639         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
2640                         atomic_read(&kvm->online_vcpus));
2641
2642         /*
2643          * If the host uses TSC clock, then passthrough TSC as stable
2644          * to the guest.
2645          */
2646         host_tsc_clocksource = kvm_get_time_and_clockread(
2647                                         &ka->master_kernel_ns,
2648                                         &ka->master_cycle_now);
2649
2650         ka->use_master_clock = host_tsc_clocksource && vcpus_matched
2651                                 && !ka->backwards_tsc_observed
2652                                 && !ka->boot_vcpu_runs_old_kvmclock;
2653
2654         if (ka->use_master_clock)
2655                 atomic_set(&kvm_guest_has_master_clock, 1);
2656
2657         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
2658         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
2659                                         vcpus_matched);
2660 #endif
2661 }
2662
2663 void kvm_make_mclock_inprogress_request(struct kvm *kvm)
2664 {
2665         kvm_make_all_cpus_request(kvm, KVM_REQ_MCLOCK_INPROGRESS);
2666 }
2667
2668 static void kvm_gen_update_masterclock(struct kvm *kvm)
2669 {
2670 #ifdef CONFIG_X86_64
2671         int i;
2672         struct kvm_vcpu *vcpu;
2673         struct kvm_arch *ka = &kvm->arch;
2674         unsigned long flags;
2675
2676         kvm_hv_invalidate_tsc_page(kvm);
2677
2678         kvm_make_mclock_inprogress_request(kvm);
2679
2680         /* no guest entries from this point */
2681         spin_lock_irqsave(&ka->pvclock_gtod_sync_lock, flags);
2682         pvclock_update_vm_gtod_copy(kvm);
2683         spin_unlock_irqrestore(&ka->pvclock_gtod_sync_lock, flags);
2684
2685         kvm_for_each_vcpu(i, vcpu, kvm)
2686                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2687
2688         /* guest entries allowed */
2689         kvm_for_each_vcpu(i, vcpu, kvm)
2690                 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
2691 #endif
2692 }
2693
2694 u64 get_kvmclock_ns(struct kvm *kvm)
2695 {
2696         struct kvm_arch *ka = &kvm->arch;
2697         struct pvclock_vcpu_time_info hv_clock;
2698         unsigned long flags;
2699         u64 ret;
2700
2701         spin_lock_irqsave(&ka->pvclock_gtod_sync_lock, flags);
2702         if (!ka->use_master_clock) {
2703                 spin_unlock_irqrestore(&ka->pvclock_gtod_sync_lock, flags);
2704                 return get_kvmclock_base_ns() + ka->kvmclock_offset;
2705         }
2706
2707         hv_clock.tsc_timestamp = ka->master_cycle_now;
2708         hv_clock.system_time = ka->master_kernel_ns + ka->kvmclock_offset;
2709         spin_unlock_irqrestore(&ka->pvclock_gtod_sync_lock, flags);
2710
2711         /* both __this_cpu_read() and rdtsc() should be on the same cpu */
2712         get_cpu();
2713
2714         if (__this_cpu_read(cpu_tsc_khz)) {
2715                 kvm_get_time_scale(NSEC_PER_SEC, __this_cpu_read(cpu_tsc_khz) * 1000LL,
2716                                    &hv_clock.tsc_shift,
2717                                    &hv_clock.tsc_to_system_mul);
2718                 ret = __pvclock_read_cycles(&hv_clock, rdtsc());
2719         } else
2720                 ret = get_kvmclock_base_ns() + ka->kvmclock_offset;
2721
2722         put_cpu();
2723
2724         return ret;
2725 }
2726
2727 static void kvm_setup_pvclock_page(struct kvm_vcpu *v,
2728                                    struct gfn_to_hva_cache *cache,
2729                                    unsigned int offset)
2730 {
2731         struct kvm_vcpu_arch *vcpu = &v->arch;
2732         struct pvclock_vcpu_time_info guest_hv_clock;
2733
2734         if (unlikely(kvm_read_guest_offset_cached(v->kvm, cache,
2735                 &guest_hv_clock, offset, sizeof(guest_hv_clock))))
2736                 return;
2737
2738         /* This VCPU is paused, but it's legal for a guest to read another
2739          * VCPU's kvmclock, so we really have to follow the specification where
2740          * it says that version is odd if data is being modified, and even after
2741          * it is consistent.
2742          *
2743          * Version field updates must be kept separate.  This is because
2744          * kvm_write_guest_cached might use a "rep movs" instruction, and
2745          * writes within a string instruction are weakly ordered.  So there
2746          * are three writes overall.
2747          *
2748          * As a small optimization, only write the version field in the first
2749          * and third write.  The vcpu->pv_time cache is still valid, because the
2750          * version field is the first in the struct.
2751          */
2752         BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info, version) != 0);
2753
2754         if (guest_hv_clock.version & 1)
2755                 ++guest_hv_clock.version;  /* first time write, random junk */
2756
2757         vcpu->hv_clock.version = guest_hv_clock.version + 1;
2758         kvm_write_guest_offset_cached(v->kvm, cache,
2759                                       &vcpu->hv_clock, offset,
2760                                       sizeof(vcpu->hv_clock.version));
2761
2762         smp_wmb();
2763
2764         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
2765         vcpu->hv_clock.flags |= (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
2766
2767         if (vcpu->pvclock_set_guest_stopped_request) {
2768                 vcpu->hv_clock.flags |= PVCLOCK_GUEST_STOPPED;
2769                 vcpu->pvclock_set_guest_stopped_request = false;
2770         }
2771
2772         trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
2773
2774         kvm_write_guest_offset_cached(v->kvm, cache,
2775                                       &vcpu->hv_clock, offset,
2776                                       sizeof(vcpu->hv_clock));
2777
2778         smp_wmb();
2779
2780         vcpu->hv_clock.version++;
2781         kvm_write_guest_offset_cached(v->kvm, cache,
2782                                      &vcpu->hv_clock, offset,
2783                                      sizeof(vcpu->hv_clock.version));
2784 }
2785
2786 static int kvm_guest_time_update(struct kvm_vcpu *v)
2787 {
2788         unsigned long flags, tgt_tsc_khz;
2789         struct kvm_vcpu_arch *vcpu = &v->arch;
2790         struct kvm_arch *ka = &v->kvm->arch;
2791         s64 kernel_ns;
2792         u64 tsc_timestamp, host_tsc;
2793         u8 pvclock_flags;
2794         bool use_master_clock;
2795
2796         kernel_ns = 0;
2797         host_tsc = 0;
2798
2799         /*
2800          * If the host uses TSC clock, then passthrough TSC as stable
2801          * to the guest.
2802          */
2803         spin_lock_irqsave(&ka->pvclock_gtod_sync_lock, flags);
2804         use_master_clock = ka->use_master_clock;
2805         if (use_master_clock) {
2806                 host_tsc = ka->master_cycle_now;
2807                 kernel_ns = ka->master_kernel_ns;
2808         }
2809         spin_unlock_irqrestore(&ka->pvclock_gtod_sync_lock, flags);
2810
2811         /* Keep irq disabled to prevent changes to the clock */
2812         local_irq_save(flags);
2813         tgt_tsc_khz = __this_cpu_read(cpu_tsc_khz);
2814         if (unlikely(tgt_tsc_khz == 0)) {
2815                 local_irq_restore(flags);
2816                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2817                 return 1;
2818         }
2819         if (!use_master_clock) {
2820                 host_tsc = rdtsc();
2821                 kernel_ns = get_kvmclock_base_ns();
2822         }
2823
2824         tsc_timestamp = kvm_read_l1_tsc(v, host_tsc);
2825
2826         /*
2827          * We may have to catch up the TSC to match elapsed wall clock
2828          * time for two reasons, even if kvmclock is used.
2829          *   1) CPU could have been running below the maximum TSC rate
2830          *   2) Broken TSC compensation resets the base at each VCPU
2831          *      entry to avoid unknown leaps of TSC even when running
2832          *      again on the same CPU.  This may cause apparent elapsed
2833          *      time to disappear, and the guest to stand still or run
2834          *      very slowly.
2835          */
2836         if (vcpu->tsc_catchup) {
2837                 u64 tsc = compute_guest_tsc(v, kernel_ns);
2838                 if (tsc > tsc_timestamp) {
2839                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
2840                         tsc_timestamp = tsc;
2841                 }
2842         }
2843
2844         local_irq_restore(flags);
2845
2846         /* With all the info we got, fill in the values */
2847
2848         if (kvm_has_tsc_control)
2849                 tgt_tsc_khz = kvm_scale_tsc(v, tgt_tsc_khz);
2850
2851         if (unlikely(vcpu->hw_tsc_khz != tgt_tsc_khz)) {
2852                 kvm_get_time_scale(NSEC_PER_SEC, tgt_tsc_khz * 1000LL,
2853                                    &vcpu->hv_clock.tsc_shift,
2854                                    &vcpu->hv_clock.tsc_to_system_mul);
2855                 vcpu->hw_tsc_khz = tgt_tsc_khz;
2856         }
2857
2858         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
2859         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
2860         vcpu->last_guest_tsc = tsc_timestamp;
2861
2862         /* If the host uses TSC clocksource, then it is stable */
2863         pvclock_flags = 0;
2864         if (use_master_clock)
2865                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
2866
2867         vcpu->hv_clock.flags = pvclock_flags;
2868
2869         if (vcpu->pv_time_enabled)
2870                 kvm_setup_pvclock_page(v, &vcpu->pv_time, 0);
2871         if (vcpu->xen.vcpu_info_set)
2872                 kvm_setup_pvclock_page(v, &vcpu->xen.vcpu_info_cache,
2873                                        offsetof(struct compat_vcpu_info, time));
2874         if (vcpu->xen.vcpu_time_info_set)
2875                 kvm_setup_pvclock_page(v, &vcpu->xen.vcpu_time_info_cache, 0);
2876         if (v == kvm_get_vcpu(v->kvm, 0))
2877                 kvm_hv_setup_tsc_page(v->kvm, &vcpu->hv_clock);
2878         return 0;
2879 }
2880
2881 /*
2882  * kvmclock updates which are isolated to a given vcpu, such as
2883  * vcpu->cpu migration, should not allow system_timestamp from
2884  * the rest of the vcpus to remain static. Otherwise ntp frequency
2885  * correction applies to one vcpu's system_timestamp but not
2886  * the others.
2887  *
2888  * So in those cases, request a kvmclock update for all vcpus.
2889  * We need to rate-limit these requests though, as they can
2890  * considerably slow guests that have a large number of vcpus.
2891  * The time for a remote vcpu to update its kvmclock is bound
2892  * by the delay we use to rate-limit the updates.
2893  */
2894
2895 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
2896
2897 static void kvmclock_update_fn(struct work_struct *work)
2898 {
2899         int i;
2900         struct delayed_work *dwork = to_delayed_work(work);
2901         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
2902                                            kvmclock_update_work);
2903         struct kvm *kvm = container_of(ka, struct kvm, arch);
2904         struct kvm_vcpu *vcpu;
2905
2906         kvm_for_each_vcpu(i, vcpu, kvm) {
2907                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2908                 kvm_vcpu_kick(vcpu);
2909         }
2910 }
2911
2912 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
2913 {
2914         struct kvm *kvm = v->kvm;
2915
2916         kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2917         schedule_delayed_work(&kvm->arch.kvmclock_update_work,
2918                                         KVMCLOCK_UPDATE_DELAY);
2919 }
2920
2921 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
2922
2923 static void kvmclock_sync_fn(struct work_struct *work)
2924 {
2925         struct delayed_work *dwork = to_delayed_work(work);
2926         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
2927                                            kvmclock_sync_work);
2928         struct kvm *kvm = container_of(ka, struct kvm, arch);
2929
2930         if (!kvmclock_periodic_sync)
2931                 return;
2932
2933         schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
2934         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
2935                                         KVMCLOCK_SYNC_PERIOD);
2936 }
2937
2938 /*
2939  * On AMD, HWCR[McStatusWrEn] controls whether setting MCi_STATUS results in #GP.
2940  */
2941 static bool can_set_mci_status(struct kvm_vcpu *vcpu)
2942 {
2943         /* McStatusWrEn enabled? */
2944         if (guest_cpuid_is_amd_or_hygon(vcpu))
2945                 return !!(vcpu->arch.msr_hwcr & BIT_ULL(18));
2946
2947         return false;
2948 }
2949
2950 static int set_msr_mce(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2951 {
2952         u64 mcg_cap = vcpu->arch.mcg_cap;
2953         unsigned bank_num = mcg_cap & 0xff;
2954         u32 msr = msr_info->index;
2955         u64 data = msr_info->data;
2956
2957         switch (msr) {
2958         case MSR_IA32_MCG_STATUS:
2959                 vcpu->arch.mcg_status = data;
2960                 break;
2961         case MSR_IA32_MCG_CTL:
2962                 if (!(mcg_cap & MCG_CTL_P) &&
2963                     (data || !msr_info->host_initiated))
2964                         return 1;
2965                 if (data != 0 && data != ~(u64)0)
2966                         return 1;
2967                 vcpu->arch.mcg_ctl = data;
2968                 break;
2969         default:
2970                 if (msr >= MSR_IA32_MC0_CTL &&
2971                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2972                         u32 offset = array_index_nospec(
2973                                 msr - MSR_IA32_MC0_CTL,
2974                                 MSR_IA32_MCx_CTL(bank_num) - MSR_IA32_MC0_CTL);
2975
2976                         /* only 0 or all 1s can be written to IA32_MCi_CTL
2977                          * some Linux kernels though clear bit 10 in bank 4 to
2978                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
2979                          * this to avoid an uncatched #GP in the guest
2980                          */
2981                         if ((offset & 0x3) == 0 &&
2982                             data != 0 && (data | (1 << 10)) != ~(u64)0)
2983                                 return -1;
2984
2985                         /* MCi_STATUS */
2986                         if (!msr_info->host_initiated &&
2987                             (offset & 0x3) == 1 && data != 0) {
2988                                 if (!can_set_mci_status(vcpu))
2989                                         return -1;
2990                         }
2991
2992                         vcpu->arch.mce_banks[offset] = data;
2993                         break;
2994                 }
2995                 return 1;
2996         }
2997         return 0;
2998 }
2999
3000 static inline bool kvm_pv_async_pf_enabled(struct kvm_vcpu *vcpu)
3001 {
3002         u64 mask = KVM_ASYNC_PF_ENABLED | KVM_ASYNC_PF_DELIVERY_AS_INT;
3003
3004         return (vcpu->arch.apf.msr_en_val & mask) == mask;
3005 }
3006
3007 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
3008 {
3009         gpa_t gpa = data & ~0x3f;
3010
3011         /* Bits 4:5 are reserved, Should be zero */
3012         if (data & 0x30)
3013                 return 1;
3014
3015         if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_VMEXIT) &&
3016             (data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT))
3017                 return 1;
3018
3019         if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT) &&
3020             (data & KVM_ASYNC_PF_DELIVERY_AS_INT))
3021                 return 1;
3022
3023         if (!lapic_in_kernel(vcpu))
3024                 return data ? 1 : 0;
3025
3026         vcpu->arch.apf.msr_en_val = data;
3027
3028         if (!kvm_pv_async_pf_enabled(vcpu)) {
3029                 kvm_clear_async_pf_completion_queue(vcpu);
3030                 kvm_async_pf_hash_reset(vcpu);
3031                 return 0;
3032         }
3033
3034         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
3035                                         sizeof(u64)))
3036                 return 1;
3037
3038         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
3039         vcpu->arch.apf.delivery_as_pf_vmexit = data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT;
3040
3041         kvm_async_pf_wakeup_all(vcpu);
3042
3043         return 0;
3044 }
3045
3046 static int kvm_pv_enable_async_pf_int(struct kvm_vcpu *vcpu, u64 data)
3047 {
3048         /* Bits 8-63 are reserved */
3049         if (data >> 8)
3050                 return 1;
3051
3052         if (!lapic_in_kernel(vcpu))
3053                 return 1;
3054
3055         vcpu->arch.apf.msr_int_val = data;
3056
3057         vcpu->arch.apf.vec = data & KVM_ASYNC_PF_VEC_MASK;
3058
3059         return 0;
3060 }
3061
3062 static void kvmclock_reset(struct kvm_vcpu *vcpu)
3063 {
3064         vcpu->arch.pv_time_enabled = false;
3065         vcpu->arch.time = 0;
3066 }
3067
3068 static void kvm_vcpu_flush_tlb_all(struct kvm_vcpu *vcpu)
3069 {
3070         ++vcpu->stat.tlb_flush;
3071         static_call(kvm_x86_tlb_flush_all)(vcpu);
3072 }
3073
3074 static void kvm_vcpu_flush_tlb_guest(struct kvm_vcpu *vcpu)
3075 {
3076         ++vcpu->stat.tlb_flush;
3077
3078         if (!tdp_enabled) {
3079                /*
3080                  * A TLB flush on behalf of the guest is equivalent to
3081                  * INVPCID(all), toggling CR4.PGE, etc., which requires
3082                  * a forced sync of the shadow page tables.  Unload the
3083                  * entire MMU here and the subsequent load will sync the
3084                  * shadow page tables, and also flush the TLB.
3085                  */
3086                 kvm_mmu_unload(vcpu);
3087                 return;
3088         }
3089
3090         static_call(kvm_x86_tlb_flush_guest)(vcpu);
3091 }
3092
3093 static void record_steal_time(struct kvm_vcpu *vcpu)
3094 {
3095         struct kvm_host_map map;
3096         struct kvm_steal_time *st;
3097
3098         if (kvm_xen_msr_enabled(vcpu->kvm)) {
3099                 kvm_xen_runstate_set_running(vcpu);
3100                 return;
3101         }
3102
3103         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
3104                 return;
3105
3106         /* -EAGAIN is returned in atomic context so we can just return. */
3107         if (kvm_map_gfn(vcpu, vcpu->arch.st.msr_val >> PAGE_SHIFT,
3108                         &map, &vcpu->arch.st.cache, false))
3109                 return;
3110
3111         st = map.hva +
3112                 offset_in_page(vcpu->arch.st.msr_val & KVM_STEAL_VALID_BITS);
3113
3114         /*
3115          * Doing a TLB flush here, on the guest's behalf, can avoid
3116          * expensive IPIs.
3117          */
3118         if (guest_pv_has(vcpu, KVM_FEATURE_PV_TLB_FLUSH)) {
3119                 u8 st_preempted = xchg(&st->preempted, 0);
3120
3121                 trace_kvm_pv_tlb_flush(vcpu->vcpu_id,
3122                                        st_preempted & KVM_VCPU_FLUSH_TLB);
3123                 if (st_preempted & KVM_VCPU_FLUSH_TLB)
3124                         kvm_vcpu_flush_tlb_guest(vcpu);
3125         } else {
3126                 st->preempted = 0;
3127         }
3128
3129         vcpu->arch.st.preempted = 0;
3130
3131         if (st->version & 1)
3132                 st->version += 1;  /* first time write, random junk */
3133
3134         st->version += 1;
3135
3136         smp_wmb();
3137
3138         st->steal += current->sched_info.run_delay -
3139                 vcpu->arch.st.last_steal;
3140         vcpu->arch.st.last_steal = current->sched_info.run_delay;
3141
3142         smp_wmb();
3143
3144         st->version += 1;
3145
3146         kvm_unmap_gfn(vcpu, &map, &vcpu->arch.st.cache, true, false);
3147 }
3148
3149 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3150 {
3151         bool pr = false;
3152         u32 msr = msr_info->index;
3153         u64 data = msr_info->data;
3154
3155         if (msr && msr == vcpu->kvm->arch.xen_hvm_config.msr)
3156                 return kvm_xen_write_hypercall_page(vcpu, data);
3157
3158         switch (msr) {
3159         case MSR_AMD64_NB_CFG:
3160         case MSR_IA32_UCODE_WRITE:
3161         case MSR_VM_HSAVE_PA:
3162         case MSR_AMD64_PATCH_LOADER:
3163         case MSR_AMD64_BU_CFG2:
3164         case MSR_AMD64_DC_CFG:
3165         case MSR_F15H_EX_CFG:
3166                 break;
3167
3168         case MSR_IA32_UCODE_REV:
3169                 if (msr_info->host_initiated)
3170                         vcpu->arch.microcode_version = data;
3171                 break;
3172         case MSR_IA32_ARCH_CAPABILITIES:
3173                 if (!msr_info->host_initiated)
3174                         return 1;
3175                 vcpu->arch.arch_capabilities = data;
3176                 break;
3177         case MSR_IA32_PERF_CAPABILITIES: {
3178                 struct kvm_msr_entry msr_ent = {.index = msr, .data = 0};
3179
3180                 if (!msr_info->host_initiated)
3181                         return 1;
3182                 if (guest_cpuid_has(vcpu, X86_FEATURE_PDCM) && kvm_get_msr_feature(&msr_ent))
3183                         return 1;
3184                 if (data & ~msr_ent.data)
3185                         return 1;
3186
3187                 vcpu->arch.perf_capabilities = data;
3188
3189                 return 0;
3190                 }
3191         case MSR_EFER:
3192                 return set_efer(vcpu, msr_info);
3193         case MSR_K7_HWCR:
3194                 data &= ~(u64)0x40;     /* ignore flush filter disable */
3195                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
3196                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
3197
3198                 /* Handle McStatusWrEn */
3199                 if (data == BIT_ULL(18)) {
3200                         vcpu->arch.msr_hwcr = data;
3201                 } else if (data != 0) {
3202                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
3203                                     data);
3204                         return 1;
3205                 }
3206                 break;
3207         case MSR_FAM10H_MMIO_CONF_BASE:
3208                 if (data != 0) {
3209                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
3210                                     "0x%llx\n", data);
3211                         return 1;
3212                 }
3213                 break;
3214         case 0x200 ... 0x2ff:
3215                 return kvm_mtrr_set_msr(vcpu, msr, data);
3216         case MSR_IA32_APICBASE:
3217                 return kvm_set_apic_base(vcpu, msr_info);
3218         case APIC_BASE_MSR ... APIC_BASE_MSR + 0xff:
3219                 return kvm_x2apic_msr_write(vcpu, msr, data);
3220         case MSR_IA32_TSC_DEADLINE:
3221                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
3222                 break;
3223         case MSR_IA32_TSC_ADJUST:
3224                 if (guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST)) {
3225                         if (!msr_info->host_initiated) {
3226                                 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
3227                                 adjust_tsc_offset_guest(vcpu, adj);
3228                         }
3229                         vcpu->arch.ia32_tsc_adjust_msr = data;
3230                 }
3231                 break;
3232         case MSR_IA32_MISC_ENABLE:
3233                 if (!kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT) &&
3234                     ((vcpu->arch.ia32_misc_enable_msr ^ data) & MSR_IA32_MISC_ENABLE_MWAIT)) {
3235                         if (!guest_cpuid_has(vcpu, X86_FEATURE_XMM3))
3236                                 return 1;
3237                         vcpu->arch.ia32_misc_enable_msr = data;
3238                         kvm_update_cpuid_runtime(vcpu);
3239                 } else {
3240                         vcpu->arch.ia32_misc_enable_msr = data;
3241                 }
3242                 break;
3243         case MSR_IA32_SMBASE:
3244                 if (!msr_info->host_initiated)
3245                         return 1;
3246                 vcpu->arch.smbase = data;
3247                 break;
3248         case MSR_IA32_POWER_CTL:
3249                 vcpu->arch.msr_ia32_power_ctl = data;
3250                 break;
3251         case MSR_IA32_TSC:
3252                 if (msr_info->host_initiated) {
3253                         kvm_synchronize_tsc(vcpu, data);
3254                 } else {
3255                         u64 adj = kvm_compute_tsc_offset(vcpu, data) - vcpu->arch.l1_tsc_offset;
3256                         adjust_tsc_offset_guest(vcpu, adj);
3257                         vcpu->arch.ia32_tsc_adjust_msr += adj;
3258                 }
3259                 break;
3260         case MSR_IA32_XSS:
3261                 if (!msr_info->host_initiated &&
3262                     !guest_cpuid_has(vcpu, X86_FEATURE_XSAVES))
3263                         return 1;
3264                 /*
3265                  * KVM supports exposing PT to the guest, but does not support
3266                  * IA32_XSS[bit 8]. Guests have to use RDMSR/WRMSR rather than
3267                  * XSAVES/XRSTORS to save/restore PT MSRs.
3268                  */
3269                 if (data & ~supported_xss)
3270                         return 1;
3271                 vcpu->arch.ia32_xss = data;
3272                 break;
3273         case MSR_SMI_COUNT:
3274                 if (!msr_info->host_initiated)
3275                         return 1;
3276                 vcpu->arch.smi_count = data;
3277                 break;
3278         case MSR_KVM_WALL_CLOCK_NEW:
3279                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3280                         return 1;
3281
3282                 vcpu->kvm->arch.wall_clock = data;
3283                 kvm_write_wall_clock(vcpu->kvm, data, 0);
3284                 break;
3285         case MSR_KVM_WALL_CLOCK:
3286                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3287                         return 1;
3288
3289                 vcpu->kvm->arch.wall_clock = data;
3290                 kvm_write_wall_clock(vcpu->kvm, data, 0);
3291                 break;
3292         case MSR_KVM_SYSTEM_TIME_NEW:
3293                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3294                         return 1;
3295
3296                 kvm_write_system_time(vcpu, data, false, msr_info->host_initiated);
3297                 break;
3298         case MSR_KVM_SYSTEM_TIME:
3299                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3300                         return 1;
3301
3302                 kvm_write_system_time(vcpu, data, true,  msr_info->host_initiated);
3303                 break;
3304         case MSR_KVM_ASYNC_PF_EN:
3305                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3306                         return 1;
3307
3308                 if (kvm_pv_enable_async_pf(vcpu, data))
3309                         return 1;
3310                 break;
3311         case MSR_KVM_ASYNC_PF_INT:
3312                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3313                         return 1;
3314
3315                 if (kvm_pv_enable_async_pf_int(vcpu, data))
3316                         return 1;
3317                 break;
3318         case MSR_KVM_ASYNC_PF_ACK:
3319                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3320                         return 1;
3321                 if (data & 0x1) {
3322                         vcpu->arch.apf.pageready_pending = false;
3323                         kvm_check_async_pf_completion(vcpu);
3324                 }
3325                 break;
3326         case MSR_KVM_STEAL_TIME:
3327                 if (!guest_pv_has(vcpu, KVM_FEATURE_STEAL_TIME))
3328                         return 1;
3329
3330                 if (unlikely(!sched_info_on()))
3331                         return 1;
3332
3333                 if (data & KVM_STEAL_RESERVED_MASK)
3334                         return 1;
3335
3336                 vcpu->arch.st.msr_val = data;
3337
3338                 if (!(data & KVM_MSR_ENABLED))
3339                         break;
3340
3341                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
3342
3343                 break;
3344         case MSR_KVM_PV_EOI_EN:
3345                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_EOI))
3346                         return 1;
3347
3348                 if (kvm_lapic_enable_pv_eoi(vcpu, data, sizeof(u8)))
3349                         return 1;
3350                 break;
3351
3352         case MSR_KVM_POLL_CONTROL:
3353                 if (!guest_pv_has(vcpu, KVM_FEATURE_POLL_CONTROL))
3354                         return 1;
3355
3356                 /* only enable bit supported */
3357                 if (data & (-1ULL << 1))
3358                         return 1;
3359
3360                 vcpu->arch.msr_kvm_poll_control = data;
3361                 break;
3362
3363         case MSR_IA32_MCG_CTL:
3364         case MSR_IA32_MCG_STATUS:
3365         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
3366                 return set_msr_mce(vcpu, msr_info);
3367
3368         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
3369         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
3370                 pr = true;
3371                 fallthrough;
3372         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
3373         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
3374                 if (kvm_pmu_is_valid_msr(vcpu, msr))
3375                         return kvm_pmu_set_msr(vcpu, msr_info);
3376
3377                 if (pr || data != 0)
3378                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
3379                                     "0x%x data 0x%llx\n", msr, data);
3380                 break;
3381         case MSR_K7_CLK_CTL:
3382                 /*
3383                  * Ignore all writes to this no longer documented MSR.
3384                  * Writes are only relevant for old K7 processors,
3385                  * all pre-dating SVM, but a recommended workaround from
3386                  * AMD for these chips. It is possible to specify the
3387                  * affected processor models on the command line, hence
3388                  * the need to ignore the workaround.
3389                  */
3390                 break;
3391         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
3392         case HV_X64_MSR_SYNDBG_CONTROL ... HV_X64_MSR_SYNDBG_PENDING_BUFFER:
3393         case HV_X64_MSR_SYNDBG_OPTIONS:
3394         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
3395         case HV_X64_MSR_CRASH_CTL:
3396         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
3397         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
3398         case HV_X64_MSR_TSC_EMULATION_CONTROL:
3399         case HV_X64_MSR_TSC_EMULATION_STATUS:
3400                 return kvm_hv_set_msr_common(vcpu, msr, data,
3401                                              msr_info->host_initiated);
3402         case MSR_IA32_BBL_CR_CTL3:
3403                 /* Drop writes to this legacy MSR -- see rdmsr
3404                  * counterpart for further detail.
3405                  */
3406                 if (report_ignored_msrs)
3407                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data 0x%llx\n",
3408                                 msr, data);
3409                 break;
3410         case MSR_AMD64_OSVW_ID_LENGTH:
3411                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3412                         return 1;
3413                 vcpu->arch.osvw.length = data;
3414                 break;
3415         case MSR_AMD64_OSVW_STATUS:
3416                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3417                         return 1;
3418                 vcpu->arch.osvw.status = data;
3419                 break;
3420         case MSR_PLATFORM_INFO:
3421                 if (!msr_info->host_initiated ||
3422                     (!(data & MSR_PLATFORM_INFO_CPUID_FAULT) &&
3423                      cpuid_fault_enabled(vcpu)))
3424                         return 1;
3425                 vcpu->arch.msr_platform_info = data;
3426                 break;
3427         case MSR_MISC_FEATURES_ENABLES:
3428                 if (data & ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT ||
3429                     (data & MSR_MISC_FEATURES_ENABLES_CPUID_FAULT &&
3430                      !supports_cpuid_fault(vcpu)))
3431                         return 1;
3432                 vcpu->arch.msr_misc_features_enables = data;
3433                 break;
3434         default:
3435                 if (kvm_pmu_is_valid_msr(vcpu, msr))
3436                         return kvm_pmu_set_msr(vcpu, msr_info);
3437                 return KVM_MSR_RET_INVALID;
3438         }
3439         return 0;
3440 }
3441 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
3442
3443 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata, bool host)
3444 {
3445         u64 data;
3446         u64 mcg_cap = vcpu->arch.mcg_cap;
3447         unsigned bank_num = mcg_cap & 0xff;
3448
3449         switch (msr) {
3450         case MSR_IA32_P5_MC_ADDR:
3451         case MSR_IA32_P5_MC_TYPE:
3452                 data = 0;
3453                 break;
3454         case MSR_IA32_MCG_CAP:
3455                 data = vcpu->arch.mcg_cap;
3456                 break;
3457         case MSR_IA32_MCG_CTL:
3458                 if (!(mcg_cap & MCG_CTL_P) && !host)
3459                         return 1;
3460                 data = vcpu->arch.mcg_ctl;
3461                 break;
3462         case MSR_IA32_MCG_STATUS:
3463                 data = vcpu->arch.mcg_status;
3464                 break;
3465         default:
3466                 if (msr >= MSR_IA32_MC0_CTL &&
3467                     msr < MSR_IA32_MCx_CTL(bank_num)) {
3468                         u32 offset = array_index_nospec(
3469                                 msr - MSR_IA32_MC0_CTL,
3470                                 MSR_IA32_MCx_CTL(bank_num) - MSR_IA32_MC0_CTL);
3471
3472                         data = vcpu->arch.mce_banks[offset];
3473                         break;
3474                 }
3475                 return 1;
3476         }
3477         *pdata = data;
3478         return 0;
3479 }
3480
3481 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3482 {
3483         switch (msr_info->index) {
3484         case MSR_IA32_PLATFORM_ID:
3485         case MSR_IA32_EBL_CR_POWERON:
3486         case MSR_IA32_LASTBRANCHFROMIP:
3487         case MSR_IA32_LASTBRANCHTOIP:
3488         case MSR_IA32_LASTINTFROMIP:
3489         case MSR_IA32_LASTINTTOIP:
3490         case MSR_K8_SYSCFG:
3491         case MSR_K8_TSEG_ADDR:
3492         case MSR_K8_TSEG_MASK:
3493         case MSR_VM_HSAVE_PA:
3494         case MSR_K8_INT_PENDING_MSG:
3495         case MSR_AMD64_NB_CFG:
3496         case MSR_FAM10H_MMIO_CONF_BASE:
3497         case MSR_AMD64_BU_CFG2:
3498         case MSR_IA32_PERF_CTL:
3499         case MSR_AMD64_DC_CFG:
3500         case MSR_F15H_EX_CFG:
3501         /*
3502          * Intel Sandy Bridge CPUs must support the RAPL (running average power
3503          * limit) MSRs. Just return 0, as we do not want to expose the host
3504          * data here. Do not conditionalize this on CPUID, as KVM does not do
3505          * so for existing CPU-specific MSRs.
3506          */
3507         case MSR_RAPL_POWER_UNIT:
3508         case MSR_PP0_ENERGY_STATUS:     /* Power plane 0 (core) */
3509         case MSR_PP1_ENERGY_STATUS:     /* Power plane 1 (graphics uncore) */
3510         case MSR_PKG_ENERGY_STATUS:     /* Total package */
3511         case MSR_DRAM_ENERGY_STATUS:    /* DRAM controller */
3512                 msr_info->data = 0;
3513                 break;
3514         case MSR_F15H_PERF_CTL0 ... MSR_F15H_PERF_CTR5:
3515                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3516                         return kvm_pmu_get_msr(vcpu, msr_info);
3517                 if (!msr_info->host_initiated)
3518                         return 1;
3519                 msr_info->data = 0;
3520                 break;
3521         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
3522         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
3523         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
3524         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
3525                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3526                         return kvm_pmu_get_msr(vcpu, msr_info);
3527                 msr_info->data = 0;
3528                 break;
3529         case MSR_IA32_UCODE_REV:
3530                 msr_info->data = vcpu->arch.microcode_version;
3531                 break;
3532         case MSR_IA32_ARCH_CAPABILITIES:
3533                 if (!msr_info->host_initiated &&
3534                     !guest_cpuid_has(vcpu, X86_FEATURE_ARCH_CAPABILITIES))
3535                         return 1;
3536                 msr_info->data = vcpu->arch.arch_capabilities;
3537                 break;
3538         case MSR_IA32_PERF_CAPABILITIES:
3539                 if (!msr_info->host_initiated &&
3540                     !guest_cpuid_has(vcpu, X86_FEATURE_PDCM))
3541                         return 1;
3542                 msr_info->data = vcpu->arch.perf_capabilities;
3543                 break;
3544         case MSR_IA32_POWER_CTL:
3545                 msr_info->data = vcpu->arch.msr_ia32_power_ctl;
3546                 break;
3547         case MSR_IA32_TSC: {
3548                 /*
3549                  * Intel SDM states that MSR_IA32_TSC read adds the TSC offset
3550                  * even when not intercepted. AMD manual doesn't explicitly
3551                  * state this but appears to behave the same.
3552                  *
3553                  * On userspace reads and writes, however, we unconditionally
3554                  * return L1's TSC value to ensure backwards-compatible
3555                  * behavior for migration.
3556                  */
3557                 u64 tsc_offset = msr_info->host_initiated ? vcpu->arch.l1_tsc_offset :
3558                                                             vcpu->arch.tsc_offset;
3559
3560                 msr_info->data = kvm_scale_tsc(vcpu, rdtsc()) + tsc_offset;
3561                 break;
3562         }
3563         case MSR_MTRRcap:
3564         case 0x200 ... 0x2ff:
3565                 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
3566         case 0xcd: /* fsb frequency */
3567                 msr_info->data = 3;
3568                 break;
3569                 /*
3570                  * MSR_EBC_FREQUENCY_ID
3571                  * Conservative value valid for even the basic CPU models.
3572                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
3573                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
3574                  * and 266MHz for model 3, or 4. Set Core Clock
3575                  * Frequency to System Bus Frequency Ratio to 1 (bits
3576                  * 31:24) even though these are only valid for CPU
3577                  * models > 2, however guests may end up dividing or
3578                  * multiplying by zero otherwise.
3579                  */
3580         case MSR_EBC_FREQUENCY_ID:
3581                 msr_info->data = 1 << 24;
3582                 break;
3583         case MSR_IA32_APICBASE:
3584                 msr_info->data = kvm_get_apic_base(vcpu);
3585                 break;
3586         case APIC_BASE_MSR ... APIC_BASE_MSR + 0xff:
3587                 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
3588         case MSR_IA32_TSC_DEADLINE:
3589                 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
3590                 break;
3591         case MSR_IA32_TSC_ADJUST:
3592                 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
3593                 break;
3594         case MSR_IA32_MISC_ENABLE:
3595                 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
3596                 break;
3597         case MSR_IA32_SMBASE:
3598                 if (!msr_info->host_initiated)
3599                         return 1;
3600                 msr_info->data = vcpu->arch.smbase;
3601                 break;
3602         case MSR_SMI_COUNT:
3603                 msr_info->data = vcpu->arch.smi_count;
3604                 break;
3605         case MSR_IA32_PERF_STATUS:
3606                 /* TSC increment by tick */
3607                 msr_info->data = 1000ULL;
3608                 /* CPU multiplier */
3609                 msr_info->data |= (((uint64_t)4ULL) << 40);
3610                 break;
3611         case MSR_EFER:
3612                 msr_info->data = vcpu->arch.efer;
3613                 break;
3614         case MSR_KVM_WALL_CLOCK:
3615                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3616                         return 1;
3617
3618                 msr_info->data = vcpu->kvm->arch.wall_clock;
3619                 break;
3620         case MSR_KVM_WALL_CLOCK_NEW:
3621                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3622                         return 1;
3623
3624                 msr_info->data = vcpu->kvm->arch.wall_clock;
3625                 break;
3626         case MSR_KVM_SYSTEM_TIME:
3627                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3628                         return 1;
3629
3630                 msr_info->data = vcpu->arch.time;
3631                 break;
3632         case MSR_KVM_SYSTEM_TIME_NEW:
3633                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3634                         return 1;
3635
3636                 msr_info->data = vcpu->arch.time;
3637                 break;
3638         case MSR_KVM_ASYNC_PF_EN:
3639                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3640                         return 1;
3641
3642                 msr_info->data = vcpu->arch.apf.msr_en_val;
3643                 break;
3644         case MSR_KVM_ASYNC_PF_INT:
3645                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3646                         return 1;
3647
3648                 msr_info->data = vcpu->arch.apf.msr_int_val;
3649                 break;
3650         case MSR_KVM_ASYNC_PF_ACK:
3651                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3652                         return 1;
3653
3654                 msr_info->data = 0;
3655                 break;
3656         case MSR_KVM_STEAL_TIME:
3657                 if (!guest_pv_has(vcpu, KVM_FEATURE_STEAL_TIME))
3658                         return 1;
3659
3660                 msr_info->data = vcpu->arch.st.msr_val;
3661                 break;
3662         case MSR_KVM_PV_EOI_EN:
3663                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_EOI))
3664                         return 1;
3665
3666                 msr_info->data = vcpu->arch.pv_eoi.msr_val;
3667                 break;
3668         case MSR_KVM_POLL_CONTROL:
3669                 if (!guest_pv_has(vcpu, KVM_FEATURE_POLL_CONTROL))
3670                         return 1;
3671
3672                 msr_info->data = vcpu->arch.msr_kvm_poll_control;
3673                 break;
3674         case MSR_IA32_P5_MC_ADDR:
3675         case MSR_IA32_P5_MC_TYPE:
3676         case MSR_IA32_MCG_CAP:
3677         case MSR_IA32_MCG_CTL:
3678         case MSR_IA32_MCG_STATUS:
3679         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
3680                 return get_msr_mce(vcpu, msr_info->index, &msr_info->data,
3681                                    msr_info->host_initiated);
3682         case MSR_IA32_XSS:
3683                 if (!msr_info->host_initiated &&
3684                     !guest_cpuid_has(vcpu, X86_FEATURE_XSAVES))
3685                         return 1;
3686                 msr_info->data = vcpu->arch.ia32_xss;
3687                 break;
3688         case MSR_K7_CLK_CTL:
3689                 /*
3690                  * Provide expected ramp-up count for K7. All other
3691                  * are set to zero, indicating minimum divisors for
3692                  * every field.
3693                  *
3694                  * This prevents guest kernels on AMD host with CPU
3695                  * type 6, model 8 and higher from exploding due to
3696                  * the rdmsr failing.
3697                  */
3698                 msr_info->data = 0x20000000;
3699                 break;
3700         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
3701         case HV_X64_MSR_SYNDBG_CONTROL ... HV_X64_MSR_SYNDBG_PENDING_BUFFER:
3702         case HV_X64_MSR_SYNDBG_OPTIONS:
3703         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
3704         case HV_X64_MSR_CRASH_CTL:
3705         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
3706         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
3707         case HV_X64_MSR_TSC_EMULATION_CONTROL:
3708         case HV_X64_MSR_TSC_EMULATION_STATUS:
3709                 return kvm_hv_get_msr_common(vcpu,
3710                                              msr_info->index, &msr_info->data,
3711                                              msr_info->host_initiated);
3712         case MSR_IA32_BBL_CR_CTL3:
3713                 /* This legacy MSR exists but isn't fully documented in current
3714                  * silicon.  It is however accessed by winxp in very narrow
3715                  * scenarios where it sets bit #19, itself documented as
3716                  * a "reserved" bit.  Best effort attempt to source coherent
3717                  * read data here should the balance of the register be
3718                  * interpreted by the guest:
3719                  *
3720                  * L2 cache control register 3: 64GB range, 256KB size,
3721                  * enabled, latency 0x1, configured
3722                  */
3723                 msr_info->data = 0xbe702111;
3724                 break;
3725         case MSR_AMD64_OSVW_ID_LENGTH:
3726                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3727                         return 1;
3728                 msr_info->data = vcpu->arch.osvw.length;
3729                 break;
3730         case MSR_AMD64_OSVW_STATUS:
3731                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3732                         return 1;
3733                 msr_info->data = vcpu->arch.osvw.status;
3734                 break;
3735         case MSR_PLATFORM_INFO:
3736                 if (!msr_info->host_initiated &&
3737                     !vcpu->kvm->arch.guest_can_read_msr_platform_info)
3738                         return 1;
3739                 msr_info->data = vcpu->arch.msr_platform_info;
3740                 break;
3741         case MSR_MISC_FEATURES_ENABLES:
3742                 msr_info->data = vcpu->arch.msr_misc_features_enables;
3743                 break;
3744         case MSR_K7_HWCR:
3745                 msr_info->data = vcpu->arch.msr_hwcr;
3746                 break;
3747         default:
3748                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3749                         return kvm_pmu_get_msr(vcpu, msr_info);
3750                 return KVM_MSR_RET_INVALID;
3751         }
3752         return 0;
3753 }
3754 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
3755
3756 /*
3757  * Read or write a bunch of msrs. All parameters are kernel addresses.
3758  *
3759  * @return number of msrs set successfully.
3760  */
3761 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
3762                     struct kvm_msr_entry *entries,
3763                     int (*do_msr)(struct kvm_vcpu *vcpu,
3764                                   unsigned index, u64 *data))
3765 {
3766         int i;
3767
3768         for (i = 0; i < msrs->nmsrs; ++i)
3769                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
3770                         break;
3771
3772         return i;
3773 }
3774
3775 /*
3776  * Read or write a bunch of msrs. Parameters are user addresses.
3777  *
3778  * @return number of msrs set successfully.
3779  */
3780 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
3781                   int (*do_msr)(struct kvm_vcpu *vcpu,
3782                                 unsigned index, u64 *data),
3783                   int writeback)
3784 {
3785         struct kvm_msrs msrs;
3786         struct kvm_msr_entry *entries;
3787         int r, n;
3788         unsigned size;
3789
3790         r = -EFAULT;
3791         if (copy_from_user(&msrs, user_msrs, sizeof(msrs)))
3792                 goto out;
3793
3794         r = -E2BIG;
3795         if (msrs.nmsrs >= MAX_IO_MSRS)
3796                 goto out;
3797
3798         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
3799         entries = memdup_user(user_msrs->entries, size);
3800         if (IS_ERR(entries)) {
3801                 r = PTR_ERR(entries);
3802                 goto out;
3803         }
3804
3805         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
3806         if (r < 0)
3807                 goto out_free;
3808
3809         r = -EFAULT;
3810         if (writeback && copy_to_user(user_msrs->entries, entries, size))
3811                 goto out_free;
3812
3813         r = n;
3814
3815 out_free:
3816         kfree(entries);
3817 out:
3818         return r;
3819 }
3820
3821 static inline bool kvm_can_mwait_in_guest(void)
3822 {
3823         return boot_cpu_has(X86_FEATURE_MWAIT) &&
3824                 !boot_cpu_has_bug(X86_BUG_MONITOR) &&
3825                 boot_cpu_has(X86_FEATURE_ARAT);
3826 }
3827
3828 static int kvm_ioctl_get_supported_hv_cpuid(struct kvm_vcpu *vcpu,
3829                                             struct kvm_cpuid2 __user *cpuid_arg)
3830 {
3831         struct kvm_cpuid2 cpuid;
3832         int r;
3833
3834         r = -EFAULT;
3835         if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
3836                 return r;
3837
3838         r = kvm_get_hv_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3839         if (r)
3840                 return r;
3841
3842         r = -EFAULT;
3843         if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
3844                 return r;
3845
3846         return 0;
3847 }
3848
3849 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
3850 {
3851         int r = 0;
3852
3853         switch (ext) {
3854         case KVM_CAP_IRQCHIP:
3855         case KVM_CAP_HLT:
3856         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
3857         case KVM_CAP_SET_TSS_ADDR:
3858         case KVM_CAP_EXT_CPUID:
3859         case KVM_CAP_EXT_EMUL_CPUID:
3860         case KVM_CAP_CLOCKSOURCE:
3861         case KVM_CAP_PIT:
3862         case KVM_CAP_NOP_IO_DELAY:
3863         case KVM_CAP_MP_STATE:
3864         case KVM_CAP_SYNC_MMU:
3865         case KVM_CAP_USER_NMI:
3866         case KVM_CAP_REINJECT_CONTROL:
3867         case KVM_CAP_IRQ_INJECT_STATUS:
3868         case KVM_CAP_IOEVENTFD:
3869         case KVM_CAP_IOEVENTFD_NO_LENGTH:
3870         case KVM_CAP_PIT2:
3871         case KVM_CAP_PIT_STATE2:
3872         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
3873         case KVM_CAP_VCPU_EVENTS:
3874         case KVM_CAP_HYPERV:
3875         case KVM_CAP_HYPERV_VAPIC:
3876         case KVM_CAP_HYPERV_SPIN:
3877         case KVM_CAP_HYPERV_SYNIC:
3878         case KVM_CAP_HYPERV_SYNIC2:
3879         case KVM_CAP_HYPERV_VP_INDEX:
3880         case KVM_CAP_HYPERV_EVENTFD:
3881         case KVM_CAP_HYPERV_TLBFLUSH:
3882         case KVM_CAP_HYPERV_SEND_IPI:
3883         case KVM_CAP_HYPERV_CPUID:
3884         case KVM_CAP_SYS_HYPERV_CPUID:
3885         case KVM_CAP_PCI_SEGMENT:
3886         case KVM_CAP_DEBUGREGS:
3887         case KVM_CAP_X86_ROBUST_SINGLESTEP:
3888         case KVM_CAP_XSAVE:
3889         case KVM_CAP_ASYNC_PF:
3890         case KVM_CAP_ASYNC_PF_INT:
3891         case KVM_CAP_GET_TSC_KHZ:
3892         case KVM_CAP_KVMCLOCK_CTRL:
3893         case KVM_CAP_READONLY_MEM:
3894         case KVM_CAP_HYPERV_TIME:
3895         case KVM_CAP_IOAPIC_POLARITY_IGNORED:
3896         case KVM_CAP_TSC_DEADLINE_TIMER:
3897         case KVM_CAP_DISABLE_QUIRKS:
3898         case KVM_CAP_SET_BOOT_CPU_ID:
3899         case KVM_CAP_SPLIT_IRQCHIP:
3900         case KVM_CAP_IMMEDIATE_EXIT:
3901         case KVM_CAP_PMU_EVENT_FILTER:
3902         case KVM_CAP_GET_MSR_FEATURES:
3903         case KVM_CAP_MSR_PLATFORM_INFO:
3904         case KVM_CAP_EXCEPTION_PAYLOAD:
3905         case KVM_CAP_SET_GUEST_DEBUG:
3906         case KVM_CAP_LAST_CPU:
3907         case KVM_CAP_X86_USER_SPACE_MSR:
3908         case KVM_CAP_X86_MSR_FILTER:
3909         case KVM_CAP_ENFORCE_PV_FEATURE_CPUID:
3910 #ifdef CONFIG_X86_SGX_KVM
3911         case KVM_CAP_SGX_ATTRIBUTE:
3912 #endif
3913         case KVM_CAP_VM_COPY_ENC_CONTEXT_FROM:
3914                 r = 1;
3915                 break;
3916         case KVM_CAP_SET_GUEST_DEBUG2:
3917                 return KVM_GUESTDBG_VALID_MASK;
3918 #ifdef CONFIG_KVM_XEN
3919         case KVM_CAP_XEN_HVM:
3920                 r = KVM_XEN_HVM_CONFIG_HYPERCALL_MSR |
3921                     KVM_XEN_HVM_CONFIG_INTERCEPT_HCALL |
3922                     KVM_XEN_HVM_CONFIG_SHARED_INFO;
3923                 if (sched_info_on())
3924                         r |= KVM_XEN_HVM_CONFIG_RUNSTATE;
3925                 break;
3926 #endif
3927         case KVM_CAP_SYNC_REGS:
3928                 r = KVM_SYNC_X86_VALID_FIELDS;
3929                 break;
3930         case KVM_CAP_ADJUST_CLOCK:
3931                 r = KVM_CLOCK_TSC_STABLE;
3932                 break;
3933         case KVM_CAP_X86_DISABLE_EXITS:
3934                 r |=  KVM_X86_DISABLE_EXITS_HLT | KVM_X86_DISABLE_EXITS_PAUSE |
3935                       KVM_X86_DISABLE_EXITS_CSTATE;
3936                 if(kvm_can_mwait_in_guest())
3937                         r |= KVM_X86_DISABLE_EXITS_MWAIT;
3938                 break;
3939         case KVM_CAP_X86_SMM:
3940                 /* SMBASE is usually relocated above 1M on modern chipsets,
3941                  * and SMM handlers might indeed rely on 4G segment limits,
3942                  * so do not report SMM to be available if real mode is
3943                  * emulated via vm86 mode.  Still, do not go to great lengths
3944                  * to avoid userspace's usage of the feature, because it is a
3945                  * fringe case that is not enabled except via specific settings
3946                  * of the module parameters.
3947                  */
3948                 r = static_call(kvm_x86_has_emulated_msr)(kvm, MSR_IA32_SMBASE);
3949                 break;
3950         case KVM_CAP_VAPIC:
3951                 r = !static_call(kvm_x86_cpu_has_accelerated_tpr)();
3952                 break;
3953         case KVM_CAP_NR_VCPUS:
3954                 r = KVM_SOFT_MAX_VCPUS;
3955                 break;
3956         case KVM_CAP_MAX_VCPUS:
3957                 r = KVM_MAX_VCPUS;
3958                 break;
3959         case KVM_CAP_MAX_VCPU_ID:
3960                 r = KVM_MAX_VCPU_ID;
3961                 break;
3962         case KVM_CAP_PV_MMU:    /* obsolete */
3963                 r = 0;
3964                 break;
3965         case KVM_CAP_MCE:
3966                 r = KVM_MAX_MCE_BANKS;
3967                 break;
3968         case KVM_CAP_XCRS:
3969                 r = boot_cpu_has(X86_FEATURE_XSAVE);
3970                 break;
3971         case KVM_CAP_TSC_CONTROL:
3972                 r = kvm_has_tsc_control;
3973                 break;
3974         case KVM_CAP_X2APIC_API:
3975                 r = KVM_X2APIC_API_VALID_FLAGS;
3976                 break;
3977         case KVM_CAP_NESTED_STATE:
3978                 r = kvm_x86_ops.nested_ops->get_state ?
3979                         kvm_x86_ops.nested_ops->get_state(NULL, NULL, 0) : 0;
3980                 break;
3981         case KVM_CAP_HYPERV_DIRECT_TLBFLUSH:
3982                 r = kvm_x86_ops.enable_direct_tlbflush != NULL;
3983                 break;
3984         case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
3985                 r = kvm_x86_ops.nested_ops->enable_evmcs != NULL;
3986                 break;
3987         case KVM_CAP_SMALLER_MAXPHYADDR:
3988                 r = (int) allow_smaller_maxphyaddr;
3989                 break;
3990         case KVM_CAP_STEAL_TIME:
3991                 r = sched_info_on();
3992                 break;
3993         case KVM_CAP_X86_BUS_LOCK_EXIT:
3994                 if (kvm_has_bus_lock_exit)
3995                         r = KVM_BUS_LOCK_DETECTION_OFF |
3996                             KVM_BUS_LOCK_DETECTION_EXIT;
3997                 else
3998                         r = 0;
3999                 break;
4000         default:
4001                 break;
4002         }
4003         return r;
4004
4005 }
4006
4007 long kvm_arch_dev_ioctl(struct file *filp,
4008                         unsigned int ioctl, unsigned long arg)
4009 {
4010         void __user *argp = (void __user *)arg;
4011         long r;
4012
4013         switch (ioctl) {
4014         case KVM_GET_MSR_INDEX_LIST: {
4015                 struct kvm_msr_list __user *user_msr_list = argp;
4016                 struct kvm_msr_list msr_list;
4017                 unsigned n;
4018
4019                 r = -EFAULT;
4020                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
4021                         goto out;
4022                 n = msr_list.nmsrs;
4023                 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
4024                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
4025                         goto out;
4026                 r = -E2BIG;
4027                 if (n < msr_list.nmsrs)
4028                         goto out;
4029                 r = -EFAULT;
4030                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
4031                                  num_msrs_to_save * sizeof(u32)))
4032                         goto out;
4033                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
4034                                  &emulated_msrs,
4035                                  num_emulated_msrs * sizeof(u32)))
4036                         goto out;
4037                 r = 0;
4038                 break;
4039         }
4040         case KVM_GET_SUPPORTED_CPUID:
4041         case KVM_GET_EMULATED_CPUID: {
4042                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4043                 struct kvm_cpuid2 cpuid;
4044
4045                 r = -EFAULT;
4046                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4047                         goto out;
4048
4049                 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
4050                                             ioctl);
4051                 if (r)
4052                         goto out;
4053
4054                 r = -EFAULT;
4055                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
4056                         goto out;
4057                 r = 0;
4058                 break;
4059         }
4060         case KVM_X86_GET_MCE_CAP_SUPPORTED:
4061                 r = -EFAULT;
4062                 if (copy_to_user(argp, &kvm_mce_cap_supported,
4063                                  sizeof(kvm_mce_cap_supported)))
4064                         goto out;
4065                 r = 0;
4066                 break;
4067         case KVM_GET_MSR_FEATURE_INDEX_LIST: {
4068                 struct kvm_msr_list __user *user_msr_list = argp;
4069                 struct kvm_msr_list msr_list;
4070                 unsigned int n;
4071
4072                 r = -EFAULT;
4073                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
4074                         goto out;
4075                 n = msr_list.nmsrs;
4076                 msr_list.nmsrs = num_msr_based_features;
4077                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
4078                         goto out;
4079                 r = -E2BIG;
4080                 if (n < msr_list.nmsrs)
4081                         goto out;
4082                 r = -EFAULT;
4083                 if (copy_to_user(user_msr_list->indices, &msr_based_features,
4084                                  num_msr_based_features * sizeof(u32)))
4085                         goto out;
4086                 r = 0;
4087                 break;
4088         }
4089         case KVM_GET_MSRS:
4090                 r = msr_io(NULL, argp, do_get_msr_feature, 1);
4091                 break;
4092         case KVM_GET_SUPPORTED_HV_CPUID:
4093                 r = kvm_ioctl_get_supported_hv_cpuid(NULL, argp);
4094                 break;
4095         default:
4096                 r = -EINVAL;
4097                 break;
4098         }
4099 out:
4100         return r;
4101 }
4102
4103 static void wbinvd_ipi(void *garbage)
4104 {
4105         wbinvd();
4106 }
4107
4108 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
4109 {
4110         return kvm_arch_has_noncoherent_dma(vcpu->kvm);
4111 }
4112
4113 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
4114 {
4115         /* Address WBINVD may be executed by guest */
4116         if (need_emulate_wbinvd(vcpu)) {
4117                 if (static_call(kvm_x86_has_wbinvd_exit)())
4118                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4119                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
4120                         smp_call_function_single(vcpu->cpu,
4121                                         wbinvd_ipi, NULL, 1);
4122         }
4123
4124         static_call(kvm_x86_vcpu_load)(vcpu, cpu);
4125
4126         /* Save host pkru register if supported */
4127         vcpu->arch.host_pkru = read_pkru();
4128
4129         /* Apply any externally detected TSC adjustments (due to suspend) */
4130         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
4131                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
4132                 vcpu->arch.tsc_offset_adjustment = 0;
4133                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4134         }
4135
4136         if (unlikely(vcpu->cpu != cpu) || kvm_check_tsc_unstable()) {
4137                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
4138                                 rdtsc() - vcpu->arch.last_host_tsc;
4139                 if (tsc_delta < 0)
4140                         mark_tsc_unstable("KVM discovered backwards TSC");
4141
4142                 if (kvm_check_tsc_unstable()) {
4143                         u64 offset = kvm_compute_tsc_offset(vcpu,
4144                                                 vcpu->arch.last_guest_tsc);
4145                         kvm_vcpu_write_tsc_offset(vcpu, offset);
4146                         vcpu->arch.tsc_catchup = 1;
4147                 }
4148
4149                 if (kvm_lapic_hv_timer_in_use(vcpu))
4150                         kvm_lapic_restart_hv_timer(vcpu);
4151
4152                 /*
4153                  * On a host with synchronized TSC, there is no need to update
4154                  * kvmclock on vcpu->cpu migration
4155                  */
4156                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
4157                         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
4158                 if (vcpu->cpu != cpu)
4159                         kvm_make_request(KVM_REQ_MIGRATE_TIMER, vcpu);
4160                 vcpu->cpu = cpu;
4161         }
4162
4163         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
4164 }
4165
4166 static void kvm_steal_time_set_preempted(struct kvm_vcpu *vcpu)
4167 {
4168         struct kvm_host_map map;
4169         struct kvm_steal_time *st;
4170
4171         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
4172                 return;
4173
4174         if (vcpu->arch.st.preempted)
4175                 return;
4176
4177         if (kvm_map_gfn(vcpu, vcpu->arch.st.msr_val >> PAGE_SHIFT, &map,
4178                         &vcpu->arch.st.cache, true))
4179                 return;
4180
4181         st = map.hva +
4182                 offset_in_page(vcpu->arch.st.msr_val & KVM_STEAL_VALID_BITS);
4183
4184         st->preempted = vcpu->arch.st.preempted = KVM_VCPU_PREEMPTED;
4185
4186         kvm_unmap_gfn(vcpu, &map, &vcpu->arch.st.cache, true, true);
4187 }
4188
4189 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
4190 {
4191         int idx;
4192
4193         if (vcpu->preempted && !vcpu->arch.guest_state_protected)
4194                 vcpu->arch.preempted_in_kernel = !static_call(kvm_x86_get_cpl)(vcpu);
4195
4196         /*
4197          * Take the srcu lock as memslots will be accessed to check the gfn
4198          * cache generation against the memslots generation.
4199          */
4200         idx = srcu_read_lock(&vcpu->kvm->srcu);
4201         if (kvm_xen_msr_enabled(vcpu->kvm))
4202                 kvm_xen_runstate_set_preempted(vcpu);
4203         else
4204                 kvm_steal_time_set_preempted(vcpu);
4205         srcu_read_unlock(&vcpu->kvm->srcu, idx);
4206
4207         static_call(kvm_x86_vcpu_put)(vcpu);
4208         vcpu->arch.last_host_tsc = rdtsc();
4209         /*
4210          * If userspace has set any breakpoints or watchpoints, dr6 is restored
4211          * on every vmexit, but if not, we might have a stale dr6 from the
4212          * guest. do_debug expects dr6 to be cleared after it runs, do the same.
4213          */
4214         set_debugreg(0, 6);
4215 }
4216
4217 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
4218                                     struct kvm_lapic_state *s)
4219 {
4220         if (vcpu->arch.apicv_active)
4221                 static_call(kvm_x86_sync_pir_to_irr)(vcpu);
4222
4223         return kvm_apic_get_state(vcpu, s);
4224 }
4225
4226 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
4227                                     struct kvm_lapic_state *s)
4228 {
4229         int r;
4230
4231         r = kvm_apic_set_state(vcpu, s);
4232         if (r)
4233                 return r;
4234         update_cr8_intercept(vcpu);
4235
4236         return 0;
4237 }
4238
4239 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu *vcpu)
4240 {
4241         /*
4242          * We can accept userspace's request for interrupt injection
4243          * as long as we have a place to store the interrupt number.
4244          * The actual injection will happen when the CPU is able to
4245          * deliver the interrupt.
4246          */
4247         if (kvm_cpu_has_extint(vcpu))
4248                 return false;
4249
4250         /* Acknowledging ExtINT does not happen if LINT0 is masked.  */
4251         return (!lapic_in_kernel(vcpu) ||
4252                 kvm_apic_accept_pic_intr(vcpu));
4253 }
4254
4255 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu *vcpu)
4256 {
4257         return kvm_arch_interrupt_allowed(vcpu) &&
4258                 kvm_cpu_accept_dm_intr(vcpu);
4259 }
4260
4261 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
4262                                     struct kvm_interrupt *irq)
4263 {
4264         if (irq->irq >= KVM_NR_INTERRUPTS)
4265                 return -EINVAL;
4266
4267         if (!irqchip_in_kernel(vcpu->kvm)) {
4268                 kvm_queue_interrupt(vcpu, irq->irq, false);
4269                 kvm_make_request(KVM_REQ_EVENT, vcpu);
4270                 return 0;
4271         }
4272
4273         /*
4274          * With in-kernel LAPIC, we only use this to inject EXTINT, so
4275          * fail for in-kernel 8259.
4276          */
4277         if (pic_in_kernel(vcpu->kvm))
4278                 return -ENXIO;
4279
4280         if (vcpu->arch.pending_external_vector != -1)
4281                 return -EEXIST;
4282
4283         vcpu->arch.pending_external_vector = irq->irq;
4284         kvm_make_request(KVM_REQ_EVENT, vcpu);
4285         return 0;
4286 }
4287
4288 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
4289 {
4290         kvm_inject_nmi(vcpu);
4291
4292         return 0;
4293 }
4294
4295 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
4296 {
4297         kvm_make_request(KVM_REQ_SMI, vcpu);
4298
4299         return 0;
4300 }
4301
4302 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
4303                                            struct kvm_tpr_access_ctl *tac)
4304 {
4305         if (tac->flags)
4306                 return -EINVAL;
4307         vcpu->arch.tpr_access_reporting = !!tac->enabled;
4308         return 0;
4309 }
4310
4311 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
4312                                         u64 mcg_cap)
4313 {
4314         int r;
4315         unsigned bank_num = mcg_cap & 0xff, bank;
4316
4317         r = -EINVAL;
4318         if (!bank_num || bank_num > KVM_MAX_MCE_BANKS)
4319                 goto out;
4320         if (mcg_cap & ~(kvm_mce_cap_supported | 0xff | 0xff0000))
4321                 goto out;
4322         r = 0;
4323         vcpu->arch.mcg_cap = mcg_cap;
4324         /* Init IA32_MCG_CTL to all 1s */
4325         if (mcg_cap & MCG_CTL_P)
4326                 vcpu->arch.mcg_ctl = ~(u64)0;
4327         /* Init IA32_MCi_CTL to all 1s */
4328         for (bank = 0; bank < bank_num; bank++)
4329                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
4330
4331         static_call(kvm_x86_setup_mce)(vcpu);
4332 out:
4333         return r;
4334 }
4335
4336 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
4337                                       struct kvm_x86_mce *mce)
4338 {
4339         u64 mcg_cap = vcpu->arch.mcg_cap;
4340         unsigned bank_num = mcg_cap & 0xff;
4341         u64 *banks = vcpu->arch.mce_banks;
4342
4343         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
4344                 return -EINVAL;
4345         /*
4346          * if IA32_MCG_CTL is not all 1s, the uncorrected error
4347          * reporting is disabled
4348          */
4349         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
4350             vcpu->arch.mcg_ctl != ~(u64)0)
4351                 return 0;
4352         banks += 4 * mce->bank;
4353         /*
4354          * if IA32_MCi_CTL is not all 1s, the uncorrected error
4355          * reporting is disabled for the bank
4356          */
4357         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
4358                 return 0;
4359         if (mce->status & MCI_STATUS_UC) {
4360                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
4361                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
4362                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
4363                         return 0;
4364                 }
4365                 if (banks[1] & MCI_STATUS_VAL)
4366                         mce->status |= MCI_STATUS_OVER;
4367                 banks[2] = mce->addr;
4368                 banks[3] = mce->misc;
4369                 vcpu->arch.mcg_status = mce->mcg_status;
4370                 banks[1] = mce->status;
4371                 kvm_queue_exception(vcpu, MC_VECTOR);
4372         } else if (!(banks[1] & MCI_STATUS_VAL)
4373                    || !(banks[1] & MCI_STATUS_UC)) {
4374                 if (banks[1] & MCI_STATUS_VAL)
4375                         mce->status |= MCI_STATUS_OVER;
4376                 banks[2] = mce->addr;
4377                 banks[3] = mce->misc;
4378                 banks[1] = mce->status;
4379         } else
4380                 banks[1] |= MCI_STATUS_OVER;
4381         return 0;
4382 }
4383
4384 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
4385                                                struct kvm_vcpu_events *events)
4386 {
4387         process_nmi(vcpu);
4388
4389         if (kvm_check_request(KVM_REQ_SMI, vcpu))
4390                 process_smi(vcpu);
4391
4392         /*
4393          * In guest mode, payload delivery should be deferred,
4394          * so that the L1 hypervisor can intercept #PF before
4395          * CR2 is modified (or intercept #DB before DR6 is
4396          * modified under nVMX). Unless the per-VM capability,
4397          * KVM_CAP_EXCEPTION_PAYLOAD, is set, we may not defer the delivery of
4398          * an exception payload and handle after a KVM_GET_VCPU_EVENTS. Since we
4399          * opportunistically defer the exception payload, deliver it if the
4400          * capability hasn't been requested before processing a
4401          * KVM_GET_VCPU_EVENTS.
4402          */
4403         if (!vcpu->kvm->arch.exception_payload_enabled &&
4404             vcpu->arch.exception.pending && vcpu->arch.exception.has_payload)
4405                 kvm_deliver_exception_payload(vcpu);
4406
4407         /*
4408          * The API doesn't provide the instruction length for software
4409          * exceptions, so don't report them. As long as the guest RIP
4410          * isn't advanced, we should expect to encounter the exception
4411          * again.
4412          */
4413         if (kvm_exception_is_soft(vcpu->arch.exception.nr)) {
4414                 events->exception.injected = 0;
4415                 events->exception.pending = 0;
4416         } else {
4417                 events->exception.injected = vcpu->arch.exception.injected;
4418                 events->exception.pending = vcpu->arch.exception.pending;
4419                 /*
4420                  * For ABI compatibility, deliberately conflate
4421                  * pending and injected exceptions when
4422                  * KVM_CAP_EXCEPTION_PAYLOAD isn't enabled.
4423                  */
4424                 if (!vcpu->kvm->arch.exception_payload_enabled)
4425                         events->exception.injected |=
4426                                 vcpu->arch.exception.pending;
4427         }
4428         events->exception.nr = vcpu->arch.exception.nr;
4429         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
4430         events->exception.error_code = vcpu->arch.exception.error_code;
4431         events->exception_has_payload = vcpu->arch.exception.has_payload;
4432         events->exception_payload = vcpu->arch.exception.payload;
4433
4434         events->interrupt.injected =
4435                 vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft;
4436         events->interrupt.nr = vcpu->arch.interrupt.nr;
4437         events->interrupt.soft = 0;
4438         events->interrupt.shadow = static_call(kvm_x86_get_interrupt_shadow)(vcpu);
4439
4440         events->nmi.injected = vcpu->arch.nmi_injected;
4441         events->nmi.pending = vcpu->arch.nmi_pending != 0;
4442         events->nmi.masked = static_call(kvm_x86_get_nmi_mask)(vcpu);
4443         events->nmi.pad = 0;
4444
4445         events->sipi_vector = 0; /* never valid when reporting to user space */
4446
4447         events->smi.smm = is_smm(vcpu);
4448         events->smi.pending = vcpu->arch.smi_pending;
4449         events->smi.smm_inside_nmi =
4450                 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
4451         events->smi.latched_init = kvm_lapic_latched_init(vcpu);
4452
4453         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
4454                          | KVM_VCPUEVENT_VALID_SHADOW
4455                          | KVM_VCPUEVENT_VALID_SMM);
4456         if (vcpu->kvm->arch.exception_payload_enabled)
4457                 events->flags |= KVM_VCPUEVENT_VALID_PAYLOAD;
4458
4459         memset(&events->reserved, 0, sizeof(events->reserved));
4460 }
4461
4462 static void kvm_smm_changed(struct kvm_vcpu *vcpu);
4463
4464 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
4465                                               struct kvm_vcpu_events *events)
4466 {
4467         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
4468                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
4469                               | KVM_VCPUEVENT_VALID_SHADOW
4470                               | KVM_VCPUEVENT_VALID_SMM
4471                               | KVM_VCPUEVENT_VALID_PAYLOAD))
4472                 return -EINVAL;
4473
4474         if (events->flags & KVM_VCPUEVENT_VALID_PAYLOAD) {
4475                 if (!vcpu->kvm->arch.exception_payload_enabled)
4476                         return -EINVAL;
4477                 if (events->exception.pending)
4478                         events->exception.injected = 0;
4479                 else
4480                         events->exception_has_payload = 0;
4481         } else {
4482                 events->exception.pending = 0;
4483                 events->exception_has_payload = 0;
4484         }
4485
4486         if ((events->exception.injected || events->exception.pending) &&
4487             (events->exception.nr > 31 || events->exception.nr == NMI_VECTOR))
4488                 return -EINVAL;
4489
4490         /* INITs are latched while in SMM */
4491         if (events->flags & KVM_VCPUEVENT_VALID_SMM &&
4492             (events->smi.smm || events->smi.pending) &&
4493             vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED)
4494                 return -EINVAL;
4495
4496         process_nmi(vcpu);
4497         vcpu->arch.exception.injected = events->exception.injected;
4498         vcpu->arch.exception.pending = events->exception.pending;
4499         vcpu->arch.exception.nr = events->exception.nr;
4500         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
4501         vcpu->arch.exception.error_code = events->exception.error_code;
4502         vcpu->arch.exception.has_payload = events->exception_has_payload;
4503         vcpu->arch.exception.payload = events->exception_payload;
4504
4505         vcpu->arch.interrupt.injected = events->interrupt.injected;
4506         vcpu->arch.interrupt.nr = events->interrupt.nr;
4507         vcpu->arch.interrupt.soft = events->interrupt.soft;
4508         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
4509                 static_call(kvm_x86_set_interrupt_shadow)(vcpu,
4510                                                 events->interrupt.shadow);
4511
4512         vcpu->arch.nmi_injected = events->nmi.injected;
4513         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
4514                 vcpu->arch.nmi_pending = events->nmi.pending;
4515         static_call(kvm_x86_set_nmi_mask)(vcpu, events->nmi.masked);
4516
4517         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
4518             lapic_in_kernel(vcpu))
4519                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
4520
4521         if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
4522                 if (!!(vcpu->arch.hflags & HF_SMM_MASK) != events->smi.smm) {
4523                         if (events->smi.smm)
4524                                 vcpu->arch.hflags |= HF_SMM_MASK;
4525                         else
4526                                 vcpu->arch.hflags &= ~HF_SMM_MASK;
4527                         kvm_smm_changed(vcpu);
4528                 }
4529
4530                 vcpu->arch.smi_pending = events->smi.pending;
4531
4532                 if (events->smi.smm) {
4533                         if (events->smi.smm_inside_nmi)
4534                                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
4535                         else
4536                                 vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
4537                 }
4538
4539                 if (lapic_in_kernel(vcpu)) {
4540                         if (events->smi.latched_init)
4541                                 set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
4542                         else
4543                                 clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
4544                 }
4545         }
4546
4547         kvm_make_request(KVM_REQ_EVENT, vcpu);
4548
4549         return 0;
4550 }
4551
4552 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
4553                                              struct kvm_debugregs *dbgregs)
4554 {
4555         unsigned long val;
4556
4557         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
4558         kvm_get_dr(vcpu, 6, &val);
4559         dbgregs->dr6 = val;
4560         dbgregs->dr7 = vcpu->arch.dr7;
4561         dbgregs->flags = 0;
4562         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
4563 }
4564
4565 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
4566                                             struct kvm_debugregs *dbgregs)
4567 {
4568         if (dbgregs->flags)
4569                 return -EINVAL;
4570
4571         if (!kvm_dr6_valid(dbgregs->dr6))
4572                 return -EINVAL;
4573         if (!kvm_dr7_valid(dbgregs->dr7))
4574                 return -EINVAL;
4575
4576         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
4577         kvm_update_dr0123(vcpu);
4578         vcpu->arch.dr6 = dbgregs->dr6;
4579         vcpu->arch.dr7 = dbgregs->dr7;
4580         kvm_update_dr7(vcpu);
4581
4582         return 0;
4583 }
4584
4585 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
4586
4587 static void fill_xsave(u8 *dest, struct kvm_vcpu *vcpu)
4588 {
4589         struct xregs_state *xsave = &vcpu->arch.guest_fpu->state.xsave;
4590         u64 xstate_bv = xsave->header.xfeatures;
4591         u64 valid;
4592
4593         /*
4594          * Copy legacy XSAVE area, to avoid complications with CPUID
4595          * leaves 0 and 1 in the loop below.
4596          */
4597         memcpy(dest, xsave, XSAVE_HDR_OFFSET);
4598
4599         /* Set XSTATE_BV */
4600         xstate_bv &= vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FPSSE;
4601         *(u64 *)(dest + XSAVE_HDR_OFFSET) = xstate_bv;
4602
4603         /*
4604          * Copy each region from the possibly compacted offset to the
4605          * non-compacted offset.
4606          */
4607         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
4608         while (valid) {
4609                 u64 xfeature_mask = valid & -valid;
4610                 int xfeature_nr = fls64(xfeature_mask) - 1;
4611                 void *src = get_xsave_addr(xsave, xfeature_nr);
4612
4613                 if (src) {
4614                         u32 size, offset, ecx, edx;
4615                         cpuid_count(XSTATE_CPUID, xfeature_nr,
4616                                     &size, &offset, &ecx, &edx);
4617                         if (xfeature_nr == XFEATURE_PKRU)
4618                                 memcpy(dest + offset, &vcpu->arch.pkru,
4619                                        sizeof(vcpu->arch.pkru));
4620                         else
4621                                 memcpy(dest + offset, src, size);
4622
4623                 }
4624
4625                 valid -= xfeature_mask;
4626         }
4627 }
4628
4629 static void load_xsave(struct kvm_vcpu *vcpu, u8 *src)
4630 {
4631         struct xregs_state *xsave = &vcpu->arch.guest_fpu->state.xsave;
4632         u64 xstate_bv = *(u64 *)(src + XSAVE_HDR_OFFSET);
4633         u64 valid;
4634
4635         /*
4636          * Copy legacy XSAVE area, to avoid complications with CPUID
4637          * leaves 0 and 1 in the loop below.
4638          */
4639         memcpy(xsave, src, XSAVE_HDR_OFFSET);
4640
4641         /* Set XSTATE_BV and possibly XCOMP_BV.  */
4642         xsave->header.xfeatures = xstate_bv;
4643         if (boot_cpu_has(X86_FEATURE_XSAVES))
4644                 xsave->header.xcomp_bv = host_xcr0 | XSTATE_COMPACTION_ENABLED;
4645
4646         /*
4647          * Copy each region from the non-compacted offset to the
4648          * possibly compacted offset.
4649          */
4650         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
4651         while (valid) {
4652                 u64 xfeature_mask = valid & -valid;
4653                 int xfeature_nr = fls64(xfeature_mask) - 1;
4654                 void *dest = get_xsave_addr(xsave, xfeature_nr);
4655
4656                 if (dest) {
4657                         u32 size, offset, ecx, edx;
4658                         cpuid_count(XSTATE_CPUID, xfeature_nr,
4659                                     &size, &offset, &ecx, &edx);
4660                         if (xfeature_nr == XFEATURE_PKRU)
4661                                 memcpy(&vcpu->arch.pkru, src + offset,
4662                                        sizeof(vcpu->arch.pkru));
4663                         else
4664                                 memcpy(dest, src + offset, size);
4665                 }
4666
4667                 valid -= xfeature_mask;
4668         }
4669 }
4670
4671 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
4672                                          struct kvm_xsave *guest_xsave)
4673 {
4674         if (!vcpu->arch.guest_fpu)
4675                 return;
4676
4677         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
4678                 memset(guest_xsave, 0, sizeof(struct kvm_xsave));
4679                 fill_xsave((u8 *) guest_xsave->region, vcpu);
4680         } else {
4681                 memcpy(guest_xsave->region,
4682                         &vcpu->arch.guest_fpu->state.fxsave,
4683                         sizeof(struct fxregs_state));
4684                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
4685                         XFEATURE_MASK_FPSSE;
4686         }
4687 }
4688
4689 #define XSAVE_MXCSR_OFFSET 24
4690
4691 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
4692                                         struct kvm_xsave *guest_xsave)
4693 {
4694         u64 xstate_bv;
4695         u32 mxcsr;
4696
4697         if (!vcpu->arch.guest_fpu)
4698                 return 0;
4699
4700         xstate_bv = *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
4701         mxcsr = *(u32 *)&guest_xsave->region[XSAVE_MXCSR_OFFSET / sizeof(u32)];
4702
4703         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
4704                 /*
4705                  * Here we allow setting states that are not present in
4706                  * CPUID leaf 0xD, index 0, EDX:EAX.  This is for compatibility
4707                  * with old userspace.
4708                  */
4709                 if (xstate_bv & ~supported_xcr0 || mxcsr & ~mxcsr_feature_mask)
4710                         return -EINVAL;
4711                 load_xsave(vcpu, (u8 *)guest_xsave->region);
4712         } else {
4713                 if (xstate_bv & ~XFEATURE_MASK_FPSSE ||
4714                         mxcsr & ~mxcsr_feature_mask)
4715                         return -EINVAL;
4716                 memcpy(&vcpu->arch.guest_fpu->state.fxsave,
4717                         guest_xsave->region, sizeof(struct fxregs_state));
4718         }
4719         return 0;
4720 }
4721
4722 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
4723                                         struct kvm_xcrs *guest_xcrs)
4724 {
4725         if (!boot_cpu_has(X86_FEATURE_XSAVE)) {
4726                 guest_xcrs->nr_xcrs = 0;
4727                 return;
4728         }
4729
4730         guest_xcrs->nr_xcrs = 1;
4731         guest_xcrs->flags = 0;
4732         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
4733         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
4734 }
4735
4736 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
4737                                        struct kvm_xcrs *guest_xcrs)
4738 {
4739         int i, r = 0;
4740
4741         if (!boot_cpu_has(X86_FEATURE_XSAVE))
4742                 return -EINVAL;
4743
4744         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
4745                 return -EINVAL;
4746
4747         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
4748                 /* Only support XCR0 currently */
4749                 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
4750                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
4751                                 guest_xcrs->xcrs[i].value);
4752                         break;
4753                 }
4754         if (r)
4755                 r = -EINVAL;
4756         return r;
4757 }
4758
4759 /*
4760  * kvm_set_guest_paused() indicates to the guest kernel that it has been
4761  * stopped by the hypervisor.  This function will be called from the host only.
4762  * EINVAL is returned when the host attempts to set the flag for a guest that
4763  * does not support pv clocks.
4764  */
4765 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
4766 {
4767         if (!vcpu->arch.pv_time_enabled)
4768                 return -EINVAL;
4769         vcpu->arch.pvclock_set_guest_stopped_request = true;
4770         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4771         return 0;
4772 }
4773
4774 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
4775                                      struct kvm_enable_cap *cap)
4776 {
4777         int r;
4778         uint16_t vmcs_version;
4779         void __user *user_ptr;
4780
4781         if (cap->flags)
4782                 return -EINVAL;
4783
4784         switch (cap->cap) {
4785         case KVM_CAP_HYPERV_SYNIC2:
4786                 if (cap->args[0])
4787                         return -EINVAL;
4788                 fallthrough;
4789
4790         case KVM_CAP_HYPERV_SYNIC:
4791                 if (!irqchip_in_kernel(vcpu->kvm))
4792                         return -EINVAL;
4793                 return kvm_hv_activate_synic(vcpu, cap->cap ==
4794                                              KVM_CAP_HYPERV_SYNIC2);
4795         case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
4796                 if (!kvm_x86_ops.nested_ops->enable_evmcs)
4797                         return -ENOTTY;
4798                 r = kvm_x86_ops.nested_ops->enable_evmcs(vcpu, &vmcs_version);
4799                 if (!r) {
4800                         user_ptr = (void __user *)(uintptr_t)cap->args[0];
4801                         if (copy_to_user(user_ptr, &vmcs_version,
4802                                          sizeof(vmcs_version)))
4803                                 r = -EFAULT;
4804                 }
4805                 return r;
4806         case KVM_CAP_HYPERV_DIRECT_TLBFLUSH:
4807                 if (!kvm_x86_ops.enable_direct_tlbflush)
4808                         return -ENOTTY;
4809
4810                 return static_call(kvm_x86_enable_direct_tlbflush)(vcpu);
4811
4812         case KVM_CAP_ENFORCE_PV_FEATURE_CPUID:
4813                 vcpu->arch.pv_cpuid.enforce = cap->args[0];
4814                 if (vcpu->arch.pv_cpuid.enforce)
4815                         kvm_update_pv_runtime(vcpu);
4816
4817                 return 0;
4818         default:
4819                 return -EINVAL;
4820         }
4821 }
4822
4823 long kvm_arch_vcpu_ioctl(struct file *filp,
4824                          unsigned int ioctl, unsigned long arg)
4825 {
4826         struct kvm_vcpu *vcpu = filp->private_data;
4827         void __user *argp = (void __user *)arg;
4828         int r;
4829         union {
4830                 struct kvm_lapic_state *lapic;
4831                 struct kvm_xsave *xsave;
4832                 struct kvm_xcrs *xcrs;
4833                 void *buffer;
4834         } u;
4835
4836         vcpu_load(vcpu);
4837
4838         u.buffer = NULL;
4839         switch (ioctl) {
4840         case KVM_GET_LAPIC: {
4841                 r = -EINVAL;
4842                 if (!lapic_in_kernel(vcpu))
4843                         goto out;
4844                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state),
4845                                 GFP_KERNEL_ACCOUNT);
4846
4847                 r = -ENOMEM;
4848                 if (!u.lapic)
4849                         goto out;
4850                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
4851                 if (r)
4852                         goto out;
4853                 r = -EFAULT;
4854                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
4855                         goto out;
4856                 r = 0;
4857                 break;
4858         }
4859         case KVM_SET_LAPIC: {
4860                 r = -EINVAL;
4861                 if (!lapic_in_kernel(vcpu))
4862                         goto out;
4863                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
4864                 if (IS_ERR(u.lapic)) {
4865                         r = PTR_ERR(u.lapic);
4866                         goto out_nofree;
4867                 }
4868
4869                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
4870                 break;
4871         }
4872         case KVM_INTERRUPT: {
4873                 struct kvm_interrupt irq;
4874
4875                 r = -EFAULT;
4876                 if (copy_from_user(&irq, argp, sizeof(irq)))
4877                         goto out;
4878                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
4879                 break;
4880         }
4881         case KVM_NMI: {
4882                 r = kvm_vcpu_ioctl_nmi(vcpu);
4883                 break;
4884         }
4885         case KVM_SMI: {
4886                 r = kvm_vcpu_ioctl_smi(vcpu);
4887                 break;
4888         }
4889         case KVM_SET_CPUID: {
4890                 struct kvm_cpuid __user *cpuid_arg = argp;
4891                 struct kvm_cpuid cpuid;
4892
4893                 r = -EFAULT;
4894                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4895                         goto out;
4896                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
4897                 break;
4898         }
4899         case KVM_SET_CPUID2: {
4900                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4901                 struct kvm_cpuid2 cpuid;
4902
4903                 r = -EFAULT;
4904                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4905                         goto out;
4906                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
4907                                               cpuid_arg->entries);
4908                 break;
4909         }
4910         case KVM_GET_CPUID2: {
4911                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4912                 struct kvm_cpuid2 cpuid;
4913
4914                 r = -EFAULT;
4915                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4916                         goto out;
4917                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
4918                                               cpuid_arg->entries);
4919                 if (r)
4920                         goto out;
4921                 r = -EFAULT;
4922                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
4923                         goto out;
4924                 r = 0;
4925                 break;
4926         }
4927         case KVM_GET_MSRS: {
4928                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
4929                 r = msr_io(vcpu, argp, do_get_msr, 1);
4930                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4931                 break;
4932         }
4933         case KVM_SET_MSRS: {
4934                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
4935                 r = msr_io(vcpu, argp, do_set_msr, 0);
4936                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4937                 break;
4938         }
4939         case KVM_TPR_ACCESS_REPORTING: {
4940                 struct kvm_tpr_access_ctl tac;
4941
4942                 r = -EFAULT;
4943                 if (copy_from_user(&tac, argp, sizeof(tac)))
4944                         goto out;
4945                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
4946                 if (r)
4947                         goto out;
4948                 r = -EFAULT;
4949                 if (copy_to_user(argp, &tac, sizeof(tac)))
4950                         goto out;
4951                 r = 0;
4952                 break;
4953         };
4954         case KVM_SET_VAPIC_ADDR: {
4955                 struct kvm_vapic_addr va;
4956                 int idx;
4957
4958                 r = -EINVAL;
4959                 if (!lapic_in_kernel(vcpu))
4960                         goto out;
4961                 r = -EFAULT;
4962                 if (copy_from_user(&va, argp, sizeof(va)))
4963                         goto out;
4964                 idx = srcu_read_lock(&vcpu->kvm->srcu);
4965                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
4966                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4967                 break;
4968         }
4969         case KVM_X86_SETUP_MCE: {
4970                 u64 mcg_cap;
4971
4972                 r = -EFAULT;
4973                 if (copy_from_user(&mcg_cap, argp, sizeof(mcg_cap)))
4974                         goto out;
4975                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
4976                 break;
4977         }
4978         case KVM_X86_SET_MCE: {
4979                 struct kvm_x86_mce mce;
4980
4981                 r = -EFAULT;
4982                 if (copy_from_user(&mce, argp, sizeof(mce)))
4983                         goto out;
4984                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
4985                 break;
4986         }
4987         case KVM_GET_VCPU_EVENTS: {
4988                 struct kvm_vcpu_events events;
4989
4990                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
4991
4992                 r = -EFAULT;
4993                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
4994                         break;
4995                 r = 0;
4996                 break;
4997         }
4998         case KVM_SET_VCPU_EVENTS: {
4999                 struct kvm_vcpu_events events;
5000
5001                 r = -EFAULT;
5002                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
5003                         break;
5004
5005                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
5006                 break;
5007         }
5008         case KVM_GET_DEBUGREGS: {
5009                 struct kvm_debugregs dbgregs;
5010
5011                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
5012
5013                 r = -EFAULT;
5014                 if (copy_to_user(argp, &dbgregs,
5015                                  sizeof(struct kvm_debugregs)))
5016                         break;
5017                 r = 0;
5018                 break;
5019         }
5020         case KVM_SET_DEBUGREGS: {
5021                 struct kvm_debugregs dbgregs;
5022
5023                 r = -EFAULT;
5024                 if (copy_from_user(&dbgregs, argp,
5025                                    sizeof(struct kvm_debugregs)))
5026                         break;
5027
5028                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
5029                 break;
5030         }
5031         case KVM_GET_XSAVE: {
5032                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL_ACCOUNT);
5033                 r = -ENOMEM;
5034                 if (!u.xsave)
5035                         break;
5036
5037                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
5038
5039                 r = -EFAULT;
5040                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
5041                         break;
5042                 r = 0;
5043                 break;
5044         }
5045         case KVM_SET_XSAVE: {
5046                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
5047                 if (IS_ERR(u.xsave)) {
5048                         r = PTR_ERR(u.xsave);
5049                         goto out_nofree;
5050                 }
5051
5052                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
5053                 break;
5054         }
5055         case KVM_GET_XCRS: {
5056                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL_ACCOUNT);
5057                 r = -ENOMEM;
5058                 if (!u.xcrs)
5059                         break;
5060
5061                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
5062
5063                 r = -EFAULT;
5064                 if (copy_to_user(argp, u.xcrs,
5065                                  sizeof(struct kvm_xcrs)))
5066                         break;
5067                 r = 0;
5068                 break;
5069         }
5070         case KVM_SET_XCRS: {
5071                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
5072                 if (IS_ERR(u.xcrs)) {
5073                         r = PTR_ERR(u.xcrs);
5074                         goto out_nofree;
5075                 }
5076
5077                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
5078                 break;
5079         }
5080         case KVM_SET_TSC_KHZ: {
5081                 u32 user_tsc_khz;
5082
5083                 r = -EINVAL;
5084                 user_tsc_khz = (u32)arg;
5085
5086                 if (kvm_has_tsc_control &&
5087                     user_tsc_khz >= kvm_max_guest_tsc_khz)
5088                         goto out;
5089
5090                 if (user_tsc_khz == 0)
5091                         user_tsc_khz = tsc_khz;
5092
5093                 if (!kvm_set_tsc_khz(vcpu, user_tsc_khz))
5094                         r = 0;
5095
5096                 goto out;
5097         }
5098         case KVM_GET_TSC_KHZ: {
5099                 r = vcpu->arch.virtual_tsc_khz;
5100                 goto out;
5101         }
5102         case KVM_KVMCLOCK_CTRL: {
5103                 r = kvm_set_guest_paused(vcpu);
5104                 goto out;
5105         }
5106         case KVM_ENABLE_CAP: {
5107                 struct kvm_enable_cap cap;
5108
5109                 r = -EFAULT;
5110                 if (copy_from_user(&cap, argp, sizeof(cap)))
5111                         goto out;
5112                 r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap);
5113                 break;
5114         }
5115         case KVM_GET_NESTED_STATE: {
5116                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
5117                 u32 user_data_size;
5118
5119                 r = -EINVAL;
5120                 if (!kvm_x86_ops.nested_ops->get_state)
5121                         break;
5122
5123                 BUILD_BUG_ON(sizeof(user_data_size) != sizeof(user_kvm_nested_state->size));
5124                 r = -EFAULT;
5125                 if (get_user(user_data_size, &user_kvm_nested_state->size))
5126                         break;
5127
5128                 r = kvm_x86_ops.nested_ops->get_state(vcpu, user_kvm_nested_state,
5129                                                      user_data_size);
5130                 if (r < 0)
5131                         break;
5132
5133                 if (r > user_data_size) {
5134                         if (put_user(r, &user_kvm_nested_state->size))
5135                                 r = -EFAULT;
5136                         else
5137                                 r = -E2BIG;
5138                         break;
5139                 }
5140
5141                 r = 0;
5142                 break;
5143         }
5144         case KVM_SET_NESTED_STATE: {
5145                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
5146                 struct kvm_nested_state kvm_state;
5147                 int idx;
5148
5149                 r = -EINVAL;
5150                 if (!kvm_x86_ops.nested_ops->set_state)
5151                         break;
5152
5153                 r = -EFAULT;
5154                 if (copy_from_user(&kvm_state, user_kvm_nested_state, sizeof(kvm_state)))
5155                         break;
5156
5157                 r = -EINVAL;
5158                 if (kvm_state.size < sizeof(kvm_state))
5159                         break;
5160
5161                 if (kvm_state.flags &
5162                     ~(KVM_STATE_NESTED_RUN_PENDING | KVM_STATE_NESTED_GUEST_MODE
5163                       | KVM_STATE_NESTED_EVMCS | KVM_STATE_NESTED_MTF_PENDING
5164                       | KVM_STATE_NESTED_GIF_SET))
5165                         break;
5166
5167                 /* nested_run_pending implies guest_mode.  */
5168                 if ((kvm_state.flags & KVM_STATE_NESTED_RUN_PENDING)
5169                     && !(kvm_state.flags & KVM_STATE_NESTED_GUEST_MODE))
5170                         break;
5171
5172                 idx = srcu_read_lock(&vcpu->kvm->srcu);
5173                 r = kvm_x86_ops.nested_ops->set_state(vcpu, user_kvm_nested_state, &kvm_state);
5174                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5175                 break;
5176         }
5177         case KVM_GET_SUPPORTED_HV_CPUID:
5178                 r = kvm_ioctl_get_supported_hv_cpuid(vcpu, argp);
5179                 break;
5180 #ifdef CONFIG_KVM_XEN
5181         case KVM_XEN_VCPU_GET_ATTR: {
5182                 struct kvm_xen_vcpu_attr xva;
5183
5184                 r = -EFAULT;
5185                 if (copy_from_user(&xva, argp, sizeof(xva)))
5186                         goto out;
5187                 r = kvm_xen_vcpu_get_attr(vcpu, &xva);
5188                 if (!r && copy_to_user(argp, &xva, sizeof(xva)))
5189                         r = -EFAULT;
5190                 break;
5191         }
5192         case KVM_XEN_VCPU_SET_ATTR: {
5193                 struct kvm_xen_vcpu_attr xva;
5194
5195                 r = -EFAULT;
5196                 if (copy_from_user(&xva, argp, sizeof(xva)))
5197                         goto out;
5198                 r = kvm_xen_vcpu_set_attr(vcpu, &xva);
5199                 break;
5200         }
5201 #endif
5202         default:
5203                 r = -EINVAL;
5204         }
5205 out:
5206         kfree(u.buffer);
5207 out_nofree:
5208         vcpu_put(vcpu);
5209         return r;
5210 }
5211
5212 vm_fault_t kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
5213 {
5214         return VM_FAULT_SIGBUS;
5215 }
5216
5217 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
5218 {
5219         int ret;
5220
5221         if (addr > (unsigned int)(-3 * PAGE_SIZE))
5222                 return -EINVAL;
5223         ret = static_call(kvm_x86_set_tss_addr)(kvm, addr);
5224         return ret;
5225 }
5226
5227 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
5228                                               u64 ident_addr)
5229 {
5230         return static_call(kvm_x86_set_identity_map_addr)(kvm, ident_addr);
5231 }
5232
5233 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
5234                                          unsigned long kvm_nr_mmu_pages)
5235 {
5236         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
5237                 return -EINVAL;
5238
5239         mutex_lock(&kvm->slots_lock);
5240
5241         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
5242         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
5243
5244         mutex_unlock(&kvm->slots_lock);
5245         return 0;
5246 }
5247
5248 static unsigned long kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
5249 {
5250         return kvm->arch.n_max_mmu_pages;
5251 }
5252
5253 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
5254 {
5255         struct kvm_pic *pic = kvm->arch.vpic;
5256         int r;
5257
5258         r = 0;
5259         switch (chip->chip_id) {
5260         case KVM_IRQCHIP_PIC_MASTER:
5261                 memcpy(&chip->chip.pic, &pic->pics[0],
5262                         sizeof(struct kvm_pic_state));
5263                 break;
5264         case KVM_IRQCHIP_PIC_SLAVE:
5265                 memcpy(&chip->chip.pic, &pic->pics[1],
5266                         sizeof(struct kvm_pic_state));
5267                 break;
5268         case KVM_IRQCHIP_IOAPIC:
5269                 kvm_get_ioapic(kvm, &chip->chip.ioapic);
5270                 break;
5271         default:
5272                 r = -EINVAL;
5273                 break;
5274         }
5275         return r;
5276 }
5277
5278 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
5279 {
5280         struct kvm_pic *pic = kvm->arch.vpic;
5281         int r;
5282
5283         r = 0;
5284         switch (chip->chip_id) {
5285         case KVM_IRQCHIP_PIC_MASTER:
5286                 spin_lock(&pic->lock);
5287                 memcpy(&pic->pics[0], &chip->chip.pic,
5288                         sizeof(struct kvm_pic_state));
5289                 spin_unlock(&pic->lock);
5290                 break;
5291         case KVM_IRQCHIP_PIC_SLAVE:
5292                 spin_lock(&pic->lock);
5293                 memcpy(&pic->pics[1], &chip->chip.pic,
5294                         sizeof(struct kvm_pic_state));
5295                 spin_unlock(&pic->lock);
5296                 break;
5297         case KVM_IRQCHIP_IOAPIC:
5298                 kvm_set_ioapic(kvm, &chip->chip.ioapic);
5299                 break;
5300         default:
5301                 r = -EINVAL;
5302                 break;
5303         }
5304         kvm_pic_update_irq(pic);
5305         return r;
5306 }
5307
5308 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
5309 {
5310         struct kvm_kpit_state *kps = &kvm->arch.vpit->pit_state;
5311
5312         BUILD_BUG_ON(sizeof(*ps) != sizeof(kps->channels));
5313
5314         mutex_lock(&kps->lock);
5315         memcpy(ps, &kps->channels, sizeof(*ps));
5316         mutex_unlock(&kps->lock);
5317         return 0;
5318 }
5319
5320 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
5321 {
5322         int i;
5323         struct kvm_pit *pit = kvm->arch.vpit;
5324
5325         mutex_lock(&pit->pit_state.lock);
5326         memcpy(&pit->pit_state.channels, ps, sizeof(*ps));
5327         for (i = 0; i < 3; i++)
5328                 kvm_pit_load_count(pit, i, ps->channels[i].count, 0);
5329         mutex_unlock(&pit->pit_state.lock);
5330         return 0;
5331 }
5332
5333 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
5334 {
5335         mutex_lock(&kvm->arch.vpit->pit_state.lock);
5336         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
5337                 sizeof(ps->channels));
5338         ps->flags = kvm->arch.vpit->pit_state.flags;
5339         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
5340         memset(&ps->reserved, 0, sizeof(ps->reserved));
5341         return 0;
5342 }
5343
5344 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
5345 {
5346         int start = 0;
5347         int i;
5348         u32 prev_legacy, cur_legacy;
5349         struct kvm_pit *pit = kvm->arch.vpit;
5350
5351         mutex_lock(&pit->pit_state.lock);
5352         prev_legacy = pit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
5353         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
5354         if (!prev_legacy && cur_legacy)
5355                 start = 1;
5356         memcpy(&pit->pit_state.channels, &ps->channels,
5357                sizeof(pit->pit_state.channels));
5358         pit->pit_state.flags = ps->flags;
5359         for (i = 0; i < 3; i++)
5360                 kvm_pit_load_count(pit, i, pit->pit_state.channels[i].count,
5361                                    start && i == 0);
5362         mutex_unlock(&pit->pit_state.lock);
5363         return 0;
5364 }
5365
5366 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
5367                                  struct kvm_reinject_control *control)
5368 {
5369         struct kvm_pit *pit = kvm->arch.vpit;
5370
5371         /* pit->pit_state.lock was overloaded to prevent userspace from getting
5372          * an inconsistent state after running multiple KVM_REINJECT_CONTROL
5373          * ioctls in parallel.  Use a separate lock if that ioctl isn't rare.
5374          */
5375         mutex_lock(&pit->pit_state.lock);
5376         kvm_pit_set_reinject(pit, control->pit_reinject);
5377         mutex_unlock(&pit->pit_state.lock);
5378
5379         return 0;
5380 }
5381
5382 void kvm_arch_sync_dirty_log(struct kvm *kvm, struct kvm_memory_slot *memslot)
5383 {
5384
5385         /*
5386          * Flush all CPUs' dirty log buffers to the  dirty_bitmap.  Called
5387          * before reporting dirty_bitmap to userspace.  KVM flushes the buffers
5388          * on all VM-Exits, thus we only need to kick running vCPUs to force a
5389          * VM-Exit.
5390          */
5391         struct kvm_vcpu *vcpu;
5392         int i;
5393
5394         kvm_for_each_vcpu(i, vcpu, kvm)
5395                 kvm_vcpu_kick(vcpu);
5396 }
5397
5398 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
5399                         bool line_status)
5400 {
5401         if (!irqchip_in_kernel(kvm))
5402                 return -ENXIO;
5403
5404         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
5405                                         irq_event->irq, irq_event->level,
5406                                         line_status);
5407         return 0;
5408 }
5409
5410 int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
5411                             struct kvm_enable_cap *cap)
5412 {
5413         int r;
5414
5415         if (cap->flags)
5416                 return -EINVAL;
5417
5418         switch (cap->cap) {
5419         case KVM_CAP_DISABLE_QUIRKS:
5420                 kvm->arch.disabled_quirks = cap->args[0];
5421                 r = 0;
5422                 break;
5423         case KVM_CAP_SPLIT_IRQCHIP: {
5424                 mutex_lock(&kvm->lock);
5425                 r = -EINVAL;
5426                 if (cap->args[0] > MAX_NR_RESERVED_IOAPIC_PINS)
5427                         goto split_irqchip_unlock;
5428                 r = -EEXIST;
5429                 if (irqchip_in_kernel(kvm))
5430                         goto split_irqchip_unlock;
5431                 if (kvm->created_vcpus)
5432                         goto split_irqchip_unlock;
5433                 r = kvm_setup_empty_irq_routing(kvm);
5434                 if (r)
5435                         goto split_irqchip_unlock;
5436                 /* Pairs with irqchip_in_kernel. */
5437                 smp_wmb();
5438                 kvm->arch.irqchip_mode = KVM_IRQCHIP_SPLIT;
5439                 kvm->arch.nr_reserved_ioapic_pins = cap->args[0];
5440                 r = 0;
5441 split_irqchip_unlock:
5442                 mutex_unlock(&kvm->lock);
5443                 break;
5444         }
5445         case KVM_CAP_X2APIC_API:
5446                 r = -EINVAL;
5447                 if (cap->args[0] & ~KVM_X2APIC_API_VALID_FLAGS)
5448                         break;
5449
5450                 if (cap->args[0] & KVM_X2APIC_API_USE_32BIT_IDS)
5451                         kvm->arch.x2apic_format = true;
5452                 if (cap->args[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
5453                         kvm->arch.x2apic_broadcast_quirk_disabled = true;
5454
5455                 r = 0;
5456                 break;
5457         case KVM_CAP_X86_DISABLE_EXITS:
5458                 r = -EINVAL;
5459                 if (cap->args[0] & ~KVM_X86_DISABLE_VALID_EXITS)
5460                         break;
5461
5462                 if ((cap->args[0] & KVM_X86_DISABLE_EXITS_MWAIT) &&
5463                         kvm_can_mwait_in_guest())
5464                         kvm->arch.mwait_in_guest = true;
5465                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_HLT)
5466                         kvm->arch.hlt_in_guest = true;
5467                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_PAUSE)
5468                         kvm->arch.pause_in_guest = true;
5469                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_CSTATE)
5470                         kvm->arch.cstate_in_guest = true;
5471                 r = 0;
5472                 break;
5473         case KVM_CAP_MSR_PLATFORM_INFO:
5474                 kvm->arch.guest_can_read_msr_platform_info = cap->args[0];
5475                 r = 0;
5476                 break;
5477         case KVM_CAP_EXCEPTION_PAYLOAD:
5478                 kvm->arch.exception_payload_enabled = cap->args[0];
5479                 r = 0;
5480                 break;
5481         case KVM_CAP_X86_USER_SPACE_MSR:
5482                 kvm->arch.user_space_msr_mask = cap->args[0];
5483                 r = 0;
5484                 break;
5485         case KVM_CAP_X86_BUS_LOCK_EXIT:
5486                 r = -EINVAL;
5487                 if (cap->args[0] & ~KVM_BUS_LOCK_DETECTION_VALID_MODE)
5488                         break;
5489
5490                 if ((cap->args[0] & KVM_BUS_LOCK_DETECTION_OFF) &&
5491                     (cap->args[0] & KVM_BUS_LOCK_DETECTION_EXIT))
5492                         break;
5493
5494                 if (kvm_has_bus_lock_exit &&
5495                     cap->args[0] & KVM_BUS_LOCK_DETECTION_EXIT)
5496                         kvm->arch.bus_lock_detection_enabled = true;
5497                 r = 0;
5498                 break;
5499 #ifdef CONFIG_X86_SGX_KVM
5500         case KVM_CAP_SGX_ATTRIBUTE: {
5501                 unsigned long allowed_attributes = 0;
5502
5503                 r = sgx_set_attribute(&allowed_attributes, cap->args[0]);
5504                 if (r)
5505                         break;
5506
5507                 /* KVM only supports the PROVISIONKEY privileged attribute. */
5508                 if ((allowed_attributes & SGX_ATTR_PROVISIONKEY) &&
5509                     !(allowed_attributes & ~SGX_ATTR_PROVISIONKEY))
5510                         kvm->arch.sgx_provisioning_allowed = true;
5511                 else
5512                         r = -EINVAL;
5513                 break;
5514         }
5515 #endif
5516         case KVM_CAP_VM_COPY_ENC_CONTEXT_FROM:
5517                 r = -EINVAL;
5518                 if (kvm_x86_ops.vm_copy_enc_context_from)
5519                         r = kvm_x86_ops.vm_copy_enc_context_from(kvm, cap->args[0]);
5520                 return r;
5521         default:
5522                 r = -EINVAL;
5523                 break;
5524         }
5525         return r;
5526 }
5527
5528 static struct kvm_x86_msr_filter *kvm_alloc_msr_filter(bool default_allow)
5529 {
5530         struct kvm_x86_msr_filter *msr_filter;
5531
5532         msr_filter = kzalloc(sizeof(*msr_filter), GFP_KERNEL_ACCOUNT);
5533         if (!msr_filter)
5534                 return NULL;
5535
5536         msr_filter->default_allow = default_allow;
5537         return msr_filter;
5538 }
5539
5540 static void kvm_free_msr_filter(struct kvm_x86_msr_filter *msr_filter)
5541 {
5542         u32 i;
5543
5544         if (!msr_filter)
5545                 return;
5546
5547         for (i = 0; i < msr_filter->count; i++)
5548                 kfree(msr_filter->ranges[i].bitmap);
5549
5550         kfree(msr_filter);
5551 }
5552
5553 static int kvm_add_msr_filter(struct kvm_x86_msr_filter *msr_filter,
5554                               struct kvm_msr_filter_range *user_range)
5555 {
5556         unsigned long *bitmap = NULL;
5557         size_t bitmap_size;
5558
5559         if (!user_range->nmsrs)
5560                 return 0;
5561
5562         if (user_range->flags & ~(KVM_MSR_FILTER_READ | KVM_MSR_FILTER_WRITE))
5563                 return -EINVAL;
5564
5565         if (!user_range->flags)
5566                 return -EINVAL;
5567
5568         bitmap_size = BITS_TO_LONGS(user_range->nmsrs) * sizeof(long);
5569         if (!bitmap_size || bitmap_size > KVM_MSR_FILTER_MAX_BITMAP_SIZE)
5570                 return -EINVAL;
5571
5572         bitmap = memdup_user((__user u8*)user_range->bitmap, bitmap_size);
5573         if (IS_ERR(bitmap))
5574                 return PTR_ERR(bitmap);
5575
5576         msr_filter->ranges[msr_filter->count] = (struct msr_bitmap_range) {
5577                 .flags = user_range->flags,
5578                 .base = user_range->base,
5579                 .nmsrs = user_range->nmsrs,
5580                 .bitmap = bitmap,
5581         };
5582
5583         msr_filter->count++;
5584         return 0;
5585 }
5586
5587 static int kvm_vm_ioctl_set_msr_filter(struct kvm *kvm, void __user *argp)
5588 {
5589         struct kvm_msr_filter __user *user_msr_filter = argp;
5590         struct kvm_x86_msr_filter *new_filter, *old_filter;
5591         struct kvm_msr_filter filter;
5592         bool default_allow;
5593         bool empty = true;
5594         int r = 0;
5595         u32 i;
5596
5597         if (copy_from_user(&filter, user_msr_filter, sizeof(filter)))
5598                 return -EFAULT;
5599
5600         for (i = 0; i < ARRAY_SIZE(filter.ranges); i++)
5601                 empty &= !filter.ranges[i].nmsrs;
5602
5603         default_allow = !(filter.flags & KVM_MSR_FILTER_DEFAULT_DENY);
5604         if (empty && !default_allow)
5605                 return -EINVAL;
5606
5607         new_filter = kvm_alloc_msr_filter(default_allow);
5608         if (!new_filter)
5609                 return -ENOMEM;
5610
5611         for (i = 0; i < ARRAY_SIZE(filter.ranges); i++) {
5612                 r = kvm_add_msr_filter(new_filter, &filter.ranges[i]);
5613                 if (r) {
5614                         kvm_free_msr_filter(new_filter);
5615                         return r;
5616                 }
5617         }
5618
5619         mutex_lock(&kvm->lock);
5620
5621         /* The per-VM filter is protected by kvm->lock... */
5622         old_filter = srcu_dereference_check(kvm->arch.msr_filter, &kvm->srcu, 1);
5623
5624         rcu_assign_pointer(kvm->arch.msr_filter, new_filter);
5625         synchronize_srcu(&kvm->srcu);
5626
5627         kvm_free_msr_filter(old_filter);
5628
5629         kvm_make_all_cpus_request(kvm, KVM_REQ_MSR_FILTER_CHANGED);
5630         mutex_unlock(&kvm->lock);
5631
5632         return 0;
5633 }
5634
5635 long kvm_arch_vm_ioctl(struct file *filp,
5636                        unsigned int ioctl, unsigned long arg)
5637 {
5638         struct kvm *kvm = filp->private_data;
5639         void __user *argp = (void __user *)arg;
5640         int r = -ENOTTY;
5641         /*
5642          * This union makes it completely explicit to gcc-3.x
5643          * that these two variables' stack usage should be
5644          * combined, not added together.
5645          */
5646         union {
5647                 struct kvm_pit_state ps;
5648                 struct kvm_pit_state2 ps2;
5649                 struct kvm_pit_config pit_config;
5650         } u;
5651
5652         switch (ioctl) {
5653         case KVM_SET_TSS_ADDR:
5654                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
5655                 break;
5656         case KVM_SET_IDENTITY_MAP_ADDR: {
5657                 u64 ident_addr;
5658
5659                 mutex_lock(&kvm->lock);
5660                 r = -EINVAL;
5661                 if (kvm->created_vcpus)
5662                         goto set_identity_unlock;
5663                 r = -EFAULT;
5664                 if (copy_from_user(&ident_addr, argp, sizeof(ident_addr)))
5665                         goto set_identity_unlock;
5666                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
5667 set_identity_unlock:
5668                 mutex_unlock(&kvm->lock);
5669                 break;
5670         }
5671         case KVM_SET_NR_MMU_PAGES:
5672                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
5673                 break;
5674         case KVM_GET_NR_MMU_PAGES:
5675                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
5676                 break;
5677         case KVM_CREATE_IRQCHIP: {
5678                 mutex_lock(&kvm->lock);
5679
5680                 r = -EEXIST;
5681                 if (irqchip_in_kernel(kvm))
5682                         goto create_irqchip_unlock;
5683
5684                 r = -EINVAL;
5685                 if (kvm->created_vcpus)
5686                         goto create_irqchip_unlock;
5687
5688                 r = kvm_pic_init(kvm);
5689                 if (r)
5690                         goto create_irqchip_unlock;
5691
5692                 r = kvm_ioapic_init(kvm);
5693                 if (r) {
5694                         kvm_pic_destroy(kvm);
5695                         goto create_irqchip_unlock;
5696                 }
5697
5698                 r = kvm_setup_default_irq_routing(kvm);
5699                 if (r) {
5700                         kvm_ioapic_destroy(kvm);
5701                         kvm_pic_destroy(kvm);
5702                         goto create_irqchip_unlock;
5703                 }
5704                 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
5705                 smp_wmb();
5706                 kvm->arch.irqchip_mode = KVM_IRQCHIP_KERNEL;
5707         create_irqchip_unlock:
5708                 mutex_unlock(&kvm->lock);
5709                 break;
5710         }
5711         case KVM_CREATE_PIT:
5712                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
5713                 goto create_pit;
5714         case KVM_CREATE_PIT2:
5715                 r = -EFAULT;
5716                 if (copy_from_user(&u.pit_config, argp,
5717                                    sizeof(struct kvm_pit_config)))
5718                         goto out;
5719         create_pit:
5720                 mutex_lock(&kvm->lock);
5721                 r = -EEXIST;
5722                 if (kvm->arch.vpit)
5723                         goto create_pit_unlock;
5724                 r = -ENOMEM;
5725                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
5726                 if (kvm->arch.vpit)
5727                         r = 0;
5728         create_pit_unlock:
5729                 mutex_unlock(&kvm->lock);
5730                 break;
5731         case KVM_GET_IRQCHIP: {
5732                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
5733                 struct kvm_irqchip *chip;
5734
5735                 chip = memdup_user(argp, sizeof(*chip));
5736                 if (IS_ERR(chip)) {
5737                         r = PTR_ERR(chip);
5738                         goto out;
5739                 }
5740
5741                 r = -ENXIO;
5742                 if (!irqchip_kernel(kvm))
5743                         goto get_irqchip_out;
5744                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
5745                 if (r)
5746                         goto get_irqchip_out;
5747                 r = -EFAULT;
5748                 if (copy_to_user(argp, chip, sizeof(*chip)))
5749                         goto get_irqchip_out;
5750                 r = 0;
5751         get_irqchip_out:
5752                 kfree(chip);
5753                 break;
5754         }
5755         case KVM_SET_IRQCHIP: {
5756                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
5757                 struct kvm_irqchip *chip;
5758
5759                 chip = memdup_user(argp, sizeof(*chip));
5760                 if (IS_ERR(chip)) {
5761                         r = PTR_ERR(chip);
5762                         goto out;
5763                 }
5764
5765                 r = -ENXIO;
5766                 if (!irqchip_kernel(kvm))
5767                         goto set_irqchip_out;
5768                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
5769         set_irqchip_out:
5770                 kfree(chip);
5771                 break;
5772         }
5773         case KVM_GET_PIT: {
5774                 r = -EFAULT;
5775                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
5776                         goto out;
5777                 r = -ENXIO;
5778                 if (!kvm->arch.vpit)
5779                         goto out;
5780                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
5781                 if (r)
5782                         goto out;
5783                 r = -EFAULT;
5784                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
5785                         goto out;
5786                 r = 0;
5787                 break;
5788         }
5789         case KVM_SET_PIT: {
5790                 r = -EFAULT;
5791                 if (copy_from_user(&u.ps, argp, sizeof(u.ps)))
5792                         goto out;
5793                 mutex_lock(&kvm->lock);
5794                 r = -ENXIO;
5795                 if (!kvm->arch.vpit)
5796                         goto set_pit_out;
5797                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
5798 set_pit_out:
5799                 mutex_unlock(&kvm->lock);
5800                 break;
5801         }
5802         case KVM_GET_PIT2: {
5803                 r = -ENXIO;
5804                 if (!kvm->arch.vpit)
5805                         goto out;
5806                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
5807                 if (r)
5808                         goto out;
5809                 r = -EFAULT;
5810                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
5811                         goto out;
5812                 r = 0;
5813                 break;
5814         }
5815         case KVM_SET_PIT2: {
5816                 r = -EFAULT;
5817                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
5818                         goto out;
5819                 mutex_lock(&kvm->lock);
5820                 r = -ENXIO;
5821                 if (!kvm->arch.vpit)
5822                         goto set_pit2_out;
5823                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
5824 set_pit2_out:
5825                 mutex_unlock(&kvm->lock);
5826                 break;
5827         }
5828         case KVM_REINJECT_CONTROL: {
5829                 struct kvm_reinject_control control;
5830                 r =  -EFAULT;
5831                 if (copy_from_user(&control, argp, sizeof(control)))
5832                         goto out;
5833                 r = -ENXIO;
5834                 if (!kvm->arch.vpit)
5835                         goto out;
5836                 r = kvm_vm_ioctl_reinject(kvm, &control);
5837                 break;
5838         }
5839         case KVM_SET_BOOT_CPU_ID:
5840                 r = 0;
5841                 mutex_lock(&kvm->lock);
5842                 if (kvm->created_vcpus)
5843                         r = -EBUSY;
5844                 else
5845                         kvm->arch.bsp_vcpu_id = arg;
5846                 mutex_unlock(&kvm->lock);
5847                 break;
5848 #ifdef CONFIG_KVM_XEN
5849         case KVM_XEN_HVM_CONFIG: {
5850                 struct kvm_xen_hvm_config xhc;
5851                 r = -EFAULT;
5852                 if (copy_from_user(&xhc, argp, sizeof(xhc)))
5853                         goto out;
5854                 r = kvm_xen_hvm_config(kvm, &xhc);
5855                 break;
5856         }
5857         case KVM_XEN_HVM_GET_ATTR: {
5858                 struct kvm_xen_hvm_attr xha;
5859
5860                 r = -EFAULT;
5861                 if (copy_from_user(&xha, argp, sizeof(xha)))
5862                         goto out;
5863                 r = kvm_xen_hvm_get_attr(kvm, &xha);
5864                 if (!r && copy_to_user(argp, &xha, sizeof(xha)))
5865                         r = -EFAULT;
5866                 break;
5867         }
5868         case KVM_XEN_HVM_SET_ATTR: {
5869                 struct kvm_xen_hvm_attr xha;
5870
5871                 r = -EFAULT;
5872                 if (copy_from_user(&xha, argp, sizeof(xha)))
5873                         goto out;
5874                 r = kvm_xen_hvm_set_attr(kvm, &xha);
5875                 break;
5876         }
5877 #endif
5878         case KVM_SET_CLOCK: {
5879                 struct kvm_arch *ka = &kvm->arch;
5880                 struct kvm_clock_data user_ns;
5881                 u64 now_ns;
5882
5883                 r = -EFAULT;
5884                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
5885                         goto out;
5886
5887                 r = -EINVAL;
5888                 if (user_ns.flags)
5889                         goto out;
5890
5891                 r = 0;
5892                 /*
5893                  * TODO: userspace has to take care of races with VCPU_RUN, so
5894                  * kvm_gen_update_masterclock() can be cut down to locked
5895                  * pvclock_update_vm_gtod_copy().
5896                  */
5897                 kvm_gen_update_masterclock(kvm);
5898
5899                 /*
5900                  * This pairs with kvm_guest_time_update(): when masterclock is
5901                  * in use, we use master_kernel_ns + kvmclock_offset to set
5902                  * unsigned 'system_time' so if we use get_kvmclock_ns() (which
5903                  * is slightly ahead) here we risk going negative on unsigned
5904                  * 'system_time' when 'user_ns.clock' is very small.
5905                  */
5906                 spin_lock_irq(&ka->pvclock_gtod_sync_lock);
5907                 if (kvm->arch.use_master_clock)
5908                         now_ns = ka->master_kernel_ns;
5909                 else
5910                         now_ns = get_kvmclock_base_ns();
5911                 ka->kvmclock_offset = user_ns.clock - now_ns;
5912                 spin_unlock_irq(&ka->pvclock_gtod_sync_lock);
5913
5914                 kvm_make_all_cpus_request(kvm, KVM_REQ_CLOCK_UPDATE);
5915                 break;
5916         }
5917         case KVM_GET_CLOCK: {
5918                 struct kvm_clock_data user_ns;
5919                 u64 now_ns;
5920
5921                 now_ns = get_kvmclock_ns(kvm);
5922                 user_ns.clock = now_ns;
5923                 user_ns.flags = kvm->arch.use_master_clock ? KVM_CLOCK_TSC_STABLE : 0;
5924                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
5925
5926                 r = -EFAULT;
5927                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
5928                         goto out;
5929                 r = 0;
5930                 break;
5931         }
5932         case KVM_MEMORY_ENCRYPT_OP: {
5933                 r = -ENOTTY;
5934                 if (kvm_x86_ops.mem_enc_op)
5935                         r = static_call(kvm_x86_mem_enc_op)(kvm, argp);
5936                 break;
5937         }
5938         case KVM_MEMORY_ENCRYPT_REG_REGION: {
5939                 struct kvm_enc_region region;
5940
5941                 r = -EFAULT;
5942                 if (copy_from_user(&region, argp, sizeof(region)))
5943                         goto out;
5944
5945                 r = -ENOTTY;
5946                 if (kvm_x86_ops.mem_enc_reg_region)
5947                         r = static_call(kvm_x86_mem_enc_reg_region)(kvm, &region);
5948                 break;
5949         }
5950         case KVM_MEMORY_ENCRYPT_UNREG_REGION: {
5951                 struct kvm_enc_region region;
5952
5953                 r = -EFAULT;
5954                 if (copy_from_user(&region, argp, sizeof(region)))
5955                         goto out;
5956
5957                 r = -ENOTTY;
5958                 if (kvm_x86_ops.mem_enc_unreg_region)
5959                         r = static_call(kvm_x86_mem_enc_unreg_region)(kvm, &region);
5960                 break;
5961         }
5962         case KVM_HYPERV_EVENTFD: {
5963                 struct kvm_hyperv_eventfd hvevfd;
5964
5965                 r = -EFAULT;
5966                 if (copy_from_user(&hvevfd, argp, sizeof(hvevfd)))
5967                         goto out;
5968                 r = kvm_vm_ioctl_hv_eventfd(kvm, &hvevfd);
5969                 break;
5970         }
5971         case KVM_SET_PMU_EVENT_FILTER:
5972                 r = kvm_vm_ioctl_set_pmu_event_filter(kvm, argp);
5973                 break;
5974         case KVM_X86_SET_MSR_FILTER:
5975                 r = kvm_vm_ioctl_set_msr_filter(kvm, argp);
5976                 break;
5977         default:
5978                 r = -ENOTTY;
5979         }
5980 out:
5981         return r;
5982 }
5983
5984 static void kvm_init_msr_list(void)
5985 {
5986         struct x86_pmu_capability x86_pmu;
5987         u32 dummy[2];
5988         unsigned i;
5989
5990         BUILD_BUG_ON_MSG(INTEL_PMC_MAX_FIXED != 4,
5991                          "Please update the fixed PMCs in msrs_to_saved_all[]");
5992
5993         perf_get_x86_pmu_capability(&x86_pmu);
5994
5995         num_msrs_to_save = 0;
5996         num_emulated_msrs = 0;
5997         num_msr_based_features = 0;
5998
5999         for (i = 0; i < ARRAY_SIZE(msrs_to_save_all); i++) {
6000                 if (rdmsr_safe(msrs_to_save_all[i], &dummy[0], &dummy[1]) < 0)
6001                         continue;
6002
6003                 /*
6004                  * Even MSRs that are valid in the host may not be exposed
6005                  * to the guests in some cases.
6006                  */
6007                 switch (msrs_to_save_all[i]) {
6008                 case MSR_IA32_BNDCFGS:
6009                         if (!kvm_mpx_supported())
6010                                 continue;
6011                         break;
6012                 case MSR_TSC_AUX:
6013                         if (!kvm_cpu_cap_has(X86_FEATURE_RDTSCP) &&
6014                             !kvm_cpu_cap_has(X86_FEATURE_RDPID))
6015                                 continue;
6016                         break;
6017                 case MSR_IA32_UMWAIT_CONTROL:
6018                         if (!kvm_cpu_cap_has(X86_FEATURE_WAITPKG))
6019                                 continue;
6020                         break;
6021                 case MSR_IA32_RTIT_CTL:
6022                 case MSR_IA32_RTIT_STATUS:
6023                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT))
6024                                 continue;
6025                         break;
6026                 case MSR_IA32_RTIT_CR3_MATCH:
6027                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
6028                             !intel_pt_validate_hw_cap(PT_CAP_cr3_filtering))
6029                                 continue;
6030                         break;
6031                 case MSR_IA32_RTIT_OUTPUT_BASE:
6032                 case MSR_IA32_RTIT_OUTPUT_MASK:
6033                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
6034                                 (!intel_pt_validate_hw_cap(PT_CAP_topa_output) &&
6035                                  !intel_pt_validate_hw_cap(PT_CAP_single_range_output)))
6036                                 continue;
6037                         break;
6038                 case MSR_IA32_RTIT_ADDR0_A ... MSR_IA32_RTIT_ADDR3_B:
6039                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
6040                                 msrs_to_save_all[i] - MSR_IA32_RTIT_ADDR0_A >=
6041                                 intel_pt_validate_hw_cap(PT_CAP_num_address_ranges) * 2)
6042                                 continue;
6043                         break;
6044                 case MSR_ARCH_PERFMON_PERFCTR0 ... MSR_ARCH_PERFMON_PERFCTR0 + 17:
6045                         if (msrs_to_save_all[i] - MSR_ARCH_PERFMON_PERFCTR0 >=
6046                             min(INTEL_PMC_MAX_GENERIC, x86_pmu.num_counters_gp))
6047                                 continue;
6048                         break;
6049                 case MSR_ARCH_PERFMON_EVENTSEL0 ... MSR_ARCH_PERFMON_EVENTSEL0 + 17:
6050                         if (msrs_to_save_all[i] - MSR_ARCH_PERFMON_EVENTSEL0 >=
6051                             min(INTEL_PMC_MAX_GENERIC, x86_pmu.num_counters_gp))
6052                                 continue;
6053                         break;
6054                 default:
6055                         break;
6056                 }
6057
6058                 msrs_to_save[num_msrs_to_save++] = msrs_to_save_all[i];
6059         }
6060
6061         for (i = 0; i < ARRAY_SIZE(emulated_msrs_all); i++) {
6062                 if (!static_call(kvm_x86_has_emulated_msr)(NULL, emulated_msrs_all[i]))
6063                         continue;
6064
6065                 emulated_msrs[num_emulated_msrs++] = emulated_msrs_all[i];
6066         }
6067
6068         for (i = 0; i < ARRAY_SIZE(msr_based_features_all); i++) {
6069                 struct kvm_msr_entry msr;
6070
6071                 msr.index = msr_based_features_all[i];
6072                 if (kvm_get_msr_feature(&msr))
6073                         continue;
6074
6075                 msr_based_features[num_msr_based_features++] = msr_based_features_all[i];
6076         }
6077 }
6078
6079 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
6080                            const void *v)
6081 {
6082         int handled = 0;
6083         int n;
6084
6085         do {
6086                 n = min(len, 8);
6087                 if (!(lapic_in_kernel(vcpu) &&
6088                       !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
6089                     && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
6090                         break;
6091                 handled += n;
6092                 addr += n;
6093                 len -= n;
6094                 v += n;
6095         } while (len);
6096
6097         return handled;
6098 }
6099
6100 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
6101 {
6102         int handled = 0;
6103         int n;
6104
6105         do {
6106                 n = min(len, 8);
6107                 if (!(lapic_in_kernel(vcpu) &&
6108                       !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
6109                                          addr, n, v))
6110                     && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
6111                         break;
6112                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, v);
6113                 handled += n;
6114                 addr += n;
6115                 len -= n;
6116                 v += n;
6117         } while (len);
6118
6119         return handled;
6120 }
6121
6122 static void kvm_set_segment(struct kvm_vcpu *vcpu,
6123                         struct kvm_segment *var, int seg)
6124 {
6125         static_call(kvm_x86_set_segment)(vcpu, var, seg);
6126 }
6127
6128 void kvm_get_segment(struct kvm_vcpu *vcpu,
6129                      struct kvm_segment *var, int seg)
6130 {
6131         static_call(kvm_x86_get_segment)(vcpu, var, seg);
6132 }
6133
6134 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
6135                            struct x86_exception *exception)
6136 {
6137         gpa_t t_gpa;
6138
6139         BUG_ON(!mmu_is_nested(vcpu));
6140
6141         /* NPT walks are always user-walks */
6142         access |= PFERR_USER_MASK;
6143         t_gpa  = vcpu->arch.mmu->gva_to_gpa(vcpu, gpa, access, exception);
6144
6145         return t_gpa;
6146 }
6147
6148 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
6149                               struct x86_exception *exception)
6150 {
6151         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6152         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
6153 }
6154 EXPORT_SYMBOL_GPL(kvm_mmu_gva_to_gpa_read);
6155
6156  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
6157                                 struct x86_exception *exception)
6158 {
6159         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6160         access |= PFERR_FETCH_MASK;
6161         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
6162 }
6163
6164 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
6165                                struct x86_exception *exception)
6166 {
6167         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6168         access |= PFERR_WRITE_MASK;
6169         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
6170 }
6171 EXPORT_SYMBOL_GPL(kvm_mmu_gva_to_gpa_write);
6172
6173 /* uses this to access any guest's mapped memory without checking CPL */
6174 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
6175                                 struct x86_exception *exception)
6176 {
6177         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
6178 }
6179
6180 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
6181                                       struct kvm_vcpu *vcpu, u32 access,
6182                                       struct x86_exception *exception)
6183 {
6184         void *data = val;
6185         int r = X86EMUL_CONTINUE;
6186
6187         while (bytes) {
6188                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
6189                                                             exception);
6190                 unsigned offset = addr & (PAGE_SIZE-1);
6191                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
6192                 int ret;
6193
6194                 if (gpa == UNMAPPED_GVA)
6195                         return X86EMUL_PROPAGATE_FAULT;
6196                 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
6197                                                offset, toread);
6198                 if (ret < 0) {
6199                         r = X86EMUL_IO_NEEDED;
6200                         goto out;
6201                 }
6202
6203                 bytes -= toread;
6204                 data += toread;
6205                 addr += toread;
6206         }
6207 out:
6208         return r;
6209 }
6210
6211 /* used for instruction fetching */
6212 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
6213                                 gva_t addr, void *val, unsigned int bytes,
6214                                 struct x86_exception *exception)
6215 {
6216         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6217         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6218         unsigned offset;
6219         int ret;
6220
6221         /* Inline kvm_read_guest_virt_helper for speed.  */
6222         gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access|PFERR_FETCH_MASK,
6223                                                     exception);
6224         if (unlikely(gpa == UNMAPPED_GVA))
6225                 return X86EMUL_PROPAGATE_FAULT;
6226
6227         offset = addr & (PAGE_SIZE-1);
6228         if (WARN_ON(offset + bytes > PAGE_SIZE))
6229                 bytes = (unsigned)PAGE_SIZE - offset;
6230         ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
6231                                        offset, bytes);
6232         if (unlikely(ret < 0))
6233                 return X86EMUL_IO_NEEDED;
6234
6235         return X86EMUL_CONTINUE;
6236 }
6237
6238 int kvm_read_guest_virt(struct kvm_vcpu *vcpu,
6239                                gva_t addr, void *val, unsigned int bytes,
6240                                struct x86_exception *exception)
6241 {
6242         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6243
6244         /*
6245          * FIXME: this should call handle_emulation_failure if X86EMUL_IO_NEEDED
6246          * is returned, but our callers are not ready for that and they blindly
6247          * call kvm_inject_page_fault.  Ensure that they at least do not leak
6248          * uninitialized kernel stack memory into cr2 and error code.
6249          */
6250         memset(exception, 0, sizeof(*exception));
6251         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
6252                                           exception);
6253 }
6254 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
6255
6256 static int emulator_read_std(struct x86_emulate_ctxt *ctxt,
6257                              gva_t addr, void *val, unsigned int bytes,
6258                              struct x86_exception *exception, bool system)
6259 {
6260         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6261         u32 access = 0;
6262
6263         if (!system && static_call(kvm_x86_get_cpl)(vcpu) == 3)
6264                 access |= PFERR_USER_MASK;
6265
6266         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access, exception);
6267 }
6268
6269 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt *ctxt,
6270                 unsigned long addr, void *val, unsigned int bytes)
6271 {
6272         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6273         int r = kvm_vcpu_read_guest(vcpu, addr, val, bytes);
6274
6275         return r < 0 ? X86EMUL_IO_NEEDED : X86EMUL_CONTINUE;
6276 }
6277
6278 static int kvm_write_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
6279                                       struct kvm_vcpu *vcpu, u32 access,
6280                                       struct x86_exception *exception)
6281 {
6282         void *data = val;
6283         int r = X86EMUL_CONTINUE;
6284
6285         while (bytes) {
6286                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
6287                                                              access,
6288                                                              exception);
6289                 unsigned offset = addr & (PAGE_SIZE-1);
6290                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
6291                 int ret;
6292
6293                 if (gpa == UNMAPPED_GVA)
6294                         return X86EMUL_PROPAGATE_FAULT;
6295                 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
6296                 if (ret < 0) {
6297                         r = X86EMUL_IO_NEEDED;
6298                         goto out;
6299                 }
6300
6301                 bytes -= towrite;
6302                 data += towrite;
6303                 addr += towrite;
6304         }
6305 out:
6306         return r;
6307 }
6308
6309 static int emulator_write_std(struct x86_emulate_ctxt *ctxt, gva_t addr, void *val,
6310                               unsigned int bytes, struct x86_exception *exception,
6311                               bool system)
6312 {
6313         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6314         u32 access = PFERR_WRITE_MASK;
6315
6316         if (!system && static_call(kvm_x86_get_cpl)(vcpu) == 3)
6317                 access |= PFERR_USER_MASK;
6318
6319         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
6320                                            access, exception);
6321 }
6322
6323 int kvm_write_guest_virt_system(struct kvm_vcpu *vcpu, gva_t addr, void *val,
6324                                 unsigned int bytes, struct x86_exception *exception)
6325 {
6326         /* kvm_write_guest_virt_system can pull in tons of pages. */
6327         vcpu->arch.l1tf_flush_l1d = true;
6328
6329         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
6330                                            PFERR_WRITE_MASK, exception);
6331 }
6332 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
6333
6334 int handle_ud(struct kvm_vcpu *vcpu)
6335 {
6336         static const char kvm_emulate_prefix[] = { __KVM_EMULATE_PREFIX };
6337         int emul_type = EMULTYPE_TRAP_UD;
6338         char sig[5]; /* ud2; .ascii "kvm" */
6339         struct x86_exception e;
6340
6341         if (unlikely(!static_call(kvm_x86_can_emulate_instruction)(vcpu, NULL, 0)))
6342                 return 1;
6343
6344         if (force_emulation_prefix &&
6345             kvm_read_guest_virt(vcpu, kvm_get_linear_rip(vcpu),
6346                                 sig, sizeof(sig), &e) == 0 &&
6347             memcmp(sig, kvm_emulate_prefix, sizeof(sig)) == 0) {
6348                 kvm_rip_write(vcpu, kvm_rip_read(vcpu) + sizeof(sig));
6349                 emul_type = EMULTYPE_TRAP_UD_FORCED;
6350         }
6351
6352         return kvm_emulate_instruction(vcpu, emul_type);
6353 }
6354 EXPORT_SYMBOL_GPL(handle_ud);
6355
6356 static int vcpu_is_mmio_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
6357                             gpa_t gpa, bool write)
6358 {
6359         /* For APIC access vmexit */
6360         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
6361                 return 1;
6362
6363         if (vcpu_match_mmio_gpa(vcpu, gpa)) {
6364                 trace_vcpu_match_mmio(gva, gpa, write, true);
6365                 return 1;
6366         }
6367
6368         return 0;
6369 }
6370
6371 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
6372                                 gpa_t *gpa, struct x86_exception *exception,
6373                                 bool write)
6374 {
6375         u32 access = ((static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0)
6376                 | (write ? PFERR_WRITE_MASK : 0);
6377
6378         /*
6379          * currently PKRU is only applied to ept enabled guest so
6380          * there is no pkey in EPT page table for L1 guest or EPT
6381          * shadow page table for L2 guest.
6382          */
6383         if (vcpu_match_mmio_gva(vcpu, gva)
6384             && !permission_fault(vcpu, vcpu->arch.walk_mmu,
6385                                  vcpu->arch.mmio_access, 0, access)) {
6386                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
6387                                         (gva & (PAGE_SIZE - 1));
6388                 trace_vcpu_match_mmio(gva, *gpa, write, false);
6389                 return 1;
6390         }
6391
6392         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
6393
6394         if (*gpa == UNMAPPED_GVA)
6395                 return -1;
6396
6397         return vcpu_is_mmio_gpa(vcpu, gva, *gpa, write);
6398 }
6399
6400 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
6401                         const void *val, int bytes)
6402 {
6403         int ret;
6404
6405         ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
6406         if (ret < 0)
6407                 return 0;
6408         kvm_page_track_write(vcpu, gpa, val, bytes);
6409         return 1;
6410 }
6411
6412 struct read_write_emulator_ops {
6413         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
6414                                   int bytes);
6415         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
6416                                   void *val, int bytes);
6417         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
6418                                int bytes, void *val);
6419         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
6420                                     void *val, int bytes);
6421         bool write;
6422 };
6423
6424 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
6425 {
6426         if (vcpu->mmio_read_completed) {
6427                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
6428                                vcpu->mmio_fragments[0].gpa, val);
6429                 vcpu->mmio_read_completed = 0;
6430                 return 1;
6431         }
6432
6433         return 0;
6434 }
6435
6436 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
6437                         void *val, int bytes)
6438 {
6439         return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
6440 }
6441
6442 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
6443                          void *val, int bytes)
6444 {
6445         return emulator_write_phys(vcpu, gpa, val, bytes);
6446 }
6447
6448 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
6449 {
6450         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, val);
6451         return vcpu_mmio_write(vcpu, gpa, bytes, val);
6452 }
6453
6454 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
6455                           void *val, int bytes)
6456 {
6457         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, NULL);
6458         return X86EMUL_IO_NEEDED;
6459 }
6460
6461 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
6462                            void *val, int bytes)
6463 {
6464         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
6465
6466         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
6467         return X86EMUL_CONTINUE;
6468 }
6469
6470 static const struct read_write_emulator_ops read_emultor = {
6471         .read_write_prepare = read_prepare,
6472         .read_write_emulate = read_emulate,
6473         .read_write_mmio = vcpu_mmio_read,
6474         .read_write_exit_mmio = read_exit_mmio,
6475 };
6476
6477 static const struct read_write_emulator_ops write_emultor = {
6478         .read_write_emulate = write_emulate,
6479         .read_write_mmio = write_mmio,
6480         .read_write_exit_mmio = write_exit_mmio,
6481         .write = true,
6482 };
6483
6484 static int emulator_read_write_onepage(unsigned long addr, void *val,
6485                                        unsigned int bytes,
6486                                        struct x86_exception *exception,
6487                                        struct kvm_vcpu *vcpu,
6488                                        const struct read_write_emulator_ops *ops)
6489 {
6490         gpa_t gpa;
6491         int handled, ret;
6492         bool write = ops->write;
6493         struct kvm_mmio_fragment *frag;
6494         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
6495
6496         /*
6497          * If the exit was due to a NPF we may already have a GPA.
6498          * If the GPA is present, use it to avoid the GVA to GPA table walk.
6499          * Note, this cannot be used on string operations since string
6500          * operation using rep will only have the initial GPA from the NPF
6501          * occurred.
6502          */
6503         if (ctxt->gpa_available && emulator_can_use_gpa(ctxt) &&
6504             (addr & ~PAGE_MASK) == (ctxt->gpa_val & ~PAGE_MASK)) {
6505                 gpa = ctxt->gpa_val;
6506                 ret = vcpu_is_mmio_gpa(vcpu, addr, gpa, write);
6507         } else {
6508                 ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
6509                 if (ret < 0)
6510                         return X86EMUL_PROPAGATE_FAULT;
6511         }
6512
6513         if (!ret && ops->read_write_emulate(vcpu, gpa, val, bytes))
6514                 return X86EMUL_CONTINUE;
6515
6516         /*
6517          * Is this MMIO handled locally?
6518          */
6519         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
6520         if (handled == bytes)
6521                 return X86EMUL_CONTINUE;
6522
6523         gpa += handled;
6524         bytes -= handled;
6525         val += handled;
6526
6527         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
6528         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
6529         frag->gpa = gpa;
6530         frag->data = val;
6531         frag->len = bytes;
6532         return X86EMUL_CONTINUE;
6533 }
6534
6535 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
6536                         unsigned long addr,
6537                         void *val, unsigned int bytes,
6538                         struct x86_exception *exception,
6539                         const struct read_write_emulator_ops *ops)
6540 {
6541         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6542         gpa_t gpa;
6543         int rc;
6544
6545         if (ops->read_write_prepare &&
6546                   ops->read_write_prepare(vcpu, val, bytes))
6547                 return X86EMUL_CONTINUE;
6548
6549         vcpu->mmio_nr_fragments = 0;
6550
6551         /* Crossing a page boundary? */
6552         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
6553                 int now;
6554
6555                 now = -addr & ~PAGE_MASK;
6556                 rc = emulator_read_write_onepage(addr, val, now, exception,
6557                                                  vcpu, ops);
6558
6559                 if (rc != X86EMUL_CONTINUE)
6560                         return rc;
6561                 addr += now;
6562                 if (ctxt->mode != X86EMUL_MODE_PROT64)
6563                         addr = (u32)addr;
6564                 val += now;
6565                 bytes -= now;
6566         }
6567
6568         rc = emulator_read_write_onepage(addr, val, bytes, exception,
6569                                          vcpu, ops);
6570         if (rc != X86EMUL_CONTINUE)
6571                 return rc;
6572
6573         if (!vcpu->mmio_nr_fragments)
6574                 return rc;
6575
6576         gpa = vcpu->mmio_fragments[0].gpa;
6577
6578         vcpu->mmio_needed = 1;
6579         vcpu->mmio_cur_fragment = 0;
6580
6581         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
6582         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
6583         vcpu->run->exit_reason = KVM_EXIT_MMIO;
6584         vcpu->run->mmio.phys_addr = gpa;
6585
6586         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
6587 }
6588
6589 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
6590                                   unsigned long addr,
6591                                   void *val,
6592                                   unsigned int bytes,
6593                                   struct x86_exception *exception)
6594 {
6595         return emulator_read_write(ctxt, addr, val, bytes,
6596                                    exception, &read_emultor);
6597 }
6598
6599 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
6600                             unsigned long addr,
6601                             const void *val,
6602                             unsigned int bytes,
6603                             struct x86_exception *exception)
6604 {
6605         return emulator_read_write(ctxt, addr, (void *)val, bytes,
6606                                    exception, &write_emultor);
6607 }
6608
6609 #define CMPXCHG_TYPE(t, ptr, old, new) \
6610         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
6611
6612 #ifdef CONFIG_X86_64
6613 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
6614 #else
6615 #  define CMPXCHG64(ptr, old, new) \
6616         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
6617 #endif
6618
6619 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
6620                                      unsigned long addr,
6621                                      const void *old,
6622                                      const void *new,
6623                                      unsigned int bytes,
6624                                      struct x86_exception *exception)
6625 {
6626         struct kvm_host_map map;
6627         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6628         u64 page_line_mask;
6629         gpa_t gpa;
6630         char *kaddr;
6631         bool exchanged;
6632
6633         /* guests cmpxchg8b have to be emulated atomically */
6634         if (bytes > 8 || (bytes & (bytes - 1)))
6635                 goto emul_write;
6636
6637         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
6638
6639         if (gpa == UNMAPPED_GVA ||
6640             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
6641                 goto emul_write;
6642
6643         /*
6644          * Emulate the atomic as a straight write to avoid #AC if SLD is
6645          * enabled in the host and the access splits a cache line.
6646          */
6647         if (boot_cpu_has(X86_FEATURE_SPLIT_LOCK_DETECT))
6648                 page_line_mask = ~(cache_line_size() - 1);
6649         else
6650                 page_line_mask = PAGE_MASK;
6651
6652         if (((gpa + bytes - 1) & page_line_mask) != (gpa & page_line_mask))
6653                 goto emul_write;
6654
6655         if (kvm_vcpu_map(vcpu, gpa_to_gfn(gpa), &map))
6656                 goto emul_write;
6657
6658         kaddr = map.hva + offset_in_page(gpa);
6659
6660         switch (bytes) {
6661         case 1:
6662                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
6663                 break;
6664         case 2:
6665                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
6666                 break;
6667         case 4:
6668                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
6669                 break;
6670         case 8:
6671                 exchanged = CMPXCHG64(kaddr, old, new);
6672                 break;
6673         default:
6674                 BUG();
6675         }
6676
6677         kvm_vcpu_unmap(vcpu, &map, true);
6678
6679         if (!exchanged)
6680                 return X86EMUL_CMPXCHG_FAILED;
6681
6682         kvm_page_track_write(vcpu, gpa, new, bytes);
6683
6684         return X86EMUL_CONTINUE;
6685
6686 emul_write:
6687         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
6688
6689         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
6690 }
6691
6692 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
6693 {
6694         int r = 0, i;
6695
6696         for (i = 0; i < vcpu->arch.pio.count; i++) {
6697                 if (vcpu->arch.pio.in)
6698                         r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
6699                                             vcpu->arch.pio.size, pd);
6700                 else
6701                         r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
6702                                              vcpu->arch.pio.port, vcpu->arch.pio.size,
6703                                              pd);
6704                 if (r)
6705                         break;
6706                 pd += vcpu->arch.pio.size;
6707         }
6708         return r;
6709 }
6710
6711 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
6712                                unsigned short port, void *val,
6713                                unsigned int count, bool in)
6714 {
6715         vcpu->arch.pio.port = port;
6716         vcpu->arch.pio.in = in;
6717         vcpu->arch.pio.count  = count;
6718         vcpu->arch.pio.size = size;
6719
6720         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
6721                 vcpu->arch.pio.count = 0;
6722                 return 1;
6723         }
6724
6725         vcpu->run->exit_reason = KVM_EXIT_IO;
6726         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
6727         vcpu->run->io.size = size;
6728         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
6729         vcpu->run->io.count = count;
6730         vcpu->run->io.port = port;
6731
6732         return 0;
6733 }
6734
6735 static int emulator_pio_in(struct kvm_vcpu *vcpu, int size,
6736                            unsigned short port, void *val, unsigned int count)
6737 {
6738         int ret;
6739
6740         if (vcpu->arch.pio.count)
6741                 goto data_avail;
6742
6743         memset(vcpu->arch.pio_data, 0, size * count);
6744
6745         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
6746         if (ret) {
6747 data_avail:
6748                 memcpy(val, vcpu->arch.pio_data, size * count);
6749                 trace_kvm_pio(KVM_PIO_IN, port, size, count, vcpu->arch.pio_data);
6750                 vcpu->arch.pio.count = 0;
6751                 return 1;
6752         }
6753
6754         return 0;
6755 }
6756
6757 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
6758                                     int size, unsigned short port, void *val,
6759                                     unsigned int count)
6760 {
6761         return emulator_pio_in(emul_to_vcpu(ctxt), size, port, val, count);
6762
6763 }
6764
6765 static int emulator_pio_out(struct kvm_vcpu *vcpu, int size,
6766                             unsigned short port, const void *val,
6767                             unsigned int count)
6768 {
6769         memcpy(vcpu->arch.pio_data, val, size * count);
6770         trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
6771         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
6772 }
6773
6774 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
6775                                      int size, unsigned short port,
6776                                      const void *val, unsigned int count)
6777 {
6778         return emulator_pio_out(emul_to_vcpu(ctxt), size, port, val, count);
6779 }
6780
6781 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
6782 {
6783         return static_call(kvm_x86_get_segment_base)(vcpu, seg);
6784 }
6785
6786 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
6787 {
6788         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
6789 }
6790
6791 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
6792 {
6793         if (!need_emulate_wbinvd(vcpu))
6794                 return X86EMUL_CONTINUE;
6795
6796         if (static_call(kvm_x86_has_wbinvd_exit)()) {
6797                 int cpu = get_cpu();
6798
6799                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
6800                 on_each_cpu_mask(vcpu->arch.wbinvd_dirty_mask,
6801                                 wbinvd_ipi, NULL, 1);
6802                 put_cpu();
6803                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
6804         } else
6805                 wbinvd();
6806         return X86EMUL_CONTINUE;
6807 }
6808
6809 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
6810 {
6811         kvm_emulate_wbinvd_noskip(vcpu);
6812         return kvm_skip_emulated_instruction(vcpu);
6813 }
6814 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
6815
6816
6817
6818 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
6819 {
6820         kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
6821 }
6822
6823 static void emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
6824                             unsigned long *dest)
6825 {
6826         kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
6827 }
6828
6829 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
6830                            unsigned long value)
6831 {
6832
6833         return kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
6834 }
6835
6836 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
6837 {
6838         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
6839 }
6840
6841 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
6842 {
6843         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6844         unsigned long value;
6845
6846         switch (cr) {
6847         case 0:
6848                 value = kvm_read_cr0(vcpu);
6849                 break;
6850         case 2:
6851                 value = vcpu->arch.cr2;
6852                 break;
6853         case 3:
6854                 value = kvm_read_cr3(vcpu);
6855                 break;
6856         case 4:
6857                 value = kvm_read_cr4(vcpu);
6858                 break;
6859         case 8:
6860                 value = kvm_get_cr8(vcpu);
6861                 break;
6862         default:
6863                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
6864                 return 0;
6865         }
6866
6867         return value;
6868 }
6869
6870 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
6871 {
6872         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6873         int res = 0;
6874
6875         switch (cr) {
6876         case 0:
6877                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
6878                 break;
6879         case 2:
6880                 vcpu->arch.cr2 = val;
6881                 break;
6882         case 3:
6883                 res = kvm_set_cr3(vcpu, val);
6884                 break;
6885         case 4:
6886                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
6887                 break;
6888         case 8:
6889                 res = kvm_set_cr8(vcpu, val);
6890                 break;
6891         default:
6892                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
6893                 res = -1;
6894         }
6895
6896         return res;
6897 }
6898
6899 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
6900 {
6901         return static_call(kvm_x86_get_cpl)(emul_to_vcpu(ctxt));
6902 }
6903
6904 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
6905 {
6906         static_call(kvm_x86_get_gdt)(emul_to_vcpu(ctxt), dt);
6907 }
6908
6909 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
6910 {
6911         static_call(kvm_x86_get_idt)(emul_to_vcpu(ctxt), dt);
6912 }
6913
6914 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
6915 {
6916         static_call(kvm_x86_set_gdt)(emul_to_vcpu(ctxt), dt);
6917 }
6918
6919 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
6920 {
6921         static_call(kvm_x86_set_idt)(emul_to_vcpu(ctxt), dt);
6922 }
6923
6924 static unsigned long emulator_get_cached_segment_base(
6925         struct x86_emulate_ctxt *ctxt, int seg)
6926 {
6927         return get_segment_base(emul_to_vcpu(ctxt), seg);
6928 }
6929
6930 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
6931                                  struct desc_struct *desc, u32 *base3,
6932                                  int seg)
6933 {
6934         struct kvm_segment var;
6935
6936         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
6937         *selector = var.selector;
6938
6939         if (var.unusable) {
6940                 memset(desc, 0, sizeof(*desc));
6941                 if (base3)
6942                         *base3 = 0;
6943                 return false;
6944         }
6945
6946         if (var.g)
6947                 var.limit >>= 12;
6948         set_desc_limit(desc, var.limit);
6949         set_desc_base(desc, (unsigned long)var.base);
6950 #ifdef CONFIG_X86_64
6951         if (base3)
6952                 *base3 = var.base >> 32;
6953 #endif
6954         desc->type = var.type;
6955         desc->s = var.s;
6956         desc->dpl = var.dpl;
6957         desc->p = var.present;
6958         desc->avl = var.avl;
6959         desc->l = var.l;
6960         desc->d = var.db;
6961         desc->g = var.g;
6962
6963         return true;
6964 }
6965
6966 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
6967                                  struct desc_struct *desc, u32 base3,
6968                                  int seg)
6969 {
6970         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6971         struct kvm_segment var;
6972
6973         var.selector = selector;
6974         var.base = get_desc_base(desc);
6975 #ifdef CONFIG_X86_64
6976         var.base |= ((u64)base3) << 32;
6977 #endif
6978         var.limit = get_desc_limit(desc);
6979         if (desc->g)
6980                 var.limit = (var.limit << 12) | 0xfff;
6981         var.type = desc->type;
6982         var.dpl = desc->dpl;
6983         var.db = desc->d;
6984         var.s = desc->s;
6985         var.l = desc->l;
6986         var.g = desc->g;
6987         var.avl = desc->avl;
6988         var.present = desc->p;
6989         var.unusable = !var.present;
6990         var.padding = 0;
6991
6992         kvm_set_segment(vcpu, &var, seg);
6993         return;
6994 }
6995
6996 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
6997                             u32 msr_index, u64 *pdata)
6998 {
6999         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7000         int r;
7001
7002         r = kvm_get_msr(vcpu, msr_index, pdata);
7003
7004         if (r && kvm_get_msr_user_space(vcpu, msr_index, r)) {
7005                 /* Bounce to user space */
7006                 return X86EMUL_IO_NEEDED;
7007         }
7008
7009         return r;
7010 }
7011
7012 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
7013                             u32 msr_index, u64 data)
7014 {
7015         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7016         int r;
7017
7018         r = kvm_set_msr(vcpu, msr_index, data);
7019
7020         if (r && kvm_set_msr_user_space(vcpu, msr_index, data, r)) {
7021                 /* Bounce to user space */
7022                 return X86EMUL_IO_NEEDED;
7023         }
7024
7025         return r;
7026 }
7027
7028 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
7029 {
7030         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7031
7032         return vcpu->arch.smbase;
7033 }
7034
7035 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
7036 {
7037         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7038
7039         vcpu->arch.smbase = smbase;
7040 }
7041
7042 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
7043                               u32 pmc)
7044 {
7045         return kvm_pmu_is_valid_rdpmc_ecx(emul_to_vcpu(ctxt), pmc);
7046 }
7047
7048 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
7049                              u32 pmc, u64 *pdata)
7050 {
7051         return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
7052 }
7053
7054 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
7055 {
7056         emul_to_vcpu(ctxt)->arch.halt_request = 1;
7057 }
7058
7059 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
7060                               struct x86_instruction_info *info,
7061                               enum x86_intercept_stage stage)
7062 {
7063         return static_call(kvm_x86_check_intercept)(emul_to_vcpu(ctxt), info, stage,
7064                                             &ctxt->exception);
7065 }
7066
7067 static bool emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
7068                               u32 *eax, u32 *ebx, u32 *ecx, u32 *edx,
7069                               bool exact_only)
7070 {
7071         return kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx, exact_only);
7072 }
7073
7074 static bool emulator_guest_has_long_mode(struct x86_emulate_ctxt *ctxt)
7075 {
7076         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_LM);
7077 }
7078
7079 static bool emulator_guest_has_movbe(struct x86_emulate_ctxt *ctxt)
7080 {
7081         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_MOVBE);
7082 }
7083
7084 static bool emulator_guest_has_fxsr(struct x86_emulate_ctxt *ctxt)
7085 {
7086         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_FXSR);
7087 }
7088
7089 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
7090 {
7091         return kvm_register_read_raw(emul_to_vcpu(ctxt), reg);
7092 }
7093
7094 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
7095 {
7096         kvm_register_write_raw(emul_to_vcpu(ctxt), reg, val);
7097 }
7098
7099 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
7100 {
7101         static_call(kvm_x86_set_nmi_mask)(emul_to_vcpu(ctxt), masked);
7102 }
7103
7104 static unsigned emulator_get_hflags(struct x86_emulate_ctxt *ctxt)
7105 {
7106         return emul_to_vcpu(ctxt)->arch.hflags;
7107 }
7108
7109 static void emulator_set_hflags(struct x86_emulate_ctxt *ctxt, unsigned emul_flags)
7110 {
7111         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7112
7113         vcpu->arch.hflags = emul_flags;
7114         kvm_mmu_reset_context(vcpu);
7115 }
7116
7117 static int emulator_pre_leave_smm(struct x86_emulate_ctxt *ctxt,
7118                                   const char *smstate)
7119 {
7120         return static_call(kvm_x86_pre_leave_smm)(emul_to_vcpu(ctxt), smstate);
7121 }
7122
7123 static void emulator_post_leave_smm(struct x86_emulate_ctxt *ctxt)
7124 {
7125         kvm_smm_changed(emul_to_vcpu(ctxt));
7126 }
7127
7128 static int emulator_set_xcr(struct x86_emulate_ctxt *ctxt, u32 index, u64 xcr)
7129 {
7130         return __kvm_set_xcr(emul_to_vcpu(ctxt), index, xcr);
7131 }
7132
7133 static const struct x86_emulate_ops emulate_ops = {
7134         .read_gpr            = emulator_read_gpr,
7135         .write_gpr           = emulator_write_gpr,
7136         .read_std            = emulator_read_std,
7137         .write_std           = emulator_write_std,
7138         .read_phys           = kvm_read_guest_phys_system,
7139         .fetch               = kvm_fetch_guest_virt,
7140         .read_emulated       = emulator_read_emulated,
7141         .write_emulated      = emulator_write_emulated,
7142         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
7143         .invlpg              = emulator_invlpg,
7144         .pio_in_emulated     = emulator_pio_in_emulated,
7145         .pio_out_emulated    = emulator_pio_out_emulated,
7146         .get_segment         = emulator_get_segment,
7147         .set_segment         = emulator_set_segment,
7148         .get_cached_segment_base = emulator_get_cached_segment_base,
7149         .get_gdt             = emulator_get_gdt,
7150         .get_idt             = emulator_get_idt,
7151         .set_gdt             = emulator_set_gdt,
7152         .set_idt             = emulator_set_idt,
7153         .get_cr              = emulator_get_cr,
7154         .set_cr              = emulator_set_cr,
7155         .cpl                 = emulator_get_cpl,
7156         .get_dr              = emulator_get_dr,
7157         .set_dr              = emulator_set_dr,
7158         .get_smbase          = emulator_get_smbase,
7159         .set_smbase          = emulator_set_smbase,
7160         .set_msr             = emulator_set_msr,
7161         .get_msr             = emulator_get_msr,
7162         .check_pmc           = emulator_check_pmc,
7163         .read_pmc            = emulator_read_pmc,
7164         .halt                = emulator_halt,
7165         .wbinvd              = emulator_wbinvd,
7166         .fix_hypercall       = emulator_fix_hypercall,
7167         .intercept           = emulator_intercept,
7168         .get_cpuid           = emulator_get_cpuid,
7169         .guest_has_long_mode = emulator_guest_has_long_mode,
7170         .guest_has_movbe     = emulator_guest_has_movbe,
7171         .guest_has_fxsr      = emulator_guest_has_fxsr,
7172         .set_nmi_mask        = emulator_set_nmi_mask,
7173         .get_hflags          = emulator_get_hflags,
7174         .set_hflags          = emulator_set_hflags,
7175         .pre_leave_smm       = emulator_pre_leave_smm,
7176         .post_leave_smm      = emulator_post_leave_smm,
7177         .set_xcr             = emulator_set_xcr,
7178 };
7179
7180 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
7181 {
7182         u32 int_shadow = static_call(kvm_x86_get_interrupt_shadow)(vcpu);
7183         /*
7184          * an sti; sti; sequence only disable interrupts for the first
7185          * instruction. So, if the last instruction, be it emulated or
7186          * not, left the system with the INT_STI flag enabled, it
7187          * means that the last instruction is an sti. We should not
7188          * leave the flag on in this case. The same goes for mov ss
7189          */
7190         if (int_shadow & mask)
7191                 mask = 0;
7192         if (unlikely(int_shadow || mask)) {
7193                 static_call(kvm_x86_set_interrupt_shadow)(vcpu, mask);
7194                 if (!mask)
7195                         kvm_make_request(KVM_REQ_EVENT, vcpu);
7196         }
7197 }
7198
7199 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
7200 {
7201         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7202         if (ctxt->exception.vector == PF_VECTOR)
7203                 return kvm_inject_emulated_page_fault(vcpu, &ctxt->exception);
7204
7205         if (ctxt->exception.error_code_valid)
7206                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
7207                                       ctxt->exception.error_code);
7208         else
7209                 kvm_queue_exception(vcpu, ctxt->exception.vector);
7210         return false;
7211 }
7212
7213 static struct x86_emulate_ctxt *alloc_emulate_ctxt(struct kvm_vcpu *vcpu)
7214 {
7215         struct x86_emulate_ctxt *ctxt;
7216
7217         ctxt = kmem_cache_zalloc(x86_emulator_cache, GFP_KERNEL_ACCOUNT);
7218         if (!ctxt) {
7219                 pr_err("kvm: failed to allocate vcpu's emulator\n");
7220                 return NULL;
7221         }
7222
7223         ctxt->vcpu = vcpu;
7224         ctxt->ops = &emulate_ops;
7225         vcpu->arch.emulate_ctxt = ctxt;
7226
7227         return ctxt;
7228 }
7229
7230 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
7231 {
7232         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7233         int cs_db, cs_l;
7234
7235         static_call(kvm_x86_get_cs_db_l_bits)(vcpu, &cs_db, &cs_l);
7236
7237         ctxt->gpa_available = false;
7238         ctxt->eflags = kvm_get_rflags(vcpu);
7239         ctxt->tf = (ctxt->eflags & X86_EFLAGS_TF) != 0;
7240
7241         ctxt->eip = kvm_rip_read(vcpu);
7242         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
7243                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
7244                      (cs_l && is_long_mode(vcpu))       ? X86EMUL_MODE_PROT64 :
7245                      cs_db                              ? X86EMUL_MODE_PROT32 :
7246                                                           X86EMUL_MODE_PROT16;
7247         BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
7248         BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
7249         BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
7250
7251         ctxt->interruptibility = 0;
7252         ctxt->have_exception = false;
7253         ctxt->exception.vector = -1;
7254         ctxt->perm_ok = false;
7255
7256         init_decode_cache(ctxt);
7257         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
7258 }
7259
7260 void kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
7261 {
7262         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7263         int ret;
7264
7265         init_emulate_ctxt(vcpu);
7266
7267         ctxt->op_bytes = 2;
7268         ctxt->ad_bytes = 2;
7269         ctxt->_eip = ctxt->eip + inc_eip;
7270         ret = emulate_int_real(ctxt, irq);
7271
7272         if (ret != X86EMUL_CONTINUE) {
7273                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
7274         } else {
7275                 ctxt->eip = ctxt->_eip;
7276                 kvm_rip_write(vcpu, ctxt->eip);
7277                 kvm_set_rflags(vcpu, ctxt->eflags);
7278         }
7279 }
7280 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
7281
7282 static int handle_emulation_failure(struct kvm_vcpu *vcpu, int emulation_type)
7283 {
7284         ++vcpu->stat.insn_emulation_fail;
7285         trace_kvm_emulate_insn_failed(vcpu);
7286
7287         if (emulation_type & EMULTYPE_VMWARE_GP) {
7288                 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
7289                 return 1;
7290         }
7291
7292         if (emulation_type & EMULTYPE_SKIP) {
7293                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
7294                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
7295                 vcpu->run->internal.ndata = 0;
7296                 return 0;
7297         }
7298
7299         kvm_queue_exception(vcpu, UD_VECTOR);
7300
7301         if (!is_guest_mode(vcpu) && static_call(kvm_x86_get_cpl)(vcpu) == 0) {
7302                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
7303                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
7304                 vcpu->run->internal.ndata = 0;
7305                 return 0;
7306         }
7307
7308         return 1;
7309 }
7310
7311 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa,
7312                                   bool write_fault_to_shadow_pgtable,
7313                                   int emulation_type)
7314 {
7315         gpa_t gpa = cr2_or_gpa;
7316         kvm_pfn_t pfn;
7317
7318         if (!(emulation_type & EMULTYPE_ALLOW_RETRY_PF))
7319                 return false;
7320
7321         if (WARN_ON_ONCE(is_guest_mode(vcpu)) ||
7322             WARN_ON_ONCE(!(emulation_type & EMULTYPE_PF)))
7323                 return false;
7324
7325         if (!vcpu->arch.mmu->direct_map) {
7326                 /*
7327                  * Write permission should be allowed since only
7328                  * write access need to be emulated.
7329                  */
7330                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2_or_gpa, NULL);
7331
7332                 /*
7333                  * If the mapping is invalid in guest, let cpu retry
7334                  * it to generate fault.
7335                  */
7336                 if (gpa == UNMAPPED_GVA)
7337                         return true;
7338         }
7339
7340         /*
7341          * Do not retry the unhandleable instruction if it faults on the
7342          * readonly host memory, otherwise it will goto a infinite loop:
7343          * retry instruction -> write #PF -> emulation fail -> retry
7344          * instruction -> ...
7345          */
7346         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
7347
7348         /*
7349          * If the instruction failed on the error pfn, it can not be fixed,
7350          * report the error to userspace.
7351          */
7352         if (is_error_noslot_pfn(pfn))
7353                 return false;
7354
7355         kvm_release_pfn_clean(pfn);
7356
7357         /* The instructions are well-emulated on direct mmu. */
7358         if (vcpu->arch.mmu->direct_map) {
7359                 unsigned int indirect_shadow_pages;
7360
7361                 write_lock(&vcpu->kvm->mmu_lock);
7362                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
7363                 write_unlock(&vcpu->kvm->mmu_lock);
7364
7365                 if (indirect_shadow_pages)
7366                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
7367
7368                 return true;
7369         }
7370
7371         /*
7372          * if emulation was due to access to shadowed page table
7373          * and it failed try to unshadow page and re-enter the
7374          * guest to let CPU execute the instruction.
7375          */
7376         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
7377
7378         /*
7379          * If the access faults on its page table, it can not
7380          * be fixed by unprotecting shadow page and it should
7381          * be reported to userspace.
7382          */
7383         return !write_fault_to_shadow_pgtable;
7384 }
7385
7386 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
7387                               gpa_t cr2_or_gpa,  int emulation_type)
7388 {
7389         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7390         unsigned long last_retry_eip, last_retry_addr, gpa = cr2_or_gpa;
7391
7392         last_retry_eip = vcpu->arch.last_retry_eip;
7393         last_retry_addr = vcpu->arch.last_retry_addr;
7394
7395         /*
7396          * If the emulation is caused by #PF and it is non-page_table
7397          * writing instruction, it means the VM-EXIT is caused by shadow
7398          * page protected, we can zap the shadow page and retry this
7399          * instruction directly.
7400          *
7401          * Note: if the guest uses a non-page-table modifying instruction
7402          * on the PDE that points to the instruction, then we will unmap
7403          * the instruction and go to an infinite loop. So, we cache the
7404          * last retried eip and the last fault address, if we meet the eip
7405          * and the address again, we can break out of the potential infinite
7406          * loop.
7407          */
7408         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
7409
7410         if (!(emulation_type & EMULTYPE_ALLOW_RETRY_PF))
7411                 return false;
7412
7413         if (WARN_ON_ONCE(is_guest_mode(vcpu)) ||
7414             WARN_ON_ONCE(!(emulation_type & EMULTYPE_PF)))
7415                 return false;
7416
7417         if (x86_page_table_writing_insn(ctxt))
7418                 return false;
7419
7420         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2_or_gpa)
7421                 return false;
7422
7423         vcpu->arch.last_retry_eip = ctxt->eip;
7424         vcpu->arch.last_retry_addr = cr2_or_gpa;
7425
7426         if (!vcpu->arch.mmu->direct_map)
7427                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2_or_gpa, NULL);
7428
7429         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
7430
7431         return true;
7432 }
7433
7434 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
7435 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
7436
7437 static void kvm_smm_changed(struct kvm_vcpu *vcpu)
7438 {
7439         if (!(vcpu->arch.hflags & HF_SMM_MASK)) {
7440                 /* This is a good place to trace that we are exiting SMM.  */
7441                 trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, false);
7442
7443                 /* Process a latched INIT or SMI, if any.  */
7444                 kvm_make_request(KVM_REQ_EVENT, vcpu);
7445         }
7446
7447         kvm_mmu_reset_context(vcpu);
7448 }
7449
7450 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
7451                                 unsigned long *db)
7452 {
7453         u32 dr6 = 0;
7454         int i;
7455         u32 enable, rwlen;
7456
7457         enable = dr7;
7458         rwlen = dr7 >> 16;
7459         for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
7460                 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
7461                         dr6 |= (1 << i);
7462         return dr6;
7463 }
7464
7465 static int kvm_vcpu_do_singlestep(struct kvm_vcpu *vcpu)
7466 {
7467         struct kvm_run *kvm_run = vcpu->run;
7468
7469         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
7470                 kvm_run->debug.arch.dr6 = DR6_BS | DR6_ACTIVE_LOW;
7471                 kvm_run->debug.arch.pc = kvm_get_linear_rip(vcpu);
7472                 kvm_run->debug.arch.exception = DB_VECTOR;
7473                 kvm_run->exit_reason = KVM_EXIT_DEBUG;
7474                 return 0;
7475         }
7476         kvm_queue_exception_p(vcpu, DB_VECTOR, DR6_BS);
7477         return 1;
7478 }
7479
7480 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu)
7481 {
7482         unsigned long rflags = static_call(kvm_x86_get_rflags)(vcpu);
7483         int r;
7484
7485         r = static_call(kvm_x86_skip_emulated_instruction)(vcpu);
7486         if (unlikely(!r))
7487                 return 0;
7488
7489         /*
7490          * rflags is the old, "raw" value of the flags.  The new value has
7491          * not been saved yet.
7492          *
7493          * This is correct even for TF set by the guest, because "the
7494          * processor will not generate this exception after the instruction
7495          * that sets the TF flag".
7496          */
7497         if (unlikely(rflags & X86_EFLAGS_TF))
7498                 r = kvm_vcpu_do_singlestep(vcpu);
7499         return r;
7500 }
7501 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction);
7502
7503 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
7504 {
7505         if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
7506             (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
7507                 struct kvm_run *kvm_run = vcpu->run;
7508                 unsigned long eip = kvm_get_linear_rip(vcpu);
7509                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
7510                                            vcpu->arch.guest_debug_dr7,
7511                                            vcpu->arch.eff_db);
7512
7513                 if (dr6 != 0) {
7514                         kvm_run->debug.arch.dr6 = dr6 | DR6_ACTIVE_LOW;
7515                         kvm_run->debug.arch.pc = eip;
7516                         kvm_run->debug.arch.exception = DB_VECTOR;
7517                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
7518                         *r = 0;
7519                         return true;
7520                 }
7521         }
7522
7523         if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
7524             !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
7525                 unsigned long eip = kvm_get_linear_rip(vcpu);
7526                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
7527                                            vcpu->arch.dr7,
7528                                            vcpu->arch.db);
7529
7530                 if (dr6 != 0) {
7531                         kvm_queue_exception_p(vcpu, DB_VECTOR, dr6);
7532                         *r = 1;
7533                         return true;
7534                 }
7535         }
7536
7537         return false;
7538 }
7539
7540 static bool is_vmware_backdoor_opcode(struct x86_emulate_ctxt *ctxt)
7541 {
7542         switch (ctxt->opcode_len) {
7543         case 1:
7544                 switch (ctxt->b) {
7545                 case 0xe4:      /* IN */
7546                 case 0xe5:
7547                 case 0xec:
7548                 case 0xed:
7549                 case 0xe6:      /* OUT */
7550                 case 0xe7:
7551                 case 0xee:
7552                 case 0xef:
7553                 case 0x6c:      /* INS */
7554                 case 0x6d:
7555                 case 0x6e:      /* OUTS */
7556                 case 0x6f:
7557                         return true;
7558                 }
7559                 break;
7560         case 2:
7561                 switch (ctxt->b) {
7562                 case 0x33:      /* RDPMC */
7563                         return true;
7564                 }
7565                 break;
7566         }
7567
7568         return false;
7569 }
7570
7571 /*
7572  * Decode to be emulated instruction. Return EMULATION_OK if success.
7573  */
7574 int x86_decode_emulated_instruction(struct kvm_vcpu *vcpu, int emulation_type,
7575                                     void *insn, int insn_len)
7576 {
7577         int r = EMULATION_OK;
7578         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7579
7580         init_emulate_ctxt(vcpu);
7581
7582         /*
7583          * We will reenter on the same instruction since we do not set
7584          * complete_userspace_io. This does not handle watchpoints yet,
7585          * those would be handled in the emulate_ops.
7586          */
7587         if (!(emulation_type & EMULTYPE_SKIP) &&
7588             kvm_vcpu_check_breakpoint(vcpu, &r))
7589                 return r;
7590
7591         r = x86_decode_insn(ctxt, insn, insn_len, emulation_type);
7592
7593         trace_kvm_emulate_insn_start(vcpu);
7594         ++vcpu->stat.insn_emulation;
7595
7596         return r;
7597 }
7598 EXPORT_SYMBOL_GPL(x86_decode_emulated_instruction);
7599
7600 int x86_emulate_instruction(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa,
7601                             int emulation_type, void *insn, int insn_len)
7602 {
7603         int r;
7604         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7605         bool writeback = true;
7606         bool write_fault_to_spt;
7607
7608         if (unlikely(!static_call(kvm_x86_can_emulate_instruction)(vcpu, insn, insn_len)))
7609                 return 1;
7610
7611         vcpu->arch.l1tf_flush_l1d = true;
7612
7613         /*
7614          * Clear write_fault_to_shadow_pgtable here to ensure it is
7615          * never reused.
7616          */
7617         write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
7618         vcpu->arch.write_fault_to_shadow_pgtable = false;
7619
7620         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
7621                 kvm_clear_exception_queue(vcpu);
7622
7623                 r = x86_decode_emulated_instruction(vcpu, emulation_type,
7624                                                     insn, insn_len);
7625                 if (r != EMULATION_OK)  {
7626                         if ((emulation_type & EMULTYPE_TRAP_UD) ||
7627                             (emulation_type & EMULTYPE_TRAP_UD_FORCED)) {
7628                                 kvm_queue_exception(vcpu, UD_VECTOR);
7629                                 return 1;
7630                         }
7631                         if (reexecute_instruction(vcpu, cr2_or_gpa,
7632                                                   write_fault_to_spt,
7633                                                   emulation_type))
7634                                 return 1;
7635                         if (ctxt->have_exception) {
7636                                 /*
7637                                  * #UD should result in just EMULATION_FAILED, and trap-like
7638                                  * exception should not be encountered during decode.
7639                                  */
7640                                 WARN_ON_ONCE(ctxt->exception.vector == UD_VECTOR ||
7641                                              exception_type(ctxt->exception.vector) == EXCPT_TRAP);
7642                                 inject_emulated_exception(vcpu);
7643                                 return 1;
7644                         }
7645                         return handle_emulation_failure(vcpu, emulation_type);
7646                 }
7647         }
7648
7649         if ((emulation_type & EMULTYPE_VMWARE_GP) &&
7650             !is_vmware_backdoor_opcode(ctxt)) {
7651                 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
7652                 return 1;
7653         }
7654
7655         /*
7656          * Note, EMULTYPE_SKIP is intended for use *only* by vendor callbacks
7657          * for kvm_skip_emulated_instruction().  The caller is responsible for
7658          * updating interruptibility state and injecting single-step #DBs.
7659          */
7660         if (emulation_type & EMULTYPE_SKIP) {
7661                 kvm_rip_write(vcpu, ctxt->_eip);
7662                 if (ctxt->eflags & X86_EFLAGS_RF)
7663                         kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
7664                 return 1;
7665         }
7666
7667         if (retry_instruction(ctxt, cr2_or_gpa, emulation_type))
7668                 return 1;
7669
7670         /* this is needed for vmware backdoor interface to work since it
7671            changes registers values  during IO operation */
7672         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
7673                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
7674                 emulator_invalidate_register_cache(ctxt);
7675         }
7676
7677 restart:
7678         if (emulation_type & EMULTYPE_PF) {
7679                 /* Save the faulting GPA (cr2) in the address field */
7680                 ctxt->exception.address = cr2_or_gpa;
7681
7682                 /* With shadow page tables, cr2 contains a GVA or nGPA. */
7683                 if (vcpu->arch.mmu->direct_map) {
7684                         ctxt->gpa_available = true;
7685                         ctxt->gpa_val = cr2_or_gpa;
7686                 }
7687         } else {
7688                 /* Sanitize the address out of an abundance of paranoia. */
7689                 ctxt->exception.address = 0;
7690         }
7691
7692         r = x86_emulate_insn(ctxt);
7693
7694         if (r == EMULATION_INTERCEPTED)
7695                 return 1;
7696
7697         if (r == EMULATION_FAILED) {
7698                 if (reexecute_instruction(vcpu, cr2_or_gpa, write_fault_to_spt,
7699                                         emulation_type))
7700                         return 1;
7701
7702                 return handle_emulation_failure(vcpu, emulation_type);
7703         }
7704
7705         if (ctxt->have_exception) {
7706                 r = 1;
7707                 if (inject_emulated_exception(vcpu))
7708                         return r;
7709         } else if (vcpu->arch.pio.count) {
7710                 if (!vcpu->arch.pio.in) {
7711                         /* FIXME: return into emulator if single-stepping.  */
7712                         vcpu->arch.pio.count = 0;
7713                 } else {
7714                         writeback = false;
7715                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
7716                 }
7717                 r = 0;
7718         } else if (vcpu->mmio_needed) {
7719                 ++vcpu->stat.mmio_exits;
7720
7721                 if (!vcpu->mmio_is_write)
7722                         writeback = false;
7723                 r = 0;
7724                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
7725         } else if (r == EMULATION_RESTART)
7726                 goto restart;
7727         else
7728                 r = 1;
7729
7730         if (writeback) {
7731                 unsigned long rflags = static_call(kvm_x86_get_rflags)(vcpu);
7732                 toggle_interruptibility(vcpu, ctxt->interruptibility);
7733                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
7734                 if (!ctxt->have_exception ||
7735                     exception_type(ctxt->exception.vector) == EXCPT_TRAP) {
7736                         kvm_rip_write(vcpu, ctxt->eip);
7737                         if (r && (ctxt->tf || (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)))
7738                                 r = kvm_vcpu_do_singlestep(vcpu);
7739                         if (kvm_x86_ops.update_emulated_instruction)
7740                                 static_call(kvm_x86_update_emulated_instruction)(vcpu);
7741                         __kvm_set_rflags(vcpu, ctxt->eflags);
7742                 }
7743
7744                 /*
7745                  * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
7746                  * do nothing, and it will be requested again as soon as
7747                  * the shadow expires.  But we still need to check here,
7748                  * because POPF has no interrupt shadow.
7749                  */
7750                 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
7751                         kvm_make_request(KVM_REQ_EVENT, vcpu);
7752         } else
7753                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
7754
7755         return r;
7756 }
7757
7758 int kvm_emulate_instruction(struct kvm_vcpu *vcpu, int emulation_type)
7759 {
7760         return x86_emulate_instruction(vcpu, 0, emulation_type, NULL, 0);
7761 }
7762 EXPORT_SYMBOL_GPL(kvm_emulate_instruction);
7763
7764 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu *vcpu,
7765                                         void *insn, int insn_len)
7766 {
7767         return x86_emulate_instruction(vcpu, 0, 0, insn, insn_len);
7768 }
7769 EXPORT_SYMBOL_GPL(kvm_emulate_instruction_from_buffer);
7770
7771 static int complete_fast_pio_out_port_0x7e(struct kvm_vcpu *vcpu)
7772 {
7773         vcpu->arch.pio.count = 0;
7774         return 1;
7775 }
7776
7777 static int complete_fast_pio_out(struct kvm_vcpu *vcpu)
7778 {
7779         vcpu->arch.pio.count = 0;
7780
7781         if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip)))
7782                 return 1;
7783
7784         return kvm_skip_emulated_instruction(vcpu);
7785 }
7786
7787 static int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size,
7788                             unsigned short port)
7789 {
7790         unsigned long val = kvm_rax_read(vcpu);
7791         int ret = emulator_pio_out(vcpu, size, port, &val, 1);
7792
7793         if (ret)
7794                 return ret;
7795
7796         /*
7797          * Workaround userspace that relies on old KVM behavior of %rip being
7798          * incremented prior to exiting to userspace to handle "OUT 0x7e".
7799          */
7800         if (port == 0x7e &&
7801             kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_OUT_7E_INC_RIP)) {
7802                 vcpu->arch.complete_userspace_io =
7803                         complete_fast_pio_out_port_0x7e;
7804                 kvm_skip_emulated_instruction(vcpu);
7805         } else {
7806                 vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
7807                 vcpu->arch.complete_userspace_io = complete_fast_pio_out;
7808         }
7809         return 0;
7810 }
7811
7812 static int complete_fast_pio_in(struct kvm_vcpu *vcpu)
7813 {
7814         unsigned long val;
7815
7816         /* We should only ever be called with arch.pio.count equal to 1 */
7817         BUG_ON(vcpu->arch.pio.count != 1);
7818
7819         if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip))) {
7820                 vcpu->arch.pio.count = 0;
7821                 return 1;
7822         }
7823
7824         /* For size less than 4 we merge, else we zero extend */
7825         val = (vcpu->arch.pio.size < 4) ? kvm_rax_read(vcpu) : 0;
7826
7827         /*
7828          * Since vcpu->arch.pio.count == 1 let emulator_pio_in perform
7829          * the copy and tracing
7830          */
7831         emulator_pio_in(vcpu, vcpu->arch.pio.size, vcpu->arch.pio.port, &val, 1);
7832         kvm_rax_write(vcpu, val);
7833
7834         return kvm_skip_emulated_instruction(vcpu);
7835 }
7836
7837 static int kvm_fast_pio_in(struct kvm_vcpu *vcpu, int size,
7838                            unsigned short port)
7839 {
7840         unsigned long val;
7841         int ret;
7842
7843         /* For size less than 4 we merge, else we zero extend */
7844         val = (size < 4) ? kvm_rax_read(vcpu) : 0;
7845
7846         ret = emulator_pio_in(vcpu, size, port, &val, 1);
7847         if (ret) {
7848                 kvm_rax_write(vcpu, val);
7849                 return ret;
7850         }
7851
7852         vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
7853         vcpu->arch.complete_userspace_io = complete_fast_pio_in;
7854
7855         return 0;
7856 }
7857
7858 int kvm_fast_pio(struct kvm_vcpu *vcpu, int size, unsigned short port, int in)
7859 {
7860         int ret;
7861
7862         if (in)
7863                 ret = kvm_fast_pio_in(vcpu, size, port);
7864         else
7865                 ret = kvm_fast_pio_out(vcpu, size, port);
7866         return ret && kvm_skip_emulated_instruction(vcpu);
7867 }
7868 EXPORT_SYMBOL_GPL(kvm_fast_pio);
7869
7870 static int kvmclock_cpu_down_prep(unsigned int cpu)
7871 {
7872         __this_cpu_write(cpu_tsc_khz, 0);
7873         return 0;
7874 }
7875
7876 static void tsc_khz_changed(void *data)
7877 {
7878         struct cpufreq_freqs *freq = data;
7879         unsigned long khz = 0;
7880
7881         if (data)
7882                 khz = freq->new;
7883         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
7884                 khz = cpufreq_quick_get(raw_smp_processor_id());
7885         if (!khz)
7886                 khz = tsc_khz;
7887         __this_cpu_write(cpu_tsc_khz, khz);
7888 }
7889
7890 #ifdef CONFIG_X86_64
7891 static void kvm_hyperv_tsc_notifier(void)
7892 {
7893         struct kvm *kvm;
7894         struct kvm_vcpu *vcpu;
7895         int cpu;
7896         unsigned long flags;
7897
7898         mutex_lock(&kvm_lock);
7899         list_for_each_entry(kvm, &vm_list, vm_list)
7900                 kvm_make_mclock_inprogress_request(kvm);
7901
7902         hyperv_stop_tsc_emulation();
7903
7904         /* TSC frequency always matches when on Hyper-V */
7905         for_each_present_cpu(cpu)
7906                 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
7907         kvm_max_guest_tsc_khz = tsc_khz;
7908
7909         list_for_each_entry(kvm, &vm_list, vm_list) {
7910                 struct kvm_arch *ka = &kvm->arch;
7911
7912                 spin_lock_irqsave(&ka->pvclock_gtod_sync_lock, flags);
7913                 pvclock_update_vm_gtod_copy(kvm);
7914                 spin_unlock_irqrestore(&ka->pvclock_gtod_sync_lock, flags);
7915
7916                 kvm_for_each_vcpu(cpu, vcpu, kvm)
7917                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
7918
7919                 kvm_for_each_vcpu(cpu, vcpu, kvm)
7920                         kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
7921         }
7922         mutex_unlock(&kvm_lock);
7923 }
7924 #endif
7925
7926 static void __kvmclock_cpufreq_notifier(struct cpufreq_freqs *freq, int cpu)
7927 {
7928         struct kvm *kvm;
7929         struct kvm_vcpu *vcpu;
7930         int i, send_ipi = 0;
7931
7932         /*
7933          * We allow guests to temporarily run on slowing clocks,
7934          * provided we notify them after, or to run on accelerating
7935          * clocks, provided we notify them before.  Thus time never
7936          * goes backwards.
7937          *
7938          * However, we have a problem.  We can't atomically update
7939          * the frequency of a given CPU from this function; it is
7940          * merely a notifier, which can be called from any CPU.
7941          * Changing the TSC frequency at arbitrary points in time
7942          * requires a recomputation of local variables related to
7943          * the TSC for each VCPU.  We must flag these local variables
7944          * to be updated and be sure the update takes place with the
7945          * new frequency before any guests proceed.
7946          *
7947          * Unfortunately, the combination of hotplug CPU and frequency
7948          * change creates an intractable locking scenario; the order
7949          * of when these callouts happen is undefined with respect to
7950          * CPU hotplug, and they can race with each other.  As such,
7951          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
7952          * undefined; you can actually have a CPU frequency change take
7953          * place in between the computation of X and the setting of the
7954          * variable.  To protect against this problem, all updates of
7955          * the per_cpu tsc_khz variable are done in an interrupt
7956          * protected IPI, and all callers wishing to update the value
7957          * must wait for a synchronous IPI to complete (which is trivial
7958          * if the caller is on the CPU already).  This establishes the
7959          * necessary total order on variable updates.
7960          *
7961          * Note that because a guest time update may take place
7962          * anytime after the setting of the VCPU's request bit, the
7963          * correct TSC value must be set before the request.  However,
7964          * to ensure the update actually makes it to any guest which
7965          * starts running in hardware virtualization between the set
7966          * and the acquisition of the spinlock, we must also ping the
7967          * CPU after setting the request bit.
7968          *
7969          */
7970
7971         smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
7972
7973         mutex_lock(&kvm_lock);
7974         list_for_each_entry(kvm, &vm_list, vm_list) {
7975                 kvm_for_each_vcpu(i, vcpu, kvm) {
7976                         if (vcpu->cpu != cpu)
7977                                 continue;
7978                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
7979                         if (vcpu->cpu != raw_smp_processor_id())
7980                                 send_ipi = 1;
7981                 }
7982         }
7983         mutex_unlock(&kvm_lock);
7984
7985         if (freq->old < freq->new && send_ipi) {
7986                 /*
7987                  * We upscale the frequency.  Must make the guest
7988                  * doesn't see old kvmclock values while running with
7989                  * the new frequency, otherwise we risk the guest sees
7990                  * time go backwards.
7991                  *
7992                  * In case we update the frequency for another cpu
7993                  * (which might be in guest context) send an interrupt
7994                  * to kick the cpu out of guest context.  Next time
7995                  * guest context is entered kvmclock will be updated,
7996                  * so the guest will not see stale values.
7997                  */
7998                 smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
7999         }
8000 }
8001
8002 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
8003                                      void *data)
8004 {
8005         struct cpufreq_freqs *freq = data;
8006         int cpu;
8007
8008         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
8009                 return 0;
8010         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
8011                 return 0;
8012
8013         for_each_cpu(cpu, freq->policy->cpus)
8014                 __kvmclock_cpufreq_notifier(freq, cpu);
8015
8016         return 0;
8017 }
8018
8019 static struct notifier_block kvmclock_cpufreq_notifier_block = {
8020         .notifier_call  = kvmclock_cpufreq_notifier
8021 };
8022
8023 static int kvmclock_cpu_online(unsigned int cpu)
8024 {
8025         tsc_khz_changed(NULL);
8026         return 0;
8027 }
8028
8029 static void kvm_timer_init(void)
8030 {
8031         max_tsc_khz = tsc_khz;
8032
8033         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
8034 #ifdef CONFIG_CPU_FREQ
8035                 struct cpufreq_policy *policy;
8036                 int cpu;
8037
8038                 cpu = get_cpu();
8039                 policy = cpufreq_cpu_get(cpu);
8040                 if (policy) {
8041                         if (policy->cpuinfo.max_freq)
8042                                 max_tsc_khz = policy->cpuinfo.max_freq;
8043                         cpufreq_cpu_put(policy);
8044                 }
8045                 put_cpu();
8046 #endif
8047                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
8048                                           CPUFREQ_TRANSITION_NOTIFIER);
8049         }
8050
8051         cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE, "x86/kvm/clk:online",
8052                           kvmclock_cpu_online, kvmclock_cpu_down_prep);
8053 }
8054
8055 DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
8056 EXPORT_PER_CPU_SYMBOL_GPL(current_vcpu);
8057
8058 int kvm_is_in_guest(void)
8059 {
8060         return __this_cpu_read(current_vcpu) != NULL;
8061 }
8062
8063 static int kvm_is_user_mode(void)
8064 {
8065         int user_mode = 3;
8066
8067         if (__this_cpu_read(current_vcpu))
8068                 user_mode = static_call(kvm_x86_get_cpl)(__this_cpu_read(current_vcpu));
8069
8070         return user_mode != 0;
8071 }
8072
8073 static unsigned long kvm_get_guest_ip(void)
8074 {
8075         unsigned long ip = 0;
8076
8077         if (__this_cpu_read(current_vcpu))
8078                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
8079
8080         return ip;
8081 }
8082
8083 static void kvm_handle_intel_pt_intr(void)
8084 {
8085         struct kvm_vcpu *vcpu = __this_cpu_read(current_vcpu);
8086
8087         kvm_make_request(KVM_REQ_PMI, vcpu);
8088         __set_bit(MSR_CORE_PERF_GLOBAL_OVF_CTRL_TRACE_TOPA_PMI_BIT,
8089                         (unsigned long *)&vcpu->arch.pmu.global_status);
8090 }
8091
8092 static struct perf_guest_info_callbacks kvm_guest_cbs = {
8093         .is_in_guest            = kvm_is_in_guest,
8094         .is_user_mode           = kvm_is_user_mode,
8095         .get_guest_ip           = kvm_get_guest_ip,
8096         .handle_intel_pt_intr   = kvm_handle_intel_pt_intr,
8097 };
8098
8099 #ifdef CONFIG_X86_64
8100 static void pvclock_gtod_update_fn(struct work_struct *work)
8101 {
8102         struct kvm *kvm;
8103
8104         struct kvm_vcpu *vcpu;
8105         int i;
8106
8107         mutex_lock(&kvm_lock);
8108         list_for_each_entry(kvm, &vm_list, vm_list)
8109                 kvm_for_each_vcpu(i, vcpu, kvm)
8110                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
8111         atomic_set(&kvm_guest_has_master_clock, 0);
8112         mutex_unlock(&kvm_lock);
8113 }
8114
8115 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
8116
8117 /*
8118  * Indirection to move queue_work() out of the tk_core.seq write held
8119  * region to prevent possible deadlocks against time accessors which
8120  * are invoked with work related locks held.
8121  */
8122 static void pvclock_irq_work_fn(struct irq_work *w)
8123 {
8124         queue_work(system_long_wq, &pvclock_gtod_work);
8125 }
8126
8127 static DEFINE_IRQ_WORK(pvclock_irq_work, pvclock_irq_work_fn);
8128
8129 /*
8130  * Notification about pvclock gtod data update.
8131  */
8132 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
8133                                void *priv)
8134 {
8135         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
8136         struct timekeeper *tk = priv;
8137
8138         update_pvclock_gtod(tk);
8139
8140         /*
8141          * Disable master clock if host does not trust, or does not use,
8142          * TSC based clocksource. Delegate queue_work() to irq_work as
8143          * this is invoked with tk_core.seq write held.
8144          */
8145         if (!gtod_is_based_on_tsc(gtod->clock.vclock_mode) &&
8146             atomic_read(&kvm_guest_has_master_clock) != 0)
8147                 irq_work_queue(&pvclock_irq_work);
8148         return 0;
8149 }
8150
8151 static struct notifier_block pvclock_gtod_notifier = {
8152         .notifier_call = pvclock_gtod_notify,
8153 };
8154 #endif
8155
8156 int kvm_arch_init(void *opaque)
8157 {
8158         struct kvm_x86_init_ops *ops = opaque;
8159         int r;
8160
8161         if (kvm_x86_ops.hardware_enable) {
8162                 printk(KERN_ERR "kvm: already loaded the other module\n");
8163                 r = -EEXIST;
8164                 goto out;
8165         }
8166
8167         if (!ops->cpu_has_kvm_support()) {
8168                 pr_err_ratelimited("kvm: no hardware support\n");
8169                 r = -EOPNOTSUPP;
8170                 goto out;
8171         }
8172         if (ops->disabled_by_bios()) {
8173                 pr_err_ratelimited("kvm: disabled by bios\n");
8174                 r = -EOPNOTSUPP;
8175                 goto out;
8176         }
8177
8178         /*
8179          * KVM explicitly assumes that the guest has an FPU and
8180          * FXSAVE/FXRSTOR. For example, the KVM_GET_FPU explicitly casts the
8181          * vCPU's FPU state as a fxregs_state struct.
8182          */
8183         if (!boot_cpu_has(X86_FEATURE_FPU) || !boot_cpu_has(X86_FEATURE_FXSR)) {
8184                 printk(KERN_ERR "kvm: inadequate fpu\n");
8185                 r = -EOPNOTSUPP;
8186                 goto out;
8187         }
8188
8189         r = -ENOMEM;
8190         x86_fpu_cache = kmem_cache_create("x86_fpu", sizeof(struct fpu),
8191                                           __alignof__(struct fpu), SLAB_ACCOUNT,
8192                                           NULL);
8193         if (!x86_fpu_cache) {
8194                 printk(KERN_ERR "kvm: failed to allocate cache for x86 fpu\n");
8195                 goto out;
8196         }
8197
8198         x86_emulator_cache = kvm_alloc_emulator_cache();
8199         if (!x86_emulator_cache) {
8200                 pr_err("kvm: failed to allocate cache for x86 emulator\n");
8201                 goto out_free_x86_fpu_cache;
8202         }
8203
8204         user_return_msrs = alloc_percpu(struct kvm_user_return_msrs);
8205         if (!user_return_msrs) {
8206                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_user_return_msrs\n");
8207                 goto out_free_x86_emulator_cache;
8208         }
8209         kvm_nr_uret_msrs = 0;
8210
8211         r = kvm_mmu_module_init();
8212         if (r)
8213                 goto out_free_percpu;
8214
8215         kvm_timer_init();
8216
8217         perf_register_guest_info_callbacks(&kvm_guest_cbs);
8218
8219         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
8220                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
8221                 supported_xcr0 = host_xcr0 & KVM_SUPPORTED_XCR0;
8222         }
8223
8224         if (pi_inject_timer == -1)
8225                 pi_inject_timer = housekeeping_enabled(HK_FLAG_TIMER);
8226 #ifdef CONFIG_X86_64
8227         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
8228
8229         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
8230                 set_hv_tscchange_cb(kvm_hyperv_tsc_notifier);
8231 #endif
8232
8233         return 0;
8234
8235 out_free_percpu:
8236         free_percpu(user_return_msrs);
8237 out_free_x86_emulator_cache:
8238         kmem_cache_destroy(x86_emulator_cache);
8239 out_free_x86_fpu_cache:
8240         kmem_cache_destroy(x86_fpu_cache);
8241 out:
8242         return r;
8243 }
8244
8245 void kvm_arch_exit(void)
8246 {
8247 #ifdef CONFIG_X86_64
8248         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
8249                 clear_hv_tscchange_cb();
8250 #endif
8251         kvm_lapic_exit();
8252         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
8253
8254         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
8255                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
8256                                             CPUFREQ_TRANSITION_NOTIFIER);
8257         cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE);
8258 #ifdef CONFIG_X86_64
8259         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
8260         irq_work_sync(&pvclock_irq_work);
8261         cancel_work_sync(&pvclock_gtod_work);
8262 #endif
8263         kvm_x86_ops.hardware_enable = NULL;
8264         kvm_mmu_module_exit();
8265         free_percpu(user_return_msrs);
8266         kmem_cache_destroy(x86_emulator_cache);
8267         kmem_cache_destroy(x86_fpu_cache);
8268 #ifdef CONFIG_KVM_XEN
8269         static_key_deferred_flush(&kvm_xen_enabled);
8270         WARN_ON(static_branch_unlikely(&kvm_xen_enabled.key));
8271 #endif
8272 }
8273
8274 static int __kvm_vcpu_halt(struct kvm_vcpu *vcpu, int state, int reason)
8275 {
8276         ++vcpu->stat.halt_exits;
8277         if (lapic_in_kernel(vcpu)) {
8278                 vcpu->arch.mp_state = state;
8279                 return 1;
8280         } else {
8281                 vcpu->run->exit_reason = reason;
8282                 return 0;
8283         }
8284 }
8285
8286 int kvm_vcpu_halt(struct kvm_vcpu *vcpu)
8287 {
8288         return __kvm_vcpu_halt(vcpu, KVM_MP_STATE_HALTED, KVM_EXIT_HLT);
8289 }
8290 EXPORT_SYMBOL_GPL(kvm_vcpu_halt);
8291
8292 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
8293 {
8294         int ret = kvm_skip_emulated_instruction(vcpu);
8295         /*
8296          * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
8297          * KVM_EXIT_DEBUG here.
8298          */
8299         return kvm_vcpu_halt(vcpu) && ret;
8300 }
8301 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
8302
8303 int kvm_emulate_ap_reset_hold(struct kvm_vcpu *vcpu)
8304 {
8305         int ret = kvm_skip_emulated_instruction(vcpu);
8306
8307         return __kvm_vcpu_halt(vcpu, KVM_MP_STATE_AP_RESET_HOLD, KVM_EXIT_AP_RESET_HOLD) && ret;
8308 }
8309 EXPORT_SYMBOL_GPL(kvm_emulate_ap_reset_hold);
8310
8311 #ifdef CONFIG_X86_64
8312 static int kvm_pv_clock_pairing(struct kvm_vcpu *vcpu, gpa_t paddr,
8313                                 unsigned long clock_type)
8314 {
8315         struct kvm_clock_pairing clock_pairing;
8316         struct timespec64 ts;
8317         u64 cycle;
8318         int ret;
8319
8320         if (clock_type != KVM_CLOCK_PAIRING_WALLCLOCK)
8321                 return -KVM_EOPNOTSUPP;
8322
8323         if (!kvm_get_walltime_and_clockread(&ts, &cycle))
8324                 return -KVM_EOPNOTSUPP;
8325
8326         clock_pairing.sec = ts.tv_sec;
8327         clock_pairing.nsec = ts.tv_nsec;
8328         clock_pairing.tsc = kvm_read_l1_tsc(vcpu, cycle);
8329         clock_pairing.flags = 0;
8330         memset(&clock_pairing.pad, 0, sizeof(clock_pairing.pad));
8331
8332         ret = 0;
8333         if (kvm_write_guest(vcpu->kvm, paddr, &clock_pairing,
8334                             sizeof(struct kvm_clock_pairing)))
8335                 ret = -KVM_EFAULT;
8336
8337         return ret;
8338 }
8339 #endif
8340
8341 /*
8342  * kvm_pv_kick_cpu_op:  Kick a vcpu.
8343  *
8344  * @apicid - apicid of vcpu to be kicked.
8345  */
8346 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
8347 {
8348         struct kvm_lapic_irq lapic_irq;
8349
8350         lapic_irq.shorthand = APIC_DEST_NOSHORT;
8351         lapic_irq.dest_mode = APIC_DEST_PHYSICAL;
8352         lapic_irq.level = 0;
8353         lapic_irq.dest_id = apicid;
8354         lapic_irq.msi_redir_hint = false;
8355
8356         lapic_irq.delivery_mode = APIC_DM_REMRD;
8357         kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
8358 }
8359
8360 bool kvm_apicv_activated(struct kvm *kvm)
8361 {
8362         return (READ_ONCE(kvm->arch.apicv_inhibit_reasons) == 0);
8363 }
8364 EXPORT_SYMBOL_GPL(kvm_apicv_activated);
8365
8366 void kvm_apicv_init(struct kvm *kvm, bool enable)
8367 {
8368         if (enable)
8369                 clear_bit(APICV_INHIBIT_REASON_DISABLE,
8370                           &kvm->arch.apicv_inhibit_reasons);
8371         else
8372                 set_bit(APICV_INHIBIT_REASON_DISABLE,
8373                         &kvm->arch.apicv_inhibit_reasons);
8374 }
8375 EXPORT_SYMBOL_GPL(kvm_apicv_init);
8376
8377 static void kvm_sched_yield(struct kvm_vcpu *vcpu, unsigned long dest_id)
8378 {
8379         struct kvm_vcpu *target = NULL;
8380         struct kvm_apic_map *map;
8381
8382         vcpu->stat.directed_yield_attempted++;
8383
8384         if (single_task_running())
8385                 goto no_yield;
8386
8387         rcu_read_lock();
8388         map = rcu_dereference(vcpu->kvm->arch.apic_map);
8389
8390         if (likely(map) && dest_id <= map->max_apic_id && map->phys_map[dest_id])
8391                 target = map->phys_map[dest_id]->vcpu;
8392
8393         rcu_read_unlock();
8394
8395         if (!target || !READ_ONCE(target->ready))
8396                 goto no_yield;
8397
8398         /* Ignore requests to yield to self */
8399         if (vcpu == target)
8400                 goto no_yield;
8401
8402         if (kvm_vcpu_yield_to(target) <= 0)
8403                 goto no_yield;
8404
8405         vcpu->stat.directed_yield_successful++;
8406
8407 no_yield:
8408         return;
8409 }
8410
8411 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
8412 {
8413         unsigned long nr, a0, a1, a2, a3, ret;
8414         int op_64_bit;
8415
8416         if (kvm_xen_hypercall_enabled(vcpu->kvm))
8417                 return kvm_xen_hypercall(vcpu);
8418
8419         if (kvm_hv_hypercall_enabled(vcpu))
8420                 return kvm_hv_hypercall(vcpu);
8421
8422         nr = kvm_rax_read(vcpu);
8423         a0 = kvm_rbx_read(vcpu);
8424         a1 = kvm_rcx_read(vcpu);
8425         a2 = kvm_rdx_read(vcpu);
8426         a3 = kvm_rsi_read(vcpu);
8427
8428         trace_kvm_hypercall(nr, a0, a1, a2, a3);
8429
8430         op_64_bit = is_64_bit_mode(vcpu);
8431         if (!op_64_bit) {
8432                 nr &= 0xFFFFFFFF;
8433                 a0 &= 0xFFFFFFFF;
8434                 a1 &= 0xFFFFFFFF;
8435                 a2 &= 0xFFFFFFFF;
8436                 a3 &= 0xFFFFFFFF;
8437         }
8438
8439         if (static_call(kvm_x86_get_cpl)(vcpu) != 0) {
8440                 ret = -KVM_EPERM;
8441                 goto out;
8442         }
8443
8444         ret = -KVM_ENOSYS;
8445
8446         switch (nr) {
8447         case KVM_HC_VAPIC_POLL_IRQ:
8448                 ret = 0;
8449                 break;
8450         case KVM_HC_KICK_CPU:
8451                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_UNHALT))
8452                         break;
8453
8454                 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
8455                 kvm_sched_yield(vcpu, a1);
8456                 ret = 0;
8457                 break;
8458 #ifdef CONFIG_X86_64
8459         case KVM_HC_CLOCK_PAIRING:
8460                 ret = kvm_pv_clock_pairing(vcpu, a0, a1);
8461                 break;
8462 #endif
8463         case KVM_HC_SEND_IPI:
8464                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_SEND_IPI))
8465                         break;
8466
8467                 ret = kvm_pv_send_ipi(vcpu->kvm, a0, a1, a2, a3, op_64_bit);
8468                 break;
8469         case KVM_HC_SCHED_YIELD:
8470                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_SCHED_YIELD))
8471                         break;
8472
8473                 kvm_sched_yield(vcpu, a0);
8474                 ret = 0;
8475                 break;
8476         default:
8477                 ret = -KVM_ENOSYS;
8478                 break;
8479         }
8480 out:
8481         if (!op_64_bit)
8482                 ret = (u32)ret;
8483         kvm_rax_write(vcpu, ret);
8484
8485         ++vcpu->stat.hypercalls;
8486         return kvm_skip_emulated_instruction(vcpu);
8487 }
8488 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
8489
8490 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
8491 {
8492         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
8493         char instruction[3];
8494         unsigned long rip = kvm_rip_read(vcpu);
8495
8496         static_call(kvm_x86_patch_hypercall)(vcpu, instruction);
8497
8498         return emulator_write_emulated(ctxt, rip, instruction, 3,
8499                 &ctxt->exception);
8500 }
8501
8502 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
8503 {
8504         return vcpu->run->request_interrupt_window &&
8505                 likely(!pic_in_kernel(vcpu->kvm));
8506 }
8507
8508 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
8509 {
8510         struct kvm_run *kvm_run = vcpu->run;
8511
8512         /*
8513          * if_flag is obsolete and useless, so do not bother
8514          * setting it for SEV-ES guests.  Userspace can just
8515          * use kvm_run->ready_for_interrupt_injection.
8516          */
8517         kvm_run->if_flag = !vcpu->arch.guest_state_protected
8518                 && (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
8519
8520         kvm_run->cr8 = kvm_get_cr8(vcpu);
8521         kvm_run->apic_base = kvm_get_apic_base(vcpu);
8522         kvm_run->ready_for_interrupt_injection =
8523                 pic_in_kernel(vcpu->kvm) ||
8524                 kvm_vcpu_ready_for_interrupt_injection(vcpu);
8525
8526         if (is_smm(vcpu))
8527                 kvm_run->flags |= KVM_RUN_X86_SMM;
8528 }
8529
8530 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
8531 {
8532         int max_irr, tpr;
8533
8534         if (!kvm_x86_ops.update_cr8_intercept)
8535                 return;
8536
8537         if (!lapic_in_kernel(vcpu))
8538                 return;
8539
8540         if (vcpu->arch.apicv_active)
8541                 return;
8542
8543         if (!vcpu->arch.apic->vapic_addr)
8544                 max_irr = kvm_lapic_find_highest_irr(vcpu);
8545         else
8546                 max_irr = -1;
8547
8548         if (max_irr != -1)
8549                 max_irr >>= 4;
8550
8551         tpr = kvm_lapic_get_cr8(vcpu);
8552
8553         static_call(kvm_x86_update_cr8_intercept)(vcpu, tpr, max_irr);
8554 }
8555
8556
8557 int kvm_check_nested_events(struct kvm_vcpu *vcpu)
8558 {
8559         if (WARN_ON_ONCE(!is_guest_mode(vcpu)))
8560                 return -EIO;
8561
8562         if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
8563                 kvm_x86_ops.nested_ops->triple_fault(vcpu);
8564                 return 1;
8565         }
8566
8567         return kvm_x86_ops.nested_ops->check_events(vcpu);
8568 }
8569
8570 static void kvm_inject_exception(struct kvm_vcpu *vcpu)
8571 {
8572         if (vcpu->arch.exception.error_code && !is_protmode(vcpu))
8573                 vcpu->arch.exception.error_code = false;
8574         static_call(kvm_x86_queue_exception)(vcpu);
8575 }
8576
8577 static void inject_pending_event(struct kvm_vcpu *vcpu, bool *req_immediate_exit)
8578 {
8579         int r;
8580         bool can_inject = true;
8581
8582         /* try to reinject previous events if any */
8583
8584         if (vcpu->arch.exception.injected) {
8585                 kvm_inject_exception(vcpu);
8586                 can_inject = false;
8587         }
8588         /*
8589          * Do not inject an NMI or interrupt if there is a pending
8590          * exception.  Exceptions and interrupts are recognized at
8591          * instruction boundaries, i.e. the start of an instruction.
8592          * Trap-like exceptions, e.g. #DB, have higher priority than
8593          * NMIs and interrupts, i.e. traps are recognized before an
8594          * NMI/interrupt that's pending on the same instruction.
8595          * Fault-like exceptions, e.g. #GP and #PF, are the lowest
8596          * priority, but are only generated (pended) during instruction
8597          * execution, i.e. a pending fault-like exception means the
8598          * fault occurred on the *previous* instruction and must be
8599          * serviced prior to recognizing any new events in order to
8600          * fully complete the previous instruction.
8601          */
8602         else if (!vcpu->arch.exception.pending) {
8603                 if (vcpu->arch.nmi_injected) {
8604                         static_call(kvm_x86_set_nmi)(vcpu);
8605                         can_inject = false;
8606                 } else if (vcpu->arch.interrupt.injected) {
8607                         static_call(kvm_x86_set_irq)(vcpu);
8608                         can_inject = false;
8609                 }
8610         }
8611
8612         WARN_ON_ONCE(vcpu->arch.exception.injected &&
8613                      vcpu->arch.exception.pending);
8614
8615         /*
8616          * Call check_nested_events() even if we reinjected a previous event
8617          * in order for caller to determine if it should require immediate-exit
8618          * from L2 to L1 due to pending L1 events which require exit
8619          * from L2 to L1.
8620          */
8621         if (is_guest_mode(vcpu)) {
8622                 r = kvm_check_nested_events(vcpu);
8623                 if (r < 0)
8624                         goto busy;
8625         }
8626
8627         /* try to inject new event if pending */
8628         if (vcpu->arch.exception.pending) {
8629                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
8630                                         vcpu->arch.exception.has_error_code,
8631                                         vcpu->arch.exception.error_code);
8632
8633                 vcpu->arch.exception.pending = false;
8634                 vcpu->arch.exception.injected = true;
8635
8636                 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
8637                         __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
8638                                              X86_EFLAGS_RF);
8639
8640                 if (vcpu->arch.exception.nr == DB_VECTOR) {
8641                         kvm_deliver_exception_payload(vcpu);
8642                         if (vcpu->arch.dr7 & DR7_GD) {
8643                                 vcpu->arch.dr7 &= ~DR7_GD;
8644                                 kvm_update_dr7(vcpu);
8645                         }
8646                 }
8647
8648                 kvm_inject_exception(vcpu);
8649                 can_inject = false;
8650         }
8651
8652         /*
8653          * Finally, inject interrupt events.  If an event cannot be injected
8654          * due to architectural conditions (e.g. IF=0) a window-open exit
8655          * will re-request KVM_REQ_EVENT.  Sometimes however an event is pending
8656          * and can architecturally be injected, but we cannot do it right now:
8657          * an interrupt could have arrived just now and we have to inject it
8658          * as a vmexit, or there could already an event in the queue, which is
8659          * indicated by can_inject.  In that case we request an immediate exit
8660          * in order to make progress and get back here for another iteration.
8661          * The kvm_x86_ops hooks communicate this by returning -EBUSY.
8662          */
8663         if (vcpu->arch.smi_pending) {
8664                 r = can_inject ? static_call(kvm_x86_smi_allowed)(vcpu, true) : -EBUSY;
8665                 if (r < 0)
8666                         goto busy;
8667                 if (r) {
8668                         vcpu->arch.smi_pending = false;
8669                         ++vcpu->arch.smi_count;
8670                         enter_smm(vcpu);
8671                         can_inject = false;
8672                 } else
8673                         static_call(kvm_x86_enable_smi_window)(vcpu);
8674         }
8675
8676         if (vcpu->arch.nmi_pending) {
8677                 r = can_inject ? static_call(kvm_x86_nmi_allowed)(vcpu, true) : -EBUSY;
8678                 if (r < 0)
8679                         goto busy;
8680                 if (r) {
8681                         --vcpu->arch.nmi_pending;
8682                         vcpu->arch.nmi_injected = true;
8683                         static_call(kvm_x86_set_nmi)(vcpu);
8684                         can_inject = false;
8685                         WARN_ON(static_call(kvm_x86_nmi_allowed)(vcpu, true) < 0);
8686                 }
8687                 if (vcpu->arch.nmi_pending)
8688                         static_call(kvm_x86_enable_nmi_window)(vcpu);
8689         }
8690
8691         if (kvm_cpu_has_injectable_intr(vcpu)) {
8692                 r = can_inject ? static_call(kvm_x86_interrupt_allowed)(vcpu, true) : -EBUSY;
8693                 if (r < 0)
8694                         goto busy;
8695                 if (r) {
8696                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu), false);
8697                         static_call(kvm_x86_set_irq)(vcpu);
8698                         WARN_ON(static_call(kvm_x86_interrupt_allowed)(vcpu, true) < 0);
8699                 }
8700                 if (kvm_cpu_has_injectable_intr(vcpu))
8701                         static_call(kvm_x86_enable_irq_window)(vcpu);
8702         }
8703
8704         if (is_guest_mode(vcpu) &&
8705             kvm_x86_ops.nested_ops->hv_timer_pending &&
8706             kvm_x86_ops.nested_ops->hv_timer_pending(vcpu))
8707                 *req_immediate_exit = true;
8708
8709         WARN_ON(vcpu->arch.exception.pending);
8710         return;
8711
8712 busy:
8713         *req_immediate_exit = true;
8714         return;
8715 }
8716
8717 static void process_nmi(struct kvm_vcpu *vcpu)
8718 {
8719         unsigned limit = 2;
8720
8721         /*
8722          * x86 is limited to one NMI running, and one NMI pending after it.
8723          * If an NMI is already in progress, limit further NMIs to just one.
8724          * Otherwise, allow two (and we'll inject the first one immediately).
8725          */
8726         if (static_call(kvm_x86_get_nmi_mask)(vcpu) || vcpu->arch.nmi_injected)
8727                 limit = 1;
8728
8729         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
8730         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
8731         kvm_make_request(KVM_REQ_EVENT, vcpu);
8732 }
8733
8734 static u32 enter_smm_get_segment_flags(struct kvm_segment *seg)
8735 {
8736         u32 flags = 0;
8737         flags |= seg->g       << 23;
8738         flags |= seg->db      << 22;
8739         flags |= seg->l       << 21;
8740         flags |= seg->avl     << 20;
8741         flags |= seg->present << 15;
8742         flags |= seg->dpl     << 13;
8743         flags |= seg->s       << 12;
8744         flags |= seg->type    << 8;
8745         return flags;
8746 }
8747
8748 static void enter_smm_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
8749 {
8750         struct kvm_segment seg;
8751         int offset;
8752
8753         kvm_get_segment(vcpu, &seg, n);
8754         put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
8755
8756         if (n < 3)
8757                 offset = 0x7f84 + n * 12;
8758         else
8759                 offset = 0x7f2c + (n - 3) * 12;
8760
8761         put_smstate(u32, buf, offset + 8, seg.base);
8762         put_smstate(u32, buf, offset + 4, seg.limit);
8763         put_smstate(u32, buf, offset, enter_smm_get_segment_flags(&seg));
8764 }
8765
8766 #ifdef CONFIG_X86_64
8767 static void enter_smm_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
8768 {
8769         struct kvm_segment seg;
8770         int offset;
8771         u16 flags;
8772
8773         kvm_get_segment(vcpu, &seg, n);
8774         offset = 0x7e00 + n * 16;
8775
8776         flags = enter_smm_get_segment_flags(&seg) >> 8;
8777         put_smstate(u16, buf, offset, seg.selector);
8778         put_smstate(u16, buf, offset + 2, flags);
8779         put_smstate(u32, buf, offset + 4, seg.limit);
8780         put_smstate(u64, buf, offset + 8, seg.base);
8781 }
8782 #endif
8783
8784 static void enter_smm_save_state_32(struct kvm_vcpu *vcpu, char *buf)
8785 {
8786         struct desc_ptr dt;
8787         struct kvm_segment seg;
8788         unsigned long val;
8789         int i;
8790
8791         put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
8792         put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
8793         put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
8794         put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
8795
8796         for (i = 0; i < 8; i++)
8797                 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read_raw(vcpu, i));
8798
8799         kvm_get_dr(vcpu, 6, &val);
8800         put_smstate(u32, buf, 0x7fcc, (u32)val);
8801         kvm_get_dr(vcpu, 7, &val);
8802         put_smstate(u32, buf, 0x7fc8, (u32)val);
8803
8804         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
8805         put_smstate(u32, buf, 0x7fc4, seg.selector);
8806         put_smstate(u32, buf, 0x7f64, seg.base);
8807         put_smstate(u32, buf, 0x7f60, seg.limit);
8808         put_smstate(u32, buf, 0x7f5c, enter_smm_get_segment_flags(&seg));
8809
8810         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
8811         put_smstate(u32, buf, 0x7fc0, seg.selector);
8812         put_smstate(u32, buf, 0x7f80, seg.base);
8813         put_smstate(u32, buf, 0x7f7c, seg.limit);
8814         put_smstate(u32, buf, 0x7f78, enter_smm_get_segment_flags(&seg));
8815
8816         static_call(kvm_x86_get_gdt)(vcpu, &dt);
8817         put_smstate(u32, buf, 0x7f74, dt.address);
8818         put_smstate(u32, buf, 0x7f70, dt.size);
8819
8820         static_call(kvm_x86_get_idt)(vcpu, &dt);
8821         put_smstate(u32, buf, 0x7f58, dt.address);
8822         put_smstate(u32, buf, 0x7f54, dt.size);
8823
8824         for (i = 0; i < 6; i++)
8825                 enter_smm_save_seg_32(vcpu, buf, i);
8826
8827         put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
8828
8829         /* revision id */
8830         put_smstate(u32, buf, 0x7efc, 0x00020000);
8831         put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
8832 }
8833
8834 #ifdef CONFIG_X86_64
8835 static void enter_smm_save_state_64(struct kvm_vcpu *vcpu, char *buf)
8836 {
8837         struct desc_ptr dt;
8838         struct kvm_segment seg;
8839         unsigned long val;
8840         int i;
8841
8842         for (i = 0; i < 16; i++)
8843                 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read_raw(vcpu, i));
8844
8845         put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
8846         put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
8847
8848         kvm_get_dr(vcpu, 6, &val);
8849         put_smstate(u64, buf, 0x7f68, val);
8850         kvm_get_dr(vcpu, 7, &val);
8851         put_smstate(u64, buf, 0x7f60, val);
8852
8853         put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
8854         put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
8855         put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
8856
8857         put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
8858
8859         /* revision id */
8860         put_smstate(u32, buf, 0x7efc, 0x00020064);
8861
8862         put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
8863
8864         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
8865         put_smstate(u16, buf, 0x7e90, seg.selector);
8866         put_smstate(u16, buf, 0x7e92, enter_smm_get_segment_flags(&seg) >> 8);
8867         put_smstate(u32, buf, 0x7e94, seg.limit);
8868         put_smstate(u64, buf, 0x7e98, seg.base);
8869
8870         static_call(kvm_x86_get_idt)(vcpu, &dt);
8871         put_smstate(u32, buf, 0x7e84, dt.size);
8872         put_smstate(u64, buf, 0x7e88, dt.address);
8873
8874         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
8875         put_smstate(u16, buf, 0x7e70, seg.selector);
8876         put_smstate(u16, buf, 0x7e72, enter_smm_get_segment_flags(&seg) >> 8);
8877         put_smstate(u32, buf, 0x7e74, seg.limit);
8878         put_smstate(u64, buf, 0x7e78, seg.base);
8879
8880         static_call(kvm_x86_get_gdt)(vcpu, &dt);
8881         put_smstate(u32, buf, 0x7e64, dt.size);
8882         put_smstate(u64, buf, 0x7e68, dt.address);
8883
8884         for (i = 0; i < 6; i++)
8885                 enter_smm_save_seg_64(vcpu, buf, i);
8886 }
8887 #endif
8888
8889 static void enter_smm(struct kvm_vcpu *vcpu)
8890 {
8891         struct kvm_segment cs, ds;
8892         struct desc_ptr dt;
8893         char buf[512];
8894         u32 cr0;
8895
8896         trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, true);
8897         memset(buf, 0, 512);
8898 #ifdef CONFIG_X86_64
8899         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
8900                 enter_smm_save_state_64(vcpu, buf);
8901         else
8902 #endif
8903                 enter_smm_save_state_32(vcpu, buf);
8904
8905         /*
8906          * Give pre_enter_smm() a chance to make ISA-specific changes to the
8907          * vCPU state (e.g. leave guest mode) after we've saved the state into
8908          * the SMM state-save area.
8909          */
8910         static_call(kvm_x86_pre_enter_smm)(vcpu, buf);
8911
8912         vcpu->arch.hflags |= HF_SMM_MASK;
8913         kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
8914
8915         if (static_call(kvm_x86_get_nmi_mask)(vcpu))
8916                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
8917         else
8918                 static_call(kvm_x86_set_nmi_mask)(vcpu, true);
8919
8920         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
8921         kvm_rip_write(vcpu, 0x8000);
8922
8923         cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
8924         static_call(kvm_x86_set_cr0)(vcpu, cr0);
8925         vcpu->arch.cr0 = cr0;
8926
8927         static_call(kvm_x86_set_cr4)(vcpu, 0);
8928
8929         /* Undocumented: IDT limit is set to zero on entry to SMM.  */
8930         dt.address = dt.size = 0;
8931         static_call(kvm_x86_set_idt)(vcpu, &dt);
8932
8933         kvm_set_dr(vcpu, 7, DR7_FIXED_1);
8934
8935         cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
8936         cs.base = vcpu->arch.smbase;
8937
8938         ds.selector = 0;
8939         ds.base = 0;
8940
8941         cs.limit    = ds.limit = 0xffffffff;
8942         cs.type     = ds.type = 0x3;
8943         cs.dpl      = ds.dpl = 0;
8944         cs.db       = ds.db = 0;
8945         cs.s        = ds.s = 1;
8946         cs.l        = ds.l = 0;
8947         cs.g        = ds.g = 1;
8948         cs.avl      = ds.avl = 0;
8949         cs.present  = ds.present = 1;
8950         cs.unusable = ds.unusable = 0;
8951         cs.padding  = ds.padding = 0;
8952
8953         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
8954         kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
8955         kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
8956         kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
8957         kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
8958         kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
8959
8960 #ifdef CONFIG_X86_64
8961         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
8962                 static_call(kvm_x86_set_efer)(vcpu, 0);
8963 #endif
8964
8965         kvm_update_cpuid_runtime(vcpu);
8966         kvm_mmu_reset_context(vcpu);
8967 }
8968
8969 static void process_smi(struct kvm_vcpu *vcpu)
8970 {
8971         vcpu->arch.smi_pending = true;
8972         kvm_make_request(KVM_REQ_EVENT, vcpu);
8973 }
8974
8975 void kvm_make_scan_ioapic_request_mask(struct kvm *kvm,
8976                                        unsigned long *vcpu_bitmap)
8977 {
8978         cpumask_var_t cpus;
8979
8980         zalloc_cpumask_var(&cpus, GFP_ATOMIC);
8981
8982         kvm_make_vcpus_request_mask(kvm, KVM_REQ_SCAN_IOAPIC,
8983                                     NULL, vcpu_bitmap, cpus);
8984
8985         free_cpumask_var(cpus);
8986 }
8987
8988 void kvm_make_scan_ioapic_request(struct kvm *kvm)
8989 {
8990         kvm_make_all_cpus_request(kvm, KVM_REQ_SCAN_IOAPIC);
8991 }
8992
8993 void kvm_vcpu_update_apicv(struct kvm_vcpu *vcpu)
8994 {
8995         if (!lapic_in_kernel(vcpu))
8996                 return;
8997
8998         vcpu->arch.apicv_active = kvm_apicv_activated(vcpu->kvm);
8999         kvm_apic_update_apicv(vcpu);
9000         static_call(kvm_x86_refresh_apicv_exec_ctrl)(vcpu);
9001 }
9002 EXPORT_SYMBOL_GPL(kvm_vcpu_update_apicv);
9003
9004 /*
9005  * NOTE: Do not hold any lock prior to calling this.
9006  *
9007  * In particular, kvm_request_apicv_update() expects kvm->srcu not to be
9008  * locked, because it calls __x86_set_memory_region() which does
9009  * synchronize_srcu(&kvm->srcu).
9010  */
9011 void kvm_request_apicv_update(struct kvm *kvm, bool activate, ulong bit)
9012 {
9013         struct kvm_vcpu *except;
9014         unsigned long old, new, expected;
9015
9016         if (!kvm_x86_ops.check_apicv_inhibit_reasons ||
9017             !static_call(kvm_x86_check_apicv_inhibit_reasons)(bit))
9018                 return;
9019
9020         old = READ_ONCE(kvm->arch.apicv_inhibit_reasons);
9021         do {
9022                 expected = new = old;
9023                 if (activate)
9024                         __clear_bit(bit, &new);
9025                 else
9026                         __set_bit(bit, &new);
9027                 if (new == old)
9028                         break;
9029                 old = cmpxchg(&kvm->arch.apicv_inhibit_reasons, expected, new);
9030         } while (old != expected);
9031
9032         if (!!old == !!new)
9033                 return;
9034
9035         trace_kvm_apicv_update_request(activate, bit);
9036         if (kvm_x86_ops.pre_update_apicv_exec_ctrl)
9037                 static_call(kvm_x86_pre_update_apicv_exec_ctrl)(kvm, activate);
9038
9039         /*
9040          * Sending request to update APICV for all other vcpus,
9041          * while update the calling vcpu immediately instead of
9042          * waiting for another #VMEXIT to handle the request.
9043          */
9044         except = kvm_get_running_vcpu();
9045         kvm_make_all_cpus_request_except(kvm, KVM_REQ_APICV_UPDATE,
9046                                          except);
9047         if (except)
9048                 kvm_vcpu_update_apicv(except);
9049 }
9050 EXPORT_SYMBOL_GPL(kvm_request_apicv_update);
9051
9052 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
9053 {
9054         if (!kvm_apic_present(vcpu))
9055                 return;
9056
9057         bitmap_zero(vcpu->arch.ioapic_handled_vectors, 256);
9058
9059         if (irqchip_split(vcpu->kvm))
9060                 kvm_scan_ioapic_routes(vcpu, vcpu->arch.ioapic_handled_vectors);
9061         else {
9062                 if (vcpu->arch.apicv_active)
9063                         static_call(kvm_x86_sync_pir_to_irr)(vcpu);
9064                 if (ioapic_in_kernel(vcpu->kvm))
9065                         kvm_ioapic_scan_entry(vcpu, vcpu->arch.ioapic_handled_vectors);
9066         }
9067
9068         if (is_guest_mode(vcpu))
9069                 vcpu->arch.load_eoi_exitmap_pending = true;
9070         else
9071                 kvm_make_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu);
9072 }
9073
9074 static void vcpu_load_eoi_exitmap(struct kvm_vcpu *vcpu)
9075 {
9076         u64 eoi_exit_bitmap[4];
9077
9078         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
9079                 return;
9080
9081         if (to_hv_vcpu(vcpu))
9082                 bitmap_or((ulong *)eoi_exit_bitmap,
9083                           vcpu->arch.ioapic_handled_vectors,
9084                           to_hv_synic(vcpu)->vec_bitmap, 256);
9085
9086         static_call(kvm_x86_load_eoi_exitmap)(vcpu, eoi_exit_bitmap);
9087 }
9088
9089 void kvm_arch_mmu_notifier_invalidate_range(struct kvm *kvm,
9090                                             unsigned long start, unsigned long end)
9091 {
9092         unsigned long apic_address;
9093
9094         /*
9095          * The physical address of apic access page is stored in the VMCS.
9096          * Update it when it becomes invalid.
9097          */
9098         apic_address = gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
9099         if (start <= apic_address && apic_address < end)
9100                 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
9101 }
9102
9103 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
9104 {
9105         if (!lapic_in_kernel(vcpu))
9106                 return;
9107
9108         if (!kvm_x86_ops.set_apic_access_page_addr)
9109                 return;
9110
9111         static_call(kvm_x86_set_apic_access_page_addr)(vcpu);
9112 }
9113
9114 void __kvm_request_immediate_exit(struct kvm_vcpu *vcpu)
9115 {
9116         smp_send_reschedule(vcpu->cpu);
9117 }
9118 EXPORT_SYMBOL_GPL(__kvm_request_immediate_exit);
9119
9120 /*
9121  * Returns 1 to let vcpu_run() continue the guest execution loop without
9122  * exiting to the userspace.  Otherwise, the value will be returned to the
9123  * userspace.
9124  */
9125 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
9126 {
9127         int r;
9128         bool req_int_win =
9129                 dm_request_for_irq_injection(vcpu) &&
9130                 kvm_cpu_accept_dm_intr(vcpu);
9131         fastpath_t exit_fastpath;
9132
9133         bool req_immediate_exit = false;
9134
9135         /* Forbid vmenter if vcpu dirty ring is soft-full */
9136         if (unlikely(vcpu->kvm->dirty_ring_size &&
9137                      kvm_dirty_ring_soft_full(&vcpu->dirty_ring))) {
9138                 vcpu->run->exit_reason = KVM_EXIT_DIRTY_RING_FULL;
9139                 trace_kvm_dirty_ring_exit(vcpu);
9140                 r = 0;
9141                 goto out;
9142         }
9143
9144         if (kvm_request_pending(vcpu)) {
9145                 if (kvm_check_request(KVM_REQ_GET_NESTED_STATE_PAGES, vcpu)) {
9146                         if (unlikely(!kvm_x86_ops.nested_ops->get_nested_state_pages(vcpu))) {
9147                                 r = 0;
9148                                 goto out;
9149                         }
9150                 }
9151                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
9152                         kvm_mmu_unload(vcpu);
9153                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
9154                         __kvm_migrate_timers(vcpu);
9155                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
9156                         kvm_gen_update_masterclock(vcpu->kvm);
9157                 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
9158                         kvm_gen_kvmclock_update(vcpu);
9159                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
9160                         r = kvm_guest_time_update(vcpu);
9161                         if (unlikely(r))
9162                                 goto out;
9163                 }
9164                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
9165                         kvm_mmu_sync_roots(vcpu);
9166                 if (kvm_check_request(KVM_REQ_LOAD_MMU_PGD, vcpu))
9167                         kvm_mmu_load_pgd(vcpu);
9168                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu)) {
9169                         kvm_vcpu_flush_tlb_all(vcpu);
9170
9171                         /* Flushing all ASIDs flushes the current ASID... */
9172                         kvm_clear_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
9173                 }
9174                 if (kvm_check_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu))
9175                         kvm_vcpu_flush_tlb_current(vcpu);
9176                 if (kvm_check_request(KVM_REQ_HV_TLB_FLUSH, vcpu))
9177                         kvm_vcpu_flush_tlb_guest(vcpu);
9178
9179                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
9180                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
9181                         r = 0;
9182                         goto out;
9183                 }
9184                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
9185                         if (is_guest_mode(vcpu)) {
9186                                 kvm_x86_ops.nested_ops->triple_fault(vcpu);
9187                         } else {
9188                                 vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
9189                                 vcpu->mmio_needed = 0;
9190                                 r = 0;
9191                                 goto out;
9192                         }
9193                 }
9194                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
9195                         /* Page is swapped out. Do synthetic halt */
9196                         vcpu->arch.apf.halted = true;
9197                         r = 1;
9198                         goto out;
9199                 }
9200                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
9201                         record_steal_time(vcpu);
9202                 if (kvm_check_request(KVM_REQ_SMI, vcpu))
9203                         process_smi(vcpu);
9204                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
9205                         process_nmi(vcpu);
9206                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
9207                         kvm_pmu_handle_event(vcpu);
9208                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
9209                         kvm_pmu_deliver_pmi(vcpu);
9210                 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT, vcpu)) {
9211                         BUG_ON(vcpu->arch.pending_ioapic_eoi > 255);
9212                         if (test_bit(vcpu->arch.pending_ioapic_eoi,
9213                                      vcpu->arch.ioapic_handled_vectors)) {
9214                                 vcpu->run->exit_reason = KVM_EXIT_IOAPIC_EOI;
9215                                 vcpu->run->eoi.vector =
9216                                                 vcpu->arch.pending_ioapic_eoi;
9217                                 r = 0;
9218                                 goto out;
9219                         }
9220                 }
9221                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
9222                         vcpu_scan_ioapic(vcpu);
9223                 if (kvm_check_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu))
9224                         vcpu_load_eoi_exitmap(vcpu);
9225                 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
9226                         kvm_vcpu_reload_apic_access_page(vcpu);
9227                 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
9228                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
9229                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
9230                         r = 0;
9231                         goto out;
9232                 }
9233                 if (kvm_check_request(KVM_REQ_HV_RESET, vcpu)) {
9234                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
9235                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_RESET;
9236                         r = 0;
9237                         goto out;
9238                 }
9239                 if (kvm_check_request(KVM_REQ_HV_EXIT, vcpu)) {
9240                         struct kvm_vcpu_hv *hv_vcpu = to_hv_vcpu(vcpu);
9241
9242                         vcpu->run->exit_reason = KVM_EXIT_HYPERV;
9243                         vcpu->run->hyperv = hv_vcpu->exit;
9244                         r = 0;
9245                         goto out;
9246                 }
9247
9248                 /*
9249                  * KVM_REQ_HV_STIMER has to be processed after
9250                  * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
9251                  * depend on the guest clock being up-to-date
9252                  */
9253                 if (kvm_check_request(KVM_REQ_HV_STIMER, vcpu))
9254                         kvm_hv_process_stimers(vcpu);
9255                 if (kvm_check_request(KVM_REQ_APICV_UPDATE, vcpu))
9256                         kvm_vcpu_update_apicv(vcpu);
9257                 if (kvm_check_request(KVM_REQ_APF_READY, vcpu))
9258                         kvm_check_async_pf_completion(vcpu);
9259                 if (kvm_check_request(KVM_REQ_MSR_FILTER_CHANGED, vcpu))
9260                         static_call(kvm_x86_msr_filter_changed)(vcpu);
9261
9262                 if (kvm_check_request(KVM_REQ_UPDATE_CPU_DIRTY_LOGGING, vcpu))
9263                         static_call(kvm_x86_update_cpu_dirty_logging)(vcpu);
9264         }
9265
9266         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win ||
9267             kvm_xen_has_interrupt(vcpu)) {
9268                 ++vcpu->stat.req_event;
9269                 kvm_apic_accept_events(vcpu);
9270                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
9271                         r = 1;
9272                         goto out;
9273                 }
9274
9275                 inject_pending_event(vcpu, &req_immediate_exit);
9276                 if (req_int_win)
9277                         static_call(kvm_x86_enable_irq_window)(vcpu);
9278
9279                 if (kvm_lapic_enabled(vcpu)) {
9280                         update_cr8_intercept(vcpu);
9281                         kvm_lapic_sync_to_vapic(vcpu);
9282                 }
9283         }
9284
9285         r = kvm_mmu_reload(vcpu);
9286         if (unlikely(r)) {
9287                 goto cancel_injection;
9288         }
9289
9290         preempt_disable();
9291
9292         static_call(kvm_x86_prepare_guest_switch)(vcpu);
9293
9294         /*
9295          * Disable IRQs before setting IN_GUEST_MODE.  Posted interrupt
9296          * IPI are then delayed after guest entry, which ensures that they
9297          * result in virtual interrupt delivery.
9298          */
9299         local_irq_disable();
9300         vcpu->mode = IN_GUEST_MODE;
9301
9302         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
9303
9304         /*
9305          * 1) We should set ->mode before checking ->requests.  Please see
9306          * the comment in kvm_vcpu_exiting_guest_mode().
9307          *
9308          * 2) For APICv, we should set ->mode before checking PID.ON. This
9309          * pairs with the memory barrier implicit in pi_test_and_set_on
9310          * (see vmx_deliver_posted_interrupt).
9311          *
9312          * 3) This also orders the write to mode from any reads to the page
9313          * tables done while the VCPU is running.  Please see the comment
9314          * in kvm_flush_remote_tlbs.
9315          */
9316         smp_mb__after_srcu_read_unlock();
9317
9318         /*
9319          * This handles the case where a posted interrupt was
9320          * notified with kvm_vcpu_kick.
9321          */
9322         if (kvm_lapic_enabled(vcpu) && vcpu->arch.apicv_active)
9323                 static_call(kvm_x86_sync_pir_to_irr)(vcpu);
9324
9325         if (kvm_vcpu_exit_request(vcpu)) {
9326                 vcpu->mode = OUTSIDE_GUEST_MODE;
9327                 smp_wmb();
9328                 local_irq_enable();
9329                 preempt_enable();
9330                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
9331                 r = 1;
9332                 goto cancel_injection;
9333         }
9334
9335         if (req_immediate_exit) {
9336                 kvm_make_request(KVM_REQ_EVENT, vcpu);
9337                 static_call(kvm_x86_request_immediate_exit)(vcpu);
9338         }
9339
9340         fpregs_assert_state_consistent();
9341         if (test_thread_flag(TIF_NEED_FPU_LOAD))
9342                 switch_fpu_return();
9343
9344         if (unlikely(vcpu->arch.switch_db_regs)) {
9345                 set_debugreg(0, 7);
9346                 set_debugreg(vcpu->arch.eff_db[0], 0);
9347                 set_debugreg(vcpu->arch.eff_db[1], 1);
9348                 set_debugreg(vcpu->arch.eff_db[2], 2);
9349                 set_debugreg(vcpu->arch.eff_db[3], 3);
9350                 set_debugreg(vcpu->arch.dr6, 6);
9351                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
9352         }
9353
9354         for (;;) {
9355                 exit_fastpath = static_call(kvm_x86_run)(vcpu);
9356                 if (likely(exit_fastpath != EXIT_FASTPATH_REENTER_GUEST))
9357                         break;
9358
9359                 if (unlikely(kvm_vcpu_exit_request(vcpu))) {
9360                         exit_fastpath = EXIT_FASTPATH_EXIT_HANDLED;
9361                         break;
9362                 }
9363
9364                 if (vcpu->arch.apicv_active)
9365                         static_call(kvm_x86_sync_pir_to_irr)(vcpu);
9366         }
9367
9368         /*
9369          * Do this here before restoring debug registers on the host.  And
9370          * since we do this before handling the vmexit, a DR access vmexit
9371          * can (a) read the correct value of the debug registers, (b) set
9372          * KVM_DEBUGREG_WONT_EXIT again.
9373          */
9374         if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
9375                 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
9376                 static_call(kvm_x86_sync_dirty_debug_regs)(vcpu);
9377                 kvm_update_dr0123(vcpu);
9378                 kvm_update_dr7(vcpu);
9379                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
9380         }
9381
9382         /*
9383          * If the guest has used debug registers, at least dr7
9384          * will be disabled while returning to the host.
9385          * If we don't have active breakpoints in the host, we don't
9386          * care about the messed up debug address registers. But if
9387          * we have some of them active, restore the old state.
9388          */
9389         if (hw_breakpoint_active())
9390                 hw_breakpoint_restore();
9391
9392         vcpu->arch.last_vmentry_cpu = vcpu->cpu;
9393         vcpu->arch.last_guest_tsc = kvm_read_l1_tsc(vcpu, rdtsc());
9394
9395         vcpu->mode = OUTSIDE_GUEST_MODE;
9396         smp_wmb();
9397
9398         static_call(kvm_x86_handle_exit_irqoff)(vcpu);
9399
9400         /*
9401          * Consume any pending interrupts, including the possible source of
9402          * VM-Exit on SVM and any ticks that occur between VM-Exit and now.
9403          * An instruction is required after local_irq_enable() to fully unblock
9404          * interrupts on processors that implement an interrupt shadow, the
9405          * stat.exits increment will do nicely.
9406          */
9407         kvm_before_interrupt(vcpu);
9408         local_irq_enable();
9409         ++vcpu->stat.exits;
9410         local_irq_disable();
9411         kvm_after_interrupt(vcpu);
9412
9413         /*
9414          * Wait until after servicing IRQs to account guest time so that any
9415          * ticks that occurred while running the guest are properly accounted
9416          * to the guest.  Waiting until IRQs are enabled degrades the accuracy
9417          * of accounting via context tracking, but the loss of accuracy is
9418          * acceptable for all known use cases.
9419          */
9420         vtime_account_guest_exit();
9421
9422         if (lapic_in_kernel(vcpu)) {
9423                 s64 delta = vcpu->arch.apic->lapic_timer.advance_expire_delta;
9424                 if (delta != S64_MIN) {
9425                         trace_kvm_wait_lapic_expire(vcpu->vcpu_id, delta);
9426                         vcpu->arch.apic->lapic_timer.advance_expire_delta = S64_MIN;
9427                 }
9428         }
9429
9430         local_irq_enable();
9431         preempt_enable();
9432
9433         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
9434
9435         /*
9436          * Profile KVM exit RIPs:
9437          */
9438         if (unlikely(prof_on == KVM_PROFILING)) {
9439                 unsigned long rip = kvm_rip_read(vcpu);
9440                 profile_hit(KVM_PROFILING, (void *)rip);
9441         }
9442
9443         if (unlikely(vcpu->arch.tsc_always_catchup))
9444                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
9445
9446         if (vcpu->arch.apic_attention)
9447                 kvm_lapic_sync_from_vapic(vcpu);
9448
9449         r = static_call(kvm_x86_handle_exit)(vcpu, exit_fastpath);
9450         return r;
9451
9452 cancel_injection:
9453         if (req_immediate_exit)
9454                 kvm_make_request(KVM_REQ_EVENT, vcpu);
9455         static_call(kvm_x86_cancel_injection)(vcpu);
9456         if (unlikely(vcpu->arch.apic_attention))
9457                 kvm_lapic_sync_from_vapic(vcpu);
9458 out:
9459         return r;
9460 }
9461
9462 static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
9463 {
9464         if (!kvm_arch_vcpu_runnable(vcpu) &&
9465             (!kvm_x86_ops.pre_block || static_call(kvm_x86_pre_block)(vcpu) == 0)) {
9466                 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
9467                 kvm_vcpu_block(vcpu);
9468                 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
9469
9470                 if (kvm_x86_ops.post_block)
9471                         static_call(kvm_x86_post_block)(vcpu);
9472
9473                 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
9474                         return 1;
9475         }
9476
9477         kvm_apic_accept_events(vcpu);
9478         switch(vcpu->arch.mp_state) {
9479         case KVM_MP_STATE_HALTED:
9480         case KVM_MP_STATE_AP_RESET_HOLD:
9481                 vcpu->arch.pv.pv_unhalted = false;
9482                 vcpu->arch.mp_state =
9483                         KVM_MP_STATE_RUNNABLE;
9484                 fallthrough;
9485         case KVM_MP_STATE_RUNNABLE:
9486                 vcpu->arch.apf.halted = false;
9487                 break;
9488         case KVM_MP_STATE_INIT_RECEIVED:
9489                 break;
9490         default:
9491                 return -EINTR;
9492         }
9493         return 1;
9494 }
9495
9496 static inline bool kvm_vcpu_running(struct kvm_vcpu *vcpu)
9497 {
9498         if (is_guest_mode(vcpu))
9499                 kvm_check_nested_events(vcpu);
9500
9501         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
9502                 !vcpu->arch.apf.halted);
9503 }
9504
9505 static int vcpu_run(struct kvm_vcpu *vcpu)
9506 {
9507         int r;
9508         struct kvm *kvm = vcpu->kvm;
9509
9510         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
9511         vcpu->arch.l1tf_flush_l1d = true;
9512
9513         for (;;) {
9514                 if (kvm_vcpu_running(vcpu)) {
9515                         r = vcpu_enter_guest(vcpu);
9516                 } else {
9517                         r = vcpu_block(kvm, vcpu);
9518                 }
9519
9520                 if (r <= 0)
9521                         break;
9522
9523                 kvm_clear_request(KVM_REQ_UNBLOCK, vcpu);
9524                 if (kvm_cpu_has_pending_timer(vcpu))
9525                         kvm_inject_pending_timer_irqs(vcpu);
9526
9527                 if (dm_request_for_irq_injection(vcpu) &&
9528                         kvm_vcpu_ready_for_interrupt_injection(vcpu)) {
9529                         r = 0;
9530                         vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
9531                         ++vcpu->stat.request_irq_exits;
9532                         break;
9533                 }
9534
9535                 if (__xfer_to_guest_mode_work_pending()) {
9536                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
9537                         r = xfer_to_guest_mode_handle_work(vcpu);
9538                         if (r)
9539                                 return r;
9540                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
9541                 }
9542         }
9543
9544         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
9545
9546         return r;
9547 }
9548
9549 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
9550 {
9551         int r;
9552
9553         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
9554         r = kvm_emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
9555         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
9556         return r;
9557 }
9558
9559 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
9560 {
9561         BUG_ON(!vcpu->arch.pio.count);
9562
9563         return complete_emulated_io(vcpu);
9564 }
9565
9566 /*
9567  * Implements the following, as a state machine:
9568  *
9569  * read:
9570  *   for each fragment
9571  *     for each mmio piece in the fragment
9572  *       write gpa, len
9573  *       exit
9574  *       copy data
9575  *   execute insn
9576  *
9577  * write:
9578  *   for each fragment
9579  *     for each mmio piece in the fragment
9580  *       write gpa, len
9581  *       copy data
9582  *       exit
9583  */
9584 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
9585 {
9586         struct kvm_run *run = vcpu->run;
9587         struct kvm_mmio_fragment *frag;
9588         unsigned len;
9589
9590         BUG_ON(!vcpu->mmio_needed);
9591
9592         /* Complete previous fragment */
9593         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
9594         len = min(8u, frag->len);
9595         if (!vcpu->mmio_is_write)
9596                 memcpy(frag->data, run->mmio.data, len);
9597
9598         if (frag->len <= 8) {
9599                 /* Switch to the next fragment. */
9600                 frag++;
9601                 vcpu->mmio_cur_fragment++;
9602         } else {
9603                 /* Go forward to the next mmio piece. */
9604                 frag->data += len;
9605                 frag->gpa += len;
9606                 frag->len -= len;
9607         }
9608
9609         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
9610                 vcpu->mmio_needed = 0;
9611
9612                 /* FIXME: return into emulator if single-stepping.  */
9613                 if (vcpu->mmio_is_write)
9614                         return 1;
9615                 vcpu->mmio_read_completed = 1;
9616                 return complete_emulated_io(vcpu);
9617         }
9618
9619         run->exit_reason = KVM_EXIT_MMIO;
9620         run->mmio.phys_addr = frag->gpa;
9621         if (vcpu->mmio_is_write)
9622                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
9623         run->mmio.len = min(8u, frag->len);
9624         run->mmio.is_write = vcpu->mmio_is_write;
9625         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
9626         return 0;
9627 }
9628
9629 static void kvm_save_current_fpu(struct fpu *fpu)
9630 {
9631         /*
9632          * If the target FPU state is not resident in the CPU registers, just
9633          * memcpy() from current, else save CPU state directly to the target.
9634          */
9635         if (test_thread_flag(TIF_NEED_FPU_LOAD))
9636                 memcpy(&fpu->state, &current->thread.fpu.state,
9637                        fpu_kernel_xstate_size);
9638         else
9639                 copy_fpregs_to_fpstate(fpu);
9640 }
9641
9642 /* Swap (qemu) user FPU context for the guest FPU context. */
9643 static void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
9644 {
9645         fpregs_lock();
9646
9647         kvm_save_current_fpu(vcpu->arch.user_fpu);
9648
9649         /*
9650          * Guests with protected state can't have it set by the hypervisor,
9651          * so skip trying to set it.
9652          */
9653         if (vcpu->arch.guest_fpu)
9654                 /* PKRU is separately restored in kvm_x86_ops.run. */
9655                 __copy_kernel_to_fpregs(&vcpu->arch.guest_fpu->state,
9656                                         ~XFEATURE_MASK_PKRU);
9657
9658         fpregs_mark_activate();
9659         fpregs_unlock();
9660
9661         trace_kvm_fpu(1);
9662 }
9663
9664 /* When vcpu_run ends, restore user space FPU context. */
9665 static void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
9666 {
9667         fpregs_lock();
9668
9669         /*
9670          * Guests with protected state can't have it read by the hypervisor,
9671          * so skip trying to save it.
9672          */
9673         if (vcpu->arch.guest_fpu)
9674                 kvm_save_current_fpu(vcpu->arch.guest_fpu);
9675
9676         copy_kernel_to_fpregs(&vcpu->arch.user_fpu->state);
9677
9678         fpregs_mark_activate();
9679         fpregs_unlock();
9680
9681         ++vcpu->stat.fpu_reload;
9682         trace_kvm_fpu(0);
9683 }
9684
9685 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu)
9686 {
9687         struct kvm_run *kvm_run = vcpu->run;
9688         int r;
9689
9690         vcpu_load(vcpu);
9691         kvm_sigset_activate(vcpu);
9692         kvm_run->flags = 0;
9693         kvm_load_guest_fpu(vcpu);
9694
9695         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
9696                 if (kvm_run->immediate_exit) {
9697                         r = -EINTR;
9698                         goto out;
9699                 }
9700                 kvm_vcpu_block(vcpu);
9701                 kvm_apic_accept_events(vcpu);
9702                 kvm_clear_request(KVM_REQ_UNHALT, vcpu);
9703                 r = -EAGAIN;
9704                 if (signal_pending(current)) {
9705                         r = -EINTR;
9706                         kvm_run->exit_reason = KVM_EXIT_INTR;
9707                         ++vcpu->stat.signal_exits;
9708                 }
9709                 goto out;
9710         }
9711
9712         if (kvm_run->kvm_valid_regs & ~KVM_SYNC_X86_VALID_FIELDS) {
9713                 r = -EINVAL;
9714                 goto out;
9715         }
9716
9717         if (kvm_run->kvm_dirty_regs) {
9718                 r = sync_regs(vcpu);
9719                 if (r != 0)
9720                         goto out;
9721         }
9722
9723         /* re-sync apic's tpr */
9724         if (!lapic_in_kernel(vcpu)) {
9725                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
9726                         r = -EINVAL;
9727                         goto out;
9728                 }
9729         }
9730
9731         if (unlikely(vcpu->arch.complete_userspace_io)) {
9732                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
9733                 vcpu->arch.complete_userspace_io = NULL;
9734                 r = cui(vcpu);
9735                 if (r <= 0)
9736                         goto out;
9737         } else
9738                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
9739
9740         if (kvm_run->immediate_exit)
9741                 r = -EINTR;
9742         else
9743                 r = vcpu_run(vcpu);
9744
9745 out:
9746         kvm_put_guest_fpu(vcpu);
9747         if (kvm_run->kvm_valid_regs)
9748                 store_regs(vcpu);
9749         post_kvm_run_save(vcpu);
9750         kvm_sigset_deactivate(vcpu);
9751
9752         vcpu_put(vcpu);
9753         return r;
9754 }
9755
9756 static void __get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
9757 {
9758         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
9759                 /*
9760                  * We are here if userspace calls get_regs() in the middle of
9761                  * instruction emulation. Registers state needs to be copied
9762                  * back from emulation context to vcpu. Userspace shouldn't do
9763                  * that usually, but some bad designed PV devices (vmware
9764                  * backdoor interface) need this to work
9765                  */
9766                 emulator_writeback_register_cache(vcpu->arch.emulate_ctxt);
9767                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
9768         }
9769         regs->rax = kvm_rax_read(vcpu);
9770         regs->rbx = kvm_rbx_read(vcpu);
9771         regs->rcx = kvm_rcx_read(vcpu);
9772         regs->rdx = kvm_rdx_read(vcpu);
9773         regs->rsi = kvm_rsi_read(vcpu);
9774         regs->rdi = kvm_rdi_read(vcpu);
9775         regs->rsp = kvm_rsp_read(vcpu);
9776         regs->rbp = kvm_rbp_read(vcpu);
9777 #ifdef CONFIG_X86_64
9778         regs->r8 = kvm_r8_read(vcpu);
9779         regs->r9 = kvm_r9_read(vcpu);
9780         regs->r10 = kvm_r10_read(vcpu);
9781         regs->r11 = kvm_r11_read(vcpu);
9782         regs->r12 = kvm_r12_read(vcpu);
9783         regs->r13 = kvm_r13_read(vcpu);
9784         regs->r14 = kvm_r14_read(vcpu);
9785         regs->r15 = kvm_r15_read(vcpu);
9786 #endif
9787
9788         regs->rip = kvm_rip_read(vcpu);
9789         regs->rflags = kvm_get_rflags(vcpu);
9790 }
9791
9792 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
9793 {
9794         vcpu_load(vcpu);
9795         __get_regs(vcpu, regs);
9796         vcpu_put(vcpu);
9797         return 0;
9798 }
9799
9800 static void __set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
9801 {
9802         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
9803         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
9804
9805         kvm_rax_write(vcpu, regs->rax);
9806         kvm_rbx_write(vcpu, regs->rbx);
9807         kvm_rcx_write(vcpu, regs->rcx);
9808         kvm_rdx_write(vcpu, regs->rdx);
9809         kvm_rsi_write(vcpu, regs->rsi);
9810         kvm_rdi_write(vcpu, regs->rdi);
9811         kvm_rsp_write(vcpu, regs->rsp);
9812         kvm_rbp_write(vcpu, regs->rbp);
9813 #ifdef CONFIG_X86_64
9814         kvm_r8_write(vcpu, regs->r8);
9815         kvm_r9_write(vcpu, regs->r9);
9816         kvm_r10_write(vcpu, regs->r10);
9817         kvm_r11_write(vcpu, regs->r11);
9818         kvm_r12_write(vcpu, regs->r12);
9819         kvm_r13_write(vcpu, regs->r13);
9820         kvm_r14_write(vcpu, regs->r14);
9821         kvm_r15_write(vcpu, regs->r15);
9822 #endif
9823
9824         kvm_rip_write(vcpu, regs->rip);
9825         kvm_set_rflags(vcpu, regs->rflags | X86_EFLAGS_FIXED);
9826
9827         vcpu->arch.exception.pending = false;
9828
9829         kvm_make_request(KVM_REQ_EVENT, vcpu);
9830 }
9831
9832 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
9833 {
9834         vcpu_load(vcpu);
9835         __set_regs(vcpu, regs);
9836         vcpu_put(vcpu);
9837         return 0;
9838 }
9839
9840 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
9841 {
9842         struct kvm_segment cs;
9843
9844         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
9845         *db = cs.db;
9846         *l = cs.l;
9847 }
9848 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
9849
9850 static void __get_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
9851 {
9852         struct desc_ptr dt;
9853
9854         if (vcpu->arch.guest_state_protected)
9855                 goto skip_protected_regs;
9856
9857         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
9858         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
9859         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
9860         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
9861         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
9862         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
9863
9864         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
9865         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
9866
9867         static_call(kvm_x86_get_idt)(vcpu, &dt);
9868         sregs->idt.limit = dt.size;
9869         sregs->idt.base = dt.address;
9870         static_call(kvm_x86_get_gdt)(vcpu, &dt);
9871         sregs->gdt.limit = dt.size;
9872         sregs->gdt.base = dt.address;
9873
9874         sregs->cr2 = vcpu->arch.cr2;
9875         sregs->cr3 = kvm_read_cr3(vcpu);
9876
9877 skip_protected_regs:
9878         sregs->cr0 = kvm_read_cr0(vcpu);
9879         sregs->cr4 = kvm_read_cr4(vcpu);
9880         sregs->cr8 = kvm_get_cr8(vcpu);
9881         sregs->efer = vcpu->arch.efer;
9882         sregs->apic_base = kvm_get_apic_base(vcpu);
9883
9884         memset(sregs->interrupt_bitmap, 0, sizeof(sregs->interrupt_bitmap));
9885
9886         if (vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft)
9887                 set_bit(vcpu->arch.interrupt.nr,
9888                         (unsigned long *)sregs->interrupt_bitmap);
9889 }
9890
9891 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
9892                                   struct kvm_sregs *sregs)
9893 {
9894         vcpu_load(vcpu);
9895         __get_sregs(vcpu, sregs);
9896         vcpu_put(vcpu);
9897         return 0;
9898 }
9899
9900 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
9901                                     struct kvm_mp_state *mp_state)
9902 {
9903         vcpu_load(vcpu);
9904         if (kvm_mpx_supported())
9905                 kvm_load_guest_fpu(vcpu);
9906
9907         kvm_apic_accept_events(vcpu);
9908         if ((vcpu->arch.mp_state == KVM_MP_STATE_HALTED ||
9909              vcpu->arch.mp_state == KVM_MP_STATE_AP_RESET_HOLD) &&
9910             vcpu->arch.pv.pv_unhalted)
9911                 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
9912         else
9913                 mp_state->mp_state = vcpu->arch.mp_state;
9914
9915         if (kvm_mpx_supported())
9916                 kvm_put_guest_fpu(vcpu);
9917         vcpu_put(vcpu);
9918         return 0;
9919 }
9920
9921 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
9922                                     struct kvm_mp_state *mp_state)
9923 {
9924         int ret = -EINVAL;
9925
9926         vcpu_load(vcpu);
9927
9928         if (!lapic_in_kernel(vcpu) &&
9929             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
9930                 goto out;
9931
9932         /*
9933          * KVM_MP_STATE_INIT_RECEIVED means the processor is in
9934          * INIT state; latched init should be reported using
9935          * KVM_SET_VCPU_EVENTS, so reject it here.
9936          */
9937         if ((kvm_vcpu_latch_init(vcpu) || vcpu->arch.smi_pending) &&
9938             (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED ||
9939              mp_state->mp_state == KVM_MP_STATE_INIT_RECEIVED))
9940                 goto out;
9941
9942         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
9943                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
9944                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
9945         } else
9946                 vcpu->arch.mp_state = mp_state->mp_state;
9947         kvm_make_request(KVM_REQ_EVENT, vcpu);
9948
9949         ret = 0;
9950 out:
9951         vcpu_put(vcpu);
9952         return ret;
9953 }
9954
9955 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
9956                     int reason, bool has_error_code, u32 error_code)
9957 {
9958         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
9959         int ret;
9960
9961         init_emulate_ctxt(vcpu);
9962
9963         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
9964                                    has_error_code, error_code);
9965         if (ret) {
9966                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
9967                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
9968                 vcpu->run->internal.ndata = 0;
9969                 return 0;
9970         }
9971
9972         kvm_rip_write(vcpu, ctxt->eip);
9973         kvm_set_rflags(vcpu, ctxt->eflags);
9974         return 1;
9975 }
9976 EXPORT_SYMBOL_GPL(kvm_task_switch);
9977
9978 static bool kvm_is_valid_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
9979 {
9980         if ((sregs->efer & EFER_LME) && (sregs->cr0 & X86_CR0_PG)) {
9981                 /*
9982                  * When EFER.LME and CR0.PG are set, the processor is in
9983                  * 64-bit mode (though maybe in a 32-bit code segment).
9984                  * CR4.PAE and EFER.LMA must be set.
9985                  */
9986                 if (!(sregs->cr4 & X86_CR4_PAE) || !(sregs->efer & EFER_LMA))
9987                         return false;
9988                 if (kvm_vcpu_is_illegal_gpa(vcpu, sregs->cr3))
9989                         return false;
9990         } else {
9991                 /*
9992                  * Not in 64-bit mode: EFER.LMA is clear and the code
9993                  * segment cannot be 64-bit.
9994                  */
9995                 if (sregs->efer & EFER_LMA || sregs->cs.l)
9996                         return false;
9997         }
9998
9999         return kvm_is_valid_cr4(vcpu, sregs->cr4);
10000 }
10001
10002 static int __set_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
10003 {
10004         struct msr_data apic_base_msr;
10005         int mmu_reset_needed = 0;
10006         int pending_vec, max_bits, idx;
10007         struct desc_ptr dt;
10008         int ret = -EINVAL;
10009
10010         if (!kvm_is_valid_sregs(vcpu, sregs))
10011                 goto out;
10012
10013         apic_base_msr.data = sregs->apic_base;
10014         apic_base_msr.host_initiated = true;
10015         if (kvm_set_apic_base(vcpu, &apic_base_msr))
10016                 goto out;
10017
10018         if (vcpu->arch.guest_state_protected)
10019                 goto skip_protected_regs;
10020
10021         dt.size = sregs->idt.limit;
10022         dt.address = sregs->idt.base;
10023         static_call(kvm_x86_set_idt)(vcpu, &dt);
10024         dt.size = sregs->gdt.limit;
10025         dt.address = sregs->gdt.base;
10026         static_call(kvm_x86_set_gdt)(vcpu, &dt);
10027
10028         vcpu->arch.cr2 = sregs->cr2;
10029         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
10030         vcpu->arch.cr3 = sregs->cr3;
10031         kvm_register_mark_available(vcpu, VCPU_EXREG_CR3);
10032
10033         kvm_set_cr8(vcpu, sregs->cr8);
10034
10035         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
10036         static_call(kvm_x86_set_efer)(vcpu, sregs->efer);
10037
10038         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
10039         static_call(kvm_x86_set_cr0)(vcpu, sregs->cr0);
10040         vcpu->arch.cr0 = sregs->cr0;
10041
10042         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
10043         static_call(kvm_x86_set_cr4)(vcpu, sregs->cr4);
10044
10045         idx = srcu_read_lock(&vcpu->kvm->srcu);
10046         if (is_pae_paging(vcpu)) {
10047                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
10048                 mmu_reset_needed = 1;
10049         }
10050         srcu_read_unlock(&vcpu->kvm->srcu, idx);
10051
10052         if (mmu_reset_needed)
10053                 kvm_mmu_reset_context(vcpu);
10054
10055         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
10056         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
10057         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
10058         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
10059         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
10060         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
10061
10062         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
10063         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
10064
10065         update_cr8_intercept(vcpu);
10066
10067         /* Older userspace won't unhalt the vcpu on reset. */
10068         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
10069             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
10070             !is_protmode(vcpu))
10071                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
10072
10073 skip_protected_regs:
10074         max_bits = KVM_NR_INTERRUPTS;
10075         pending_vec = find_first_bit(
10076                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
10077         if (pending_vec < max_bits) {
10078                 kvm_queue_interrupt(vcpu, pending_vec, false);
10079                 pr_debug("Set back pending irq %d\n", pending_vec);
10080         }
10081
10082         kvm_make_request(KVM_REQ_EVENT, vcpu);
10083
10084         ret = 0;
10085 out:
10086         return ret;
10087 }
10088
10089 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
10090                                   struct kvm_sregs *sregs)
10091 {
10092         int ret;
10093
10094         vcpu_load(vcpu);
10095         ret = __set_sregs(vcpu, sregs);
10096         vcpu_put(vcpu);
10097         return ret;
10098 }
10099
10100 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
10101                                         struct kvm_guest_debug *dbg)
10102 {
10103         unsigned long rflags;
10104         int i, r;
10105
10106         if (vcpu->arch.guest_state_protected)
10107                 return -EINVAL;
10108
10109         vcpu_load(vcpu);
10110
10111         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
10112                 r = -EBUSY;
10113                 if (vcpu->arch.exception.pending)
10114                         goto out;
10115                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
10116                         kvm_queue_exception(vcpu, DB_VECTOR);
10117                 else
10118                         kvm_queue_exception(vcpu, BP_VECTOR);
10119         }
10120
10121         /*
10122          * Read rflags as long as potentially injected trace flags are still
10123          * filtered out.
10124          */
10125         rflags = kvm_get_rflags(vcpu);
10126
10127         vcpu->guest_debug = dbg->control;
10128         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
10129                 vcpu->guest_debug = 0;
10130
10131         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
10132                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
10133                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
10134                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
10135         } else {
10136                 for (i = 0; i < KVM_NR_DB_REGS; i++)
10137                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
10138         }
10139         kvm_update_dr7(vcpu);
10140
10141         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
10142                 vcpu->arch.singlestep_rip = kvm_get_linear_rip(vcpu);
10143
10144         /*
10145          * Trigger an rflags update that will inject or remove the trace
10146          * flags.
10147          */
10148         kvm_set_rflags(vcpu, rflags);
10149
10150         static_call(kvm_x86_update_exception_bitmap)(vcpu);
10151
10152         r = 0;
10153
10154 out:
10155         vcpu_put(vcpu);
10156         return r;
10157 }
10158
10159 /*
10160  * Translate a guest virtual address to a guest physical address.
10161  */
10162 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
10163                                     struct kvm_translation *tr)
10164 {
10165         unsigned long vaddr = tr->linear_address;
10166         gpa_t gpa;
10167         int idx;
10168
10169         vcpu_load(vcpu);
10170
10171         idx = srcu_read_lock(&vcpu->kvm->srcu);
10172         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
10173         srcu_read_unlock(&vcpu->kvm->srcu, idx);
10174         tr->physical_address = gpa;
10175         tr->valid = gpa != UNMAPPED_GVA;
10176         tr->writeable = 1;
10177         tr->usermode = 0;
10178
10179         vcpu_put(vcpu);
10180         return 0;
10181 }
10182
10183 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
10184 {
10185         struct fxregs_state *fxsave;
10186
10187         if (!vcpu->arch.guest_fpu)
10188                 return 0;
10189
10190         vcpu_load(vcpu);
10191
10192         fxsave = &vcpu->arch.guest_fpu->state.fxsave;
10193         memcpy(fpu->fpr, fxsave->st_space, 128);
10194         fpu->fcw = fxsave->cwd;
10195         fpu->fsw = fxsave->swd;
10196         fpu->ftwx = fxsave->twd;
10197         fpu->last_opcode = fxsave->fop;
10198         fpu->last_ip = fxsave->rip;
10199         fpu->last_dp = fxsave->rdp;
10200         memcpy(fpu->xmm, fxsave->xmm_space, sizeof(fxsave->xmm_space));
10201
10202         vcpu_put(vcpu);
10203         return 0;
10204 }
10205
10206 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
10207 {
10208         struct fxregs_state *fxsave;
10209
10210         if (!vcpu->arch.guest_fpu)
10211                 return 0;
10212
10213         vcpu_load(vcpu);
10214
10215         fxsave = &vcpu->arch.guest_fpu->state.fxsave;
10216
10217         memcpy(fxsave->st_space, fpu->fpr, 128);
10218         fxsave->cwd = fpu->fcw;
10219         fxsave->swd = fpu->fsw;
10220         fxsave->twd = fpu->ftwx;
10221         fxsave->fop = fpu->last_opcode;
10222         fxsave->rip = fpu->last_ip;
10223         fxsave->rdp = fpu->last_dp;
10224         memcpy(fxsave->xmm_space, fpu->xmm, sizeof(fxsave->xmm_space));
10225
10226         vcpu_put(vcpu);
10227         return 0;
10228 }
10229
10230 static void store_regs(struct kvm_vcpu *vcpu)
10231 {
10232         BUILD_BUG_ON(sizeof(struct kvm_sync_regs) > SYNC_REGS_SIZE_BYTES);
10233
10234         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_REGS)
10235                 __get_regs(vcpu, &vcpu->run->s.regs.regs);
10236
10237         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_SREGS)
10238                 __get_sregs(vcpu, &vcpu->run->s.regs.sregs);
10239
10240         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_EVENTS)
10241                 kvm_vcpu_ioctl_x86_get_vcpu_events(
10242                                 vcpu, &vcpu->run->s.regs.events);
10243 }
10244
10245 static int sync_regs(struct kvm_vcpu *vcpu)
10246 {
10247         if (vcpu->run->kvm_dirty_regs & ~KVM_SYNC_X86_VALID_FIELDS)
10248                 return -EINVAL;
10249
10250         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_REGS) {
10251                 __set_regs(vcpu, &vcpu->run->s.regs.regs);
10252                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_REGS;
10253         }
10254         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_SREGS) {
10255                 if (__set_sregs(vcpu, &vcpu->run->s.regs.sregs))
10256                         return -EINVAL;
10257                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_SREGS;
10258         }
10259         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_EVENTS) {
10260                 if (kvm_vcpu_ioctl_x86_set_vcpu_events(
10261                                 vcpu, &vcpu->run->s.regs.events))
10262                         return -EINVAL;
10263                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_EVENTS;
10264         }
10265
10266         return 0;
10267 }
10268
10269 static void fx_init(struct kvm_vcpu *vcpu)
10270 {
10271         if (!vcpu->arch.guest_fpu)
10272                 return;
10273
10274         fpstate_init(&vcpu->arch.guest_fpu->state);
10275         if (boot_cpu_has(X86_FEATURE_XSAVES))
10276                 vcpu->arch.guest_fpu->state.xsave.header.xcomp_bv =
10277                         host_xcr0 | XSTATE_COMPACTION_ENABLED;
10278
10279         /*
10280          * Ensure guest xcr0 is valid for loading
10281          */
10282         vcpu->arch.xcr0 = XFEATURE_MASK_FP;
10283
10284         vcpu->arch.cr0 |= X86_CR0_ET;
10285 }
10286
10287 void kvm_free_guest_fpu(struct kvm_vcpu *vcpu)
10288 {
10289         if (vcpu->arch.guest_fpu) {
10290                 kmem_cache_free(x86_fpu_cache, vcpu->arch.guest_fpu);
10291                 vcpu->arch.guest_fpu = NULL;
10292         }
10293 }
10294 EXPORT_SYMBOL_GPL(kvm_free_guest_fpu);
10295
10296 int kvm_arch_vcpu_precreate(struct kvm *kvm, unsigned int id)
10297 {
10298         if (kvm_check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
10299                 pr_warn_once("kvm: SMP vm created on host with unstable TSC; "
10300                              "guest TSC will not be reliable\n");
10301
10302         return 0;
10303 }
10304
10305 int kvm_arch_vcpu_create(struct kvm_vcpu *vcpu)
10306 {
10307         struct page *page;
10308         int r;
10309
10310         if (!irqchip_in_kernel(vcpu->kvm) || kvm_vcpu_is_reset_bsp(vcpu))
10311                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
10312         else
10313                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
10314
10315         kvm_set_tsc_khz(vcpu, max_tsc_khz);
10316
10317         r = kvm_mmu_create(vcpu);
10318         if (r < 0)
10319                 return r;
10320
10321         if (irqchip_in_kernel(vcpu->kvm)) {
10322                 r = kvm_create_lapic(vcpu, lapic_timer_advance_ns);
10323                 if (r < 0)
10324                         goto fail_mmu_destroy;
10325                 if (kvm_apicv_activated(vcpu->kvm))
10326                         vcpu->arch.apicv_active = true;
10327         } else
10328                 static_branch_inc(&kvm_has_noapic_vcpu);
10329
10330         r = -ENOMEM;
10331
10332         page = alloc_page(GFP_KERNEL_ACCOUNT | __GFP_ZERO);
10333         if (!page)
10334                 goto fail_free_lapic;
10335         vcpu->arch.pio_data = page_address(page);
10336
10337         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
10338                                        GFP_KERNEL_ACCOUNT);
10339         if (!vcpu->arch.mce_banks)
10340                 goto fail_free_pio_data;
10341         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
10342
10343         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask,
10344                                 GFP_KERNEL_ACCOUNT))
10345                 goto fail_free_mce_banks;
10346
10347         if (!alloc_emulate_ctxt(vcpu))
10348                 goto free_wbinvd_dirty_mask;
10349
10350         vcpu->arch.user_fpu = kmem_cache_zalloc(x86_fpu_cache,
10351                                                 GFP_KERNEL_ACCOUNT);
10352         if (!vcpu->arch.user_fpu) {
10353                 pr_err("kvm: failed to allocate userspace's fpu\n");
10354                 goto free_emulate_ctxt;
10355         }
10356
10357         vcpu->arch.guest_fpu = kmem_cache_zalloc(x86_fpu_cache,
10358                                                  GFP_KERNEL_ACCOUNT);
10359         if (!vcpu->arch.guest_fpu) {
10360                 pr_err("kvm: failed to allocate vcpu's fpu\n");
10361                 goto free_user_fpu;
10362         }
10363         fx_init(vcpu);
10364
10365         vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
10366         vcpu->arch.reserved_gpa_bits = kvm_vcpu_reserved_gpa_bits_raw(vcpu);
10367
10368         vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
10369
10370         kvm_async_pf_hash_reset(vcpu);
10371         kvm_pmu_init(vcpu);
10372
10373         vcpu->arch.pending_external_vector = -1;
10374         vcpu->arch.preempted_in_kernel = false;
10375
10376         r = static_call(kvm_x86_vcpu_create)(vcpu);
10377         if (r)
10378                 goto free_guest_fpu;
10379
10380         vcpu->arch.arch_capabilities = kvm_get_arch_capabilities();
10381         vcpu->arch.msr_platform_info = MSR_PLATFORM_INFO_CPUID_FAULT;
10382         kvm_vcpu_mtrr_init(vcpu);
10383         vcpu_load(vcpu);
10384         kvm_vcpu_reset(vcpu, false);
10385         kvm_init_mmu(vcpu, false);
10386         vcpu_put(vcpu);
10387         return 0;
10388
10389 free_guest_fpu:
10390         kvm_free_guest_fpu(vcpu);
10391 free_user_fpu:
10392         kmem_cache_free(x86_fpu_cache, vcpu->arch.user_fpu);
10393 free_emulate_ctxt:
10394         kmem_cache_free(x86_emulator_cache, vcpu->arch.emulate_ctxt);
10395 free_wbinvd_dirty_mask:
10396         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
10397 fail_free_mce_banks:
10398         kfree(vcpu->arch.mce_banks);
10399 fail_free_pio_data:
10400         free_page((unsigned long)vcpu->arch.pio_data);
10401 fail_free_lapic:
10402         kvm_free_lapic(vcpu);
10403 fail_mmu_destroy:
10404         kvm_mmu_destroy(vcpu);
10405         return r;
10406 }
10407
10408 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
10409 {
10410         struct kvm *kvm = vcpu->kvm;
10411
10412         if (mutex_lock_killable(&vcpu->mutex))
10413                 return;
10414         vcpu_load(vcpu);
10415         kvm_synchronize_tsc(vcpu, 0);
10416         vcpu_put(vcpu);
10417
10418         /* poll control enabled by default */
10419         vcpu->arch.msr_kvm_poll_control = 1;
10420
10421         mutex_unlock(&vcpu->mutex);
10422
10423         if (kvmclock_periodic_sync && vcpu->vcpu_idx == 0)
10424                 schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
10425                                                 KVMCLOCK_SYNC_PERIOD);
10426 }
10427
10428 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
10429 {
10430         struct gfn_to_pfn_cache *cache = &vcpu->arch.st.cache;
10431         int idx;
10432
10433         kvm_release_pfn(cache->pfn, cache->dirty, cache);
10434
10435         kvmclock_reset(vcpu);
10436
10437         static_call(kvm_x86_vcpu_free)(vcpu);
10438
10439         kmem_cache_free(x86_emulator_cache, vcpu->arch.emulate_ctxt);
10440         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
10441         kmem_cache_free(x86_fpu_cache, vcpu->arch.user_fpu);
10442         kvm_free_guest_fpu(vcpu);
10443
10444         kvm_hv_vcpu_uninit(vcpu);
10445         kvm_pmu_destroy(vcpu);
10446         kfree(vcpu->arch.mce_banks);
10447         kvm_free_lapic(vcpu);
10448         idx = srcu_read_lock(&vcpu->kvm->srcu);
10449         kvm_mmu_destroy(vcpu);
10450         srcu_read_unlock(&vcpu->kvm->srcu, idx);
10451         free_page((unsigned long)vcpu->arch.pio_data);
10452         kvfree(vcpu->arch.cpuid_entries);
10453         if (!lapic_in_kernel(vcpu))
10454                 static_branch_dec(&kvm_has_noapic_vcpu);
10455 }
10456
10457 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
10458 {
10459         kvm_lapic_reset(vcpu, init_event);
10460
10461         vcpu->arch.hflags = 0;
10462
10463         vcpu->arch.smi_pending = 0;
10464         vcpu->arch.smi_count = 0;
10465         atomic_set(&vcpu->arch.nmi_queued, 0);
10466         vcpu->arch.nmi_pending = 0;
10467         vcpu->arch.nmi_injected = false;
10468         kvm_clear_interrupt_queue(vcpu);
10469         kvm_clear_exception_queue(vcpu);
10470
10471         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
10472         kvm_update_dr0123(vcpu);
10473         vcpu->arch.dr6 = DR6_ACTIVE_LOW;
10474         vcpu->arch.dr7 = DR7_FIXED_1;
10475         kvm_update_dr7(vcpu);
10476
10477         vcpu->arch.cr2 = 0;
10478
10479         kvm_make_request(KVM_REQ_EVENT, vcpu);
10480         vcpu->arch.apf.msr_en_val = 0;
10481         vcpu->arch.apf.msr_int_val = 0;
10482         vcpu->arch.st.msr_val = 0;
10483
10484         kvmclock_reset(vcpu);
10485
10486         kvm_clear_async_pf_completion_queue(vcpu);
10487         kvm_async_pf_hash_reset(vcpu);
10488         vcpu->arch.apf.halted = false;
10489
10490         if (vcpu->arch.guest_fpu && kvm_mpx_supported()) {
10491                 void *mpx_state_buffer;
10492
10493                 /*
10494                  * To avoid have the INIT path from kvm_apic_has_events() that be
10495                  * called with loaded FPU and does not let userspace fix the state.
10496                  */
10497                 if (init_event)
10498                         kvm_put_guest_fpu(vcpu);
10499                 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu->state.xsave,
10500                                         XFEATURE_BNDREGS);
10501                 if (mpx_state_buffer)
10502                         memset(mpx_state_buffer, 0, sizeof(struct mpx_bndreg_state));
10503                 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu->state.xsave,
10504                                         XFEATURE_BNDCSR);
10505                 if (mpx_state_buffer)
10506                         memset(mpx_state_buffer, 0, sizeof(struct mpx_bndcsr));
10507                 if (init_event)
10508                         kvm_load_guest_fpu(vcpu);
10509         }
10510
10511         if (!init_event) {
10512                 kvm_pmu_reset(vcpu);
10513                 vcpu->arch.smbase = 0x30000;
10514
10515                 vcpu->arch.msr_misc_features_enables = 0;
10516
10517                 vcpu->arch.xcr0 = XFEATURE_MASK_FP;
10518         }
10519
10520         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
10521         vcpu->arch.regs_avail = ~0;
10522         vcpu->arch.regs_dirty = ~0;
10523
10524         vcpu->arch.ia32_xss = 0;
10525
10526         static_call(kvm_x86_vcpu_reset)(vcpu, init_event);
10527 }
10528
10529 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
10530 {
10531         struct kvm_segment cs;
10532
10533         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
10534         cs.selector = vector << 8;
10535         cs.base = vector << 12;
10536         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
10537         kvm_rip_write(vcpu, 0);
10538 }
10539 EXPORT_SYMBOL_GPL(kvm_vcpu_deliver_sipi_vector);
10540
10541 int kvm_arch_hardware_enable(void)
10542 {
10543         struct kvm *kvm;
10544         struct kvm_vcpu *vcpu;
10545         int i;
10546         int ret;
10547         u64 local_tsc;
10548         u64 max_tsc = 0;
10549         bool stable, backwards_tsc = false;
10550
10551         kvm_user_return_msr_cpu_online();
10552         ret = static_call(kvm_x86_hardware_enable)();
10553         if (ret != 0)
10554                 return ret;
10555
10556         local_tsc = rdtsc();
10557         stable = !kvm_check_tsc_unstable();
10558         list_for_each_entry(kvm, &vm_list, vm_list) {
10559                 kvm_for_each_vcpu(i, vcpu, kvm) {
10560                         if (!stable && vcpu->cpu == smp_processor_id())
10561                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
10562                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
10563                                 backwards_tsc = true;
10564                                 if (vcpu->arch.last_host_tsc > max_tsc)
10565                                         max_tsc = vcpu->arch.last_host_tsc;
10566                         }
10567                 }
10568         }
10569
10570         /*
10571          * Sometimes, even reliable TSCs go backwards.  This happens on
10572          * platforms that reset TSC during suspend or hibernate actions, but
10573          * maintain synchronization.  We must compensate.  Fortunately, we can
10574          * detect that condition here, which happens early in CPU bringup,
10575          * before any KVM threads can be running.  Unfortunately, we can't
10576          * bring the TSCs fully up to date with real time, as we aren't yet far
10577          * enough into CPU bringup that we know how much real time has actually
10578          * elapsed; our helper function, ktime_get_boottime_ns() will be using boot
10579          * variables that haven't been updated yet.
10580          *
10581          * So we simply find the maximum observed TSC above, then record the
10582          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
10583          * the adjustment will be applied.  Note that we accumulate
10584          * adjustments, in case multiple suspend cycles happen before some VCPU
10585          * gets a chance to run again.  In the event that no KVM threads get a
10586          * chance to run, we will miss the entire elapsed period, as we'll have
10587          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
10588          * loose cycle time.  This isn't too big a deal, since the loss will be
10589          * uniform across all VCPUs (not to mention the scenario is extremely
10590          * unlikely). It is possible that a second hibernate recovery happens
10591          * much faster than a first, causing the observed TSC here to be
10592          * smaller; this would require additional padding adjustment, which is
10593          * why we set last_host_tsc to the local tsc observed here.
10594          *
10595          * N.B. - this code below runs only on platforms with reliable TSC,
10596          * as that is the only way backwards_tsc is set above.  Also note
10597          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
10598          * have the same delta_cyc adjustment applied if backwards_tsc
10599          * is detected.  Note further, this adjustment is only done once,
10600          * as we reset last_host_tsc on all VCPUs to stop this from being
10601          * called multiple times (one for each physical CPU bringup).
10602          *
10603          * Platforms with unreliable TSCs don't have to deal with this, they
10604          * will be compensated by the logic in vcpu_load, which sets the TSC to
10605          * catchup mode.  This will catchup all VCPUs to real time, but cannot
10606          * guarantee that they stay in perfect synchronization.
10607          */
10608         if (backwards_tsc) {
10609                 u64 delta_cyc = max_tsc - local_tsc;
10610                 list_for_each_entry(kvm, &vm_list, vm_list) {
10611                         kvm->arch.backwards_tsc_observed = true;
10612                         kvm_for_each_vcpu(i, vcpu, kvm) {
10613                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
10614                                 vcpu->arch.last_host_tsc = local_tsc;
10615                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
10616                         }
10617
10618                         /*
10619                          * We have to disable TSC offset matching.. if you were
10620                          * booting a VM while issuing an S4 host suspend....
10621                          * you may have some problem.  Solving this issue is
10622                          * left as an exercise to the reader.
10623                          */
10624                         kvm->arch.last_tsc_nsec = 0;
10625                         kvm->arch.last_tsc_write = 0;
10626                 }
10627
10628         }
10629         return 0;
10630 }
10631
10632 void kvm_arch_hardware_disable(void)
10633 {
10634         static_call(kvm_x86_hardware_disable)();
10635         drop_user_return_notifiers();
10636 }
10637
10638 int kvm_arch_hardware_setup(void *opaque)
10639 {
10640         struct kvm_x86_init_ops *ops = opaque;
10641         int r;
10642
10643         rdmsrl_safe(MSR_EFER, &host_efer);
10644
10645         if (boot_cpu_has(X86_FEATURE_XSAVES))
10646                 rdmsrl(MSR_IA32_XSS, host_xss);
10647
10648         r = ops->hardware_setup();
10649         if (r != 0)
10650                 return r;
10651
10652         memcpy(&kvm_x86_ops, ops->runtime_ops, sizeof(kvm_x86_ops));
10653         kvm_ops_static_call_update();
10654
10655         if (!kvm_cpu_cap_has(X86_FEATURE_XSAVES))
10656                 supported_xss = 0;
10657
10658 #define __kvm_cpu_cap_has(UNUSED_, f) kvm_cpu_cap_has(f)
10659         cr4_reserved_bits = __cr4_reserved_bits(__kvm_cpu_cap_has, UNUSED_);
10660 #undef __kvm_cpu_cap_has
10661
10662         if (kvm_has_tsc_control) {
10663                 /*
10664                  * Make sure the user can only configure tsc_khz values that
10665                  * fit into a signed integer.
10666                  * A min value is not calculated because it will always
10667                  * be 1 on all machines.
10668                  */
10669                 u64 max = min(0x7fffffffULL,
10670                               __scale_tsc(kvm_max_tsc_scaling_ratio, tsc_khz));
10671                 kvm_max_guest_tsc_khz = max;
10672
10673                 kvm_default_tsc_scaling_ratio = 1ULL << kvm_tsc_scaling_ratio_frac_bits;
10674         }
10675
10676         kvm_init_msr_list();
10677         return 0;
10678 }
10679
10680 void kvm_arch_hardware_unsetup(void)
10681 {
10682         static_call(kvm_x86_hardware_unsetup)();
10683 }
10684
10685 int kvm_arch_check_processor_compat(void *opaque)
10686 {
10687         struct cpuinfo_x86 *c = &cpu_data(smp_processor_id());
10688         struct kvm_x86_init_ops *ops = opaque;
10689
10690         WARN_ON(!irqs_disabled());
10691
10692         if (__cr4_reserved_bits(cpu_has, c) !=
10693             __cr4_reserved_bits(cpu_has, &boot_cpu_data))
10694                 return -EIO;
10695
10696         return ops->check_processor_compatibility();
10697 }
10698
10699 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
10700 {
10701         return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
10702 }
10703 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp);
10704
10705 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
10706 {
10707         return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
10708 }
10709
10710 __read_mostly DEFINE_STATIC_KEY_FALSE(kvm_has_noapic_vcpu);
10711 EXPORT_SYMBOL_GPL(kvm_has_noapic_vcpu);
10712
10713 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
10714 {
10715         struct kvm_pmu *pmu = vcpu_to_pmu(vcpu);
10716
10717         vcpu->arch.l1tf_flush_l1d = true;
10718         if (pmu->version && unlikely(pmu->event_count)) {
10719                 pmu->need_cleanup = true;
10720                 kvm_make_request(KVM_REQ_PMU, vcpu);
10721         }
10722         static_call(kvm_x86_sched_in)(vcpu, cpu);
10723 }
10724
10725 void kvm_arch_free_vm(struct kvm *kvm)
10726 {
10727         kfree(to_kvm_hv(kvm)->hv_pa_pg);
10728         vfree(kvm);
10729 }
10730
10731
10732 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
10733 {
10734         if (type)
10735                 return -EINVAL;
10736
10737         INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
10738         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
10739         INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
10740         INIT_LIST_HEAD(&kvm->arch.lpage_disallowed_mmu_pages);
10741         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
10742         atomic_set(&kvm->arch.noncoherent_dma_count, 0);
10743
10744         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
10745         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
10746         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
10747         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
10748                 &kvm->arch.irq_sources_bitmap);
10749
10750         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
10751         mutex_init(&kvm->arch.apic_map_lock);
10752         spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
10753
10754         kvm->arch.kvmclock_offset = -get_kvmclock_base_ns();
10755         pvclock_update_vm_gtod_copy(kvm);
10756
10757         kvm->arch.guest_can_read_msr_platform_info = true;
10758
10759         INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
10760         INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
10761
10762         kvm_hv_init_vm(kvm);
10763         kvm_page_track_init(kvm);
10764         kvm_mmu_init_vm(kvm);
10765
10766         return static_call(kvm_x86_vm_init)(kvm);
10767 }
10768
10769 int kvm_arch_post_init_vm(struct kvm *kvm)
10770 {
10771         return kvm_mmu_post_init_vm(kvm);
10772 }
10773
10774 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
10775 {
10776         vcpu_load(vcpu);
10777         kvm_mmu_unload(vcpu);
10778         vcpu_put(vcpu);
10779 }
10780
10781 static void kvm_free_vcpus(struct kvm *kvm)
10782 {
10783         unsigned int i;
10784         struct kvm_vcpu *vcpu;
10785
10786         /*
10787          * Unpin any mmu pages first.
10788          */
10789         kvm_for_each_vcpu(i, vcpu, kvm) {
10790                 kvm_clear_async_pf_completion_queue(vcpu);
10791                 kvm_unload_vcpu_mmu(vcpu);
10792         }
10793         kvm_for_each_vcpu(i, vcpu, kvm)
10794                 kvm_vcpu_destroy(vcpu);
10795
10796         mutex_lock(&kvm->lock);
10797         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
10798                 kvm->vcpus[i] = NULL;
10799
10800         atomic_set(&kvm->online_vcpus, 0);
10801         mutex_unlock(&kvm->lock);
10802 }
10803
10804 void kvm_arch_sync_events(struct kvm *kvm)
10805 {
10806         cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
10807         cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
10808         kvm_free_pit(kvm);
10809 }
10810
10811 #define  ERR_PTR_USR(e)  ((void __user *)ERR_PTR(e))
10812
10813 /**
10814  * __x86_set_memory_region: Setup KVM internal memory slot
10815  *
10816  * @kvm: the kvm pointer to the VM.
10817  * @id: the slot ID to setup.
10818  * @gpa: the GPA to install the slot (unused when @size == 0).
10819  * @size: the size of the slot. Set to zero to uninstall a slot.
10820  *
10821  * This function helps to setup a KVM internal memory slot.  Specify
10822  * @size > 0 to install a new slot, while @size == 0 to uninstall a
10823  * slot.  The return code can be one of the following:
10824  *
10825  *   HVA:           on success (uninstall will return a bogus HVA)
10826  *   -errno:        on error
10827  *
10828  * The caller should always use IS_ERR() to check the return value
10829  * before use.  Note, the KVM internal memory slots are guaranteed to
10830  * remain valid and unchanged until the VM is destroyed, i.e., the
10831  * GPA->HVA translation will not change.  However, the HVA is a user
10832  * address, i.e. its accessibility is not guaranteed, and must be
10833  * accessed via __copy_{to,from}_user().
10834  */
10835 void __user * __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa,
10836                                       u32 size)
10837 {
10838         int i, r;
10839         unsigned long hva, old_npages;
10840         struct kvm_memslots *slots = kvm_memslots(kvm);
10841         struct kvm_memory_slot *slot;
10842
10843         /* Called with kvm->slots_lock held.  */
10844         if (WARN_ON(id >= KVM_MEM_SLOTS_NUM))
10845                 return ERR_PTR_USR(-EINVAL);
10846
10847         slot = id_to_memslot(slots, id);
10848         if (size) {
10849                 if (slot && slot->npages)
10850                         return ERR_PTR_USR(-EEXIST);
10851
10852                 /*
10853                  * MAP_SHARED to prevent internal slot pages from being moved
10854                  * by fork()/COW.
10855                  */
10856                 hva = vm_mmap(NULL, 0, size, PROT_READ | PROT_WRITE,
10857                               MAP_SHARED | MAP_ANONYMOUS, 0);
10858                 if (IS_ERR((void *)hva))
10859                         return (void __user *)hva;
10860         } else {
10861                 if (!slot || !slot->npages)
10862                         return NULL;
10863
10864                 old_npages = slot->npages;
10865                 hva = slot->userspace_addr;
10866         }
10867
10868         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
10869                 struct kvm_userspace_memory_region m;
10870
10871                 m.slot = id | (i << 16);
10872                 m.flags = 0;
10873                 m.guest_phys_addr = gpa;
10874                 m.userspace_addr = hva;
10875                 m.memory_size = size;
10876                 r = __kvm_set_memory_region(kvm, &m);
10877                 if (r < 0)
10878                         return ERR_PTR_USR(r);
10879         }
10880
10881         if (!size)
10882                 vm_munmap(hva, old_npages * PAGE_SIZE);
10883
10884         return (void __user *)hva;
10885 }
10886 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
10887
10888 void kvm_arch_pre_destroy_vm(struct kvm *kvm)
10889 {
10890         kvm_mmu_pre_destroy_vm(kvm);
10891 }
10892
10893 void kvm_arch_destroy_vm(struct kvm *kvm)
10894 {
10895         if (current->mm == kvm->mm) {
10896                 /*
10897                  * Free memory regions allocated on behalf of userspace,
10898                  * unless the the memory map has changed due to process exit
10899                  * or fd copying.
10900                  */
10901                 mutex_lock(&kvm->slots_lock);
10902                 __x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT,
10903                                         0, 0);
10904                 __x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT,
10905                                         0, 0);
10906                 __x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, 0, 0);
10907                 mutex_unlock(&kvm->slots_lock);
10908         }
10909         static_call_cond(kvm_x86_vm_destroy)(kvm);
10910         kvm_free_msr_filter(srcu_dereference_check(kvm->arch.msr_filter, &kvm->srcu, 1));
10911         kvm_pic_destroy(kvm);
10912         kvm_ioapic_destroy(kvm);
10913         kvm_free_vcpus(kvm);
10914         kvfree(rcu_dereference_check(kvm->arch.apic_map, 1));
10915         kfree(srcu_dereference_check(kvm->arch.pmu_event_filter, &kvm->srcu, 1));
10916         kvm_mmu_uninit_vm(kvm);
10917         kvm_page_track_cleanup(kvm);
10918         kvm_xen_destroy_vm(kvm);
10919         kvm_hv_destroy_vm(kvm);
10920 }
10921
10922 static void memslot_rmap_free(struct kvm_memory_slot *slot)
10923 {
10924         int i;
10925
10926         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
10927                 kvfree(slot->arch.rmap[i]);
10928                 slot->arch.rmap[i] = NULL;
10929         }
10930 }
10931
10932 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *slot)
10933 {
10934         int i;
10935
10936         memslot_rmap_free(slot);
10937
10938         for (i = 1; i < KVM_NR_PAGE_SIZES; ++i) {
10939                 kvfree(slot->arch.lpage_info[i - 1]);
10940                 slot->arch.lpage_info[i - 1] = NULL;
10941         }
10942
10943         kvm_page_track_free_memslot(slot);
10944 }
10945
10946 static int memslot_rmap_alloc(struct kvm_memory_slot *slot,
10947                               unsigned long npages)
10948 {
10949         const int sz = sizeof(*slot->arch.rmap[0]);
10950         int i;
10951
10952         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
10953                 int level = i + 1;
10954                 int lpages = gfn_to_index(slot->base_gfn + npages - 1,
10955                                           slot->base_gfn, level) + 1;
10956
10957                 WARN_ON(slot->arch.rmap[i]);
10958
10959                 slot->arch.rmap[i] = kvcalloc(lpages, sz, GFP_KERNEL_ACCOUNT);
10960                 if (!slot->arch.rmap[i]) {
10961                         memslot_rmap_free(slot);
10962                         return -ENOMEM;
10963                 }
10964         }
10965
10966         return 0;
10967 }
10968
10969 int alloc_all_memslots_rmaps(struct kvm *kvm)
10970 {
10971         struct kvm_memslots *slots;
10972         struct kvm_memory_slot *slot;
10973         int r, i;
10974
10975         /*
10976          * Check if memslots alreday have rmaps early before acquiring
10977          * the slots_arch_lock below.
10978          */
10979         if (kvm_memslots_have_rmaps(kvm))
10980                 return 0;
10981
10982         mutex_lock(&kvm->slots_arch_lock);
10983
10984         /*
10985          * Read memslots_have_rmaps again, under the slots arch lock,
10986          * before allocating the rmaps
10987          */
10988         if (kvm_memslots_have_rmaps(kvm)) {
10989                 mutex_unlock(&kvm->slots_arch_lock);
10990                 return 0;
10991         }
10992
10993         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
10994                 slots = __kvm_memslots(kvm, i);
10995                 kvm_for_each_memslot(slot, slots) {
10996                         r = memslot_rmap_alloc(slot, slot->npages);
10997                         if (r) {
10998                                 mutex_unlock(&kvm->slots_arch_lock);
10999                                 return r;
11000                         }
11001                 }
11002         }
11003
11004         /*
11005          * Ensure that memslots_have_rmaps becomes true strictly after
11006          * all the rmap pointers are set.
11007          */
11008         smp_store_release(&kvm->arch.memslots_have_rmaps, true);
11009         mutex_unlock(&kvm->slots_arch_lock);
11010         return 0;
11011 }
11012
11013 static int kvm_alloc_memslot_metadata(struct kvm *kvm,
11014                                       struct kvm_memory_slot *slot,
11015                                       unsigned long npages)
11016 {
11017         int i, r;
11018
11019         /*
11020          * Clear out the previous array pointers for the KVM_MR_MOVE case.  The
11021          * old arrays will be freed by __kvm_set_memory_region() if installing
11022          * the new memslot is successful.
11023          */
11024         memset(&slot->arch, 0, sizeof(slot->arch));
11025
11026         if (kvm_memslots_have_rmaps(kvm)) {
11027                 r = memslot_rmap_alloc(slot, npages);
11028                 if (r)
11029                         return r;
11030         }
11031
11032         for (i = 1; i < KVM_NR_PAGE_SIZES; ++i) {
11033                 struct kvm_lpage_info *linfo;
11034                 unsigned long ugfn;
11035                 int lpages;
11036                 int level = i + 1;
11037
11038                 lpages = gfn_to_index(slot->base_gfn + npages - 1,
11039                                       slot->base_gfn, level) + 1;
11040
11041                 linfo = kvcalloc(lpages, sizeof(*linfo), GFP_KERNEL_ACCOUNT);
11042                 if (!linfo)
11043                         goto out_free;
11044
11045                 slot->arch.lpage_info[i - 1] = linfo;
11046
11047                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
11048                         linfo[0].disallow_lpage = 1;
11049                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
11050                         linfo[lpages - 1].disallow_lpage = 1;
11051                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
11052                 /*
11053                  * If the gfn and userspace address are not aligned wrt each
11054                  * other, disable large page support for this slot.
11055                  */
11056                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1)) {
11057                         unsigned long j;
11058
11059                         for (j = 0; j < lpages; ++j)
11060                                 linfo[j].disallow_lpage = 1;
11061                 }
11062         }
11063
11064         if (kvm_page_track_create_memslot(slot, npages))
11065                 goto out_free;
11066
11067         return 0;
11068
11069 out_free:
11070         memslot_rmap_free(slot);
11071
11072         for (i = 1; i < KVM_NR_PAGE_SIZES; ++i) {
11073                 kvfree(slot->arch.lpage_info[i - 1]);
11074                 slot->arch.lpage_info[i - 1] = NULL;
11075         }
11076         return -ENOMEM;
11077 }
11078
11079 void kvm_arch_memslots_updated(struct kvm *kvm, u64 gen)
11080 {
11081         struct kvm_vcpu *vcpu;
11082         int i;
11083
11084         /*
11085          * memslots->generation has been incremented.
11086          * mmio generation may have reached its maximum value.
11087          */
11088         kvm_mmu_invalidate_mmio_sptes(kvm, gen);
11089
11090         /* Force re-initialization of steal_time cache */
11091         kvm_for_each_vcpu(i, vcpu, kvm)
11092                 kvm_vcpu_kick(vcpu);
11093 }
11094
11095 int kvm_arch_prepare_memory_region(struct kvm *kvm,
11096                                 struct kvm_memory_slot *memslot,
11097                                 const struct kvm_userspace_memory_region *mem,
11098                                 enum kvm_mr_change change)
11099 {
11100         if (change == KVM_MR_CREATE || change == KVM_MR_MOVE)
11101                 return kvm_alloc_memslot_metadata(kvm, memslot,
11102                                                   mem->memory_size >> PAGE_SHIFT);
11103         return 0;
11104 }
11105
11106
11107 static void kvm_mmu_update_cpu_dirty_logging(struct kvm *kvm, bool enable)
11108 {
11109         struct kvm_arch *ka = &kvm->arch;
11110
11111         if (!kvm_x86_ops.cpu_dirty_log_size)
11112                 return;
11113
11114         if ((enable && ++ka->cpu_dirty_logging_count == 1) ||
11115             (!enable && --ka->cpu_dirty_logging_count == 0))
11116                 kvm_make_all_cpus_request(kvm, KVM_REQ_UPDATE_CPU_DIRTY_LOGGING);
11117
11118         WARN_ON_ONCE(ka->cpu_dirty_logging_count < 0);
11119 }
11120
11121 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
11122                                      struct kvm_memory_slot *old,
11123                                      struct kvm_memory_slot *new,
11124                                      enum kvm_mr_change change)
11125 {
11126         bool log_dirty_pages = new->flags & KVM_MEM_LOG_DIRTY_PAGES;
11127
11128         /*
11129          * Update CPU dirty logging if dirty logging is being toggled.  This
11130          * applies to all operations.
11131          */
11132         if ((old->flags ^ new->flags) & KVM_MEM_LOG_DIRTY_PAGES)
11133                 kvm_mmu_update_cpu_dirty_logging(kvm, log_dirty_pages);
11134
11135         /*
11136          * Nothing more to do for RO slots (which can't be dirtied and can't be
11137          * made writable) or CREATE/MOVE/DELETE of a slot.
11138          *
11139          * For a memslot with dirty logging disabled:
11140          * CREATE:      No dirty mappings will already exist.
11141          * MOVE/DELETE: The old mappings will already have been cleaned up by
11142          *              kvm_arch_flush_shadow_memslot()
11143          *
11144          * For a memslot with dirty logging enabled:
11145          * CREATE:      No shadow pages exist, thus nothing to write-protect
11146          *              and no dirty bits to clear.
11147          * MOVE/DELETE: The old mappings will already have been cleaned up by
11148          *              kvm_arch_flush_shadow_memslot().
11149          */
11150         if ((change != KVM_MR_FLAGS_ONLY) || (new->flags & KVM_MEM_READONLY))
11151                 return;
11152
11153         /*
11154          * READONLY and non-flags changes were filtered out above, and the only
11155          * other flag is LOG_DIRTY_PAGES, i.e. something is wrong if dirty
11156          * logging isn't being toggled on or off.
11157          */
11158         if (WARN_ON_ONCE(!((old->flags ^ new->flags) & KVM_MEM_LOG_DIRTY_PAGES)))
11159                 return;
11160
11161         if (!log_dirty_pages) {
11162                 /*
11163                  * Dirty logging tracks sptes in 4k granularity, meaning that
11164                  * large sptes have to be split.  If live migration succeeds,
11165                  * the guest in the source machine will be destroyed and large
11166                  * sptes will be created in the destination.  However, if the
11167                  * guest continues to run in the source machine (for example if
11168                  * live migration fails), small sptes will remain around and
11169                  * cause bad performance.
11170                  *
11171                  * Scan sptes if dirty logging has been stopped, dropping those
11172                  * which can be collapsed into a single large-page spte.  Later
11173                  * page faults will create the large-page sptes.
11174                  */
11175                 kvm_mmu_zap_collapsible_sptes(kvm, new);
11176         } else {
11177                 /*
11178                  * Initially-all-set does not require write protecting any page,
11179                  * because they're all assumed to be dirty.
11180                  */
11181                 if (kvm_dirty_log_manual_protect_and_init_set(kvm))
11182                         return;
11183
11184                 if (kvm_x86_ops.cpu_dirty_log_size) {
11185                         kvm_mmu_slot_leaf_clear_dirty(kvm, new);
11186                         kvm_mmu_slot_remove_write_access(kvm, new, PG_LEVEL_2M);
11187                 } else {
11188                         kvm_mmu_slot_remove_write_access(kvm, new, PG_LEVEL_4K);
11189                 }
11190         }
11191 }
11192
11193 void kvm_arch_commit_memory_region(struct kvm *kvm,
11194                                 const struct kvm_userspace_memory_region *mem,
11195                                 struct kvm_memory_slot *old,
11196                                 const struct kvm_memory_slot *new,
11197                                 enum kvm_mr_change change)
11198 {
11199         if (!kvm->arch.n_requested_mmu_pages)
11200                 kvm_mmu_change_mmu_pages(kvm,
11201                                 kvm_mmu_calculate_default_mmu_pages(kvm));
11202
11203         /*
11204          * FIXME: const-ify all uses of struct kvm_memory_slot.
11205          */
11206         kvm_mmu_slot_apply_flags(kvm, old, (struct kvm_memory_slot *) new, change);
11207
11208         /* Free the arrays associated with the old memslot. */
11209         if (change == KVM_MR_MOVE)
11210                 kvm_arch_free_memslot(kvm, old);
11211 }
11212
11213 void kvm_arch_flush_shadow_all(struct kvm *kvm)
11214 {
11215         kvm_mmu_zap_all(kvm);
11216 }
11217
11218 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
11219                                    struct kvm_memory_slot *slot)
11220 {
11221         kvm_page_track_flush_slot(kvm, slot);
11222 }
11223
11224 static inline bool kvm_guest_apic_has_interrupt(struct kvm_vcpu *vcpu)
11225 {
11226         return (is_guest_mode(vcpu) &&
11227                         kvm_x86_ops.guest_apic_has_interrupt &&
11228                         static_call(kvm_x86_guest_apic_has_interrupt)(vcpu));
11229 }
11230
11231 static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
11232 {
11233         if (!list_empty_careful(&vcpu->async_pf.done))
11234                 return true;
11235
11236         if (kvm_apic_has_events(vcpu))
11237                 return true;
11238
11239         if (vcpu->arch.pv.pv_unhalted)
11240                 return true;
11241
11242         if (vcpu->arch.exception.pending)
11243                 return true;
11244
11245         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
11246             (vcpu->arch.nmi_pending &&
11247              static_call(kvm_x86_nmi_allowed)(vcpu, false)))
11248                 return true;
11249
11250         if (kvm_test_request(KVM_REQ_SMI, vcpu) ||
11251             (vcpu->arch.smi_pending &&
11252              static_call(kvm_x86_smi_allowed)(vcpu, false)))
11253                 return true;
11254
11255         if (kvm_arch_interrupt_allowed(vcpu) &&
11256             (kvm_cpu_has_interrupt(vcpu) ||
11257             kvm_guest_apic_has_interrupt(vcpu)))
11258                 return true;
11259
11260         if (kvm_hv_has_stimer_pending(vcpu))
11261                 return true;
11262
11263         if (is_guest_mode(vcpu) &&
11264             kvm_x86_ops.nested_ops->hv_timer_pending &&
11265             kvm_x86_ops.nested_ops->hv_timer_pending(vcpu))
11266                 return true;
11267
11268         return false;
11269 }
11270
11271 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
11272 {
11273         return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu);
11274 }
11275
11276 bool kvm_arch_dy_has_pending_interrupt(struct kvm_vcpu *vcpu)
11277 {
11278         if (vcpu->arch.apicv_active && static_call(kvm_x86_dy_apicv_has_pending_interrupt)(vcpu))
11279                 return true;
11280
11281         return false;
11282 }
11283
11284 bool kvm_arch_dy_runnable(struct kvm_vcpu *vcpu)
11285 {
11286         if (READ_ONCE(vcpu->arch.pv.pv_unhalted))
11287                 return true;
11288
11289         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
11290                 kvm_test_request(KVM_REQ_SMI, vcpu) ||
11291                  kvm_test_request(KVM_REQ_EVENT, vcpu))
11292                 return true;
11293
11294         return kvm_arch_dy_has_pending_interrupt(vcpu);
11295 }
11296
11297 bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu *vcpu)
11298 {
11299         if (vcpu->arch.guest_state_protected)
11300                 return true;
11301
11302         return vcpu->arch.preempted_in_kernel;
11303 }
11304
11305 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
11306 {
11307         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
11308 }
11309
11310 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
11311 {
11312         return static_call(kvm_x86_interrupt_allowed)(vcpu, false);
11313 }
11314
11315 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
11316 {
11317         /* Can't read the RIP when guest state is protected, just return 0 */
11318         if (vcpu->arch.guest_state_protected)
11319                 return 0;
11320
11321         if (is_64_bit_mode(vcpu))
11322                 return kvm_rip_read(vcpu);
11323         return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
11324                      kvm_rip_read(vcpu));
11325 }
11326 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
11327
11328 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
11329 {
11330         return kvm_get_linear_rip(vcpu) == linear_rip;
11331 }
11332 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
11333
11334 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
11335 {
11336         unsigned long rflags;
11337
11338         rflags = static_call(kvm_x86_get_rflags)(vcpu);
11339         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
11340                 rflags &= ~X86_EFLAGS_TF;
11341         return rflags;
11342 }
11343 EXPORT_SYMBOL_GPL(kvm_get_rflags);
11344
11345 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
11346 {
11347         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
11348             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
11349                 rflags |= X86_EFLAGS_TF;
11350         static_call(kvm_x86_set_rflags)(vcpu, rflags);
11351 }
11352
11353 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
11354 {
11355         __kvm_set_rflags(vcpu, rflags);
11356         kvm_make_request(KVM_REQ_EVENT, vcpu);
11357 }
11358 EXPORT_SYMBOL_GPL(kvm_set_rflags);
11359
11360 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
11361 {
11362         int r;
11363
11364         if ((vcpu->arch.mmu->direct_map != work->arch.direct_map) ||
11365               work->wakeup_all)
11366                 return;
11367
11368         r = kvm_mmu_reload(vcpu);
11369         if (unlikely(r))
11370                 return;
11371
11372         if (!vcpu->arch.mmu->direct_map &&
11373               work->arch.cr3 != vcpu->arch.mmu->get_guest_pgd(vcpu))
11374                 return;
11375
11376         kvm_mmu_do_page_fault(vcpu, work->cr2_or_gpa, 0, true);
11377 }
11378
11379 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
11380 {
11381         BUILD_BUG_ON(!is_power_of_2(ASYNC_PF_PER_VCPU));
11382
11383         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
11384 }
11385
11386 static inline u32 kvm_async_pf_next_probe(u32 key)
11387 {
11388         return (key + 1) & (ASYNC_PF_PER_VCPU - 1);
11389 }
11390
11391 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
11392 {
11393         u32 key = kvm_async_pf_hash_fn(gfn);
11394
11395         while (vcpu->arch.apf.gfns[key] != ~0)
11396                 key = kvm_async_pf_next_probe(key);
11397
11398         vcpu->arch.apf.gfns[key] = gfn;
11399 }
11400
11401 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
11402 {
11403         int i;
11404         u32 key = kvm_async_pf_hash_fn(gfn);
11405
11406         for (i = 0; i < ASYNC_PF_PER_VCPU &&
11407                      (vcpu->arch.apf.gfns[key] != gfn &&
11408                       vcpu->arch.apf.gfns[key] != ~0); i++)
11409                 key = kvm_async_pf_next_probe(key);
11410
11411         return key;
11412 }
11413
11414 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
11415 {
11416         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
11417 }
11418
11419 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
11420 {
11421         u32 i, j, k;
11422
11423         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
11424
11425         if (WARN_ON_ONCE(vcpu->arch.apf.gfns[i] != gfn))
11426                 return;
11427
11428         while (true) {
11429                 vcpu->arch.apf.gfns[i] = ~0;
11430                 do {
11431                         j = kvm_async_pf_next_probe(j);
11432                         if (vcpu->arch.apf.gfns[j] == ~0)
11433                                 return;
11434                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
11435                         /*
11436                          * k lies cyclically in ]i,j]
11437                          * |    i.k.j |
11438                          * |....j i.k.| or  |.k..j i...|
11439                          */
11440                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
11441                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
11442                 i = j;
11443         }
11444 }
11445
11446 static inline int apf_put_user_notpresent(struct kvm_vcpu *vcpu)
11447 {
11448         u32 reason = KVM_PV_REASON_PAGE_NOT_PRESENT;
11449
11450         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &reason,
11451                                       sizeof(reason));
11452 }
11453
11454 static inline int apf_put_user_ready(struct kvm_vcpu *vcpu, u32 token)
11455 {
11456         unsigned int offset = offsetof(struct kvm_vcpu_pv_apf_data, token);
11457
11458         return kvm_write_guest_offset_cached(vcpu->kvm, &vcpu->arch.apf.data,
11459                                              &token, offset, sizeof(token));
11460 }
11461
11462 static inline bool apf_pageready_slot_free(struct kvm_vcpu *vcpu)
11463 {
11464         unsigned int offset = offsetof(struct kvm_vcpu_pv_apf_data, token);
11465         u32 val;
11466
11467         if (kvm_read_guest_offset_cached(vcpu->kvm, &vcpu->arch.apf.data,
11468                                          &val, offset, sizeof(val)))
11469                 return false;
11470
11471         return !val;
11472 }
11473
11474 static bool kvm_can_deliver_async_pf(struct kvm_vcpu *vcpu)
11475 {
11476         if (!vcpu->arch.apf.delivery_as_pf_vmexit && is_guest_mode(vcpu))
11477                 return false;
11478
11479         if (!kvm_pv_async_pf_enabled(vcpu) ||
11480             (vcpu->arch.apf.send_user_only && static_call(kvm_x86_get_cpl)(vcpu) == 0))
11481                 return false;
11482
11483         return true;
11484 }
11485
11486 bool kvm_can_do_async_pf(struct kvm_vcpu *vcpu)
11487 {
11488         if (unlikely(!lapic_in_kernel(vcpu) ||
11489                      kvm_event_needs_reinjection(vcpu) ||
11490                      vcpu->arch.exception.pending))
11491                 return false;
11492
11493         if (kvm_hlt_in_guest(vcpu->kvm) && !kvm_can_deliver_async_pf(vcpu))
11494                 return false;
11495
11496         /*
11497          * If interrupts are off we cannot even use an artificial
11498          * halt state.
11499          */
11500         return kvm_arch_interrupt_allowed(vcpu);
11501 }
11502
11503 bool kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
11504                                      struct kvm_async_pf *work)
11505 {
11506         struct x86_exception fault;
11507
11508         trace_kvm_async_pf_not_present(work->arch.token, work->cr2_or_gpa);
11509         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
11510
11511         if (kvm_can_deliver_async_pf(vcpu) &&
11512             !apf_put_user_notpresent(vcpu)) {
11513                 fault.vector = PF_VECTOR;
11514                 fault.error_code_valid = true;
11515                 fault.error_code = 0;
11516                 fault.nested_page_fault = false;
11517                 fault.address = work->arch.token;
11518                 fault.async_page_fault = true;
11519                 kvm_inject_page_fault(vcpu, &fault);
11520                 return true;
11521         } else {
11522                 /*
11523                  * It is not possible to deliver a paravirtualized asynchronous
11524                  * page fault, but putting the guest in an artificial halt state
11525                  * can be beneficial nevertheless: if an interrupt arrives, we
11526                  * can deliver it timely and perhaps the guest will schedule
11527                  * another process.  When the instruction that triggered a page
11528                  * fault is retried, hopefully the page will be ready in the host.
11529                  */
11530                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
11531                 return false;
11532         }
11533 }
11534
11535 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
11536                                  struct kvm_async_pf *work)
11537 {
11538         struct kvm_lapic_irq irq = {
11539                 .delivery_mode = APIC_DM_FIXED,
11540                 .vector = vcpu->arch.apf.vec
11541         };
11542
11543         if (work->wakeup_all)
11544                 work->arch.token = ~0; /* broadcast wakeup */
11545         else
11546                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
11547         trace_kvm_async_pf_ready(work->arch.token, work->cr2_or_gpa);
11548
11549         if ((work->wakeup_all || work->notpresent_injected) &&
11550             kvm_pv_async_pf_enabled(vcpu) &&
11551             !apf_put_user_ready(vcpu, work->arch.token)) {
11552                 vcpu->arch.apf.pageready_pending = true;
11553                 kvm_apic_set_irq(vcpu, &irq, NULL);
11554         }
11555
11556         vcpu->arch.apf.halted = false;
11557         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
11558 }
11559
11560 void kvm_arch_async_page_present_queued(struct kvm_vcpu *vcpu)
11561 {
11562         kvm_make_request(KVM_REQ_APF_READY, vcpu);
11563         if (!vcpu->arch.apf.pageready_pending)
11564                 kvm_vcpu_kick(vcpu);
11565 }
11566
11567 bool kvm_arch_can_dequeue_async_page_present(struct kvm_vcpu *vcpu)
11568 {
11569         if (!kvm_pv_async_pf_enabled(vcpu))
11570                 return true;
11571         else
11572                 return kvm_lapic_enabled(vcpu) && apf_pageready_slot_free(vcpu);
11573 }
11574
11575 void kvm_arch_start_assignment(struct kvm *kvm)
11576 {
11577         if (atomic_inc_return(&kvm->arch.assigned_device_count) == 1)
11578                 static_call_cond(kvm_x86_start_assignment)(kvm);
11579 }
11580 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
11581
11582 void kvm_arch_end_assignment(struct kvm *kvm)
11583 {
11584         atomic_dec(&kvm->arch.assigned_device_count);
11585 }
11586 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
11587
11588 bool kvm_arch_has_assigned_device(struct kvm *kvm)
11589 {
11590         return atomic_read(&kvm->arch.assigned_device_count);
11591 }
11592 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
11593
11594 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
11595 {
11596         atomic_inc(&kvm->arch.noncoherent_dma_count);
11597 }
11598 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
11599
11600 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
11601 {
11602         atomic_dec(&kvm->arch.noncoherent_dma_count);
11603 }
11604 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
11605
11606 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
11607 {
11608         return atomic_read(&kvm->arch.noncoherent_dma_count);
11609 }
11610 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
11611
11612 bool kvm_arch_has_irq_bypass(void)
11613 {
11614         return true;
11615 }
11616
11617 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
11618                                       struct irq_bypass_producer *prod)
11619 {
11620         struct kvm_kernel_irqfd *irqfd =
11621                 container_of(cons, struct kvm_kernel_irqfd, consumer);
11622         int ret;
11623
11624         irqfd->producer = prod;
11625         kvm_arch_start_assignment(irqfd->kvm);
11626         ret = static_call(kvm_x86_update_pi_irte)(irqfd->kvm,
11627                                          prod->irq, irqfd->gsi, 1);
11628
11629         if (ret)
11630                 kvm_arch_end_assignment(irqfd->kvm);
11631
11632         return ret;
11633 }
11634
11635 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
11636                                       struct irq_bypass_producer *prod)
11637 {
11638         int ret;
11639         struct kvm_kernel_irqfd *irqfd =
11640                 container_of(cons, struct kvm_kernel_irqfd, consumer);
11641
11642         WARN_ON(irqfd->producer != prod);
11643         irqfd->producer = NULL;
11644
11645         /*
11646          * When producer of consumer is unregistered, we change back to
11647          * remapped mode, so we can re-use the current implementation
11648          * when the irq is masked/disabled or the consumer side (KVM
11649          * int this case doesn't want to receive the interrupts.
11650         */
11651         ret = static_call(kvm_x86_update_pi_irte)(irqfd->kvm, prod->irq, irqfd->gsi, 0);
11652         if (ret)
11653                 printk(KERN_INFO "irq bypass consumer (token %p) unregistration"
11654                        " fails: %d\n", irqfd->consumer.token, ret);
11655
11656         kvm_arch_end_assignment(irqfd->kvm);
11657 }
11658
11659 int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
11660                                    uint32_t guest_irq, bool set)
11661 {
11662         return static_call(kvm_x86_update_pi_irte)(kvm, host_irq, guest_irq, set);
11663 }
11664
11665 bool kvm_vector_hashing_enabled(void)
11666 {
11667         return vector_hashing;
11668 }
11669
11670 bool kvm_arch_no_poll(struct kvm_vcpu *vcpu)
11671 {
11672         return (vcpu->arch.msr_kvm_poll_control & 1) == 0;
11673 }
11674 EXPORT_SYMBOL_GPL(kvm_arch_no_poll);
11675
11676
11677 int kvm_spec_ctrl_test_value(u64 value)
11678 {
11679         /*
11680          * test that setting IA32_SPEC_CTRL to given value
11681          * is allowed by the host processor
11682          */
11683
11684         u64 saved_value;
11685         unsigned long flags;
11686         int ret = 0;
11687
11688         local_irq_save(flags);
11689
11690         if (rdmsrl_safe(MSR_IA32_SPEC_CTRL, &saved_value))
11691                 ret = 1;
11692         else if (wrmsrl_safe(MSR_IA32_SPEC_CTRL, value))
11693                 ret = 1;
11694         else
11695                 wrmsrl(MSR_IA32_SPEC_CTRL, saved_value);
11696
11697         local_irq_restore(flags);
11698
11699         return ret;
11700 }
11701 EXPORT_SYMBOL_GPL(kvm_spec_ctrl_test_value);
11702
11703 void kvm_fixup_and_inject_pf_error(struct kvm_vcpu *vcpu, gva_t gva, u16 error_code)
11704 {
11705         struct x86_exception fault;
11706         u32 access = error_code &
11707                 (PFERR_WRITE_MASK | PFERR_FETCH_MASK | PFERR_USER_MASK);
11708
11709         if (!(error_code & PFERR_PRESENT_MASK) ||
11710             vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, &fault) != UNMAPPED_GVA) {
11711                 /*
11712                  * If vcpu->arch.walk_mmu->gva_to_gpa succeeded, the page
11713                  * tables probably do not match the TLB.  Just proceed
11714                  * with the error code that the processor gave.
11715                  */
11716                 fault.vector = PF_VECTOR;
11717                 fault.error_code_valid = true;
11718                 fault.error_code = error_code;
11719                 fault.nested_page_fault = false;
11720                 fault.address = gva;
11721         }
11722         vcpu->arch.walk_mmu->inject_page_fault(vcpu, &fault);
11723 }
11724 EXPORT_SYMBOL_GPL(kvm_fixup_and_inject_pf_error);
11725
11726 /*
11727  * Handles kvm_read/write_guest_virt*() result and either injects #PF or returns
11728  * KVM_EXIT_INTERNAL_ERROR for cases not currently handled by KVM. Return value
11729  * indicates whether exit to userspace is needed.
11730  */
11731 int kvm_handle_memory_failure(struct kvm_vcpu *vcpu, int r,
11732                               struct x86_exception *e)
11733 {
11734         if (r == X86EMUL_PROPAGATE_FAULT) {
11735                 kvm_inject_emulated_page_fault(vcpu, e);
11736                 return 1;
11737         }
11738
11739         /*
11740          * In case kvm_read/write_guest_virt*() failed with X86EMUL_IO_NEEDED
11741          * while handling a VMX instruction KVM could've handled the request
11742          * correctly by exiting to userspace and performing I/O but there
11743          * doesn't seem to be a real use-case behind such requests, just return
11744          * KVM_EXIT_INTERNAL_ERROR for now.
11745          */
11746         vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
11747         vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
11748         vcpu->run->internal.ndata = 0;
11749
11750         return 0;
11751 }
11752 EXPORT_SYMBOL_GPL(kvm_handle_memory_failure);
11753
11754 int kvm_handle_invpcid(struct kvm_vcpu *vcpu, unsigned long type, gva_t gva)
11755 {
11756         bool pcid_enabled;
11757         struct x86_exception e;
11758         unsigned i;
11759         unsigned long roots_to_free = 0;
11760         struct {
11761                 u64 pcid;
11762                 u64 gla;
11763         } operand;
11764         int r;
11765
11766         r = kvm_read_guest_virt(vcpu, gva, &operand, sizeof(operand), &e);
11767         if (r != X86EMUL_CONTINUE)
11768                 return kvm_handle_memory_failure(vcpu, r, &e);
11769
11770         if (operand.pcid >> 12 != 0) {
11771                 kvm_inject_gp(vcpu, 0);
11772                 return 1;
11773         }
11774
11775         pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
11776
11777         switch (type) {
11778         case INVPCID_TYPE_INDIV_ADDR:
11779                 if ((!pcid_enabled && (operand.pcid != 0)) ||
11780                     is_noncanonical_address(operand.gla, vcpu)) {
11781                         kvm_inject_gp(vcpu, 0);
11782                         return 1;
11783                 }
11784                 kvm_mmu_invpcid_gva(vcpu, operand.gla, operand.pcid);
11785                 return kvm_skip_emulated_instruction(vcpu);
11786
11787         case INVPCID_TYPE_SINGLE_CTXT:
11788                 if (!pcid_enabled && (operand.pcid != 0)) {
11789                         kvm_inject_gp(vcpu, 0);
11790                         return 1;
11791                 }
11792
11793                 if (kvm_get_active_pcid(vcpu) == operand.pcid) {
11794                         kvm_mmu_sync_roots(vcpu);
11795                         kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
11796                 }
11797
11798                 for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++)
11799                         if (kvm_get_pcid(vcpu, vcpu->arch.mmu->prev_roots[i].pgd)
11800                             == operand.pcid)
11801                                 roots_to_free |= KVM_MMU_ROOT_PREVIOUS(i);
11802
11803                 kvm_mmu_free_roots(vcpu, vcpu->arch.mmu, roots_to_free);
11804                 /*
11805                  * If neither the current cr3 nor any of the prev_roots use the
11806                  * given PCID, then nothing needs to be done here because a
11807                  * resync will happen anyway before switching to any other CR3.
11808                  */
11809
11810                 return kvm_skip_emulated_instruction(vcpu);
11811
11812         case INVPCID_TYPE_ALL_NON_GLOBAL:
11813                 /*
11814                  * Currently, KVM doesn't mark global entries in the shadow
11815                  * page tables, so a non-global flush just degenerates to a
11816                  * global flush. If needed, we could optimize this later by
11817                  * keeping track of global entries in shadow page tables.
11818                  */
11819
11820                 fallthrough;
11821         case INVPCID_TYPE_ALL_INCL_GLOBAL:
11822                 kvm_make_request(KVM_REQ_MMU_RELOAD, vcpu);
11823                 return kvm_skip_emulated_instruction(vcpu);
11824
11825         default:
11826                 BUG(); /* We have already checked above that type <= 3 */
11827         }
11828 }
11829 EXPORT_SYMBOL_GPL(kvm_handle_invpcid);
11830
11831 static int complete_sev_es_emulated_mmio(struct kvm_vcpu *vcpu)
11832 {
11833         struct kvm_run *run = vcpu->run;
11834         struct kvm_mmio_fragment *frag;
11835         unsigned int len;
11836
11837         BUG_ON(!vcpu->mmio_needed);
11838
11839         /* Complete previous fragment */
11840         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
11841         len = min(8u, frag->len);
11842         if (!vcpu->mmio_is_write)
11843                 memcpy(frag->data, run->mmio.data, len);
11844
11845         if (frag->len <= 8) {
11846                 /* Switch to the next fragment. */
11847                 frag++;
11848                 vcpu->mmio_cur_fragment++;
11849         } else {
11850                 /* Go forward to the next mmio piece. */
11851                 frag->data += len;
11852                 frag->gpa += len;
11853                 frag->len -= len;
11854         }
11855
11856         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
11857                 vcpu->mmio_needed = 0;
11858
11859                 // VMG change, at this point, we're always done
11860                 // RIP has already been advanced
11861                 return 1;
11862         }
11863
11864         // More MMIO is needed
11865         run->mmio.phys_addr = frag->gpa;
11866         run->mmio.len = min(8u, frag->len);
11867         run->mmio.is_write = vcpu->mmio_is_write;
11868         if (run->mmio.is_write)
11869                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
11870         run->exit_reason = KVM_EXIT_MMIO;
11871
11872         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
11873
11874         return 0;
11875 }
11876
11877 int kvm_sev_es_mmio_write(struct kvm_vcpu *vcpu, gpa_t gpa, unsigned int bytes,
11878                           void *data)
11879 {
11880         int handled;
11881         struct kvm_mmio_fragment *frag;
11882
11883         if (!data)
11884                 return -EINVAL;
11885
11886         handled = write_emultor.read_write_mmio(vcpu, gpa, bytes, data);
11887         if (handled == bytes)
11888                 return 1;
11889
11890         bytes -= handled;
11891         gpa += handled;
11892         data += handled;
11893
11894         /*TODO: Check if need to increment number of frags */
11895         frag = vcpu->mmio_fragments;
11896         vcpu->mmio_nr_fragments = 1;
11897         frag->len = bytes;
11898         frag->gpa = gpa;
11899         frag->data = data;
11900
11901         vcpu->mmio_needed = 1;
11902         vcpu->mmio_cur_fragment = 0;
11903
11904         vcpu->run->mmio.phys_addr = gpa;
11905         vcpu->run->mmio.len = min(8u, frag->len);
11906         vcpu->run->mmio.is_write = 1;
11907         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
11908         vcpu->run->exit_reason = KVM_EXIT_MMIO;
11909
11910         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
11911
11912         return 0;
11913 }
11914 EXPORT_SYMBOL_GPL(kvm_sev_es_mmio_write);
11915
11916 int kvm_sev_es_mmio_read(struct kvm_vcpu *vcpu, gpa_t gpa, unsigned int bytes,
11917                          void *data)
11918 {
11919         int handled;
11920         struct kvm_mmio_fragment *frag;
11921
11922         if (!data)
11923                 return -EINVAL;
11924
11925         handled = read_emultor.read_write_mmio(vcpu, gpa, bytes, data);
11926         if (handled == bytes)
11927                 return 1;
11928
11929         bytes -= handled;
11930         gpa += handled;
11931         data += handled;
11932
11933         /*TODO: Check if need to increment number of frags */
11934         frag = vcpu->mmio_fragments;
11935         vcpu->mmio_nr_fragments = 1;
11936         frag->len = bytes;
11937         frag->gpa = gpa;
11938         frag->data = data;
11939
11940         vcpu->mmio_needed = 1;
11941         vcpu->mmio_cur_fragment = 0;
11942
11943         vcpu->run->mmio.phys_addr = gpa;
11944         vcpu->run->mmio.len = min(8u, frag->len);
11945         vcpu->run->mmio.is_write = 0;
11946         vcpu->run->exit_reason = KVM_EXIT_MMIO;
11947
11948         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
11949
11950         return 0;
11951 }
11952 EXPORT_SYMBOL_GPL(kvm_sev_es_mmio_read);
11953
11954 static int complete_sev_es_emulated_ins(struct kvm_vcpu *vcpu)
11955 {
11956         memcpy(vcpu->arch.guest_ins_data, vcpu->arch.pio_data,
11957                vcpu->arch.pio.count * vcpu->arch.pio.size);
11958         vcpu->arch.pio.count = 0;
11959
11960         return 1;
11961 }
11962
11963 static int kvm_sev_es_outs(struct kvm_vcpu *vcpu, unsigned int size,
11964                            unsigned int port, void *data,  unsigned int count)
11965 {
11966         int ret;
11967
11968         ret = emulator_pio_out_emulated(vcpu->arch.emulate_ctxt, size, port,
11969                                         data, count);
11970         if (ret)
11971                 return ret;
11972
11973         vcpu->arch.pio.count = 0;
11974
11975         return 0;
11976 }
11977
11978 static int kvm_sev_es_ins(struct kvm_vcpu *vcpu, unsigned int size,
11979                           unsigned int port, void *data, unsigned int count)
11980 {
11981         int ret;
11982
11983         ret = emulator_pio_in_emulated(vcpu->arch.emulate_ctxt, size, port,
11984                                        data, count);
11985         if (ret) {
11986                 vcpu->arch.pio.count = 0;
11987         } else {
11988                 vcpu->arch.guest_ins_data = data;
11989                 vcpu->arch.complete_userspace_io = complete_sev_es_emulated_ins;
11990         }
11991
11992         return 0;
11993 }
11994
11995 int kvm_sev_es_string_io(struct kvm_vcpu *vcpu, unsigned int size,
11996                          unsigned int port, void *data,  unsigned int count,
11997                          int in)
11998 {
11999         return in ? kvm_sev_es_ins(vcpu, size, port, data, count)
12000                   : kvm_sev_es_outs(vcpu, size, port, data, count);
12001 }
12002 EXPORT_SYMBOL_GPL(kvm_sev_es_string_io);
12003
12004 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_entry);
12005 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
12006 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
12007 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
12008 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
12009 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
12010 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
12011 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
12012 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
12013 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
12014 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
12015 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmenter_failed);
12016 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
12017 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
12018 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
12019 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
12020 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window_update);
12021 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);
12022 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update);
12023 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access);
12024 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi);
12025 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_ga_log);
12026 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_apicv_update_request);
12027 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_enter);
12028 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_exit);
12029 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_msr_protocol_enter);
12030 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_msr_protocol_exit);