1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef _ASM_X86_PGTABLE_64_DEFS_H
3 #define _ASM_X86_PGTABLE_64_DEFS_H
5 #include <asm/sparsemem.h>
8 #include <linux/types.h>
12 * These are used to make use of C type-checking..
14 typedef unsigned long pteval_t;
15 typedef unsigned long pmdval_t;
16 typedef unsigned long pudval_t;
17 typedef unsigned long p4dval_t;
18 typedef unsigned long pgdval_t;
19 typedef unsigned long pgprotval_t;
21 typedef struct { pteval_t pte; } pte_t;
23 #ifdef CONFIG_X86_5LEVEL
24 extern unsigned int pgtable_l5_enabled;
26 #define pgtable_l5_enabled 0
29 extern unsigned int pgdir_shift;
30 extern unsigned int ptrs_per_p4d;
32 #endif /* !__ASSEMBLY__ */
34 #define SHARED_KERNEL_PMD 0
36 #ifdef CONFIG_X86_5LEVEL
39 * PGDIR_SHIFT determines what a top-level page table entry can map
41 #define PGDIR_SHIFT pgdir_shift
42 #define PTRS_PER_PGD 512
45 * 4th level page in 5-level paging case
48 #define MAX_PTRS_PER_P4D 512
49 #define PTRS_PER_P4D ptrs_per_p4d
50 #define P4D_SIZE (_AC(1, UL) << P4D_SHIFT)
51 #define P4D_MASK (~(P4D_SIZE - 1))
53 #define MAX_POSSIBLE_PHYSMEM_BITS 52
55 #else /* CONFIG_X86_5LEVEL */
58 * PGDIR_SHIFT determines what a top-level page table entry can map
60 #define PGDIR_SHIFT 39
61 #define PTRS_PER_PGD 512
62 #define MAX_PTRS_PER_P4D 1
64 #endif /* CONFIG_X86_5LEVEL */
70 #define PTRS_PER_PUD 512
73 * PMD_SHIFT determines the size of the area a middle-level
77 #define PTRS_PER_PMD 512
80 * entries per page directory level
82 #define PTRS_PER_PTE 512
84 #define PMD_SIZE (_AC(1, UL) << PMD_SHIFT)
85 #define PMD_MASK (~(PMD_SIZE - 1))
86 #define PUD_SIZE (_AC(1, UL) << PUD_SHIFT)
87 #define PUD_MASK (~(PUD_SIZE - 1))
88 #define PGDIR_SIZE (_AC(1, UL) << PGDIR_SHIFT)
89 #define PGDIR_MASK (~(PGDIR_SIZE - 1))
92 * See Documentation/x86/x86_64/mm.txt for a description of the memory map.
94 * Be very careful vs. KASLR when changing anything here. The KASLR address
95 * range must not overlap with anything except the KASAN shadow area, which
96 * is correct as KASAN disables KASLR.
98 #define MAXMEM (1UL << MAX_PHYSMEM_BITS)
100 #define LDT_PGD_ENTRY_L4 -3UL
101 #define LDT_PGD_ENTRY_L5 -112UL
102 #define LDT_PGD_ENTRY (pgtable_l5_enabled ? LDT_PGD_ENTRY_L5 : LDT_PGD_ENTRY_L4)
103 #define LDT_BASE_ADDR (LDT_PGD_ENTRY << PGDIR_SHIFT)
105 #ifdef CONFIG_X86_5LEVEL
106 # define VMALLOC_SIZE_TB _AC(12800, UL)
107 # define __VMALLOC_BASE _AC(0xffa0000000000000, UL)
108 # define __VMEMMAP_BASE _AC(0xffd4000000000000, UL)
110 # define VMALLOC_SIZE_TB _AC(32, UL)
111 # define __VMALLOC_BASE _AC(0xffffc90000000000, UL)
112 # define __VMEMMAP_BASE _AC(0xffffea0000000000, UL)
115 #ifdef CONFIG_DYNAMIC_MEMORY_LAYOUT
116 # define VMALLOC_START vmalloc_base
117 # define VMEMMAP_START vmemmap_base
119 # define VMALLOC_START __VMALLOC_BASE
120 # define VMEMMAP_START __VMEMMAP_BASE
121 #endif /* CONFIG_DYNAMIC_MEMORY_LAYOUT */
123 #define VMALLOC_END (VMALLOC_START + _AC((VMALLOC_SIZE_TB << 40) - 1, UL))
125 #define MODULES_VADDR (__START_KERNEL_map + KERNEL_IMAGE_SIZE)
126 /* The module sections ends with the start of the fixmap */
127 #define MODULES_END _AC(0xffffffffff000000, UL)
128 #define MODULES_LEN (MODULES_END - MODULES_VADDR)
130 #define ESPFIX_PGD_ENTRY _AC(-2, UL)
131 #define ESPFIX_BASE_ADDR (ESPFIX_PGD_ENTRY << P4D_SHIFT)
133 #define CPU_ENTRY_AREA_PGD _AC(-4, UL)
134 #define CPU_ENTRY_AREA_BASE (CPU_ENTRY_AREA_PGD << P4D_SHIFT)
136 #define EFI_VA_START ( -4 * (_AC(1, UL) << 30))
137 #define EFI_VA_END (-68 * (_AC(1, UL) << 30))
139 #define EARLY_DYNAMIC_PAGE_TABLES 64
141 #endif /* _ASM_X86_PGTABLE_64_DEFS_H */