arch/x86/include/asm/fpu/internal.h

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 /*
   3  * Copyright (C) 1994 Linus Torvalds
   4  *
   5  * Pentium III FXSR, SSE support
   6  * General FPU state handling cleanups
   7  *      Gareth Hughes <gareth@valinux.com>, May 2000
   8  * x86-64 work by Andi Kleen 2002
   9  */
  10
  11 #ifndef _ASM_X86_FPU_INTERNAL_H
  12 #define _ASM_X86_FPU_INTERNAL_H
  13
  14 #include <linux/compat.h>
  15 #include <linux/sched.h>
  16 #include <linux/slab.h>
  17 #include <linux/mm.h>
  18
  19 #include <asm/user.h>
  20 #include <asm/fpu/api.h>
  21 #include <asm/fpu/xstate.h>
  22 #include <asm/fpu/xcr.h>
  23 #include <asm/cpufeature.h>
  24 #include <asm/trace/fpu.h>
  25
  26 /*
  27  * High level FPU state handling functions:
  28  */
  29 extern void fpu__save(struct fpu *fpu);
  30 extern int  fpu__restore_sig(void __user *buf, int ia32_frame);
  31 extern void fpu__drop(struct fpu *fpu);
  32 extern int  fpu__copy(struct task_struct *dst, struct task_struct *src);
  33 extern void fpu__clear_user_states(struct fpu *fpu);
  34 extern void fpu__clear_all(struct fpu *fpu);
  35 extern int  fpu__exception_code(struct fpu *fpu, int trap_nr);
  36
  37 /*
  38  * Boot time FPU initialization functions:
  39  */
  40 extern void fpu__init_cpu(void);
  41 extern void fpu__init_system_xstate(void);
  42 extern void fpu__init_cpu_xstate(void);
  43 extern void fpu__init_system(struct cpuinfo_x86 *c);
  44 extern void fpu__init_check_bugs(void);
  45 extern void fpu__resume_cpu(void);
  46
  47 /*
  48  * Debugging facility:
  49  */
  50 #ifdef CONFIG_X86_DEBUG_FPU
  51 # define WARN_ON_FPU(x) WARN_ON_ONCE(x)
  52 #else
  53 # define WARN_ON_FPU(x) ({ (void)(x); 0; })
  54 #endif
  55
  56 /*
  57  * FPU related CPU feature flag helper routines:
  58  */
  59 static __always_inline __pure bool use_xsaveopt(void)
  60 {
  61         return static_cpu_has(X86_FEATURE_XSAVEOPT);
  62 }
  63
  64 static __always_inline __pure bool use_xsave(void)
  65 {
  66         return static_cpu_has(X86_FEATURE_XSAVE);
  67 }
  68
  69 static __always_inline __pure bool use_fxsr(void)
  70 {
  71         return static_cpu_has(X86_FEATURE_FXSR);
  72 }
  73
  74 /*
  75  * fpstate handling functions:
  76  */
  77
  78 extern union fpregs_state init_fpstate;
  79
  80 extern void fpstate_init(union fpregs_state *state);
  81 #ifdef CONFIG_MATH_EMULATION
  82 extern void fpstate_init_soft(struct swregs_state *soft);
  83 #else
  84 static inline void fpstate_init_soft(struct swregs_state *soft) {}
  85 #endif
  86
  87 #define user_insn(insn, output, input...)                               \
  88 ({                                                                      \
  89         int err;                                                        \
  90                                                                         \
  91         might_fault();                                                  \
  92                                                                         \
  93         asm volatile(ASM_STAC "\n"                                      \
  94                      "1:" #insn "\n\t"                                  \
  95                      "2: " ASM_CLAC "\n"                                \
  96                      ".section .fixup,\"ax\"\n"                         \
  97                      "3:  movl $-1,%[err]\n"                            \
  98                      "    jmp  2b\n"                                    \
  99                      ".previous\n"                                      \
 100                      _ASM_EXTABLE(1b, 3b)                               \
 101                      : [err] "=r" (err), output                         \
 102                      : "0"(0), input);                                  \
 103         err;                                                            \
 104 })
 105
 106 #define kernel_insn_err(insn, output, input...)                         \
 107 ({                                                                      \
 108         int err;                                                        \
 109         asm volatile("1:" #insn "\n\t"                                  \
 110                      "2:\n"                                             \
 111                      ".section .fixup,\"ax\"\n"                         \
 112                      "3:  movl $-1,%[err]\n"                            \
 113                      "    jmp  2b\n"                                    \
 114                      ".previous\n"                                      \
 115                      _ASM_EXTABLE(1b, 3b)                               \
 116                      : [err] "=r" (err), output                         \
 117                      : "0"(0), input);                                  \
 118         err;                                                            \
 119 })
 120
 121 #define kernel_insn(insn, output, input...)                             \
 122         asm volatile("1:" #insn "\n\t"                                  \
 123                      "2:\n"                                             \
 124                      _ASM_EXTABLE_HANDLE(1b, 2b, ex_handler_fprestore)  \
 125                      : output : input)
 126
 127 static inline int copy_fregs_to_user(struct fregs_state __user *fx)
 128 {
 129         return user_insn(fnsave %[fx]; fwait,  [fx] "=m" (*fx), "m" (*fx));
 130 }
 131
 132 static inline int copy_fxregs_to_user(struct fxregs_state __user *fx)
 133 {
 134         if (IS_ENABLED(CONFIG_X86_32))
 135                 return user_insn(fxsave %[fx], [fx] "=m" (*fx), "m" (*fx));
 136         else
 137                 return user_insn(fxsaveq %[fx], [fx] "=m" (*fx), "m" (*fx));
 138
 139 }
 140
 141 static inline void copy_kernel_to_fxregs(struct fxregs_state *fx)
 142 {
 143         if (IS_ENABLED(CONFIG_X86_32))
 144                 kernel_insn(fxrstor %[fx], "=m" (*fx), [fx] "m" (*fx));
 145         else
 146                 kernel_insn(fxrstorq %[fx], "=m" (*fx), [fx] "m" (*fx));
 147 }
 148
 149 static inline int copy_kernel_to_fxregs_err(struct fxregs_state *fx)
 150 {
 151         if (IS_ENABLED(CONFIG_X86_32))
 152                 return kernel_insn_err(fxrstor %[fx], "=m" (*fx), [fx] "m" (*fx));
 153         else
 154                 return kernel_insn_err(fxrstorq %[fx], "=m" (*fx), [fx] "m" (*fx));
 155 }
 156
 157 static inline int copy_user_to_fxregs(struct fxregs_state __user *fx)
 158 {
 159         if (IS_ENABLED(CONFIG_X86_32))
 160                 return user_insn(fxrstor %[fx], "=m" (*fx), [fx] "m" (*fx));
 161         else
 162                 return user_insn(fxrstorq %[fx], "=m" (*fx), [fx] "m" (*fx));
 163 }
 164
 165 static inline void copy_kernel_to_fregs(struct fregs_state *fx)
 166 {
 167         kernel_insn(frstor %[fx], "=m" (*fx), [fx] "m" (*fx));
 168 }
 169
 170 static inline int copy_kernel_to_fregs_err(struct fregs_state *fx)
 171 {
 172         return kernel_insn_err(frstor %[fx], "=m" (*fx), [fx] "m" (*fx));
 173 }
 174
 175 static inline int copy_user_to_fregs(struct fregs_state __user *fx)
 176 {
 177         return user_insn(frstor %[fx], "=m" (*fx), [fx] "m" (*fx));
 178 }
 179
 180 static inline void copy_fxregs_to_kernel(struct fpu *fpu)
 181 {
 182         if (IS_ENABLED(CONFIG_X86_32))
 183                 asm volatile( "fxsave %[fx]" : [fx] "=m" (fpu->state.fxsave));
 184         else
 185                 asm volatile("fxsaveq %[fx]" : [fx] "=m" (fpu->state.fxsave));
 186 }
 187
 188 static inline void fxsave(struct fxregs_state *fx)
 189 {
 190         if (IS_ENABLED(CONFIG_X86_32))
 191                 asm volatile( "fxsave %[fx]" : [fx] "=m" (*fx));
 192         else
 193                 asm volatile("fxsaveq %[fx]" : [fx] "=m" (*fx));
 194 }
 195
 196 /* These macros all use (%edi)/(%rdi) as the single memory argument. */
 197 #define XSAVE           ".byte " REX_PREFIX "0x0f,0xae,0x27"
 198 #define XSAVEOPT        ".byte " REX_PREFIX "0x0f,0xae,0x37"
 199 #define XSAVES          ".byte " REX_PREFIX "0x0f,0xc7,0x2f"
 200 #define XRSTOR          ".byte " REX_PREFIX "0x0f,0xae,0x2f"
 201 #define XRSTORS         ".byte " REX_PREFIX "0x0f,0xc7,0x1f"
 202
 203 #define XSTATE_OP(op, st, lmask, hmask, err)                            \
 204         asm volatile("1:" op "\n\t"                                     \
 205                      "xor %[err], %[err]\n"                             \
 206                      "2:\n\t"                                           \
 207                      ".pushsection .fixup,\"ax\"\n\t"                   \
 208                      "3: movl $-2,%[err]\n\t"                           \
 209                      "jmp 2b\n\t"                                       \
 210                      ".popsection\n\t"                                  \
 211                      _ASM_EXTABLE(1b, 3b)                               \
 212                      : [err] "=r" (err)                                 \
 213                      : "D" (st), "m" (*st), "a" (lmask), "d" (hmask)    \
 214                      : "memory")
 215
 216 /*
 217  * If XSAVES is enabled, it replaces XSAVEOPT because it supports a compact
 218  * format and supervisor states in addition to modified optimization in
 219  * XSAVEOPT.
 220  *
 221  * Otherwise, if XSAVEOPT is enabled, XSAVEOPT replaces XSAVE because XSAVEOPT
 222  * supports modified optimization which is not supported by XSAVE.
 223  *
 224  * We use XSAVE as a fallback.
 225  *
 226  * The 661 label is defined in the ALTERNATIVE* macros as the address of the
 227  * original instruction which gets replaced. We need to use it here as the
 228  * address of the instruction where we might get an exception at.
 229  */
 230 #define XSTATE_XSAVE(st, lmask, hmask, err)                             \
 231         asm volatile(ALTERNATIVE_2(XSAVE,                               \
 232                                    XSAVEOPT, X86_FEATURE_XSAVEOPT,      \
 233                                    XSAVES,   X86_FEATURE_XSAVES)        \
 234                      "\n"                                               \
 235                      "xor %[err], %[err]\n"                             \
 236                      "3:\n"                                             \
 237                      ".pushsection .fixup,\"ax\"\n"                     \
 238                      "4: movl $-2, %[err]\n"                            \
 239                      "jmp 3b\n"                                         \
 240                      ".popsection\n"                                    \
 241                      _ASM_EXTABLE(661b, 4b)                             \
 242                      : [err] "=r" (err)                                 \
 243                      : "D" (st), "m" (*st), "a" (lmask), "d" (hmask)    \
 244                      : "memory")
 245
 246 /*
 247  * Use XRSTORS to restore context if it is enabled. XRSTORS supports compact
 248  * XSAVE area format.
 249  */
 250 #define XSTATE_XRESTORE(st, lmask, hmask)                               \
 251         asm volatile(ALTERNATIVE(XRSTOR,                                \
 252                                  XRSTORS, X86_FEATURE_XSAVES)           \
 253                      "\n"                                               \
 254                      "3:\n"                                             \
 255                      _ASM_EXTABLE_HANDLE(661b, 3b, ex_handler_fprestore)\
 256                      :                                                  \
 257                      : "D" (st), "m" (*st), "a" (lmask), "d" (hmask)    \
 258                      : "memory")
 259
 260 /*
 261  * This function is called only during boot time when x86 caps are not set
 262  * up and alternative can not be used yet.
 263  */
 264 static inline void os_xrstor_booting(struct xregs_state *xstate)
 265 {
 266         u64 mask = -1;
 267         u32 lmask = mask;
 268         u32 hmask = mask >> 32;
 269         int err;
 270
 271         WARN_ON(system_state != SYSTEM_BOOTING);
 272
 273         if (boot_cpu_has(X86_FEATURE_XSAVES))
 274                 XSTATE_OP(XRSTORS, xstate, lmask, hmask, err);
 275         else
 276                 XSTATE_OP(XRSTOR, xstate, lmask, hmask, err);
 277
 278         /*
 279          * We should never fault when copying from a kernel buffer, and the FPU
 280          * state we set at boot time should be valid.
 281          */
 282         WARN_ON_FPU(err);
 283 }
 284
 285 /*
 286  * Save processor xstate to xsave area.
 287  *
 288  * Uses either XSAVE or XSAVEOPT or XSAVES depending on the CPU features
 289  * and command line options. The choice is permanent until the next reboot.
 290  */
 291 static inline void os_xsave(struct xregs_state *xstate)
 292 {
 293         u64 mask = xfeatures_mask_all;
 294         u32 lmask = mask;
 295         u32 hmask = mask >> 32;
 296         int err;
 297
 298         WARN_ON_FPU(!alternatives_patched);
 299
 300         XSTATE_XSAVE(xstate, lmask, hmask, err);
 301
 302         /* We should never fault when copying to a kernel buffer: */
 303         WARN_ON_FPU(err);
 304 }
 305
 306 /*
 307  * Restore processor xstate from xsave area.
 308  *
 309  * Uses XRSTORS when XSAVES is used, XRSTOR otherwise.
 310  */
 311 static inline void os_xrstor(struct xregs_state *xstate, u64 mask)
 312 {
 313         u32 lmask = mask;
 314         u32 hmask = mask >> 32;
 315
 316         XSTATE_XRESTORE(xstate, lmask, hmask);
 317 }
 318
 319 /*
 320  * Save xstate to user space xsave area.
 321  *
 322  * We don't use modified optimization because xrstor/xrstors might track
 323  * a different application.
 324  *
 325  * We don't use compacted format xsave area for
 326  * backward compatibility for old applications which don't understand
 327  * compacted format of xsave area.
 328  */
 329 static inline int copy_xregs_to_user(struct xregs_state __user *buf)
 330 {
 331         u64 mask = xfeatures_mask_user();
 332         u32 lmask = mask;
 333         u32 hmask = mask >> 32;
 334         int err;
 335
 336         /*
 337          * Clear the xsave header first, so that reserved fields are
 338          * initialized to zero.
 339          */
 340         err = __clear_user(&buf->header, sizeof(buf->header));
 341         if (unlikely(err))
 342                 return -EFAULT;
 343
 344         stac();
 345         XSTATE_OP(XSAVE, buf, lmask, hmask, err);
 346         clac();
 347
 348         return err;
 349 }
 350
 351 /*
 352  * Restore xstate from user space xsave area.
 353  */
 354 static inline int copy_user_to_xregs(struct xregs_state __user *buf, u64 mask)
 355 {
 356         struct xregs_state *xstate = ((__force struct xregs_state *)buf);
 357         u32 lmask = mask;
 358         u32 hmask = mask >> 32;
 359         int err;
 360
 361         stac();
 362         XSTATE_OP(XRSTOR, xstate, lmask, hmask, err);
 363         clac();
 364
 365         return err;
 366 }
 367
 368 /*
 369  * Restore xstate from kernel space xsave area, return an error code instead of
 370  * an exception.
 371  */
 372 static inline int os_xrstor_safe(struct xregs_state *xstate, u64 mask)
 373 {
 374         u32 lmask = mask;
 375         u32 hmask = mask >> 32;
 376         int err;
 377
 378         if (cpu_feature_enabled(X86_FEATURE_XSAVES))
 379                 XSTATE_OP(XRSTORS, xstate, lmask, hmask, err);
 380         else
 381                 XSTATE_OP(XRSTOR, xstate, lmask, hmask, err);
 382
 383         return err;
 384 }
 385
 386 extern int copy_fpregs_to_fpstate(struct fpu *fpu);
 387
 388 static inline void __copy_kernel_to_fpregs(union fpregs_state *fpstate, u64 mask)
 389 {
 390         if (use_xsave()) {
 391                 os_xrstor(&fpstate->xsave, mask);
 392         } else {
 393                 if (use_fxsr())
 394                         copy_kernel_to_fxregs(&fpstate->fxsave);
 395                 else
 396                         copy_kernel_to_fregs(&fpstate->fsave);
 397         }
 398 }
 399
 400 static inline void copy_kernel_to_fpregs(union fpregs_state *fpstate)
 401 {
 402         /*
 403          * AMD K7/K8 CPUs don't save/restore FDP/FIP/FOP unless an exception is
 404          * pending. Clear the x87 state here by setting it to fixed values.
 405          * "m" is a random variable that should be in L1.
 406          */
 407         if (unlikely(static_cpu_has_bug(X86_BUG_FXSAVE_LEAK))) {
 408                 asm volatile(
 409                         "fnclex\n\t"
 410                         "emms\n\t"
 411                         "fildl %P[addr]"        /* set F?P to defined value */
 412                         : : [addr] "m" (fpstate));
 413         }
 414
 415         __copy_kernel_to_fpregs(fpstate, -1);
 416 }
 417
 418 extern int copy_fpstate_to_sigframe(void __user *buf, void __user *fp, int size);
 419
 420 /*
 421  * FPU context switch related helper methods:
 422  */
 423
 424 DECLARE_PER_CPU(struct fpu *, fpu_fpregs_owner_ctx);
 425
 426 /*
 427  * The in-register FPU state for an FPU context on a CPU is assumed to be
 428  * valid if the fpu->last_cpu matches the CPU, and the fpu_fpregs_owner_ctx
 429  * matches the FPU.
 430  *
 431  * If the FPU register state is valid, the kernel can skip restoring the
 432  * FPU state from memory.
 433  *
 434  * Any code that clobbers the FPU registers or updates the in-memory
 435  * FPU state for a task MUST let the rest of the kernel know that the
 436  * FPU registers are no longer valid for this task.
 437  *
 438  * Either one of these invalidation functions is enough. Invalidate
 439  * a resource you control: CPU if using the CPU for something else
 440  * (with preemption disabled), FPU for the current task, or a task that
 441  * is prevented from running by the current task.
 442  */
 443 static inline void __cpu_invalidate_fpregs_state(void)
 444 {
 445         __this_cpu_write(fpu_fpregs_owner_ctx, NULL);
 446 }
 447
 448 static inline void __fpu_invalidate_fpregs_state(struct fpu *fpu)
 449 {
 450         fpu->last_cpu = -1;
 451 }
 452
 453 static inline int fpregs_state_valid(struct fpu *fpu, unsigned int cpu)
 454 {
 455         return fpu == this_cpu_read(fpu_fpregs_owner_ctx) && cpu == fpu->last_cpu;
 456 }
 457
 458 /*
 459  * These generally need preemption protection to work,
 460  * do try to avoid using these on their own:
 461  */
 462 static inline void fpregs_deactivate(struct fpu *fpu)
 463 {
 464         this_cpu_write(fpu_fpregs_owner_ctx, NULL);
 465         trace_x86_fpu_regs_deactivated(fpu);
 466 }
 467
 468 static inline void fpregs_activate(struct fpu *fpu)
 469 {
 470         this_cpu_write(fpu_fpregs_owner_ctx, fpu);
 471         trace_x86_fpu_regs_activated(fpu);
 472 }
 473
 474 /*
 475  * Internal helper, do not use directly. Use switch_fpu_return() instead.
 476  */
 477 static inline void __fpregs_load_activate(void)
 478 {
 479         struct fpu *fpu = &current->thread.fpu;
 480         int cpu = smp_processor_id();
 481
 482         if (WARN_ON_ONCE(current->flags & PF_KTHREAD))
 483                 return;
 484
 485         if (!fpregs_state_valid(fpu, cpu)) {
 486                 copy_kernel_to_fpregs(&fpu->state);
 487                 fpregs_activate(fpu);
 488                 fpu->last_cpu = cpu;
 489         }
 490         clear_thread_flag(TIF_NEED_FPU_LOAD);
 491 }
 492
 493 /*
 494  * FPU state switching for scheduling.
 495  *
 496  * This is a two-stage process:
 497  *
 498  *  - switch_fpu_prepare() saves the old state.
 499  *    This is done within the context of the old process.
 500  *
 501  *  - switch_fpu_finish() sets TIF_NEED_FPU_LOAD; the floating point state
 502  *    will get loaded on return to userspace, or when the kernel needs it.
 503  *
 504  * If TIF_NEED_FPU_LOAD is cleared then the CPU's FPU registers
 505  * are saved in the current thread's FPU register state.
 506  *
 507  * If TIF_NEED_FPU_LOAD is set then CPU's FPU registers may not
 508  * hold current()'s FPU registers. It is required to load the
 509  * registers before returning to userland or using the content
 510  * otherwise.
 511  *
 512  * The FPU context is only stored/restored for a user task and
 513  * PF_KTHREAD is used to distinguish between kernel and user threads.
 514  */
 515 static inline void switch_fpu_prepare(struct fpu *old_fpu, int cpu)
 516 {
 517         if (static_cpu_has(X86_FEATURE_FPU) && !(current->flags & PF_KTHREAD)) {
 518                 if (!copy_fpregs_to_fpstate(old_fpu))
 519                         old_fpu->last_cpu = -1;
 520                 else
 521                         old_fpu->last_cpu = cpu;
 522
 523                 /* But leave fpu_fpregs_owner_ctx! */
 524                 trace_x86_fpu_regs_deactivated(old_fpu);
 525         }
 526 }
 527
 528 /*
 529  * Misc helper functions:
 530  */
 531
 532 /*
 533  * Load PKRU from the FPU context if available. Delay loading of the
 534  * complete FPU state until the return to userland.
 535  */
 536 static inline void switch_fpu_finish(struct fpu *new_fpu)
 537 {
 538         u32 pkru_val = init_pkru_value;
 539         struct pkru_state *pk;
 540
 541         if (!static_cpu_has(X86_FEATURE_FPU))
 542                 return;
 543
 544         set_thread_flag(TIF_NEED_FPU_LOAD);
 545
 546         if (!cpu_feature_enabled(X86_FEATURE_OSPKE))
 547                 return;
 548
 549         /*
 550          * PKRU state is switched eagerly because it needs to be valid before we
 551          * return to userland e.g. for a copy_to_user() operation.
 552          */
 553         if (!(current->flags & PF_KTHREAD)) {
 554                 /*
 555                  * If the PKRU bit in xsave.header.xfeatures is not set,
 556                  * then the PKRU component was in init state, which means
 557                  * XRSTOR will set PKRU to 0. If the bit is not set then
 558                  * get_xsave_addr() will return NULL because the PKRU value
 559                  * in memory is not valid. This means pkru_val has to be
 560                  * set to 0 and not to init_pkru_value.
 561                  */
 562                 pk = get_xsave_addr(&new_fpu->state.xsave, XFEATURE_PKRU);
 563                 pkru_val = pk ? pk->pkru : 0;
 564         }
 565         __write_pkru(pkru_val);
 566 }
 567
 568 #endif /* _ASM_X86_FPU_INTERNAL_H */