1 /* SPDX-License-Identifier: GPL-2.0 */
3 * S390 low-level entry points.
5 * Copyright IBM Corp. 1999, 2012
6 * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com),
7 * Hartmut Penner (hp@de.ibm.com),
8 * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com),
9 * Heiko Carstens <heiko.carstens@de.ibm.com>
12 #include <linux/init.h>
13 #include <linux/linkage.h>
14 #include <asm/alternative-asm.h>
15 #include <asm/processor.h>
16 #include <asm/cache.h>
17 #include <asm/ctl_reg.h>
18 #include <asm/dwarf.h>
19 #include <asm/errno.h>
20 #include <asm/ptrace.h>
21 #include <asm/thread_info.h>
22 #include <asm/asm-offsets.h>
23 #include <asm/unistd.h>
27 #include <asm/vx-insn.h>
28 #include <asm/setup.h>
30 #include <asm/export.h>
31 #include <asm/nospec-insn.h>
34 __PT_R1 = __PT_GPRS + 8
35 __PT_R2 = __PT_GPRS + 16
36 __PT_R3 = __PT_GPRS + 24
37 __PT_R4 = __PT_GPRS + 32
38 __PT_R5 = __PT_GPRS + 40
39 __PT_R6 = __PT_GPRS + 48
40 __PT_R7 = __PT_GPRS + 56
41 __PT_R8 = __PT_GPRS + 64
42 __PT_R9 = __PT_GPRS + 72
43 __PT_R10 = __PT_GPRS + 80
44 __PT_R11 = __PT_GPRS + 88
45 __PT_R12 = __PT_GPRS + 96
46 __PT_R13 = __PT_GPRS + 104
47 __PT_R14 = __PT_GPRS + 112
48 __PT_R15 = __PT_GPRS + 120
50 STACK_SHIFT = PAGE_SHIFT + THREAD_SIZE_ORDER
51 STACK_SIZE = 1 << STACK_SHIFT
52 STACK_INIT = STACK_SIZE - STACK_FRAME_OVERHEAD - __PT_SIZE
54 _LPP_OFFSET = __LC_LPP
56 .macro CHECK_STACK savearea
57 #ifdef CONFIG_CHECK_STACK
58 tml %r15,STACK_SIZE - CONFIG_STACK_GUARD
64 .macro CHECK_VMAP_STACK savearea,oklabel
65 #ifdef CONFIG_VMAP_STACK
67 nill %r14,0x10000 - STACK_SIZE
69 clg %r14,__LC_KERNEL_STACK
71 clg %r14,__LC_ASYNC_STACK
73 clg %r14,__LC_NODAT_STACK
75 clg %r14,__LC_RESTART_STACK
84 .macro SWITCH_KERNEL savearea
85 tmhh %r8,0x0001 # interrupting from user ?
87 #if IS_ENABLED(CONFIG_KVM)
91 lghi %r13,.Lsie_done - .Lsie_gmap
94 lghi %r11,\savearea # inside critical section, do cleanup
95 brasl %r14,.Lcleanup_sie
97 0: CHECK_STACK \savearea
99 aghi %r15,-(STACK_FRAME_OVERHEAD + __PT_SIZE)
100 stg %r11,__SF_BACKCHAIN(%r15)
102 1: BPENTER __TI_flags(%r12),_TIF_ISOLATE_BP
103 lctlg %c1,%c1,__LC_KERNEL_ASCE
104 lg %r15,__LC_KERNEL_STACK
105 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
106 2: la %r11,STACK_FRAME_OVERHEAD(%r15)
110 #ifdef CONFIG_HAVE_MARCH_Z9_109_FEATURES
111 .insn s,0xb27c0000,\savearea # store clock fast
113 .insn s,0xb2050000,\savearea # store clock
118 * The TSTMSK macro generates a test-under-mask instruction by
119 * calculating the memory offset for the specified mask value.
120 * Mask value can be any constant. The macro shifts the mask
121 * value to calculate the memory offset for the test-under-mask
124 .macro TSTMSK addr, mask, size=8, bytepos=0
125 .if (\bytepos < \size) && (\mask >> 8)
127 .error "Mask exceeds byte boundary"
129 TSTMSK \addr, "(\mask >> 8)", \size, "(\bytepos + 1)"
133 .error "Mask must not be zero"
135 off = \size - \bytepos - 1
140 ALTERNATIVE "", ".long 0xb2e8c000", 82
144 ALTERNATIVE "", ".long 0xb2e8d000", 82
147 .macro BPENTER tif_ptr,tif_mask
148 ALTERNATIVE "TSTMSK \tif_ptr,\tif_mask; jz .+8; .long 0xb2e8d000", \
152 .macro BPEXIT tif_ptr,tif_mask
153 TSTMSK \tif_ptr,\tif_mask
154 ALTERNATIVE "jz .+8; .long 0xb2e8c000", \
155 "jnz .+8; .long 0xb2e8d000", 82
159 GEN_BR_THUNK %r14,%r11
161 .section .kprobes.text, "ax"
164 * This nop exists only in order to avoid that __bpon starts at
165 * the beginning of the kprobes text section. In that case we would
166 * have several symbols at the same address. E.g. objdump would take
167 * an arbitrary symbol name when disassembling this code.
168 * With the added nop in between the __bpon symbol is unique
180 * Scheduler resume function, called by switch_to
181 * gpr2 = (task_struct *) prev
182 * gpr3 = (task_struct *) next
187 stmg %r6,%r15,__SF_GPRS(%r15) # store gprs of prev task
188 lghi %r4,__TASK_stack
189 lghi %r1,__TASK_thread
191 stg %r15,__THREAD_ksp(%r1,%r2) # store kernel stack of prev
192 lg %r15,0(%r4,%r3) # start of kernel stack of next
193 agr %r15,%r5 # end of kernel stack of next
194 stg %r3,__LC_CURRENT # store task struct of next
195 stg %r15,__LC_KERNEL_STACK # store end of kernel stack
196 lg %r15,__THREAD_ksp(%r1,%r3) # load kernel stack of next
198 mvc __LC_CURRENT_PID(4,%r0),0(%r3) # store pid of next
199 lmg %r6,%r15,__SF_GPRS(%r15) # load gprs of next task
200 ALTERNATIVE "", ".insn s,0xb2800000,_LPP_OFFSET", 40
204 #if IS_ENABLED(CONFIG_KVM)
206 * sie64a calling convention:
207 * %r2 pointer to sie control block
208 * %r3 guest register save area
211 stmg %r6,%r14,__SF_GPRS(%r15) # save kernel registers
213 stg %r2,__SF_SIE_CONTROL(%r15) # save control block pointer
214 stg %r3,__SF_SIE_SAVEAREA(%r15) # save guest register save area
215 xc __SF_SIE_REASON(8,%r15),__SF_SIE_REASON(%r15) # reason code = 0
216 mvc __SF_SIE_FLAGS(8,%r15),__TI_flags(%r12) # copy thread flags
217 lmg %r0,%r13,0(%r3) # load guest gprs 0-13
218 lg %r14,__LC_GMAP # get gmap pointer
221 lctlg %c1,%c1,__GMAP_ASCE(%r14) # load primary asce
223 lg %r14,__SF_SIE_CONTROL(%r15) # get control block pointer
224 oi __SIE_PROG0C+3(%r14),1 # we are going into SIE now
225 tm __SIE_PROG20+3(%r14),3 # last exit...
227 TSTMSK __LC_CPU_FLAGS,_CIF_FPU
228 jo .Lsie_skip # exit if fp/vx regs changed
229 BPEXIT __SF_SIE_FLAGS(%r15),(_TIF_ISOLATE_BP|_TIF_ISOLATE_BP_GUEST)
233 BPENTER __SF_SIE_FLAGS(%r15),(_TIF_ISOLATE_BP|_TIF_ISOLATE_BP_GUEST)
235 ni __SIE_PROG0C+3(%r14),0xfe # no longer in SIE
236 lctlg %c1,%c1,__LC_KERNEL_ASCE # load primary asce
238 # some program checks are suppressing. C code (e.g. do_protection_exception)
239 # will rewind the PSW by the ILC, which is often 4 bytes in case of SIE. There
240 # are some corner cases (e.g. runtime instrumentation) where ILC is unpredictable.
241 # Other instructions between sie64a and .Lsie_done should not cause program
242 # interrupts. So lets use 3 nops as a landing pad for all possible rewinds.
243 # See also .Lcleanup_sie
252 lg %r14,__SF_SIE_SAVEAREA(%r15) # load guest register save area
253 stmg %r0,%r13,0(%r14) # save guest gprs 0-13
254 xgr %r0,%r0 # clear guest registers to
255 xgr %r1,%r1 # prevent speculative use
259 lmg %r6,%r14,__SF_GPRS(%r15) # restore kernel registers
260 lg %r2,__SF_SIE_REASON(%r15) # return exit reason code
264 stg %r14,__SF_SIE_REASON(%r15) # set exit reason code
267 EX_TABLE(.Lrewind_pad6,.Lsie_fault)
268 EX_TABLE(.Lrewind_pad4,.Lsie_fault)
269 EX_TABLE(.Lrewind_pad2,.Lsie_fault)
270 EX_TABLE(sie_exit,.Lsie_fault)
272 EXPORT_SYMBOL(sie64a)
273 EXPORT_SYMBOL(sie_exit)
277 * SVC interrupt handler routine. System calls are synchronous events and
278 * are entered with interrupts disabled.
282 stpt __LC_SYS_ENTER_TIMER
283 stmg %r8,%r15,__LC_SAVE_AREA_SYNC
287 lctlg %c1,%c1,__LC_KERNEL_ASCE
289 lg %r15,__LC_KERNEL_STACK
290 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
291 stmg %r0,%r7,STACK_FRAME_OVERHEAD+__PT_R0(%r15)
292 BPENTER __TI_flags(%r12),_TIF_ISOLATE_BP
293 # clear user controlled register to prevent speculative use
304 la %r2,STACK_FRAME_OVERHEAD(%r15) # pointer to pt_regs
306 brasl %r14,__do_syscall
307 lctlg %c1,%c1,__LC_USER_ASCE
308 mvc __LC_RETURN_PSW(16),STACK_FRAME_OVERHEAD+__PT_PSW(%r15)
309 BPEXIT __TI_flags(%r12),_TIF_ISOLATE_BP
310 lmg %r0,%r15,STACK_FRAME_OVERHEAD+__PT_R0(%r15)
316 # a new process exits the kernel with ret_from_fork
320 brasl %r14,__ret_from_fork
321 lctlg %c1,%c1,__LC_USER_ASCE
322 mvc __LC_RETURN_PSW(16),STACK_FRAME_OVERHEAD+__PT_PSW(%r15)
323 BPEXIT __TI_flags(%r12),_TIF_ISOLATE_BP
324 lmg %r0,%r15,STACK_FRAME_OVERHEAD+__PT_R0(%r15)
327 ENDPROC(ret_from_fork)
330 * Program check handler routine
333 ENTRY(pgm_check_handler)
334 stpt __LC_SYS_ENTER_TIMER
336 stmg %r8,%r15,__LC_SAVE_AREA_SYNC
339 lmg %r8,%r9,__LC_PGM_OLD_PSW
340 tmhh %r8,0x0001 # coming from user space?
342 lctlg %c1,%c1,__LC_KERNEL_ASCE
343 j 3f # -> fault in user space
345 #if IS_ENABLED(CONFIG_KVM)
346 # cleanup critical section for program checks in sie64a
350 lghi %r13,.Lsie_done - .Lsie_gmap
353 lg %r14,__SF_SIE_CONTROL(%r15) # get control block pointer
354 ni __SIE_PROG0C+3(%r14),0xfe # no longer in SIE
355 lctlg %c1,%c1,__LC_KERNEL_ASCE # load primary asce
356 larl %r9,sie_exit # skip forward to sie_exit
357 lghi %r10,_PIF_GUEST_FAULT
359 1: tmhh %r8,0x4000 # PER bit set in old PSW ?
360 jnz 2f # -> enabled, can't be a double fault
361 tm __LC_PGM_ILC+3,0x80 # check for per exception
362 jnz .Lpgm_svcper # -> single stepped svc
363 2: CHECK_STACK __LC_SAVE_AREA_SYNC
364 aghi %r15,-(STACK_FRAME_OVERHEAD + __PT_SIZE)
365 # CHECK_VMAP_STACK branches to stack_overflow or 4f
366 CHECK_VMAP_STACK __LC_SAVE_AREA_SYNC,4f
367 3: BPENTER __TI_flags(%r12),_TIF_ISOLATE_BP
368 lg %r15,__LC_KERNEL_STACK
369 4: la %r11,STACK_FRAME_OVERHEAD(%r15)
370 stg %r10,__PT_FLAGS(%r11)
371 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
372 stmg %r0,%r7,__PT_R0(%r11)
373 mvc __PT_R8(64,%r11),__LC_SAVE_AREA_SYNC
374 stmg %r8,%r9,__PT_PSW(%r11)
376 # clear user controlled registers to prevent speculative use
385 brasl %r14,__do_pgm_check
386 tmhh %r8,0x0001 # returning to user space?
387 jno .Lpgm_exit_kernel
388 lctlg %c1,%c1,__LC_USER_ASCE
389 BPEXIT __TI_flags(%r12),_TIF_ISOLATE_BP
392 mvc __LC_RETURN_PSW(16),STACK_FRAME_OVERHEAD+__PT_PSW(%r15)
393 lmg %r0,%r15,STACK_FRAME_OVERHEAD+__PT_R0(%r15)
397 # single stepped system call
400 mvc __LC_RETURN_PSW(8),__LC_SVC_NEW_PSW
402 stg %r14,__LC_RETURN_PSW+8
404 lpswe __LC_RETURN_PSW # branch to .Lsysc_per
405 ENDPROC(pgm_check_handler)
408 * Interrupt handler macro used for external and IO interrupts.
410 .macro INT_HANDLER name,lc_old_psw,handler
413 stpt __LC_SYS_ENTER_TIMER
415 stmg %r8,%r15,__LC_SAVE_AREA_ASYNC
417 lmg %r8,%r9,\lc_old_psw
418 SWITCH_KERNEL __LC_SAVE_AREA_ASYNC
419 stmg %r0,%r7,__PT_R0(%r11)
420 # clear user controlled registers to prevent speculative use
429 mvc __PT_R8(64,%r11),__LC_SAVE_AREA_ASYNC
430 stmg %r8,%r9,__PT_PSW(%r11)
431 tm %r8,0x0001 # coming from user space?
433 lctlg %c1,%c1,__LC_KERNEL_ASCE
434 1: lgr %r2,%r11 # pass pointer to pt_regs
436 mvc __LC_RETURN_PSW(16),__PT_PSW(%r11)
437 tmhh %r8,0x0001 # returning to user ?
439 lctlg %c1,%c1,__LC_USER_ASCE
440 BPEXIT __TI_flags(%r12),_TIF_ISOLATE_BP
442 2: lmg %r0,%r15,__PT_R0(%r11)
447 INT_HANDLER ext_int_handler,__LC_EXT_OLD_PSW,do_ext_irq
448 INT_HANDLER io_int_handler,__LC_IO_OLD_PSW,do_io_irq
454 stg %r3,__SF_EMPTY(%r15)
455 larl %r1,psw_idle_exit
456 stg %r1,__SF_EMPTY+8(%r15)
457 larl %r1,smp_cpu_mtid
461 .insn rsy,0xeb0000000017,%r1,5,__MT_CYCLES_ENTER(%r2)
463 oi __LC_CPU_FLAGS+7,_CIF_ENABLED_WAIT
465 STCK __CLOCK_IDLE_ENTER(%r2)
466 stpt __TIMER_IDLE_ENTER(%r2)
467 lpswe __SF_EMPTY(%r15)
474 * Machine check handler routines
476 ENTRY(mcck_int_handler)
479 la %r1,4095 # validate r1
480 spt __LC_CPU_TIMER_SAVE_AREA-4095(%r1) # validate cpu timer
481 sckc __LC_CLOCK_COMPARATOR # validate comparator
482 lam %a0,%a15,__LC_AREGS_SAVE_AREA-4095(%r1) # validate acrs
483 lmg %r0,%r15,__LC_GPREGS_SAVE_AREA-4095(%r1)# validate gprs
485 lmg %r8,%r9,__LC_MCK_OLD_PSW
486 TSTMSK __LC_MCCK_CODE,MCCK_CODE_SYSTEM_DAMAGE
487 jo .Lmcck_panic # yes -> rest of mcck code invalid
488 TSTMSK __LC_MCCK_CODE,MCCK_CODE_CR_VALID
489 jno .Lmcck_panic # control registers invalid -> panic
491 lctlg %c0,%c15,__LC_CREGS_SAVE_AREA-4095(%r14) # validate ctl regs
493 lg %r11,__LC_MCESAD-4095(%r14) # extended machine check save area
494 nill %r11,0xfc00 # MCESA_ORIGIN_MASK
495 TSTMSK __LC_CREGS_SAVE_AREA+16-4095(%r14),CR2_GUARDED_STORAGE
497 TSTMSK __LC_MCCK_CODE,MCCK_CODE_GS_VALID
499 .insn rxy,0xe3000000004d,0,__MCESA_GS_SAVE_AREA(%r11) # LGSC
500 0: l %r14,__LC_FP_CREG_SAVE_AREA-4095(%r14)
501 TSTMSK __LC_MCCK_CODE,MCCK_CODE_FC_VALID
505 TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_VX
507 lghi %r14,__LC_FPREGS_SAVE_AREA
525 0: VLM %v0,%v15,0,%r11
526 VLM %v16,%v31,256,%r11
527 1: lghi %r14,__LC_CPU_TIMER_SAVE_AREA
528 mvc __LC_MCCK_ENTER_TIMER(8),0(%r14)
529 TSTMSK __LC_MCCK_CODE,MCCK_CODE_CPU_TIMER_VALID
531 la %r14,__LC_SYS_ENTER_TIMER
532 clc 0(8,%r14),__LC_EXIT_TIMER
534 la %r14,__LC_EXIT_TIMER
535 1: clc 0(8,%r14),__LC_LAST_UPDATE_TIMER
537 la %r14,__LC_LAST_UPDATE_TIMER
539 mvc __LC_MCCK_ENTER_TIMER(8),0(%r14)
540 3: TSTMSK __LC_MCCK_CODE,MCCK_CODE_PSW_MWP_VALID
542 tmhh %r8,0x0001 # interrupting from user ?
544 TSTMSK __LC_MCCK_CODE,MCCK_CODE_PSW_IA_VALID
546 4: ssm __LC_PGM_NEW_PSW # turn dat on, keep irqs off
547 SWITCH_KERNEL __LC_GPREGS_SAVE_AREA+64
549 lghi %r14,__LC_GPREGS_SAVE_AREA+64
550 stmg %r0,%r7,__PT_R0(%r11)
551 # clear user controlled registers to prevent speculative use
560 mvc __PT_R8(64,%r11),0(%r14)
561 stmg %r8,%r9,__PT_PSW(%r11)
563 mvc __PT_CR1(8,%r11),__LC_CREGS_SAVE_AREA-4095+8(%r14)
564 xc __PT_FLAGS(8,%r11),__PT_FLAGS(%r11)
565 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
566 lgr %r2,%r11 # pass pointer to pt_regs
567 brasl %r14,s390_do_machine_check
570 lg %r1,__LC_KERNEL_STACK # switch to kernel stack
571 mvc STACK_FRAME_OVERHEAD(__PT_SIZE,%r1),0(%r11)
572 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1)
573 la %r11,STACK_FRAME_OVERHEAD(%r1)
575 brasl %r14,s390_handle_mcck
577 lctlg %c1,%c1,__PT_CR1(%r11)
578 lmg %r0,%r10,__PT_R0(%r11)
579 mvc __LC_RETURN_MCCK_PSW(16),__PT_PSW(%r11) # move return PSW
580 tm __LC_RETURN_MCCK_PSW+1,0x01 # returning to user ?
582 BPEXIT __TI_flags(%r12),_TIF_ISOLATE_BP
584 0: lmg %r11,%r15,__PT_R11(%r11)
585 b __LC_RETURN_MCCK_LPSWE
588 lg %r15,__LC_NODAT_STACK
589 la %r11,STACK_FRAME_OVERHEAD(%r15)
591 ENDPROC(mcck_int_handler)
594 # PSW restart interrupt handler
596 ENTRY(restart_int_handler)
597 ALTERNATIVE "", ".insn s,0xb2800000,_LPP_OFFSET", 40
598 stg %r15,__LC_SAVE_AREA_RESTART
599 lg %r15,__LC_RESTART_STACK
600 xc STACK_FRAME_OVERHEAD(__PT_SIZE,%r15),STACK_FRAME_OVERHEAD(%r15)
601 stmg %r0,%r14,STACK_FRAME_OVERHEAD+__PT_R0(%r15)
602 mvc STACK_FRAME_OVERHEAD+__PT_R15(8,%r15),__LC_SAVE_AREA_RESTART
603 mvc STACK_FRAME_OVERHEAD+__PT_PSW(16,%r15),__LC_RST_OLD_PSW
604 xc 0(STACK_FRAME_OVERHEAD,%r15),0(%r15)
605 lg %r1,__LC_RESTART_FN # load fn, parm & source cpu
606 lg %r2,__LC_RESTART_DATA
607 lg %r3,__LC_RESTART_SOURCE
608 ltgr %r3,%r3 # test source cpu address
609 jm 1f # negative -> skip source stop
610 0: sigp %r4,%r3,SIGP_SENSE # sigp sense to source cpu
611 brc 10,0b # wait for status stored
612 1: basr %r14,%r1 # call function
613 stap __SF_EMPTY(%r15) # store cpu address
614 llgh %r3,__SF_EMPTY(%r15)
615 2: sigp %r4,%r3,SIGP_STOP # sigp stop to current cpu
618 ENDPROC(restart_int_handler)
620 .section .kprobes.text, "ax"
622 #if defined(CONFIG_CHECK_STACK) || defined(CONFIG_VMAP_STACK)
624 * The synchronous or the asynchronous stack overflowed. We are dead.
625 * No need to properly save the registers, we are going to panic anyway.
626 * Setup a pt_regs so that show_trace can provide a good call trace.
628 ENTRY(stack_overflow)
629 lg %r15,__LC_NODAT_STACK # change to panic stack
630 la %r11,STACK_FRAME_OVERHEAD(%r15)
631 stmg %r0,%r7,__PT_R0(%r11)
632 stmg %r8,%r9,__PT_PSW(%r11)
633 mvc __PT_R8(64,%r11),0(%r14)
634 stg %r10,__PT_ORIG_GPR2(%r11) # store last break to orig_gpr2
635 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
636 lgr %r2,%r11 # pass pointer to pt_regs
637 jg kernel_stack_overflow
638 ENDPROC(stack_overflow)
641 #if IS_ENABLED(CONFIG_KVM)
643 cghi %r11,__LC_SAVE_AREA_ASYNC #Is this in normal interrupt?
645 larl %r13,.Lsie_entry
650 oi __LC_CPU_FLAGS+7, _CIF_MCCK_GUEST
651 1: BPENTER __SF_SIE_FLAGS(%r15),(_TIF_ISOLATE_BP|_TIF_ISOLATE_BP_GUEST)
652 lg %r9,__SF_SIE_CONTROL(%r15) # get control block pointer
653 ni __SIE_PROG0C+3(%r9),0xfe # no longer in SIE
654 lctlg %c1,%c1,__LC_KERNEL_ASCE
655 larl %r9,sie_exit # skip forward to sie_exit
659 .section .rodata, "a"
660 #define SYSCALL(esame,emu) .quad __s390x_ ## esame
661 .globl sys_call_table
663 #include "asm/syscall_table.h"
668 #define SYSCALL(esame,emu) .quad __s390_ ## emu
669 .globl sys_call_table_emu
671 #include "asm/syscall_table.h"