1 /* SPDX-License-Identifier: GPL-2.0 */
3 * S390 low-level entry points.
5 * Copyright IBM Corp. 1999, 2012
6 * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com),
7 * Hartmut Penner (hp@de.ibm.com),
8 * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com),
9 * Heiko Carstens <heiko.carstens@de.ibm.com>
12 #include <linux/init.h>
13 #include <linux/linkage.h>
14 #include <asm/alternative-asm.h>
15 #include <asm/processor.h>
16 #include <asm/cache.h>
17 #include <asm/ctl_reg.h>
18 #include <asm/dwarf.h>
19 #include <asm/errno.h>
20 #include <asm/ptrace.h>
21 #include <asm/thread_info.h>
22 #include <asm/asm-offsets.h>
23 #include <asm/unistd.h>
27 #include <asm/vx-insn.h>
28 #include <asm/setup.h>
30 #include <asm/export.h>
31 #include <asm/nospec-insn.h>
34 __PT_R1 = __PT_GPRS + 8
35 __PT_R2 = __PT_GPRS + 16
36 __PT_R3 = __PT_GPRS + 24
37 __PT_R4 = __PT_GPRS + 32
38 __PT_R5 = __PT_GPRS + 40
39 __PT_R6 = __PT_GPRS + 48
40 __PT_R7 = __PT_GPRS + 56
41 __PT_R8 = __PT_GPRS + 64
42 __PT_R9 = __PT_GPRS + 72
43 __PT_R10 = __PT_GPRS + 80
44 __PT_R11 = __PT_GPRS + 88
45 __PT_R12 = __PT_GPRS + 96
46 __PT_R13 = __PT_GPRS + 104
47 __PT_R14 = __PT_GPRS + 112
48 __PT_R15 = __PT_GPRS + 120
50 STACK_SHIFT = PAGE_SHIFT + THREAD_SIZE_ORDER
51 STACK_SIZE = 1 << STACK_SHIFT
52 STACK_INIT = STACK_SIZE - STACK_FRAME_OVERHEAD - __PT_SIZE
54 _TIF_WORK = (_TIF_SIGPENDING | _TIF_NOTIFY_RESUME | _TIF_NEED_RESCHED | \
55 _TIF_UPROBE | _TIF_GUARDED_STORAGE | _TIF_PATCH_PENDING)
56 _TIF_TRACE = (_TIF_SYSCALL_TRACE | _TIF_SYSCALL_AUDIT | _TIF_SECCOMP | \
57 _TIF_SYSCALL_TRACEPOINT)
58 _CIF_WORK = (_CIF_FPU)
59 _PIF_WORK = (_PIF_PER_TRAP | _PIF_SYSCALL_RESTART)
61 _LPP_OFFSET = __LC_LPP
64 #ifdef CONFIG_TRACE_IRQFLAGS
66 brasl %r14,trace_hardirqs_on_caller
71 #ifdef CONFIG_TRACE_IRQFLAGS
73 brasl %r14,trace_hardirqs_off_caller
77 .macro LOCKDEP_SYS_EXIT
79 tm __PT_PSW+1(%r11),0x01 # returning to user ?
81 brasl %r14,lockdep_sys_exit
85 .macro CHECK_STACK savearea
86 #ifdef CONFIG_CHECK_STACK
87 tml %r15,STACK_SIZE - CONFIG_STACK_GUARD
93 .macro DEBUG_USER_ASCE
94 #ifdef CONFIG_DEBUG_USER_ASCE
95 brasl %r14,debug_user_asce
99 .macro CHECK_VMAP_STACK savearea,oklabel
100 #ifdef CONFIG_VMAP_STACK
102 nill %r14,0x10000 - STACK_SIZE
104 clg %r14,__LC_KERNEL_STACK
106 clg %r14,__LC_ASYNC_STACK
108 clg %r14,__LC_NODAT_STACK
110 clg %r14,__LC_RESTART_STACK
119 .macro SWITCH_ASYNC savearea,timer,clock
120 tmhh %r8,0x0001 # interrupting from user ?
122 #if IS_ENABLED(CONFIG_KVM)
126 lghi %r13,.Lsie_done - .Lsie_gmap
129 lghi %r11,\savearea # inside critical section, do cleanup
130 brasl %r14,.Lcleanup_sie
132 0: larl %r13,.Lpsw_idle_exit
136 larl %r1,smp_cpu_mtid
139 jz 2f # no SMT, skip mt_cycles calculation
140 .insn rsy,0xeb0000000017,%r1,5,__SF_EMPTY+80(%r15)
142 ag %r3,__LC_PERCPU_OFFSET
143 la %r4,__SF_EMPTY+16(%r15)
152 2: mvc __CLOCK_IDLE_EXIT(8,%r2), \clock
153 mvc __TIMER_IDLE_EXIT(8,%r2), \timer
154 # account system time going idle
155 ni __LC_CPU_FLAGS+7,255-_CIF_ENABLED_WAIT
157 lg %r13,__LC_STEAL_TIMER
158 alg %r13,__CLOCK_IDLE_ENTER(%r2)
159 slg %r13,__LC_LAST_UPDATE_CLOCK
160 stg %r13,__LC_STEAL_TIMER
162 mvc __LC_LAST_UPDATE_CLOCK(8),__CLOCK_IDLE_EXIT(%r2)
164 lg %r13,__LC_SYSTEM_TIMER
165 alg %r13,__LC_LAST_UPDATE_TIMER
166 slg %r13,__TIMER_IDLE_ENTER(%r2)
167 stg %r13,__LC_SYSTEM_TIMER
168 mvc __LC_LAST_UPDATE_TIMER(8),__TIMER_IDLE_EXIT(%r2)
170 nihh %r8,0xfcfd # clear wait state and irq bits
171 3: lg %r14,__LC_ASYNC_STACK # are we already on the target stack?
173 srag %r14,%r14,STACK_SHIFT
175 CHECK_STACK \savearea
176 aghi %r15,-(STACK_FRAME_OVERHEAD + __PT_SIZE)
178 4: UPDATE_VTIME %r14,%r15,\timer
179 BPENTER __TI_flags(%r12),_TIF_ISOLATE_BP
180 5: lg %r15,__LC_ASYNC_STACK # load async stack
181 6: la %r11,STACK_FRAME_OVERHEAD(%r15)
184 .macro UPDATE_VTIME w1,w2,enter_timer
185 lg \w1,__LC_EXIT_TIMER
186 lg \w2,__LC_LAST_UPDATE_TIMER
188 slg \w2,__LC_EXIT_TIMER
189 alg \w1,__LC_USER_TIMER
190 alg \w2,__LC_SYSTEM_TIMER
191 stg \w1,__LC_USER_TIMER
192 stg \w2,__LC_SYSTEM_TIMER
193 mvc __LC_LAST_UPDATE_TIMER(8),\enter_timer
196 .macro RESTORE_SM_CLEAR_PER
197 stg %r8,__LC_RETURN_PSW
198 ni __LC_RETURN_PSW,0xbf
203 stosm __SF_EMPTY(%r15),3
206 .macro ENABLE_INTS_TRACE
212 stnsm __SF_EMPTY(%r15),0xfc
215 .macro DISABLE_INTS_TRACE
221 #ifdef CONFIG_HAVE_MARCH_Z9_109_FEATURES
222 .insn s,0xb27c0000,\savearea # store clock fast
224 .insn s,0xb2050000,\savearea # store clock
229 * The TSTMSK macro generates a test-under-mask instruction by
230 * calculating the memory offset for the specified mask value.
231 * Mask value can be any constant. The macro shifts the mask
232 * value to calculate the memory offset for the test-under-mask
235 .macro TSTMSK addr, mask, size=8, bytepos=0
236 .if (\bytepos < \size) && (\mask >> 8)
238 .error "Mask exceeds byte boundary"
240 TSTMSK \addr, "(\mask >> 8)", \size, "(\bytepos + 1)"
244 .error "Mask must not be zero"
246 off = \size - \bytepos - 1
251 ALTERNATIVE "", ".long 0xb2e8c000", 82
255 ALTERNATIVE "", ".long 0xb2e8d000", 82
258 .macro BPENTER tif_ptr,tif_mask
259 ALTERNATIVE "TSTMSK \tif_ptr,\tif_mask; jz .+8; .long 0xb2e8d000", \
263 .macro BPEXIT tif_ptr,tif_mask
264 TSTMSK \tif_ptr,\tif_mask
265 ALTERNATIVE "jz .+8; .long 0xb2e8c000", \
266 "jnz .+8; .long 0xb2e8d000", 82
271 GEN_BR_THUNK %r14,%r11
273 .section .kprobes.text, "ax"
276 * This nop exists only in order to avoid that __switch_to starts at
277 * the beginning of the kprobes text section. In that case we would
278 * have several symbols at the same address. E.g. objdump would take
279 * an arbitrary symbol name when disassembling this code.
280 * With the added nop in between the __switch_to symbol is unique
292 * Scheduler resume function, called by switch_to
293 * gpr2 = (task_struct *) prev
294 * gpr3 = (task_struct *) next
299 stmg %r6,%r15,__SF_GPRS(%r15) # store gprs of prev task
300 lghi %r4,__TASK_stack
301 lghi %r1,__TASK_thread
303 stg %r15,__THREAD_ksp(%r1,%r2) # store kernel stack of prev
304 lg %r15,0(%r4,%r3) # start of kernel stack of next
305 agr %r15,%r5 # end of kernel stack of next
306 stg %r3,__LC_CURRENT # store task struct of next
307 stg %r15,__LC_KERNEL_STACK # store end of kernel stack
308 lg %r15,__THREAD_ksp(%r1,%r3) # load kernel stack of next
310 mvc __LC_CURRENT_PID(4,%r0),0(%r3) # store pid of next
311 lmg %r6,%r15,__SF_GPRS(%r15) # load gprs of next task
312 ALTERNATIVE "", ".insn s,0xb2800000,_LPP_OFFSET", 40
316 #if IS_ENABLED(CONFIG_KVM)
318 * sie64a calling convention:
319 * %r2 pointer to sie control block
320 * %r3 guest register save area
323 stmg %r6,%r14,__SF_GPRS(%r15) # save kernel registers
325 stg %r2,__SF_SIE_CONTROL(%r15) # save control block pointer
326 stg %r3,__SF_SIE_SAVEAREA(%r15) # save guest register save area
327 xc __SF_SIE_REASON(8,%r15),__SF_SIE_REASON(%r15) # reason code = 0
328 mvc __SF_SIE_FLAGS(8,%r15),__TI_flags(%r12) # copy thread flags
329 TSTMSK __LC_CPU_FLAGS,_CIF_FPU # load guest fp/vx registers ?
330 jno .Lsie_load_guest_gprs
331 brasl %r14,load_fpu_regs # load guest fp/vx regs
332 .Lsie_load_guest_gprs:
333 lmg %r0,%r13,0(%r3) # load guest gprs 0-13
334 lg %r14,__LC_GMAP # get gmap pointer
337 lctlg %c1,%c1,__GMAP_ASCE(%r14) # load primary asce
339 lg %r14,__SF_SIE_CONTROL(%r15) # get control block pointer
340 oi __SIE_PROG0C+3(%r14),1 # we are going into SIE now
341 tm __SIE_PROG20+3(%r14),3 # last exit...
343 TSTMSK __LC_CPU_FLAGS,_CIF_FPU
344 jo .Lsie_skip # exit if fp/vx regs changed
345 BPEXIT __SF_SIE_FLAGS(%r15),(_TIF_ISOLATE_BP|_TIF_ISOLATE_BP_GUEST)
349 BPENTER __SF_SIE_FLAGS(%r15),(_TIF_ISOLATE_BP|_TIF_ISOLATE_BP_GUEST)
351 ni __SIE_PROG0C+3(%r14),0xfe # no longer in SIE
352 lctlg %c1,%c1,__LC_KERNEL_ASCE # load primary asce
354 # some program checks are suppressing. C code (e.g. do_protection_exception)
355 # will rewind the PSW by the ILC, which is often 4 bytes in case of SIE. There
356 # are some corner cases (e.g. runtime instrumentation) where ILC is unpredictable.
357 # Other instructions between sie64a and .Lsie_done should not cause program
358 # interrupts. So lets use 3 nops as a landing pad for all possible rewinds.
359 # See also .Lcleanup_sie
368 lg %r14,__SF_SIE_SAVEAREA(%r15) # load guest register save area
369 stmg %r0,%r13,0(%r14) # save guest gprs 0-13
370 xgr %r0,%r0 # clear guest registers to
371 xgr %r1,%r1 # prevent speculative use
376 lmg %r6,%r14,__SF_GPRS(%r15) # restore kernel registers
377 lg %r2,__SF_SIE_REASON(%r15) # return exit reason code
381 stg %r14,__SF_SIE_REASON(%r15) # set exit reason code
384 EX_TABLE(.Lrewind_pad6,.Lsie_fault)
385 EX_TABLE(.Lrewind_pad4,.Lsie_fault)
386 EX_TABLE(.Lrewind_pad2,.Lsie_fault)
387 EX_TABLE(sie_exit,.Lsie_fault)
389 EXPORT_SYMBOL(sie64a)
390 EXPORT_SYMBOL(sie_exit)
394 * SVC interrupt handler routine. System calls are synchronous events and
395 * are entered with interrupts disabled.
399 stpt __LC_SYNC_ENTER_TIMER
400 stmg %r8,%r15,__LC_SAVE_AREA_SYNC
403 lghi %r14,_PIF_SYSCALL
405 lctlg %c1,%c1,__LC_KERNEL_ASCE
406 lghi %r13,__TASK_thread
407 lg %r15,__LC_KERNEL_STACK
408 la %r11,STACK_FRAME_OVERHEAD(%r15) # pointer to pt_regs
409 UPDATE_VTIME %r8,%r9,__LC_SYNC_ENTER_TIMER
410 BPENTER __TI_flags(%r12),_TIF_ISOLATE_BP
411 stmg %r0,%r7,__PT_R0(%r11)
412 mvc __PT_R8(64,%r11),__LC_SAVE_AREA_SYNC
413 mvc __PT_PSW(16,%r11),__LC_SVC_OLD_PSW
414 mvc __PT_INT_CODE(4,%r11),__LC_SVC_ILC
415 stg %r14,__PT_FLAGS(%r11)
416 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
419 # clear user controlled register to prevent speculative use
421 # load address of system call table
422 lg %r10,__THREAD_sysc_table(%r13,%r12)
423 llgh %r8,__PT_INT_CODE+2(%r11)
424 slag %r8,%r8,3 # shift and test for svc 0
426 # svc 0: system call number in %r1
427 llgfr %r1,%r1 # clear high word in r1
428 sth %r1,__PT_INT_CODE+2(%r11)
433 stg %r2,__PT_ORIG_GPR2(%r11)
434 stg %r7,STACK_FRAME_OVERHEAD(%r15)
435 lg %r9,0(%r8,%r10) # get system call add.
436 TSTMSK __TI_flags(%r12),_TIF_TRACE
438 BASR_EX %r14,%r9 # call sys_xxxx
439 stg %r2,__PT_R2(%r11) # store return value
442 #ifdef CONFIG_DEBUG_RSEQ
444 brasl %r14,rseq_syscall
449 TSTMSK __PT_FLAGS(%r11),_PIF_WORK
451 TSTMSK __TI_flags(%r12),_TIF_WORK
452 jnz .Lsysc_work # check for work
454 lctlg %c1,%c1,__LC_USER_ASCE
455 BPEXIT __TI_flags(%r12),_TIF_ISOLATE_BP
456 TSTMSK __LC_CPU_FLAGS, _CIF_FPU
458 brasl %r14,load_fpu_regs
460 mvc __LC_RETURN_PSW(16),__PT_PSW(%r11)
462 lmg %r0,%r15,__PT_R0(%r11)
466 # One of the work bits is on. Find out which one.
470 TSTMSK __TI_flags(%r12),_TIF_NEED_RESCHED
472 TSTMSK __PT_FLAGS(%r11),_PIF_SYSCALL_RESTART
473 jo .Lsysc_syscall_restart
474 #ifdef CONFIG_UPROBES
475 TSTMSK __TI_flags(%r12),_TIF_UPROBE
476 jo .Lsysc_uprobe_notify
478 TSTMSK __TI_flags(%r12),_TIF_GUARDED_STORAGE
479 jo .Lsysc_guarded_storage
480 TSTMSK __PT_FLAGS(%r11),_PIF_PER_TRAP
482 #ifdef CONFIG_LIVEPATCH
483 TSTMSK __TI_flags(%r12),_TIF_PATCH_PENDING
484 jo .Lsysc_patch_pending # handle live patching just before
485 # signals and possible syscall restart
487 TSTMSK __PT_FLAGS(%r11),_PIF_SYSCALL_RESTART
488 jo .Lsysc_syscall_restart
489 TSTMSK __TI_flags(%r12),_TIF_SIGPENDING
491 TSTMSK __TI_flags(%r12),_TIF_NOTIFY_RESUME
492 jo .Lsysc_notify_resume
496 # _TIF_NEED_RESCHED is set, call schedule
499 larl %r14,.Lsysc_return
503 # _TIF_SIGPENDING is set, call do_signal
506 lgr %r2,%r11 # pass pointer to pt_regs
508 TSTMSK __PT_FLAGS(%r11),_PIF_SYSCALL
511 lghi %r13,__TASK_thread
512 lmg %r2,%r7,__PT_R2(%r11) # load svc arguments
513 lghi %r1,0 # svc 0 returns -ENOSYS
517 # _TIF_NOTIFY_RESUME is set, call do_notify_resume
519 .Lsysc_notify_resume:
520 lgr %r2,%r11 # pass pointer to pt_regs
521 larl %r14,.Lsysc_return
525 # _TIF_UPROBE is set, call uprobe_notify_resume
527 #ifdef CONFIG_UPROBES
528 .Lsysc_uprobe_notify:
529 lgr %r2,%r11 # pass pointer to pt_regs
530 larl %r14,.Lsysc_return
531 jg uprobe_notify_resume
535 # _TIF_GUARDED_STORAGE is set, call guarded_storage_load
537 .Lsysc_guarded_storage:
538 lgr %r2,%r11 # pass pointer to pt_regs
539 larl %r14,.Lsysc_return
542 # _TIF_PATCH_PENDING is set, call klp_update_patch_state
544 #ifdef CONFIG_LIVEPATCH
545 .Lsysc_patch_pending:
546 lg %r2,__LC_CURRENT # pass pointer to task struct
547 larl %r14,.Lsysc_return
548 jg klp_update_patch_state
552 # _PIF_PER_TRAP is set, call do_per_trap
555 ni __PT_FLAGS+7(%r11),255-_PIF_PER_TRAP
556 lgr %r2,%r11 # pass pointer to pt_regs
557 larl %r14,.Lsysc_return
561 # _PIF_SYSCALL_RESTART is set, repeat the current system call
563 .Lsysc_syscall_restart:
564 ni __PT_FLAGS+7(%r11),255-_PIF_SYSCALL_RESTART
565 lmg %r1,%r7,__PT_R1(%r11) # load svc arguments
566 lg %r2,__PT_ORIG_GPR2(%r11)
570 # call tracehook_report_syscall_entry/tracehook_report_syscall_exit before
571 # and after the system call
574 lgr %r2,%r11 # pass pointer to pt_regs
576 llgh %r0,__PT_INT_CODE+2(%r11)
577 stg %r0,__PT_R2(%r11)
578 brasl %r14,do_syscall_trace_enter
584 lmg %r3,%r7,__PT_R3(%r11)
585 stg %r7,STACK_FRAME_OVERHEAD(%r15)
586 lg %r2,__PT_ORIG_GPR2(%r11)
587 BASR_EX %r14,%r9 # call sys_xxx
588 stg %r2,__PT_R2(%r11) # store return value
590 TSTMSK __TI_flags(%r12),_TIF_TRACE
592 lgr %r2,%r11 # pass pointer to pt_regs
593 larl %r14,.Lsysc_return
594 jg do_syscall_trace_exit
598 # a new process exits the kernel with ret_from_fork
601 la %r11,STACK_FRAME_OVERHEAD(%r15)
603 brasl %r14,schedule_tail
604 tm __PT_PSW+1(%r11),0x01 # forking a kernel thread ?
606 # it's a kernel thread
607 lmg %r9,%r10,__PT_R9(%r11) # load gprs
611 ENDPROC(ret_from_fork)
613 ENTRY(kernel_thread_starter)
617 ENDPROC(kernel_thread_starter)
620 * Program check handler routine
623 ENTRY(pgm_check_handler)
624 stpt __LC_SYNC_ENTER_TIMER
626 stmg %r8,%r15,__LC_SAVE_AREA_SYNC
627 lg %r10,__LC_LAST_BREAK
630 /* if __LC_LAST_BREAK is < 4096, it contains one of
631 * the lpswe addresses in lowcore. Set it to 1 (initial state)
632 * to prevent leaking that address to userspace.
635 0: lg %r12,__LC_CURRENT
637 lmg %r8,%r9,__LC_PGM_OLD_PSW
638 tmhh %r8,0x0001 # coming from user space?
640 lctlg %c1,%c1,__LC_KERNEL_ASCE
643 #if IS_ENABLED(CONFIG_KVM)
644 # cleanup critical section for program checks in sie64a
648 lghi %r13,.Lsie_done - .Lsie_gmap
651 lg %r14,__SF_SIE_CONTROL(%r15) # get control block pointer
652 ni __SIE_PROG0C+3(%r14),0xfe # no longer in SIE
653 lctlg %c1,%c1,__LC_KERNEL_ASCE # load primary asce
654 larl %r9,sie_exit # skip forward to sie_exit
655 lghi %r11,_PIF_GUEST_FAULT
657 1: tmhh %r8,0x4000 # PER bit set in old PSW ?
658 jnz 2f # -> enabled, can't be a double fault
659 tm __LC_PGM_ILC+3,0x80 # check for per exception
660 jnz .Lpgm_svcper # -> single stepped svc
661 2: CHECK_STACK __LC_SAVE_AREA_SYNC
662 aghi %r15,-(STACK_FRAME_OVERHEAD + __PT_SIZE)
663 # CHECK_VMAP_STACK branches to stack_overflow or 5f
664 CHECK_VMAP_STACK __LC_SAVE_AREA_SYNC,5f
665 3: UPDATE_VTIME %r14,%r15,__LC_SYNC_ENTER_TIMER
666 BPENTER __TI_flags(%r12),_TIF_ISOLATE_BP
667 lg %r15,__LC_KERNEL_STACK
669 aghi %r14,__TASK_thread # pointer to thread_struct
670 lghi %r13,__LC_PGM_TDB
671 tm __LC_PGM_ILC+2,0x02 # check for transaction abort
673 mvc __THREAD_trap_tdb(256,%r14),0(%r13)
674 4: stg %r10,__THREAD_last_break(%r14)
676 la %r11,STACK_FRAME_OVERHEAD(%r15)
677 stmg %r0,%r7,__PT_R0(%r11)
678 # clear user controlled registers to prevent speculative use
687 mvc __PT_R8(64,%r11),__LC_SAVE_AREA_SYNC
688 stmg %r8,%r9,__PT_PSW(%r11)
689 mvc __PT_INT_CODE(4,%r11),__LC_PGM_ILC
690 mvc __PT_INT_PARM_LONG(8,%r11),__LC_TRANS_EXC_CODE
691 stg %r13,__PT_FLAGS(%r11)
692 stg %r10,__PT_ARGS(%r11)
693 tm __LC_PGM_ILC+3,0x80 # check for per exception
695 tmhh %r8,0x0001 # kernel per event ?
697 oi __PT_FLAGS+7(%r11),_PIF_PER_TRAP
698 mvc __THREAD_per_address(8,%r14),__LC_PER_ADDRESS
699 mvc __THREAD_per_cause(2,%r14),__LC_PER_CODE
700 mvc __THREAD_per_paid(1,%r14),__LC_PER_ACCESS_ID
701 6: xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
703 larl %r1,pgm_check_table
704 llgh %r10,__PT_INT_CODE+2(%r11)
708 lg %r9,0(%r10,%r1) # load address of handler routine
709 lgr %r2,%r11 # pass pointer to pt_regs
710 BASR_EX %r14,%r9 # branch to interrupt-handler
713 tm __PT_PSW+1(%r11),0x01 # returning to user ?
715 TSTMSK __PT_FLAGS(%r11),_PIF_SYSCALL
720 TSTMSK __LC_CPU_FLAGS, _CIF_FPU
722 brasl %r14,load_fpu_regs
724 mvc __LC_RETURN_PSW(16),__PT_PSW(%r11)
726 lmg %r0,%r15,__PT_R0(%r11)
730 # PER event in supervisor state, must be kprobes
733 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
735 lgr %r2,%r11 # pass pointer to pt_regs
736 brasl %r14,do_per_trap
740 # single stepped system call
743 mvc __LC_RETURN_PSW(8),__LC_SVC_NEW_PSW
745 stg %r14,__LC_RETURN_PSW+8
746 lghi %r14,_PIF_SYSCALL | _PIF_PER_TRAP
747 lpswe __LC_RETURN_PSW # branch to .Lsysc_per
748 ENDPROC(pgm_check_handler)
751 * IO interrupt handler routine
753 ENTRY(io_int_handler)
755 stpt __LC_ASYNC_ENTER_TIMER
757 stmg %r8,%r15,__LC_SAVE_AREA_ASYNC
759 lmg %r8,%r9,__LC_IO_OLD_PSW
760 SWITCH_ASYNC __LC_SAVE_AREA_ASYNC,__LC_ASYNC_ENTER_TIMER,__LC_INT_CLOCK
761 stmg %r0,%r7,__PT_R0(%r11)
762 # clear user controlled registers to prevent speculative use
772 mvc __PT_R8(64,%r11),__LC_SAVE_AREA_ASYNC
773 stmg %r8,%r9,__PT_PSW(%r11)
774 tm __PT_PSW+1(%r11),0x01 # coming from user space?
776 lctlg %c1,%c1,__LC_KERNEL_ASCE
778 mvc __PT_INT_CODE(12,%r11),__LC_SUBCHANNEL_ID
779 xc __PT_FLAGS(8,%r11),__PT_FLAGS(%r11)
780 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
782 TSTMSK __LC_CPU_FLAGS,_CIF_IGNORE_IRQ
785 lgr %r2,%r11 # pass pointer to pt_regs
786 lghi %r3,IO_INTERRUPT
787 tm __PT_INT_CODE+8(%r11),0x80 # adapter interrupt ?
789 lghi %r3,THIN_INTERRUPT
792 TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_LPAR
796 mvc __PT_INT_CODE(12,%r11),__LC_SUBCHANNEL_ID
800 TSTMSK __TI_flags(%r12),_TIF_WORK
801 jnz .Lio_work # there is work to do (signals etc.)
802 TSTMSK __LC_CPU_FLAGS,_CIF_WORK
806 mvc __LC_RETURN_PSW(16),__PT_PSW(%r11)
807 tm __PT_PSW+1(%r11),0x01 # returning to user ?
810 lctlg %c1,%c1,__LC_USER_ASCE
811 BPEXIT __TI_flags(%r12),_TIF_ISOLATE_BP
814 lmg %r0,%r15,__PT_R0(%r11)
819 # There is work todo, find out in which context we have been interrupted:
820 # 1) if we return to user space we can do all _TIF_WORK work
821 # 2) if we return to kernel code and kvm is enabled check if we need to
822 # modify the psw to leave SIE
823 # 3) if we return to kernel code and preemptive scheduling is enabled check
824 # the preemption counter and if it is zero call preempt_schedule_irq
825 # Before any work can be done, a switch to the kernel stack is required.
828 tm __PT_PSW+1(%r11),0x01 # returning to user ?
829 jo .Lio_work_user # yes -> do resched & signal
830 #ifdef CONFIG_PREEMPTION
831 # check for preemptive scheduling
832 icm %r0,15,__LC_PREEMPT_COUNT
833 jnz .Lio_restore # preemption is disabled
834 TSTMSK __TI_flags(%r12),_TIF_NEED_RESCHED
836 # switch to kernel stack
837 lg %r1,__PT_R15(%r11)
838 aghi %r1,-(STACK_FRAME_OVERHEAD + __PT_SIZE)
839 mvc STACK_FRAME_OVERHEAD(__PT_SIZE,%r1),0(%r11)
840 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1)
841 la %r11,STACK_FRAME_OVERHEAD(%r1)
843 brasl %r14,preempt_schedule_irq
850 # Need to do work before returning to userspace, switch to kernel stack
853 lg %r1,__LC_KERNEL_STACK
854 mvc STACK_FRAME_OVERHEAD(__PT_SIZE,%r1),0(%r11)
855 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1)
856 la %r11,STACK_FRAME_OVERHEAD(%r1)
860 # One of the work bits is on. Find out which one.
862 TSTMSK __TI_flags(%r12),_TIF_NEED_RESCHED
864 #ifdef CONFIG_LIVEPATCH
865 TSTMSK __TI_flags(%r12),_TIF_PATCH_PENDING
866 jo .Lio_patch_pending
868 TSTMSK __TI_flags(%r12),_TIF_SIGPENDING
870 TSTMSK __TI_flags(%r12),_TIF_NOTIFY_RESUME
871 jo .Lio_notify_resume
872 TSTMSK __TI_flags(%r12),_TIF_GUARDED_STORAGE
873 jo .Lio_guarded_storage
874 TSTMSK __LC_CPU_FLAGS,_CIF_FPU
879 # CIF_FPU is set, restore floating-point controls and floating-point registers.
882 larl %r14,.Lio_return
886 # _TIF_GUARDED_STORAGE is set, call guarded_storage_load
888 .Lio_guarded_storage:
890 lgr %r2,%r11 # pass pointer to pt_regs
891 brasl %r14,gs_load_bc_cb
896 # _TIF_NEED_RESCHED is set, call schedule
900 brasl %r14,schedule # call scheduler
905 # _TIF_PATCH_PENDING is set, call klp_update_patch_state
907 #ifdef CONFIG_LIVEPATCH
909 lg %r2,__LC_CURRENT # pass pointer to task struct
910 larl %r14,.Lio_return
911 jg klp_update_patch_state
915 # _TIF_SIGPENDING or is set, call do_signal
919 lgr %r2,%r11 # pass pointer to pt_regs
925 # _TIF_NOTIFY_RESUME or is set, call do_notify_resume
929 lgr %r2,%r11 # pass pointer to pt_regs
930 brasl %r14,do_notify_resume
933 ENDPROC(io_int_handler)
936 * External interrupt handler routine
938 ENTRY(ext_int_handler)
940 stpt __LC_ASYNC_ENTER_TIMER
942 stmg %r8,%r15,__LC_SAVE_AREA_ASYNC
944 lmg %r8,%r9,__LC_EXT_OLD_PSW
945 SWITCH_ASYNC __LC_SAVE_AREA_ASYNC,__LC_ASYNC_ENTER_TIMER,__LC_INT_CLOCK
946 stmg %r0,%r7,__PT_R0(%r11)
947 # clear user controlled registers to prevent speculative use
957 mvc __PT_R8(64,%r11),__LC_SAVE_AREA_ASYNC
958 stmg %r8,%r9,__PT_PSW(%r11)
959 tm __PT_PSW+1(%r11),0x01 # coming from user space?
961 lctlg %c1,%c1,__LC_KERNEL_ASCE
963 lghi %r1,__LC_EXT_PARAMS2
964 mvc __PT_INT_CODE(4,%r11),__LC_EXT_CPU_ADDR
965 mvc __PT_INT_PARM(4,%r11),__LC_EXT_PARAMS
966 mvc __PT_INT_PARM_LONG(8,%r11),0(%r1)
967 xc __PT_FLAGS(8,%r11),__PT_FLAGS(%r11)
968 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
970 TSTMSK __LC_CPU_FLAGS,_CIF_IGNORE_IRQ
972 lgr %r2,%r11 # pass pointer to pt_regs
973 lghi %r3,EXT_INTERRUPT
976 ENDPROC(ext_int_handler)
982 stg %r3,__SF_EMPTY(%r15)
983 larl %r1,.Lpsw_idle_exit
984 stg %r1,__SF_EMPTY+8(%r15)
985 larl %r1,smp_cpu_mtid
989 .insn rsy,0xeb0000000017,%r1,5,__SF_EMPTY+16(%r15)
991 oi __LC_CPU_FLAGS+7,_CIF_ENABLED_WAIT
993 STCK __CLOCK_IDLE_ENTER(%r2)
994 stpt __TIMER_IDLE_ENTER(%r2)
995 lpswe __SF_EMPTY(%r15)
1001 * Store floating-point controls and floating-point or vector register
1002 * depending whether the vector facility is available. A critical section
1003 * cleanup assures that the registers are stored even if interrupted for
1004 * some other work. The CIF_FPU flag is set to trigger a lazy restore
1005 * of the register contents at return from io or a system call.
1007 ENTRY(save_fpu_regs)
1008 stnsm __SF_EMPTY(%r15),0xfc
1010 aghi %r2,__TASK_thread
1011 TSTMSK __LC_CPU_FLAGS,_CIF_FPU
1012 jo .Lsave_fpu_regs_exit
1013 stfpc __THREAD_FPU_fpc(%r2)
1014 lg %r3,__THREAD_FPU_regs(%r2)
1015 TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_VX
1016 jz .Lsave_fpu_regs_fp # no -> store FP regs
1017 VSTM %v0,%v15,0,%r3 # vstm 0,15,0(3)
1018 VSTM %v16,%v31,256,%r3 # vstm 16,31,256(3)
1019 j .Lsave_fpu_regs_done # -> set CIF_FPU flag
1037 .Lsave_fpu_regs_done:
1038 oi __LC_CPU_FLAGS+7,_CIF_FPU
1039 .Lsave_fpu_regs_exit:
1040 ssm __SF_EMPTY(%r15)
1042 .Lsave_fpu_regs_end:
1043 ENDPROC(save_fpu_regs)
1044 EXPORT_SYMBOL(save_fpu_regs)
1047 * Load floating-point controls and floating-point or vector registers.
1048 * A critical section cleanup assures that the register contents are
1049 * loaded even if interrupted for some other work.
1051 * There are special calling conventions to fit into sysc and io return work:
1052 * %r15: <kernel stack>
1053 * The function requires:
1057 stnsm __SF_EMPTY(%r15),0xfc
1059 aghi %r4,__TASK_thread
1060 TSTMSK __LC_CPU_FLAGS,_CIF_FPU
1061 jno .Lload_fpu_regs_exit
1062 lfpc __THREAD_FPU_fpc(%r4)
1063 TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_VX
1064 lg %r4,__THREAD_FPU_regs(%r4) # %r4 <- reg save area
1065 jz .Lload_fpu_regs_fp # -> no VX, load FP regs
1067 VLM %v16,%v31,256,%r4
1068 j .Lload_fpu_regs_done
1086 .Lload_fpu_regs_done:
1087 ni __LC_CPU_FLAGS+7,255-_CIF_FPU
1088 .Lload_fpu_regs_exit:
1089 ssm __SF_EMPTY(%r15)
1091 .Lload_fpu_regs_end:
1092 ENDPROC(load_fpu_regs)
1095 * Machine check handler routines
1097 ENTRY(mcck_int_handler)
1098 STCK __LC_MCCK_CLOCK
1100 la %r1,4095 # validate r1
1101 spt __LC_CPU_TIMER_SAVE_AREA-4095(%r1) # validate cpu timer
1102 sckc __LC_CLOCK_COMPARATOR # validate comparator
1103 lam %a0,%a15,__LC_AREGS_SAVE_AREA-4095(%r1) # validate acrs
1104 lmg %r0,%r15,__LC_GPREGS_SAVE_AREA-4095(%r1)# validate gprs
1105 lg %r12,__LC_CURRENT
1106 lmg %r8,%r9,__LC_MCK_OLD_PSW
1107 TSTMSK __LC_MCCK_CODE,MCCK_CODE_SYSTEM_DAMAGE
1108 jo .Lmcck_panic # yes -> rest of mcck code invalid
1109 TSTMSK __LC_MCCK_CODE,MCCK_CODE_CR_VALID
1110 jno .Lmcck_panic # control registers invalid -> panic
1112 lctlg %c0,%c15,__LC_CREGS_SAVE_AREA-4095(%r14) # validate ctl regs
1114 lg %r11,__LC_MCESAD-4095(%r14) # extended machine check save area
1115 nill %r11,0xfc00 # MCESA_ORIGIN_MASK
1116 TSTMSK __LC_CREGS_SAVE_AREA+16-4095(%r14),CR2_GUARDED_STORAGE
1118 TSTMSK __LC_MCCK_CODE,MCCK_CODE_GS_VALID
1120 .insn rxy,0xe3000000004d,0,__MCESA_GS_SAVE_AREA(%r11) # LGSC
1121 0: l %r14,__LC_FP_CREG_SAVE_AREA-4095(%r14)
1122 TSTMSK __LC_MCCK_CODE,MCCK_CODE_FC_VALID
1126 TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_VX
1128 lghi %r14,__LC_FPREGS_SAVE_AREA
1146 0: VLM %v0,%v15,0,%r11
1147 VLM %v16,%v31,256,%r11
1148 1: lghi %r14,__LC_CPU_TIMER_SAVE_AREA
1149 mvc __LC_MCCK_ENTER_TIMER(8),0(%r14)
1150 TSTMSK __LC_MCCK_CODE,MCCK_CODE_CPU_TIMER_VALID
1152 la %r14,__LC_SYNC_ENTER_TIMER
1153 clc 0(8,%r14),__LC_ASYNC_ENTER_TIMER
1155 la %r14,__LC_ASYNC_ENTER_TIMER
1156 0: clc 0(8,%r14),__LC_EXIT_TIMER
1158 la %r14,__LC_EXIT_TIMER
1159 1: clc 0(8,%r14),__LC_LAST_UPDATE_TIMER
1161 la %r14,__LC_LAST_UPDATE_TIMER
1163 mvc __LC_MCCK_ENTER_TIMER(8),0(%r14)
1164 3: TSTMSK __LC_MCCK_CODE,MCCK_CODE_PSW_MWP_VALID
1166 tmhh %r8,0x0001 # interrupting from user ?
1168 TSTMSK __LC_MCCK_CODE,MCCK_CODE_PSW_IA_VALID
1170 4: ssm __LC_PGM_NEW_PSW # turn dat on, keep irqs off
1171 SWITCH_ASYNC __LC_GPREGS_SAVE_AREA+64,__LC_MCCK_ENTER_TIMER,__LC_MCCK_CLOCK
1173 lghi %r14,__LC_GPREGS_SAVE_AREA+64
1174 stmg %r0,%r7,__PT_R0(%r11)
1175 # clear user controlled registers to prevent speculative use
1185 mvc __PT_R8(64,%r11),0(%r14)
1186 stmg %r8,%r9,__PT_PSW(%r11)
1188 mvc __PT_CR1(8,%r11),__LC_CREGS_SAVE_AREA-4095+8(%r14)
1189 lctlg %c1,%c1,__LC_KERNEL_ASCE
1190 xc __PT_FLAGS(8,%r11),__PT_FLAGS(%r11)
1191 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
1192 lgr %r2,%r11 # pass pointer to pt_regs
1193 brasl %r14,s390_do_machine_check
1196 lg %r1,__LC_KERNEL_STACK # switch to kernel stack
1197 mvc STACK_FRAME_OVERHEAD(__PT_SIZE,%r1),0(%r11)
1198 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1)
1199 la %r11,STACK_FRAME_OVERHEAD(%r1)
1202 brasl %r14,s390_handle_mcck
1205 lctlg %c1,%c1,__PT_CR1(%r11)
1206 lmg %r0,%r10,__PT_R0(%r11)
1207 mvc __LC_RETURN_MCCK_PSW(16),__PT_PSW(%r11) # move return PSW
1208 tm __LC_RETURN_MCCK_PSW+1,0x01 # returning to user ?
1210 BPEXIT __TI_flags(%r12),_TIF_ISOLATE_BP
1211 stpt __LC_EXIT_TIMER
1212 0: lmg %r11,%r15,__PT_R11(%r11)
1213 b __LC_RETURN_MCCK_LPSWE
1216 lg %r15,__LC_NODAT_STACK
1217 la %r11,STACK_FRAME_OVERHEAD(%r15)
1219 ENDPROC(mcck_int_handler)
1222 # PSW restart interrupt handler
1224 ENTRY(restart_int_handler)
1225 ALTERNATIVE "", ".insn s,0xb2800000,_LPP_OFFSET", 40
1226 stg %r15,__LC_SAVE_AREA_RESTART
1227 lg %r15,__LC_RESTART_STACK
1228 xc STACK_FRAME_OVERHEAD(__PT_SIZE,%r15),STACK_FRAME_OVERHEAD(%r15)
1229 stmg %r0,%r14,STACK_FRAME_OVERHEAD+__PT_R0(%r15)
1230 mvc STACK_FRAME_OVERHEAD+__PT_R15(8,%r15),__LC_SAVE_AREA_RESTART
1231 mvc STACK_FRAME_OVERHEAD+__PT_PSW(16,%r15),__LC_RST_OLD_PSW
1232 xc 0(STACK_FRAME_OVERHEAD,%r15),0(%r15)
1233 lg %r1,__LC_RESTART_FN # load fn, parm & source cpu
1234 lg %r2,__LC_RESTART_DATA
1235 lg %r3,__LC_RESTART_SOURCE
1236 ltgr %r3,%r3 # test source cpu address
1237 jm 1f # negative -> skip source stop
1238 0: sigp %r4,%r3,SIGP_SENSE # sigp sense to source cpu
1239 brc 10,0b # wait for status stored
1240 1: basr %r14,%r1 # call function
1241 stap __SF_EMPTY(%r15) # store cpu address
1242 llgh %r3,__SF_EMPTY(%r15)
1243 2: sigp %r4,%r3,SIGP_STOP # sigp stop to current cpu
1246 ENDPROC(restart_int_handler)
1248 .section .kprobes.text, "ax"
1250 #if defined(CONFIG_CHECK_STACK) || defined(CONFIG_VMAP_STACK)
1252 * The synchronous or the asynchronous stack overflowed. We are dead.
1253 * No need to properly save the registers, we are going to panic anyway.
1254 * Setup a pt_regs so that show_trace can provide a good call trace.
1256 ENTRY(stack_overflow)
1257 lg %r15,__LC_NODAT_STACK # change to panic stack
1258 la %r11,STACK_FRAME_OVERHEAD(%r15)
1259 stmg %r0,%r7,__PT_R0(%r11)
1260 stmg %r8,%r9,__PT_PSW(%r11)
1261 mvc __PT_R8(64,%r11),0(%r14)
1262 stg %r10,__PT_ORIG_GPR2(%r11) # store last break to orig_gpr2
1263 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
1264 lgr %r2,%r11 # pass pointer to pt_regs
1265 jg kernel_stack_overflow
1266 ENDPROC(stack_overflow)
1269 #if IS_ENABLED(CONFIG_KVM)
1271 cghi %r11,__LC_SAVE_AREA_ASYNC #Is this in normal interrupt?
1273 larl %r13,.Lsie_entry
1275 larl %r13,.Lsie_skip
1278 oi __LC_CPU_FLAGS+7, _CIF_MCCK_GUEST
1279 1: BPENTER __SF_SIE_FLAGS(%r15),(_TIF_ISOLATE_BP|_TIF_ISOLATE_BP_GUEST)
1280 lg %r9,__SF_SIE_CONTROL(%r15) # get control block pointer
1281 ni __SIE_PROG0C+3(%r9),0xfe # no longer in SIE
1282 lctlg %c1,%c1,__LC_KERNEL_ASCE
1283 larl %r9,sie_exit # skip forward to sie_exit
1287 .section .rodata, "a"
1288 #define SYSCALL(esame,emu) .quad __s390x_ ## esame
1289 .globl sys_call_table
1291 #include "asm/syscall_table.h"
1294 #ifdef CONFIG_COMPAT
1296 #define SYSCALL(esame,emu) .quad __s390_ ## emu
1297 .globl sys_call_table_emu
1299 #include "asm/syscall_table.h"