arch/s390/include/asm/lowcore.h

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 /*
   3  *    Copyright IBM Corp. 1999, 2012
   4  *    Author(s): Hartmut Penner <hp@de.ibm.com>,
   5  *               Martin Schwidefsky <schwidefsky@de.ibm.com>,
   6  *               Denis Joseph Barrow,
   7  */
   8
   9 #ifndef _ASM_S390_LOWCORE_H
  10 #define _ASM_S390_LOWCORE_H
  11
  12 #include <linux/types.h>
  13 #include <asm/ptrace.h>
  14 #include <asm/cpu.h>
  15 #include <asm/types.h>
  16
  17 #define LC_ORDER 1
  18 #define LC_PAGES 2
  19
  20 struct lowcore {
  21         __u8    pad_0x0000[0x0014-0x0000];      /* 0x0000 */
  22         __u32   ipl_parmblock_ptr;              /* 0x0014 */
  23         __u8    pad_0x0018[0x0080-0x0018];      /* 0x0018 */
  24         __u32   ext_params;                     /* 0x0080 */
  25         __u16   ext_cpu_addr;                   /* 0x0084 */
  26         __u16   ext_int_code;                   /* 0x0086 */
  27         __u16   svc_ilc;                        /* 0x0088 */
  28         __u16   svc_code;                       /* 0x008a */
  29         __u16   pgm_ilc;                        /* 0x008c */
  30         __u16   pgm_code;                       /* 0x008e */
  31         __u32   data_exc_code;                  /* 0x0090 */
  32         __u16   mon_class_num;                  /* 0x0094 */
  33         __u8    per_code;                       /* 0x0096 */
  34         __u8    per_atmid;                      /* 0x0097 */
  35         __u64   per_address;                    /* 0x0098 */
  36         __u8    exc_access_id;                  /* 0x00a0 */
  37         __u8    per_access_id;                  /* 0x00a1 */
  38         __u8    op_access_id;                   /* 0x00a2 */
  39         __u8    ar_mode_id;                     /* 0x00a3 */
  40         __u8    pad_0x00a4[0x00a8-0x00a4];      /* 0x00a4 */
  41         __u64   trans_exc_code;                 /* 0x00a8 */
  42         __u64   monitor_code;                   /* 0x00b0 */
  43         __u16   subchannel_id;                  /* 0x00b8 */
  44         __u16   subchannel_nr;                  /* 0x00ba */
  45         __u32   io_int_parm;                    /* 0x00bc */
  46         __u32   io_int_word;                    /* 0x00c0 */
  47         __u8    pad_0x00c4[0x00c8-0x00c4];      /* 0x00c4 */
  48         __u32   stfl_fac_list;                  /* 0x00c8 */
  49         __u8    pad_0x00cc[0x00e8-0x00cc];      /* 0x00cc */
  50         __u64   mcck_interruption_code;         /* 0x00e8 */
  51         __u8    pad_0x00f0[0x00f4-0x00f0];      /* 0x00f0 */
  52         __u32   external_damage_code;           /* 0x00f4 */
  53         __u64   failing_storage_address;        /* 0x00f8 */
  54         __u8    pad_0x0100[0x0110-0x0100];      /* 0x0100 */
  55         __u64   breaking_event_addr;            /* 0x0110 */
  56         __u8    pad_0x0118[0x0120-0x0118];      /* 0x0118 */
  57         psw_t   restart_old_psw;                /* 0x0120 */
  58         psw_t   external_old_psw;               /* 0x0130 */
  59         psw_t   svc_old_psw;                    /* 0x0140 */
  60         psw_t   program_old_psw;                /* 0x0150 */
  61         psw_t   mcck_old_psw;                   /* 0x0160 */
  62         psw_t   io_old_psw;                     /* 0x0170 */
  63         __u8    pad_0x0180[0x01a0-0x0180];      /* 0x0180 */
  64         psw_t   restart_psw;                    /* 0x01a0 */
  65         psw_t   external_new_psw;               /* 0x01b0 */
  66         psw_t   svc_new_psw;                    /* 0x01c0 */
  67         psw_t   program_new_psw;                /* 0x01d0 */
  68         psw_t   mcck_new_psw;                   /* 0x01e0 */
  69         psw_t   io_new_psw;                     /* 0x01f0 */
  70
  71         /* Save areas. */
  72         __u64   save_area_sync[8];              /* 0x0200 */
  73         __u64   save_area_async[8];             /* 0x0240 */
  74         __u64   save_area_restart[1];           /* 0x0280 */
  75
  76         /* CPU flags. */
  77         __u64   cpu_flags;                      /* 0x0288 */
  78
  79         /* Return psws. */
  80         psw_t   return_psw;                     /* 0x0290 */
  81         psw_t   return_mcck_psw;                /* 0x02a0 */
  82
  83         /* CPU accounting and timing values. */
  84         __u64   sys_enter_timer;                /* 0x02b0 */
  85         __u8    pad_0x02b8[0x02c0-0x02b8];      /* 0x02b8 */
  86         __u64   mcck_enter_timer;               /* 0x02c0 */
  87         __u64   exit_timer;                     /* 0x02c8 */
  88         __u64   user_timer;                     /* 0x02d0 */
  89         __u64   guest_timer;                    /* 0x02d8 */
  90         __u64   system_timer;                   /* 0x02e0 */
  91         __u64   hardirq_timer;                  /* 0x02e8 */
  92         __u64   softirq_timer;                  /* 0x02f0 */
  93         __u64   steal_timer;                    /* 0x02f8 */
  94         __u64   avg_steal_timer;                /* 0x0300 */
  95         __u64   last_update_timer;              /* 0x0308 */
  96         __u64   last_update_clock;              /* 0x0310 */
  97         __u64   int_clock;                      /* 0x0318*/
  98         __u64   mcck_clock;                     /* 0x0320 */
  99         __u64   clock_comparator;               /* 0x0328 */
 100         __u64   boot_clock[2];                  /* 0x0330 */
 101
 102         /* Current process. */
 103         __u64   current_task;                   /* 0x0340 */
 104         __u64   kernel_stack;                   /* 0x0348 */
 105
 106         /* Interrupt, DAT-off and restartstack. */
 107         __u64   async_stack;                    /* 0x0350 */
 108         __u64   nodat_stack;                    /* 0x0358 */
 109         __u64   restart_stack;                  /* 0x0360 */
 110
 111         /* Restart function and parameter. */
 112         __u64   restart_fn;                     /* 0x0368 */
 113         __u64   restart_data;                   /* 0x0370 */
 114         __u64   restart_source;                 /* 0x0378 */
 115
 116         /* Address space pointer. */
 117         __u64   kernel_asce;                    /* 0x0380 */
 118         __u64   user_asce;                      /* 0x0388 */
 119         __u8    pad_0x0390[0x0398-0x0390];      /* 0x0390 */
 120
 121         /*
 122          * The lpp and current_pid fields form a
 123          * 64-bit value that is set as program
 124          * parameter with the LPP instruction.
 125          */
 126         __u32   lpp;                            /* 0x0398 */
 127         __u32   current_pid;                    /* 0x039c */
 128
 129         /* SMP info area */
 130         __u32   cpu_nr;                         /* 0x03a0 */
 131         __u32   softirq_pending;                /* 0x03a4 */
 132         __s32   preempt_count;                  /* 0x03a8 */
 133         __u32   spinlock_lockval;               /* 0x03ac */
 134         __u32   spinlock_index;                 /* 0x03b0 */
 135         __u32   fpu_flags;                      /* 0x03b4 */
 136         __u64   percpu_offset;                  /* 0x03b8 */
 137         __u8    pad_0x03c0[0x03c8-0x03c0];      /* 0x03c0 */
 138         __u64   machine_flags;                  /* 0x03c8 */
 139         __u64   gmap;                           /* 0x03d0 */
 140         __u8    pad_0x03d8[0x0400-0x03d8];      /* 0x03d8 */
 141
 142         /* br %r1 trampoline */
 143         __u16   br_r1_trampoline;               /* 0x0400 */
 144         __u32   return_lpswe;                   /* 0x0402 */
 145         __u32   return_mcck_lpswe;              /* 0x0406 */
 146         __u8    pad_0x040a[0x0e00-0x040a];      /* 0x040a */
 147
 148         /*
 149          * 0xe00 contains the address of the IPL Parameter Information
 150          * block. Dump tools need IPIB for IPL after dump.
 151          * Note: do not change the position of any fields in 0x0e00-0x0f00
 152          */
 153         __u64   ipib;                           /* 0x0e00 */
 154         __u32   ipib_checksum;                  /* 0x0e08 */
 155         __u64   vmcore_info;                    /* 0x0e0c */
 156         __u8    pad_0x0e14[0x0e18-0x0e14];      /* 0x0e14 */
 157         __u64   os_info;                        /* 0x0e18 */
 158         __u8    pad_0x0e20[0x0f00-0x0e20];      /* 0x0e20 */
 159
 160         /* Extended facility list */
 161         __u64   stfle_fac_list[16];             /* 0x0f00 */
 162         __u64   alt_stfle_fac_list[16];         /* 0x0f80 */
 163         __u8    pad_0x1000[0x11b0-0x1000];      /* 0x1000 */
 164
 165         /* Pointer to the machine check extended save area */
 166         __u64   mcesad;                         /* 0x11b0 */
 167
 168         /* 64 bit extparam used for pfault/diag 250: defined by architecture */
 169         __u64   ext_params2;                    /* 0x11B8 */
 170         __u8    pad_0x11c0[0x1200-0x11C0];      /* 0x11C0 */
 171
 172         /* CPU register save area: defined by architecture */
 173         __u64   floating_pt_save_area[16];      /* 0x1200 */
 174         __u64   gpregs_save_area[16];           /* 0x1280 */
 175         psw_t   psw_save_area;                  /* 0x1300 */
 176         __u8    pad_0x1310[0x1318-0x1310];      /* 0x1310 */
 177         __u32   prefixreg_save_area;            /* 0x1318 */
 178         __u32   fpt_creg_save_area;             /* 0x131c */
 179         __u8    pad_0x1320[0x1324-0x1320];      /* 0x1320 */
 180         __u32   tod_progreg_save_area;          /* 0x1324 */
 181         __u32   cpu_timer_save_area[2];         /* 0x1328 */
 182         __u32   clock_comp_save_area[2];        /* 0x1330 */
 183         __u8    pad_0x1338[0x1340-0x1338];      /* 0x1338 */
 184         __u32   access_regs_save_area[16];      /* 0x1340 */
 185         __u64   cregs_save_area[16];            /* 0x1380 */
 186         __u8    pad_0x1400[0x1800-0x1400];      /* 0x1400 */
 187
 188         /* Transaction abort diagnostic block */
 189         __u8    pgm_tdb[256];                   /* 0x1800 */
 190         __u8    pad_0x1900[0x2000-0x1900];      /* 0x1900 */
 191 } __packed __aligned(8192);
 192
 193 #define S390_lowcore (*((struct lowcore *) 0))
 194
 195 extern struct lowcore *lowcore_ptr[];
 196
 197 static inline void set_prefix(__u32 address)
 198 {
 199         asm volatile("spx %0" : : "Q" (address) : "memory");
 200 }
 201
 202 static inline __u32 store_prefix(void)
 203 {
 204         __u32 address;
 205
 206         asm volatile("stpx %0" : "=Q" (address));
 207         return address;
 208 }
 209
 210 #endif /* _ASM_S390_LOWCORE_H */