1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
2 /* Copyright (c) 2020 Microchip Technology Inc */
6 #include "microchip-mpfs.dtsi"
8 /* Clock frequency (in Hz) of the rtcclk */
9 #define RTCCLK_FREQ 1000000
14 model = "Microchip PolarFire-SoC Icicle Kit";
15 compatible = "microchip,mpfs-icicle-kit";
22 stdout-path = &serial0;
26 timebase-frequency = <RTCCLK_FREQ>;
30 device_type = "memory";
31 reg = <0x0 0x80000000 0x0 0x40000000>;
32 clocks = <&clkcfg 26>;
62 phy0: ethernet-phy@8 {
64 ti,fifo-depth = <0x01>;
72 phy1: ethernet-phy@9 {
74 ti,fifo-depth = <0x01>;