arch/powerpc/platforms/pseries/setup.c

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2 /*
   3  *  64-bit pSeries and RS/6000 setup code.
   4  *
   5  *  Copyright (C) 1995  Linus Torvalds
   6  *  Adapted from 'alpha' version by Gary Thomas
   7  *  Modified by Cort Dougan (cort@cs.nmt.edu)
   8  *  Modified by PPC64 Team, IBM Corp
   9  */
  10
  11 /*
  12  * bootup setup stuff..
  13  */
  14
  15 #include <linux/cpu.h>
  16 #include <linux/errno.h>
  17 #include <linux/sched.h>
  18 #include <linux/kernel.h>
  19 #include <linux/mm.h>
  20 #include <linux/stddef.h>
  21 #include <linux/unistd.h>
  22 #include <linux/user.h>
  23 #include <linux/tty.h>
  24 #include <linux/major.h>
  25 #include <linux/interrupt.h>
  26 #include <linux/reboot.h>
  27 #include <linux/init.h>
  28 #include <linux/ioport.h>
  29 #include <linux/console.h>
  30 #include <linux/pci.h>
  31 #include <linux/utsname.h>
  32 #include <linux/adb.h>
  33 #include <linux/export.h>
  34 #include <linux/delay.h>
  35 #include <linux/irq.h>
  36 #include <linux/seq_file.h>
  37 #include <linux/root_dev.h>
  38 #include <linux/of.h>
  39 #include <linux/of_pci.h>
  40 #include <linux/memblock.h>
  41 #include <linux/swiotlb.h>
  42
  43 #include <asm/mmu.h>
  44 #include <asm/processor.h>
  45 #include <asm/io.h>
  46 #include <asm/prom.h>
  47 #include <asm/rtas.h>
  48 #include <asm/pci-bridge.h>
  49 #include <asm/iommu.h>
  50 #include <asm/dma.h>
  51 #include <asm/machdep.h>
  52 #include <asm/irq.h>
  53 #include <asm/time.h>
  54 #include <asm/nvram.h>
  55 #include <asm/pmc.h>
  56 #include <asm/xics.h>
  57 #include <asm/xive.h>
  58 #include <asm/ppc-pci.h>
  59 #include <asm/i8259.h>
  60 #include <asm/udbg.h>
  61 #include <asm/smp.h>
  62 #include <asm/firmware.h>
  63 #include <asm/eeh.h>
  64 #include <asm/reg.h>
  65 #include <asm/plpar_wrappers.h>
  66 #include <asm/kexec.h>
  67 #include <asm/isa-bridge.h>
  68 #include <asm/security_features.h>
  69 #include <asm/asm-const.h>
  70 #include <asm/idle.h>
  71 #include <asm/swiotlb.h>
  72 #include <asm/svm.h>
  73
  74 #include "pseries.h"
  75 #include "../../../../drivers/pci/pci.h"
  76
  77 DEFINE_STATIC_KEY_FALSE(shared_processor);
  78 EXPORT_SYMBOL_GPL(shared_processor);
  79
  80 int CMO_PrPSP = -1;
  81 int CMO_SecPSP = -1;
  82 unsigned long CMO_PageSize = (ASM_CONST(1) << IOMMU_PAGE_SHIFT_4K);
  83 EXPORT_SYMBOL(CMO_PageSize);
  84
  85 int fwnmi_active;  /* TRUE if an FWNMI handler is present */
  86 int ibm_nmi_interlock_token;
  87
  88 static void pSeries_show_cpuinfo(struct seq_file *m)
  89 {
  90         struct device_node *root;
  91         const char *model = "";
  92
  93         root = of_find_node_by_path("/");
  94         if (root)
  95                 model = of_get_property(root, "model", NULL);
  96         seq_printf(m, "machine\t\t: CHRP %s\n", model);
  97         of_node_put(root);
  98         if (radix_enabled())
  99                 seq_printf(m, "MMU\t\t: Radix\n");
 100         else
 101                 seq_printf(m, "MMU\t\t: Hash\n");
 102 }
 103
 104 /* Initialize firmware assisted non-maskable interrupts if
 105  * the firmware supports this feature.
 106  */
 107 static void __init fwnmi_init(void)
 108 {
 109         unsigned long system_reset_addr, machine_check_addr;
 110         u8 *mce_data_buf;
 111         unsigned int i;
 112         int nr_cpus = num_possible_cpus();
 113 #ifdef CONFIG_PPC_BOOK3S_64
 114         struct slb_entry *slb_ptr;
 115         size_t size;
 116 #endif
 117         int ibm_nmi_register_token;
 118
 119         ibm_nmi_register_token = rtas_token("ibm,nmi-register");
 120         if (ibm_nmi_register_token == RTAS_UNKNOWN_SERVICE)
 121                 return;
 122
 123         ibm_nmi_interlock_token = rtas_token("ibm,nmi-interlock");
 124         if (WARN_ON(ibm_nmi_interlock_token == RTAS_UNKNOWN_SERVICE))
 125                 return;
 126
 127         /* If the kernel's not linked at zero we point the firmware at low
 128          * addresses anyway, and use a trampoline to get to the real code. */
 129         system_reset_addr  = __pa(system_reset_fwnmi) - PHYSICAL_START;
 130         machine_check_addr = __pa(machine_check_fwnmi) - PHYSICAL_START;
 131
 132         if (0 == rtas_call(ibm_nmi_register_token, 2, 1, NULL,
 133                            system_reset_addr, machine_check_addr))
 134                 fwnmi_active = 1;
 135
 136         /*
 137          * Allocate a chunk for per cpu buffer to hold rtas errorlog.
 138          * It will be used in real mode mce handler, hence it needs to be
 139          * below RMA.
 140          */
 141         mce_data_buf = memblock_alloc_try_nid_raw(RTAS_ERROR_LOG_MAX * nr_cpus,
 142                                         RTAS_ERROR_LOG_MAX, MEMBLOCK_LOW_LIMIT,
 143                                         ppc64_rma_size, NUMA_NO_NODE);
 144         if (!mce_data_buf)
 145                 panic("Failed to allocate %d bytes below %pa for MCE buffer\n",
 146                       RTAS_ERROR_LOG_MAX * nr_cpus, &ppc64_rma_size);
 147
 148         for_each_possible_cpu(i) {
 149                 paca_ptrs[i]->mce_data_buf = mce_data_buf +
 150                                                 (RTAS_ERROR_LOG_MAX * i);
 151         }
 152
 153 #ifdef CONFIG_PPC_BOOK3S_64
 154         if (!radix_enabled()) {
 155                 /* Allocate per cpu area to save old slb contents during MCE */
 156                 size = sizeof(struct slb_entry) * mmu_slb_size * nr_cpus;
 157                 slb_ptr = memblock_alloc_try_nid_raw(size,
 158                                 sizeof(struct slb_entry), MEMBLOCK_LOW_LIMIT,
 159                                 ppc64_rma_size, NUMA_NO_NODE);
 160                 if (!slb_ptr)
 161                         panic("Failed to allocate %zu bytes below %pa for slb area\n",
 162                               size, &ppc64_rma_size);
 163
 164                 for_each_possible_cpu(i)
 165                         paca_ptrs[i]->mce_faulty_slbs = slb_ptr + (mmu_slb_size * i);
 166         }
 167 #endif
 168 }
 169
 170 static void pseries_8259_cascade(struct irq_desc *desc)
 171 {
 172         struct irq_chip *chip = irq_desc_get_chip(desc);
 173         unsigned int cascade_irq = i8259_irq();
 174
 175         if (cascade_irq)
 176                 generic_handle_irq(cascade_irq);
 177
 178         chip->irq_eoi(&desc->irq_data);
 179 }
 180
 181 static void __init pseries_setup_i8259_cascade(void)
 182 {
 183         struct device_node *np, *old, *found = NULL;
 184         unsigned int cascade;
 185         const u32 *addrp;
 186         unsigned long intack = 0;
 187         int naddr;
 188
 189         for_each_node_by_type(np, "interrupt-controller") {
 190                 if (of_device_is_compatible(np, "chrp,iic")) {
 191                         found = np;
 192                         break;
 193                 }
 194         }
 195
 196         if (found == NULL) {
 197                 printk(KERN_DEBUG "pic: no ISA interrupt controller\n");
 198                 return;
 199         }
 200
 201         cascade = irq_of_parse_and_map(found, 0);
 202         if (!cascade) {
 203                 printk(KERN_ERR "pic: failed to map cascade interrupt");
 204                 return;
 205         }
 206         pr_debug("pic: cascade mapped to irq %d\n", cascade);
 207
 208         for (old = of_node_get(found); old != NULL ; old = np) {
 209                 np = of_get_parent(old);
 210                 of_node_put(old);
 211                 if (np == NULL)
 212                         break;
 213                 if (!of_node_name_eq(np, "pci"))
 214                         continue;
 215                 addrp = of_get_property(np, "8259-interrupt-acknowledge", NULL);
 216                 if (addrp == NULL)
 217                         continue;
 218                 naddr = of_n_addr_cells(np);
 219                 intack = addrp[naddr-1];
 220                 if (naddr > 1)
 221                         intack |= ((unsigned long)addrp[naddr-2]) << 32;
 222         }
 223         if (intack)
 224                 printk(KERN_DEBUG "pic: PCI 8259 intack at 0x%016lx\n", intack);
 225         i8259_init(found, intack);
 226         of_node_put(found);
 227         irq_set_chained_handler(cascade, pseries_8259_cascade);
 228 }
 229
 230 static void __init pseries_init_irq(void)
 231 {
 232         /* Try using a XIVE if available, otherwise use a XICS */
 233         if (!xive_spapr_init()) {
 234                 xics_init();
 235                 pseries_setup_i8259_cascade();
 236         }
 237 }
 238
 239 static void pseries_lpar_enable_pmcs(void)
 240 {
 241         unsigned long set, reset;
 242
 243         set = 1UL << 63;
 244         reset = 0;
 245         plpar_hcall_norets(H_PERFMON, set, reset);
 246 }
 247
 248 static int pci_dn_reconfig_notifier(struct notifier_block *nb, unsigned long action, void *data)
 249 {
 250         struct of_reconfig_data *rd = data;
 251         struct device_node *parent, *np = rd->dn;
 252         struct pci_dn *pdn;
 253         int err = NOTIFY_OK;
 254
 255         switch (action) {
 256         case OF_RECONFIG_ATTACH_NODE:
 257                 parent = of_get_parent(np);
 258                 pdn = parent ? PCI_DN(parent) : NULL;
 259                 if (pdn)
 260                         pci_add_device_node_info(pdn->phb, np);
 261
 262                 of_node_put(parent);
 263                 break;
 264         case OF_RECONFIG_DETACH_NODE:
 265                 pdn = PCI_DN(np);
 266                 if (pdn)
 267                         list_del(&pdn->list);
 268                 break;
 269         default:
 270                 err = NOTIFY_DONE;
 271                 break;
 272         }
 273         return err;
 274 }
 275
 276 static struct notifier_block pci_dn_reconfig_nb = {
 277         .notifier_call = pci_dn_reconfig_notifier,
 278 };
 279
 280 struct kmem_cache *dtl_cache;
 281
 282 #ifdef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE
 283 /*
 284  * Allocate space for the dispatch trace log for all possible cpus
 285  * and register the buffers with the hypervisor.  This is used for
 286  * computing time stolen by the hypervisor.
 287  */
 288 static int alloc_dispatch_logs(void)
 289 {
 290         if (!firmware_has_feature(FW_FEATURE_SPLPAR))
 291                 return 0;
 292
 293         if (!dtl_cache)
 294                 return 0;
 295
 296         alloc_dtl_buffers(0);
 297
 298         /* Register the DTL for the current (boot) cpu */
 299         register_dtl_buffer(smp_processor_id());
 300
 301         return 0;
 302 }
 303 #else /* !CONFIG_VIRT_CPU_ACCOUNTING_NATIVE */
 304 static inline int alloc_dispatch_logs(void)
 305 {
 306         return 0;
 307 }
 308 #endif /* CONFIG_VIRT_CPU_ACCOUNTING_NATIVE */
 309
 310 static int alloc_dispatch_log_kmem_cache(void)
 311 {
 312         void (*ctor)(void *) = get_dtl_cache_ctor();
 313
 314         dtl_cache = kmem_cache_create("dtl", DISPATCH_LOG_BYTES,
 315                                                 DISPATCH_LOG_BYTES, 0, ctor);
 316         if (!dtl_cache) {
 317                 pr_warn("Failed to create dispatch trace log buffer cache\n");
 318                 pr_warn("Stolen time statistics will be unreliable\n");
 319                 return 0;
 320         }
 321
 322         return alloc_dispatch_logs();
 323 }
 324 machine_early_initcall(pseries, alloc_dispatch_log_kmem_cache);
 325
 326 DEFINE_PER_CPU(u64, idle_spurr_cycles);
 327 DEFINE_PER_CPU(u64, idle_entry_purr_snap);
 328 DEFINE_PER_CPU(u64, idle_entry_spurr_snap);
 329 static void pseries_lpar_idle(void)
 330 {
 331         /*
 332          * Default handler to go into low thread priority and possibly
 333          * low power mode by ceding processor to hypervisor
 334          */
 335
 336         if (!prep_irq_for_idle())
 337                 return;
 338
 339         /* Indicate to hypervisor that we are idle. */
 340         pseries_idle_prolog();
 341
 342         /*
 343          * Yield the processor to the hypervisor.  We return if
 344          * an external interrupt occurs (which are driven prior
 345          * to returning here) or if a prod occurs from another
 346          * processor. When returning here, external interrupts
 347          * are enabled.
 348          */
 349         cede_processor();
 350
 351         pseries_idle_epilog();
 352 }
 353
 354 /*
 355  * Enable relocation on during exceptions. This has partition wide scope and
 356  * may take a while to complete, if it takes longer than one second we will
 357  * just give up rather than wasting any more time on this - if that turns out
 358  * to ever be a problem in practice we can move this into a kernel thread to
 359  * finish off the process later in boot.
 360  */
 361 void pseries_enable_reloc_on_exc(void)
 362 {
 363         long rc;
 364         unsigned int delay, total_delay = 0;
 365
 366         while (1) {
 367                 rc = enable_reloc_on_exceptions();
 368                 if (!H_IS_LONG_BUSY(rc)) {
 369                         if (rc == H_P2) {
 370                                 pr_info("Relocation on exceptions not"
 371                                         " supported\n");
 372                         } else if (rc != H_SUCCESS) {
 373                                 pr_warn("Unable to enable relocation"
 374                                         " on exceptions: %ld\n", rc);
 375                         }
 376                         break;
 377                 }
 378
 379                 delay = get_longbusy_msecs(rc);
 380                 total_delay += delay;
 381                 if (total_delay > 1000) {
 382                         pr_warn("Warning: Giving up waiting to enable "
 383                                 "relocation on exceptions (%u msec)!\n",
 384                                 total_delay);
 385                         return;
 386                 }
 387
 388                 mdelay(delay);
 389         }
 390 }
 391 EXPORT_SYMBOL(pseries_enable_reloc_on_exc);
 392
 393 void pseries_disable_reloc_on_exc(void)
 394 {
 395         long rc;
 396
 397         while (1) {
 398                 rc = disable_reloc_on_exceptions();
 399                 if (!H_IS_LONG_BUSY(rc))
 400                         break;
 401                 mdelay(get_longbusy_msecs(rc));
 402         }
 403         if (rc != H_SUCCESS)
 404                 pr_warn("Warning: Failed to disable relocation on exceptions: %ld\n",
 405                         rc);
 406 }
 407 EXPORT_SYMBOL(pseries_disable_reloc_on_exc);
 408
 409 #ifdef CONFIG_KEXEC_CORE
 410 static void pSeries_machine_kexec(struct kimage *image)
 411 {
 412         if (firmware_has_feature(FW_FEATURE_SET_MODE))
 413                 pseries_disable_reloc_on_exc();
 414
 415         default_machine_kexec(image);
 416 }
 417 #endif
 418
 419 #ifdef __LITTLE_ENDIAN__
 420 void pseries_big_endian_exceptions(void)
 421 {
 422         long rc;
 423
 424         while (1) {
 425                 rc = enable_big_endian_exceptions();
 426                 if (!H_IS_LONG_BUSY(rc))
 427                         break;
 428                 mdelay(get_longbusy_msecs(rc));
 429         }
 430
 431         /*
 432          * At this point it is unlikely panic() will get anything
 433          * out to the user, since this is called very late in kexec
 434          * but at least this will stop us from continuing on further
 435          * and creating an even more difficult to debug situation.
 436          *
 437          * There is a known problem when kdump'ing, if cpus are offline
 438          * the above call will fail. Rather than panicking again, keep
 439          * going and hope the kdump kernel is also little endian, which
 440          * it usually is.
 441          */
 442         if (rc && !kdump_in_progress())
 443                 panic("Could not enable big endian exceptions");
 444 }
 445
 446 void pseries_little_endian_exceptions(void)
 447 {
 448         long rc;
 449
 450         while (1) {
 451                 rc = enable_little_endian_exceptions();
 452                 if (!H_IS_LONG_BUSY(rc))
 453                         break;
 454                 mdelay(get_longbusy_msecs(rc));
 455         }
 456         if (rc) {
 457                 ppc_md.progress("H_SET_MODE LE exception fail", 0);
 458                 panic("Could not enable little endian exceptions");
 459         }
 460 }
 461 #endif
 462
 463 static void __init find_and_init_phbs(void)
 464 {
 465         struct device_node *node;
 466         struct pci_controller *phb;
 467         struct device_node *root = of_find_node_by_path("/");
 468
 469         for_each_child_of_node(root, node) {
 470                 if (!of_node_is_type(node, "pci") &&
 471                     !of_node_is_type(node, "pciex"))
 472                         continue;
 473
 474                 phb = pcibios_alloc_controller(node);
 475                 if (!phb)
 476                         continue;
 477                 rtas_setup_phb(phb);
 478                 pci_process_bridge_OF_ranges(phb, node, 0);
 479                 isa_bridge_find_early(phb);
 480                 phb->controller_ops = pseries_pci_controller_ops;
 481         }
 482
 483         of_node_put(root);
 484
 485         /*
 486          * PCI_PROBE_ONLY and PCI_REASSIGN_ALL_BUS can be set via properties
 487          * in chosen.
 488          */
 489         of_pci_check_probe_only();
 490 }
 491
 492 static void init_cpu_char_feature_flags(struct h_cpu_char_result *result)
 493 {
 494         /*
 495          * The features below are disabled by default, so we instead look to see
 496          * if firmware has *enabled* them, and set them if so.
 497          */
 498         if (result->character & H_CPU_CHAR_SPEC_BAR_ORI31)
 499                 security_ftr_set(SEC_FTR_SPEC_BAR_ORI31);
 500
 501         if (result->character & H_CPU_CHAR_BCCTRL_SERIALISED)
 502                 security_ftr_set(SEC_FTR_BCCTRL_SERIALISED);
 503
 504         if (result->character & H_CPU_CHAR_L1D_FLUSH_ORI30)
 505                 security_ftr_set(SEC_FTR_L1D_FLUSH_ORI30);
 506
 507         if (result->character & H_CPU_CHAR_L1D_FLUSH_TRIG2)
 508                 security_ftr_set(SEC_FTR_L1D_FLUSH_TRIG2);
 509
 510         if (result->character & H_CPU_CHAR_L1D_THREAD_PRIV)
 511                 security_ftr_set(SEC_FTR_L1D_THREAD_PRIV);
 512
 513         if (result->character & H_CPU_CHAR_COUNT_CACHE_DISABLED)
 514                 security_ftr_set(SEC_FTR_COUNT_CACHE_DISABLED);
 515
 516         if (result->character & H_CPU_CHAR_BCCTR_FLUSH_ASSIST)
 517                 security_ftr_set(SEC_FTR_BCCTR_FLUSH_ASSIST);
 518
 519         if (result->behaviour & H_CPU_BEHAV_FLUSH_COUNT_CACHE)
 520                 security_ftr_set(SEC_FTR_FLUSH_COUNT_CACHE);
 521
 522         /*
 523          * The features below are enabled by default, so we instead look to see
 524          * if firmware has *disabled* them, and clear them if so.
 525          */
 526         if (!(result->behaviour & H_CPU_BEHAV_FAVOUR_SECURITY))
 527                 security_ftr_clear(SEC_FTR_FAVOUR_SECURITY);
 528
 529         if (!(result->behaviour & H_CPU_BEHAV_L1D_FLUSH_PR))
 530                 security_ftr_clear(SEC_FTR_L1D_FLUSH_PR);
 531
 532         if (!(result->behaviour & H_CPU_BEHAV_BNDS_CHK_SPEC_BAR))
 533                 security_ftr_clear(SEC_FTR_BNDS_CHK_SPEC_BAR);
 534 }
 535
 536 void pseries_setup_rfi_flush(void)
 537 {
 538         struct h_cpu_char_result result;
 539         enum l1d_flush_type types;
 540         bool enable;
 541         long rc;
 542
 543         /*
 544          * Set features to the defaults assumed by init_cpu_char_feature_flags()
 545          * so it can set/clear again any features that might have changed after
 546          * migration, and in case the hypercall fails and it is not even called.
 547          */
 548         powerpc_security_features = SEC_FTR_DEFAULT;
 549
 550         rc = plpar_get_cpu_characteristics(&result);
 551         if (rc == H_SUCCESS)
 552                 init_cpu_char_feature_flags(&result);
 553
 554         /*
 555          * We're the guest so this doesn't apply to us, clear it to simplify
 556          * handling of it elsewhere.
 557          */
 558         security_ftr_clear(SEC_FTR_L1D_FLUSH_HV);
 559
 560         types = L1D_FLUSH_FALLBACK;
 561
 562         if (security_ftr_enabled(SEC_FTR_L1D_FLUSH_TRIG2))
 563                 types |= L1D_FLUSH_MTTRIG;
 564
 565         if (security_ftr_enabled(SEC_FTR_L1D_FLUSH_ORI30))
 566                 types |= L1D_FLUSH_ORI;
 567
 568         enable = security_ftr_enabled(SEC_FTR_FAVOUR_SECURITY) && \
 569                  security_ftr_enabled(SEC_FTR_L1D_FLUSH_PR);
 570
 571         setup_rfi_flush(types, enable);
 572         setup_count_cache_flush();
 573 }
 574
 575 #ifdef CONFIG_PCI_IOV
 576 enum rtas_iov_fw_value_map {
 577         NUM_RES_PROPERTY  = 0, /* Number of Resources */
 578         LOW_INT           = 1, /* Lowest 32 bits of Address */
 579         START_OF_ENTRIES  = 2, /* Always start of entry */
 580         APERTURE_PROPERTY = 2, /* Start of entry+ to  Aperture Size */
 581         WDW_SIZE_PROPERTY = 4, /* Start of entry+ to Window Size */
 582         NEXT_ENTRY        = 7  /* Go to next entry on array */
 583 };
 584
 585 enum get_iov_fw_value_index {
 586         BAR_ADDRS     = 1,    /*  Get Bar Address */
 587         APERTURE_SIZE = 2,    /*  Get Aperture Size */
 588         WDW_SIZE      = 3     /*  Get Window Size */
 589 };
 590
 591 resource_size_t pseries_get_iov_fw_value(struct pci_dev *dev, int resno,
 592                                          enum get_iov_fw_value_index value)
 593 {
 594         const int *indexes;
 595         struct device_node *dn = pci_device_to_OF_node(dev);
 596         int i, num_res, ret = 0;
 597
 598         indexes = of_get_property(dn, "ibm,open-sriov-vf-bar-info", NULL);
 599         if (!indexes)
 600                 return  0;
 601
 602         /*
 603          * First element in the array is the number of Bars
 604          * returned.  Search through the list to find the matching
 605          * bar
 606          */
 607         num_res = of_read_number(&indexes[NUM_RES_PROPERTY], 1);
 608         if (resno >= num_res)
 609                 return 0; /* or an errror */
 610
 611         i = START_OF_ENTRIES + NEXT_ENTRY * resno;
 612         switch (value) {
 613         case BAR_ADDRS:
 614                 ret = of_read_number(&indexes[i], 2);
 615                 break;
 616         case APERTURE_SIZE:
 617                 ret = of_read_number(&indexes[i + APERTURE_PROPERTY], 2);
 618                 break;
 619         case WDW_SIZE:
 620                 ret = of_read_number(&indexes[i + WDW_SIZE_PROPERTY], 2);
 621                 break;
 622         }
 623
 624         return ret;
 625 }
 626
 627 void of_pci_set_vf_bar_size(struct pci_dev *dev, const int *indexes)
 628 {
 629         struct resource *res;
 630         resource_size_t base, size;
 631         int i, r, num_res;
 632
 633         num_res = of_read_number(&indexes[NUM_RES_PROPERTY], 1);
 634         num_res = min_t(int, num_res, PCI_SRIOV_NUM_BARS);
 635         for (i = START_OF_ENTRIES, r = 0; r < num_res && r < PCI_SRIOV_NUM_BARS;
 636              i += NEXT_ENTRY, r++) {
 637                 res = &dev->resource[r + PCI_IOV_RESOURCES];
 638                 base = of_read_number(&indexes[i], 2);
 639                 size = of_read_number(&indexes[i + APERTURE_PROPERTY], 2);
 640                 res->flags = pci_parse_of_flags(of_read_number
 641                                                 (&indexes[i + LOW_INT], 1), 0);
 642                 res->flags |= (IORESOURCE_MEM_64 | IORESOURCE_PCI_FIXED);
 643                 res->name = pci_name(dev);
 644                 res->start = base;
 645                 res->end = base + size - 1;
 646         }
 647 }
 648
 649 void of_pci_parse_iov_addrs(struct pci_dev *dev, const int *indexes)
 650 {
 651         struct resource *res, *root, *conflict;
 652         resource_size_t base, size;
 653         int i, r, num_res;
 654
 655         /*
 656          * First element in the array is the number of Bars
 657          * returned.  Search through the list to find the matching
 658          * bars assign them from firmware into resources structure.
 659          */
 660         num_res = of_read_number(&indexes[NUM_RES_PROPERTY], 1);
 661         for (i = START_OF_ENTRIES, r = 0; r < num_res && r < PCI_SRIOV_NUM_BARS;
 662              i += NEXT_ENTRY, r++) {
 663                 res = &dev->resource[r + PCI_IOV_RESOURCES];
 664                 base = of_read_number(&indexes[i], 2);
 665                 size = of_read_number(&indexes[i + WDW_SIZE_PROPERTY], 2);
 666                 res->name = pci_name(dev);
 667                 res->start = base;
 668                 res->end = base + size - 1;
 669                 root = &iomem_resource;
 670                 dev_dbg(&dev->dev,
 671                         "pSeries IOV BAR %d: trying firmware assignment %pR\n",
 672                          r + PCI_IOV_RESOURCES, res);
 673                 conflict = request_resource_conflict(root, res);
 674                 if (conflict) {
 675                         dev_info(&dev->dev,
 676                                  "BAR %d: %pR conflicts with %s %pR\n",
 677                                  r + PCI_IOV_RESOURCES, res,
 678                                  conflict->name, conflict);
 679                         res->flags |= IORESOURCE_UNSET;
 680                 }
 681         }
 682 }
 683
 684 static void pseries_disable_sriov_resources(struct pci_dev *pdev)
 685 {
 686         int i;
 687
 688         pci_warn(pdev, "No hypervisor support for SR-IOV on this device, IOV BARs disabled.\n");
 689         for (i = 0; i < PCI_SRIOV_NUM_BARS; i++)
 690                 pdev->resource[i + PCI_IOV_RESOURCES].flags = 0;
 691 }
 692
 693 static void pseries_pci_fixup_resources(struct pci_dev *pdev)
 694 {
 695         const int *indexes;
 696         struct device_node *dn = pci_device_to_OF_node(pdev);
 697
 698         /*Firmware must support open sriov otherwise dont configure*/
 699         indexes = of_get_property(dn, "ibm,open-sriov-vf-bar-info", NULL);
 700         if (indexes)
 701                 of_pci_set_vf_bar_size(pdev, indexes);
 702         else
 703                 pseries_disable_sriov_resources(pdev);
 704 }
 705
 706 static void pseries_pci_fixup_iov_resources(struct pci_dev *pdev)
 707 {
 708         const int *indexes;
 709         struct device_node *dn = pci_device_to_OF_node(pdev);
 710
 711         if (!pdev->is_physfn || pci_dev_is_added(pdev))
 712                 return;
 713         /*Firmware must support open sriov otherwise dont configure*/
 714         indexes = of_get_property(dn, "ibm,open-sriov-vf-bar-info", NULL);
 715         if (indexes)
 716                 of_pci_parse_iov_addrs(pdev, indexes);
 717         else
 718                 pseries_disable_sriov_resources(pdev);
 719 }
 720
 721 static resource_size_t pseries_pci_iov_resource_alignment(struct pci_dev *pdev,
 722                                                           int resno)
 723 {
 724         const __be32 *reg;
 725         struct device_node *dn = pci_device_to_OF_node(pdev);
 726
 727         /*Firmware must support open sriov otherwise report regular alignment*/
 728         reg = of_get_property(dn, "ibm,is-open-sriov-pf", NULL);
 729         if (!reg)
 730                 return pci_iov_resource_size(pdev, resno);
 731
 732         if (!pdev->is_physfn)
 733                 return 0;
 734         return pseries_get_iov_fw_value(pdev,
 735                                         resno - PCI_IOV_RESOURCES,
 736                                         APERTURE_SIZE);
 737 }
 738 #endif
 739
 740 static void __init pSeries_setup_arch(void)
 741 {
 742         set_arch_panic_timeout(10, ARCH_PANIC_TIMEOUT);
 743
 744         /* Discover PIC type and setup ppc_md accordingly */
 745         smp_init_pseries();
 746
 747
 748         /* openpic global configuration register (64-bit format). */
 749         /* openpic Interrupt Source Unit pointer (64-bit format). */
 750         /* python0 facility area (mmio) (64-bit format) REAL address. */
 751
 752         /* init to some ~sane value until calibrate_delay() runs */
 753         loops_per_jiffy = 50000000;
 754
 755         fwnmi_init();
 756
 757         pseries_setup_rfi_flush();
 758         setup_stf_barrier();
 759         pseries_lpar_read_hblkrm_characteristics();
 760
 761         /* By default, only probe PCI (can be overridden by rtas_pci) */
 762         pci_add_flags(PCI_PROBE_ONLY);
 763
 764         /* Find and initialize PCI host bridges */
 765         init_pci_config_tokens();
 766         find_and_init_phbs();
 767         of_reconfig_notifier_register(&pci_dn_reconfig_nb);
 768
 769         pSeries_nvram_init();
 770
 771         if (firmware_has_feature(FW_FEATURE_LPAR)) {
 772                 vpa_init(boot_cpuid);
 773
 774                 if (lppaca_shared_proc(get_lppaca()))
 775                         static_branch_enable(&shared_processor);
 776
 777                 ppc_md.power_save = pseries_lpar_idle;
 778                 ppc_md.enable_pmcs = pseries_lpar_enable_pmcs;
 779 #ifdef CONFIG_PCI_IOV
 780                 ppc_md.pcibios_fixup_resources =
 781                         pseries_pci_fixup_resources;
 782                 ppc_md.pcibios_fixup_sriov =
 783                         pseries_pci_fixup_iov_resources;
 784                 ppc_md.pcibios_iov_resource_alignment =
 785                         pseries_pci_iov_resource_alignment;
 786 #endif
 787         } else {
 788                 /* No special idle routine */
 789                 ppc_md.enable_pmcs = power4_enable_pmcs;
 790         }
 791
 792         ppc_md.pcibios_root_bridge_prepare = pseries_root_bridge_prepare;
 793
 794         if (swiotlb_force == SWIOTLB_FORCE)
 795                 ppc_swiotlb_enable = 1;
 796 }
 797
 798 static void pseries_panic(char *str)
 799 {
 800         panic_flush_kmsg_end();
 801         rtas_os_term(str);
 802 }
 803
 804 static int __init pSeries_init_panel(void)
 805 {
 806         /* Manually leave the kernel version on the panel. */
 807 #ifdef __BIG_ENDIAN__
 808         ppc_md.progress("Linux ppc64\n", 0);
 809 #else
 810         ppc_md.progress("Linux ppc64le\n", 0);
 811 #endif
 812         ppc_md.progress(init_utsname()->version, 0);
 813
 814         return 0;
 815 }
 816 machine_arch_initcall(pseries, pSeries_init_panel);
 817
 818 static int pseries_set_dabr(unsigned long dabr, unsigned long dabrx)
 819 {
 820         return plpar_hcall_norets(H_SET_DABR, dabr);
 821 }
 822
 823 static int pseries_set_xdabr(unsigned long dabr, unsigned long dabrx)
 824 {
 825         /* Have to set at least one bit in the DABRX according to PAPR */
 826         if (dabrx == 0 && dabr == 0)
 827                 dabrx = DABRX_USER;
 828         /* PAPR says we can only set kernel and user bits */
 829         dabrx &= DABRX_KERNEL | DABRX_USER;
 830
 831         return plpar_hcall_norets(H_SET_XDABR, dabr, dabrx);
 832 }
 833
 834 static int pseries_set_dawr(unsigned long dawr, unsigned long dawrx)
 835 {
 836         /* PAPR says we can't set HYP */
 837         dawrx &= ~DAWRX_HYP;
 838
 839         return  plpar_set_watchpoint0(dawr, dawrx);
 840 }
 841
 842 #define CMO_CHARACTERISTICS_TOKEN 44
 843 #define CMO_MAXLENGTH 1026
 844
 845 void pSeries_coalesce_init(void)
 846 {
 847         struct hvcall_mpp_x_data mpp_x_data;
 848
 849         if (firmware_has_feature(FW_FEATURE_CMO) && !h_get_mpp_x(&mpp_x_data))
 850                 powerpc_firmware_features |= FW_FEATURE_XCMO;
 851         else
 852                 powerpc_firmware_features &= ~FW_FEATURE_XCMO;
 853 }
 854
 855 /**
 856  * fw_cmo_feature_init - FW_FEATURE_CMO is not stored in ibm,hypertas-functions,
 857  * handle that here. (Stolen from parse_system_parameter_string)
 858  */
 859 static void pSeries_cmo_feature_init(void)
 860 {
 861         char *ptr, *key, *value, *end;
 862         int call_status;
 863         int page_order = IOMMU_PAGE_SHIFT_4K;
 864
 865         pr_debug(" -> fw_cmo_feature_init()\n");
 866         spin_lock(&rtas_data_buf_lock);
 867         memset(rtas_data_buf, 0, RTAS_DATA_BUF_SIZE);
 868         call_status = rtas_call(rtas_token("ibm,get-system-parameter"), 3, 1,
 869                                 NULL,
 870                                 CMO_CHARACTERISTICS_TOKEN,
 871                                 __pa(rtas_data_buf),
 872                                 RTAS_DATA_BUF_SIZE);
 873
 874         if (call_status != 0) {
 875                 spin_unlock(&rtas_data_buf_lock);
 876                 pr_debug("CMO not available\n");
 877                 pr_debug(" <- fw_cmo_feature_init()\n");
 878                 return;
 879         }
 880
 881         end = rtas_data_buf + CMO_MAXLENGTH - 2;
 882         ptr = rtas_data_buf + 2;        /* step over strlen value */
 883         key = value = ptr;
 884
 885         while (*ptr && (ptr <= end)) {
 886                 /* Separate the key and value by replacing '=' with '\0' and
 887                  * point the value at the string after the '='
 888                  */
 889                 if (ptr[0] == '=') {
 890                         ptr[0] = '\0';
 891                         value = ptr + 1;
 892                 } else if (ptr[0] == '\0' || ptr[0] == ',') {
 893                         /* Terminate the string containing the key/value pair */
 894                         ptr[0] = '\0';
 895
 896                         if (key == value) {
 897                                 pr_debug("Malformed key/value pair\n");
 898                                 /* Never found a '=', end processing */
 899                                 break;
 900                         }
 901
 902                         if (0 == strcmp(key, "CMOPageSize"))
 903                                 page_order = simple_strtol(value, NULL, 10);
 904                         else if (0 == strcmp(key, "PrPSP"))
 905                                 CMO_PrPSP = simple_strtol(value, NULL, 10);
 906                         else if (0 == strcmp(key, "SecPSP"))
 907                                 CMO_SecPSP = simple_strtol(value, NULL, 10);
 908                         value = key = ptr + 1;
 909                 }
 910                 ptr++;
 911         }
 912
 913         /* Page size is returned as the power of 2 of the page size,
 914          * convert to the page size in bytes before returning
 915          */
 916         CMO_PageSize = 1 << page_order;
 917         pr_debug("CMO_PageSize = %lu\n", CMO_PageSize);
 918
 919         if (CMO_PrPSP != -1 || CMO_SecPSP != -1) {
 920                 pr_info("CMO enabled\n");
 921                 pr_debug("CMO enabled, PrPSP=%d, SecPSP=%d\n", CMO_PrPSP,
 922                          CMO_SecPSP);
 923                 powerpc_firmware_features |= FW_FEATURE_CMO;
 924                 pSeries_coalesce_init();
 925         } else
 926                 pr_debug("CMO not enabled, PrPSP=%d, SecPSP=%d\n", CMO_PrPSP,
 927                          CMO_SecPSP);
 928         spin_unlock(&rtas_data_buf_lock);
 929         pr_debug(" <- fw_cmo_feature_init()\n");
 930 }
 931
 932 /*
 933  * Early initialization.  Relocation is on but do not reference unbolted pages
 934  */
 935 static void __init pseries_init(void)
 936 {
 937         pr_debug(" -> pseries_init()\n");
 938
 939 #ifdef CONFIG_HVC_CONSOLE
 940         if (firmware_has_feature(FW_FEATURE_LPAR))
 941                 hvc_vio_init_early();
 942 #endif
 943         if (firmware_has_feature(FW_FEATURE_XDABR))
 944                 ppc_md.set_dabr = pseries_set_xdabr;
 945         else if (firmware_has_feature(FW_FEATURE_DABR))
 946                 ppc_md.set_dabr = pseries_set_dabr;
 947
 948         if (firmware_has_feature(FW_FEATURE_SET_MODE))
 949                 ppc_md.set_dawr = pseries_set_dawr;
 950
 951         pSeries_cmo_feature_init();
 952         iommu_init_early_pSeries();
 953
 954         pr_debug(" <- pseries_init()\n");
 955 }
 956
 957 /**
 958  * pseries_power_off - tell firmware about how to power off the system.
 959  *
 960  * This function calls either the power-off rtas token in normal cases
 961  * or the ibm,power-off-ups token (if present & requested) in case of
 962  * a power failure. If power-off token is used, power on will only be
 963  * possible with power button press. If ibm,power-off-ups token is used
 964  * it will allow auto poweron after power is restored.
 965  */
 966 static void pseries_power_off(void)
 967 {
 968         int rc;
 969         int rtas_poweroff_ups_token = rtas_token("ibm,power-off-ups");
 970
 971         if (rtas_flash_term_hook)
 972                 rtas_flash_term_hook(SYS_POWER_OFF);
 973
 974         if (rtas_poweron_auto == 0 ||
 975                 rtas_poweroff_ups_token == RTAS_UNKNOWN_SERVICE) {
 976                 rc = rtas_call(rtas_token("power-off"), 2, 1, NULL, -1, -1);
 977                 printk(KERN_INFO "RTAS power-off returned %d\n", rc);
 978         } else {
 979                 rc = rtas_call(rtas_poweroff_ups_token, 0, 1, NULL);
 980                 printk(KERN_INFO "RTAS ibm,power-off-ups returned %d\n", rc);
 981         }
 982         for (;;);
 983 }
 984
 985 static int __init pSeries_probe(void)
 986 {
 987         if (!of_node_is_type(of_root, "chrp"))
 988                 return 0;
 989
 990         /* Cell blades firmware claims to be chrp while it's not. Until this
 991          * is fixed, we need to avoid those here.
 992          */
 993         if (of_machine_is_compatible("IBM,CPBW-1.0") ||
 994             of_machine_is_compatible("IBM,CBEA"))
 995                 return 0;
 996
 997         pm_power_off = pseries_power_off;
 998
 999         pr_debug("Machine is%s LPAR !\n",
1000                  (powerpc_firmware_features & FW_FEATURE_LPAR) ? "" : " not");
1001
1002         pseries_init();
1003
1004         return 1;
1005 }
1006
1007 static int pSeries_pci_probe_mode(struct pci_bus *bus)
1008 {
1009         if (firmware_has_feature(FW_FEATURE_LPAR))
1010                 return PCI_PROBE_DEVTREE;
1011         return PCI_PROBE_NORMAL;
1012 }
1013
1014 struct pci_controller_ops pseries_pci_controller_ops = {
1015         .probe_mode             = pSeries_pci_probe_mode,
1016 };
1017
1018 define_machine(pseries) {
1019         .name                   = "pSeries",
1020         .probe                  = pSeries_probe,
1021         .setup_arch             = pSeries_setup_arch,
1022         .init_IRQ               = pseries_init_irq,
1023         .show_cpuinfo           = pSeries_show_cpuinfo,
1024         .log_error              = pSeries_log_error,
1025         .pcibios_fixup          = pSeries_final_fixup,
1026         .restart                = rtas_restart,
1027         .halt                   = rtas_halt,
1028         .panic                  = pseries_panic,
1029         .get_boot_time          = rtas_get_boot_time,
1030         .get_rtc_time           = rtas_get_rtc_time,
1031         .set_rtc_time           = rtas_set_rtc_time,
1032         .calibrate_decr         = generic_calibrate_decr,
1033         .progress               = rtas_progress,
1034         .system_reset_exception = pSeries_system_reset_exception,
1035         .machine_check_early    = pseries_machine_check_realmode,
1036         .machine_check_exception = pSeries_machine_check_exception,
1037 #ifdef CONFIG_KEXEC_CORE
1038         .machine_kexec          = pSeries_machine_kexec,
1039         .kexec_cpu_down         = pseries_kexec_cpu_down,
1040 #endif
1041 #ifdef CONFIG_MEMORY_HOTPLUG_SPARSE
1042         .memory_block_size      = pseries_memory_block_size,
1043 #endif
1044 };