arch/powerpc/kvm/booke.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  *
   4  * Copyright IBM Corp. 2007
   5  * Copyright 2010-2011 Freescale Semiconductor, Inc.
   6  *
   7  * Authors: Hollis Blanchard <hollisb@us.ibm.com>
   8  *          Christian Ehrhardt <ehrhardt@linux.vnet.ibm.com>
   9  *          Scott Wood <scottwood@freescale.com>
  10  *          Varun Sethi <varun.sethi@freescale.com>
  11  */
  12
  13 #include <linux/errno.h>
  14 #include <linux/err.h>
  15 #include <linux/kvm_host.h>
  16 #include <linux/gfp.h>
  17 #include <linux/module.h>
  18 #include <linux/vmalloc.h>
  19 #include <linux/fs.h>
  20
  21 #include <asm/cputable.h>
  22 #include <linux/uaccess.h>
  23 #include <asm/kvm_ppc.h>
  24 #include <asm/cacheflush.h>
  25 #include <asm/dbell.h>
  26 #include <asm/hw_irq.h>
  27 #include <asm/irq.h>
  28 #include <asm/time.h>
  29
  30 #include "timing.h"
  31 #include "booke.h"
  32
  33 #define CREATE_TRACE_POINTS
  34 #include "trace_booke.h"
  35
  36 unsigned long kvmppc_booke_handlers;
  37
  38 struct kvm_stats_debugfs_item debugfs_entries[] = {
  39         VCPU_STAT("mmio", mmio_exits),
  40         VCPU_STAT("sig", signal_exits),
  41         VCPU_STAT("itlb_r", itlb_real_miss_exits),
  42         VCPU_STAT("itlb_v", itlb_virt_miss_exits),
  43         VCPU_STAT("dtlb_r", dtlb_real_miss_exits),
  44         VCPU_STAT("dtlb_v", dtlb_virt_miss_exits),
  45         VCPU_STAT("sysc", syscall_exits),
  46         VCPU_STAT("isi", isi_exits),
  47         VCPU_STAT("dsi", dsi_exits),
  48         VCPU_STAT("inst_emu", emulated_inst_exits),
  49         VCPU_STAT("dec", dec_exits),
  50         VCPU_STAT("ext_intr", ext_intr_exits),
  51         VCPU_STAT("halt_successful_poll", halt_successful_poll),
  52         VCPU_STAT("halt_attempted_poll", halt_attempted_poll),
  53         VCPU_STAT("halt_poll_invalid", halt_poll_invalid),
  54         VCPU_STAT("halt_wakeup", halt_wakeup),
  55         VCPU_STAT("doorbell", dbell_exits),
  56         VCPU_STAT("guest doorbell", gdbell_exits),
  57         VCPU_STAT("halt_poll_success_ns", halt_poll_success_ns),
  58         VCPU_STAT("halt_poll_fail_ns", halt_poll_fail_ns),
  59         VM_STAT("remote_tlb_flush", remote_tlb_flush),
  60         { NULL }
  61 };
  62
  63 /* TODO: use vcpu_printf() */
  64 void kvmppc_dump_vcpu(struct kvm_vcpu *vcpu)
  65 {
  66         int i;
  67
  68         printk("pc:   %08lx msr:  %08llx\n", vcpu->arch.regs.nip,
  69                         vcpu->arch.shared->msr);
  70         printk("lr:   %08lx ctr:  %08lx\n", vcpu->arch.regs.link,
  71                         vcpu->arch.regs.ctr);
  72         printk("srr0: %08llx srr1: %08llx\n", vcpu->arch.shared->srr0,
  73                                             vcpu->arch.shared->srr1);
  74
  75         printk("exceptions: %08lx\n", vcpu->arch.pending_exceptions);
  76
  77         for (i = 0; i < 32; i += 4) {
  78                 printk("gpr%02d: %08lx %08lx %08lx %08lx\n", i,
  79                        kvmppc_get_gpr(vcpu, i),
  80                        kvmppc_get_gpr(vcpu, i+1),
  81                        kvmppc_get_gpr(vcpu, i+2),
  82                        kvmppc_get_gpr(vcpu, i+3));
  83         }
  84 }
  85
  86 #ifdef CONFIG_SPE
  87 void kvmppc_vcpu_disable_spe(struct kvm_vcpu *vcpu)
  88 {
  89         preempt_disable();
  90         enable_kernel_spe();
  91         kvmppc_save_guest_spe(vcpu);
  92         disable_kernel_spe();
  93         vcpu->arch.shadow_msr &= ~MSR_SPE;
  94         preempt_enable();
  95 }
  96
  97 static void kvmppc_vcpu_enable_spe(struct kvm_vcpu *vcpu)
  98 {
  99         preempt_disable();
 100         enable_kernel_spe();
 101         kvmppc_load_guest_spe(vcpu);
 102         disable_kernel_spe();
 103         vcpu->arch.shadow_msr |= MSR_SPE;
 104         preempt_enable();
 105 }
 106
 107 static void kvmppc_vcpu_sync_spe(struct kvm_vcpu *vcpu)
 108 {
 109         if (vcpu->arch.shared->msr & MSR_SPE) {
 110                 if (!(vcpu->arch.shadow_msr & MSR_SPE))
 111                         kvmppc_vcpu_enable_spe(vcpu);
 112         } else if (vcpu->arch.shadow_msr & MSR_SPE) {
 113                 kvmppc_vcpu_disable_spe(vcpu);
 114         }
 115 }
 116 #else
 117 static void kvmppc_vcpu_sync_spe(struct kvm_vcpu *vcpu)
 118 {
 119 }
 120 #endif
 121
 122 /*
 123  * Load up guest vcpu FP state if it's needed.
 124  * It also set the MSR_FP in thread so that host know
 125  * we're holding FPU, and then host can help to save
 126  * guest vcpu FP state if other threads require to use FPU.
 127  * This simulates an FP unavailable fault.
 128  *
 129  * It requires to be called with preemption disabled.
 130  */
 131 static inline void kvmppc_load_guest_fp(struct kvm_vcpu *vcpu)
 132 {
 133 #ifdef CONFIG_PPC_FPU
 134         if (!(current->thread.regs->msr & MSR_FP)) {
 135                 enable_kernel_fp();
 136                 load_fp_state(&vcpu->arch.fp);
 137                 disable_kernel_fp();
 138                 current->thread.fp_save_area = &vcpu->arch.fp;
 139                 current->thread.regs->msr |= MSR_FP;
 140         }
 141 #endif
 142 }
 143
 144 /*
 145  * Save guest vcpu FP state into thread.
 146  * It requires to be called with preemption disabled.
 147  */
 148 static inline void kvmppc_save_guest_fp(struct kvm_vcpu *vcpu)
 149 {
 150 #ifdef CONFIG_PPC_FPU
 151         if (current->thread.regs->msr & MSR_FP)
 152                 giveup_fpu(current);
 153         current->thread.fp_save_area = NULL;
 154 #endif
 155 }
 156
 157 static void kvmppc_vcpu_sync_fpu(struct kvm_vcpu *vcpu)
 158 {
 159 #if defined(CONFIG_PPC_FPU) && !defined(CONFIG_KVM_BOOKE_HV)
 160         /* We always treat the FP bit as enabled from the host
 161            perspective, so only need to adjust the shadow MSR */
 162         vcpu->arch.shadow_msr &= ~MSR_FP;
 163         vcpu->arch.shadow_msr |= vcpu->arch.shared->msr & MSR_FP;
 164 #endif
 165 }
 166
 167 /*
 168  * Simulate AltiVec unavailable fault to load guest state
 169  * from thread to AltiVec unit.
 170  * It requires to be called with preemption disabled.
 171  */
 172 static inline void kvmppc_load_guest_altivec(struct kvm_vcpu *vcpu)
 173 {
 174 #ifdef CONFIG_ALTIVEC
 175         if (cpu_has_feature(CPU_FTR_ALTIVEC)) {
 176                 if (!(current->thread.regs->msr & MSR_VEC)) {
 177                         enable_kernel_altivec();
 178                         load_vr_state(&vcpu->arch.vr);
 179                         disable_kernel_altivec();
 180                         current->thread.vr_save_area = &vcpu->arch.vr;
 181                         current->thread.regs->msr |= MSR_VEC;
 182                 }
 183         }
 184 #endif
 185 }
 186
 187 /*
 188  * Save guest vcpu AltiVec state into thread.
 189  * It requires to be called with preemption disabled.
 190  */
 191 static inline void kvmppc_save_guest_altivec(struct kvm_vcpu *vcpu)
 192 {
 193 #ifdef CONFIG_ALTIVEC
 194         if (cpu_has_feature(CPU_FTR_ALTIVEC)) {
 195                 if (current->thread.regs->msr & MSR_VEC)
 196                         giveup_altivec(current);
 197                 current->thread.vr_save_area = NULL;
 198         }
 199 #endif
 200 }
 201
 202 static void kvmppc_vcpu_sync_debug(struct kvm_vcpu *vcpu)
 203 {
 204         /* Synchronize guest's desire to get debug interrupts into shadow MSR */
 205 #ifndef CONFIG_KVM_BOOKE_HV
 206         vcpu->arch.shadow_msr &= ~MSR_DE;
 207         vcpu->arch.shadow_msr |= vcpu->arch.shared->msr & MSR_DE;
 208 #endif
 209
 210         /* Force enable debug interrupts when user space wants to debug */
 211         if (vcpu->guest_debug) {
 212 #ifdef CONFIG_KVM_BOOKE_HV
 213                 /*
 214                  * Since there is no shadow MSR, sync MSR_DE into the guest
 215                  * visible MSR.
 216                  */
 217                 vcpu->arch.shared->msr |= MSR_DE;
 218 #else
 219                 vcpu->arch.shadow_msr |= MSR_DE;
 220                 vcpu->arch.shared->msr &= ~MSR_DE;
 221 #endif
 222         }
 223 }
 224
 225 /*
 226  * Helper function for "full" MSR writes.  No need to call this if only
 227  * EE/CE/ME/DE/RI are changing.
 228  */
 229 void kvmppc_set_msr(struct kvm_vcpu *vcpu, u32 new_msr)
 230 {
 231         u32 old_msr = vcpu->arch.shared->msr;
 232
 233 #ifdef CONFIG_KVM_BOOKE_HV
 234         new_msr |= MSR_GS;
 235 #endif
 236
 237         vcpu->arch.shared->msr = new_msr;
 238
 239         kvmppc_mmu_msr_notify(vcpu, old_msr);
 240         kvmppc_vcpu_sync_spe(vcpu);
 241         kvmppc_vcpu_sync_fpu(vcpu);
 242         kvmppc_vcpu_sync_debug(vcpu);
 243 }
 244
 245 static void kvmppc_booke_queue_irqprio(struct kvm_vcpu *vcpu,
 246                                        unsigned int priority)
 247 {
 248         trace_kvm_booke_queue_irqprio(vcpu, priority);
 249         set_bit(priority, &vcpu->arch.pending_exceptions);
 250 }
 251
 252 void kvmppc_core_queue_dtlb_miss(struct kvm_vcpu *vcpu,
 253                                  ulong dear_flags, ulong esr_flags)
 254 {
 255         vcpu->arch.queued_dear = dear_flags;
 256         vcpu->arch.queued_esr = esr_flags;
 257         kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DTLB_MISS);
 258 }
 259
 260 void kvmppc_core_queue_data_storage(struct kvm_vcpu *vcpu,
 261                                     ulong dear_flags, ulong esr_flags)
 262 {
 263         vcpu->arch.queued_dear = dear_flags;
 264         vcpu->arch.queued_esr = esr_flags;
 265         kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DATA_STORAGE);
 266 }
 267
 268 void kvmppc_core_queue_itlb_miss(struct kvm_vcpu *vcpu)
 269 {
 270         kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ITLB_MISS);
 271 }
 272
 273 void kvmppc_core_queue_inst_storage(struct kvm_vcpu *vcpu, ulong esr_flags)
 274 {
 275         vcpu->arch.queued_esr = esr_flags;
 276         kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_INST_STORAGE);
 277 }
 278
 279 static void kvmppc_core_queue_alignment(struct kvm_vcpu *vcpu, ulong dear_flags,
 280                                         ulong esr_flags)
 281 {
 282         vcpu->arch.queued_dear = dear_flags;
 283         vcpu->arch.queued_esr = esr_flags;
 284         kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ALIGNMENT);
 285 }
 286
 287 void kvmppc_core_queue_program(struct kvm_vcpu *vcpu, ulong esr_flags)
 288 {
 289         vcpu->arch.queued_esr = esr_flags;
 290         kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_PROGRAM);
 291 }
 292
 293 void kvmppc_core_queue_fpunavail(struct kvm_vcpu *vcpu)
 294 {
 295         kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_FP_UNAVAIL);
 296 }
 297
 298 #ifdef CONFIG_ALTIVEC
 299 void kvmppc_core_queue_vec_unavail(struct kvm_vcpu *vcpu)
 300 {
 301         kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ALTIVEC_UNAVAIL);
 302 }
 303 #endif
 304
 305 void kvmppc_core_queue_dec(struct kvm_vcpu *vcpu)
 306 {
 307         kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DECREMENTER);
 308 }
 309
 310 int kvmppc_core_pending_dec(struct kvm_vcpu *vcpu)
 311 {
 312         return test_bit(BOOKE_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions);
 313 }
 314
 315 void kvmppc_core_dequeue_dec(struct kvm_vcpu *vcpu)
 316 {
 317         clear_bit(BOOKE_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions);
 318 }
 319
 320 void kvmppc_core_queue_external(struct kvm_vcpu *vcpu,
 321                                 struct kvm_interrupt *irq)
 322 {
 323         unsigned int prio = BOOKE_IRQPRIO_EXTERNAL;
 324
 325         if (irq->irq == KVM_INTERRUPT_SET_LEVEL)
 326                 prio = BOOKE_IRQPRIO_EXTERNAL_LEVEL;
 327
 328         kvmppc_booke_queue_irqprio(vcpu, prio);
 329 }
 330
 331 void kvmppc_core_dequeue_external(struct kvm_vcpu *vcpu)
 332 {
 333         clear_bit(BOOKE_IRQPRIO_EXTERNAL, &vcpu->arch.pending_exceptions);
 334         clear_bit(BOOKE_IRQPRIO_EXTERNAL_LEVEL, &vcpu->arch.pending_exceptions);
 335 }
 336
 337 static void kvmppc_core_queue_watchdog(struct kvm_vcpu *vcpu)
 338 {
 339         kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_WATCHDOG);
 340 }
 341
 342 static void kvmppc_core_dequeue_watchdog(struct kvm_vcpu *vcpu)
 343 {
 344         clear_bit(BOOKE_IRQPRIO_WATCHDOG, &vcpu->arch.pending_exceptions);
 345 }
 346
 347 void kvmppc_core_queue_debug(struct kvm_vcpu *vcpu)
 348 {
 349         kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DEBUG);
 350 }
 351
 352 void kvmppc_core_dequeue_debug(struct kvm_vcpu *vcpu)
 353 {
 354         clear_bit(BOOKE_IRQPRIO_DEBUG, &vcpu->arch.pending_exceptions);
 355 }
 356
 357 static void set_guest_srr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1)
 358 {
 359         kvmppc_set_srr0(vcpu, srr0);
 360         kvmppc_set_srr1(vcpu, srr1);
 361 }
 362
 363 static void set_guest_csrr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1)
 364 {
 365         vcpu->arch.csrr0 = srr0;
 366         vcpu->arch.csrr1 = srr1;
 367 }
 368
 369 static void set_guest_dsrr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1)
 370 {
 371         if (cpu_has_feature(CPU_FTR_DEBUG_LVL_EXC)) {
 372                 vcpu->arch.dsrr0 = srr0;
 373                 vcpu->arch.dsrr1 = srr1;
 374         } else {
 375                 set_guest_csrr(vcpu, srr0, srr1);
 376         }
 377 }
 378
 379 static void set_guest_mcsrr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1)
 380 {
 381         vcpu->arch.mcsrr0 = srr0;
 382         vcpu->arch.mcsrr1 = srr1;
 383 }
 384
 385 /* Deliver the interrupt of the corresponding priority, if possible. */
 386 static int kvmppc_booke_irqprio_deliver(struct kvm_vcpu *vcpu,
 387                                         unsigned int priority)
 388 {
 389         int allowed = 0;
 390         ulong msr_mask = 0;
 391         bool update_esr = false, update_dear = false, update_epr = false;
 392         ulong crit_raw = vcpu->arch.shared->critical;
 393         ulong crit_r1 = kvmppc_get_gpr(vcpu, 1);
 394         bool crit;
 395         bool keep_irq = false;
 396         enum int_class int_class;
 397         ulong new_msr = vcpu->arch.shared->msr;
 398
 399         /* Truncate crit indicators in 32 bit mode */
 400         if (!(vcpu->arch.shared->msr & MSR_SF)) {
 401                 crit_raw &= 0xffffffff;
 402                 crit_r1 &= 0xffffffff;
 403         }
 404
 405         /* Critical section when crit == r1 */
 406         crit = (crit_raw == crit_r1);
 407         /* ... and we're in supervisor mode */
 408         crit = crit && !(vcpu->arch.shared->msr & MSR_PR);
 409
 410         if (priority == BOOKE_IRQPRIO_EXTERNAL_LEVEL) {
 411                 priority = BOOKE_IRQPRIO_EXTERNAL;
 412                 keep_irq = true;
 413         }
 414
 415         if ((priority == BOOKE_IRQPRIO_EXTERNAL) && vcpu->arch.epr_flags)
 416                 update_epr = true;
 417
 418         switch (priority) {
 419         case BOOKE_IRQPRIO_DTLB_MISS:
 420         case BOOKE_IRQPRIO_DATA_STORAGE:
 421         case BOOKE_IRQPRIO_ALIGNMENT:
 422                 update_dear = true;
 423                 fallthrough;
 424         case BOOKE_IRQPRIO_INST_STORAGE:
 425         case BOOKE_IRQPRIO_PROGRAM:
 426                 update_esr = true;
 427                 fallthrough;
 428         case BOOKE_IRQPRIO_ITLB_MISS:
 429         case BOOKE_IRQPRIO_SYSCALL:
 430         case BOOKE_IRQPRIO_FP_UNAVAIL:
 431 #ifdef CONFIG_SPE_POSSIBLE
 432         case BOOKE_IRQPRIO_SPE_UNAVAIL:
 433         case BOOKE_IRQPRIO_SPE_FP_DATA:
 434         case BOOKE_IRQPRIO_SPE_FP_ROUND:
 435 #endif
 436 #ifdef CONFIG_ALTIVEC
 437         case BOOKE_IRQPRIO_ALTIVEC_UNAVAIL:
 438         case BOOKE_IRQPRIO_ALTIVEC_ASSIST:
 439 #endif
 440         case BOOKE_IRQPRIO_AP_UNAVAIL:
 441                 allowed = 1;
 442                 msr_mask = MSR_CE | MSR_ME | MSR_DE;
 443                 int_class = INT_CLASS_NONCRIT;
 444                 break;
 445         case BOOKE_IRQPRIO_WATCHDOG:
 446         case BOOKE_IRQPRIO_CRITICAL:
 447         case BOOKE_IRQPRIO_DBELL_CRIT:
 448                 allowed = vcpu->arch.shared->msr & MSR_CE;
 449                 allowed = allowed && !crit;
 450                 msr_mask = MSR_ME;
 451                 int_class = INT_CLASS_CRIT;
 452                 break;
 453         case BOOKE_IRQPRIO_MACHINE_CHECK:
 454                 allowed = vcpu->arch.shared->msr & MSR_ME;
 455                 allowed = allowed && !crit;
 456                 int_class = INT_CLASS_MC;
 457                 break;
 458         case BOOKE_IRQPRIO_DECREMENTER:
 459         case BOOKE_IRQPRIO_FIT:
 460                 keep_irq = true;
 461                 fallthrough;
 462         case BOOKE_IRQPRIO_EXTERNAL:
 463         case BOOKE_IRQPRIO_DBELL:
 464                 allowed = vcpu->arch.shared->msr & MSR_EE;
 465                 allowed = allowed && !crit;
 466                 msr_mask = MSR_CE | MSR_ME | MSR_DE;
 467                 int_class = INT_CLASS_NONCRIT;
 468                 break;
 469         case BOOKE_IRQPRIO_DEBUG:
 470                 allowed = vcpu->arch.shared->msr & MSR_DE;
 471                 allowed = allowed && !crit;
 472                 msr_mask = MSR_ME;
 473                 if (cpu_has_feature(CPU_FTR_DEBUG_LVL_EXC))
 474                         int_class = INT_CLASS_DBG;
 475                 else
 476                         int_class = INT_CLASS_CRIT;
 477
 478                 break;
 479         }
 480
 481         if (allowed) {
 482                 switch (int_class) {
 483                 case INT_CLASS_NONCRIT:
 484                         set_guest_srr(vcpu, vcpu->arch.regs.nip,
 485                                       vcpu->arch.shared->msr);
 486                         break;
 487                 case INT_CLASS_CRIT:
 488                         set_guest_csrr(vcpu, vcpu->arch.regs.nip,
 489                                        vcpu->arch.shared->msr);
 490                         break;
 491                 case INT_CLASS_DBG:
 492                         set_guest_dsrr(vcpu, vcpu->arch.regs.nip,
 493                                        vcpu->arch.shared->msr);
 494                         break;
 495                 case INT_CLASS_MC:
 496                         set_guest_mcsrr(vcpu, vcpu->arch.regs.nip,
 497                                         vcpu->arch.shared->msr);
 498                         break;
 499                 }
 500
 501                 vcpu->arch.regs.nip = vcpu->arch.ivpr |
 502                                         vcpu->arch.ivor[priority];
 503                 if (update_esr)
 504                         kvmppc_set_esr(vcpu, vcpu->arch.queued_esr);
 505                 if (update_dear)
 506                         kvmppc_set_dar(vcpu, vcpu->arch.queued_dear);
 507                 if (update_epr) {
 508                         if (vcpu->arch.epr_flags & KVMPPC_EPR_USER)
 509                                 kvm_make_request(KVM_REQ_EPR_EXIT, vcpu);
 510                         else if (vcpu->arch.epr_flags & KVMPPC_EPR_KERNEL) {
 511                                 BUG_ON(vcpu->arch.irq_type != KVMPPC_IRQ_MPIC);
 512                                 kvmppc_mpic_set_epr(vcpu);
 513                         }
 514                 }
 515
 516                 new_msr &= msr_mask;
 517 #if defined(CONFIG_64BIT)
 518                 if (vcpu->arch.epcr & SPRN_EPCR_ICM)
 519                         new_msr |= MSR_CM;
 520 #endif
 521                 kvmppc_set_msr(vcpu, new_msr);
 522
 523                 if (!keep_irq)
 524                         clear_bit(priority, &vcpu->arch.pending_exceptions);
 525         }
 526
 527 #ifdef CONFIG_KVM_BOOKE_HV
 528         /*
 529          * If an interrupt is pending but masked, raise a guest doorbell
 530          * so that we are notified when the guest enables the relevant
 531          * MSR bit.
 532          */
 533         if (vcpu->arch.pending_exceptions & BOOKE_IRQMASK_EE)
 534                 kvmppc_set_pending_interrupt(vcpu, INT_CLASS_NONCRIT);
 535         if (vcpu->arch.pending_exceptions & BOOKE_IRQMASK_CE)
 536                 kvmppc_set_pending_interrupt(vcpu, INT_CLASS_CRIT);
 537         if (vcpu->arch.pending_exceptions & BOOKE_IRQPRIO_MACHINE_CHECK)
 538                 kvmppc_set_pending_interrupt(vcpu, INT_CLASS_MC);
 539 #endif
 540
 541         return allowed;
 542 }
 543
 544 /*
 545  * Return the number of jiffies until the next timeout.  If the timeout is
 546  * longer than the NEXT_TIMER_MAX_DELTA, then return NEXT_TIMER_MAX_DELTA
 547  * because the larger value can break the timer APIs.
 548  */
 549 static unsigned long watchdog_next_timeout(struct kvm_vcpu *vcpu)
 550 {
 551         u64 tb, wdt_tb, wdt_ticks = 0;
 552         u64 nr_jiffies = 0;
 553         u32 period = TCR_GET_WP(vcpu->arch.tcr);
 554
 555         wdt_tb = 1ULL << (63 - period);
 556         tb = get_tb();
 557         /*
 558          * The watchdog timeout will hapeen when TB bit corresponding
 559          * to watchdog will toggle from 0 to 1.
 560          */
 561         if (tb & wdt_tb)
 562                 wdt_ticks = wdt_tb;
 563
 564         wdt_ticks += wdt_tb - (tb & (wdt_tb - 1));
 565
 566         /* Convert timebase ticks to jiffies */
 567         nr_jiffies = wdt_ticks;
 568
 569         if (do_div(nr_jiffies, tb_ticks_per_jiffy))
 570                 nr_jiffies++;
 571
 572         return min_t(unsigned long long, nr_jiffies, NEXT_TIMER_MAX_DELTA);
 573 }
 574
 575 static void arm_next_watchdog(struct kvm_vcpu *vcpu)
 576 {
 577         unsigned long nr_jiffies;
 578         unsigned long flags;
 579
 580         /*
 581          * If TSR_ENW and TSR_WIS are not set then no need to exit to
 582          * userspace, so clear the KVM_REQ_WATCHDOG request.
 583          */
 584         if ((vcpu->arch.tsr & (TSR_ENW | TSR_WIS)) != (TSR_ENW | TSR_WIS))
 585                 kvm_clear_request(KVM_REQ_WATCHDOG, vcpu);
 586
 587         spin_lock_irqsave(&vcpu->arch.wdt_lock, flags);
 588         nr_jiffies = watchdog_next_timeout(vcpu);
 589         /*
 590          * If the number of jiffies of watchdog timer >= NEXT_TIMER_MAX_DELTA
 591          * then do not run the watchdog timer as this can break timer APIs.
 592          */
 593         if (nr_jiffies < NEXT_TIMER_MAX_DELTA)
 594                 mod_timer(&vcpu->arch.wdt_timer, jiffies + nr_jiffies);
 595         else
 596                 del_timer(&vcpu->arch.wdt_timer);
 597         spin_unlock_irqrestore(&vcpu->arch.wdt_lock, flags);
 598 }
 599
 600 void kvmppc_watchdog_func(struct timer_list *t)
 601 {
 602         struct kvm_vcpu *vcpu = from_timer(vcpu, t, arch.wdt_timer);
 603         u32 tsr, new_tsr;
 604         int final;
 605
 606         do {
 607                 new_tsr = tsr = vcpu->arch.tsr;
 608                 final = 0;
 609
 610                 /* Time out event */
 611                 if (tsr & TSR_ENW) {
 612                         if (tsr & TSR_WIS)
 613                                 final = 1;
 614                         else
 615                                 new_tsr = tsr | TSR_WIS;
 616                 } else {
 617                         new_tsr = tsr | TSR_ENW;
 618                 }
 619         } while (cmpxchg(&vcpu->arch.tsr, tsr, new_tsr) != tsr);
 620
 621         if (new_tsr & TSR_WIS) {
 622                 smp_wmb();
 623                 kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
 624                 kvm_vcpu_kick(vcpu);
 625         }
 626
 627         /*
 628          * If this is final watchdog expiry and some action is required
 629          * then exit to userspace.
 630          */
 631         if (final && (vcpu->arch.tcr & TCR_WRC_MASK) &&
 632             vcpu->arch.watchdog_enabled) {
 633                 smp_wmb();
 634                 kvm_make_request(KVM_REQ_WATCHDOG, vcpu);
 635                 kvm_vcpu_kick(vcpu);
 636         }
 637
 638         /*
 639          * Stop running the watchdog timer after final expiration to
 640          * prevent the host from being flooded with timers if the
 641          * guest sets a short period.
 642          * Timers will resume when TSR/TCR is updated next time.
 643          */
 644         if (!final)
 645                 arm_next_watchdog(vcpu);
 646 }
 647
 648 static void update_timer_ints(struct kvm_vcpu *vcpu)
 649 {
 650         if ((vcpu->arch.tcr & TCR_DIE) && (vcpu->arch.tsr & TSR_DIS))
 651                 kvmppc_core_queue_dec(vcpu);
 652         else
 653                 kvmppc_core_dequeue_dec(vcpu);
 654
 655         if ((vcpu->arch.tcr & TCR_WIE) && (vcpu->arch.tsr & TSR_WIS))
 656                 kvmppc_core_queue_watchdog(vcpu);
 657         else
 658                 kvmppc_core_dequeue_watchdog(vcpu);
 659 }
 660
 661 static void kvmppc_core_check_exceptions(struct kvm_vcpu *vcpu)
 662 {
 663         unsigned long *pending = &vcpu->arch.pending_exceptions;
 664         unsigned int priority;
 665
 666         priority = __ffs(*pending);
 667         while (priority < BOOKE_IRQPRIO_MAX) {
 668                 if (kvmppc_booke_irqprio_deliver(vcpu, priority))
 669                         break;
 670
 671                 priority = find_next_bit(pending,
 672                                          BITS_PER_BYTE * sizeof(*pending),
 673                                          priority + 1);
 674         }
 675
 676         /* Tell the guest about our interrupt status */
 677         vcpu->arch.shared->int_pending = !!*pending;
 678 }
 679
 680 /* Check pending exceptions and deliver one, if possible. */
 681 int kvmppc_core_prepare_to_enter(struct kvm_vcpu *vcpu)
 682 {
 683         int r = 0;
 684         WARN_ON_ONCE(!irqs_disabled());
 685
 686         kvmppc_core_check_exceptions(vcpu);
 687
 688         if (kvm_request_pending(vcpu)) {
 689                 /* Exception delivery raised request; start over */
 690                 return 1;
 691         }
 692
 693         if (vcpu->arch.shared->msr & MSR_WE) {
 694                 local_irq_enable();
 695                 kvm_vcpu_block(vcpu);
 696                 kvm_clear_request(KVM_REQ_UNHALT, vcpu);
 697                 hard_irq_disable();
 698
 699                 kvmppc_set_exit_type(vcpu, EMULATED_MTMSRWE_EXITS);
 700                 r = 1;
 701         };
 702
 703         return r;
 704 }
 705
 706 int kvmppc_core_check_requests(struct kvm_vcpu *vcpu)
 707 {
 708         int r = 1; /* Indicate we want to get back into the guest */
 709
 710         if (kvm_check_request(KVM_REQ_PENDING_TIMER, vcpu))
 711                 update_timer_ints(vcpu);
 712 #if defined(CONFIG_KVM_E500V2) || defined(CONFIG_KVM_E500MC)
 713         if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
 714                 kvmppc_core_flush_tlb(vcpu);
 715 #endif
 716
 717         if (kvm_check_request(KVM_REQ_WATCHDOG, vcpu)) {
 718                 vcpu->run->exit_reason = KVM_EXIT_WATCHDOG;
 719                 r = 0;
 720         }
 721
 722         if (kvm_check_request(KVM_REQ_EPR_EXIT, vcpu)) {
 723                 vcpu->run->epr.epr = 0;
 724                 vcpu->arch.epr_needed = true;
 725                 vcpu->run->exit_reason = KVM_EXIT_EPR;
 726                 r = 0;
 727         }
 728
 729         return r;
 730 }
 731
 732 int kvmppc_vcpu_run(struct kvm_vcpu *vcpu)
 733 {
 734         int ret, s;
 735         struct debug_reg debug;
 736
 737         if (!vcpu->arch.sane) {
 738                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
 739                 return -EINVAL;
 740         }
 741
 742         s = kvmppc_prepare_to_enter(vcpu);
 743         if (s <= 0) {
 744                 ret = s;
 745                 goto out;
 746         }
 747         /* interrupts now hard-disabled */
 748
 749 #ifdef CONFIG_PPC_FPU
 750         /* Save userspace FPU state in stack */
 751         enable_kernel_fp();
 752
 753         /*
 754          * Since we can't trap on MSR_FP in GS-mode, we consider the guest
 755          * as always using the FPU.
 756          */
 757         kvmppc_load_guest_fp(vcpu);
 758 #endif
 759
 760 #ifdef CONFIG_ALTIVEC
 761         /* Save userspace AltiVec state in stack */
 762         if (cpu_has_feature(CPU_FTR_ALTIVEC))
 763                 enable_kernel_altivec();
 764         /*
 765          * Since we can't trap on MSR_VEC in GS-mode, we consider the guest
 766          * as always using the AltiVec.
 767          */
 768         kvmppc_load_guest_altivec(vcpu);
 769 #endif
 770
 771         /* Switch to guest debug context */
 772         debug = vcpu->arch.dbg_reg;
 773         switch_booke_debug_regs(&debug);
 774         debug = current->thread.debug;
 775         current->thread.debug = vcpu->arch.dbg_reg;
 776
 777         vcpu->arch.pgdir = vcpu->kvm->mm->pgd;
 778         kvmppc_fix_ee_before_entry();
 779
 780         ret = __kvmppc_vcpu_run(vcpu);
 781
 782         /* No need for guest_exit. It's done in handle_exit.
 783            We also get here with interrupts enabled. */
 784
 785         /* Switch back to user space debug context */
 786         switch_booke_debug_regs(&debug);
 787         current->thread.debug = debug;
 788
 789 #ifdef CONFIG_PPC_FPU
 790         kvmppc_save_guest_fp(vcpu);
 791 #endif
 792
 793 #ifdef CONFIG_ALTIVEC
 794         kvmppc_save_guest_altivec(vcpu);
 795 #endif
 796
 797 out:
 798         vcpu->mode = OUTSIDE_GUEST_MODE;
 799         return ret;
 800 }
 801
 802 static int emulation_exit(struct kvm_vcpu *vcpu)
 803 {
 804         enum emulation_result er;
 805
 806         er = kvmppc_emulate_instruction(vcpu);
 807         switch (er) {
 808         case EMULATE_DONE:
 809                 /* don't overwrite subtypes, just account kvm_stats */
 810                 kvmppc_account_exit_stat(vcpu, EMULATED_INST_EXITS);
 811                 /* Future optimization: only reload non-volatiles if
 812                  * they were actually modified by emulation. */
 813                 return RESUME_GUEST_NV;
 814
 815         case EMULATE_AGAIN:
 816                 return RESUME_GUEST;
 817
 818         case EMULATE_FAIL:
 819                 printk(KERN_CRIT "%s: emulation at %lx failed (%08x)\n",
 820                        __func__, vcpu->arch.regs.nip, vcpu->arch.last_inst);
 821                 /* For debugging, encode the failing instruction and
 822                  * report it to userspace. */
 823                 vcpu->run->hw.hardware_exit_reason = ~0ULL << 32;
 824                 vcpu->run->hw.hardware_exit_reason |= vcpu->arch.last_inst;
 825                 kvmppc_core_queue_program(vcpu, ESR_PIL);
 826                 return RESUME_HOST;
 827
 828         case EMULATE_EXIT_USER:
 829                 return RESUME_HOST;
 830
 831         default:
 832                 BUG();
 833         }
 834 }
 835
 836 static int kvmppc_handle_debug(struct kvm_vcpu *vcpu)
 837 {
 838         struct kvm_run *run = vcpu->run;
 839         struct debug_reg *dbg_reg = &(vcpu->arch.dbg_reg);
 840         u32 dbsr = vcpu->arch.dbsr;
 841
 842         if (vcpu->guest_debug == 0) {
 843                 /*
 844                  * Debug resources belong to Guest.
 845                  * Imprecise debug event is not injected
 846                  */
 847                 if (dbsr & DBSR_IDE) {
 848                         dbsr &= ~DBSR_IDE;
 849                         if (!dbsr)
 850                                 return RESUME_GUEST;
 851                 }
 852
 853                 if (dbsr && (vcpu->arch.shared->msr & MSR_DE) &&
 854                             (vcpu->arch.dbg_reg.dbcr0 & DBCR0_IDM))
 855                         kvmppc_core_queue_debug(vcpu);
 856
 857                 /* Inject a program interrupt if trap debug is not allowed */
 858                 if ((dbsr & DBSR_TIE) && !(vcpu->arch.shared->msr & MSR_DE))
 859                         kvmppc_core_queue_program(vcpu, ESR_PTR);
 860
 861                 return RESUME_GUEST;
 862         }
 863
 864         /*
 865          * Debug resource owned by userspace.
 866          * Clear guest dbsr (vcpu->arch.dbsr)
 867          */
 868         vcpu->arch.dbsr = 0;
 869         run->debug.arch.status = 0;
 870         run->debug.arch.address = vcpu->arch.regs.nip;
 871
 872         if (dbsr & (DBSR_IAC1 | DBSR_IAC2 | DBSR_IAC3 | DBSR_IAC4)) {
 873                 run->debug.arch.status |= KVMPPC_DEBUG_BREAKPOINT;
 874         } else {
 875                 if (dbsr & (DBSR_DAC1W | DBSR_DAC2W))
 876                         run->debug.arch.status |= KVMPPC_DEBUG_WATCH_WRITE;
 877                 else if (dbsr & (DBSR_DAC1R | DBSR_DAC2R))
 878                         run->debug.arch.status |= KVMPPC_DEBUG_WATCH_READ;
 879                 if (dbsr & (DBSR_DAC1R | DBSR_DAC1W))
 880                         run->debug.arch.address = dbg_reg->dac1;
 881                 else if (dbsr & (DBSR_DAC2R | DBSR_DAC2W))
 882                         run->debug.arch.address = dbg_reg->dac2;
 883         }
 884
 885         return RESUME_HOST;
 886 }
 887
 888 static void kvmppc_fill_pt_regs(struct pt_regs *regs)
 889 {
 890         ulong r1, ip, msr, lr;
 891
 892         asm("mr %0, 1" : "=r"(r1));
 893         asm("mflr %0" : "=r"(lr));
 894         asm("mfmsr %0" : "=r"(msr));
 895         asm("bl 1f; 1: mflr %0" : "=r"(ip));
 896
 897         memset(regs, 0, sizeof(*regs));
 898         regs->gpr[1] = r1;
 899         regs->nip = ip;
 900         regs->msr = msr;
 901         regs->link = lr;
 902 }
 903
 904 /*
 905  * For interrupts needed to be handled by host interrupt handlers,
 906  * corresponding host handler are called from here in similar way
 907  * (but not exact) as they are called from low level handler
 908  * (such as from arch/powerpc/kernel/head_fsl_booke.S).
 909  */
 910 static void kvmppc_restart_interrupt(struct kvm_vcpu *vcpu,
 911                                      unsigned int exit_nr)
 912 {
 913         struct pt_regs regs;
 914
 915         switch (exit_nr) {
 916         case BOOKE_INTERRUPT_EXTERNAL:
 917                 kvmppc_fill_pt_regs(&regs);
 918                 do_IRQ(&regs);
 919                 break;
 920         case BOOKE_INTERRUPT_DECREMENTER:
 921                 kvmppc_fill_pt_regs(&regs);
 922                 timer_interrupt(&regs);
 923                 break;
 924 #if defined(CONFIG_PPC_DOORBELL)
 925         case BOOKE_INTERRUPT_DOORBELL:
 926                 kvmppc_fill_pt_regs(&regs);
 927                 doorbell_exception(&regs);
 928                 break;
 929 #endif
 930         case BOOKE_INTERRUPT_MACHINE_CHECK:
 931                 /* FIXME */
 932                 break;
 933         case BOOKE_INTERRUPT_PERFORMANCE_MONITOR:
 934                 kvmppc_fill_pt_regs(&regs);
 935                 performance_monitor_exception(&regs);
 936                 break;
 937         case BOOKE_INTERRUPT_WATCHDOG:
 938                 kvmppc_fill_pt_regs(&regs);
 939 #ifdef CONFIG_BOOKE_WDT
 940                 WatchdogException(&regs);
 941 #else
 942                 unknown_exception(&regs);
 943 #endif
 944                 break;
 945         case BOOKE_INTERRUPT_CRITICAL:
 946                 kvmppc_fill_pt_regs(&regs);
 947                 unknown_exception(&regs);
 948                 break;
 949         case BOOKE_INTERRUPT_DEBUG:
 950                 /* Save DBSR before preemption is enabled */
 951                 vcpu->arch.dbsr = mfspr(SPRN_DBSR);
 952                 kvmppc_clear_dbsr();
 953                 break;
 954         }
 955 }
 956
 957 static int kvmppc_resume_inst_load(struct kvm_vcpu *vcpu,
 958                                   enum emulation_result emulated, u32 last_inst)
 959 {
 960         switch (emulated) {
 961         case EMULATE_AGAIN:
 962                 return RESUME_GUEST;
 963
 964         case EMULATE_FAIL:
 965                 pr_debug("%s: load instruction from guest address %lx failed\n",
 966                        __func__, vcpu->arch.regs.nip);
 967                 /* For debugging, encode the failing instruction and
 968                  * report it to userspace. */
 969                 vcpu->run->hw.hardware_exit_reason = ~0ULL << 32;
 970                 vcpu->run->hw.hardware_exit_reason |= last_inst;
 971                 kvmppc_core_queue_program(vcpu, ESR_PIL);
 972                 return RESUME_HOST;
 973
 974         default:
 975                 BUG();
 976         }
 977 }
 978
 979 /**
 980  * kvmppc_handle_exit
 981  *
 982  * Return value is in the form (errcode<<2 | RESUME_FLAG_HOST | RESUME_FLAG_NV)
 983  */
 984 int kvmppc_handle_exit(struct kvm_vcpu *vcpu, unsigned int exit_nr)
 985 {
 986         struct kvm_run *run = vcpu->run;
 987         int r = RESUME_HOST;
 988         int s;
 989         int idx;
 990         u32 last_inst = KVM_INST_FETCH_FAILED;
 991         enum emulation_result emulated = EMULATE_DONE;
 992
 993         /* update before a new last_exit_type is rewritten */
 994         kvmppc_update_timing_stats(vcpu);
 995
 996         /* restart interrupts if they were meant for the host */
 997         kvmppc_restart_interrupt(vcpu, exit_nr);
 998
 999         /*
1000          * get last instruction before being preempted
1001          * TODO: for e6500 check also BOOKE_INTERRUPT_LRAT_ERROR & ESR_DATA
1002          */
1003         switch (exit_nr) {
1004         case BOOKE_INTERRUPT_DATA_STORAGE:
1005         case BOOKE_INTERRUPT_DTLB_MISS:
1006         case BOOKE_INTERRUPT_HV_PRIV:
1007                 emulated = kvmppc_get_last_inst(vcpu, INST_GENERIC, &last_inst);
1008                 break;
1009         case BOOKE_INTERRUPT_PROGRAM:
1010                 /* SW breakpoints arrive as illegal instructions on HV */
1011                 if (vcpu->guest_debug & KVM_GUESTDBG_USE_SW_BP)
1012                         emulated = kvmppc_get_last_inst(vcpu, INST_GENERIC, &last_inst);
1013                 break;
1014         default:
1015                 break;
1016         }
1017
1018         trace_kvm_exit(exit_nr, vcpu);
1019         guest_exit_irqoff();
1020
1021         local_irq_enable();
1022
1023         run->exit_reason = KVM_EXIT_UNKNOWN;
1024         run->ready_for_interrupt_injection = 1;
1025
1026         if (emulated != EMULATE_DONE) {
1027                 r = kvmppc_resume_inst_load(vcpu, emulated, last_inst);
1028                 goto out;
1029         }
1030
1031         switch (exit_nr) {
1032         case BOOKE_INTERRUPT_MACHINE_CHECK:
1033                 printk("MACHINE CHECK: %lx\n", mfspr(SPRN_MCSR));
1034                 kvmppc_dump_vcpu(vcpu);
1035                 /* For debugging, send invalid exit reason to user space */
1036                 run->hw.hardware_exit_reason = ~1ULL << 32;
1037                 run->hw.hardware_exit_reason |= mfspr(SPRN_MCSR);
1038                 r = RESUME_HOST;
1039                 break;
1040
1041         case BOOKE_INTERRUPT_EXTERNAL:
1042                 kvmppc_account_exit(vcpu, EXT_INTR_EXITS);
1043                 r = RESUME_GUEST;
1044                 break;
1045
1046         case BOOKE_INTERRUPT_DECREMENTER:
1047                 kvmppc_account_exit(vcpu, DEC_EXITS);
1048                 r = RESUME_GUEST;
1049                 break;
1050
1051         case BOOKE_INTERRUPT_WATCHDOG:
1052                 r = RESUME_GUEST;
1053                 break;
1054
1055         case BOOKE_INTERRUPT_DOORBELL:
1056                 kvmppc_account_exit(vcpu, DBELL_EXITS);
1057                 r = RESUME_GUEST;
1058                 break;
1059
1060         case BOOKE_INTERRUPT_GUEST_DBELL_CRIT:
1061                 kvmppc_account_exit(vcpu, GDBELL_EXITS);
1062
1063                 /*
1064                  * We are here because there is a pending guest interrupt
1065                  * which could not be delivered as MSR_CE or MSR_ME was not
1066                  * set.  Once we break from here we will retry delivery.
1067                  */
1068                 r = RESUME_GUEST;
1069                 break;
1070
1071         case BOOKE_INTERRUPT_GUEST_DBELL:
1072                 kvmppc_account_exit(vcpu, GDBELL_EXITS);
1073
1074                 /*
1075                  * We are here because there is a pending guest interrupt
1076                  * which could not be delivered as MSR_EE was not set.  Once
1077                  * we break from here we will retry delivery.
1078                  */
1079                 r = RESUME_GUEST;
1080                 break;
1081
1082         case BOOKE_INTERRUPT_PERFORMANCE_MONITOR:
1083                 r = RESUME_GUEST;
1084                 break;
1085
1086         case BOOKE_INTERRUPT_HV_PRIV:
1087                 r = emulation_exit(vcpu);
1088                 break;
1089
1090         case BOOKE_INTERRUPT_PROGRAM:
1091                 if ((vcpu->guest_debug & KVM_GUESTDBG_USE_SW_BP) &&
1092                         (last_inst == KVMPPC_INST_SW_BREAKPOINT)) {
1093                         /*
1094                          * We are here because of an SW breakpoint instr,
1095                          * so lets return to host to handle.
1096                          */
1097                         r = kvmppc_handle_debug(vcpu);
1098                         run->exit_reason = KVM_EXIT_DEBUG;
1099                         kvmppc_account_exit(vcpu, DEBUG_EXITS);
1100                         break;
1101                 }
1102
1103                 if (vcpu->arch.shared->msr & (MSR_PR | MSR_GS)) {
1104                         /*
1105                          * Program traps generated by user-level software must
1106                          * be handled by the guest kernel.
1107                          *
1108                          * In GS mode, hypervisor privileged instructions trap
1109                          * on BOOKE_INTERRUPT_HV_PRIV, not here, so these are
1110                          * actual program interrupts, handled by the guest.
1111                          */
1112                         kvmppc_core_queue_program(vcpu, vcpu->arch.fault_esr);
1113                         r = RESUME_GUEST;
1114                         kvmppc_account_exit(vcpu, USR_PR_INST);
1115                         break;
1116                 }
1117
1118                 r = emulation_exit(vcpu);
1119                 break;
1120
1121         case BOOKE_INTERRUPT_FP_UNAVAIL:
1122                 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_FP_UNAVAIL);
1123                 kvmppc_account_exit(vcpu, FP_UNAVAIL);
1124                 r = RESUME_GUEST;
1125                 break;
1126
1127 #ifdef CONFIG_SPE
1128         case BOOKE_INTERRUPT_SPE_UNAVAIL: {
1129                 if (vcpu->arch.shared->msr & MSR_SPE)
1130                         kvmppc_vcpu_enable_spe(vcpu);
1131                 else
1132                         kvmppc_booke_queue_irqprio(vcpu,
1133                                                    BOOKE_IRQPRIO_SPE_UNAVAIL);
1134                 r = RESUME_GUEST;
1135                 break;
1136         }
1137
1138         case BOOKE_INTERRUPT_SPE_FP_DATA:
1139                 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SPE_FP_DATA);
1140                 r = RESUME_GUEST;
1141                 break;
1142
1143         case BOOKE_INTERRUPT_SPE_FP_ROUND:
1144                 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SPE_FP_ROUND);
1145                 r = RESUME_GUEST;
1146                 break;
1147 #elif defined(CONFIG_SPE_POSSIBLE)
1148         case BOOKE_INTERRUPT_SPE_UNAVAIL:
1149                 /*
1150                  * Guest wants SPE, but host kernel doesn't support it.  Send
1151                  * an "unimplemented operation" program check to the guest.
1152                  */
1153                 kvmppc_core_queue_program(vcpu, ESR_PUO | ESR_SPV);
1154                 r = RESUME_GUEST;
1155                 break;
1156
1157         /*
1158          * These really should never happen without CONFIG_SPE,
1159          * as we should never enable the real MSR[SPE] in the guest.
1160          */
1161         case BOOKE_INTERRUPT_SPE_FP_DATA:
1162         case BOOKE_INTERRUPT_SPE_FP_ROUND:
1163                 printk(KERN_CRIT "%s: unexpected SPE interrupt %u at %08lx\n",
1164                        __func__, exit_nr, vcpu->arch.regs.nip);
1165                 run->hw.hardware_exit_reason = exit_nr;
1166                 r = RESUME_HOST;
1167                 break;
1168 #endif /* CONFIG_SPE_POSSIBLE */
1169
1170 /*
1171  * On cores with Vector category, KVM is loaded only if CONFIG_ALTIVEC,
1172  * see kvmppc_core_check_processor_compat().
1173  */
1174 #ifdef CONFIG_ALTIVEC
1175         case BOOKE_INTERRUPT_ALTIVEC_UNAVAIL:
1176                 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ALTIVEC_UNAVAIL);
1177                 r = RESUME_GUEST;
1178                 break;
1179
1180         case BOOKE_INTERRUPT_ALTIVEC_ASSIST:
1181                 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ALTIVEC_ASSIST);
1182                 r = RESUME_GUEST;
1183                 break;
1184 #endif
1185
1186         case BOOKE_INTERRUPT_DATA_STORAGE:
1187                 kvmppc_core_queue_data_storage(vcpu, vcpu->arch.fault_dear,
1188                                                vcpu->arch.fault_esr);
1189                 kvmppc_account_exit(vcpu, DSI_EXITS);
1190                 r = RESUME_GUEST;
1191                 break;
1192
1193         case BOOKE_INTERRUPT_INST_STORAGE:
1194                 kvmppc_core_queue_inst_storage(vcpu, vcpu->arch.fault_esr);
1195                 kvmppc_account_exit(vcpu, ISI_EXITS);
1196                 r = RESUME_GUEST;
1197                 break;
1198
1199         case BOOKE_INTERRUPT_ALIGNMENT:
1200                 kvmppc_core_queue_alignment(vcpu, vcpu->arch.fault_dear,
1201                                             vcpu->arch.fault_esr);
1202                 r = RESUME_GUEST;
1203                 break;
1204
1205 #ifdef CONFIG_KVM_BOOKE_HV
1206         case BOOKE_INTERRUPT_HV_SYSCALL:
1207                 if (!(vcpu->arch.shared->msr & MSR_PR)) {
1208                         kvmppc_set_gpr(vcpu, 3, kvmppc_kvm_pv(vcpu));
1209                 } else {
1210                         /*
1211                          * hcall from guest userspace -- send privileged
1212                          * instruction program check.
1213                          */
1214                         kvmppc_core_queue_program(vcpu, ESR_PPR);
1215                 }
1216
1217                 r = RESUME_GUEST;
1218                 break;
1219 #else
1220         case BOOKE_INTERRUPT_SYSCALL:
1221                 if (!(vcpu->arch.shared->msr & MSR_PR) &&
1222                     (((u32)kvmppc_get_gpr(vcpu, 0)) == KVM_SC_MAGIC_R0)) {
1223                         /* KVM PV hypercalls */
1224                         kvmppc_set_gpr(vcpu, 3, kvmppc_kvm_pv(vcpu));
1225                         r = RESUME_GUEST;
1226                 } else {
1227                         /* Guest syscalls */
1228                         kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SYSCALL);
1229                 }
1230                 kvmppc_account_exit(vcpu, SYSCALL_EXITS);
1231                 r = RESUME_GUEST;
1232                 break;
1233 #endif
1234
1235         case BOOKE_INTERRUPT_DTLB_MISS: {
1236                 unsigned long eaddr = vcpu->arch.fault_dear;
1237                 int gtlb_index;
1238                 gpa_t gpaddr;
1239                 gfn_t gfn;
1240
1241 #ifdef CONFIG_KVM_E500V2
1242                 if (!(vcpu->arch.shared->msr & MSR_PR) &&
1243                     (eaddr & PAGE_MASK) == vcpu->arch.magic_page_ea) {
1244                         kvmppc_map_magic(vcpu);
1245                         kvmppc_account_exit(vcpu, DTLB_VIRT_MISS_EXITS);
1246                         r = RESUME_GUEST;
1247
1248                         break;
1249                 }
1250 #endif
1251
1252                 /* Check the guest TLB. */
1253                 gtlb_index = kvmppc_mmu_dtlb_index(vcpu, eaddr);
1254                 if (gtlb_index < 0) {
1255                         /* The guest didn't have a mapping for it. */
1256                         kvmppc_core_queue_dtlb_miss(vcpu,
1257                                                     vcpu->arch.fault_dear,
1258                                                     vcpu->arch.fault_esr);
1259                         kvmppc_mmu_dtlb_miss(vcpu);
1260                         kvmppc_account_exit(vcpu, DTLB_REAL_MISS_EXITS);
1261                         r = RESUME_GUEST;
1262                         break;
1263                 }
1264
1265                 idx = srcu_read_lock(&vcpu->kvm->srcu);
1266
1267                 gpaddr = kvmppc_mmu_xlate(vcpu, gtlb_index, eaddr);
1268                 gfn = gpaddr >> PAGE_SHIFT;
1269
1270                 if (kvm_is_visible_gfn(vcpu->kvm, gfn)) {
1271                         /* The guest TLB had a mapping, but the shadow TLB
1272                          * didn't, and it is RAM. This could be because:
1273                          * a) the entry is mapping the host kernel, or
1274                          * b) the guest used a large mapping which we're faking
1275                          * Either way, we need to satisfy the fault without
1276                          * invoking the guest. */
1277                         kvmppc_mmu_map(vcpu, eaddr, gpaddr, gtlb_index);
1278                         kvmppc_account_exit(vcpu, DTLB_VIRT_MISS_EXITS);
1279                         r = RESUME_GUEST;
1280                 } else {
1281                         /* Guest has mapped and accessed a page which is not
1282                          * actually RAM. */
1283                         vcpu->arch.paddr_accessed = gpaddr;
1284                         vcpu->arch.vaddr_accessed = eaddr;
1285                         r = kvmppc_emulate_mmio(vcpu);
1286                         kvmppc_account_exit(vcpu, MMIO_EXITS);
1287                 }
1288
1289                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
1290                 break;
1291         }
1292
1293         case BOOKE_INTERRUPT_ITLB_MISS: {
1294                 unsigned long eaddr = vcpu->arch.regs.nip;
1295                 gpa_t gpaddr;
1296                 gfn_t gfn;
1297                 int gtlb_index;
1298
1299                 r = RESUME_GUEST;
1300
1301                 /* Check the guest TLB. */
1302                 gtlb_index = kvmppc_mmu_itlb_index(vcpu, eaddr);
1303                 if (gtlb_index < 0) {
1304                         /* The guest didn't have a mapping for it. */
1305                         kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ITLB_MISS);
1306                         kvmppc_mmu_itlb_miss(vcpu);
1307                         kvmppc_account_exit(vcpu, ITLB_REAL_MISS_EXITS);
1308                         break;
1309                 }
1310
1311                 kvmppc_account_exit(vcpu, ITLB_VIRT_MISS_EXITS);
1312
1313                 idx = srcu_read_lock(&vcpu->kvm->srcu);
1314
1315                 gpaddr = kvmppc_mmu_xlate(vcpu, gtlb_index, eaddr);
1316                 gfn = gpaddr >> PAGE_SHIFT;
1317
1318                 if (kvm_is_visible_gfn(vcpu->kvm, gfn)) {
1319                         /* The guest TLB had a mapping, but the shadow TLB
1320                          * didn't. This could be because:
1321                          * a) the entry is mapping the host kernel, or
1322                          * b) the guest used a large mapping which we're faking
1323                          * Either way, we need to satisfy the fault without
1324                          * invoking the guest. */
1325                         kvmppc_mmu_map(vcpu, eaddr, gpaddr, gtlb_index);
1326                 } else {
1327                         /* Guest mapped and leaped at non-RAM! */
1328                         kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_MACHINE_CHECK);
1329                 }
1330
1331                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
1332                 break;
1333         }
1334
1335         case BOOKE_INTERRUPT_DEBUG: {
1336                 r = kvmppc_handle_debug(vcpu);
1337                 if (r == RESUME_HOST)
1338                         run->exit_reason = KVM_EXIT_DEBUG;
1339                 kvmppc_account_exit(vcpu, DEBUG_EXITS);
1340                 break;
1341         }
1342
1343         default:
1344                 printk(KERN_EMERG "exit_nr %d\n", exit_nr);
1345                 BUG();
1346         }
1347
1348 out:
1349         /*
1350          * To avoid clobbering exit_reason, only check for signals if we
1351          * aren't already exiting to userspace for some other reason.
1352          */
1353         if (!(r & RESUME_HOST)) {
1354                 s = kvmppc_prepare_to_enter(vcpu);
1355                 if (s <= 0)
1356                         r = (s << 2) | RESUME_HOST | (r & RESUME_FLAG_NV);
1357                 else {
1358                         /* interrupts now hard-disabled */
1359                         kvmppc_fix_ee_before_entry();
1360                         kvmppc_load_guest_fp(vcpu);
1361                         kvmppc_load_guest_altivec(vcpu);
1362                 }
1363         }
1364
1365         return r;
1366 }
1367
1368 static void kvmppc_set_tsr(struct kvm_vcpu *vcpu, u32 new_tsr)
1369 {
1370         u32 old_tsr = vcpu->arch.tsr;
1371
1372         vcpu->arch.tsr = new_tsr;
1373
1374         if ((old_tsr ^ vcpu->arch.tsr) & (TSR_ENW | TSR_WIS))
1375                 arm_next_watchdog(vcpu);
1376
1377         update_timer_ints(vcpu);
1378 }
1379
1380 int kvmppc_subarch_vcpu_init(struct kvm_vcpu *vcpu)
1381 {
1382         /* setup watchdog timer once */
1383         spin_lock_init(&vcpu->arch.wdt_lock);
1384         timer_setup(&vcpu->arch.wdt_timer, kvmppc_watchdog_func, 0);
1385
1386         /*
1387          * Clear DBSR.MRR to avoid guest debug interrupt as
1388          * this is of host interest
1389          */
1390         mtspr(SPRN_DBSR, DBSR_MRR);
1391         return 0;
1392 }
1393
1394 void kvmppc_subarch_vcpu_uninit(struct kvm_vcpu *vcpu)
1395 {
1396         del_timer_sync(&vcpu->arch.wdt_timer);
1397 }
1398
1399 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
1400 {
1401         int i;
1402
1403         vcpu_load(vcpu);
1404
1405         regs->pc = vcpu->arch.regs.nip;
1406         regs->cr = kvmppc_get_cr(vcpu);
1407         regs->ctr = vcpu->arch.regs.ctr;
1408         regs->lr = vcpu->arch.regs.link;
1409         regs->xer = kvmppc_get_xer(vcpu);
1410         regs->msr = vcpu->arch.shared->msr;
1411         regs->srr0 = kvmppc_get_srr0(vcpu);
1412         regs->srr1 = kvmppc_get_srr1(vcpu);
1413         regs->pid = vcpu->arch.pid;
1414         regs->sprg0 = kvmppc_get_sprg0(vcpu);
1415         regs->sprg1 = kvmppc_get_sprg1(vcpu);
1416         regs->sprg2 = kvmppc_get_sprg2(vcpu);
1417         regs->sprg3 = kvmppc_get_sprg3(vcpu);
1418         regs->sprg4 = kvmppc_get_sprg4(vcpu);
1419         regs->sprg5 = kvmppc_get_sprg5(vcpu);
1420         regs->sprg6 = kvmppc_get_sprg6(vcpu);
1421         regs->sprg7 = kvmppc_get_sprg7(vcpu);
1422
1423         for (i = 0; i < ARRAY_SIZE(regs->gpr); i++)
1424                 regs->gpr[i] = kvmppc_get_gpr(vcpu, i);
1425
1426         vcpu_put(vcpu);
1427         return 0;
1428 }
1429
1430 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
1431 {
1432         int i;
1433
1434         vcpu_load(vcpu);
1435
1436         vcpu->arch.regs.nip = regs->pc;
1437         kvmppc_set_cr(vcpu, regs->cr);
1438         vcpu->arch.regs.ctr = regs->ctr;
1439         vcpu->arch.regs.link = regs->lr;
1440         kvmppc_set_xer(vcpu, regs->xer);
1441         kvmppc_set_msr(vcpu, regs->msr);
1442         kvmppc_set_srr0(vcpu, regs->srr0);
1443         kvmppc_set_srr1(vcpu, regs->srr1);
1444         kvmppc_set_pid(vcpu, regs->pid);
1445         kvmppc_set_sprg0(vcpu, regs->sprg0);
1446         kvmppc_set_sprg1(vcpu, regs->sprg1);
1447         kvmppc_set_sprg2(vcpu, regs->sprg2);
1448         kvmppc_set_sprg3(vcpu, regs->sprg3);
1449         kvmppc_set_sprg4(vcpu, regs->sprg4);
1450         kvmppc_set_sprg5(vcpu, regs->sprg5);
1451         kvmppc_set_sprg6(vcpu, regs->sprg6);
1452         kvmppc_set_sprg7(vcpu, regs->sprg7);
1453
1454         for (i = 0; i < ARRAY_SIZE(regs->gpr); i++)
1455                 kvmppc_set_gpr(vcpu, i, regs->gpr[i]);
1456
1457         vcpu_put(vcpu);
1458         return 0;
1459 }
1460
1461 static void get_sregs_base(struct kvm_vcpu *vcpu,
1462                            struct kvm_sregs *sregs)
1463 {
1464         u64 tb = get_tb();
1465
1466         sregs->u.e.features |= KVM_SREGS_E_BASE;
1467
1468         sregs->u.e.csrr0 = vcpu->arch.csrr0;
1469         sregs->u.e.csrr1 = vcpu->arch.csrr1;
1470         sregs->u.e.mcsr = vcpu->arch.mcsr;
1471         sregs->u.e.esr = kvmppc_get_esr(vcpu);
1472         sregs->u.e.dear = kvmppc_get_dar(vcpu);
1473         sregs->u.e.tsr = vcpu->arch.tsr;
1474         sregs->u.e.tcr = vcpu->arch.tcr;
1475         sregs->u.e.dec = kvmppc_get_dec(vcpu, tb);
1476         sregs->u.e.tb = tb;
1477         sregs->u.e.vrsave = vcpu->arch.vrsave;
1478 }
1479
1480 static int set_sregs_base(struct kvm_vcpu *vcpu,
1481                           struct kvm_sregs *sregs)
1482 {
1483         if (!(sregs->u.e.features & KVM_SREGS_E_BASE))
1484                 return 0;
1485
1486         vcpu->arch.csrr0 = sregs->u.e.csrr0;
1487         vcpu->arch.csrr1 = sregs->u.e.csrr1;
1488         vcpu->arch.mcsr = sregs->u.e.mcsr;
1489         kvmppc_set_esr(vcpu, sregs->u.e.esr);
1490         kvmppc_set_dar(vcpu, sregs->u.e.dear);
1491         vcpu->arch.vrsave = sregs->u.e.vrsave;
1492         kvmppc_set_tcr(vcpu, sregs->u.e.tcr);
1493
1494         if (sregs->u.e.update_special & KVM_SREGS_E_UPDATE_DEC) {
1495                 vcpu->arch.dec = sregs->u.e.dec;
1496                 kvmppc_emulate_dec(vcpu);
1497         }
1498
1499         if (sregs->u.e.update_special & KVM_SREGS_E_UPDATE_TSR)
1500                 kvmppc_set_tsr(vcpu, sregs->u.e.tsr);
1501
1502         return 0;
1503 }
1504
1505 static void get_sregs_arch206(struct kvm_vcpu *vcpu,
1506                               struct kvm_sregs *sregs)
1507 {
1508         sregs->u.e.features |= KVM_SREGS_E_ARCH206;
1509
1510         sregs->u.e.pir = vcpu->vcpu_id;
1511         sregs->u.e.mcsrr0 = vcpu->arch.mcsrr0;
1512         sregs->u.e.mcsrr1 = vcpu->arch.mcsrr1;
1513         sregs->u.e.decar = vcpu->arch.decar;
1514         sregs->u.e.ivpr = vcpu->arch.ivpr;
1515 }
1516
1517 static int set_sregs_arch206(struct kvm_vcpu *vcpu,
1518                              struct kvm_sregs *sregs)
1519 {
1520         if (!(sregs->u.e.features & KVM_SREGS_E_ARCH206))
1521                 return 0;
1522
1523         if (sregs->u.e.pir != vcpu->vcpu_id)
1524                 return -EINVAL;
1525
1526         vcpu->arch.mcsrr0 = sregs->u.e.mcsrr0;
1527         vcpu->arch.mcsrr1 = sregs->u.e.mcsrr1;
1528         vcpu->arch.decar = sregs->u.e.decar;
1529         vcpu->arch.ivpr = sregs->u.e.ivpr;
1530
1531         return 0;
1532 }
1533
1534 int kvmppc_get_sregs_ivor(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
1535 {
1536         sregs->u.e.features |= KVM_SREGS_E_IVOR;
1537
1538         sregs->u.e.ivor_low[0] = vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL];
1539         sregs->u.e.ivor_low[1] = vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK];
1540         sregs->u.e.ivor_low[2] = vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE];
1541         sregs->u.e.ivor_low[3] = vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE];
1542         sregs->u.e.ivor_low[4] = vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL];
1543         sregs->u.e.ivor_low[5] = vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT];
1544         sregs->u.e.ivor_low[6] = vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM];
1545         sregs->u.e.ivor_low[7] = vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL];
1546         sregs->u.e.ivor_low[8] = vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL];
1547         sregs->u.e.ivor_low[9] = vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL];
1548         sregs->u.e.ivor_low[10] = vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER];
1549         sregs->u.e.ivor_low[11] = vcpu->arch.ivor[BOOKE_IRQPRIO_FIT];
1550         sregs->u.e.ivor_low[12] = vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG];
1551         sregs->u.e.ivor_low[13] = vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS];
1552         sregs->u.e.ivor_low[14] = vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS];
1553         sregs->u.e.ivor_low[15] = vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG];
1554         return 0;
1555 }
1556
1557 int kvmppc_set_sregs_ivor(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
1558 {
1559         if (!(sregs->u.e.features & KVM_SREGS_E_IVOR))
1560                 return 0;
1561
1562         vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL] = sregs->u.e.ivor_low[0];
1563         vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK] = sregs->u.e.ivor_low[1];
1564         vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE] = sregs->u.e.ivor_low[2];
1565         vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE] = sregs->u.e.ivor_low[3];
1566         vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL] = sregs->u.e.ivor_low[4];
1567         vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT] = sregs->u.e.ivor_low[5];
1568         vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM] = sregs->u.e.ivor_low[6];
1569         vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL] = sregs->u.e.ivor_low[7];
1570         vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL] = sregs->u.e.ivor_low[8];
1571         vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL] = sregs->u.e.ivor_low[9];
1572         vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER] = sregs->u.e.ivor_low[10];
1573         vcpu->arch.ivor[BOOKE_IRQPRIO_FIT] = sregs->u.e.ivor_low[11];
1574         vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG] = sregs->u.e.ivor_low[12];
1575         vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS] = sregs->u.e.ivor_low[13];
1576         vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS] = sregs->u.e.ivor_low[14];
1577         vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG] = sregs->u.e.ivor_low[15];
1578
1579         return 0;
1580 }
1581
1582 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
1583                                   struct kvm_sregs *sregs)
1584 {
1585         int ret;
1586
1587         vcpu_load(vcpu);
1588
1589         sregs->pvr = vcpu->arch.pvr;
1590
1591         get_sregs_base(vcpu, sregs);
1592         get_sregs_arch206(vcpu, sregs);
1593         ret = vcpu->kvm->arch.kvm_ops->get_sregs(vcpu, sregs);
1594
1595         vcpu_put(vcpu);
1596         return ret;
1597 }
1598
1599 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
1600                                   struct kvm_sregs *sregs)
1601 {
1602         int ret = -EINVAL;
1603
1604         vcpu_load(vcpu);
1605         if (vcpu->arch.pvr != sregs->pvr)
1606                 goto out;
1607
1608         ret = set_sregs_base(vcpu, sregs);
1609         if (ret < 0)
1610                 goto out;
1611
1612         ret = set_sregs_arch206(vcpu, sregs);
1613         if (ret < 0)
1614                 goto out;
1615
1616         ret = vcpu->kvm->arch.kvm_ops->set_sregs(vcpu, sregs);
1617
1618 out:
1619         vcpu_put(vcpu);
1620         return ret;
1621 }
1622
1623 int kvmppc_get_one_reg(struct kvm_vcpu *vcpu, u64 id,
1624                         union kvmppc_one_reg *val)
1625 {
1626         int r = 0;
1627
1628         switch (id) {
1629         case KVM_REG_PPC_IAC1:
1630                 *val = get_reg_val(id, vcpu->arch.dbg_reg.iac1);
1631                 break;
1632         case KVM_REG_PPC_IAC2:
1633                 *val = get_reg_val(id, vcpu->arch.dbg_reg.iac2);
1634                 break;
1635 #if CONFIG_PPC_ADV_DEBUG_IACS > 2
1636         case KVM_REG_PPC_IAC3:
1637                 *val = get_reg_val(id, vcpu->arch.dbg_reg.iac3);
1638                 break;
1639         case KVM_REG_PPC_IAC4:
1640                 *val = get_reg_val(id, vcpu->arch.dbg_reg.iac4);
1641                 break;
1642 #endif
1643         case KVM_REG_PPC_DAC1:
1644                 *val = get_reg_val(id, vcpu->arch.dbg_reg.dac1);
1645                 break;
1646         case KVM_REG_PPC_DAC2:
1647                 *val = get_reg_val(id, vcpu->arch.dbg_reg.dac2);
1648                 break;
1649         case KVM_REG_PPC_EPR: {
1650                 u32 epr = kvmppc_get_epr(vcpu);
1651                 *val = get_reg_val(id, epr);
1652                 break;
1653         }
1654 #if defined(CONFIG_64BIT)
1655         case KVM_REG_PPC_EPCR:
1656                 *val = get_reg_val(id, vcpu->arch.epcr);
1657                 break;
1658 #endif
1659         case KVM_REG_PPC_TCR:
1660                 *val = get_reg_val(id, vcpu->arch.tcr);
1661                 break;
1662         case KVM_REG_PPC_TSR:
1663                 *val = get_reg_val(id, vcpu->arch.tsr);
1664                 break;
1665         case KVM_REG_PPC_DEBUG_INST:
1666                 *val = get_reg_val(id, KVMPPC_INST_SW_BREAKPOINT);
1667                 break;
1668         case KVM_REG_PPC_VRSAVE:
1669                 *val = get_reg_val(id, vcpu->arch.vrsave);
1670                 break;
1671         default:
1672                 r = vcpu->kvm->arch.kvm_ops->get_one_reg(vcpu, id, val);
1673                 break;
1674         }
1675
1676         return r;
1677 }
1678
1679 int kvmppc_set_one_reg(struct kvm_vcpu *vcpu, u64 id,
1680                         union kvmppc_one_reg *val)
1681 {
1682         int r = 0;
1683
1684         switch (id) {
1685         case KVM_REG_PPC_IAC1:
1686                 vcpu->arch.dbg_reg.iac1 = set_reg_val(id, *val);
1687                 break;
1688         case KVM_REG_PPC_IAC2:
1689                 vcpu->arch.dbg_reg.iac2 = set_reg_val(id, *val);
1690                 break;
1691 #if CONFIG_PPC_ADV_DEBUG_IACS > 2
1692         case KVM_REG_PPC_IAC3:
1693                 vcpu->arch.dbg_reg.iac3 = set_reg_val(id, *val);
1694                 break;
1695         case KVM_REG_PPC_IAC4:
1696                 vcpu->arch.dbg_reg.iac4 = set_reg_val(id, *val);
1697                 break;
1698 #endif
1699         case KVM_REG_PPC_DAC1:
1700                 vcpu->arch.dbg_reg.dac1 = set_reg_val(id, *val);
1701                 break;
1702         case KVM_REG_PPC_DAC2:
1703                 vcpu->arch.dbg_reg.dac2 = set_reg_val(id, *val);
1704                 break;
1705         case KVM_REG_PPC_EPR: {
1706                 u32 new_epr = set_reg_val(id, *val);
1707                 kvmppc_set_epr(vcpu, new_epr);
1708                 break;
1709         }
1710 #if defined(CONFIG_64BIT)
1711         case KVM_REG_PPC_EPCR: {
1712                 u32 new_epcr = set_reg_val(id, *val);
1713                 kvmppc_set_epcr(vcpu, new_epcr);
1714                 break;
1715         }
1716 #endif
1717         case KVM_REG_PPC_OR_TSR: {
1718                 u32 tsr_bits = set_reg_val(id, *val);
1719                 kvmppc_set_tsr_bits(vcpu, tsr_bits);
1720                 break;
1721         }
1722         case KVM_REG_PPC_CLEAR_TSR: {
1723                 u32 tsr_bits = set_reg_val(id, *val);
1724                 kvmppc_clr_tsr_bits(vcpu, tsr_bits);
1725                 break;
1726         }
1727         case KVM_REG_PPC_TSR: {
1728                 u32 tsr = set_reg_val(id, *val);
1729                 kvmppc_set_tsr(vcpu, tsr);
1730                 break;
1731         }
1732         case KVM_REG_PPC_TCR: {
1733                 u32 tcr = set_reg_val(id, *val);
1734                 kvmppc_set_tcr(vcpu, tcr);
1735                 break;
1736         }
1737         case KVM_REG_PPC_VRSAVE:
1738                 vcpu->arch.vrsave = set_reg_val(id, *val);
1739                 break;
1740         default:
1741                 r = vcpu->kvm->arch.kvm_ops->set_one_reg(vcpu, id, val);
1742                 break;
1743         }
1744
1745         return r;
1746 }
1747
1748 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
1749 {
1750         return -EOPNOTSUPP;
1751 }
1752
1753 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
1754 {
1755         return -EOPNOTSUPP;
1756 }
1757
1758 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
1759                                   struct kvm_translation *tr)
1760 {
1761         int r;
1762
1763         vcpu_load(vcpu);
1764         r = kvmppc_core_vcpu_translate(vcpu, tr);
1765         vcpu_put(vcpu);
1766         return r;
1767 }
1768
1769 void kvm_arch_sync_dirty_log(struct kvm *kvm, struct kvm_memory_slot *memslot)
1770 {
1771
1772 }
1773
1774 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
1775 {
1776         return -EOPNOTSUPP;
1777 }
1778
1779 void kvmppc_core_free_memslot(struct kvm *kvm, struct kvm_memory_slot *slot)
1780 {
1781 }
1782
1783 int kvmppc_core_prepare_memory_region(struct kvm *kvm,
1784                                       struct kvm_memory_slot *memslot,
1785                                       const struct kvm_userspace_memory_region *mem,
1786                                       enum kvm_mr_change change)
1787 {
1788         return 0;
1789 }
1790
1791 void kvmppc_core_commit_memory_region(struct kvm *kvm,
1792                                 const struct kvm_userspace_memory_region *mem,
1793                                 const struct kvm_memory_slot *old,
1794                                 const struct kvm_memory_slot *new,
1795                                 enum kvm_mr_change change)
1796 {
1797 }
1798
1799 void kvmppc_core_flush_memslot(struct kvm *kvm, struct kvm_memory_slot *memslot)
1800 {
1801 }
1802
1803 void kvmppc_set_epcr(struct kvm_vcpu *vcpu, u32 new_epcr)
1804 {
1805 #if defined(CONFIG_64BIT)
1806         vcpu->arch.epcr = new_epcr;
1807 #ifdef CONFIG_KVM_BOOKE_HV
1808         vcpu->arch.shadow_epcr &= ~SPRN_EPCR_GICM;
1809         if (vcpu->arch.epcr  & SPRN_EPCR_ICM)
1810                 vcpu->arch.shadow_epcr |= SPRN_EPCR_GICM;
1811 #endif
1812 #endif
1813 }
1814
1815 void kvmppc_set_tcr(struct kvm_vcpu *vcpu, u32 new_tcr)
1816 {
1817         vcpu->arch.tcr = new_tcr;
1818         arm_next_watchdog(vcpu);
1819         update_timer_ints(vcpu);
1820 }
1821
1822 void kvmppc_set_tsr_bits(struct kvm_vcpu *vcpu, u32 tsr_bits)
1823 {
1824         set_bits(tsr_bits, &vcpu->arch.tsr);
1825         smp_wmb();
1826         kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
1827         kvm_vcpu_kick(vcpu);
1828 }
1829
1830 void kvmppc_clr_tsr_bits(struct kvm_vcpu *vcpu, u32 tsr_bits)
1831 {
1832         clear_bits(tsr_bits, &vcpu->arch.tsr);
1833
1834         /*
1835          * We may have stopped the watchdog due to
1836          * being stuck on final expiration.
1837          */
1838         if (tsr_bits & (TSR_ENW | TSR_WIS))
1839                 arm_next_watchdog(vcpu);
1840
1841         update_timer_ints(vcpu);
1842 }
1843
1844 void kvmppc_decrementer_func(struct kvm_vcpu *vcpu)
1845 {
1846         if (vcpu->arch.tcr & TCR_ARE) {
1847                 vcpu->arch.dec = vcpu->arch.decar;
1848                 kvmppc_emulate_dec(vcpu);
1849         }
1850
1851         kvmppc_set_tsr_bits(vcpu, TSR_DIS);
1852 }
1853
1854 static int kvmppc_booke_add_breakpoint(struct debug_reg *dbg_reg,
1855                                        uint64_t addr, int index)
1856 {
1857         switch (index) {
1858         case 0:
1859                 dbg_reg->dbcr0 |= DBCR0_IAC1;
1860                 dbg_reg->iac1 = addr;
1861                 break;
1862         case 1:
1863                 dbg_reg->dbcr0 |= DBCR0_IAC2;
1864                 dbg_reg->iac2 = addr;
1865                 break;
1866 #if CONFIG_PPC_ADV_DEBUG_IACS > 2
1867         case 2:
1868                 dbg_reg->dbcr0 |= DBCR0_IAC3;
1869                 dbg_reg->iac3 = addr;
1870                 break;
1871         case 3:
1872                 dbg_reg->dbcr0 |= DBCR0_IAC4;
1873                 dbg_reg->iac4 = addr;
1874                 break;
1875 #endif
1876         default:
1877                 return -EINVAL;
1878         }
1879
1880         dbg_reg->dbcr0 |= DBCR0_IDM;
1881         return 0;
1882 }
1883
1884 static int kvmppc_booke_add_watchpoint(struct debug_reg *dbg_reg, uint64_t addr,
1885                                        int type, int index)
1886 {
1887         switch (index) {
1888         case 0:
1889                 if (type & KVMPPC_DEBUG_WATCH_READ)
1890                         dbg_reg->dbcr0 |= DBCR0_DAC1R;
1891                 if (type & KVMPPC_DEBUG_WATCH_WRITE)
1892                         dbg_reg->dbcr0 |= DBCR0_DAC1W;
1893                 dbg_reg->dac1 = addr;
1894                 break;
1895         case 1:
1896                 if (type & KVMPPC_DEBUG_WATCH_READ)
1897                         dbg_reg->dbcr0 |= DBCR0_DAC2R;
1898                 if (type & KVMPPC_DEBUG_WATCH_WRITE)
1899                         dbg_reg->dbcr0 |= DBCR0_DAC2W;
1900                 dbg_reg->dac2 = addr;
1901                 break;
1902         default:
1903                 return -EINVAL;
1904         }
1905
1906         dbg_reg->dbcr0 |= DBCR0_IDM;
1907         return 0;
1908 }
1909 void kvm_guest_protect_msr(struct kvm_vcpu *vcpu, ulong prot_bitmap, bool set)
1910 {
1911         /* XXX: Add similar MSR protection for BookE-PR */
1912 #ifdef CONFIG_KVM_BOOKE_HV
1913         BUG_ON(prot_bitmap & ~(MSRP_UCLEP | MSRP_DEP | MSRP_PMMP));
1914         if (set) {
1915                 if (prot_bitmap & MSR_UCLE)
1916                         vcpu->arch.shadow_msrp |= MSRP_UCLEP;
1917                 if (prot_bitmap & MSR_DE)
1918                         vcpu->arch.shadow_msrp |= MSRP_DEP;
1919                 if (prot_bitmap & MSR_PMM)
1920                         vcpu->arch.shadow_msrp |= MSRP_PMMP;
1921         } else {
1922                 if (prot_bitmap & MSR_UCLE)
1923                         vcpu->arch.shadow_msrp &= ~MSRP_UCLEP;
1924                 if (prot_bitmap & MSR_DE)
1925                         vcpu->arch.shadow_msrp &= ~MSRP_DEP;
1926                 if (prot_bitmap & MSR_PMM)
1927                         vcpu->arch.shadow_msrp &= ~MSRP_PMMP;
1928         }
1929 #endif
1930 }
1931
1932 int kvmppc_xlate(struct kvm_vcpu *vcpu, ulong eaddr, enum xlate_instdata xlid,
1933                  enum xlate_readwrite xlrw, struct kvmppc_pte *pte)
1934 {
1935         int gtlb_index;
1936         gpa_t gpaddr;
1937
1938 #ifdef CONFIG_KVM_E500V2
1939         if (!(vcpu->arch.shared->msr & MSR_PR) &&
1940             (eaddr & PAGE_MASK) == vcpu->arch.magic_page_ea) {
1941                 pte->eaddr = eaddr;
1942                 pte->raddr = (vcpu->arch.magic_page_pa & PAGE_MASK) |
1943                              (eaddr & ~PAGE_MASK);
1944                 pte->vpage = eaddr >> PAGE_SHIFT;
1945                 pte->may_read = true;
1946                 pte->may_write = true;
1947                 pte->may_execute = true;
1948
1949                 return 0;
1950         }
1951 #endif
1952
1953         /* Check the guest TLB. */
1954         switch (xlid) {
1955         case XLATE_INST:
1956                 gtlb_index = kvmppc_mmu_itlb_index(vcpu, eaddr);
1957                 break;
1958         case XLATE_DATA:
1959                 gtlb_index = kvmppc_mmu_dtlb_index(vcpu, eaddr);
1960                 break;
1961         default:
1962                 BUG();
1963         }
1964
1965         /* Do we have a TLB entry at all? */
1966         if (gtlb_index < 0)
1967                 return -ENOENT;
1968
1969         gpaddr = kvmppc_mmu_xlate(vcpu, gtlb_index, eaddr);
1970
1971         pte->eaddr = eaddr;
1972         pte->raddr = (gpaddr & PAGE_MASK) | (eaddr & ~PAGE_MASK);
1973         pte->vpage = eaddr >> PAGE_SHIFT;
1974
1975         /* XXX read permissions from the guest TLB */
1976         pte->may_read = true;
1977         pte->may_write = true;
1978         pte->may_execute = true;
1979
1980         return 0;
1981 }
1982
1983 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
1984                                          struct kvm_guest_debug *dbg)
1985 {
1986         struct debug_reg *dbg_reg;
1987         int n, b = 0, w = 0;
1988         int ret = 0;
1989
1990         vcpu_load(vcpu);
1991
1992         if (!(dbg->control & KVM_GUESTDBG_ENABLE)) {
1993                 vcpu->arch.dbg_reg.dbcr0 = 0;
1994                 vcpu->guest_debug = 0;
1995                 kvm_guest_protect_msr(vcpu, MSR_DE, false);
1996                 goto out;
1997         }
1998
1999         kvm_guest_protect_msr(vcpu, MSR_DE, true);
2000         vcpu->guest_debug = dbg->control;
2001         vcpu->arch.dbg_reg.dbcr0 = 0;
2002
2003         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
2004                 vcpu->arch.dbg_reg.dbcr0 |= DBCR0_IDM | DBCR0_IC;
2005
2006         /* Code below handles only HW breakpoints */
2007         dbg_reg = &(vcpu->arch.dbg_reg);
2008
2009 #ifdef CONFIG_KVM_BOOKE_HV
2010         /*
2011          * On BookE-HV (e500mc) the guest is always executed with MSR.GS=1
2012          * DBCR1 and DBCR2 are set to trigger debug events when MSR.PR is 0
2013          */
2014         dbg_reg->dbcr1 = 0;
2015         dbg_reg->dbcr2 = 0;
2016 #else
2017         /*
2018          * On BookE-PR (e500v2) the guest is always executed with MSR.PR=1
2019          * We set DBCR1 and DBCR2 to only trigger debug events when MSR.PR
2020          * is set.
2021          */
2022         dbg_reg->dbcr1 = DBCR1_IAC1US | DBCR1_IAC2US | DBCR1_IAC3US |
2023                           DBCR1_IAC4US;
2024         dbg_reg->dbcr2 = DBCR2_DAC1US | DBCR2_DAC2US;
2025 #endif
2026
2027         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
2028                 goto out;
2029
2030         ret = -EINVAL;
2031         for (n = 0; n < (KVMPPC_BOOKE_IAC_NUM + KVMPPC_BOOKE_DAC_NUM); n++) {
2032                 uint64_t addr = dbg->arch.bp[n].addr;
2033                 uint32_t type = dbg->arch.bp[n].type;
2034
2035                 if (type == KVMPPC_DEBUG_NONE)
2036                         continue;
2037
2038                 if (type & ~(KVMPPC_DEBUG_WATCH_READ |
2039                              KVMPPC_DEBUG_WATCH_WRITE |
2040                              KVMPPC_DEBUG_BREAKPOINT))
2041                         goto out;
2042
2043                 if (type & KVMPPC_DEBUG_BREAKPOINT) {
2044                         /* Setting H/W breakpoint */
2045                         if (kvmppc_booke_add_breakpoint(dbg_reg, addr, b++))
2046                                 goto out;
2047                 } else {
2048                         /* Setting H/W watchpoint */
2049                         if (kvmppc_booke_add_watchpoint(dbg_reg, addr,
2050                                                         type, w++))
2051                                 goto out;
2052                 }
2053         }
2054
2055         ret = 0;
2056 out:
2057         vcpu_put(vcpu);
2058         return ret;
2059 }
2060
2061 void kvmppc_booke_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2062 {
2063         vcpu->cpu = smp_processor_id();
2064         current->thread.kvm_vcpu = vcpu;
2065 }
2066
2067 void kvmppc_booke_vcpu_put(struct kvm_vcpu *vcpu)
2068 {
2069         current->thread.kvm_vcpu = NULL;
2070         vcpu->cpu = -1;
2071
2072         /* Clear pending debug event in DBSR */
2073         kvmppc_clear_dbsr();
2074 }
2075
2076 int kvmppc_core_init_vm(struct kvm *kvm)
2077 {
2078         return kvm->arch.kvm_ops->init_vm(kvm);
2079 }
2080
2081 int kvmppc_core_vcpu_create(struct kvm_vcpu *vcpu)
2082 {
2083         int i;
2084         int r;
2085
2086         r = vcpu->kvm->arch.kvm_ops->vcpu_create(vcpu);
2087         if (r)
2088                 return r;
2089
2090         /* Initial guest state: 16MB mapping 0 -> 0, PC = 0, MSR = 0, R1 = 16MB */
2091         vcpu->arch.regs.nip = 0;
2092         vcpu->arch.shared->pir = vcpu->vcpu_id;
2093         kvmppc_set_gpr(vcpu, 1, (16<<20) - 8); /* -8 for the callee-save LR slot */
2094         kvmppc_set_msr(vcpu, 0);
2095
2096 #ifndef CONFIG_KVM_BOOKE_HV
2097         vcpu->arch.shadow_msr = MSR_USER | MSR_IS | MSR_DS;
2098         vcpu->arch.shadow_pid = 1;
2099         vcpu->arch.shared->msr = 0;
2100 #endif
2101
2102         /* Eye-catching numbers so we know if the guest takes an interrupt
2103          * before it's programmed its own IVPR/IVORs. */
2104         vcpu->arch.ivpr = 0x55550000;
2105         for (i = 0; i < BOOKE_IRQPRIO_MAX; i++)
2106                 vcpu->arch.ivor[i] = 0x7700 | i * 4;
2107
2108         kvmppc_init_timing_stats(vcpu);
2109
2110         r = kvmppc_core_vcpu_setup(vcpu);
2111         if (r)
2112                 vcpu->kvm->arch.kvm_ops->vcpu_free(vcpu);
2113         kvmppc_sanity_check(vcpu);
2114         return r;
2115 }
2116
2117 void kvmppc_core_vcpu_free(struct kvm_vcpu *vcpu)
2118 {
2119         vcpu->kvm->arch.kvm_ops->vcpu_free(vcpu);
2120 }
2121
2122 void kvmppc_core_destroy_vm(struct kvm *kvm)
2123 {
2124         kvm->arch.kvm_ops->destroy_vm(kvm);
2125 }
2126
2127 void kvmppc_core_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2128 {
2129         vcpu->kvm->arch.kvm_ops->vcpu_load(vcpu, cpu);
2130 }
2131
2132 void kvmppc_core_vcpu_put(struct kvm_vcpu *vcpu)
2133 {
2134         vcpu->kvm->arch.kvm_ops->vcpu_put(vcpu);
2135 }
2136
2137 int __init kvmppc_booke_init(void)
2138 {
2139 #ifndef CONFIG_KVM_BOOKE_HV
2140         unsigned long ivor[16];
2141         unsigned long *handler = kvmppc_booke_handler_addr;
2142         unsigned long max_ivor = 0;
2143         unsigned long handler_len;
2144         int i;
2145
2146         /* We install our own exception handlers by hijacking IVPR. IVPR must
2147          * be 16-bit aligned, so we need a 64KB allocation. */
2148         kvmppc_booke_handlers = __get_free_pages(GFP_KERNEL | __GFP_ZERO,
2149                                                  VCPU_SIZE_ORDER);
2150         if (!kvmppc_booke_handlers)
2151                 return -ENOMEM;
2152
2153         /* XXX make sure our handlers are smaller than Linux's */
2154
2155         /* Copy our interrupt handlers to match host IVORs. That way we don't
2156          * have to swap the IVORs on every guest/host transition. */
2157         ivor[0] = mfspr(SPRN_IVOR0);
2158         ivor[1] = mfspr(SPRN_IVOR1);
2159         ivor[2] = mfspr(SPRN_IVOR2);
2160         ivor[3] = mfspr(SPRN_IVOR3);
2161         ivor[4] = mfspr(SPRN_IVOR4);
2162         ivor[5] = mfspr(SPRN_IVOR5);
2163         ivor[6] = mfspr(SPRN_IVOR6);
2164         ivor[7] = mfspr(SPRN_IVOR7);
2165         ivor[8] = mfspr(SPRN_IVOR8);
2166         ivor[9] = mfspr(SPRN_IVOR9);
2167         ivor[10] = mfspr(SPRN_IVOR10);
2168         ivor[11] = mfspr(SPRN_IVOR11);
2169         ivor[12] = mfspr(SPRN_IVOR12);
2170         ivor[13] = mfspr(SPRN_IVOR13);
2171         ivor[14] = mfspr(SPRN_IVOR14);
2172         ivor[15] = mfspr(SPRN_IVOR15);
2173
2174         for (i = 0; i < 16; i++) {
2175                 if (ivor[i] > max_ivor)
2176                         max_ivor = i;
2177
2178                 handler_len = handler[i + 1] - handler[i];
2179                 memcpy((void *)kvmppc_booke_handlers + ivor[i],
2180                        (void *)handler[i], handler_len);
2181         }
2182
2183         handler_len = handler[max_ivor + 1] - handler[max_ivor];
2184         flush_icache_range(kvmppc_booke_handlers, kvmppc_booke_handlers +
2185                            ivor[max_ivor] + handler_len);
2186 #endif /* !BOOKE_HV */
2187         return 0;
2188 }
2189
2190 void __exit kvmppc_booke_exit(void)
2191 {
2192         free_pages(kvmppc_booke_handlers, VCPU_SIZE_ORDER);
2193         kvm_exit();
2194 }