arch/mips/boot/dts/loongson/loongson64-2k1000.dtsi

   1 // SPDX-License-Identifier: GPL-2.0
   2
   3 /dts-v1/;
   4
   5 #include <dt-bindings/interrupt-controller/irq.h>
   6
   7 / {
   8         compatible = "loongson,loongson2k1000";
   9
  10         #address-cells = <2>;
  11         #size-cells = <2>;
  12
  13         cpus {
  14                 #address-cells = <1>;
  15                 #size-cells = <0>;
  16
  17                 cpu0: cpu@0 {
  18                         device_type = "cpu";
  19                         compatible = "loongson,gs264";
  20                         reg = <0x0>;
  21                         #clock-cells = <1>;
  22                         clocks = <&cpu_clk>;
  23                 };
  24         };
  25
  26         memory {
  27                 compatible = "memory";
  28                 device_type = "memory";
  29                 reg = <0x00000000 0x00200000 0x00000000 0x0ee00000>, /* 238 MB at 2 MB */
  30                         <0x00000000 0x20000000 0x00000000 0x1f000000>, /* 496 MB at 512 MB */
  31                         <0x00000001 0x10000000 0x00000001 0xb0000000>; /* 6912 MB at 4352MB */
  32         };
  33
  34         cpu_clk: cpu_clk {
  35                 #clock-cells = <0>;
  36                 compatible = "fixed-clock";
  37                 clock-frequency = <800000000>;
  38         };
  39
  40         cpuintc: interrupt-controller {
  41                 #address-cells = <0>;
  42                 #interrupt-cells = <1>;
  43                 interrupt-controller;
  44                 compatible = "mti,cpu-interrupt-controller";
  45         };
  46
  47         package0: bus@10000000 {
  48                 compatible = "simple-bus";
  49                 #address-cells = <2>;
  50                 #size-cells = <2>;
  51                 ranges = <0 0x10000000 0 0x10000000 0 0x10000000 /* ioports */
  52                         0 0x40000000 0 0x40000000 0 0x40000000
  53                         0xfe 0x00000000 0xfe 0x00000000 0 0x40000000>;
  54
  55                 liointc0: interrupt-controller@1fe11400 {
  56                         compatible = "loongson,liointc-2.0";
  57                         reg = <0 0x1fe11400 0 0x40>,
  58                                 <0 0x1fe11040 0 0x8>,
  59                                 <0 0x1fe11140 0 0x8>;
  60                         reg-names = "main", "isr0", "isr1";
  61
  62                         interrupt-controller;
  63                         #interrupt-cells = <2>;
  64
  65                         interrupt-parent = <&cpuintc>;
  66                         interrupts = <2>;
  67                         interrupt-names = "int0";
  68
  69                         loongson,parent_int_map = <0xffffffff>, /* int0 */
  70                                                 <0x00000000>, /* int1 */
  71                                                 <0x00000000>, /* int2 */
  72                                                 <0x00000000>; /* int3 */
  73                 };
  74
  75                 liointc1: interrupt-controller@1fe11440 {
  76                         compatible = "loongson,liointc-2.0";
  77                         reg = <0 0x1fe11440 0 0x40>,
  78                                 <0 0x1fe11048 0 0x8>,
  79                                 <0 0x1fe11148 0 0x8>;
  80                         reg-names = "main", "isr0", "isr1";
  81
  82                         interrupt-controller;
  83                         #interrupt-cells = <2>;
  84
  85                         interrupt-parent = <&cpuintc>;
  86                         interrupts = <3>;
  87                         interrupt-names = "int1";
  88
  89                         loongson,parent_int_map = <0x00000000>, /* int0 */
  90                                                 <0xffffffff>, /* int1 */
  91                                                 <0x00000000>, /* int2 */
  92                                                 <0x00000000>; /* int3 */
  93                 };
  94
  95                 uart0: serial@1fe00000 {
  96                         compatible = "ns16550a";
  97                         reg = <0 0x1fe00000 0 0x8>;
  98                         clock-frequency = <125000000>;
  99                         interrupt-parent = <&liointc0>;
 100                         interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
 101                         no-loopback-test;
 102                 };
 103
 104                 pci@1a000000 {
 105                         compatible = "loongson,ls2k-pci";
 106                         device_type = "pci";
 107                         #address-cells = <3>;
 108                         #size-cells = <2>;
 109                         #interrupt-cells = <2>;
 110
 111                         reg = <0 0x1a000000 0 0x02000000>,
 112                                 <0xfe 0x00000000 0 0x20000000>;
 113
 114                         ranges = <0x01000000 0x0 0x00000000 0x0 0x18000000  0x0 0x00010000>,
 115                                  <0x02000000 0x0 0x40000000 0x0 0x40000000  0x0 0x40000000>;
 116
 117                         gmac@3,0 {
 118                                 compatible = "pci0014,7a03.0",
 119                                                    "pci0014,7a03",
 120                                                    "pciclass0c0320",
 121                                                    "pciclass0c03",
 122                                                    "loongson, pci-gmac";
 123
 124                                 reg = <0x1800 0x0 0x0 0x0 0x0>;
 125                                 interrupts = <12 IRQ_TYPE_LEVEL_LOW>,
 126                                              <13 IRQ_TYPE_LEVEL_LOW>;
 127                                 interrupt-names = "macirq", "eth_lpi";
 128                                 interrupt-parent = <&liointc0>;
 129                                 phy-mode = "rgmii";
 130                                 mdio {
 131                                         #address-cells = <1>;
 132                                         #size-cells = <0>;
 133                                         compatible = "snps,dwmac-mdio";
 134                                         phy0: ethernet-phy@0 {
 135                                                 reg = <0>;
 136                                         };
 137                                 };
 138                         };
 139
 140                         gmac@3,1 {
 141                                 compatible = "pci0014,7a03.0",
 142                                                    "pci0014,7a03",
 143                                                    "pciclass0c0320",
 144                                                    "pciclass0c03",
 145                                                    "loongson, pci-gmac";
 146
 147                                 reg = <0x1900 0x0 0x0 0x0 0x0>;
 148                                 interrupts = <14 IRQ_TYPE_LEVEL_LOW>,
 149                                              <15 IRQ_TYPE_LEVEL_LOW>;
 150                                 interrupt-names = "macirq", "eth_lpi";
 151                                 interrupt-parent = <&liointc0>;
 152                                 phy-mode = "rgmii";
 153                                 mdio {
 154                                         #address-cells = <1>;
 155                                         #size-cells = <0>;
 156                                         compatible = "snps,dwmac-mdio";
 157                                         phy1: ethernet-phy@1 {
 158                                                 reg = <0>;
 159                                         };
 160                                 };
 161                         };
 162
 163                         ehci@4,1 {
 164                                 compatible = "pci0014,7a14.0",
 165                                                    "pci0014,7a14",
 166                                                    "pciclass0c0320",
 167                                                    "pciclass0c03";
 168
 169                                 reg = <0x2100 0x0 0x0 0x0 0x0>;
 170                                 interrupts = <18 IRQ_TYPE_LEVEL_LOW>;
 171                                 interrupt-parent = <&liointc1>;
 172                         };
 173
 174                         ohci@4,2 {
 175                                 compatible = "pci0014,7a24.0",
 176                                                    "pci0014,7a24",
 177                                                    "pciclass0c0310",
 178                                                    "pciclass0c03";
 179
 180                                 reg = <0x2200 0x0 0x0 0x0 0x0>;
 181                                 interrupts = <19 IRQ_TYPE_LEVEL_LOW>;
 182                                 interrupt-parent = <&liointc1>;
 183                         };
 184
 185                         sata@8,0 {
 186                                 compatible = "pci0014,7a08.0",
 187                                                    "pci0014,7a08",
 188                                                    "pciclass010601",
 189                                                    "pciclass0106";
 190
 191                                 reg = <0x4000 0x0 0x0 0x0 0x0>;
 192                                 interrupts = <19 IRQ_TYPE_LEVEL_LOW>;
 193                                 interrupt-parent = <&liointc0>;
 194                         };
 195
 196                         pci_bridge@9,0 {
 197                                 compatible = "pci0014,7a19.0",
 198                                                    "pci0014,7a19",
 199                                                    "pciclass060400",
 200                                                    "pciclass0604";
 201
 202                                 reg = <0x4800 0x0 0x0 0x0 0x0>;
 203                                 #interrupt-cells = <1>;
 204                                 interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
 205                                 interrupt-parent = <&liointc1>;
 206                                 interrupt-map-mask = <0 0 0 0>;
 207                                 interrupt-map = <0 0 0 0 &liointc1 0 IRQ_TYPE_LEVEL_LOW>;
 208                                 external-facing;
 209                         };
 210
 211                         pci_bridge@a,0 {
 212                                 compatible = "pci0014,7a19.0",
 213                                                    "pci0014,7a19",
 214                                                    "pciclass060400",
 215                                                    "pciclass0604";
 216
 217                                 reg = <0x5000 0x0 0x0 0x0 0x0>;
 218                                 #interrupt-cells = <1>;
 219                                 interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
 220                                 interrupt-parent = <&liointc1>;
 221                                 interrupt-map-mask = <0 0 0 0>;
 222                                 interrupt-map = <0 0 0 0 &liointc1 1 IRQ_TYPE_LEVEL_LOW>;
 223                                 external-facing;
 224                         };
 225
 226                         pci_bridge@b,0 {
 227                                 compatible = "pci0014,7a19.0",
 228                                                    "pci0014,7a19",
 229                                                    "pciclass060400",
 230                                                    "pciclass0604";
 231
 232                                 reg = <0x5800 0x0 0x0 0x0 0x0>;
 233                                 #interrupt-cells = <1>;
 234                                 interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
 235                                 interrupt-parent = <&liointc1>;
 236                                 interrupt-map-mask = <0 0 0 0>;
 237                                 interrupt-map = <0 0 0 0 &liointc1 2 IRQ_TYPE_LEVEL_LOW>;
 238                                 external-facing;
 239                         };
 240
 241                         pci_bridge@c,0 {
 242                                 compatible = "pci0014,7a19.0",
 243                                                    "pci0014,7a19",
 244                                                    "pciclass060400",
 245                                                    "pciclass0604";
 246
 247                                 reg = <0x6000 0x0 0x0 0x0 0x0>;
 248                                 #interrupt-cells = <1>;
 249                                 interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
 250                                 interrupt-parent = <&liointc1>;
 251                                 interrupt-map-mask = <0 0 0 0>;
 252                                 interrupt-map = <0 0 0 0 &liointc1 3 IRQ_TYPE_LEVEL_LOW>;
 253                                 external-facing;
 254                         };
 255
 256                         pci_bridge@d,0 {
 257                                 compatible = "pci0014,7a19.0",
 258                                                    "pci0014,7a19",
 259                                                    "pciclass060400",
 260                                                    "pciclass0604";
 261
 262                                 reg = <0x6800 0x0 0x0 0x0 0x0>;
 263                                 #interrupt-cells = <1>;
 264                                 interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
 265                                 interrupt-parent = <&liointc1>;
 266                                 interrupt-map-mask = <0 0 0 0>;
 267                                 interrupt-map = <0 0 0 0 &liointc1 4 IRQ_TYPE_LEVEL_LOW>;
 268                                 external-facing;
 269                         };
 270
 271                         pci_bridge@e,0 {
 272                                 compatible = "pci0014,7a19.0",
 273                                                    "pci0014,7a19",
 274                                                    "pciclass060400",
 275                                                    "pciclass0604";
 276
 277                                 reg = <0x7000 0x0 0x0 0x0 0x0>;
 278                                 #interrupt-cells = <1>;
 279                                 interrupts = <5 IRQ_TYPE_LEVEL_LOW>;
 280                                 interrupt-parent = <&liointc1>;
 281                                 interrupt-map-mask = <0 0 0 0>;
 282                                 interrupt-map = <0 0 0 0 &liointc1 5 IRQ_TYPE_LEVEL_LOW>;
 283                                 external-facing;
 284                         };
 285
 286                 };
 287         };
 288 };
 289