1 # SPDX-License-Identifier: GPL-2.0
5 select ARCH_32BIT_OFF_T if !64BIT
6 select ARCH_BINFMT_ELF_STATE if MIPS_FP_SUPPORT
7 select ARCH_HAS_DEBUG_VIRTUAL if !64BIT
8 select ARCH_HAS_FORTIFY_SOURCE
10 select ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE if !EVA
11 select ARCH_HAS_PTE_SPECIAL if !(32BIT && CPU_HAS_RIXI)
12 select ARCH_HAS_STRNCPY_FROM_USER
13 select ARCH_HAS_STRNLEN_USER
14 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
15 select ARCH_HAS_UBSAN_SANITIZE_ALL
16 select ARCH_HAS_GCOV_PROFILE_ALL
17 select ARCH_KEEP_MEMBLOCK
18 select ARCH_SUPPORTS_UPROBES
19 select ARCH_USE_BUILTIN_BSWAP
20 select ARCH_USE_CMPXCHG_LOCKREF if 64BIT
21 select ARCH_USE_MEMTEST
22 select ARCH_USE_QUEUED_RWLOCKS
23 select ARCH_USE_QUEUED_SPINLOCKS
24 select ARCH_SUPPORTS_HUGETLBFS if CPU_SUPPORTS_HUGEPAGES
25 select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT if MMU
26 select ARCH_WANT_IPC_PARSE_VERSION
27 select ARCH_WANT_LD_ORPHAN_WARN
28 select BUILDTIME_TABLE_SORT
29 select CLONE_BACKWARDS
30 select CPU_NO_EFFICIENT_FFS if (TARGET_ISA_REV < 1)
31 select CPU_PM if CPU_IDLE
32 select GENERIC_ATOMIC64 if !64BIT
33 select GENERIC_CMOS_UPDATE
34 select GENERIC_CPU_AUTOPROBE
35 select GENERIC_FIND_FIRST_BIT
36 select GENERIC_GETTIMEOFDAY
38 select GENERIC_IRQ_PROBE
39 select GENERIC_IRQ_SHOW
40 select GENERIC_ISA_DMA if EISA
41 select GENERIC_LIB_ASHLDI3
42 select GENERIC_LIB_ASHRDI3
43 select GENERIC_LIB_CMPDI2
44 select GENERIC_LIB_LSHRDI3
45 select GENERIC_LIB_UCMPDI2
46 select GENERIC_SCHED_CLOCK if !CAVIUM_OCTEON_SOC
47 select GENERIC_SMP_IDLE_THREAD
48 select GENERIC_TIME_VSYSCALL
49 select GUP_GET_PTE_LOW_HIGH if CPU_MIPS32 && PHYS_ADDR_T_64BIT
50 select HANDLE_DOMAIN_IRQ
51 select HAVE_ARCH_COMPILER_H
52 select HAVE_ARCH_JUMP_LABEL
53 select HAVE_ARCH_KGDB if MIPS_FP_SUPPORT
54 select HAVE_ARCH_MMAP_RND_BITS if MMU
55 select HAVE_ARCH_MMAP_RND_COMPAT_BITS if MMU && COMPAT
56 select HAVE_ARCH_SECCOMP_FILTER
57 select HAVE_ARCH_TRACEHOOK
58 select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES
59 select HAVE_ASM_MODVERSIONS
60 select HAVE_CBPF_JIT if !64BIT && !CPU_MICROMIPS
61 select HAVE_CONTEXT_TRACKING
63 select HAVE_C_RECORDMCOUNT
64 select HAVE_DEBUG_KMEMLEAK
65 select HAVE_DEBUG_STACKOVERFLOW
66 select HAVE_DMA_CONTIGUOUS
67 select HAVE_DYNAMIC_FTRACE
68 select HAVE_EBPF_JIT if 64BIT && !CPU_MICROMIPS && TARGET_ISA_REV >= 2
69 select HAVE_EXIT_THREAD
71 select HAVE_FTRACE_MCOUNT_RECORD
72 select HAVE_FUNCTION_GRAPH_TRACER
73 select HAVE_FUNCTION_TRACER
74 select HAVE_GCC_PLUGINS
75 select HAVE_GENERIC_VDSO
76 select HAVE_IOREMAP_PROT
77 select HAVE_IRQ_EXIT_ON_IRQ_STACK
78 select HAVE_IRQ_TIME_ACCOUNTING
80 select HAVE_KRETPROBES
81 select HAVE_LD_DEAD_CODE_DATA_ELIMINATION
82 select HAVE_MOD_ARCH_SPECIFIC
84 select HAVE_PERF_EVENTS
86 select HAVE_PERF_USER_STACK_DUMP
87 select HAVE_REGS_AND_STACK_ACCESS_API
89 select HAVE_SPARSE_SYSCALL_NR
90 select HAVE_STACKPROTECTOR
91 select HAVE_SYSCALL_TRACEPOINTS
92 select HAVE_VIRT_CPU_ACCOUNTING_GEN if 64BIT || !SMP
93 select IRQ_FORCED_THREADING
95 select MODULES_USE_ELF_REL if MODULES
96 select MODULES_USE_ELF_RELA if MODULES && 64BIT
97 select PERF_USE_VMALLOC
98 select PCI_MSI_ARCH_FALLBACKS if PCI_MSI
100 select SYSCTL_EXCEPTION_TRACE
102 select ARCH_HAS_ELFCORE_COMPAT
104 config MIPS_FIXUP_BIGPHYS_ADDR
112 select SYS_SUPPORTS_32BIT_KERNEL
113 select SYS_SUPPORTS_LITTLE_ENDIAN
114 select SYS_SUPPORTS_ZBOOT
115 select DMA_NONCOHERENT
116 select ARCH_HAS_SYNC_DMA_FOR_CPU
121 select GENERIC_IRQ_CHIP
122 select BUILTIN_DTB if MIPS_NO_APPENDED_DTB
124 select CPU_SUPPORTS_CPUFREQ
125 select MIPS_EXTERNAL_TIMER
127 menu "Machine selection"
131 default MIPS_GENERIC_KERNEL
133 config MIPS_GENERIC_KERNEL
134 bool "Generic board-agnostic MIPS kernel"
135 select ARCH_HAS_SETUP_DMA_OPS
140 select CLKSRC_MIPS_GIC
142 select CPU_MIPSR2_IRQ_EI
143 select CPU_MIPSR2_IRQ_VI
145 select DMA_NONCOHERENT
148 select MIPS_AUTO_PFN_OFFSET
149 select MIPS_CPU_SCACHE
151 select MIPS_L1_CACHE_SHIFT_7
152 select NO_EXCEPT_FILL
153 select PCI_DRIVERS_GENERIC
156 select SYS_HAS_CPU_MIPS32_R1
157 select SYS_HAS_CPU_MIPS32_R2
158 select SYS_HAS_CPU_MIPS32_R6
159 select SYS_HAS_CPU_MIPS64_R1
160 select SYS_HAS_CPU_MIPS64_R2
161 select SYS_HAS_CPU_MIPS64_R6
162 select SYS_SUPPORTS_32BIT_KERNEL
163 select SYS_SUPPORTS_64BIT_KERNEL
164 select SYS_SUPPORTS_BIG_ENDIAN
165 select SYS_SUPPORTS_HIGHMEM
166 select SYS_SUPPORTS_LITTLE_ENDIAN
167 select SYS_SUPPORTS_MICROMIPS
168 select SYS_SUPPORTS_MIPS16
169 select SYS_SUPPORTS_MIPS_CPS
170 select SYS_SUPPORTS_MULTITHREADING
171 select SYS_SUPPORTS_RELOCATABLE
172 select SYS_SUPPORTS_SMARTMIPS
173 select SYS_SUPPORTS_ZBOOT
175 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
176 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
177 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
178 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
179 select USB_UHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
180 select USB_UHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
183 Select this to build a kernel which aims to support multiple boards,
184 generally using a flattened device tree passed from the bootloader
185 using the boot protocol defined in the UHI (Unified Hosting
186 Interface) specification.
189 bool "Alchemy processor based machines"
190 select PHYS_ADDR_T_64BIT
194 select DMA_NONCOHERENT # Au1000,1500,1100 aren't, rest is
195 select MIPS_FIXUP_BIGPHYS_ADDR if PCI
196 select SYS_HAS_CPU_MIPS32_R1
197 select SYS_SUPPORTS_32BIT_KERNEL
198 select SYS_SUPPORTS_APM_EMULATION
200 select SYS_SUPPORTS_ZBOOT
204 bool "Texas Instruments AR7"
207 select DMA_NONCOHERENT
211 select NO_EXCEPT_FILL
213 select SYS_HAS_CPU_MIPS32_R1
214 select SYS_HAS_EARLY_PRINTK
215 select SYS_SUPPORTS_32BIT_KERNEL
216 select SYS_SUPPORTS_LITTLE_ENDIAN
217 select SYS_SUPPORTS_MIPS16
218 select SYS_SUPPORTS_ZBOOT_UART16550
222 Support for the Texas Instruments AR7 System-on-a-Chip
223 family: TNETD7100, 7200 and 7300.
226 bool "Atheros AR231x/AR531x SoC support"
229 select DMA_NONCOHERENT
232 select SYS_HAS_CPU_MIPS32_R1
233 select SYS_SUPPORTS_BIG_ENDIAN
234 select SYS_SUPPORTS_32BIT_KERNEL
235 select SYS_HAS_EARLY_PRINTK
237 Support for Atheros AR231x and Atheros AR531x based boards
240 bool "Atheros AR71XX/AR724X/AR913X based boards"
241 select ARCH_HAS_RESET_CONTROLLER
245 select DMA_NONCOHERENT
250 select SYS_HAS_CPU_MIPS32_R2
251 select SYS_HAS_EARLY_PRINTK
252 select SYS_SUPPORTS_32BIT_KERNEL
253 select SYS_SUPPORTS_BIG_ENDIAN
254 select SYS_SUPPORTS_MIPS16
255 select SYS_SUPPORTS_ZBOOT_UART_PROM
257 select USB_EHCI_ROOT_HUB_TT if USB_EHCI_HCD_PLATFORM
259 Support for the Atheros AR71XX/AR724X/AR913X SoCs.
262 bool "Broadcom Generic BMIPS kernel"
263 select ARCH_HAS_RESET_CONTROLLER
264 select ARCH_HAS_SYNC_DMA_FOR_CPU_ALL
265 select ARCH_HAS_PHYS_TO_DMA
267 select NO_EXCEPT_FILL
273 select BCM6345_L1_IRQ
274 select BCM7038_L1_IRQ
275 select BCM7120_L2_IRQ
276 select BRCMSTB_L2_IRQ
278 select DMA_NONCOHERENT
279 select SYS_SUPPORTS_32BIT_KERNEL
280 select SYS_SUPPORTS_LITTLE_ENDIAN
281 select SYS_SUPPORTS_BIG_ENDIAN
282 select SYS_SUPPORTS_HIGHMEM
283 select SYS_HAS_CPU_BMIPS32_3300
284 select SYS_HAS_CPU_BMIPS4350
285 select SYS_HAS_CPU_BMIPS4380
286 select SYS_HAS_CPU_BMIPS5000
288 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
289 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
290 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
291 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
292 select HARDIRQS_SW_RESEND
294 Build a generic DT-based kernel image that boots on select
295 BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top
296 box chips. Note that CONFIG_CPU_BIG_ENDIAN/CONFIG_CPU_LITTLE_ENDIAN
297 must be set appropriately for your board.
300 bool "Broadcom BCM47XX based boards"
304 select DMA_NONCOHERENT
307 select SYS_HAS_CPU_MIPS32_R1
308 select NO_EXCEPT_FILL
309 select SYS_SUPPORTS_32BIT_KERNEL
310 select SYS_SUPPORTS_LITTLE_ENDIAN
311 select SYS_SUPPORTS_MIPS16
312 select SYS_SUPPORTS_ZBOOT
313 select SYS_HAS_EARLY_PRINTK
314 select USE_GENERIC_EARLY_PRINTK_8250
316 select LEDS_GPIO_REGISTER
319 select BCM47XX_SSB if !BCM47XX_BCMA
321 Support for BCM47XX based boards
324 bool "Broadcom BCM63XX based boards"
329 select DMA_NONCOHERENT
331 select SYS_SUPPORTS_32BIT_KERNEL
332 select SYS_SUPPORTS_BIG_ENDIAN
333 select SYS_HAS_EARLY_PRINTK
336 select MIPS_L1_CACHE_SHIFT_4
337 select HAVE_LEGACY_CLK
339 Support for BCM63XX based boards
346 select DMA_NONCOHERENT
352 select PCI_GT64XXX_PCI0
353 select SYS_HAS_CPU_NEVADA
354 select SYS_HAS_EARLY_PRINTK
355 select SYS_SUPPORTS_32BIT_KERNEL
356 select SYS_SUPPORTS_64BIT_KERNEL
357 select SYS_SUPPORTS_LITTLE_ENDIAN
358 select USE_GENERIC_EARLY_PRINTK_8250
360 config MACH_DECSTATION
364 select CEVT_R4K if CPU_R4X00
366 select CSRC_R4K if CPU_R4X00
367 select CPU_DADDI_WORKAROUNDS if 64BIT
368 select CPU_R4000_WORKAROUNDS if 64BIT
369 select CPU_R4400_WORKAROUNDS if 64BIT
370 select DMA_NONCOHERENT
373 select SYS_HAS_CPU_R3000
374 select SYS_HAS_CPU_R4X00
375 select SYS_SUPPORTS_32BIT_KERNEL
376 select SYS_SUPPORTS_64BIT_KERNEL
377 select SYS_SUPPORTS_LITTLE_ENDIAN
378 select SYS_SUPPORTS_128HZ
379 select SYS_SUPPORTS_256HZ
380 select SYS_SUPPORTS_1024HZ
381 select MIPS_L1_CACHE_SHIFT_4
383 This enables support for DEC's MIPS based workstations. For details
384 see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the
385 DECstation porting pages on <http://decstation.unix-ag.org/>.
387 If you have one of the following DECstation Models you definitely
388 want to choose R4xx0 for the CPU Type:
395 otherwise choose R3000.
398 bool "Jazz family of machines"
401 select ARCH_MIGHT_HAVE_PC_PARPORT
402 select ARCH_MIGHT_HAVE_PC_SERIO
406 select ARCH_MAY_HAVE_PC_FDC
409 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
410 select GENERIC_ISA_DMA
411 select HAVE_PCSPKR_PLATFORM
416 select SYS_HAS_CPU_R4X00
417 select SYS_SUPPORTS_32BIT_KERNEL
418 select SYS_SUPPORTS_64BIT_KERNEL
419 select SYS_SUPPORTS_100HZ
420 select SYS_SUPPORTS_LITTLE_ENDIAN
422 This a family of machines based on the MIPS R4030 chipset which was
423 used by several vendors to build RISC/os and Windows NT workstations.
424 Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and
425 Olivetti M700-10 workstations.
427 config MACH_INGENIC_SOC
428 bool "Ingenic SoC based machines"
431 select SYS_SUPPORTS_ZBOOT_UART16550
432 select CPU_SUPPORTS_CPUFREQ
433 select MIPS_EXTERNAL_TIMER
436 bool "Lantiq based platforms"
437 select DMA_NONCOHERENT
441 select SYS_HAS_CPU_MIPS32_R1
442 select SYS_HAS_CPU_MIPS32_R2
443 select SYS_SUPPORTS_BIG_ENDIAN
444 select SYS_SUPPORTS_32BIT_KERNEL
445 select SYS_SUPPORTS_MIPS16
446 select SYS_SUPPORTS_MULTITHREADING
447 select SYS_SUPPORTS_VPE_LOADER
448 select SYS_HAS_EARLY_PRINTK
452 select HAVE_LEGACY_CLK
455 select PINCTRL_LANTIQ
456 select ARCH_HAS_RESET_CONTROLLER
457 select RESET_CONTROLLER
459 config MACH_LOONGSON32
460 bool "Loongson 32-bit family of machines"
461 select SYS_SUPPORTS_ZBOOT
463 This enables support for the Loongson-1 family of machines.
465 Loongson-1 is a family of 32-bit MIPS-compatible SoCs developed by
466 the Institute of Computing Technology (ICT), Chinese Academy of
469 config MACH_LOONGSON2EF
470 bool "Loongson-2E/F family of machines"
471 select SYS_SUPPORTS_ZBOOT
473 This enables the support of early Loongson-2E/F family of machines.
475 config MACH_LOONGSON64
476 bool "Loongson 64-bit family of machines"
477 select ARCH_SPARSEMEM_ENABLE
478 select ARCH_MIGHT_HAVE_PC_PARPORT
479 select ARCH_MIGHT_HAVE_PC_SERIO
480 select GENERIC_ISA_DMA_SUPPORT_BROKEN
490 select NO_EXCEPT_FILL
491 select NR_CPUS_DEFAULT_64
492 select USE_GENERIC_EARLY_PRINTK_8250
493 select PCI_DRIVERS_GENERIC
494 select SYS_HAS_CPU_LOONGSON64
495 select SYS_HAS_EARLY_PRINTK
496 select SYS_SUPPORTS_SMP
497 select SYS_SUPPORTS_HOTPLUG_CPU
498 select SYS_SUPPORTS_NUMA
499 select SYS_SUPPORTS_64BIT_KERNEL
500 select SYS_SUPPORTS_HIGHMEM
501 select SYS_SUPPORTS_LITTLE_ENDIAN
502 select SYS_SUPPORTS_ZBOOT
503 select SYS_SUPPORTS_RELOCATABLE
508 select PCI_HOST_GENERIC
510 This enables the support of Loongson-2/3 family of machines.
512 Loongson-2 and Loongson-3 are 64-bit general-purpose processors with
513 GS264/GS464/GS464E/GS464V microarchitecture (except old Loongson-2E
514 and Loongson-2F which will be removed), developed by the Institute
515 of Computing Technology (ICT), Chinese Academy of Sciences (CAS).
517 config MACH_PISTACHIO
518 bool "IMG Pistachio SoC based boards"
522 select CLKSRC_MIPS_GIC
525 select DMA_NONCOHERENT
529 select MIPS_CPU_SCACHE
533 select SYS_HAS_CPU_MIPS32_R2
534 select SYS_SUPPORTS_32BIT_KERNEL
535 select SYS_SUPPORTS_LITTLE_ENDIAN
536 select SYS_SUPPORTS_MIPS_CPS
537 select SYS_SUPPORTS_MULTITHREADING
538 select SYS_SUPPORTS_RELOCATABLE
539 select SYS_SUPPORTS_ZBOOT
540 select SYS_HAS_EARLY_PRINTK
541 select USE_GENERIC_EARLY_PRINTK_8250
544 This enables support for the IMG Pistachio SoC platform.
547 bool "MIPS Malta board"
548 select ARCH_MAY_HAVE_PC_FDC
549 select ARCH_MIGHT_HAVE_PC_PARPORT
550 select ARCH_MIGHT_HAVE_PC_SERIO
555 select CLKSRC_MIPS_GIC
558 select DMA_NONCOHERENT
559 select GENERIC_ISA_DMA
560 select HAVE_PCSPKR_PLATFORM
566 select MIPS_CPU_SCACHE
568 select MIPS_L1_CACHE_SHIFT_6
570 select PCI_GT64XXX_PCI0
573 select SYS_HAS_CPU_MIPS32_R1
574 select SYS_HAS_CPU_MIPS32_R2
575 select SYS_HAS_CPU_MIPS32_R3_5
576 select SYS_HAS_CPU_MIPS32_R5
577 select SYS_HAS_CPU_MIPS32_R6
578 select SYS_HAS_CPU_MIPS64_R1
579 select SYS_HAS_CPU_MIPS64_R2
580 select SYS_HAS_CPU_MIPS64_R6
581 select SYS_HAS_CPU_NEVADA
582 select SYS_HAS_CPU_RM7000
583 select SYS_SUPPORTS_32BIT_KERNEL
584 select SYS_SUPPORTS_64BIT_KERNEL
585 select SYS_SUPPORTS_BIG_ENDIAN
586 select SYS_SUPPORTS_HIGHMEM
587 select SYS_SUPPORTS_LITTLE_ENDIAN
588 select SYS_SUPPORTS_MICROMIPS
589 select SYS_SUPPORTS_MIPS16
590 select SYS_SUPPORTS_MIPS_CMP
591 select SYS_SUPPORTS_MIPS_CPS
592 select SYS_SUPPORTS_MULTITHREADING
593 select SYS_SUPPORTS_RELOCATABLE
594 select SYS_SUPPORTS_SMARTMIPS
595 select SYS_SUPPORTS_VPE_LOADER
596 select SYS_SUPPORTS_ZBOOT
598 select WAR_ICACHE_REFILLS
599 select ZONE_DMA32 if 64BIT
601 This enables support for the MIPS Technologies Malta evaluation
605 bool "Microchip PIC32 Family"
607 This enables support for the Microchip PIC32 family of platforms.
609 Microchip PIC32 is a family of general-purpose 32 bit MIPS core
613 bool "NEC VR4100 series based machines"
616 select SYS_HAS_CPU_VR41XX
617 select SYS_SUPPORTS_MIPS16
620 config MACH_NINTENDO64
621 bool "Nintendo 64 console"
624 select SYS_HAS_CPU_R4300
625 select SYS_SUPPORTS_BIG_ENDIAN
626 select SYS_SUPPORTS_ZBOOT
627 select SYS_SUPPORTS_32BIT_KERNEL
628 select SYS_SUPPORTS_64BIT_KERNEL
629 select DMA_NONCOHERENT
633 bool "Ralink based machines"
638 select DMA_NONCOHERENT
641 select SYS_HAS_CPU_MIPS32_R1
642 select SYS_HAS_CPU_MIPS32_R2
643 select SYS_SUPPORTS_32BIT_KERNEL
644 select SYS_SUPPORTS_LITTLE_ENDIAN
645 select SYS_SUPPORTS_MIPS16
646 select SYS_SUPPORTS_ZBOOT
647 select SYS_HAS_EARLY_PRINTK
648 select ARCH_HAS_RESET_CONTROLLER
649 select RESET_CONTROLLER
651 config MACH_REALTEK_RTL
652 bool "Realtek RTL838x/RTL839x based machines"
654 select DMA_NONCOHERENT
658 select SYS_HAS_CPU_MIPS32_R1
659 select SYS_HAS_CPU_MIPS32_R2
660 select SYS_SUPPORTS_BIG_ENDIAN
661 select SYS_SUPPORTS_32BIT_KERNEL
662 select SYS_SUPPORTS_MIPS16
663 select SYS_SUPPORTS_MULTITHREADING
664 select SYS_SUPPORTS_VPE_LOADER
665 select SYS_HAS_EARLY_PRINTK
666 select SYS_HAS_EARLY_PRINTK_8250
667 select USE_GENERIC_EARLY_PRINTK_8250
673 bool "SGI IP22 (Indy/Indigo2)"
678 select ARCH_MIGHT_HAVE_PC_SERIO
682 select DEFAULT_SGI_PARTITION
683 select DMA_NONCOHERENT
687 select IP22_CPU_SCACHE
689 select GENERIC_ISA_DMA_SUPPORT_BROKEN
691 select SGI_HAS_INDYDOG
697 select SYS_HAS_CPU_R4X00
698 select SYS_HAS_CPU_R5000
699 select SYS_HAS_EARLY_PRINTK
700 select SYS_SUPPORTS_32BIT_KERNEL
701 select SYS_SUPPORTS_64BIT_KERNEL
702 select SYS_SUPPORTS_BIG_ENDIAN
703 select WAR_R4600_V1_INDEX_ICACHEOP
704 select WAR_R4600_V1_HIT_CACHEOP
705 select WAR_R4600_V2_HIT_CACHEOP
706 select MIPS_L1_CACHE_SHIFT_7
708 This are the SGI Indy, Challenge S and Indigo2, as well as certain
709 OEM variants like the Tandem CMN B006S. To compile a Linux kernel
710 that runs on these, say Y here.
713 bool "SGI IP27 (Origin200/2000)"
714 select ARCH_HAS_PHYS_TO_DMA
715 select ARCH_SPARSEMEM_ENABLE
718 select ARC_CMDLINE_ONLY
720 select DEFAULT_SGI_PARTITION
722 select SYS_HAS_EARLY_PRINTK
725 select IRQ_DOMAIN_HIERARCHY
726 select NR_CPUS_DEFAULT_64
727 select PCI_DRIVERS_GENERIC
728 select PCI_XTALK_BRIDGE
729 select SYS_HAS_CPU_R10000
730 select SYS_SUPPORTS_64BIT_KERNEL
731 select SYS_SUPPORTS_BIG_ENDIAN
732 select SYS_SUPPORTS_NUMA
733 select SYS_SUPPORTS_SMP
734 select WAR_R10000_LLSC
735 select MIPS_L1_CACHE_SHIFT_7
738 This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics
739 workstations. To compile a Linux kernel that runs on these, say Y
743 bool "SGI IP28 (Indigo2 R10k)"
748 select ARCH_MIGHT_HAVE_PC_SERIO
752 select DEFAULT_SGI_PARTITION
753 select DMA_NONCOHERENT
754 select GENERIC_ISA_DMA_SUPPORT_BROKEN
760 select SGI_HAS_INDYDOG
766 select SYS_HAS_CPU_R10000
767 select SYS_HAS_EARLY_PRINTK
768 select SYS_SUPPORTS_64BIT_KERNEL
769 select SYS_SUPPORTS_BIG_ENDIAN
770 select WAR_R10000_LLSC
771 select MIPS_L1_CACHE_SHIFT_7
773 This is the SGI Indigo2 with R10000 processor. To compile a Linux
774 kernel that runs on these, say Y here.
777 bool "SGI IP30 (Octane/Octane2)"
778 select ARCH_HAS_PHYS_TO_DMA
785 select SYNC_R4K if SMP
789 select IRQ_DOMAIN_HIERARCHY
790 select NR_CPUS_DEFAULT_2
791 select PCI_DRIVERS_GENERIC
792 select PCI_XTALK_BRIDGE
793 select SYS_HAS_EARLY_PRINTK
794 select SYS_HAS_CPU_R10000
795 select SYS_SUPPORTS_64BIT_KERNEL
796 select SYS_SUPPORTS_BIG_ENDIAN
797 select SYS_SUPPORTS_SMP
798 select WAR_R10000_LLSC
799 select MIPS_L1_CACHE_SHIFT_7
802 These are the SGI Octane and Octane2 graphics workstations. To
803 compile a Linux kernel that runs on these, say Y here.
809 select ARCH_HAS_PHYS_TO_DMA
815 select DMA_NONCOHERENT
818 select R5000_CPU_SCACHE
819 select RM7000_CPU_SCACHE
820 select SYS_HAS_CPU_R5000
821 select SYS_HAS_CPU_R10000 if BROKEN
822 select SYS_HAS_CPU_RM7000
823 select SYS_HAS_CPU_NEVADA
824 select SYS_SUPPORTS_64BIT_KERNEL
825 select SYS_SUPPORTS_BIG_ENDIAN
826 select WAR_ICACHE_REFILLS
828 If you want this kernel to run on SGI O2 workstation, say Y here.
831 bool "Sibyte BCM91120C-CRhine"
833 select SIBYTE_BCM1120
835 select SYS_HAS_CPU_SB1
836 select SYS_SUPPORTS_BIG_ENDIAN
837 select SYS_SUPPORTS_LITTLE_ENDIAN
840 bool "Sibyte BCM91120x-Carmel"
842 select SIBYTE_BCM1120
844 select SYS_HAS_CPU_SB1
845 select SYS_SUPPORTS_BIG_ENDIAN
846 select SYS_SUPPORTS_LITTLE_ENDIAN
849 bool "Sibyte BCM91125C-CRhone"
851 select SIBYTE_BCM1125
853 select SYS_HAS_CPU_SB1
854 select SYS_SUPPORTS_BIG_ENDIAN
855 select SYS_SUPPORTS_HIGHMEM
856 select SYS_SUPPORTS_LITTLE_ENDIAN
859 bool "Sibyte BCM91125E-Rhone"
861 select SIBYTE_BCM1125H
863 select SYS_HAS_CPU_SB1
864 select SYS_SUPPORTS_BIG_ENDIAN
865 select SYS_SUPPORTS_LITTLE_ENDIAN
868 bool "Sibyte BCM91250A-SWARM"
870 select HAVE_PATA_PLATFORM
873 select SYS_HAS_CPU_SB1
874 select SYS_SUPPORTS_BIG_ENDIAN
875 select SYS_SUPPORTS_HIGHMEM
876 select SYS_SUPPORTS_LITTLE_ENDIAN
877 select ZONE_DMA32 if 64BIT
878 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
880 config SIBYTE_LITTLESUR
881 bool "Sibyte BCM91250C2-LittleSur"
883 select HAVE_PATA_PLATFORM
886 select SYS_HAS_CPU_SB1
887 select SYS_SUPPORTS_BIG_ENDIAN
888 select SYS_SUPPORTS_HIGHMEM
889 select SYS_SUPPORTS_LITTLE_ENDIAN
890 select ZONE_DMA32 if 64BIT
892 config SIBYTE_SENTOSA
893 bool "Sibyte BCM91250E-Sentosa"
897 select SYS_HAS_CPU_SB1
898 select SYS_SUPPORTS_BIG_ENDIAN
899 select SYS_SUPPORTS_LITTLE_ENDIAN
900 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
903 bool "Sibyte BCM91480B-BigSur"
905 select NR_CPUS_DEFAULT_4
906 select SIBYTE_BCM1x80
908 select SYS_HAS_CPU_SB1
909 select SYS_SUPPORTS_BIG_ENDIAN
910 select SYS_SUPPORTS_HIGHMEM
911 select SYS_SUPPORTS_LITTLE_ENDIAN
912 select ZONE_DMA32 if 64BIT
913 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
916 bool "SNI RM200/300/400"
919 select FW_ARC if CPU_LITTLE_ENDIAN
920 select FW_ARC32 if CPU_LITTLE_ENDIAN
921 select FW_SNIPROM if CPU_BIG_ENDIAN
922 select ARCH_MAY_HAVE_PC_FDC
923 select ARCH_MIGHT_HAVE_PC_PARPORT
924 select ARCH_MIGHT_HAVE_PC_SERIO
928 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
929 select DMA_NONCOHERENT
930 select GENERIC_ISA_DMA
932 select HAVE_PCSPKR_PLATFORM
938 select MIPS_L1_CACHE_SHIFT_6
939 select SWAP_IO_SPACE if CPU_BIG_ENDIAN
940 select SYS_HAS_CPU_R4X00
941 select SYS_HAS_CPU_R5000
942 select SYS_HAS_CPU_R10000
943 select R5000_CPU_SCACHE
944 select SYS_HAS_EARLY_PRINTK
945 select SYS_SUPPORTS_32BIT_KERNEL
946 select SYS_SUPPORTS_64BIT_KERNEL
947 select SYS_SUPPORTS_BIG_ENDIAN
948 select SYS_SUPPORTS_HIGHMEM
949 select SYS_SUPPORTS_LITTLE_ENDIAN
950 select WAR_R4600_V2_HIT_CACHEOP
952 The SNI RM200/300/400 are MIPS-based machines manufactured by
953 Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid
954 Technology and now in turn merged with Fujitsu. Say Y here to
955 support this machine type.
958 bool "Toshiba TX39 series based machines"
961 bool "Toshiba TX49 series based machines"
962 select WAR_TX49XX_ICACHE_INDEX_INV
964 config MIKROTIK_RB532
965 bool "Mikrotik RB532 boards"
968 select DMA_NONCOHERENT
971 select SYS_HAS_CPU_MIPS32_R1
972 select SYS_SUPPORTS_32BIT_KERNEL
973 select SYS_SUPPORTS_LITTLE_ENDIAN
977 select MIPS_L1_CACHE_SHIFT_4
979 Support the Mikrotik(tm) RouterBoard 532 series,
980 based on the IDT RC32434 SoC.
982 config CAVIUM_OCTEON_SOC
983 bool "Cavium Networks Octeon SoC based boards"
985 select ARCH_HAS_PHYS_TO_DMA
987 select PHYS_ADDR_T_64BIT
988 select SYS_SUPPORTS_64BIT_KERNEL
989 select SYS_SUPPORTS_BIG_ENDIAN
991 select EDAC_ATOMIC_SCRUB
992 select SYS_SUPPORTS_LITTLE_ENDIAN
993 select SYS_SUPPORTS_HOTPLUG_CPU if CPU_BIG_ENDIAN
994 select SYS_HAS_EARLY_PRINTK
995 select SYS_HAS_CPU_CAVIUM_OCTEON
997 select HAVE_PLAT_DELAY
998 select HAVE_PLAT_FW_INIT_CMDLINE
999 select HAVE_PLAT_MEMCPY
1003 select ARCH_SPARSEMEM_ENABLE
1004 select SYS_SUPPORTS_SMP
1005 select NR_CPUS_DEFAULT_64
1006 select MIPS_NR_CPU_NR_MAP_1024
1009 select MTD_COMPLEX_MAPPINGS
1011 select SYS_SUPPORTS_RELOCATABLE
1013 This option supports all of the Octeon reference boards from Cavium
1014 Networks. It builds a kernel that dynamically determines the Octeon
1015 CPU type and supports all known board reference implementations.
1016 Some of the supported boards are:
1023 Say Y here for most Octeon reference boards.
1025 config NLM_XLR_BOARD
1026 bool "Netlogic XLR/XLS based systems"
1029 select SYS_HAS_CPU_XLR
1030 select SYS_SUPPORTS_SMP
1032 select SWAP_IO_SPACE
1033 select SYS_SUPPORTS_32BIT_KERNEL
1034 select SYS_SUPPORTS_64BIT_KERNEL
1035 select PHYS_ADDR_T_64BIT
1036 select SYS_SUPPORTS_BIG_ENDIAN
1037 select SYS_SUPPORTS_HIGHMEM
1038 select NR_CPUS_DEFAULT_32
1042 select ZONE_DMA32 if 64BIT
1044 select SYS_HAS_EARLY_PRINTK
1045 select SYS_SUPPORTS_ZBOOT
1046 select SYS_SUPPORTS_ZBOOT_UART16550
1048 Support for systems based on Netlogic XLR and XLS processors.
1049 Say Y here if you have a XLR or XLS based board.
1051 config NLM_XLP_BOARD
1052 bool "Netlogic XLP based systems"
1055 select SYS_HAS_CPU_XLP
1056 select SYS_SUPPORTS_SMP
1058 select SYS_SUPPORTS_32BIT_KERNEL
1059 select SYS_SUPPORTS_64BIT_KERNEL
1060 select PHYS_ADDR_T_64BIT
1062 select SYS_SUPPORTS_BIG_ENDIAN
1063 select SYS_SUPPORTS_LITTLE_ENDIAN
1064 select SYS_SUPPORTS_HIGHMEM
1065 select NR_CPUS_DEFAULT_32
1069 select ZONE_DMA32 if 64BIT
1071 select SYS_HAS_EARLY_PRINTK
1073 select SYS_SUPPORTS_ZBOOT
1074 select SYS_SUPPORTS_ZBOOT_UART16550
1076 This board is based on Netlogic XLP Processor.
1077 Say Y here if you have a XLP based board.
1081 source "arch/mips/alchemy/Kconfig"
1082 source "arch/mips/ath25/Kconfig"
1083 source "arch/mips/ath79/Kconfig"
1084 source "arch/mips/bcm47xx/Kconfig"
1085 source "arch/mips/bcm63xx/Kconfig"
1086 source "arch/mips/bmips/Kconfig"
1087 source "arch/mips/generic/Kconfig"
1088 source "arch/mips/ingenic/Kconfig"
1089 source "arch/mips/jazz/Kconfig"
1090 source "arch/mips/lantiq/Kconfig"
1091 source "arch/mips/pic32/Kconfig"
1092 source "arch/mips/pistachio/Kconfig"
1093 source "arch/mips/ralink/Kconfig"
1094 source "arch/mips/sgi-ip27/Kconfig"
1095 source "arch/mips/sibyte/Kconfig"
1096 source "arch/mips/txx9/Kconfig"
1097 source "arch/mips/vr41xx/Kconfig"
1098 source "arch/mips/cavium-octeon/Kconfig"
1099 source "arch/mips/loongson2ef/Kconfig"
1100 source "arch/mips/loongson32/Kconfig"
1101 source "arch/mips/loongson64/Kconfig"
1102 source "arch/mips/netlogic/Kconfig"
1106 config GENERIC_HWEIGHT
1110 config GENERIC_CALIBRATE_DELAY
1114 config SCHED_OMIT_FRAME_POINTER
1119 # Select some configuration options automatically based on user selections.
1124 config ARCH_MAY_HAVE_PC_FDC
1155 select CLOCKSOURCE_WATCHDOG if CPU_FREQ
1161 config MIPS_CLOCK_VSYSCALL
1162 def_bool CSRC_R4K || CLKSRC_MIPS_GIC
1171 config ARCH_SUPPORTS_UPROBES
1174 config DMA_PERDEV_COHERENT
1176 select ARCH_HAS_SETUP_DMA_OPS
1177 select DMA_NONCOHERENT
1179 config DMA_NONCOHERENT
1182 # MIPS allows mixing "slightly different" Cacheability and Coherency
1183 # Attribute bits. It is believed that the uncached access through
1184 # KSEG1 and the implementation specific "uncached accelerated" used
1185 # by pgprot_writcombine can be mixed, and the latter sometimes provides
1186 # significant advantages.
1188 select ARCH_HAS_DMA_WRITE_COMBINE
1189 select ARCH_HAS_DMA_PREP_COHERENT
1190 select ARCH_HAS_SYNC_DMA_FOR_DEVICE
1191 select ARCH_HAS_DMA_SET_UNCACHED
1192 select DMA_NONCOHERENT_MMAP
1193 select NEED_DMA_MAP_STATE
1195 config SYS_HAS_EARLY_PRINTK
1198 config SYS_SUPPORTS_HOTPLUG_CPU
1201 config MIPS_BONITO64
1210 config NO_IOPORT_MAP
1214 def_bool CPU_NO_LOAD_STORE_LR
1216 config GENERIC_ISA_DMA
1218 select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n
1221 config GENERIC_ISA_DMA_SUPPORT_BROKEN
1223 select GENERIC_ISA_DMA
1225 config HAVE_PLAT_DELAY
1228 config HAVE_PLAT_FW_INIT_CMDLINE
1231 config HAVE_PLAT_MEMCPY
1237 config SYS_SUPPORTS_RELOCATABLE
1240 Selected if the platform supports relocating the kernel.
1241 The platform must provide plat_get_fdt() if it selects CONFIG_USE_OF
1242 to allow access to command line and entropy sources.
1244 config MIPS_CBPF_JIT
1246 depends on BPF_JIT && HAVE_CBPF_JIT
1248 config MIPS_EBPF_JIT
1250 depends on BPF_JIT && HAVE_EBPF_JIT
1254 # Endianness selection. Sufficiently obscure so many users don't know what to
1255 # answer,so we try hard to limit the available choices. Also the use of a
1256 # choice statement should be more obvious to the user.
1259 prompt "Endianness selection"
1261 Some MIPS machines can be configured for either little or big endian
1262 byte order. These modes require different kernels and a different
1263 Linux distribution. In general there is one preferred byteorder for a
1264 particular system but some systems are just as commonly used in the
1265 one or the other endianness.
1267 config CPU_BIG_ENDIAN
1269 depends on SYS_SUPPORTS_BIG_ENDIAN
1271 config CPU_LITTLE_ENDIAN
1272 bool "Little endian"
1273 depends on SYS_SUPPORTS_LITTLE_ENDIAN
1280 config SYS_SUPPORTS_APM_EMULATION
1283 config SYS_SUPPORTS_BIG_ENDIAN
1286 config SYS_SUPPORTS_LITTLE_ENDIAN
1289 config MIPS_HUGE_TLB_SUPPORT
1290 def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE
1304 config PCI_GT64XXX_PCI0
1307 config PCI_XTALK_BRIDGE
1310 config NO_EXCEPT_FILL
1316 config SWAP_IO_SPACE
1319 config SGI_HAS_INDYDOG
1331 config SGI_HAS_ZILOG
1334 config SGI_HAS_I8042
1337 config DEFAULT_SGI_PARTITION
1349 config MIPS_L1_CACHE_SHIFT_4
1352 config MIPS_L1_CACHE_SHIFT_5
1355 config MIPS_L1_CACHE_SHIFT_6
1358 config MIPS_L1_CACHE_SHIFT_7
1361 config MIPS_L1_CACHE_SHIFT
1363 default "7" if MIPS_L1_CACHE_SHIFT_7
1364 default "6" if MIPS_L1_CACHE_SHIFT_6
1365 default "5" if MIPS_L1_CACHE_SHIFT_5
1366 default "4" if MIPS_L1_CACHE_SHIFT_4
1369 config ARC_CMDLINE_ONLY
1373 bool "ARC console support"
1374 depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN)
1388 menu "CPU selection"
1394 config CPU_LOONGSON64
1395 bool "Loongson 64-bit CPU"
1396 depends on SYS_HAS_CPU_LOONGSON64
1397 select ARCH_HAS_PHYS_TO_DMA
1399 select CPU_HAS_PREFETCH
1400 select CPU_SUPPORTS_64BIT_KERNEL
1401 select CPU_SUPPORTS_HIGHMEM
1402 select CPU_SUPPORTS_HUGEPAGES
1403 select CPU_SUPPORTS_MSA
1404 select CPU_DIEI_BROKEN if !LOONGSON3_ENHANCEMENT
1405 select CPU_MIPSR2_IRQ_VI
1406 select WEAK_ORDERING
1407 select WEAK_REORDERING_BEYOND_LLSC
1408 select MIPS_ASID_BITS_VARIABLE
1409 select MIPS_PGD_C0_CONTEXT
1410 select MIPS_L1_CACHE_SHIFT_6
1415 The Loongson GSx64(GS264/GS464/GS464E/GS464V) series of processor
1416 cores implements the MIPS64R2 instruction set with many extensions,
1417 including most 64-bit Loongson-2 (2H, 2K) and Loongson-3 (3A1000,
1418 3B1000, 3B1500, 3A2000, 3A3000 and 3A4000) processors. However, old
1419 Loongson-2E/2F is not covered here and will be removed in future.
1421 config LOONGSON3_ENHANCEMENT
1422 bool "New Loongson-3 CPU Enhancements"
1424 depends on CPU_LOONGSON64
1426 New Loongson-3 cores (since Loongson-3A R2, as opposed to Loongson-3A
1427 R1, Loongson-3B R1 and Loongson-3B R2) has many enhancements, such as
1428 FTLB, L1-VCache, EI/DI/Wait/Prefetch instruction, DSP/DSPr2 ASE, User
1429 Local register, Read-Inhibit/Execute-Inhibit, SFB (Store Fill Buffer),
1430 Fast TLB refill support, etc.
1432 This option enable those enhancements which are not probed at run
1433 time. If you want a generic kernel to run on all Loongson 3 machines,
1434 please say 'N' here. If you want a high-performance kernel to run on
1435 new Loongson-3 machines only, please say 'Y' here.
1437 config CPU_LOONGSON3_WORKAROUNDS
1438 bool "Old Loongson-3 LLSC Workarounds"
1440 depends on CPU_LOONGSON64
1442 Loongson-3 processors have the llsc issues which require workarounds.
1443 Without workarounds the system may hang unexpectedly.
1445 Newer Loongson-3 will fix these issues and no workarounds are needed.
1446 The workarounds have no significant side effect on them but may
1447 decrease the performance of the system so this option should be
1448 disabled unless the kernel is intended to be run on old systems.
1450 If unsure, please say Y.
1452 config CPU_LOONGSON3_CPUCFG_EMULATION
1453 bool "Emulate the CPUCFG instruction on older Loongson cores"
1455 depends on CPU_LOONGSON64
1457 Loongson-3A R4 and newer have the CPUCFG instruction available for
1458 userland to query CPU capabilities, much like CPUID on x86. This
1459 option provides emulation of the instruction on older Loongson
1460 cores, back to Loongson-3A1000.
1462 If unsure, please say Y.
1464 config CPU_LOONGSON2E
1466 depends on SYS_HAS_CPU_LOONGSON2E
1467 select CPU_LOONGSON2EF
1469 The Loongson 2E processor implements the MIPS III instruction set
1470 with many extensions.
1472 It has an internal FPGA northbridge, which is compatible to
1475 config CPU_LOONGSON2F
1477 depends on SYS_HAS_CPU_LOONGSON2F
1478 select CPU_LOONGSON2EF
1481 The Loongson 2F processor implements the MIPS III instruction set
1482 with many extensions.
1484 Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller
1485 have a similar programming interface with FPGA northbridge used in
1488 config CPU_LOONGSON1B
1490 depends on SYS_HAS_CPU_LOONGSON1B
1491 select CPU_LOONGSON32
1492 select LEDS_GPIO_REGISTER
1494 The Loongson 1B is a 32-bit SoC, which implements the MIPS32
1495 Release 1 instruction set and part of the MIPS32 Release 2
1498 config CPU_LOONGSON1C
1500 depends on SYS_HAS_CPU_LOONGSON1C
1501 select CPU_LOONGSON32
1502 select LEDS_GPIO_REGISTER
1504 The Loongson 1C is a 32-bit SoC, which implements the MIPS32
1505 Release 1 instruction set and part of the MIPS32 Release 2
1508 config CPU_MIPS32_R1
1509 bool "MIPS32 Release 1"
1510 depends on SYS_HAS_CPU_MIPS32_R1
1511 select CPU_HAS_PREFETCH
1512 select CPU_SUPPORTS_32BIT_KERNEL
1513 select CPU_SUPPORTS_HIGHMEM
1515 Choose this option to build a kernel for release 1 or later of the
1516 MIPS32 architecture. Most modern embedded systems with a 32-bit
1517 MIPS processor are based on a MIPS32 processor. If you know the
1518 specific type of processor in your system, choose those that one
1519 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
1520 Release 2 of the MIPS32 architecture is available since several
1521 years so chances are you even have a MIPS32 Release 2 processor
1522 in which case you should choose CPU_MIPS32_R2 instead for better
1525 config CPU_MIPS32_R2
1526 bool "MIPS32 Release 2"
1527 depends on SYS_HAS_CPU_MIPS32_R2
1528 select CPU_HAS_PREFETCH
1529 select CPU_SUPPORTS_32BIT_KERNEL
1530 select CPU_SUPPORTS_HIGHMEM
1531 select CPU_SUPPORTS_MSA
1534 Choose this option to build a kernel for release 2 or later of the
1535 MIPS32 architecture. Most modern embedded systems with a 32-bit
1536 MIPS processor are based on a MIPS32 processor. If you know the
1537 specific type of processor in your system, choose those that one
1538 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
1540 config CPU_MIPS32_R5
1541 bool "MIPS32 Release 5"
1542 depends on SYS_HAS_CPU_MIPS32_R5
1543 select CPU_HAS_PREFETCH
1544 select CPU_SUPPORTS_32BIT_KERNEL
1545 select CPU_SUPPORTS_HIGHMEM
1546 select CPU_SUPPORTS_MSA
1548 select MIPS_O32_FP64_SUPPORT
1550 Choose this option to build a kernel for release 5 or later of the
1551 MIPS32 architecture. New MIPS processors, starting with the Warrior
1552 family, are based on a MIPS32r5 processor. If you own an older
1553 processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
1555 config CPU_MIPS32_R6
1556 bool "MIPS32 Release 6"
1557 depends on SYS_HAS_CPU_MIPS32_R6
1558 select CPU_HAS_PREFETCH
1559 select CPU_NO_LOAD_STORE_LR
1560 select CPU_SUPPORTS_32BIT_KERNEL
1561 select CPU_SUPPORTS_HIGHMEM
1562 select CPU_SUPPORTS_MSA
1564 select MIPS_O32_FP64_SUPPORT
1566 Choose this option to build a kernel for release 6 or later of the
1567 MIPS32 architecture. New MIPS processors, starting with the Warrior
1568 family, are based on a MIPS32r6 processor. If you own an older
1569 processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
1571 config CPU_MIPS64_R1
1572 bool "MIPS64 Release 1"
1573 depends on SYS_HAS_CPU_MIPS64_R1
1574 select CPU_HAS_PREFETCH
1575 select CPU_SUPPORTS_32BIT_KERNEL
1576 select CPU_SUPPORTS_64BIT_KERNEL
1577 select CPU_SUPPORTS_HIGHMEM
1578 select CPU_SUPPORTS_HUGEPAGES
1580 Choose this option to build a kernel for release 1 or later of the
1581 MIPS64 architecture. Many modern embedded systems with a 64-bit
1582 MIPS processor are based on a MIPS64 processor. If you know the
1583 specific type of processor in your system, choose those that one
1584 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
1585 Release 2 of the MIPS64 architecture is available since several
1586 years so chances are you even have a MIPS64 Release 2 processor
1587 in which case you should choose CPU_MIPS64_R2 instead for better
1590 config CPU_MIPS64_R2
1591 bool "MIPS64 Release 2"
1592 depends on SYS_HAS_CPU_MIPS64_R2
1593 select CPU_HAS_PREFETCH
1594 select CPU_SUPPORTS_32BIT_KERNEL
1595 select CPU_SUPPORTS_64BIT_KERNEL
1596 select CPU_SUPPORTS_HIGHMEM
1597 select CPU_SUPPORTS_HUGEPAGES
1598 select CPU_SUPPORTS_MSA
1601 Choose this option to build a kernel for release 2 or later of the
1602 MIPS64 architecture. Many modern embedded systems with a 64-bit
1603 MIPS processor are based on a MIPS64 processor. If you know the
1604 specific type of processor in your system, choose those that one
1605 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
1607 config CPU_MIPS64_R5
1608 bool "MIPS64 Release 5"
1609 depends on SYS_HAS_CPU_MIPS64_R5
1610 select CPU_HAS_PREFETCH
1611 select CPU_SUPPORTS_32BIT_KERNEL
1612 select CPU_SUPPORTS_64BIT_KERNEL
1613 select CPU_SUPPORTS_HIGHMEM
1614 select CPU_SUPPORTS_HUGEPAGES
1615 select CPU_SUPPORTS_MSA
1616 select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
1619 Choose this option to build a kernel for release 5 or later of the
1620 MIPS64 architecture. This is a intermediate MIPS architecture
1621 release partly implementing release 6 features. Though there is no
1622 any hardware known to be based on this release.
1624 config CPU_MIPS64_R6
1625 bool "MIPS64 Release 6"
1626 depends on SYS_HAS_CPU_MIPS64_R6
1627 select CPU_HAS_PREFETCH
1628 select CPU_NO_LOAD_STORE_LR
1629 select CPU_SUPPORTS_32BIT_KERNEL
1630 select CPU_SUPPORTS_64BIT_KERNEL
1631 select CPU_SUPPORTS_HIGHMEM
1632 select CPU_SUPPORTS_HUGEPAGES
1633 select CPU_SUPPORTS_MSA
1634 select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
1637 Choose this option to build a kernel for release 6 or later of the
1638 MIPS64 architecture. New MIPS processors, starting with the Warrior
1639 family, are based on a MIPS64r6 processor. If you own an older
1640 processor, you probably need to select MIPS64r1 or MIPS64r2 instead.
1643 bool "MIPS Warrior P5600"
1644 depends on SYS_HAS_CPU_P5600
1645 select CPU_HAS_PREFETCH
1646 select CPU_SUPPORTS_32BIT_KERNEL
1647 select CPU_SUPPORTS_HIGHMEM
1648 select CPU_SUPPORTS_MSA
1649 select CPU_SUPPORTS_CPUFREQ
1650 select CPU_MIPSR2_IRQ_VI
1651 select CPU_MIPSR2_IRQ_EI
1653 select MIPS_O32_FP64_SUPPORT
1655 Choose this option to build a kernel for MIPS Warrior P5600 CPU.
1656 It's based on MIPS32r5 ISA with XPA, EVA, dual/quad issue exec pipes,
1657 MMU with two-levels TLB, UCA, MSA, MDU core level features and system
1658 level features like up to six P5600 calculation cores, CM2 with L2
1659 cache, IOCU/IOMMU (though might be unused depending on the system-
1660 specific IP core configuration), GIC, CPC, virtualisation module,
1665 depends on SYS_HAS_CPU_R3000
1668 select CPU_SUPPORTS_32BIT_KERNEL
1669 select CPU_SUPPORTS_HIGHMEM
1671 Please make sure to pick the right CPU type. Linux/MIPS is not
1672 designed to be generic, i.e. Kernels compiled for R3000 CPUs will
1673 *not* work on R4000 machines and vice versa. However, since most
1674 of the supported machines have an R4000 (or similar) CPU, R4x00
1675 might be a safe bet. If the resulting kernel does not work,
1676 try to recompile with R3000.
1680 depends on SYS_HAS_CPU_TX39XX
1681 select CPU_SUPPORTS_32BIT_KERNEL
1686 depends on SYS_HAS_CPU_VR41XX
1687 select CPU_SUPPORTS_32BIT_KERNEL
1688 select CPU_SUPPORTS_64BIT_KERNEL
1690 The options selects support for the NEC VR4100 series of processors.
1691 Only choose this option if you have one of these processors as a
1692 kernel built with this option will not run on any other type of
1693 processor or vice versa.
1697 depends on SYS_HAS_CPU_R4300
1698 select CPU_SUPPORTS_32BIT_KERNEL
1699 select CPU_SUPPORTS_64BIT_KERNEL
1700 select CPU_HAS_LOAD_STORE_LR
1702 MIPS Technologies R4300-series processors.
1706 depends on SYS_HAS_CPU_R4X00
1707 select CPU_SUPPORTS_32BIT_KERNEL
1708 select CPU_SUPPORTS_64BIT_KERNEL
1709 select CPU_SUPPORTS_HUGEPAGES
1711 MIPS Technologies R4000-series processors other than 4300, including
1712 the R4000, R4400, R4600, and 4700.
1716 depends on SYS_HAS_CPU_TX49XX
1717 select CPU_HAS_PREFETCH
1718 select CPU_SUPPORTS_32BIT_KERNEL
1719 select CPU_SUPPORTS_64BIT_KERNEL
1720 select CPU_SUPPORTS_HUGEPAGES
1724 depends on SYS_HAS_CPU_R5000
1725 select CPU_SUPPORTS_32BIT_KERNEL
1726 select CPU_SUPPORTS_64BIT_KERNEL
1727 select CPU_SUPPORTS_HUGEPAGES
1729 MIPS Technologies R5000-series processors other than the Nevada.
1733 depends on SYS_HAS_CPU_R5500
1734 select CPU_SUPPORTS_32BIT_KERNEL
1735 select CPU_SUPPORTS_64BIT_KERNEL
1736 select CPU_SUPPORTS_HUGEPAGES
1738 NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV
1743 depends on SYS_HAS_CPU_NEVADA
1744 select CPU_SUPPORTS_32BIT_KERNEL
1745 select CPU_SUPPORTS_64BIT_KERNEL
1746 select CPU_SUPPORTS_HUGEPAGES
1748 QED / PMC-Sierra RM52xx-series ("Nevada") processors.
1752 depends on SYS_HAS_CPU_R10000
1753 select CPU_HAS_PREFETCH
1754 select CPU_SUPPORTS_32BIT_KERNEL
1755 select CPU_SUPPORTS_64BIT_KERNEL
1756 select CPU_SUPPORTS_HIGHMEM
1757 select CPU_SUPPORTS_HUGEPAGES
1759 MIPS Technologies R10000-series processors.
1763 depends on SYS_HAS_CPU_RM7000
1764 select CPU_HAS_PREFETCH
1765 select CPU_SUPPORTS_32BIT_KERNEL
1766 select CPU_SUPPORTS_64BIT_KERNEL
1767 select CPU_SUPPORTS_HIGHMEM
1768 select CPU_SUPPORTS_HUGEPAGES
1772 depends on SYS_HAS_CPU_SB1
1773 select CPU_SUPPORTS_32BIT_KERNEL
1774 select CPU_SUPPORTS_64BIT_KERNEL
1775 select CPU_SUPPORTS_HIGHMEM
1776 select CPU_SUPPORTS_HUGEPAGES
1777 select WEAK_ORDERING
1779 config CPU_CAVIUM_OCTEON
1780 bool "Cavium Octeon processor"
1781 depends on SYS_HAS_CPU_CAVIUM_OCTEON
1782 select CPU_HAS_PREFETCH
1783 select CPU_SUPPORTS_64BIT_KERNEL
1784 select WEAK_ORDERING
1785 select CPU_SUPPORTS_HIGHMEM
1786 select CPU_SUPPORTS_HUGEPAGES
1787 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
1788 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
1789 select MIPS_L1_CACHE_SHIFT_7
1792 The Cavium Octeon processor is a highly integrated chip containing
1793 many ethernet hardware widgets for networking tasks. The processor
1794 can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets.
1795 Full details can be found at http://www.caviumnetworks.com.
1798 bool "Broadcom BMIPS"
1799 depends on SYS_HAS_CPU_BMIPS
1801 select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300
1802 select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350
1803 select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380
1804 select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000
1805 select CPU_SUPPORTS_32BIT_KERNEL
1806 select DMA_NONCOHERENT
1808 select SWAP_IO_SPACE
1809 select WEAK_ORDERING
1810 select CPU_SUPPORTS_HIGHMEM
1811 select CPU_HAS_PREFETCH
1812 select CPU_SUPPORTS_CPUFREQ
1813 select MIPS_EXTERNAL_TIMER
1815 Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors.
1818 bool "Netlogic XLR SoC"
1819 depends on SYS_HAS_CPU_XLR
1820 select CPU_SUPPORTS_32BIT_KERNEL
1821 select CPU_SUPPORTS_64BIT_KERNEL
1822 select CPU_SUPPORTS_HIGHMEM
1823 select CPU_SUPPORTS_HUGEPAGES
1824 select WEAK_ORDERING
1825 select WEAK_REORDERING_BEYOND_LLSC
1827 Netlogic Microsystems XLR/XLS processors.
1830 bool "Netlogic XLP SoC"
1831 depends on SYS_HAS_CPU_XLP
1832 select CPU_SUPPORTS_32BIT_KERNEL
1833 select CPU_SUPPORTS_64BIT_KERNEL
1834 select CPU_SUPPORTS_HIGHMEM
1835 select WEAK_ORDERING
1836 select WEAK_REORDERING_BEYOND_LLSC
1837 select CPU_HAS_PREFETCH
1839 select CPU_SUPPORTS_HUGEPAGES
1840 select MIPS_ASID_BITS_VARIABLE
1842 Netlogic Microsystems XLP processors.
1845 config CPU_MIPS32_3_5_FEATURES
1846 bool "MIPS32 Release 3.5 Features"
1847 depends on SYS_HAS_CPU_MIPS32_R3_5
1848 depends on CPU_MIPS32_R2 || CPU_MIPS32_R5 || CPU_MIPS32_R6 || \
1851 Choose this option to build a kernel for release 2 or later of the
1852 MIPS32 architecture including features from the 3.5 release such as
1853 support for Enhanced Virtual Addressing (EVA).
1855 config CPU_MIPS32_3_5_EVA
1856 bool "Enhanced Virtual Addressing (EVA)"
1857 depends on CPU_MIPS32_3_5_FEATURES
1861 Choose this option if you want to enable the Enhanced Virtual
1862 Addressing (EVA) on your MIPS32 core (such as proAptiv).
1863 One of its primary benefits is an increase in the maximum size
1864 of lowmem (up to 3GB). If unsure, say 'N' here.
1866 config CPU_MIPS32_R5_FEATURES
1867 bool "MIPS32 Release 5 Features"
1868 depends on SYS_HAS_CPU_MIPS32_R5
1869 depends on CPU_MIPS32_R2 || CPU_MIPS32_R5 || CPU_P5600
1871 Choose this option to build a kernel for release 2 or later of the
1872 MIPS32 architecture including features from release 5 such as
1873 support for Extended Physical Addressing (XPA).
1875 config CPU_MIPS32_R5_XPA
1876 bool "Extended Physical Addressing (XPA)"
1877 depends on CPU_MIPS32_R5_FEATURES
1879 depends on !PAGE_SIZE_4KB
1880 depends on SYS_SUPPORTS_HIGHMEM
1883 select PHYS_ADDR_T_64BIT
1886 Choose this option if you want to enable the Extended Physical
1887 Addressing (XPA) on your MIPS32 core (such as P5600 series). The
1888 benefit is to increase physical addressing equal to or greater
1889 than 40 bits. Note that this has the side effect of turning on
1890 64-bit addressing which in turn makes the PTEs 64-bit in size.
1891 If unsure, say 'N' here.
1894 config CPU_NOP_WORKAROUNDS
1897 config CPU_JUMP_WORKAROUNDS
1900 config CPU_LOONGSON2F_WORKAROUNDS
1901 bool "Loongson 2F Workarounds"
1903 select CPU_NOP_WORKAROUNDS
1904 select CPU_JUMP_WORKAROUNDS
1906 Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which
1907 require workarounds. Without workarounds the system may hang
1908 unexpectedly. For more information please refer to the gas
1909 -mfix-loongson2f-nop and -mfix-loongson2f-jump options.
1911 Loongson 2F03 and later have fixed these issues and no workarounds
1912 are needed. The workarounds have no significant side effect on them
1913 but may decrease the performance of the system so this option should
1914 be disabled unless the kernel is intended to be run on 2F01 or 2F02
1917 If unsure, please say Y.
1918 endif # CPU_LOONGSON2F
1920 config SYS_SUPPORTS_ZBOOT
1922 select HAVE_KERNEL_GZIP
1923 select HAVE_KERNEL_BZIP2
1924 select HAVE_KERNEL_LZ4
1925 select HAVE_KERNEL_LZMA
1926 select HAVE_KERNEL_LZO
1927 select HAVE_KERNEL_XZ
1928 select HAVE_KERNEL_ZSTD
1930 config SYS_SUPPORTS_ZBOOT_UART16550
1932 select SYS_SUPPORTS_ZBOOT
1934 config SYS_SUPPORTS_ZBOOT_UART_PROM
1936 select SYS_SUPPORTS_ZBOOT
1938 config CPU_LOONGSON2EF
1940 select CPU_SUPPORTS_32BIT_KERNEL
1941 select CPU_SUPPORTS_64BIT_KERNEL
1942 select CPU_SUPPORTS_HIGHMEM
1943 select CPU_SUPPORTS_HUGEPAGES
1944 select ARCH_HAS_PHYS_TO_DMA
1946 config CPU_LOONGSON32
1950 select CPU_HAS_PREFETCH
1951 select CPU_SUPPORTS_32BIT_KERNEL
1952 select CPU_SUPPORTS_HIGHMEM
1953 select CPU_SUPPORTS_CPUFREQ
1955 config CPU_BMIPS32_3300
1956 select SMP_UP if SMP
1959 config CPU_BMIPS4350
1961 select SYS_SUPPORTS_SMP
1962 select SYS_SUPPORTS_HOTPLUG_CPU
1964 config CPU_BMIPS4380
1966 select MIPS_L1_CACHE_SHIFT_6
1967 select SYS_SUPPORTS_SMP
1968 select SYS_SUPPORTS_HOTPLUG_CPU
1971 config CPU_BMIPS5000
1973 select MIPS_CPU_SCACHE
1974 select MIPS_L1_CACHE_SHIFT_7
1975 select SYS_SUPPORTS_SMP
1976 select SYS_SUPPORTS_HOTPLUG_CPU
1979 config SYS_HAS_CPU_LOONGSON64
1981 select CPU_SUPPORTS_CPUFREQ
1984 config SYS_HAS_CPU_LOONGSON2E
1987 config SYS_HAS_CPU_LOONGSON2F
1989 select CPU_SUPPORTS_CPUFREQ
1990 select CPU_SUPPORTS_ADDRWINCFG if 64BIT
1992 config SYS_HAS_CPU_LOONGSON1B
1995 config SYS_HAS_CPU_LOONGSON1C
1998 config SYS_HAS_CPU_MIPS32_R1
2001 config SYS_HAS_CPU_MIPS32_R2
2004 config SYS_HAS_CPU_MIPS32_R3_5
2007 config SYS_HAS_CPU_MIPS32_R5
2009 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
2011 config SYS_HAS_CPU_MIPS32_R6
2013 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
2015 config SYS_HAS_CPU_MIPS64_R1
2018 config SYS_HAS_CPU_MIPS64_R2
2021 config SYS_HAS_CPU_MIPS64_R6
2023 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
2025 config SYS_HAS_CPU_P5600
2027 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
2029 config SYS_HAS_CPU_R3000
2032 config SYS_HAS_CPU_TX39XX
2035 config SYS_HAS_CPU_VR41XX
2038 config SYS_HAS_CPU_R4300
2041 config SYS_HAS_CPU_R4X00
2044 config SYS_HAS_CPU_TX49XX
2047 config SYS_HAS_CPU_R5000
2050 config SYS_HAS_CPU_R5500
2053 config SYS_HAS_CPU_NEVADA
2056 config SYS_HAS_CPU_R10000
2058 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
2060 config SYS_HAS_CPU_RM7000
2063 config SYS_HAS_CPU_SB1
2066 config SYS_HAS_CPU_CAVIUM_OCTEON
2069 config SYS_HAS_CPU_BMIPS
2072 config SYS_HAS_CPU_BMIPS32_3300
2074 select SYS_HAS_CPU_BMIPS
2076 config SYS_HAS_CPU_BMIPS4350
2078 select SYS_HAS_CPU_BMIPS
2080 config SYS_HAS_CPU_BMIPS4380
2082 select SYS_HAS_CPU_BMIPS
2084 config SYS_HAS_CPU_BMIPS5000
2086 select SYS_HAS_CPU_BMIPS
2087 select ARCH_HAS_SYNC_DMA_FOR_CPU
2089 config SYS_HAS_CPU_XLR
2092 config SYS_HAS_CPU_XLP
2096 # CPU may reorder R->R, R->W, W->R, W->W
2097 # Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC
2099 config WEAK_ORDERING
2103 # CPU may reorder reads and writes beyond LL/SC
2104 # CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC
2106 config WEAK_REORDERING_BEYOND_LLSC
2111 # These two indicate any level of the MIPS32 and MIPS64 architecture
2115 default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 || CPU_MIPS32_R5 || \
2116 CPU_MIPS32_R6 || CPU_P5600
2120 default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R5 || \
2121 CPU_MIPS64_R6 || CPU_LOONGSON64 || CPU_CAVIUM_OCTEON
2124 # These indicate the revision of the architecture
2128 default y if CPU_MIPS32_R1 || CPU_MIPS64_R1
2132 default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON
2134 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
2139 default y if CPU_MIPS32_R5 || CPU_MIPS64_R5 || CPU_P5600
2141 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
2146 default y if CPU_MIPS32_R6 || CPU_MIPS64_R6
2148 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
2149 select HAVE_ARCH_BITREVERSE
2150 select MIPS_ASID_BITS_VARIABLE
2151 select MIPS_CRC_SUPPORT
2154 config TARGET_ISA_REV
2156 default 1 if CPU_MIPSR1
2157 default 2 if CPU_MIPSR2
2158 default 5 if CPU_MIPSR5
2159 default 6 if CPU_MIPSR6
2162 Reflects the ISA revision being targeted by the kernel build. This
2163 is effectively the Kconfig equivalent of MIPS_ISA_REV.
2171 config SYS_SUPPORTS_32BIT_KERNEL
2173 config SYS_SUPPORTS_64BIT_KERNEL
2175 config CPU_SUPPORTS_32BIT_KERNEL
2177 config CPU_SUPPORTS_64BIT_KERNEL
2179 config CPU_SUPPORTS_CPUFREQ
2181 config CPU_SUPPORTS_ADDRWINCFG
2183 config CPU_SUPPORTS_HUGEPAGES
2185 depends on !(32BIT && (ARCH_PHYS_ADDR_T_64BIT || EVA))
2186 config MIPS_PGD_C0_CONTEXT
2189 default y if (CPU_MIPSR2 || CPU_MIPSR6) && !CPU_XLP
2192 # Set to y for ptrace access to watch registers.
2194 config HARDWARE_WATCHPOINTS
2196 default y if CPU_MIPSR1 || CPU_MIPSR2 || CPU_MIPSR6
2201 prompt "Kernel code model"
2203 You should only select this option if you have a workload that
2204 actually benefits from 64-bit processing or if your machine has
2205 large memory. You will only be presented a single option in this
2206 menu if your system does not support both 32-bit and 64-bit kernels.
2209 bool "32-bit kernel"
2210 depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL
2213 Select this option if you want to build a 32-bit kernel.
2216 bool "64-bit kernel"
2217 depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL
2219 Select this option if you want to build a 64-bit kernel.
2223 config MIPS_VA_BITS_48
2224 bool "48 bits virtual memory"
2227 Support a maximum at least 48 bits of application virtual
2228 memory. Default is 40 bits or less, depending on the CPU.
2229 For page sizes 16k and above, this option results in a small
2230 memory overhead for page tables. For 4k page size, a fourth
2231 level of page tables is added which imposes both a memory
2232 overhead as well as slower TLB fault handling.
2237 prompt "Kernel page size"
2238 default PAGE_SIZE_4KB
2240 config PAGE_SIZE_4KB
2242 depends on !CPU_LOONGSON2EF && !CPU_LOONGSON64
2244 This option select the standard 4kB Linux page size. On some
2245 R3000-family processors this is the only available page size. Using
2246 4kB page size will minimize memory consumption and is therefore
2247 recommended for low memory systems.
2249 config PAGE_SIZE_8KB
2251 depends on CPU_CAVIUM_OCTEON
2252 depends on !MIPS_VA_BITS_48
2254 Using 8kB page size will result in higher performance kernel at
2255 the price of higher memory consumption. This option is available
2256 only on cnMIPS processors. Note that you will need a suitable Linux
2257 distribution to support this.
2259 config PAGE_SIZE_16KB
2261 depends on !CPU_R3000 && !CPU_TX39XX
2263 Using 16kB page size will result in higher performance kernel at
2264 the price of higher memory consumption. This option is available on
2265 all non-R3000 family processors. Note that you will need a suitable
2266 Linux distribution to support this.
2268 config PAGE_SIZE_32KB
2270 depends on CPU_CAVIUM_OCTEON
2271 depends on !MIPS_VA_BITS_48
2273 Using 32kB page size will result in higher performance kernel at
2274 the price of higher memory consumption. This option is available
2275 only on cnMIPS cores. Note that you will need a suitable Linux
2276 distribution to support this.
2278 config PAGE_SIZE_64KB
2280 depends on !CPU_R3000 && !CPU_TX39XX
2282 Using 64kB page size will result in higher performance kernel at
2283 the price of higher memory consumption. This option is available on
2284 all non-R3000 family processor. Not that at the time of this
2285 writing this option is still high experimental.
2289 config FORCE_MAX_ZONEORDER
2290 int "Maximum zone order"
2291 range 14 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
2292 default "14" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
2293 range 13 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
2294 default "13" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
2295 range 12 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
2296 default "12" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
2300 The kernel memory allocator divides physically contiguous memory
2301 blocks into "zones", where each zone is a power of two number of
2302 pages. This option selects the largest power of two that the kernel
2303 keeps in the memory allocator. If you need to allocate very large
2304 blocks of physically contiguous memory, then you may need to
2305 increase this value.
2307 This config option is actually maximum order plus one. For example,
2308 a value of 11 means that the largest free memory block is 2^10 pages.
2310 The page size is not necessarily 4KB. Keep this in mind
2311 when choosing a value for this option.
2316 config IP22_CPU_SCACHE
2321 # Support for a MIPS32 / MIPS64 style S-caches
2323 config MIPS_CPU_SCACHE
2327 config R5000_CPU_SCACHE
2331 config RM7000_CPU_SCACHE
2335 config SIBYTE_DMA_PAGEOPS
2336 bool "Use DMA to clear/copy pages"
2339 Instead of using the CPU to zero and copy pages, use a Data Mover
2340 channel. These DMA channels are otherwise unused by the standard
2341 SiByte Linux port. Seems to give a small performance benefit.
2343 config CPU_HAS_PREFETCH
2346 config CPU_GENERIC_DUMP_TLB
2348 default y if !(CPU_R3000 || CPU_TX39XX)
2350 config MIPS_FP_SUPPORT
2351 bool "Floating Point support" if EXPERT
2354 Select y to include support for floating point in the kernel
2355 including initialization of FPU hardware, FP context save & restore
2356 and emulation of an FPU where necessary. Without this support any
2357 userland program attempting to use floating point instructions will
2360 If you know that your userland will not attempt to use floating point
2361 instructions then you can say n here to shrink the kernel a little.
2365 config CPU_R2300_FPU
2367 depends on MIPS_FP_SUPPORT
2368 default y if CPU_R3000 || CPU_TX39XX
2375 depends on MIPS_FP_SUPPORT
2376 default y if !CPU_R2300_FPU
2378 config CPU_R4K_CACHE_TLB
2380 default y if !(CPU_R3K_TLB || CPU_SB1 || CPU_CAVIUM_OCTEON)
2383 bool "MIPS MT SMP support (1 TC on each available VPE)"
2385 depends on SYS_SUPPORTS_MULTITHREADING && !CPU_MIPSR6 && !CPU_MICROMIPS
2386 select CPU_MIPSR2_IRQ_VI
2387 select CPU_MIPSR2_IRQ_EI
2392 select SYS_SUPPORTS_SMP
2393 select SYS_SUPPORTS_SCHED_SMT
2394 select MIPS_PERF_SHARED_TC_COUNTERS
2396 This is a kernel model which is known as SMVP. This is supported
2397 on cores with the MT ASE and uses the available VPEs to implement
2398 virtual processors which supports SMP. This is equivalent to the
2399 Intel Hyperthreading feature. For further information go to
2400 <http://www.imgtec.com/mips/mips-multithreading.asp>.
2406 bool "SMT (multithreading) scheduler support"
2407 depends on SYS_SUPPORTS_SCHED_SMT
2410 SMT scheduler support improves the CPU scheduler's decision making
2411 when dealing with MIPS MT enabled cores at a cost of slightly
2412 increased overhead in some places. If unsure say N here.
2414 config SYS_SUPPORTS_SCHED_SMT
2417 config SYS_SUPPORTS_MULTITHREADING
2420 config MIPS_MT_FPAFF
2421 bool "Dynamic FPU affinity for FP-intensive threads"
2423 depends on MIPS_MT_SMP
2425 config MIPSR2_TO_R6_EMULATOR
2426 bool "MIPS R2-to-R6 emulator"
2427 depends on CPU_MIPSR6
2428 depends on MIPS_FP_SUPPORT
2431 Choose this option if you want to run non-R6 MIPS userland code.
2432 Even if you say 'Y' here, the emulator will still be disabled by
2433 default. You can enable it using the 'mipsr2emu' kernel option.
2434 The only reason this is a build-time option is to save ~14K from the
2437 config SYS_SUPPORTS_VPE_LOADER
2439 depends on SYS_SUPPORTS_MULTITHREADING
2441 Indicates that the platform supports the VPE loader, and provides
2444 config MIPS_VPE_LOADER
2445 bool "VPE loader support."
2446 depends on SYS_SUPPORTS_VPE_LOADER && MODULES
2447 select CPU_MIPSR2_IRQ_VI
2448 select CPU_MIPSR2_IRQ_EI
2451 Includes a loader for loading an elf relocatable object
2452 onto another VPE and running it.
2454 config MIPS_VPE_LOADER_CMP
2457 depends on MIPS_VPE_LOADER && MIPS_CMP
2459 config MIPS_VPE_LOADER_MT
2462 depends on MIPS_VPE_LOADER && !MIPS_CMP
2464 config MIPS_VPE_LOADER_TOM
2465 bool "Load VPE program into memory hidden from linux"
2466 depends on MIPS_VPE_LOADER
2469 The loader can use memory that is present but has been hidden from
2470 Linux using the kernel command line option "mem=xxMB". It's up to
2471 you to ensure the amount you put in the option and the space your
2472 program requires is less or equal to the amount physically present.
2474 config MIPS_VPE_APSP_API
2475 bool "Enable support for AP/SP API (RTLX)"
2476 depends on MIPS_VPE_LOADER
2478 config MIPS_VPE_APSP_API_CMP
2481 depends on MIPS_VPE_APSP_API && MIPS_CMP
2483 config MIPS_VPE_APSP_API_MT
2486 depends on MIPS_VPE_APSP_API && !MIPS_CMP
2489 bool "MIPS CMP framework support (DEPRECATED)"
2490 depends on SYS_SUPPORTS_MIPS_CMP && !CPU_MIPSR6
2493 select SYS_SUPPORTS_SMP
2494 select WEAK_ORDERING
2497 Select this if you are using a bootloader which implements the "CMP
2498 framework" protocol (ie. YAMON) and want your kernel to make use of
2499 its ability to start secondary CPUs.
2501 Unless you have a specific need, you should use CONFIG_MIPS_CPS
2505 bool "MIPS Coherent Processing System support"
2506 depends on SYS_SUPPORTS_MIPS_CPS
2508 select MIPS_CPS_PM if HOTPLUG_CPU
2510 select SYNC_R4K if (CEVT_R4K || CSRC_R4K)
2511 select SYS_SUPPORTS_HOTPLUG_CPU
2512 select SYS_SUPPORTS_SCHED_SMT if CPU_MIPSR6
2513 select SYS_SUPPORTS_SMP
2514 select WEAK_ORDERING
2515 select GENERIC_IRQ_MIGRATION if HOTPLUG_CPU
2517 Select this if you wish to run an SMP kernel across multiple cores
2518 within a MIPS Coherent Processing System. When this option is
2519 enabled the kernel will probe for other cores and boot them with
2520 no external assistance. It is safe to enable this when hardware
2521 support is unavailable.
2534 config SB1_PASS_2_WORKAROUNDS
2536 depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2)
2539 config SB1_PASS_2_1_WORKAROUNDS
2541 depends on CPU_SB1 && CPU_SB1_PASS_2
2545 prompt "SmartMIPS or microMIPS ASE support"
2547 config CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS
2550 Select this if you want neither microMIPS nor SmartMIPS support
2552 config CPU_HAS_SMARTMIPS
2553 depends on SYS_SUPPORTS_SMARTMIPS
2556 SmartMIPS is a extension of the MIPS32 architecture aimed at
2557 increased security at both hardware and software level for
2558 smartcards. Enabling this option will allow proper use of the
2559 SmartMIPS instructions by Linux applications. However a kernel with
2560 this option will not work on a MIPS core without SmartMIPS core. If
2561 you don't know you probably don't have SmartMIPS and should say N
2564 config CPU_MICROMIPS
2565 depends on 32BIT && SYS_SUPPORTS_MICROMIPS && !CPU_MIPSR6
2568 When this option is enabled the kernel will be built using the
2574 bool "Support for the MIPS SIMD Architecture"
2575 depends on CPU_SUPPORTS_MSA
2576 depends on MIPS_FP_SUPPORT
2577 depends on 64BIT || MIPS_O32_FP64_SUPPORT
2579 MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers
2580 and a set of SIMD instructions to operate on them. When this option
2581 is enabled the kernel will support allocating & switching MSA
2582 vector register contexts. If you know that your kernel will only be
2583 running on CPUs which do not support MSA or that your userland will
2584 not be making use of it then you may wish to say N here to reduce
2585 the size & complexity of your kernel.
2596 depends on !CPU_DIEI_BROKEN
2599 config CPU_DIEI_BROKEN
2605 config CPU_NO_LOAD_STORE_LR
2608 CPU lacks support for unaligned load and store instructions:
2609 LWL, LWR, SWL, SWR (Load/store word left/right).
2610 LDL, LDR, SDL, SDR (Load/store doubleword left/right, for 64bit
2614 # Vectored interrupt mode is an R2 feature
2616 config CPU_MIPSR2_IRQ_VI
2620 # Extended interrupt mode is an R2 feature
2622 config CPU_MIPSR2_IRQ_EI
2627 depends on !CPU_R3000
2633 config CPU_DADDI_WORKAROUNDS
2636 config CPU_R4000_WORKAROUNDS
2638 select CPU_R4400_WORKAROUNDS
2640 config CPU_R4400_WORKAROUNDS
2643 config CPU_R4X00_BUGS64
2645 default y if SYS_HAS_CPU_R4X00 && 64BIT && (TARGET_ISA_REV < 1)
2647 config MIPS_ASID_SHIFT
2649 default 6 if CPU_R3000 || CPU_TX39XX
2652 config MIPS_ASID_BITS
2654 default 0 if MIPS_ASID_BITS_VARIABLE
2655 default 6 if CPU_R3000 || CPU_TX39XX
2658 config MIPS_ASID_BITS_VARIABLE
2661 config MIPS_CRC_SUPPORT
2664 # R4600 erratum. Due to the lack of errata information the exact
2665 # technical details aren't known. I've experimentally found that disabling
2666 # interrupts during indexed I-cache flushes seems to be sufficient to deal
2668 config WAR_R4600_V1_INDEX_ICACHEOP
2671 # Pleasures of the R4600 V1.x. Cite from the IDT R4600 V1.7 errata:
2673 # 18. The CACHE instructions Hit_Writeback_Invalidate_D, Hit_Writeback_D,
2674 # Hit_Invalidate_D and Create_Dirty_Excl_D should only be
2675 # executed if there is no other dcache activity. If the dcache is
2676 # accessed for another instruction immediately preceding when these
2677 # cache instructions are executing, it is possible that the dcache
2678 # tag match outputs used by these cache instructions will be
2679 # incorrect. These cache instructions should be preceded by at least
2680 # four instructions that are not any kind of load or store
2683 # This is not allowed: lw
2687 # cache Hit_Writeback_Invalidate_D
2689 # This is allowed: lw
2694 # cache Hit_Writeback_Invalidate_D
2695 config WAR_R4600_V1_HIT_CACHEOP
2698 # Writeback and invalidate the primary cache dcache before DMA.
2700 # R4600 v2.0 bug: "The CACHE instructions Hit_Writeback_Inv_D,
2701 # Hit_Writeback_D, Hit_Invalidate_D and Create_Dirty_Exclusive_D will only
2702 # operate correctly if the internal data cache refill buffer is empty. These
2703 # CACHE instructions should be separated from any potential data cache miss
2704 # by a load instruction to an uncached address to empty the response buffer."
2705 # (Revision 2.0 device errata from IDT available on https://www.idt.com/
2707 config WAR_R4600_V2_HIT_CACHEOP
2710 # From TX49/H2 manual: "If the instruction (i.e. CACHE) is issued for
2711 # the line which this instruction itself exists, the following
2712 # operation is not guaranteed."
2714 # Workaround: do two phase flushing for Index_Invalidate_I
2715 config WAR_TX49XX_ICACHE_INDEX_INV
2718 # The RM7000 processors and the E9000 cores have a bug (though PMC-Sierra
2719 # opposes it being called that) where invalid instructions in the same
2720 # I-cache line worth of instructions being fetched may case spurious
2722 config WAR_ICACHE_REFILLS
2725 # On the R10000 up to version 2.6 (not sure about 2.7) there is a bug that
2726 # may cause ll / sc and lld / scd sequences to execute non-atomically.
2727 config WAR_R10000_LLSC
2730 # 34K core erratum: "Problems Executing the TLBR Instruction"
2731 config WAR_MIPS34K_MISSED_ITLB
2735 # - Highmem only makes sense for the 32-bit kernel.
2736 # - The current highmem code will only work properly on physically indexed
2737 # caches such as R3000, SB1, R7000 or those that look like they're virtually
2738 # indexed such as R4000/R4400 SC and MC versions or R10000. So for the
2739 # moment we protect the user and offer the highmem option only on machines
2740 # where it's known to be safe. This will not offer highmem on a few systems
2741 # such as MIPS32 and MIPS64 CPUs which may have virtual and physically
2742 # indexed CPUs but we're playing safe.
2743 # - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we
2744 # know they might have memory configurations that could make use of highmem
2748 bool "High Memory Support"
2749 depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA
2752 config CPU_SUPPORTS_HIGHMEM
2755 config SYS_SUPPORTS_HIGHMEM
2758 config SYS_SUPPORTS_SMARTMIPS
2761 config SYS_SUPPORTS_MICROMIPS
2764 config SYS_SUPPORTS_MIPS16
2767 This option must be set if a kernel might be executed on a MIPS16-
2768 enabled CPU even if MIPS16 is not actually being used. In other
2769 words, it makes the kernel MIPS16-tolerant.
2771 config CPU_SUPPORTS_MSA
2774 config ARCH_FLATMEM_ENABLE
2776 depends on !NUMA && !CPU_LOONGSON2EF
2778 config ARCH_SPARSEMEM_ENABLE
2780 select SPARSEMEM_STATIC if !SGI_IP27
2784 depends on SYS_SUPPORTS_NUMA
2787 Say Y to compile the kernel to support NUMA (Non-Uniform Memory
2788 Access). This option improves performance on systems with more
2789 than two nodes; on two node systems it is generally better to
2790 leave it disabled; on single node systems leave this option
2793 config SYS_SUPPORTS_NUMA
2796 config HAVE_SETUP_PER_CPU_AREA
2800 config NEED_PER_CPU_EMBED_FIRST_CHUNK
2805 bool "Relocatable kernel"
2806 depends on SYS_SUPPORTS_RELOCATABLE
2807 depends on CPU_MIPS32_R2 || CPU_MIPS64_R2 || \
2808 CPU_MIPS32_R5 || CPU_MIPS64_R5 || \
2809 CPU_MIPS32_R6 || CPU_MIPS64_R6 || \
2810 CPU_P5600 || CAVIUM_OCTEON_SOC || \
2813 This builds a kernel image that retains relocation information
2814 so it can be loaded someplace besides the default 1MB.
2815 The relocations make the kernel binary about 15% larger,
2816 but are discarded at runtime
2818 config RELOCATION_TABLE_SIZE
2819 hex "Relocation table size"
2820 depends on RELOCATABLE
2821 range 0x0 0x01000000
2822 default "0x00200000" if CPU_LOONGSON64
2823 default "0x00100000"
2825 A table of relocation data will be appended to the kernel binary
2826 and parsed at boot to fix up the relocated kernel.
2828 This option allows the amount of space reserved for the table to be
2829 adjusted, although the default of 1Mb should be ok in most cases.
2831 The build will fail and a valid size suggested if this is too small.
2833 If unsure, leave at the default value.
2835 config RANDOMIZE_BASE
2836 bool "Randomize the address of the kernel image"
2837 depends on RELOCATABLE
2839 Randomizes the physical and virtual address at which the
2840 kernel image is loaded, as a security feature that
2841 deters exploit attempts relying on knowledge of the location
2842 of kernel internals.
2844 Entropy is generated using any coprocessor 0 registers available.
2846 The kernel will be offset by up to RANDOMIZE_BASE_MAX_OFFSET.
2850 config RANDOMIZE_BASE_MAX_OFFSET
2851 hex "Maximum kASLR offset" if EXPERT
2852 depends on RANDOMIZE_BASE
2853 range 0x0 0x40000000 if EVA || 64BIT
2854 range 0x0 0x08000000
2855 default "0x01000000"
2857 When kASLR is active, this provides the maximum offset that will
2858 be applied to the kernel image. It should be set according to the
2859 amount of physical RAM available in the target system minus
2860 PHYSICAL_START and must be a power of 2.
2862 This is limited by the size of KSEG0, 256Mb on 32-bit or 1Gb with
2863 EVA or 64-bit. The default is 16Mb.
2870 config HW_PERF_EVENTS
2871 bool "Enable hardware performance counter support for perf events"
2872 depends on PERF_EVENTS && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_XLP || CPU_LOONGSON64)
2875 Enable hardware performance counter support for perf events. If
2876 disabled, perf events will use software events only.
2879 bool "Enable DMI scanning"
2880 depends on MACH_LOONGSON64
2881 select DMI_SCAN_MACHINE_NON_EFI_FALLBACK
2884 Enabled scanning of DMI to identify machine quirks. Say Y
2885 here unless you have verified that your setup is not
2886 affected by entries in the DMI blacklist. Required by PNP
2890 bool "Multi-Processing support"
2891 depends on SYS_SUPPORTS_SMP
2893 This enables support for systems with more than one CPU. If you have
2894 a system with only one CPU, say N. If you have a system with more
2895 than one CPU, say Y.
2897 If you say N here, the kernel will run on uni- and multiprocessor
2898 machines, but will use only one CPU of a multiprocessor machine. If
2899 you say Y here, the kernel will run on many, but not all,
2900 uniprocessor machines. On a uniprocessor machine, the kernel
2901 will run faster if you say N here.
2903 People using multiprocessor machines who say Y here should also say
2904 Y to "Enhanced Real Time Clock Support", below.
2906 See also the SMP-HOWTO available at
2907 <https://www.tldp.org/docs.html#howto>.
2909 If you don't know what to do here, say N.
2912 bool "Support for hot-pluggable CPUs"
2913 depends on SMP && SYS_SUPPORTS_HOTPLUG_CPU
2915 Say Y here to allow turning CPUs off and on. CPUs can be
2916 controlled through /sys/devices/system/cpu.
2917 (Note: power management support will enable this option
2918 automatically on SMP systems. )
2919 Say N if you want to disable CPU hotplug.
2924 config SYS_SUPPORTS_MIPS_CMP
2927 config SYS_SUPPORTS_MIPS_CPS
2930 config SYS_SUPPORTS_SMP
2933 config NR_CPUS_DEFAULT_4
2936 config NR_CPUS_DEFAULT_8
2939 config NR_CPUS_DEFAULT_16
2942 config NR_CPUS_DEFAULT_32
2945 config NR_CPUS_DEFAULT_64
2949 int "Maximum number of CPUs (2-256)"
2952 default "4" if NR_CPUS_DEFAULT_4
2953 default "8" if NR_CPUS_DEFAULT_8
2954 default "16" if NR_CPUS_DEFAULT_16
2955 default "32" if NR_CPUS_DEFAULT_32
2956 default "64" if NR_CPUS_DEFAULT_64
2958 This allows you to specify the maximum number of CPUs which this
2959 kernel will support. The maximum supported value is 32 for 32-bit
2960 kernel and 64 for 64-bit kernels; the minimum value which makes
2961 sense is 1 for Qemu (useful only for kernel debugging purposes)
2962 and 2 for all others.
2964 This is purely to save memory - each supported CPU adds
2965 approximately eight kilobytes to the kernel image. For best
2966 performance should round up your number of processors to the next
2969 config MIPS_PERF_SHARED_TC_COUNTERS
2972 config MIPS_NR_CPU_NR_MAP_1024
2975 config MIPS_NR_CPU_NR_MAP
2978 default 1024 if MIPS_NR_CPU_NR_MAP_1024
2979 default NR_CPUS if !MIPS_NR_CPU_NR_MAP_1024
2982 # Timer Interrupt Frequency Configuration
2986 prompt "Timer frequency"
2989 Allows the configuration of the timer frequency.
2992 bool "24 HZ" if SYS_SUPPORTS_24HZ || SYS_SUPPORTS_ARBIT_HZ
2995 bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ
2998 bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ
3001 bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ
3004 bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ
3007 bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ
3010 bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ
3013 bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ
3017 config SYS_SUPPORTS_24HZ
3020 config SYS_SUPPORTS_48HZ
3023 config SYS_SUPPORTS_100HZ
3026 config SYS_SUPPORTS_128HZ
3029 config SYS_SUPPORTS_250HZ
3032 config SYS_SUPPORTS_256HZ
3035 config SYS_SUPPORTS_1000HZ
3038 config SYS_SUPPORTS_1024HZ
3041 config SYS_SUPPORTS_ARBIT_HZ
3043 default y if !SYS_SUPPORTS_24HZ && \
3044 !SYS_SUPPORTS_48HZ && \
3045 !SYS_SUPPORTS_100HZ && \
3046 !SYS_SUPPORTS_128HZ && \
3047 !SYS_SUPPORTS_250HZ && \
3048 !SYS_SUPPORTS_256HZ && \
3049 !SYS_SUPPORTS_1000HZ && \
3050 !SYS_SUPPORTS_1024HZ
3056 default 100 if HZ_100
3057 default 128 if HZ_128
3058 default 250 if HZ_250
3059 default 256 if HZ_256
3060 default 1000 if HZ_1000
3061 default 1024 if HZ_1024
3064 def_bool HIGH_RES_TIMERS
3067 bool "Kexec system call"
3070 kexec is a system call that implements the ability to shutdown your
3071 current kernel, and to start another kernel. It is like a reboot
3072 but it is independent of the system firmware. And like a reboot
3073 you can start any kernel with it, not just Linux.
3075 The name comes from the similarity to the exec system call.
3077 It is an ongoing process to be certain the hardware in a machine
3078 is properly shutdown, so do not be surprised if this code does not
3079 initially work for you. As of this writing the exact hardware
3080 interface is strongly in flux, so no good recommendation can be
3084 bool "Kernel crash dumps"
3086 Generate crash dump after being started by kexec.
3087 This should be normally only set in special crash dump kernels
3088 which are loaded in the main kernel with kexec-tools into
3089 a specially reserved region and then later executed after
3090 a crash by kdump/kexec. The crash dump kernel must be compiled
3091 to a memory address not used by the main kernel or firmware using
3094 config PHYSICAL_START
3095 hex "Physical address where the kernel is loaded"
3096 default "0xffffffff84000000"
3097 depends on CRASH_DUMP
3099 This gives the CKSEG0 or KSEG0 address where the kernel is loaded.
3100 If you plan to use kernel for capturing the crash dump change
3101 this value to start of the reserved region (the "X" value as
3102 specified in the "crashkernel=YM@XM" command line boot parameter
3103 passed to the panic-ed kernel).
3105 config MIPS_O32_FP64_SUPPORT
3106 bool "Support for O32 binaries using 64-bit FP" if !CPU_MIPSR6
3107 depends on 32BIT || MIPS32_O32
3109 When this is enabled, the kernel will support use of 64-bit floating
3110 point registers with binaries using the O32 ABI along with the
3111 EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On
3112 32-bit MIPS systems this support is at the cost of increasing the
3113 size and complexity of the compiled FPU emulator. Thus if you are
3114 running a MIPS32 system and know that none of your userland binaries
3115 will require 64-bit floating point, you may wish to reduce the size
3116 of your kernel & potentially improve FP emulation performance by
3119 Although binutils currently supports use of this flag the details
3120 concerning its effect upon the O32 ABI in userland are still being
3121 worked on. In order to avoid userland becoming dependent upon current
3122 behaviour before the details have been finalised, this option should
3123 be considered experimental and only enabled by those working upon
3131 select OF_EARLY_FLATTREE
3141 prompt "Kernel appended dtb support" if USE_OF
3142 default MIPS_NO_APPENDED_DTB
3144 config MIPS_NO_APPENDED_DTB
3147 Do not enable appended dtb support.
3149 config MIPS_ELF_APPENDED_DTB
3152 With this option, the boot code will look for a device tree binary
3153 DTB) included in the vmlinux ELF section .appended_dtb. By default
3154 it is empty and the DTB can be appended using binutils command
3157 objcopy --update-section .appended_dtb=<filename>.dtb vmlinux
3159 This is meant as a backward compatibility convenience for those
3160 systems with a bootloader that can't be upgraded to accommodate
3161 the documented boot protocol using a device tree.
3163 config MIPS_RAW_APPENDED_DTB
3164 bool "vmlinux.bin or vmlinuz.bin"
3166 With this option, the boot code will look for a device tree binary
3167 DTB) appended to raw vmlinux.bin or vmlinuz.bin.
3168 (e.g. cat vmlinux.bin <filename>.dtb > vmlinux_w_dtb).
3170 This is meant as a backward compatibility convenience for those
3171 systems with a bootloader that can't be upgraded to accommodate
3172 the documented boot protocol using a device tree.
3174 Beware that there is very little in terms of protection against
3175 this option being confused by leftover garbage in memory that might
3176 look like a DTB header after a reboot if no actual DTB is appended
3177 to vmlinux.bin. Do not leave this option active in a production kernel
3178 if you don't intend to always append a DTB.
3182 prompt "Kernel command line type" if !CMDLINE_OVERRIDE
3183 default MIPS_CMDLINE_FROM_DTB if USE_OF && !ATH79 && !MACH_INGENIC && \
3184 !MACH_LOONGSON64 && !MIPS_MALTA && \
3186 default MIPS_CMDLINE_FROM_BOOTLOADER
3188 config MIPS_CMDLINE_FROM_DTB
3190 bool "Dtb kernel arguments if available"
3192 config MIPS_CMDLINE_DTB_EXTEND
3194 bool "Extend dtb kernel arguments with bootloader arguments"
3196 config MIPS_CMDLINE_FROM_BOOTLOADER
3197 bool "Bootloader kernel arguments if available"
3199 config MIPS_CMDLINE_BUILTIN_EXTEND
3200 depends on CMDLINE_BOOL
3201 bool "Extend builtin kernel arguments with bootloader arguments"
3206 config LOCKDEP_SUPPORT
3210 config STACKTRACE_SUPPORT
3214 config PGTABLE_LEVELS
3216 default 4 if PAGE_SIZE_4KB && MIPS_VA_BITS_48
3217 default 3 if 64BIT && !PAGE_SIZE_64KB
3220 config MIPS_AUTO_PFN_OFFSET
3223 menu "Bus options (PCI, PCMCIA, EISA, ISA, TC)"
3225 config PCI_DRIVERS_GENERIC
3226 select PCI_DOMAINS_GENERIC if PCI
3229 config PCI_DRIVERS_LEGACY
3230 def_bool !PCI_DRIVERS_GENERIC
3231 select NO_GENERIC_PCI_IOPORT_MAP
3232 select PCI_DOMAINS if PCI
3235 # ISA support is now enabled via select. Too many systems still have the one
3236 # or other ISA chip on the board that users don't know about so don't expect
3237 # users to choose the right thing ...
3243 bool "TURBOchannel support"
3244 depends on MACH_DECSTATION
3246 TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS
3247 processors. TURBOchannel programming specifications are available
3249 <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/>
3251 <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/>
3252 Linux driver support status is documented at:
3253 <http://www.linux-mips.org/wiki/DECstation>
3259 config ARCH_MMAP_RND_BITS_MIN
3263 config ARCH_MMAP_RND_BITS_MAX
3267 config ARCH_MMAP_RND_COMPAT_BITS_MIN
3270 config ARCH_MMAP_RND_COMPAT_BITS_MAX
3277 select MIPS_EXTERNAL_TIMER
3283 config MIPS32_COMPAT
3289 config SYSVIPC_COMPAT
3293 bool "Kernel support for o32 binaries"
3295 select ARCH_WANT_OLD_COMPAT_IPC
3297 select MIPS32_COMPAT
3298 select SYSVIPC_COMPAT if SYSVIPC
3300 Select this option if you want to run o32 binaries. These are pure
3301 32-bit binaries as used by the 32-bit Linux/MIPS port. Most of
3302 existing binaries are in this format.
3307 bool "Kernel support for n32 binaries"
3309 select ARCH_WANT_COMPAT_IPC_PARSE_VERSION
3311 select MIPS32_COMPAT
3312 select SYSVIPC_COMPAT if SYSVIPC
3314 Select this option if you want to run n32 binaries. These are
3315 64-bit binaries using 32-bit quantities for addressing and certain
3316 data that would normally be 64-bit. They are used in special
3321 menu "Power management options"
3323 config ARCH_HIBERNATION_POSSIBLE
3325 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
3327 config ARCH_SUSPEND_POSSIBLE
3329 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
3331 source "kernel/power/Kconfig"
3335 config MIPS_EXTERNAL_TIMER
3338 menu "CPU Power Management"
3340 if CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER
3341 source "drivers/cpufreq/Kconfig"
3344 source "drivers/cpuidle/Kconfig"
3348 source "drivers/firmware/Kconfig"
3350 source "arch/mips/kvm/Kconfig"
3352 source "arch/mips/vdso/Kconfig"