1 # SPDX-License-Identifier: GPL-2.0
5 select ARCH_32BIT_OFF_T if !64BIT
6 select ARCH_BINFMT_ELF_STATE if MIPS_FP_SUPPORT
7 select ARCH_HAS_DEBUG_VIRTUAL if !64BIT
8 select ARCH_HAS_FORTIFY_SOURCE
10 select ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE if !EVA
11 select ARCH_HAS_PTE_SPECIAL if !(32BIT && CPU_HAS_RIXI)
12 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
13 select ARCH_HAS_UBSAN_SANITIZE_ALL
14 select ARCH_HAS_GCOV_PROFILE_ALL
15 select ARCH_KEEP_MEMBLOCK
16 select ARCH_SUPPORTS_UPROBES
17 select ARCH_USE_BUILTIN_BSWAP
18 select ARCH_USE_CMPXCHG_LOCKREF if 64BIT
19 select ARCH_USE_MEMTEST
20 select ARCH_USE_QUEUED_RWLOCKS
21 select ARCH_USE_QUEUED_SPINLOCKS
22 select ARCH_SUPPORTS_HUGETLBFS if CPU_SUPPORTS_HUGEPAGES
23 select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT if MMU
24 select ARCH_WANT_IPC_PARSE_VERSION
25 select ARCH_WANT_LD_ORPHAN_WARN
26 select BUILDTIME_TABLE_SORT
27 select CLONE_BACKWARDS
28 select CPU_NO_EFFICIENT_FFS if (TARGET_ISA_REV < 1)
29 select CPU_PM if CPU_IDLE
30 select GENERIC_ATOMIC64 if !64BIT
31 select GENERIC_CMOS_UPDATE
32 select GENERIC_CPU_AUTOPROBE
33 select GENERIC_FIND_FIRST_BIT
34 select GENERIC_GETTIMEOFDAY
36 select GENERIC_IRQ_PROBE
37 select GENERIC_IRQ_SHOW
38 select GENERIC_ISA_DMA if EISA
39 select GENERIC_LIB_ASHLDI3
40 select GENERIC_LIB_ASHRDI3
41 select GENERIC_LIB_CMPDI2
42 select GENERIC_LIB_LSHRDI3
43 select GENERIC_LIB_UCMPDI2
44 select GENERIC_SCHED_CLOCK if !CAVIUM_OCTEON_SOC
45 select GENERIC_SMP_IDLE_THREAD
46 select GENERIC_TIME_VSYSCALL
47 select GUP_GET_PTE_LOW_HIGH if CPU_MIPS32 && PHYS_ADDR_T_64BIT
48 select HANDLE_DOMAIN_IRQ
49 select HAVE_ARCH_COMPILER_H
50 select HAVE_ARCH_JUMP_LABEL
51 select HAVE_ARCH_KGDB if MIPS_FP_SUPPORT
52 select HAVE_ARCH_MMAP_RND_BITS if MMU
53 select HAVE_ARCH_MMAP_RND_COMPAT_BITS if MMU && COMPAT
54 select HAVE_ARCH_SECCOMP_FILTER
55 select HAVE_ARCH_TRACEHOOK
56 select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES
57 select HAVE_ASM_MODVERSIONS
58 select HAVE_CBPF_JIT if !64BIT && !CPU_MICROMIPS
59 select HAVE_CONTEXT_TRACKING
61 select HAVE_C_RECORDMCOUNT
62 select HAVE_DEBUG_KMEMLEAK
63 select HAVE_DEBUG_STACKOVERFLOW
64 select HAVE_DMA_CONTIGUOUS
65 select HAVE_DYNAMIC_FTRACE
66 select HAVE_EBPF_JIT if 64BIT && !CPU_MICROMIPS && TARGET_ISA_REV >= 2
67 select HAVE_EXIT_THREAD
69 select HAVE_FTRACE_MCOUNT_RECORD
70 select HAVE_FUNCTION_GRAPH_TRACER
71 select HAVE_FUNCTION_TRACER
72 select HAVE_GCC_PLUGINS
73 select HAVE_GENERIC_VDSO
75 select HAVE_IOREMAP_PROT
76 select HAVE_IRQ_EXIT_ON_IRQ_STACK
77 select HAVE_IRQ_TIME_ACCOUNTING
79 select HAVE_KRETPROBES
80 select HAVE_LD_DEAD_CODE_DATA_ELIMINATION
81 select HAVE_MOD_ARCH_SPECIFIC
83 select HAVE_PERF_EVENTS
85 select HAVE_PERF_USER_STACK_DUMP
86 select HAVE_REGS_AND_STACK_ACCESS_API
88 select HAVE_SPARSE_SYSCALL_NR
89 select HAVE_STACKPROTECTOR
90 select HAVE_SYSCALL_TRACEPOINTS
91 select HAVE_VIRT_CPU_ACCOUNTING_GEN if 64BIT || !SMP
92 select IRQ_FORCED_THREADING
94 select MODULES_USE_ELF_REL if MODULES
95 select MODULES_USE_ELF_RELA if MODULES && 64BIT
96 select PERF_USE_VMALLOC
97 select PCI_MSI_ARCH_FALLBACKS if PCI_MSI
99 select SYSCTL_EXCEPTION_TRACE
101 select ARCH_HAS_ELFCORE_COMPAT
103 config MIPS_FIXUP_BIGPHYS_ADDR
111 select SYS_SUPPORTS_32BIT_KERNEL
112 select SYS_SUPPORTS_LITTLE_ENDIAN
113 select SYS_SUPPORTS_ZBOOT
114 select DMA_NONCOHERENT
119 select GENERIC_IRQ_CHIP
120 select BUILTIN_DTB if MIPS_NO_APPENDED_DTB
122 select CPU_SUPPORTS_CPUFREQ
123 select MIPS_EXTERNAL_TIMER
125 menu "Machine selection"
129 default MIPS_GENERIC_KERNEL
131 config MIPS_GENERIC_KERNEL
132 bool "Generic board-agnostic MIPS kernel"
133 select ARCH_HAS_SETUP_DMA_OPS
138 select CLKSRC_MIPS_GIC
140 select CPU_MIPSR2_IRQ_EI
141 select CPU_MIPSR2_IRQ_VI
143 select DMA_NONCOHERENT
146 select MIPS_AUTO_PFN_OFFSET
147 select MIPS_CPU_SCACHE
149 select MIPS_L1_CACHE_SHIFT_7
150 select NO_EXCEPT_FILL
151 select PCI_DRIVERS_GENERIC
154 select SYS_HAS_CPU_MIPS32_R1
155 select SYS_HAS_CPU_MIPS32_R2
156 select SYS_HAS_CPU_MIPS32_R6
157 select SYS_HAS_CPU_MIPS64_R1
158 select SYS_HAS_CPU_MIPS64_R2
159 select SYS_HAS_CPU_MIPS64_R6
160 select SYS_SUPPORTS_32BIT_KERNEL
161 select SYS_SUPPORTS_64BIT_KERNEL
162 select SYS_SUPPORTS_BIG_ENDIAN
163 select SYS_SUPPORTS_HIGHMEM
164 select SYS_SUPPORTS_LITTLE_ENDIAN
165 select SYS_SUPPORTS_MICROMIPS
166 select SYS_SUPPORTS_MIPS16
167 select SYS_SUPPORTS_MIPS_CPS
168 select SYS_SUPPORTS_MULTITHREADING
169 select SYS_SUPPORTS_RELOCATABLE
170 select SYS_SUPPORTS_SMARTMIPS
171 select SYS_SUPPORTS_ZBOOT
173 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
174 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
175 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
176 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
177 select USB_UHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
178 select USB_UHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
181 Select this to build a kernel which aims to support multiple boards,
182 generally using a flattened device tree passed from the bootloader
183 using the boot protocol defined in the UHI (Unified Hosting
184 Interface) specification.
187 bool "Alchemy processor based machines"
188 select PHYS_ADDR_T_64BIT
192 select DMA_NONCOHERENT # Au1000,1500,1100 aren't, rest is
193 select MIPS_FIXUP_BIGPHYS_ADDR if PCI
194 select SYS_HAS_CPU_MIPS32_R1
195 select SYS_SUPPORTS_32BIT_KERNEL
196 select SYS_SUPPORTS_APM_EMULATION
198 select SYS_SUPPORTS_ZBOOT
202 bool "Texas Instruments AR7"
204 select DMA_NONCOHERENT
208 select NO_EXCEPT_FILL
210 select SYS_HAS_CPU_MIPS32_R1
211 select SYS_HAS_EARLY_PRINTK
212 select SYS_SUPPORTS_32BIT_KERNEL
213 select SYS_SUPPORTS_LITTLE_ENDIAN
214 select SYS_SUPPORTS_MIPS16
215 select SYS_SUPPORTS_ZBOOT_UART16550
218 select HAVE_LEGACY_CLK
220 Support for the Texas Instruments AR7 System-on-a-Chip
221 family: TNETD7100, 7200 and 7300.
224 bool "Atheros AR231x/AR531x SoC support"
227 select DMA_NONCOHERENT
230 select SYS_HAS_CPU_MIPS32_R1
231 select SYS_SUPPORTS_BIG_ENDIAN
232 select SYS_SUPPORTS_32BIT_KERNEL
233 select SYS_HAS_EARLY_PRINTK
235 Support for Atheros AR231x and Atheros AR531x based boards
238 bool "Atheros AR71XX/AR724X/AR913X based boards"
239 select ARCH_HAS_RESET_CONTROLLER
243 select DMA_NONCOHERENT
248 select SYS_HAS_CPU_MIPS32_R2
249 select SYS_HAS_EARLY_PRINTK
250 select SYS_SUPPORTS_32BIT_KERNEL
251 select SYS_SUPPORTS_BIG_ENDIAN
252 select SYS_SUPPORTS_MIPS16
253 select SYS_SUPPORTS_ZBOOT_UART_PROM
255 select USB_EHCI_ROOT_HUB_TT if USB_EHCI_HCD_PLATFORM
257 Support for the Atheros AR71XX/AR724X/AR913X SoCs.
260 bool "Broadcom Generic BMIPS kernel"
261 select ARCH_HAS_RESET_CONTROLLER
262 select ARCH_HAS_SYNC_DMA_FOR_CPU_ALL
263 select ARCH_HAS_PHYS_TO_DMA
265 select NO_EXCEPT_FILL
271 select BCM6345_L1_IRQ
272 select BCM7038_L1_IRQ
273 select BCM7120_L2_IRQ
274 select BRCMSTB_L2_IRQ
276 select DMA_NONCOHERENT
277 select SYS_SUPPORTS_32BIT_KERNEL
278 select SYS_SUPPORTS_LITTLE_ENDIAN
279 select SYS_SUPPORTS_BIG_ENDIAN
280 select SYS_SUPPORTS_HIGHMEM
281 select SYS_HAS_CPU_BMIPS32_3300
282 select SYS_HAS_CPU_BMIPS4350
283 select SYS_HAS_CPU_BMIPS4380
284 select SYS_HAS_CPU_BMIPS5000
286 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
287 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
288 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
289 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
290 select HARDIRQS_SW_RESEND
292 Build a generic DT-based kernel image that boots on select
293 BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top
294 box chips. Note that CONFIG_CPU_BIG_ENDIAN/CONFIG_CPU_LITTLE_ENDIAN
295 must be set appropriately for your board.
298 bool "Broadcom BCM47XX based boards"
302 select DMA_NONCOHERENT
305 select SYS_HAS_CPU_MIPS32_R1
306 select NO_EXCEPT_FILL
307 select SYS_SUPPORTS_32BIT_KERNEL
308 select SYS_SUPPORTS_LITTLE_ENDIAN
309 select SYS_SUPPORTS_MIPS16
310 select SYS_SUPPORTS_ZBOOT
311 select SYS_HAS_EARLY_PRINTK
312 select USE_GENERIC_EARLY_PRINTK_8250
314 select LEDS_GPIO_REGISTER
317 select BCM47XX_SSB if !BCM47XX_BCMA
319 Support for BCM47XX based boards
322 bool "Broadcom BCM63XX based boards"
327 select DMA_NONCOHERENT
329 select SYS_SUPPORTS_32BIT_KERNEL
330 select SYS_SUPPORTS_BIG_ENDIAN
331 select SYS_HAS_EARLY_PRINTK
334 select MIPS_L1_CACHE_SHIFT_4
336 select HAVE_LEGACY_CLK
338 Support for BCM63XX based boards
345 select DMA_NONCOHERENT
351 select PCI_GT64XXX_PCI0
352 select SYS_HAS_CPU_NEVADA
353 select SYS_HAS_EARLY_PRINTK
354 select SYS_SUPPORTS_32BIT_KERNEL
355 select SYS_SUPPORTS_64BIT_KERNEL
356 select SYS_SUPPORTS_LITTLE_ENDIAN
357 select USE_GENERIC_EARLY_PRINTK_8250
359 config MACH_DECSTATION
363 select CEVT_R4K if CPU_R4X00
365 select CSRC_R4K if CPU_R4X00
366 select CPU_DADDI_WORKAROUNDS if 64BIT
367 select CPU_R4000_WORKAROUNDS if 64BIT
368 select CPU_R4400_WORKAROUNDS if 64BIT
369 select DMA_NONCOHERENT
372 select SYS_HAS_CPU_R3000
373 select SYS_HAS_CPU_R4X00
374 select SYS_SUPPORTS_32BIT_KERNEL
375 select SYS_SUPPORTS_64BIT_KERNEL
376 select SYS_SUPPORTS_LITTLE_ENDIAN
377 select SYS_SUPPORTS_128HZ
378 select SYS_SUPPORTS_256HZ
379 select SYS_SUPPORTS_1024HZ
380 select MIPS_L1_CACHE_SHIFT_4
382 This enables support for DEC's MIPS based workstations. For details
383 see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the
384 DECstation porting pages on <http://decstation.unix-ag.org/>.
386 If you have one of the following DECstation Models you definitely
387 want to choose R4xx0 for the CPU Type:
394 otherwise choose R3000.
397 bool "Jazz family of machines"
400 select ARCH_MIGHT_HAVE_PC_PARPORT
401 select ARCH_MIGHT_HAVE_PC_SERIO
405 select ARCH_MAY_HAVE_PC_FDC
408 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
409 select GENERIC_ISA_DMA
410 select HAVE_PCSPKR_PLATFORM
415 select SYS_HAS_CPU_R4X00
416 select SYS_SUPPORTS_32BIT_KERNEL
417 select SYS_SUPPORTS_64BIT_KERNEL
418 select SYS_SUPPORTS_100HZ
419 select SYS_SUPPORTS_LITTLE_ENDIAN
421 This a family of machines based on the MIPS R4030 chipset which was
422 used by several vendors to build RISC/os and Windows NT workstations.
423 Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and
424 Olivetti M700-10 workstations.
426 config MACH_INGENIC_SOC
427 bool "Ingenic SoC based machines"
430 select SYS_SUPPORTS_ZBOOT_UART16550
433 bool "Lantiq based platforms"
434 select DMA_NONCOHERENT
438 select SYS_HAS_CPU_MIPS32_R1
439 select SYS_HAS_CPU_MIPS32_R2
440 select SYS_SUPPORTS_BIG_ENDIAN
441 select SYS_SUPPORTS_32BIT_KERNEL
442 select SYS_SUPPORTS_MIPS16
443 select SYS_SUPPORTS_MULTITHREADING
444 select SYS_SUPPORTS_VPE_LOADER
445 select SYS_HAS_EARLY_PRINTK
450 select HAVE_LEGACY_CLK
453 select PINCTRL_LANTIQ
454 select ARCH_HAS_RESET_CONTROLLER
455 select RESET_CONTROLLER
457 config MACH_LOONGSON32
458 bool "Loongson 32-bit family of machines"
459 select SYS_SUPPORTS_ZBOOT
461 This enables support for the Loongson-1 family of machines.
463 Loongson-1 is a family of 32-bit MIPS-compatible SoCs developed by
464 the Institute of Computing Technology (ICT), Chinese Academy of
467 config MACH_LOONGSON2EF
468 bool "Loongson-2E/F family of machines"
469 select SYS_SUPPORTS_ZBOOT
471 This enables the support of early Loongson-2E/F family of machines.
473 config MACH_LOONGSON64
474 bool "Loongson 64-bit family of machines"
475 select ARCH_SPARSEMEM_ENABLE
476 select ARCH_MIGHT_HAVE_PC_PARPORT
477 select ARCH_MIGHT_HAVE_PC_SERIO
478 select GENERIC_ISA_DMA_SUPPORT_BROKEN
488 select NO_EXCEPT_FILL
489 select NR_CPUS_DEFAULT_64
490 select USE_GENERIC_EARLY_PRINTK_8250
491 select PCI_DRIVERS_GENERIC
492 select SYS_HAS_CPU_LOONGSON64
493 select SYS_HAS_EARLY_PRINTK
494 select SYS_SUPPORTS_SMP
495 select SYS_SUPPORTS_HOTPLUG_CPU
496 select SYS_SUPPORTS_NUMA
497 select SYS_SUPPORTS_64BIT_KERNEL
498 select SYS_SUPPORTS_HIGHMEM
499 select SYS_SUPPORTS_LITTLE_ENDIAN
500 select SYS_SUPPORTS_ZBOOT
501 select SYS_SUPPORTS_RELOCATABLE
506 select PCI_HOST_GENERIC
508 This enables the support of Loongson-2/3 family of machines.
510 Loongson-2 and Loongson-3 are 64-bit general-purpose processors with
511 GS264/GS464/GS464E/GS464V microarchitecture (except old Loongson-2E
512 and Loongson-2F which will be removed), developed by the Institute
513 of Computing Technology (ICT), Chinese Academy of Sciences (CAS).
515 config MACH_PISTACHIO
516 bool "IMG Pistachio SoC based boards"
520 select CLKSRC_MIPS_GIC
523 select DMA_NONCOHERENT
527 select MIPS_CPU_SCACHE
531 select SYS_HAS_CPU_MIPS32_R2
532 select SYS_SUPPORTS_32BIT_KERNEL
533 select SYS_SUPPORTS_LITTLE_ENDIAN
534 select SYS_SUPPORTS_MIPS_CPS
535 select SYS_SUPPORTS_MULTITHREADING
536 select SYS_SUPPORTS_RELOCATABLE
537 select SYS_SUPPORTS_ZBOOT
538 select SYS_HAS_EARLY_PRINTK
539 select USE_GENERIC_EARLY_PRINTK_8250
542 This enables support for the IMG Pistachio SoC platform.
545 bool "MIPS Malta board"
546 select ARCH_MAY_HAVE_PC_FDC
547 select ARCH_MIGHT_HAVE_PC_PARPORT
548 select ARCH_MIGHT_HAVE_PC_SERIO
553 select CLKSRC_MIPS_GIC
556 select DMA_NONCOHERENT
557 select GENERIC_ISA_DMA
558 select HAVE_PCSPKR_PLATFORM
564 select MIPS_CPU_SCACHE
566 select MIPS_L1_CACHE_SHIFT_6
568 select PCI_GT64XXX_PCI0
571 select SYS_HAS_CPU_MIPS32_R1
572 select SYS_HAS_CPU_MIPS32_R2
573 select SYS_HAS_CPU_MIPS32_R3_5
574 select SYS_HAS_CPU_MIPS32_R5
575 select SYS_HAS_CPU_MIPS32_R6
576 select SYS_HAS_CPU_MIPS64_R1
577 select SYS_HAS_CPU_MIPS64_R2
578 select SYS_HAS_CPU_MIPS64_R6
579 select SYS_HAS_CPU_NEVADA
580 select SYS_HAS_CPU_RM7000
581 select SYS_SUPPORTS_32BIT_KERNEL
582 select SYS_SUPPORTS_64BIT_KERNEL
583 select SYS_SUPPORTS_BIG_ENDIAN
584 select SYS_SUPPORTS_HIGHMEM
585 select SYS_SUPPORTS_LITTLE_ENDIAN
586 select SYS_SUPPORTS_MICROMIPS
587 select SYS_SUPPORTS_MIPS16
588 select SYS_SUPPORTS_MIPS_CMP
589 select SYS_SUPPORTS_MIPS_CPS
590 select SYS_SUPPORTS_MULTITHREADING
591 select SYS_SUPPORTS_RELOCATABLE
592 select SYS_SUPPORTS_SMARTMIPS
593 select SYS_SUPPORTS_VPE_LOADER
594 select SYS_SUPPORTS_ZBOOT
596 select WAR_ICACHE_REFILLS
597 select ZONE_DMA32 if 64BIT
599 This enables support for the MIPS Technologies Malta evaluation
603 bool "Microchip PIC32 Family"
605 This enables support for the Microchip PIC32 family of platforms.
607 Microchip PIC32 is a family of general-purpose 32 bit MIPS core
611 bool "NEC VR4100 series based machines"
614 select SYS_HAS_CPU_VR41XX
615 select SYS_SUPPORTS_MIPS16
618 config MACH_NINTENDO64
619 bool "Nintendo 64 console"
622 select SYS_HAS_CPU_R4300
623 select SYS_SUPPORTS_BIG_ENDIAN
624 select SYS_SUPPORTS_ZBOOT
625 select SYS_SUPPORTS_32BIT_KERNEL
626 select SYS_SUPPORTS_64BIT_KERNEL
627 select DMA_NONCOHERENT
631 bool "Ralink based machines"
635 select DMA_NONCOHERENT
638 select SYS_HAS_CPU_MIPS32_R1
639 select SYS_HAS_CPU_MIPS32_R2
640 select SYS_SUPPORTS_32BIT_KERNEL
641 select SYS_SUPPORTS_LITTLE_ENDIAN
642 select SYS_SUPPORTS_MIPS16
643 select SYS_SUPPORTS_ZBOOT
644 select SYS_HAS_EARLY_PRINTK
646 select ARCH_HAS_RESET_CONTROLLER
647 select RESET_CONTROLLER
649 config MACH_REALTEK_RTL
650 bool "Realtek RTL838x/RTL839x based machines"
652 select DMA_NONCOHERENT
656 select SYS_HAS_CPU_MIPS32_R1
657 select SYS_HAS_CPU_MIPS32_R2
658 select SYS_SUPPORTS_BIG_ENDIAN
659 select SYS_SUPPORTS_32BIT_KERNEL
660 select SYS_SUPPORTS_MIPS16
661 select SYS_SUPPORTS_MULTITHREADING
662 select SYS_SUPPORTS_VPE_LOADER
663 select SYS_HAS_EARLY_PRINTK
664 select SYS_HAS_EARLY_PRINTK_8250
665 select USE_GENERIC_EARLY_PRINTK_8250
671 bool "SGI IP22 (Indy/Indigo2)"
676 select ARCH_MIGHT_HAVE_PC_SERIO
680 select DEFAULT_SGI_PARTITION
681 select DMA_NONCOHERENT
685 select IP22_CPU_SCACHE
687 select GENERIC_ISA_DMA_SUPPORT_BROKEN
689 select SGI_HAS_INDYDOG
695 select SYS_HAS_CPU_R4X00
696 select SYS_HAS_CPU_R5000
697 select SYS_HAS_EARLY_PRINTK
698 select SYS_SUPPORTS_32BIT_KERNEL
699 select SYS_SUPPORTS_64BIT_KERNEL
700 select SYS_SUPPORTS_BIG_ENDIAN
701 select WAR_R4600_V1_INDEX_ICACHEOP
702 select WAR_R4600_V1_HIT_CACHEOP
703 select WAR_R4600_V2_HIT_CACHEOP
704 select MIPS_L1_CACHE_SHIFT_7
706 This are the SGI Indy, Challenge S and Indigo2, as well as certain
707 OEM variants like the Tandem CMN B006S. To compile a Linux kernel
708 that runs on these, say Y here.
711 bool "SGI IP27 (Origin200/2000)"
712 select ARCH_HAS_PHYS_TO_DMA
713 select ARCH_SPARSEMEM_ENABLE
716 select ARC_CMDLINE_ONLY
718 select DEFAULT_SGI_PARTITION
720 select SYS_HAS_EARLY_PRINTK
723 select IRQ_DOMAIN_HIERARCHY
724 select NR_CPUS_DEFAULT_64
725 select PCI_DRIVERS_GENERIC
726 select PCI_XTALK_BRIDGE
727 select SYS_HAS_CPU_R10000
728 select SYS_SUPPORTS_64BIT_KERNEL
729 select SYS_SUPPORTS_BIG_ENDIAN
730 select SYS_SUPPORTS_NUMA
731 select SYS_SUPPORTS_SMP
732 select WAR_R10000_LLSC
733 select MIPS_L1_CACHE_SHIFT_7
736 This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics
737 workstations. To compile a Linux kernel that runs on these, say Y
741 bool "SGI IP28 (Indigo2 R10k)"
746 select ARCH_MIGHT_HAVE_PC_SERIO
750 select DEFAULT_SGI_PARTITION
751 select DMA_NONCOHERENT
752 select GENERIC_ISA_DMA_SUPPORT_BROKEN
758 select SGI_HAS_INDYDOG
764 select SYS_HAS_CPU_R10000
765 select SYS_HAS_EARLY_PRINTK
766 select SYS_SUPPORTS_64BIT_KERNEL
767 select SYS_SUPPORTS_BIG_ENDIAN
768 select WAR_R10000_LLSC
769 select MIPS_L1_CACHE_SHIFT_7
771 This is the SGI Indigo2 with R10000 processor. To compile a Linux
772 kernel that runs on these, say Y here.
775 bool "SGI IP30 (Octane/Octane2)"
776 select ARCH_HAS_PHYS_TO_DMA
783 select SYNC_R4K if SMP
787 select IRQ_DOMAIN_HIERARCHY
788 select NR_CPUS_DEFAULT_2
789 select PCI_DRIVERS_GENERIC
790 select PCI_XTALK_BRIDGE
791 select SYS_HAS_EARLY_PRINTK
792 select SYS_HAS_CPU_R10000
793 select SYS_SUPPORTS_64BIT_KERNEL
794 select SYS_SUPPORTS_BIG_ENDIAN
795 select SYS_SUPPORTS_SMP
796 select WAR_R10000_LLSC
797 select MIPS_L1_CACHE_SHIFT_7
800 These are the SGI Octane and Octane2 graphics workstations. To
801 compile a Linux kernel that runs on these, say Y here.
807 select ARCH_HAS_PHYS_TO_DMA
813 select DMA_NONCOHERENT
816 select R5000_CPU_SCACHE
817 select RM7000_CPU_SCACHE
818 select SYS_HAS_CPU_R5000
819 select SYS_HAS_CPU_R10000 if BROKEN
820 select SYS_HAS_CPU_RM7000
821 select SYS_HAS_CPU_NEVADA
822 select SYS_SUPPORTS_64BIT_KERNEL
823 select SYS_SUPPORTS_BIG_ENDIAN
824 select WAR_ICACHE_REFILLS
826 If you want this kernel to run on SGI O2 workstation, say Y here.
829 bool "Sibyte BCM91120C-CRhine"
831 select SIBYTE_BCM1120
833 select SYS_HAS_CPU_SB1
834 select SYS_SUPPORTS_BIG_ENDIAN
835 select SYS_SUPPORTS_LITTLE_ENDIAN
838 bool "Sibyte BCM91120x-Carmel"
840 select SIBYTE_BCM1120
842 select SYS_HAS_CPU_SB1
843 select SYS_SUPPORTS_BIG_ENDIAN
844 select SYS_SUPPORTS_LITTLE_ENDIAN
847 bool "Sibyte BCM91125C-CRhone"
849 select SIBYTE_BCM1125
851 select SYS_HAS_CPU_SB1
852 select SYS_SUPPORTS_BIG_ENDIAN
853 select SYS_SUPPORTS_HIGHMEM
854 select SYS_SUPPORTS_LITTLE_ENDIAN
857 bool "Sibyte BCM91125E-Rhone"
859 select SIBYTE_BCM1125H
861 select SYS_HAS_CPU_SB1
862 select SYS_SUPPORTS_BIG_ENDIAN
863 select SYS_SUPPORTS_LITTLE_ENDIAN
866 bool "Sibyte BCM91250A-SWARM"
868 select HAVE_PATA_PLATFORM
871 select SYS_HAS_CPU_SB1
872 select SYS_SUPPORTS_BIG_ENDIAN
873 select SYS_SUPPORTS_HIGHMEM
874 select SYS_SUPPORTS_LITTLE_ENDIAN
875 select ZONE_DMA32 if 64BIT
876 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
878 config SIBYTE_LITTLESUR
879 bool "Sibyte BCM91250C2-LittleSur"
881 select HAVE_PATA_PLATFORM
884 select SYS_HAS_CPU_SB1
885 select SYS_SUPPORTS_BIG_ENDIAN
886 select SYS_SUPPORTS_HIGHMEM
887 select SYS_SUPPORTS_LITTLE_ENDIAN
888 select ZONE_DMA32 if 64BIT
890 config SIBYTE_SENTOSA
891 bool "Sibyte BCM91250E-Sentosa"
895 select SYS_HAS_CPU_SB1
896 select SYS_SUPPORTS_BIG_ENDIAN
897 select SYS_SUPPORTS_LITTLE_ENDIAN
898 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
901 bool "Sibyte BCM91480B-BigSur"
903 select NR_CPUS_DEFAULT_4
904 select SIBYTE_BCM1x80
906 select SYS_HAS_CPU_SB1
907 select SYS_SUPPORTS_BIG_ENDIAN
908 select SYS_SUPPORTS_HIGHMEM
909 select SYS_SUPPORTS_LITTLE_ENDIAN
910 select ZONE_DMA32 if 64BIT
911 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
914 bool "SNI RM200/300/400"
917 select FW_ARC if CPU_LITTLE_ENDIAN
918 select FW_ARC32 if CPU_LITTLE_ENDIAN
919 select FW_SNIPROM if CPU_BIG_ENDIAN
920 select ARCH_MAY_HAVE_PC_FDC
921 select ARCH_MIGHT_HAVE_PC_PARPORT
922 select ARCH_MIGHT_HAVE_PC_SERIO
926 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
927 select DMA_NONCOHERENT
928 select GENERIC_ISA_DMA
930 select HAVE_PCSPKR_PLATFORM
936 select MIPS_L1_CACHE_SHIFT_6
937 select SWAP_IO_SPACE if CPU_BIG_ENDIAN
938 select SYS_HAS_CPU_R4X00
939 select SYS_HAS_CPU_R5000
940 select SYS_HAS_CPU_R10000
941 select R5000_CPU_SCACHE
942 select SYS_HAS_EARLY_PRINTK
943 select SYS_SUPPORTS_32BIT_KERNEL
944 select SYS_SUPPORTS_64BIT_KERNEL
945 select SYS_SUPPORTS_BIG_ENDIAN
946 select SYS_SUPPORTS_HIGHMEM
947 select SYS_SUPPORTS_LITTLE_ENDIAN
948 select WAR_R4600_V2_HIT_CACHEOP
950 The SNI RM200/300/400 are MIPS-based machines manufactured by
951 Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid
952 Technology and now in turn merged with Fujitsu. Say Y here to
953 support this machine type.
956 bool "Toshiba TX39 series based machines"
959 bool "Toshiba TX49 series based machines"
960 select WAR_TX49XX_ICACHE_INDEX_INV
962 config MIKROTIK_RB532
963 bool "Mikrotik RB532 boards"
966 select DMA_NONCOHERENT
969 select SYS_HAS_CPU_MIPS32_R1
970 select SYS_SUPPORTS_32BIT_KERNEL
971 select SYS_SUPPORTS_LITTLE_ENDIAN
975 select MIPS_L1_CACHE_SHIFT_4
977 Support the Mikrotik(tm) RouterBoard 532 series,
978 based on the IDT RC32434 SoC.
980 config CAVIUM_OCTEON_SOC
981 bool "Cavium Networks Octeon SoC based boards"
983 select ARCH_HAS_PHYS_TO_DMA
985 select PHYS_ADDR_T_64BIT
986 select SYS_SUPPORTS_64BIT_KERNEL
987 select SYS_SUPPORTS_BIG_ENDIAN
989 select EDAC_ATOMIC_SCRUB
990 select SYS_SUPPORTS_LITTLE_ENDIAN
991 select SYS_SUPPORTS_HOTPLUG_CPU if CPU_BIG_ENDIAN
992 select SYS_HAS_EARLY_PRINTK
993 select SYS_HAS_CPU_CAVIUM_OCTEON
995 select HAVE_PLAT_DELAY
996 select HAVE_PLAT_FW_INIT_CMDLINE
997 select HAVE_PLAT_MEMCPY
1002 select ARCH_SPARSEMEM_ENABLE
1003 select SYS_SUPPORTS_SMP
1004 select NR_CPUS_DEFAULT_64
1005 select MIPS_NR_CPU_NR_MAP_1024
1008 select MTD_COMPLEX_MAPPINGS
1010 select SYS_SUPPORTS_RELOCATABLE
1012 This option supports all of the Octeon reference boards from Cavium
1013 Networks. It builds a kernel that dynamically determines the Octeon
1014 CPU type and supports all known board reference implementations.
1015 Some of the supported boards are:
1022 Say Y here for most Octeon reference boards.
1024 config NLM_XLR_BOARD
1025 bool "Netlogic XLR/XLS based systems"
1028 select SYS_HAS_CPU_XLR
1029 select SYS_SUPPORTS_SMP
1031 select SWAP_IO_SPACE
1032 select SYS_SUPPORTS_32BIT_KERNEL
1033 select SYS_SUPPORTS_64BIT_KERNEL
1034 select PHYS_ADDR_T_64BIT
1035 select SYS_SUPPORTS_BIG_ENDIAN
1036 select SYS_SUPPORTS_HIGHMEM
1037 select NR_CPUS_DEFAULT_32
1041 select ZONE_DMA32 if 64BIT
1043 select SYS_HAS_EARLY_PRINTK
1044 select SYS_SUPPORTS_ZBOOT
1045 select SYS_SUPPORTS_ZBOOT_UART16550
1047 Support for systems based on Netlogic XLR and XLS processors.
1048 Say Y here if you have a XLR or XLS based board.
1050 config NLM_XLP_BOARD
1051 bool "Netlogic XLP based systems"
1054 select SYS_HAS_CPU_XLP
1055 select SYS_SUPPORTS_SMP
1057 select SYS_SUPPORTS_32BIT_KERNEL
1058 select SYS_SUPPORTS_64BIT_KERNEL
1059 select PHYS_ADDR_T_64BIT
1061 select SYS_SUPPORTS_BIG_ENDIAN
1062 select SYS_SUPPORTS_LITTLE_ENDIAN
1063 select SYS_SUPPORTS_HIGHMEM
1064 select NR_CPUS_DEFAULT_32
1068 select ZONE_DMA32 if 64BIT
1070 select SYS_HAS_EARLY_PRINTK
1072 select SYS_SUPPORTS_ZBOOT
1073 select SYS_SUPPORTS_ZBOOT_UART16550
1075 This board is based on Netlogic XLP Processor.
1076 Say Y here if you have a XLP based board.
1080 source "arch/mips/alchemy/Kconfig"
1081 source "arch/mips/ath25/Kconfig"
1082 source "arch/mips/ath79/Kconfig"
1083 source "arch/mips/bcm47xx/Kconfig"
1084 source "arch/mips/bcm63xx/Kconfig"
1085 source "arch/mips/bmips/Kconfig"
1086 source "arch/mips/generic/Kconfig"
1087 source "arch/mips/ingenic/Kconfig"
1088 source "arch/mips/jazz/Kconfig"
1089 source "arch/mips/lantiq/Kconfig"
1090 source "arch/mips/pic32/Kconfig"
1091 source "arch/mips/pistachio/Kconfig"
1092 source "arch/mips/ralink/Kconfig"
1093 source "arch/mips/sgi-ip27/Kconfig"
1094 source "arch/mips/sibyte/Kconfig"
1095 source "arch/mips/txx9/Kconfig"
1096 source "arch/mips/vr41xx/Kconfig"
1097 source "arch/mips/cavium-octeon/Kconfig"
1098 source "arch/mips/loongson2ef/Kconfig"
1099 source "arch/mips/loongson32/Kconfig"
1100 source "arch/mips/loongson64/Kconfig"
1101 source "arch/mips/netlogic/Kconfig"
1105 config GENERIC_HWEIGHT
1109 config GENERIC_CALIBRATE_DELAY
1113 config SCHED_OMIT_FRAME_POINTER
1118 # Select some configuration options automatically based on user selections.
1123 config ARCH_MAY_HAVE_PC_FDC
1154 select CLOCKSOURCE_WATCHDOG if CPU_FREQ
1160 config MIPS_CLOCK_VSYSCALL
1161 def_bool CSRC_R4K || CLKSRC_MIPS_GIC
1170 config ARCH_SUPPORTS_UPROBES
1173 config DMA_PERDEV_COHERENT
1175 select ARCH_HAS_SETUP_DMA_OPS
1176 select DMA_NONCOHERENT
1178 config DMA_NONCOHERENT
1181 # MIPS allows mixing "slightly different" Cacheability and Coherency
1182 # Attribute bits. It is believed that the uncached access through
1183 # KSEG1 and the implementation specific "uncached accelerated" used
1184 # by pgprot_writcombine can be mixed, and the latter sometimes provides
1185 # significant advantages.
1187 select ARCH_HAS_DMA_WRITE_COMBINE
1188 select ARCH_HAS_DMA_PREP_COHERENT
1189 select ARCH_HAS_SYNC_DMA_FOR_DEVICE
1190 select ARCH_HAS_DMA_SET_UNCACHED
1191 select DMA_NONCOHERENT_MMAP
1192 select NEED_DMA_MAP_STATE
1194 config SYS_HAS_EARLY_PRINTK
1197 config SYS_SUPPORTS_HOTPLUG_CPU
1200 config MIPS_BONITO64
1209 config NO_IOPORT_MAP
1213 def_bool CPU_NO_LOAD_STORE_LR
1215 config GENERIC_ISA_DMA
1217 select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n
1220 config GENERIC_ISA_DMA_SUPPORT_BROKEN
1222 select GENERIC_ISA_DMA
1224 config HAVE_PLAT_DELAY
1227 config HAVE_PLAT_FW_INIT_CMDLINE
1230 config HAVE_PLAT_MEMCPY
1236 config HOLES_IN_ZONE
1239 config SYS_SUPPORTS_RELOCATABLE
1242 Selected if the platform supports relocating the kernel.
1243 The platform must provide plat_get_fdt() if it selects CONFIG_USE_OF
1244 to allow access to command line and entropy sources.
1246 config MIPS_CBPF_JIT
1248 depends on BPF_JIT && HAVE_CBPF_JIT
1250 config MIPS_EBPF_JIT
1252 depends on BPF_JIT && HAVE_EBPF_JIT
1256 # Endianness selection. Sufficiently obscure so many users don't know what to
1257 # answer,so we try hard to limit the available choices. Also the use of a
1258 # choice statement should be more obvious to the user.
1261 prompt "Endianness selection"
1263 Some MIPS machines can be configured for either little or big endian
1264 byte order. These modes require different kernels and a different
1265 Linux distribution. In general there is one preferred byteorder for a
1266 particular system but some systems are just as commonly used in the
1267 one or the other endianness.
1269 config CPU_BIG_ENDIAN
1271 depends on SYS_SUPPORTS_BIG_ENDIAN
1273 config CPU_LITTLE_ENDIAN
1274 bool "Little endian"
1275 depends on SYS_SUPPORTS_LITTLE_ENDIAN
1282 config SYS_SUPPORTS_APM_EMULATION
1285 config SYS_SUPPORTS_BIG_ENDIAN
1288 config SYS_SUPPORTS_LITTLE_ENDIAN
1291 config MIPS_HUGE_TLB_SUPPORT
1292 def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE
1306 config PCI_GT64XXX_PCI0
1309 config PCI_XTALK_BRIDGE
1312 config NO_EXCEPT_FILL
1318 config SWAP_IO_SPACE
1321 config SGI_HAS_INDYDOG
1333 config SGI_HAS_ZILOG
1336 config SGI_HAS_I8042
1339 config DEFAULT_SGI_PARTITION
1351 config MIPS_L1_CACHE_SHIFT_4
1354 config MIPS_L1_CACHE_SHIFT_5
1357 config MIPS_L1_CACHE_SHIFT_6
1360 config MIPS_L1_CACHE_SHIFT_7
1363 config MIPS_L1_CACHE_SHIFT
1365 default "7" if MIPS_L1_CACHE_SHIFT_7
1366 default "6" if MIPS_L1_CACHE_SHIFT_6
1367 default "5" if MIPS_L1_CACHE_SHIFT_5
1368 default "4" if MIPS_L1_CACHE_SHIFT_4
1371 config ARC_CMDLINE_ONLY
1375 bool "ARC console support"
1376 depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN)
1390 menu "CPU selection"
1396 config CPU_LOONGSON64
1397 bool "Loongson 64-bit CPU"
1398 depends on SYS_HAS_CPU_LOONGSON64
1399 select ARCH_HAS_PHYS_TO_DMA
1401 select CPU_HAS_PREFETCH
1402 select CPU_SUPPORTS_64BIT_KERNEL
1403 select CPU_SUPPORTS_HIGHMEM
1404 select CPU_SUPPORTS_HUGEPAGES
1405 select CPU_SUPPORTS_MSA
1406 select CPU_DIEI_BROKEN if !LOONGSON3_ENHANCEMENT
1407 select CPU_MIPSR2_IRQ_VI
1408 select WEAK_ORDERING
1409 select WEAK_REORDERING_BEYOND_LLSC
1410 select MIPS_ASID_BITS_VARIABLE
1411 select MIPS_PGD_C0_CONTEXT
1412 select MIPS_L1_CACHE_SHIFT_6
1417 The Loongson GSx64(GS264/GS464/GS464E/GS464V) series of processor
1418 cores implements the MIPS64R2 instruction set with many extensions,
1419 including most 64-bit Loongson-2 (2H, 2K) and Loongson-3 (3A1000,
1420 3B1000, 3B1500, 3A2000, 3A3000 and 3A4000) processors. However, old
1421 Loongson-2E/2F is not covered here and will be removed in future.
1423 config LOONGSON3_ENHANCEMENT
1424 bool "New Loongson-3 CPU Enhancements"
1426 depends on CPU_LOONGSON64
1428 New Loongson-3 cores (since Loongson-3A R2, as opposed to Loongson-3A
1429 R1, Loongson-3B R1 and Loongson-3B R2) has many enhancements, such as
1430 FTLB, L1-VCache, EI/DI/Wait/Prefetch instruction, DSP/DSPr2 ASE, User
1431 Local register, Read-Inhibit/Execute-Inhibit, SFB (Store Fill Buffer),
1432 Fast TLB refill support, etc.
1434 This option enable those enhancements which are not probed at run
1435 time. If you want a generic kernel to run on all Loongson 3 machines,
1436 please say 'N' here. If you want a high-performance kernel to run on
1437 new Loongson-3 machines only, please say 'Y' here.
1439 config CPU_LOONGSON3_WORKAROUNDS
1440 bool "Old Loongson-3 LLSC Workarounds"
1442 depends on CPU_LOONGSON64
1444 Loongson-3 processors have the llsc issues which require workarounds.
1445 Without workarounds the system may hang unexpectedly.
1447 Newer Loongson-3 will fix these issues and no workarounds are needed.
1448 The workarounds have no significant side effect on them but may
1449 decrease the performance of the system so this option should be
1450 disabled unless the kernel is intended to be run on old systems.
1452 If unsure, please say Y.
1454 config CPU_LOONGSON3_CPUCFG_EMULATION
1455 bool "Emulate the CPUCFG instruction on older Loongson cores"
1457 depends on CPU_LOONGSON64
1459 Loongson-3A R4 and newer have the CPUCFG instruction available for
1460 userland to query CPU capabilities, much like CPUID on x86. This
1461 option provides emulation of the instruction on older Loongson
1462 cores, back to Loongson-3A1000.
1464 If unsure, please say Y.
1466 config CPU_LOONGSON2E
1468 depends on SYS_HAS_CPU_LOONGSON2E
1469 select CPU_LOONGSON2EF
1471 The Loongson 2E processor implements the MIPS III instruction set
1472 with many extensions.
1474 It has an internal FPGA northbridge, which is compatible to
1477 config CPU_LOONGSON2F
1479 depends on SYS_HAS_CPU_LOONGSON2F
1480 select CPU_LOONGSON2EF
1483 The Loongson 2F processor implements the MIPS III instruction set
1484 with many extensions.
1486 Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller
1487 have a similar programming interface with FPGA northbridge used in
1490 config CPU_LOONGSON1B
1492 depends on SYS_HAS_CPU_LOONGSON1B
1493 select CPU_LOONGSON32
1494 select LEDS_GPIO_REGISTER
1496 The Loongson 1B is a 32-bit SoC, which implements the MIPS32
1497 Release 1 instruction set and part of the MIPS32 Release 2
1500 config CPU_LOONGSON1C
1502 depends on SYS_HAS_CPU_LOONGSON1C
1503 select CPU_LOONGSON32
1504 select LEDS_GPIO_REGISTER
1506 The Loongson 1C is a 32-bit SoC, which implements the MIPS32
1507 Release 1 instruction set and part of the MIPS32 Release 2
1510 config CPU_MIPS32_R1
1511 bool "MIPS32 Release 1"
1512 depends on SYS_HAS_CPU_MIPS32_R1
1513 select CPU_HAS_PREFETCH
1514 select CPU_SUPPORTS_32BIT_KERNEL
1515 select CPU_SUPPORTS_HIGHMEM
1517 Choose this option to build a kernel for release 1 or later of the
1518 MIPS32 architecture. Most modern embedded systems with a 32-bit
1519 MIPS processor are based on a MIPS32 processor. If you know the
1520 specific type of processor in your system, choose those that one
1521 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
1522 Release 2 of the MIPS32 architecture is available since several
1523 years so chances are you even have a MIPS32 Release 2 processor
1524 in which case you should choose CPU_MIPS32_R2 instead for better
1527 config CPU_MIPS32_R2
1528 bool "MIPS32 Release 2"
1529 depends on SYS_HAS_CPU_MIPS32_R2
1530 select CPU_HAS_PREFETCH
1531 select CPU_SUPPORTS_32BIT_KERNEL
1532 select CPU_SUPPORTS_HIGHMEM
1533 select CPU_SUPPORTS_MSA
1536 Choose this option to build a kernel for release 2 or later of the
1537 MIPS32 architecture. Most modern embedded systems with a 32-bit
1538 MIPS processor are based on a MIPS32 processor. If you know the
1539 specific type of processor in your system, choose those that one
1540 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
1542 config CPU_MIPS32_R5
1543 bool "MIPS32 Release 5"
1544 depends on SYS_HAS_CPU_MIPS32_R5
1545 select CPU_HAS_PREFETCH
1546 select CPU_SUPPORTS_32BIT_KERNEL
1547 select CPU_SUPPORTS_HIGHMEM
1548 select CPU_SUPPORTS_MSA
1550 select MIPS_O32_FP64_SUPPORT
1552 Choose this option to build a kernel for release 5 or later of the
1553 MIPS32 architecture. New MIPS processors, starting with the Warrior
1554 family, are based on a MIPS32r5 processor. If you own an older
1555 processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
1557 config CPU_MIPS32_R6
1558 bool "MIPS32 Release 6"
1559 depends on SYS_HAS_CPU_MIPS32_R6
1560 select CPU_HAS_PREFETCH
1561 select CPU_NO_LOAD_STORE_LR
1562 select CPU_SUPPORTS_32BIT_KERNEL
1563 select CPU_SUPPORTS_HIGHMEM
1564 select CPU_SUPPORTS_MSA
1566 select MIPS_O32_FP64_SUPPORT
1568 Choose this option to build a kernel for release 6 or later of the
1569 MIPS32 architecture. New MIPS processors, starting with the Warrior
1570 family, are based on a MIPS32r6 processor. If you own an older
1571 processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
1573 config CPU_MIPS64_R1
1574 bool "MIPS64 Release 1"
1575 depends on SYS_HAS_CPU_MIPS64_R1
1576 select CPU_HAS_PREFETCH
1577 select CPU_SUPPORTS_32BIT_KERNEL
1578 select CPU_SUPPORTS_64BIT_KERNEL
1579 select CPU_SUPPORTS_HIGHMEM
1580 select CPU_SUPPORTS_HUGEPAGES
1582 Choose this option to build a kernel for release 1 or later of the
1583 MIPS64 architecture. Many modern embedded systems with a 64-bit
1584 MIPS processor are based on a MIPS64 processor. If you know the
1585 specific type of processor in your system, choose those that one
1586 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
1587 Release 2 of the MIPS64 architecture is available since several
1588 years so chances are you even have a MIPS64 Release 2 processor
1589 in which case you should choose CPU_MIPS64_R2 instead for better
1592 config CPU_MIPS64_R2
1593 bool "MIPS64 Release 2"
1594 depends on SYS_HAS_CPU_MIPS64_R2
1595 select CPU_HAS_PREFETCH
1596 select CPU_SUPPORTS_32BIT_KERNEL
1597 select CPU_SUPPORTS_64BIT_KERNEL
1598 select CPU_SUPPORTS_HIGHMEM
1599 select CPU_SUPPORTS_HUGEPAGES
1600 select CPU_SUPPORTS_MSA
1603 Choose this option to build a kernel for release 2 or later of the
1604 MIPS64 architecture. Many modern embedded systems with a 64-bit
1605 MIPS processor are based on a MIPS64 processor. If you know the
1606 specific type of processor in your system, choose those that one
1607 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
1609 config CPU_MIPS64_R5
1610 bool "MIPS64 Release 5"
1611 depends on SYS_HAS_CPU_MIPS64_R5
1612 select CPU_HAS_PREFETCH
1613 select CPU_SUPPORTS_32BIT_KERNEL
1614 select CPU_SUPPORTS_64BIT_KERNEL
1615 select CPU_SUPPORTS_HIGHMEM
1616 select CPU_SUPPORTS_HUGEPAGES
1617 select CPU_SUPPORTS_MSA
1618 select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
1621 Choose this option to build a kernel for release 5 or later of the
1622 MIPS64 architecture. This is a intermediate MIPS architecture
1623 release partly implementing release 6 features. Though there is no
1624 any hardware known to be based on this release.
1626 config CPU_MIPS64_R6
1627 bool "MIPS64 Release 6"
1628 depends on SYS_HAS_CPU_MIPS64_R6
1629 select CPU_HAS_PREFETCH
1630 select CPU_NO_LOAD_STORE_LR
1631 select CPU_SUPPORTS_32BIT_KERNEL
1632 select CPU_SUPPORTS_64BIT_KERNEL
1633 select CPU_SUPPORTS_HIGHMEM
1634 select CPU_SUPPORTS_HUGEPAGES
1635 select CPU_SUPPORTS_MSA
1636 select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
1639 Choose this option to build a kernel for release 6 or later of the
1640 MIPS64 architecture. New MIPS processors, starting with the Warrior
1641 family, are based on a MIPS64r6 processor. If you own an older
1642 processor, you probably need to select MIPS64r1 or MIPS64r2 instead.
1645 bool "MIPS Warrior P5600"
1646 depends on SYS_HAS_CPU_P5600
1647 select CPU_HAS_PREFETCH
1648 select CPU_SUPPORTS_32BIT_KERNEL
1649 select CPU_SUPPORTS_HIGHMEM
1650 select CPU_SUPPORTS_MSA
1651 select CPU_SUPPORTS_CPUFREQ
1652 select CPU_MIPSR2_IRQ_VI
1653 select CPU_MIPSR2_IRQ_EI
1655 select MIPS_O32_FP64_SUPPORT
1657 Choose this option to build a kernel for MIPS Warrior P5600 CPU.
1658 It's based on MIPS32r5 ISA with XPA, EVA, dual/quad issue exec pipes,
1659 MMU with two-levels TLB, UCA, MSA, MDU core level features and system
1660 level features like up to six P5600 calculation cores, CM2 with L2
1661 cache, IOCU/IOMMU (though might be unused depending on the system-
1662 specific IP core configuration), GIC, CPC, virtualisation module,
1667 depends on SYS_HAS_CPU_R3000
1670 select CPU_SUPPORTS_32BIT_KERNEL
1671 select CPU_SUPPORTS_HIGHMEM
1673 Please make sure to pick the right CPU type. Linux/MIPS is not
1674 designed to be generic, i.e. Kernels compiled for R3000 CPUs will
1675 *not* work on R4000 machines and vice versa. However, since most
1676 of the supported machines have an R4000 (or similar) CPU, R4x00
1677 might be a safe bet. If the resulting kernel does not work,
1678 try to recompile with R3000.
1682 depends on SYS_HAS_CPU_TX39XX
1683 select CPU_SUPPORTS_32BIT_KERNEL
1688 depends on SYS_HAS_CPU_VR41XX
1689 select CPU_SUPPORTS_32BIT_KERNEL
1690 select CPU_SUPPORTS_64BIT_KERNEL
1692 The options selects support for the NEC VR4100 series of processors.
1693 Only choose this option if you have one of these processors as a
1694 kernel built with this option will not run on any other type of
1695 processor or vice versa.
1699 depends on SYS_HAS_CPU_R4300
1700 select CPU_SUPPORTS_32BIT_KERNEL
1701 select CPU_SUPPORTS_64BIT_KERNEL
1702 select CPU_HAS_LOAD_STORE_LR
1704 MIPS Technologies R4300-series processors.
1708 depends on SYS_HAS_CPU_R4X00
1709 select CPU_SUPPORTS_32BIT_KERNEL
1710 select CPU_SUPPORTS_64BIT_KERNEL
1711 select CPU_SUPPORTS_HUGEPAGES
1713 MIPS Technologies R4000-series processors other than 4300, including
1714 the R4000, R4400, R4600, and 4700.
1718 depends on SYS_HAS_CPU_TX49XX
1719 select CPU_HAS_PREFETCH
1720 select CPU_SUPPORTS_32BIT_KERNEL
1721 select CPU_SUPPORTS_64BIT_KERNEL
1722 select CPU_SUPPORTS_HUGEPAGES
1726 depends on SYS_HAS_CPU_R5000
1727 select CPU_SUPPORTS_32BIT_KERNEL
1728 select CPU_SUPPORTS_64BIT_KERNEL
1729 select CPU_SUPPORTS_HUGEPAGES
1731 MIPS Technologies R5000-series processors other than the Nevada.
1735 depends on SYS_HAS_CPU_R5500
1736 select CPU_SUPPORTS_32BIT_KERNEL
1737 select CPU_SUPPORTS_64BIT_KERNEL
1738 select CPU_SUPPORTS_HUGEPAGES
1740 NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV
1745 depends on SYS_HAS_CPU_NEVADA
1746 select CPU_SUPPORTS_32BIT_KERNEL
1747 select CPU_SUPPORTS_64BIT_KERNEL
1748 select CPU_SUPPORTS_HUGEPAGES
1750 QED / PMC-Sierra RM52xx-series ("Nevada") processors.
1754 depends on SYS_HAS_CPU_R10000
1755 select CPU_HAS_PREFETCH
1756 select CPU_SUPPORTS_32BIT_KERNEL
1757 select CPU_SUPPORTS_64BIT_KERNEL
1758 select CPU_SUPPORTS_HIGHMEM
1759 select CPU_SUPPORTS_HUGEPAGES
1761 MIPS Technologies R10000-series processors.
1765 depends on SYS_HAS_CPU_RM7000
1766 select CPU_HAS_PREFETCH
1767 select CPU_SUPPORTS_32BIT_KERNEL
1768 select CPU_SUPPORTS_64BIT_KERNEL
1769 select CPU_SUPPORTS_HIGHMEM
1770 select CPU_SUPPORTS_HUGEPAGES
1774 depends on SYS_HAS_CPU_SB1
1775 select CPU_SUPPORTS_32BIT_KERNEL
1776 select CPU_SUPPORTS_64BIT_KERNEL
1777 select CPU_SUPPORTS_HIGHMEM
1778 select CPU_SUPPORTS_HUGEPAGES
1779 select WEAK_ORDERING
1781 config CPU_CAVIUM_OCTEON
1782 bool "Cavium Octeon processor"
1783 depends on SYS_HAS_CPU_CAVIUM_OCTEON
1784 select CPU_HAS_PREFETCH
1785 select CPU_SUPPORTS_64BIT_KERNEL
1786 select WEAK_ORDERING
1787 select CPU_SUPPORTS_HIGHMEM
1788 select CPU_SUPPORTS_HUGEPAGES
1789 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
1790 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
1791 select MIPS_L1_CACHE_SHIFT_7
1794 The Cavium Octeon processor is a highly integrated chip containing
1795 many ethernet hardware widgets for networking tasks. The processor
1796 can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets.
1797 Full details can be found at http://www.caviumnetworks.com.
1800 bool "Broadcom BMIPS"
1801 depends on SYS_HAS_CPU_BMIPS
1803 select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300
1804 select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350
1805 select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380
1806 select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000
1807 select CPU_SUPPORTS_32BIT_KERNEL
1808 select DMA_NONCOHERENT
1810 select SWAP_IO_SPACE
1811 select WEAK_ORDERING
1812 select CPU_SUPPORTS_HIGHMEM
1813 select CPU_HAS_PREFETCH
1814 select CPU_SUPPORTS_CPUFREQ
1815 select MIPS_EXTERNAL_TIMER
1817 Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors.
1820 bool "Netlogic XLR SoC"
1821 depends on SYS_HAS_CPU_XLR
1822 select CPU_SUPPORTS_32BIT_KERNEL
1823 select CPU_SUPPORTS_64BIT_KERNEL
1824 select CPU_SUPPORTS_HIGHMEM
1825 select CPU_SUPPORTS_HUGEPAGES
1826 select WEAK_ORDERING
1827 select WEAK_REORDERING_BEYOND_LLSC
1829 Netlogic Microsystems XLR/XLS processors.
1832 bool "Netlogic XLP SoC"
1833 depends on SYS_HAS_CPU_XLP
1834 select CPU_SUPPORTS_32BIT_KERNEL
1835 select CPU_SUPPORTS_64BIT_KERNEL
1836 select CPU_SUPPORTS_HIGHMEM
1837 select WEAK_ORDERING
1838 select WEAK_REORDERING_BEYOND_LLSC
1839 select CPU_HAS_PREFETCH
1841 select CPU_SUPPORTS_HUGEPAGES
1842 select MIPS_ASID_BITS_VARIABLE
1844 Netlogic Microsystems XLP processors.
1847 config CPU_MIPS32_3_5_FEATURES
1848 bool "MIPS32 Release 3.5 Features"
1849 depends on SYS_HAS_CPU_MIPS32_R3_5
1850 depends on CPU_MIPS32_R2 || CPU_MIPS32_R5 || CPU_MIPS32_R6 || \
1853 Choose this option to build a kernel for release 2 or later of the
1854 MIPS32 architecture including features from the 3.5 release such as
1855 support for Enhanced Virtual Addressing (EVA).
1857 config CPU_MIPS32_3_5_EVA
1858 bool "Enhanced Virtual Addressing (EVA)"
1859 depends on CPU_MIPS32_3_5_FEATURES
1863 Choose this option if you want to enable the Enhanced Virtual
1864 Addressing (EVA) on your MIPS32 core (such as proAptiv).
1865 One of its primary benefits is an increase in the maximum size
1866 of lowmem (up to 3GB). If unsure, say 'N' here.
1868 config CPU_MIPS32_R5_FEATURES
1869 bool "MIPS32 Release 5 Features"
1870 depends on SYS_HAS_CPU_MIPS32_R5
1871 depends on CPU_MIPS32_R2 || CPU_MIPS32_R5 || CPU_P5600
1873 Choose this option to build a kernel for release 2 or later of the
1874 MIPS32 architecture including features from release 5 such as
1875 support for Extended Physical Addressing (XPA).
1877 config CPU_MIPS32_R5_XPA
1878 bool "Extended Physical Addressing (XPA)"
1879 depends on CPU_MIPS32_R5_FEATURES
1881 depends on !PAGE_SIZE_4KB
1882 depends on SYS_SUPPORTS_HIGHMEM
1885 select PHYS_ADDR_T_64BIT
1888 Choose this option if you want to enable the Extended Physical
1889 Addressing (XPA) on your MIPS32 core (such as P5600 series). The
1890 benefit is to increase physical addressing equal to or greater
1891 than 40 bits. Note that this has the side effect of turning on
1892 64-bit addressing which in turn makes the PTEs 64-bit in size.
1893 If unsure, say 'N' here.
1896 config CPU_NOP_WORKAROUNDS
1899 config CPU_JUMP_WORKAROUNDS
1902 config CPU_LOONGSON2F_WORKAROUNDS
1903 bool "Loongson 2F Workarounds"
1905 select CPU_NOP_WORKAROUNDS
1906 select CPU_JUMP_WORKAROUNDS
1908 Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which
1909 require workarounds. Without workarounds the system may hang
1910 unexpectedly. For more information please refer to the gas
1911 -mfix-loongson2f-nop and -mfix-loongson2f-jump options.
1913 Loongson 2F03 and later have fixed these issues and no workarounds
1914 are needed. The workarounds have no significant side effect on them
1915 but may decrease the performance of the system so this option should
1916 be disabled unless the kernel is intended to be run on 2F01 or 2F02
1919 If unsure, please say Y.
1920 endif # CPU_LOONGSON2F
1922 config SYS_SUPPORTS_ZBOOT
1924 select HAVE_KERNEL_GZIP
1925 select HAVE_KERNEL_BZIP2
1926 select HAVE_KERNEL_LZ4
1927 select HAVE_KERNEL_LZMA
1928 select HAVE_KERNEL_LZO
1929 select HAVE_KERNEL_XZ
1930 select HAVE_KERNEL_ZSTD
1932 config SYS_SUPPORTS_ZBOOT_UART16550
1934 select SYS_SUPPORTS_ZBOOT
1936 config SYS_SUPPORTS_ZBOOT_UART_PROM
1938 select SYS_SUPPORTS_ZBOOT
1940 config CPU_LOONGSON2EF
1942 select CPU_SUPPORTS_32BIT_KERNEL
1943 select CPU_SUPPORTS_64BIT_KERNEL
1944 select CPU_SUPPORTS_HIGHMEM
1945 select CPU_SUPPORTS_HUGEPAGES
1946 select ARCH_HAS_PHYS_TO_DMA
1948 config CPU_LOONGSON32
1952 select CPU_HAS_PREFETCH
1953 select CPU_SUPPORTS_32BIT_KERNEL
1954 select CPU_SUPPORTS_HIGHMEM
1955 select CPU_SUPPORTS_CPUFREQ
1957 config CPU_BMIPS32_3300
1958 select SMP_UP if SMP
1961 config CPU_BMIPS4350
1963 select SYS_SUPPORTS_SMP
1964 select SYS_SUPPORTS_HOTPLUG_CPU
1966 config CPU_BMIPS4380
1968 select MIPS_L1_CACHE_SHIFT_6
1969 select SYS_SUPPORTS_SMP
1970 select SYS_SUPPORTS_HOTPLUG_CPU
1973 config CPU_BMIPS5000
1975 select MIPS_CPU_SCACHE
1976 select MIPS_L1_CACHE_SHIFT_7
1977 select SYS_SUPPORTS_SMP
1978 select SYS_SUPPORTS_HOTPLUG_CPU
1981 config SYS_HAS_CPU_LOONGSON64
1983 select CPU_SUPPORTS_CPUFREQ
1986 config SYS_HAS_CPU_LOONGSON2E
1989 config SYS_HAS_CPU_LOONGSON2F
1991 select CPU_SUPPORTS_CPUFREQ
1992 select CPU_SUPPORTS_ADDRWINCFG if 64BIT
1994 config SYS_HAS_CPU_LOONGSON1B
1997 config SYS_HAS_CPU_LOONGSON1C
2000 config SYS_HAS_CPU_MIPS32_R1
2003 config SYS_HAS_CPU_MIPS32_R2
2006 config SYS_HAS_CPU_MIPS32_R3_5
2009 config SYS_HAS_CPU_MIPS32_R5
2011 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
2013 config SYS_HAS_CPU_MIPS32_R6
2015 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
2017 config SYS_HAS_CPU_MIPS64_R1
2020 config SYS_HAS_CPU_MIPS64_R2
2023 config SYS_HAS_CPU_MIPS64_R6
2025 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
2027 config SYS_HAS_CPU_P5600
2029 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
2031 config SYS_HAS_CPU_R3000
2034 config SYS_HAS_CPU_TX39XX
2037 config SYS_HAS_CPU_VR41XX
2040 config SYS_HAS_CPU_R4300
2043 config SYS_HAS_CPU_R4X00
2046 config SYS_HAS_CPU_TX49XX
2049 config SYS_HAS_CPU_R5000
2052 config SYS_HAS_CPU_R5500
2055 config SYS_HAS_CPU_NEVADA
2058 config SYS_HAS_CPU_R10000
2060 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
2062 config SYS_HAS_CPU_RM7000
2065 config SYS_HAS_CPU_SB1
2068 config SYS_HAS_CPU_CAVIUM_OCTEON
2071 config SYS_HAS_CPU_BMIPS
2074 config SYS_HAS_CPU_BMIPS32_3300
2076 select SYS_HAS_CPU_BMIPS
2078 config SYS_HAS_CPU_BMIPS4350
2080 select SYS_HAS_CPU_BMIPS
2082 config SYS_HAS_CPU_BMIPS4380
2084 select SYS_HAS_CPU_BMIPS
2086 config SYS_HAS_CPU_BMIPS5000
2088 select SYS_HAS_CPU_BMIPS
2089 select ARCH_HAS_SYNC_DMA_FOR_CPU
2091 config SYS_HAS_CPU_XLR
2094 config SYS_HAS_CPU_XLP
2098 # CPU may reorder R->R, R->W, W->R, W->W
2099 # Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC
2101 config WEAK_ORDERING
2105 # CPU may reorder reads and writes beyond LL/SC
2106 # CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC
2108 config WEAK_REORDERING_BEYOND_LLSC
2113 # These two indicate any level of the MIPS32 and MIPS64 architecture
2117 default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 || CPU_MIPS32_R5 || \
2118 CPU_MIPS32_R6 || CPU_P5600
2122 default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R5 || \
2123 CPU_MIPS64_R6 || CPU_LOONGSON64 || CPU_CAVIUM_OCTEON
2126 # These indicate the revision of the architecture
2130 default y if CPU_MIPS32_R1 || CPU_MIPS64_R1
2134 default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON
2136 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
2141 default y if CPU_MIPS32_R5 || CPU_MIPS64_R5 || CPU_P5600
2143 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
2148 default y if CPU_MIPS32_R6 || CPU_MIPS64_R6
2150 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
2151 select HAVE_ARCH_BITREVERSE
2152 select MIPS_ASID_BITS_VARIABLE
2153 select MIPS_CRC_SUPPORT
2156 config TARGET_ISA_REV
2158 default 1 if CPU_MIPSR1
2159 default 2 if CPU_MIPSR2
2160 default 5 if CPU_MIPSR5
2161 default 6 if CPU_MIPSR6
2164 Reflects the ISA revision being targeted by the kernel build. This
2165 is effectively the Kconfig equivalent of MIPS_ISA_REV.
2173 config SYS_SUPPORTS_32BIT_KERNEL
2175 config SYS_SUPPORTS_64BIT_KERNEL
2177 config CPU_SUPPORTS_32BIT_KERNEL
2179 config CPU_SUPPORTS_64BIT_KERNEL
2181 config CPU_SUPPORTS_CPUFREQ
2183 config CPU_SUPPORTS_ADDRWINCFG
2185 config CPU_SUPPORTS_HUGEPAGES
2187 depends on !(32BIT && (ARCH_PHYS_ADDR_T_64BIT || EVA))
2188 config MIPS_PGD_C0_CONTEXT
2191 default y if (CPU_MIPSR2 || CPU_MIPSR6) && !CPU_XLP
2194 # Set to y for ptrace access to watch registers.
2196 config HARDWARE_WATCHPOINTS
2198 default y if CPU_MIPSR1 || CPU_MIPSR2 || CPU_MIPSR6
2203 prompt "Kernel code model"
2205 You should only select this option if you have a workload that
2206 actually benefits from 64-bit processing or if your machine has
2207 large memory. You will only be presented a single option in this
2208 menu if your system does not support both 32-bit and 64-bit kernels.
2211 bool "32-bit kernel"
2212 depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL
2215 Select this option if you want to build a 32-bit kernel.
2218 bool "64-bit kernel"
2219 depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL
2221 Select this option if you want to build a 64-bit kernel.
2225 config MIPS_VA_BITS_48
2226 bool "48 bits virtual memory"
2229 Support a maximum at least 48 bits of application virtual
2230 memory. Default is 40 bits or less, depending on the CPU.
2231 For page sizes 16k and above, this option results in a small
2232 memory overhead for page tables. For 4k page size, a fourth
2233 level of page tables is added which imposes both a memory
2234 overhead as well as slower TLB fault handling.
2239 prompt "Kernel page size"
2240 default PAGE_SIZE_4KB
2242 config PAGE_SIZE_4KB
2244 depends on !CPU_LOONGSON2EF && !CPU_LOONGSON64
2246 This option select the standard 4kB Linux page size. On some
2247 R3000-family processors this is the only available page size. Using
2248 4kB page size will minimize memory consumption and is therefore
2249 recommended for low memory systems.
2251 config PAGE_SIZE_8KB
2253 depends on CPU_CAVIUM_OCTEON
2254 depends on !MIPS_VA_BITS_48
2256 Using 8kB page size will result in higher performance kernel at
2257 the price of higher memory consumption. This option is available
2258 only on cnMIPS processors. Note that you will need a suitable Linux
2259 distribution to support this.
2261 config PAGE_SIZE_16KB
2263 depends on !CPU_R3000 && !CPU_TX39XX
2265 Using 16kB page size will result in higher performance kernel at
2266 the price of higher memory consumption. This option is available on
2267 all non-R3000 family processors. Note that you will need a suitable
2268 Linux distribution to support this.
2270 config PAGE_SIZE_32KB
2272 depends on CPU_CAVIUM_OCTEON
2273 depends on !MIPS_VA_BITS_48
2275 Using 32kB page size will result in higher performance kernel at
2276 the price of higher memory consumption. This option is available
2277 only on cnMIPS cores. Note that you will need a suitable Linux
2278 distribution to support this.
2280 config PAGE_SIZE_64KB
2282 depends on !CPU_R3000 && !CPU_TX39XX
2284 Using 64kB page size will result in higher performance kernel at
2285 the price of higher memory consumption. This option is available on
2286 all non-R3000 family processor. Not that at the time of this
2287 writing this option is still high experimental.
2291 config FORCE_MAX_ZONEORDER
2292 int "Maximum zone order"
2293 range 14 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
2294 default "14" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
2295 range 13 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
2296 default "13" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
2297 range 12 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
2298 default "12" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
2302 The kernel memory allocator divides physically contiguous memory
2303 blocks into "zones", where each zone is a power of two number of
2304 pages. This option selects the largest power of two that the kernel
2305 keeps in the memory allocator. If you need to allocate very large
2306 blocks of physically contiguous memory, then you may need to
2307 increase this value.
2309 This config option is actually maximum order plus one. For example,
2310 a value of 11 means that the largest free memory block is 2^10 pages.
2312 The page size is not necessarily 4KB. Keep this in mind
2313 when choosing a value for this option.
2318 config IP22_CPU_SCACHE
2323 # Support for a MIPS32 / MIPS64 style S-caches
2325 config MIPS_CPU_SCACHE
2329 config R5000_CPU_SCACHE
2333 config RM7000_CPU_SCACHE
2337 config SIBYTE_DMA_PAGEOPS
2338 bool "Use DMA to clear/copy pages"
2341 Instead of using the CPU to zero and copy pages, use a Data Mover
2342 channel. These DMA channels are otherwise unused by the standard
2343 SiByte Linux port. Seems to give a small performance benefit.
2345 config CPU_HAS_PREFETCH
2348 config CPU_GENERIC_DUMP_TLB
2350 default y if !(CPU_R3000 || CPU_TX39XX)
2352 config MIPS_FP_SUPPORT
2353 bool "Floating Point support" if EXPERT
2356 Select y to include support for floating point in the kernel
2357 including initialization of FPU hardware, FP context save & restore
2358 and emulation of an FPU where necessary. Without this support any
2359 userland program attempting to use floating point instructions will
2362 If you know that your userland will not attempt to use floating point
2363 instructions then you can say n here to shrink the kernel a little.
2367 config CPU_R2300_FPU
2369 depends on MIPS_FP_SUPPORT
2370 default y if CPU_R3000 || CPU_TX39XX
2377 depends on MIPS_FP_SUPPORT
2378 default y if !CPU_R2300_FPU
2380 config CPU_R4K_CACHE_TLB
2382 default y if !(CPU_R3K_TLB || CPU_SB1 || CPU_CAVIUM_OCTEON)
2385 bool "MIPS MT SMP support (1 TC on each available VPE)"
2387 depends on SYS_SUPPORTS_MULTITHREADING && !CPU_MIPSR6 && !CPU_MICROMIPS
2388 select CPU_MIPSR2_IRQ_VI
2389 select CPU_MIPSR2_IRQ_EI
2394 select SYS_SUPPORTS_SMP
2395 select SYS_SUPPORTS_SCHED_SMT
2396 select MIPS_PERF_SHARED_TC_COUNTERS
2398 This is a kernel model which is known as SMVP. This is supported
2399 on cores with the MT ASE and uses the available VPEs to implement
2400 virtual processors which supports SMP. This is equivalent to the
2401 Intel Hyperthreading feature. For further information go to
2402 <http://www.imgtec.com/mips/mips-multithreading.asp>.
2408 bool "SMT (multithreading) scheduler support"
2409 depends on SYS_SUPPORTS_SCHED_SMT
2412 SMT scheduler support improves the CPU scheduler's decision making
2413 when dealing with MIPS MT enabled cores at a cost of slightly
2414 increased overhead in some places. If unsure say N here.
2416 config SYS_SUPPORTS_SCHED_SMT
2419 config SYS_SUPPORTS_MULTITHREADING
2422 config MIPS_MT_FPAFF
2423 bool "Dynamic FPU affinity for FP-intensive threads"
2425 depends on MIPS_MT_SMP
2427 config MIPSR2_TO_R6_EMULATOR
2428 bool "MIPS R2-to-R6 emulator"
2429 depends on CPU_MIPSR6
2430 depends on MIPS_FP_SUPPORT
2433 Choose this option if you want to run non-R6 MIPS userland code.
2434 Even if you say 'Y' here, the emulator will still be disabled by
2435 default. You can enable it using the 'mipsr2emu' kernel option.
2436 The only reason this is a build-time option is to save ~14K from the
2439 config SYS_SUPPORTS_VPE_LOADER
2441 depends on SYS_SUPPORTS_MULTITHREADING
2443 Indicates that the platform supports the VPE loader, and provides
2446 config MIPS_VPE_LOADER
2447 bool "VPE loader support."
2448 depends on SYS_SUPPORTS_VPE_LOADER && MODULES
2449 select CPU_MIPSR2_IRQ_VI
2450 select CPU_MIPSR2_IRQ_EI
2453 Includes a loader for loading an elf relocatable object
2454 onto another VPE and running it.
2456 config MIPS_VPE_LOADER_CMP
2459 depends on MIPS_VPE_LOADER && MIPS_CMP
2461 config MIPS_VPE_LOADER_MT
2464 depends on MIPS_VPE_LOADER && !MIPS_CMP
2466 config MIPS_VPE_LOADER_TOM
2467 bool "Load VPE program into memory hidden from linux"
2468 depends on MIPS_VPE_LOADER
2471 The loader can use memory that is present but has been hidden from
2472 Linux using the kernel command line option "mem=xxMB". It's up to
2473 you to ensure the amount you put in the option and the space your
2474 program requires is less or equal to the amount physically present.
2476 config MIPS_VPE_APSP_API
2477 bool "Enable support for AP/SP API (RTLX)"
2478 depends on MIPS_VPE_LOADER
2480 config MIPS_VPE_APSP_API_CMP
2483 depends on MIPS_VPE_APSP_API && MIPS_CMP
2485 config MIPS_VPE_APSP_API_MT
2488 depends on MIPS_VPE_APSP_API && !MIPS_CMP
2491 bool "MIPS CMP framework support (DEPRECATED)"
2492 depends on SYS_SUPPORTS_MIPS_CMP && !CPU_MIPSR6
2495 select SYS_SUPPORTS_SMP
2496 select WEAK_ORDERING
2499 Select this if you are using a bootloader which implements the "CMP
2500 framework" protocol (ie. YAMON) and want your kernel to make use of
2501 its ability to start secondary CPUs.
2503 Unless you have a specific need, you should use CONFIG_MIPS_CPS
2507 bool "MIPS Coherent Processing System support"
2508 depends on SYS_SUPPORTS_MIPS_CPS
2510 select MIPS_CPS_PM if HOTPLUG_CPU
2512 select SYNC_R4K if (CEVT_R4K || CSRC_R4K)
2513 select SYS_SUPPORTS_HOTPLUG_CPU
2514 select SYS_SUPPORTS_SCHED_SMT if CPU_MIPSR6
2515 select SYS_SUPPORTS_SMP
2516 select WEAK_ORDERING
2517 select GENERIC_IRQ_MIGRATION if HOTPLUG_CPU
2519 Select this if you wish to run an SMP kernel across multiple cores
2520 within a MIPS Coherent Processing System. When this option is
2521 enabled the kernel will probe for other cores and boot them with
2522 no external assistance. It is safe to enable this when hardware
2523 support is unavailable.
2536 config SB1_PASS_2_WORKAROUNDS
2538 depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2)
2541 config SB1_PASS_2_1_WORKAROUNDS
2543 depends on CPU_SB1 && CPU_SB1_PASS_2
2547 prompt "SmartMIPS or microMIPS ASE support"
2549 config CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS
2552 Select this if you want neither microMIPS nor SmartMIPS support
2554 config CPU_HAS_SMARTMIPS
2555 depends on SYS_SUPPORTS_SMARTMIPS
2558 SmartMIPS is a extension of the MIPS32 architecture aimed at
2559 increased security at both hardware and software level for
2560 smartcards. Enabling this option will allow proper use of the
2561 SmartMIPS instructions by Linux applications. However a kernel with
2562 this option will not work on a MIPS core without SmartMIPS core. If
2563 you don't know you probably don't have SmartMIPS and should say N
2566 config CPU_MICROMIPS
2567 depends on 32BIT && SYS_SUPPORTS_MICROMIPS && !CPU_MIPSR6
2570 When this option is enabled the kernel will be built using the
2576 bool "Support for the MIPS SIMD Architecture"
2577 depends on CPU_SUPPORTS_MSA
2578 depends on MIPS_FP_SUPPORT
2579 depends on 64BIT || MIPS_O32_FP64_SUPPORT
2581 MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers
2582 and a set of SIMD instructions to operate on them. When this option
2583 is enabled the kernel will support allocating & switching MSA
2584 vector register contexts. If you know that your kernel will only be
2585 running on CPUs which do not support MSA or that your userland will
2586 not be making use of it then you may wish to say N here to reduce
2587 the size & complexity of your kernel.
2598 depends on !CPU_DIEI_BROKEN
2601 config CPU_DIEI_BROKEN
2607 config CPU_NO_LOAD_STORE_LR
2610 CPU lacks support for unaligned load and store instructions:
2611 LWL, LWR, SWL, SWR (Load/store word left/right).
2612 LDL, LDR, SDL, SDR (Load/store doubleword left/right, for 64bit
2616 # Vectored interrupt mode is an R2 feature
2618 config CPU_MIPSR2_IRQ_VI
2622 # Extended interrupt mode is an R2 feature
2624 config CPU_MIPSR2_IRQ_EI
2629 depends on !CPU_R3000
2635 config CPU_DADDI_WORKAROUNDS
2638 config CPU_R4000_WORKAROUNDS
2640 select CPU_R4400_WORKAROUNDS
2642 config CPU_R4400_WORKAROUNDS
2645 config CPU_R4X00_BUGS64
2647 default y if SYS_HAS_CPU_R4X00 && 64BIT && (TARGET_ISA_REV < 1)
2649 config MIPS_ASID_SHIFT
2651 default 6 if CPU_R3000 || CPU_TX39XX
2654 config MIPS_ASID_BITS
2656 default 0 if MIPS_ASID_BITS_VARIABLE
2657 default 6 if CPU_R3000 || CPU_TX39XX
2660 config MIPS_ASID_BITS_VARIABLE
2663 config MIPS_CRC_SUPPORT
2666 # R4600 erratum. Due to the lack of errata information the exact
2667 # technical details aren't known. I've experimentally found that disabling
2668 # interrupts during indexed I-cache flushes seems to be sufficient to deal
2670 config WAR_R4600_V1_INDEX_ICACHEOP
2673 # Pleasures of the R4600 V1.x. Cite from the IDT R4600 V1.7 errata:
2675 # 18. The CACHE instructions Hit_Writeback_Invalidate_D, Hit_Writeback_D,
2676 # Hit_Invalidate_D and Create_Dirty_Excl_D should only be
2677 # executed if there is no other dcache activity. If the dcache is
2678 # accessed for another instruction immediately preceding when these
2679 # cache instructions are executing, it is possible that the dcache
2680 # tag match outputs used by these cache instructions will be
2681 # incorrect. These cache instructions should be preceded by at least
2682 # four instructions that are not any kind of load or store
2685 # This is not allowed: lw
2689 # cache Hit_Writeback_Invalidate_D
2691 # This is allowed: lw
2696 # cache Hit_Writeback_Invalidate_D
2697 config WAR_R4600_V1_HIT_CACHEOP
2700 # Writeback and invalidate the primary cache dcache before DMA.
2702 # R4600 v2.0 bug: "The CACHE instructions Hit_Writeback_Inv_D,
2703 # Hit_Writeback_D, Hit_Invalidate_D and Create_Dirty_Exclusive_D will only
2704 # operate correctly if the internal data cache refill buffer is empty. These
2705 # CACHE instructions should be separated from any potential data cache miss
2706 # by a load instruction to an uncached address to empty the response buffer."
2707 # (Revision 2.0 device errata from IDT available on https://www.idt.com/
2709 config WAR_R4600_V2_HIT_CACHEOP
2712 # From TX49/H2 manual: "If the instruction (i.e. CACHE) is issued for
2713 # the line which this instruction itself exists, the following
2714 # operation is not guaranteed."
2716 # Workaround: do two phase flushing for Index_Invalidate_I
2717 config WAR_TX49XX_ICACHE_INDEX_INV
2720 # The RM7000 processors and the E9000 cores have a bug (though PMC-Sierra
2721 # opposes it being called that) where invalid instructions in the same
2722 # I-cache line worth of instructions being fetched may case spurious
2724 config WAR_ICACHE_REFILLS
2727 # On the R10000 up to version 2.6 (not sure about 2.7) there is a bug that
2728 # may cause ll / sc and lld / scd sequences to execute non-atomically.
2729 config WAR_R10000_LLSC
2732 # 34K core erratum: "Problems Executing the TLBR Instruction"
2733 config WAR_MIPS34K_MISSED_ITLB
2737 # - Highmem only makes sense for the 32-bit kernel.
2738 # - The current highmem code will only work properly on physically indexed
2739 # caches such as R3000, SB1, R7000 or those that look like they're virtually
2740 # indexed such as R4000/R4400 SC and MC versions or R10000. So for the
2741 # moment we protect the user and offer the highmem option only on machines
2742 # where it's known to be safe. This will not offer highmem on a few systems
2743 # such as MIPS32 and MIPS64 CPUs which may have virtual and physically
2744 # indexed CPUs but we're playing safe.
2745 # - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we
2746 # know they might have memory configurations that could make use of highmem
2750 bool "High Memory Support"
2751 depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA
2754 config CPU_SUPPORTS_HIGHMEM
2757 config SYS_SUPPORTS_HIGHMEM
2760 config SYS_SUPPORTS_SMARTMIPS
2763 config SYS_SUPPORTS_MICROMIPS
2766 config SYS_SUPPORTS_MIPS16
2769 This option must be set if a kernel might be executed on a MIPS16-
2770 enabled CPU even if MIPS16 is not actually being used. In other
2771 words, it makes the kernel MIPS16-tolerant.
2773 config CPU_SUPPORTS_MSA
2776 config ARCH_FLATMEM_ENABLE
2778 depends on !NUMA && !CPU_LOONGSON2EF
2780 config ARCH_SPARSEMEM_ENABLE
2782 select SPARSEMEM_STATIC if !SGI_IP27
2786 depends on SYS_SUPPORTS_NUMA
2789 Say Y to compile the kernel to support NUMA (Non-Uniform Memory
2790 Access). This option improves performance on systems with more
2791 than two nodes; on two node systems it is generally better to
2792 leave it disabled; on single node systems leave this option
2795 config SYS_SUPPORTS_NUMA
2798 config HAVE_SETUP_PER_CPU_AREA
2802 config NEED_PER_CPU_EMBED_FIRST_CHUNK
2807 bool "Relocatable kernel"
2808 depends on SYS_SUPPORTS_RELOCATABLE
2809 depends on CPU_MIPS32_R2 || CPU_MIPS64_R2 || \
2810 CPU_MIPS32_R5 || CPU_MIPS64_R5 || \
2811 CPU_MIPS32_R6 || CPU_MIPS64_R6 || \
2812 CPU_P5600 || CAVIUM_OCTEON_SOC || \
2815 This builds a kernel image that retains relocation information
2816 so it can be loaded someplace besides the default 1MB.
2817 The relocations make the kernel binary about 15% larger,
2818 but are discarded at runtime
2820 config RELOCATION_TABLE_SIZE
2821 hex "Relocation table size"
2822 depends on RELOCATABLE
2823 range 0x0 0x01000000
2824 default "0x00200000" if CPU_LOONGSON64
2825 default "0x00100000"
2827 A table of relocation data will be appended to the kernel binary
2828 and parsed at boot to fix up the relocated kernel.
2830 This option allows the amount of space reserved for the table to be
2831 adjusted, although the default of 1Mb should be ok in most cases.
2833 The build will fail and a valid size suggested if this is too small.
2835 If unsure, leave at the default value.
2837 config RANDOMIZE_BASE
2838 bool "Randomize the address of the kernel image"
2839 depends on RELOCATABLE
2841 Randomizes the physical and virtual address at which the
2842 kernel image is loaded, as a security feature that
2843 deters exploit attempts relying on knowledge of the location
2844 of kernel internals.
2846 Entropy is generated using any coprocessor 0 registers available.
2848 The kernel will be offset by up to RANDOMIZE_BASE_MAX_OFFSET.
2852 config RANDOMIZE_BASE_MAX_OFFSET
2853 hex "Maximum kASLR offset" if EXPERT
2854 depends on RANDOMIZE_BASE
2855 range 0x0 0x40000000 if EVA || 64BIT
2856 range 0x0 0x08000000
2857 default "0x01000000"
2859 When kASLR is active, this provides the maximum offset that will
2860 be applied to the kernel image. It should be set according to the
2861 amount of physical RAM available in the target system minus
2862 PHYSICAL_START and must be a power of 2.
2864 This is limited by the size of KSEG0, 256Mb on 32-bit or 1Gb with
2865 EVA or 64-bit. The default is 16Mb.
2872 config HW_PERF_EVENTS
2873 bool "Enable hardware performance counter support for perf events"
2874 depends on PERF_EVENTS && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_XLP || CPU_LOONGSON64)
2877 Enable hardware performance counter support for perf events. If
2878 disabled, perf events will use software events only.
2881 bool "Enable DMI scanning"
2882 depends on MACH_LOONGSON64
2883 select DMI_SCAN_MACHINE_NON_EFI_FALLBACK
2886 Enabled scanning of DMI to identify machine quirks. Say Y
2887 here unless you have verified that your setup is not
2888 affected by entries in the DMI blacklist. Required by PNP
2892 bool "Multi-Processing support"
2893 depends on SYS_SUPPORTS_SMP
2895 This enables support for systems with more than one CPU. If you have
2896 a system with only one CPU, say N. If you have a system with more
2897 than one CPU, say Y.
2899 If you say N here, the kernel will run on uni- and multiprocessor
2900 machines, but will use only one CPU of a multiprocessor machine. If
2901 you say Y here, the kernel will run on many, but not all,
2902 uniprocessor machines. On a uniprocessor machine, the kernel
2903 will run faster if you say N here.
2905 People using multiprocessor machines who say Y here should also say
2906 Y to "Enhanced Real Time Clock Support", below.
2908 See also the SMP-HOWTO available at
2909 <https://www.tldp.org/docs.html#howto>.
2911 If you don't know what to do here, say N.
2914 bool "Support for hot-pluggable CPUs"
2915 depends on SMP && SYS_SUPPORTS_HOTPLUG_CPU
2917 Say Y here to allow turning CPUs off and on. CPUs can be
2918 controlled through /sys/devices/system/cpu.
2919 (Note: power management support will enable this option
2920 automatically on SMP systems. )
2921 Say N if you want to disable CPU hotplug.
2926 config SYS_SUPPORTS_MIPS_CMP
2929 config SYS_SUPPORTS_MIPS_CPS
2932 config SYS_SUPPORTS_SMP
2935 config NR_CPUS_DEFAULT_4
2938 config NR_CPUS_DEFAULT_8
2941 config NR_CPUS_DEFAULT_16
2944 config NR_CPUS_DEFAULT_32
2947 config NR_CPUS_DEFAULT_64
2951 int "Maximum number of CPUs (2-256)"
2954 default "4" if NR_CPUS_DEFAULT_4
2955 default "8" if NR_CPUS_DEFAULT_8
2956 default "16" if NR_CPUS_DEFAULT_16
2957 default "32" if NR_CPUS_DEFAULT_32
2958 default "64" if NR_CPUS_DEFAULT_64
2960 This allows you to specify the maximum number of CPUs which this
2961 kernel will support. The maximum supported value is 32 for 32-bit
2962 kernel and 64 for 64-bit kernels; the minimum value which makes
2963 sense is 1 for Qemu (useful only for kernel debugging purposes)
2964 and 2 for all others.
2966 This is purely to save memory - each supported CPU adds
2967 approximately eight kilobytes to the kernel image. For best
2968 performance should round up your number of processors to the next
2971 config MIPS_PERF_SHARED_TC_COUNTERS
2974 config MIPS_NR_CPU_NR_MAP_1024
2977 config MIPS_NR_CPU_NR_MAP
2980 default 1024 if MIPS_NR_CPU_NR_MAP_1024
2981 default NR_CPUS if !MIPS_NR_CPU_NR_MAP_1024
2984 # Timer Interrupt Frequency Configuration
2988 prompt "Timer frequency"
2991 Allows the configuration of the timer frequency.
2994 bool "24 HZ" if SYS_SUPPORTS_24HZ || SYS_SUPPORTS_ARBIT_HZ
2997 bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ
3000 bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ
3003 bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ
3006 bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ
3009 bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ
3012 bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ
3015 bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ
3019 config SYS_SUPPORTS_24HZ
3022 config SYS_SUPPORTS_48HZ
3025 config SYS_SUPPORTS_100HZ
3028 config SYS_SUPPORTS_128HZ
3031 config SYS_SUPPORTS_250HZ
3034 config SYS_SUPPORTS_256HZ
3037 config SYS_SUPPORTS_1000HZ
3040 config SYS_SUPPORTS_1024HZ
3043 config SYS_SUPPORTS_ARBIT_HZ
3045 default y if !SYS_SUPPORTS_24HZ && \
3046 !SYS_SUPPORTS_48HZ && \
3047 !SYS_SUPPORTS_100HZ && \
3048 !SYS_SUPPORTS_128HZ && \
3049 !SYS_SUPPORTS_250HZ && \
3050 !SYS_SUPPORTS_256HZ && \
3051 !SYS_SUPPORTS_1000HZ && \
3052 !SYS_SUPPORTS_1024HZ
3058 default 100 if HZ_100
3059 default 128 if HZ_128
3060 default 250 if HZ_250
3061 default 256 if HZ_256
3062 default 1000 if HZ_1000
3063 default 1024 if HZ_1024
3066 def_bool HIGH_RES_TIMERS
3069 bool "Kexec system call"
3072 kexec is a system call that implements the ability to shutdown your
3073 current kernel, and to start another kernel. It is like a reboot
3074 but it is independent of the system firmware. And like a reboot
3075 you can start any kernel with it, not just Linux.
3077 The name comes from the similarity to the exec system call.
3079 It is an ongoing process to be certain the hardware in a machine
3080 is properly shutdown, so do not be surprised if this code does not
3081 initially work for you. As of this writing the exact hardware
3082 interface is strongly in flux, so no good recommendation can be
3086 bool "Kernel crash dumps"
3088 Generate crash dump after being started by kexec.
3089 This should be normally only set in special crash dump kernels
3090 which are loaded in the main kernel with kexec-tools into
3091 a specially reserved region and then later executed after
3092 a crash by kdump/kexec. The crash dump kernel must be compiled
3093 to a memory address not used by the main kernel or firmware using
3096 config PHYSICAL_START
3097 hex "Physical address where the kernel is loaded"
3098 default "0xffffffff84000000"
3099 depends on CRASH_DUMP
3101 This gives the CKSEG0 or KSEG0 address where the kernel is loaded.
3102 If you plan to use kernel for capturing the crash dump change
3103 this value to start of the reserved region (the "X" value as
3104 specified in the "crashkernel=YM@XM" command line boot parameter
3105 passed to the panic-ed kernel).
3107 config MIPS_O32_FP64_SUPPORT
3108 bool "Support for O32 binaries using 64-bit FP" if !CPU_MIPSR6
3109 depends on 32BIT || MIPS32_O32
3111 When this is enabled, the kernel will support use of 64-bit floating
3112 point registers with binaries using the O32 ABI along with the
3113 EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On
3114 32-bit MIPS systems this support is at the cost of increasing the
3115 size and complexity of the compiled FPU emulator. Thus if you are
3116 running a MIPS32 system and know that none of your userland binaries
3117 will require 64-bit floating point, you may wish to reduce the size
3118 of your kernel & potentially improve FP emulation performance by
3121 Although binutils currently supports use of this flag the details
3122 concerning its effect upon the O32 ABI in userland are still being
3123 worked on. In order to avoid userland becoming dependent upon current
3124 behaviour before the details have been finalised, this option should
3125 be considered experimental and only enabled by those working upon
3133 select OF_EARLY_FLATTREE
3143 prompt "Kernel appended dtb support" if USE_OF
3144 default MIPS_NO_APPENDED_DTB
3146 config MIPS_NO_APPENDED_DTB
3149 Do not enable appended dtb support.
3151 config MIPS_ELF_APPENDED_DTB
3154 With this option, the boot code will look for a device tree binary
3155 DTB) included in the vmlinux ELF section .appended_dtb. By default
3156 it is empty and the DTB can be appended using binutils command
3159 objcopy --update-section .appended_dtb=<filename>.dtb vmlinux
3161 This is meant as a backward compatibility convenience for those
3162 systems with a bootloader that can't be upgraded to accommodate
3163 the documented boot protocol using a device tree.
3165 config MIPS_RAW_APPENDED_DTB
3166 bool "vmlinux.bin or vmlinuz.bin"
3168 With this option, the boot code will look for a device tree binary
3169 DTB) appended to raw vmlinux.bin or vmlinuz.bin.
3170 (e.g. cat vmlinux.bin <filename>.dtb > vmlinux_w_dtb).
3172 This is meant as a backward compatibility convenience for those
3173 systems with a bootloader that can't be upgraded to accommodate
3174 the documented boot protocol using a device tree.
3176 Beware that there is very little in terms of protection against
3177 this option being confused by leftover garbage in memory that might
3178 look like a DTB header after a reboot if no actual DTB is appended
3179 to vmlinux.bin. Do not leave this option active in a production kernel
3180 if you don't intend to always append a DTB.
3184 prompt "Kernel command line type" if !CMDLINE_OVERRIDE
3185 default MIPS_CMDLINE_FROM_DTB if USE_OF && !ATH79 && !MACH_INGENIC && \
3186 !MACH_LOONGSON64 && !MIPS_MALTA && \
3188 default MIPS_CMDLINE_FROM_BOOTLOADER
3190 config MIPS_CMDLINE_FROM_DTB
3192 bool "Dtb kernel arguments if available"
3194 config MIPS_CMDLINE_DTB_EXTEND
3196 bool "Extend dtb kernel arguments with bootloader arguments"
3198 config MIPS_CMDLINE_FROM_BOOTLOADER
3199 bool "Bootloader kernel arguments if available"
3201 config MIPS_CMDLINE_BUILTIN_EXTEND
3202 depends on CMDLINE_BOOL
3203 bool "Extend builtin kernel arguments with bootloader arguments"
3208 config LOCKDEP_SUPPORT
3212 config STACKTRACE_SUPPORT
3216 config PGTABLE_LEVELS
3218 default 4 if PAGE_SIZE_4KB && MIPS_VA_BITS_48
3219 default 3 if 64BIT && !PAGE_SIZE_64KB
3222 config MIPS_AUTO_PFN_OFFSET
3225 menu "Bus options (PCI, PCMCIA, EISA, ISA, TC)"
3227 config PCI_DRIVERS_GENERIC
3228 select PCI_DOMAINS_GENERIC if PCI
3231 config PCI_DRIVERS_LEGACY
3232 def_bool !PCI_DRIVERS_GENERIC
3233 select NO_GENERIC_PCI_IOPORT_MAP
3234 select PCI_DOMAINS if PCI
3237 # ISA support is now enabled via select. Too many systems still have the one
3238 # or other ISA chip on the board that users don't know about so don't expect
3239 # users to choose the right thing ...
3245 bool "TURBOchannel support"
3246 depends on MACH_DECSTATION
3248 TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS
3249 processors. TURBOchannel programming specifications are available
3251 <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/>
3253 <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/>
3254 Linux driver support status is documented at:
3255 <http://www.linux-mips.org/wiki/DECstation>
3261 config ARCH_MMAP_RND_BITS_MIN
3265 config ARCH_MMAP_RND_BITS_MAX
3269 config ARCH_MMAP_RND_COMPAT_BITS_MIN
3272 config ARCH_MMAP_RND_COMPAT_BITS_MAX
3279 select MIPS_EXTERNAL_TIMER
3292 config MIPS32_COMPAT
3298 config SYSVIPC_COMPAT
3302 bool "Kernel support for o32 binaries"
3304 select ARCH_WANT_OLD_COMPAT_IPC
3306 select MIPS32_COMPAT
3307 select SYSVIPC_COMPAT if SYSVIPC
3309 Select this option if you want to run o32 binaries. These are pure
3310 32-bit binaries as used by the 32-bit Linux/MIPS port. Most of
3311 existing binaries are in this format.
3316 bool "Kernel support for n32 binaries"
3318 select ARCH_WANT_COMPAT_IPC_PARSE_VERSION
3320 select MIPS32_COMPAT
3321 select SYSVIPC_COMPAT if SYSVIPC
3323 Select this option if you want to run n32 binaries. These are
3324 64-bit binaries using 32-bit quantities for addressing and certain
3325 data that would normally be 64-bit. They are used in special
3330 menu "Power management options"
3332 config ARCH_HIBERNATION_POSSIBLE
3334 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
3336 config ARCH_SUSPEND_POSSIBLE
3338 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
3340 source "kernel/power/Kconfig"
3344 config MIPS_EXTERNAL_TIMER
3347 menu "CPU Power Management"
3349 if CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER
3350 source "drivers/cpufreq/Kconfig"
3353 source "drivers/cpuidle/Kconfig"
3357 source "drivers/firmware/Kconfig"
3359 source "arch/mips/kvm/Kconfig"
3361 source "arch/mips/vdso/Kconfig"