1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef __ARCH_M68K_ATOMIC__
3 #define __ARCH_M68K_ATOMIC__
5 #include <linux/types.h>
6 #include <linux/irqflags.h>
7 #include <asm/cmpxchg.h>
8 #include <asm/barrier.h>
11 * Atomic operations that C can't guarantee us. Useful for
12 * resource counting etc..
16 * We do not have SMP m68k systems, so we don't have to deal with that.
19 #define arch_atomic_read(v) READ_ONCE((v)->counter)
20 #define arch_atomic_set(v, i) WRITE_ONCE(((v)->counter), (i))
23 * The ColdFire parts cannot do some immediate to memory operations,
24 * so for them we do not specify the "i" asm constraint.
26 #ifdef CONFIG_COLDFIRE
32 #define ATOMIC_OP(op, c_op, asm_op) \
33 static inline void arch_atomic_##op(int i, atomic_t *v) \
35 __asm__ __volatile__(#asm_op "l %1,%0" : "+m" (*v) : ASM_DI (i));\
38 #ifdef CONFIG_RMW_INSNS
40 #define ATOMIC_OP_RETURN(op, c_op, asm_op) \
41 static inline int arch_atomic_##op##_return(int i, atomic_t *v) \
45 __asm__ __volatile__( \
47 " " #asm_op "l %3,%1\n" \
50 : "+m" (*v), "=&d" (t), "=&d" (tmp) \
51 : "di" (i), "2" (arch_atomic_read(v))); \
55 #define ATOMIC_FETCH_OP(op, c_op, asm_op) \
56 static inline int arch_atomic_fetch_##op(int i, atomic_t *v) \
60 __asm__ __volatile__( \
62 " " #asm_op "l %3,%1\n" \
65 : "+m" (*v), "=&d" (t), "=&d" (tmp) \
66 : "di" (i), "2" (arch_atomic_read(v))); \
72 #define ATOMIC_OP_RETURN(op, c_op, asm_op) \
73 static inline int arch_atomic_##op##_return(int i, atomic_t * v) \
75 unsigned long flags; \
78 local_irq_save(flags); \
79 t = (v->counter c_op i); \
80 local_irq_restore(flags); \
85 #define ATOMIC_FETCH_OP(op, c_op, asm_op) \
86 static inline int arch_atomic_fetch_##op(int i, atomic_t * v) \
88 unsigned long flags; \
91 local_irq_save(flags); \
94 local_irq_restore(flags); \
99 #endif /* CONFIG_RMW_INSNS */
101 #define ATOMIC_OPS(op, c_op, asm_op) \
102 ATOMIC_OP(op, c_op, asm_op) \
103 ATOMIC_OP_RETURN(op, c_op, asm_op) \
104 ATOMIC_FETCH_OP(op, c_op, asm_op)
106 ATOMIC_OPS(add, +=, add)
107 ATOMIC_OPS(sub, -=, sub)
110 #define ATOMIC_OPS(op, c_op, asm_op) \
111 ATOMIC_OP(op, c_op, asm_op) \
112 ATOMIC_FETCH_OP(op, c_op, asm_op)
114 ATOMIC_OPS(and, &=, and)
115 ATOMIC_OPS(or, |=, or)
116 ATOMIC_OPS(xor, ^=, eor)
119 #undef ATOMIC_FETCH_OP
120 #undef ATOMIC_OP_RETURN
123 static inline void arch_atomic_inc(atomic_t *v)
125 __asm__ __volatile__("addql #1,%0" : "+m" (*v));
127 #define arch_atomic_inc arch_atomic_inc
129 static inline void arch_atomic_dec(atomic_t *v)
131 __asm__ __volatile__("subql #1,%0" : "+m" (*v));
133 #define arch_atomic_dec arch_atomic_dec
135 static inline int arch_atomic_dec_and_test(atomic_t *v)
138 __asm__ __volatile__("subql #1,%1; seq %0" : "=d" (c), "+m" (*v));
141 #define arch_atomic_dec_and_test arch_atomic_dec_and_test
143 static inline int arch_atomic_dec_and_test_lt(atomic_t *v)
146 __asm__ __volatile__(
147 "subql #1,%1; slt %0"
148 : "=d" (c), "=m" (*v)
153 static inline int arch_atomic_inc_and_test(atomic_t *v)
156 __asm__ __volatile__("addql #1,%1; seq %0" : "=d" (c), "+m" (*v));
159 #define arch_atomic_inc_and_test arch_atomic_inc_and_test
161 #ifdef CONFIG_RMW_INSNS
163 #define arch_atomic_cmpxchg(v, o, n) ((int)arch_cmpxchg(&((v)->counter), (o), (n)))
164 #define arch_atomic_xchg(v, new) (arch_xchg(&((v)->counter), new))
166 #else /* !CONFIG_RMW_INSNS */
168 static inline int arch_atomic_cmpxchg(atomic_t *v, int old, int new)
173 local_irq_save(flags);
174 prev = arch_atomic_read(v);
176 arch_atomic_set(v, new);
177 local_irq_restore(flags);
181 static inline int arch_atomic_xchg(atomic_t *v, int new)
186 local_irq_save(flags);
187 prev = arch_atomic_read(v);
188 arch_atomic_set(v, new);
189 local_irq_restore(flags);
193 #endif /* !CONFIG_RMW_INSNS */
195 static inline int arch_atomic_sub_and_test(int i, atomic_t *v)
198 __asm__ __volatile__("subl %2,%1; seq %0"
199 : "=d" (c), "+m" (*v)
203 #define arch_atomic_sub_and_test arch_atomic_sub_and_test
205 static inline int arch_atomic_add_negative(int i, atomic_t *v)
208 __asm__ __volatile__("addl %2,%1; smi %0"
209 : "=d" (c), "+m" (*v)
213 #define arch_atomic_add_negative arch_atomic_add_negative
215 #endif /* __ARCH_M68K_ATOMIC __ */