Merge tag 'v5.10-rc1' into asoc-5.10
[linux-2.6-microblaze.git] / arch / arm64 / kernel / irq.c
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * Based on arch/arm/kernel/irq.c
4  *
5  * Copyright (C) 1992 Linus Torvalds
6  * Modifications for ARM processor Copyright (C) 1995-2000 Russell King.
7  * Support for Dynamic Tick Timer Copyright (C) 2004-2005 Nokia Corporation.
8  * Dynamic Tick Timer written by Tony Lindgren <tony@atomide.com> and
9  * Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com>.
10  * Copyright (C) 2012 ARM Ltd.
11  */
12
13 #include <linux/irq.h>
14 #include <linux/memory.h>
15 #include <linux/smp.h>
16 #include <linux/hardirq.h>
17 #include <linux/init.h>
18 #include <linux/irqchip.h>
19 #include <linux/kprobes.h>
20 #include <linux/seq_file.h>
21 #include <linux/vmalloc.h>
22 #include <asm/daifflags.h>
23 #include <asm/vmap_stack.h>
24
25 /* Only access this in an NMI enter/exit */
26 DEFINE_PER_CPU(struct nmi_ctx, nmi_contexts);
27
28 DEFINE_PER_CPU(unsigned long *, irq_stack_ptr);
29
30 #ifdef CONFIG_VMAP_STACK
31 static void init_irq_stacks(void)
32 {
33         int cpu;
34         unsigned long *p;
35
36         for_each_possible_cpu(cpu) {
37                 p = arch_alloc_vmap_stack(IRQ_STACK_SIZE, cpu_to_node(cpu));
38                 per_cpu(irq_stack_ptr, cpu) = p;
39         }
40 }
41 #else
42 /* irq stack only needs to be 16 byte aligned - not IRQ_STACK_SIZE aligned. */
43 DEFINE_PER_CPU_ALIGNED(unsigned long [IRQ_STACK_SIZE/sizeof(long)], irq_stack);
44
45 static void init_irq_stacks(void)
46 {
47         int cpu;
48
49         for_each_possible_cpu(cpu)
50                 per_cpu(irq_stack_ptr, cpu) = per_cpu(irq_stack, cpu);
51 }
52 #endif
53
54 void __init init_IRQ(void)
55 {
56         init_irq_stacks();
57         irqchip_init();
58         if (!handle_arch_irq)
59                 panic("No interrupt controller found.");
60
61         if (system_uses_irq_prio_masking()) {
62                 /*
63                  * Now that we have a stack for our IRQ handler, set
64                  * the PMR/PSR pair to a consistent state.
65                  */
66                 WARN_ON(read_sysreg(daif) & PSR_A_BIT);
67                 local_daif_restore(DAIF_PROCCTX_NOIRQ);
68         }
69 }
70
71 /*
72  * Stubs to make nmi_enter/exit() code callable from ASM
73  */
74 asmlinkage void notrace asm_nmi_enter(void)
75 {
76         nmi_enter();
77 }
78 NOKPROBE_SYMBOL(asm_nmi_enter);
79
80 asmlinkage void notrace asm_nmi_exit(void)
81 {
82         nmi_exit();
83 }
84 NOKPROBE_SYMBOL(asm_nmi_exit);