arch/arm64/include/asm/kvm_host.h

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2 /*
   3  * Copyright (C) 2012,2013 - ARM Ltd
   4  * Author: Marc Zyngier <marc.zyngier@arm.com>
   5  *
   6  * Derived from arch/arm/include/asm/kvm_host.h:
   7  * Copyright (C) 2012 - Virtual Open Systems and Columbia University
   8  * Author: Christoffer Dall <c.dall@virtualopensystems.com>
   9  */
  10
  11 #ifndef __ARM64_KVM_HOST_H__
  12 #define __ARM64_KVM_HOST_H__
  13
  14 #include <linux/arm-smccc.h>
  15 #include <linux/bitmap.h>
  16 #include <linux/types.h>
  17 #include <linux/jump_label.h>
  18 #include <linux/kvm_types.h>
  19 #include <linux/percpu.h>
  20 #include <linux/psci.h>
  21 #include <asm/arch_gicv3.h>
  22 #include <asm/barrier.h>
  23 #include <asm/cpufeature.h>
  24 #include <asm/cputype.h>
  25 #include <asm/daifflags.h>
  26 #include <asm/fpsimd.h>
  27 #include <asm/kvm.h>
  28 #include <asm/kvm_asm.h>
  29 #include <asm/thread_info.h>
  30
  31 #define __KVM_HAVE_ARCH_INTC_INITIALIZED
  32
  33 #define KVM_HALT_POLL_NS_DEFAULT 500000
  34
  35 #include <kvm/arm_vgic.h>
  36 #include <kvm/arm_arch_timer.h>
  37 #include <kvm/arm_pmu.h>
  38
  39 #define KVM_MAX_VCPUS VGIC_V3_MAX_CPUS
  40
  41 #define KVM_VCPU_MAX_FEATURES 7
  42
  43 #define KVM_REQ_SLEEP \
  44         KVM_ARCH_REQ_FLAGS(0, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
  45 #define KVM_REQ_IRQ_PENDING     KVM_ARCH_REQ(1)
  46 #define KVM_REQ_VCPU_RESET      KVM_ARCH_REQ(2)
  47 #define KVM_REQ_RECORD_STEAL    KVM_ARCH_REQ(3)
  48 #define KVM_REQ_RELOAD_GICv4    KVM_ARCH_REQ(4)
  49 #define KVM_REQ_RELOAD_PMU      KVM_ARCH_REQ(5)
  50
  51 #define KVM_DIRTY_LOG_MANUAL_CAPS   (KVM_DIRTY_LOG_MANUAL_PROTECT_ENABLE | \
  52                                      KVM_DIRTY_LOG_INITIALLY_SET)
  53
  54 /*
  55  * Mode of operation configurable with kvm-arm.mode early param.
  56  * See Documentation/admin-guide/kernel-parameters.txt for more information.
  57  */
  58 enum kvm_mode {
  59         KVM_MODE_DEFAULT,
  60         KVM_MODE_PROTECTED,
  61 };
  62 enum kvm_mode kvm_get_mode(void);
  63
  64 DECLARE_STATIC_KEY_FALSE(userspace_irqchip_in_use);
  65
  66 extern unsigned int kvm_sve_max_vl;
  67 int kvm_arm_init_sve(void);
  68
  69 int __attribute_const__ kvm_target_cpu(void);
  70 int kvm_reset_vcpu(struct kvm_vcpu *vcpu);
  71 void kvm_arm_vcpu_destroy(struct kvm_vcpu *vcpu);
  72
  73 struct kvm_vmid {
  74         /* The VMID generation used for the virt. memory system */
  75         u64    vmid_gen;
  76         u32    vmid;
  77 };
  78
  79 struct kvm_s2_mmu {
  80         struct kvm_vmid vmid;
  81
  82         /*
  83          * stage2 entry level table
  84          *
  85          * Two kvm_s2_mmu structures in the same VM can point to the same
  86          * pgd here.  This happens when running a guest using a
  87          * translation regime that isn't affected by its own stage-2
  88          * translation, such as a non-VHE hypervisor running at vEL2, or
  89          * for vEL1/EL0 with vHCR_EL2.VM == 0.  In that case, we use the
  90          * canonical stage-2 page tables.
  91          */
  92         phys_addr_t     pgd_phys;
  93         struct kvm_pgtable *pgt;
  94
  95         /* The last vcpu id that ran on each physical CPU */
  96         int __percpu *last_vcpu_ran;
  97
  98         struct kvm_arch *arch;
  99 };
 100
 101 struct kvm_arch_memory_slot {
 102 };
 103
 104 struct kvm_arch {
 105         struct kvm_s2_mmu mmu;
 106
 107         /* VTCR_EL2 value for this VM */
 108         u64    vtcr;
 109
 110         /* The maximum number of vCPUs depends on the used GIC model */
 111         int max_vcpus;
 112
 113         /* Interrupt controller */
 114         struct vgic_dist        vgic;
 115
 116         /* Mandated version of PSCI */
 117         u32 psci_version;
 118
 119         /*
 120          * If we encounter a data abort without valid instruction syndrome
 121          * information, report this to user space.  User space can (and
 122          * should) opt in to this feature if KVM_CAP_ARM_NISV_TO_USER is
 123          * supported.
 124          */
 125         bool return_nisv_io_abort_to_user;
 126
 127         /*
 128          * VM-wide PMU filter, implemented as a bitmap and big enough for
 129          * up to 2^10 events (ARMv8.0) or 2^16 events (ARMv8.1+).
 130          */
 131         unsigned long *pmu_filter;
 132         unsigned int pmuver;
 133
 134         u8 pfr0_csv2;
 135         u8 pfr0_csv3;
 136
 137         /* Memory Tagging Extension enabled for the guest */
 138         bool mte_enabled;
 139 };
 140
 141 struct kvm_vcpu_fault_info {
 142         u32 esr_el2;            /* Hyp Syndrom Register */
 143         u64 far_el2;            /* Hyp Fault Address Register */
 144         u64 hpfar_el2;          /* Hyp IPA Fault Address Register */
 145         u64 disr_el1;           /* Deferred [SError] Status Register */
 146 };
 147
 148 enum vcpu_sysreg {
 149         __INVALID_SYSREG__,   /* 0 is reserved as an invalid value */
 150         MPIDR_EL1,      /* MultiProcessor Affinity Register */
 151         CSSELR_EL1,     /* Cache Size Selection Register */
 152         SCTLR_EL1,      /* System Control Register */
 153         ACTLR_EL1,      /* Auxiliary Control Register */
 154         CPACR_EL1,      /* Coprocessor Access Control */
 155         ZCR_EL1,        /* SVE Control */
 156         TTBR0_EL1,      /* Translation Table Base Register 0 */
 157         TTBR1_EL1,      /* Translation Table Base Register 1 */
 158         TCR_EL1,        /* Translation Control Register */
 159         ESR_EL1,        /* Exception Syndrome Register */
 160         AFSR0_EL1,      /* Auxiliary Fault Status Register 0 */
 161         AFSR1_EL1,      /* Auxiliary Fault Status Register 1 */
 162         FAR_EL1,        /* Fault Address Register */
 163         MAIR_EL1,       /* Memory Attribute Indirection Register */
 164         VBAR_EL1,       /* Vector Base Address Register */
 165         CONTEXTIDR_EL1, /* Context ID Register */
 166         TPIDR_EL0,      /* Thread ID, User R/W */
 167         TPIDRRO_EL0,    /* Thread ID, User R/O */
 168         TPIDR_EL1,      /* Thread ID, Privileged */
 169         AMAIR_EL1,      /* Aux Memory Attribute Indirection Register */
 170         CNTKCTL_EL1,    /* Timer Control Register (EL1) */
 171         PAR_EL1,        /* Physical Address Register */
 172         MDSCR_EL1,      /* Monitor Debug System Control Register */
 173         MDCCINT_EL1,    /* Monitor Debug Comms Channel Interrupt Enable Reg */
 174         DISR_EL1,       /* Deferred Interrupt Status Register */
 175
 176         /* Performance Monitors Registers */
 177         PMCR_EL0,       /* Control Register */
 178         PMSELR_EL0,     /* Event Counter Selection Register */
 179         PMEVCNTR0_EL0,  /* Event Counter Register (0-30) */
 180         PMEVCNTR30_EL0 = PMEVCNTR0_EL0 + 30,
 181         PMCCNTR_EL0,    /* Cycle Counter Register */
 182         PMEVTYPER0_EL0, /* Event Type Register (0-30) */
 183         PMEVTYPER30_EL0 = PMEVTYPER0_EL0 + 30,
 184         PMCCFILTR_EL0,  /* Cycle Count Filter Register */
 185         PMCNTENSET_EL0, /* Count Enable Set Register */
 186         PMINTENSET_EL1, /* Interrupt Enable Set Register */
 187         PMOVSSET_EL0,   /* Overflow Flag Status Set Register */
 188         PMSWINC_EL0,    /* Software Increment Register */
 189         PMUSERENR_EL0,  /* User Enable Register */
 190
 191         /* Pointer Authentication Registers in a strict increasing order. */
 192         APIAKEYLO_EL1,
 193         APIAKEYHI_EL1,
 194         APIBKEYLO_EL1,
 195         APIBKEYHI_EL1,
 196         APDAKEYLO_EL1,
 197         APDAKEYHI_EL1,
 198         APDBKEYLO_EL1,
 199         APDBKEYHI_EL1,
 200         APGAKEYLO_EL1,
 201         APGAKEYHI_EL1,
 202
 203         ELR_EL1,
 204         SP_EL1,
 205         SPSR_EL1,
 206
 207         CNTVOFF_EL2,
 208         CNTV_CVAL_EL0,
 209         CNTV_CTL_EL0,
 210         CNTP_CVAL_EL0,
 211         CNTP_CTL_EL0,
 212
 213         /* Memory Tagging Extension registers */
 214         RGSR_EL1,       /* Random Allocation Tag Seed Register */
 215         GCR_EL1,        /* Tag Control Register */
 216         TFSR_EL1,       /* Tag Fault Status Register (EL1) */
 217         TFSRE0_EL1,     /* Tag Fault Status Register (EL0) */
 218
 219         /* 32bit specific registers. Keep them at the end of the range */
 220         DACR32_EL2,     /* Domain Access Control Register */
 221         IFSR32_EL2,     /* Instruction Fault Status Register */
 222         FPEXC32_EL2,    /* Floating-Point Exception Control Register */
 223         DBGVCR32_EL2,   /* Debug Vector Catch Register */
 224
 225         NR_SYS_REGS     /* Nothing after this line! */
 226 };
 227
 228 struct kvm_cpu_context {
 229         struct user_pt_regs regs;       /* sp = sp_el0 */
 230
 231         u64     spsr_abt;
 232         u64     spsr_und;
 233         u64     spsr_irq;
 234         u64     spsr_fiq;
 235
 236         struct user_fpsimd_state fp_regs;
 237
 238         u64 sys_regs[NR_SYS_REGS];
 239
 240         struct kvm_vcpu *__hyp_running_vcpu;
 241 };
 242
 243 struct kvm_pmu_events {
 244         u32 events_host;
 245         u32 events_guest;
 246 };
 247
 248 struct kvm_host_data {
 249         struct kvm_cpu_context host_ctxt;
 250         struct kvm_pmu_events pmu_events;
 251 };
 252
 253 struct kvm_host_psci_config {
 254         /* PSCI version used by host. */
 255         u32 version;
 256
 257         /* Function IDs used by host if version is v0.1. */
 258         struct psci_0_1_function_ids function_ids_0_1;
 259
 260         bool psci_0_1_cpu_suspend_implemented;
 261         bool psci_0_1_cpu_on_implemented;
 262         bool psci_0_1_cpu_off_implemented;
 263         bool psci_0_1_migrate_implemented;
 264 };
 265
 266 extern struct kvm_host_psci_config kvm_nvhe_sym(kvm_host_psci_config);
 267 #define kvm_host_psci_config CHOOSE_NVHE_SYM(kvm_host_psci_config)
 268
 269 extern s64 kvm_nvhe_sym(hyp_physvirt_offset);
 270 #define hyp_physvirt_offset CHOOSE_NVHE_SYM(hyp_physvirt_offset)
 271
 272 extern u64 kvm_nvhe_sym(hyp_cpu_logical_map)[NR_CPUS];
 273 #define hyp_cpu_logical_map CHOOSE_NVHE_SYM(hyp_cpu_logical_map)
 274
 275 struct vcpu_reset_state {
 276         unsigned long   pc;
 277         unsigned long   r0;
 278         bool            be;
 279         bool            reset;
 280 };
 281
 282 struct kvm_vcpu_arch {
 283         struct kvm_cpu_context ctxt;
 284         void *sve_state;
 285         unsigned int sve_max_vl;
 286
 287         /* Stage 2 paging state used by the hardware on next switch */
 288         struct kvm_s2_mmu *hw_mmu;
 289
 290         /* HYP configuration */
 291         u64 hcr_el2;
 292         u32 mdcr_el2;
 293
 294         /* Exception Information */
 295         struct kvm_vcpu_fault_info fault;
 296
 297         /* State of various workarounds, see kvm_asm.h for bit assignment */
 298         u64 workaround_flags;
 299
 300         /* Miscellaneous vcpu state flags */
 301         u64 flags;
 302
 303         /*
 304          * We maintain more than a single set of debug registers to support
 305          * debugging the guest from the host and to maintain separate host and
 306          * guest state during world switches. vcpu_debug_state are the debug
 307          * registers of the vcpu as the guest sees them.  host_debug_state are
 308          * the host registers which are saved and restored during
 309          * world switches. external_debug_state contains the debug
 310          * values we want to debug the guest. This is set via the
 311          * KVM_SET_GUEST_DEBUG ioctl.
 312          *
 313          * debug_ptr points to the set of debug registers that should be loaded
 314          * onto the hardware when running the guest.
 315          */
 316         struct kvm_guest_debug_arch *debug_ptr;
 317         struct kvm_guest_debug_arch vcpu_debug_state;
 318         struct kvm_guest_debug_arch external_debug_state;
 319
 320         struct thread_info *host_thread_info;   /* hyp VA */
 321         struct user_fpsimd_state *host_fpsimd_state;    /* hyp VA */
 322
 323         struct {
 324                 /* {Break,watch}point registers */
 325                 struct kvm_guest_debug_arch regs;
 326                 /* Statistical profiling extension */
 327                 u64 pmscr_el1;
 328                 /* Self-hosted trace */
 329                 u64 trfcr_el1;
 330         } host_debug_state;
 331
 332         /* VGIC state */
 333         struct vgic_cpu vgic_cpu;
 334         struct arch_timer_cpu timer_cpu;
 335         struct kvm_pmu pmu;
 336
 337         /*
 338          * Anything that is not used directly from assembly code goes
 339          * here.
 340          */
 341
 342         /*
 343          * Guest registers we preserve during guest debugging.
 344          *
 345          * These shadow registers are updated by the kvm_handle_sys_reg
 346          * trap handler if the guest accesses or updates them while we
 347          * are using guest debug.
 348          */
 349         struct {
 350                 u32     mdscr_el1;
 351         } guest_debug_preserved;
 352
 353         /* vcpu power-off state */
 354         bool power_off;
 355
 356         /* Don't run the guest (internal implementation need) */
 357         bool pause;
 358
 359         /* Cache some mmu pages needed inside spinlock regions */
 360         struct kvm_mmu_memory_cache mmu_page_cache;
 361
 362         /* Target CPU and feature flags */
 363         int target;
 364         DECLARE_BITMAP(features, KVM_VCPU_MAX_FEATURES);
 365
 366         /* Detect first run of a vcpu */
 367         bool has_run_once;
 368
 369         /* Virtual SError ESR to restore when HCR_EL2.VSE is set */
 370         u64 vsesr_el2;
 371
 372         /* Additional reset state */
 373         struct vcpu_reset_state reset_state;
 374
 375         /* True when deferrable sysregs are loaded on the physical CPU,
 376          * see kvm_vcpu_load_sysregs_vhe and kvm_vcpu_put_sysregs_vhe. */
 377         bool sysregs_loaded_on_cpu;
 378
 379         /* Guest PV state */
 380         struct {
 381                 u64 last_steal;
 382                 gpa_t base;
 383         } steal;
 384 };
 385
 386 /* Pointer to the vcpu's SVE FFR for sve_{save,load}_state() */
 387 #define vcpu_sve_pffr(vcpu) (kern_hyp_va((vcpu)->arch.sve_state) +      \
 388                              sve_ffr_offset((vcpu)->arch.sve_max_vl))
 389
 390 #define vcpu_sve_max_vq(vcpu)   sve_vq_from_vl((vcpu)->arch.sve_max_vl)
 391
 392 #define vcpu_sve_state_size(vcpu) ({                                    \
 393         size_t __size_ret;                                              \
 394         unsigned int __vcpu_vq;                                         \
 395                                                                         \
 396         if (WARN_ON(!sve_vl_valid((vcpu)->arch.sve_max_vl))) {          \
 397                 __size_ret = 0;                                         \
 398         } else {                                                        \
 399                 __vcpu_vq = vcpu_sve_max_vq(vcpu);                      \
 400                 __size_ret = SVE_SIG_REGS_SIZE(__vcpu_vq);              \
 401         }                                                               \
 402                                                                         \
 403         __size_ret;                                                     \
 404 })
 405
 406 /* vcpu_arch flags field values: */
 407 #define KVM_ARM64_DEBUG_DIRTY           (1 << 0)
 408 #define KVM_ARM64_FP_ENABLED            (1 << 1) /* guest FP regs loaded */
 409 #define KVM_ARM64_FP_HOST               (1 << 2) /* host FP regs loaded */
 410 #define KVM_ARM64_HOST_SVE_IN_USE       (1 << 3) /* backup for host TIF_SVE */
 411 #define KVM_ARM64_HOST_SVE_ENABLED      (1 << 4) /* SVE enabled for EL0 */
 412 #define KVM_ARM64_GUEST_HAS_SVE         (1 << 5) /* SVE exposed to guest */
 413 #define KVM_ARM64_VCPU_SVE_FINALIZED    (1 << 6) /* SVE config completed */
 414 #define KVM_ARM64_GUEST_HAS_PTRAUTH     (1 << 7) /* PTRAUTH exposed to guest */
 415 #define KVM_ARM64_PENDING_EXCEPTION     (1 << 8) /* Exception pending */
 416 #define KVM_ARM64_EXCEPT_MASK           (7 << 9) /* Target EL/MODE */
 417 #define KVM_ARM64_DEBUG_STATE_SAVE_SPE  (1 << 12) /* Save SPE context if active  */
 418 #define KVM_ARM64_DEBUG_STATE_SAVE_TRBE (1 << 13) /* Save TRBE context if active  */
 419
 420 #define KVM_GUESTDBG_VALID_MASK (KVM_GUESTDBG_ENABLE | \
 421                                  KVM_GUESTDBG_USE_SW_BP | \
 422                                  KVM_GUESTDBG_USE_HW | \
 423                                  KVM_GUESTDBG_SINGLESTEP)
 424 /*
 425  * When KVM_ARM64_PENDING_EXCEPTION is set, KVM_ARM64_EXCEPT_MASK can
 426  * take the following values:
 427  *
 428  * For AArch32 EL1:
 429  */
 430 #define KVM_ARM64_EXCEPT_AA32_UND       (0 << 9)
 431 #define KVM_ARM64_EXCEPT_AA32_IABT      (1 << 9)
 432 #define KVM_ARM64_EXCEPT_AA32_DABT      (2 << 9)
 433 /* For AArch64: */
 434 #define KVM_ARM64_EXCEPT_AA64_ELx_SYNC  (0 << 9)
 435 #define KVM_ARM64_EXCEPT_AA64_ELx_IRQ   (1 << 9)
 436 #define KVM_ARM64_EXCEPT_AA64_ELx_FIQ   (2 << 9)
 437 #define KVM_ARM64_EXCEPT_AA64_ELx_SERR  (3 << 9)
 438 #define KVM_ARM64_EXCEPT_AA64_EL1       (0 << 11)
 439 #define KVM_ARM64_EXCEPT_AA64_EL2       (1 << 11)
 440
 441 /*
 442  * Overlaps with KVM_ARM64_EXCEPT_MASK on purpose so that it can't be
 443  * set together with an exception...
 444  */
 445 #define KVM_ARM64_INCREMENT_PC          (1 << 9) /* Increment PC */
 446
 447 #define vcpu_has_sve(vcpu) (system_supports_sve() &&                    \
 448                             ((vcpu)->arch.flags & KVM_ARM64_GUEST_HAS_SVE))
 449
 450 #ifdef CONFIG_ARM64_PTR_AUTH
 451 #define vcpu_has_ptrauth(vcpu)                                          \
 452         ((cpus_have_final_cap(ARM64_HAS_ADDRESS_AUTH) ||                \
 453           cpus_have_final_cap(ARM64_HAS_GENERIC_AUTH)) &&               \
 454          (vcpu)->arch.flags & KVM_ARM64_GUEST_HAS_PTRAUTH)
 455 #else
 456 #define vcpu_has_ptrauth(vcpu)          false
 457 #endif
 458
 459 #define vcpu_gp_regs(v)         (&(v)->arch.ctxt.regs)
 460
 461 /*
 462  * Only use __vcpu_sys_reg/ctxt_sys_reg if you know you want the
 463  * memory backed version of a register, and not the one most recently
 464  * accessed by a running VCPU.  For example, for userspace access or
 465  * for system registers that are never context switched, but only
 466  * emulated.
 467  */
 468 #define __ctxt_sys_reg(c,r)     (&(c)->sys_regs[(r)])
 469
 470 #define ctxt_sys_reg(c,r)       (*__ctxt_sys_reg(c,r))
 471
 472 #define __vcpu_sys_reg(v,r)     (ctxt_sys_reg(&(v)->arch.ctxt, (r)))
 473
 474 u64 vcpu_read_sys_reg(const struct kvm_vcpu *vcpu, int reg);
 475 void vcpu_write_sys_reg(struct kvm_vcpu *vcpu, u64 val, int reg);
 476
 477 static inline bool __vcpu_read_sys_reg_from_cpu(int reg, u64 *val)
 478 {
 479         /*
 480          * *** VHE ONLY ***
 481          *
 482          * System registers listed in the switch are not saved on every
 483          * exit from the guest but are only saved on vcpu_put.
 484          *
 485          * Note that MPIDR_EL1 for the guest is set by KVM via VMPIDR_EL2 but
 486          * should never be listed below, because the guest cannot modify its
 487          * own MPIDR_EL1 and MPIDR_EL1 is accessed for VCPU A from VCPU B's
 488          * thread when emulating cross-VCPU communication.
 489          */
 490         if (!has_vhe())
 491                 return false;
 492
 493         switch (reg) {
 494         case CSSELR_EL1:        *val = read_sysreg_s(SYS_CSSELR_EL1);   break;
 495         case SCTLR_EL1:         *val = read_sysreg_s(SYS_SCTLR_EL12);   break;
 496         case CPACR_EL1:         *val = read_sysreg_s(SYS_CPACR_EL12);   break;
 497         case TTBR0_EL1:         *val = read_sysreg_s(SYS_TTBR0_EL12);   break;
 498         case TTBR1_EL1:         *val = read_sysreg_s(SYS_TTBR1_EL12);   break;
 499         case TCR_EL1:           *val = read_sysreg_s(SYS_TCR_EL12);     break;
 500         case ESR_EL1:           *val = read_sysreg_s(SYS_ESR_EL12);     break;
 501         case AFSR0_EL1:         *val = read_sysreg_s(SYS_AFSR0_EL12);   break;
 502         case AFSR1_EL1:         *val = read_sysreg_s(SYS_AFSR1_EL12);   break;
 503         case FAR_EL1:           *val = read_sysreg_s(SYS_FAR_EL12);     break;
 504         case MAIR_EL1:          *val = read_sysreg_s(SYS_MAIR_EL12);    break;
 505         case VBAR_EL1:          *val = read_sysreg_s(SYS_VBAR_EL12);    break;
 506         case CONTEXTIDR_EL1:    *val = read_sysreg_s(SYS_CONTEXTIDR_EL12);break;
 507         case TPIDR_EL0:         *val = read_sysreg_s(SYS_TPIDR_EL0);    break;
 508         case TPIDRRO_EL0:       *val = read_sysreg_s(SYS_TPIDRRO_EL0);  break;
 509         case TPIDR_EL1:         *val = read_sysreg_s(SYS_TPIDR_EL1);    break;
 510         case AMAIR_EL1:         *val = read_sysreg_s(SYS_AMAIR_EL12);   break;
 511         case CNTKCTL_EL1:       *val = read_sysreg_s(SYS_CNTKCTL_EL12); break;
 512         case ELR_EL1:           *val = read_sysreg_s(SYS_ELR_EL12);     break;
 513         case PAR_EL1:           *val = read_sysreg_par();               break;
 514         case DACR32_EL2:        *val = read_sysreg_s(SYS_DACR32_EL2);   break;
 515         case IFSR32_EL2:        *val = read_sysreg_s(SYS_IFSR32_EL2);   break;
 516         case DBGVCR32_EL2:      *val = read_sysreg_s(SYS_DBGVCR32_EL2); break;
 517         default:                return false;
 518         }
 519
 520         return true;
 521 }
 522
 523 static inline bool __vcpu_write_sys_reg_to_cpu(u64 val, int reg)
 524 {
 525         /*
 526          * *** VHE ONLY ***
 527          *
 528          * System registers listed in the switch are not restored on every
 529          * entry to the guest but are only restored on vcpu_load.
 530          *
 531          * Note that MPIDR_EL1 for the guest is set by KVM via VMPIDR_EL2 but
 532          * should never be listed below, because the MPIDR should only be set
 533          * once, before running the VCPU, and never changed later.
 534          */
 535         if (!has_vhe())
 536                 return false;
 537
 538         switch (reg) {
 539         case CSSELR_EL1:        write_sysreg_s(val, SYS_CSSELR_EL1);    break;
 540         case SCTLR_EL1:         write_sysreg_s(val, SYS_SCTLR_EL12);    break;
 541         case CPACR_EL1:         write_sysreg_s(val, SYS_CPACR_EL12);    break;
 542         case TTBR0_EL1:         write_sysreg_s(val, SYS_TTBR0_EL12);    break;
 543         case TTBR1_EL1:         write_sysreg_s(val, SYS_TTBR1_EL12);    break;
 544         case TCR_EL1:           write_sysreg_s(val, SYS_TCR_EL12);      break;
 545         case ESR_EL1:           write_sysreg_s(val, SYS_ESR_EL12);      break;
 546         case AFSR0_EL1:         write_sysreg_s(val, SYS_AFSR0_EL12);    break;
 547         case AFSR1_EL1:         write_sysreg_s(val, SYS_AFSR1_EL12);    break;
 548         case FAR_EL1:           write_sysreg_s(val, SYS_FAR_EL12);      break;
 549         case MAIR_EL1:          write_sysreg_s(val, SYS_MAIR_EL12);     break;
 550         case VBAR_EL1:          write_sysreg_s(val, SYS_VBAR_EL12);     break;
 551         case CONTEXTIDR_EL1:    write_sysreg_s(val, SYS_CONTEXTIDR_EL12);break;
 552         case TPIDR_EL0:         write_sysreg_s(val, SYS_TPIDR_EL0);     break;
 553         case TPIDRRO_EL0:       write_sysreg_s(val, SYS_TPIDRRO_EL0);   break;
 554         case TPIDR_EL1:         write_sysreg_s(val, SYS_TPIDR_EL1);     break;
 555         case AMAIR_EL1:         write_sysreg_s(val, SYS_AMAIR_EL12);    break;
 556         case CNTKCTL_EL1:       write_sysreg_s(val, SYS_CNTKCTL_EL12);  break;
 557         case ELR_EL1:           write_sysreg_s(val, SYS_ELR_EL12);      break;
 558         case PAR_EL1:           write_sysreg_s(val, SYS_PAR_EL1);       break;
 559         case DACR32_EL2:        write_sysreg_s(val, SYS_DACR32_EL2);    break;
 560         case IFSR32_EL2:        write_sysreg_s(val, SYS_IFSR32_EL2);    break;
 561         case DBGVCR32_EL2:      write_sysreg_s(val, SYS_DBGVCR32_EL2);  break;
 562         default:                return false;
 563         }
 564
 565         return true;
 566 }
 567
 568 struct kvm_vm_stat {
 569         struct kvm_vm_stat_generic generic;
 570 };
 571
 572 struct kvm_vcpu_stat {
 573         struct kvm_vcpu_stat_generic generic;
 574         u64 hvc_exit_stat;
 575         u64 wfe_exit_stat;
 576         u64 wfi_exit_stat;
 577         u64 mmio_exit_user;
 578         u64 mmio_exit_kernel;
 579         u64 exits;
 580 };
 581
 582 int kvm_vcpu_preferred_target(struct kvm_vcpu_init *init);
 583 unsigned long kvm_arm_num_regs(struct kvm_vcpu *vcpu);
 584 int kvm_arm_copy_reg_indices(struct kvm_vcpu *vcpu, u64 __user *indices);
 585 int kvm_arm_get_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg);
 586 int kvm_arm_set_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg);
 587
 588 unsigned long kvm_arm_num_sys_reg_descs(struct kvm_vcpu *vcpu);
 589 int kvm_arm_copy_sys_reg_indices(struct kvm_vcpu *vcpu, u64 __user *uindices);
 590 int kvm_arm_sys_reg_get_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *);
 591 int kvm_arm_sys_reg_set_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *);
 592
 593 int __kvm_arm_vcpu_get_events(struct kvm_vcpu *vcpu,
 594                               struct kvm_vcpu_events *events);
 595
 596 int __kvm_arm_vcpu_set_events(struct kvm_vcpu *vcpu,
 597                               struct kvm_vcpu_events *events);
 598
 599 #define KVM_ARCH_WANT_MMU_NOTIFIER
 600
 601 void kvm_arm_halt_guest(struct kvm *kvm);
 602 void kvm_arm_resume_guest(struct kvm *kvm);
 603
 604 #ifndef __KVM_NVHE_HYPERVISOR__
 605 #define kvm_call_hyp_nvhe(f, ...)                                               \
 606         ({                                                              \
 607                 struct arm_smccc_res res;                               \
 608                                                                         \
 609                 arm_smccc_1_1_hvc(KVM_HOST_SMCCC_FUNC(f),               \
 610                                   ##__VA_ARGS__, &res);                 \
 611                 WARN_ON(res.a0 != SMCCC_RET_SUCCESS);                   \
 612                                                                         \
 613                 res.a1;                                                 \
 614         })
 615
 616 /*
 617  * The couple of isb() below are there to guarantee the same behaviour
 618  * on VHE as on !VHE, where the eret to EL1 acts as a context
 619  * synchronization event.
 620  */
 621 #define kvm_call_hyp(f, ...)                                            \
 622         do {                                                            \
 623                 if (has_vhe()) {                                        \
 624                         f(__VA_ARGS__);                                 \
 625                         isb();                                          \
 626                 } else {                                                \
 627                         kvm_call_hyp_nvhe(f, ##__VA_ARGS__);            \
 628                 }                                                       \
 629         } while(0)
 630
 631 #define kvm_call_hyp_ret(f, ...)                                        \
 632         ({                                                              \
 633                 typeof(f(__VA_ARGS__)) ret;                             \
 634                                                                         \
 635                 if (has_vhe()) {                                        \
 636                         ret = f(__VA_ARGS__);                           \
 637                         isb();                                          \
 638                 } else {                                                \
 639                         ret = kvm_call_hyp_nvhe(f, ##__VA_ARGS__);      \
 640                 }                                                       \
 641                                                                         \
 642                 ret;                                                    \
 643         })
 644 #else /* __KVM_NVHE_HYPERVISOR__ */
 645 #define kvm_call_hyp(f, ...) f(__VA_ARGS__)
 646 #define kvm_call_hyp_ret(f, ...) f(__VA_ARGS__)
 647 #define kvm_call_hyp_nvhe(f, ...) f(__VA_ARGS__)
 648 #endif /* __KVM_NVHE_HYPERVISOR__ */
 649
 650 void force_vm_exit(const cpumask_t *mask);
 651
 652 int handle_exit(struct kvm_vcpu *vcpu, int exception_index);
 653 void handle_exit_early(struct kvm_vcpu *vcpu, int exception_index);
 654
 655 int kvm_handle_cp14_load_store(struct kvm_vcpu *vcpu);
 656 int kvm_handle_cp14_32(struct kvm_vcpu *vcpu);
 657 int kvm_handle_cp14_64(struct kvm_vcpu *vcpu);
 658 int kvm_handle_cp15_32(struct kvm_vcpu *vcpu);
 659 int kvm_handle_cp15_64(struct kvm_vcpu *vcpu);
 660 int kvm_handle_sys_reg(struct kvm_vcpu *vcpu);
 661
 662 void kvm_reset_sys_regs(struct kvm_vcpu *vcpu);
 663
 664 void kvm_sys_reg_table_init(void);
 665
 666 /* MMIO helpers */
 667 void kvm_mmio_write_buf(void *buf, unsigned int len, unsigned long data);
 668 unsigned long kvm_mmio_read_buf(const void *buf, unsigned int len);
 669
 670 int kvm_handle_mmio_return(struct kvm_vcpu *vcpu);
 671 int io_mem_abort(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa);
 672
 673 int kvm_perf_init(void);
 674 int kvm_perf_teardown(void);
 675
 676 long kvm_hypercall_pv_features(struct kvm_vcpu *vcpu);
 677 gpa_t kvm_init_stolen_time(struct kvm_vcpu *vcpu);
 678 void kvm_update_stolen_time(struct kvm_vcpu *vcpu);
 679
 680 bool kvm_arm_pvtime_supported(void);
 681 int kvm_arm_pvtime_set_attr(struct kvm_vcpu *vcpu,
 682                             struct kvm_device_attr *attr);
 683 int kvm_arm_pvtime_get_attr(struct kvm_vcpu *vcpu,
 684                             struct kvm_device_attr *attr);
 685 int kvm_arm_pvtime_has_attr(struct kvm_vcpu *vcpu,
 686                             struct kvm_device_attr *attr);
 687
 688 static inline void kvm_arm_pvtime_vcpu_init(struct kvm_vcpu_arch *vcpu_arch)
 689 {
 690         vcpu_arch->steal.base = GPA_INVALID;
 691 }
 692
 693 static inline bool kvm_arm_is_pvtime_enabled(struct kvm_vcpu_arch *vcpu_arch)
 694 {
 695         return (vcpu_arch->steal.base != GPA_INVALID);
 696 }
 697
 698 void kvm_set_sei_esr(struct kvm_vcpu *vcpu, u64 syndrome);
 699
 700 struct kvm_vcpu *kvm_mpidr_to_vcpu(struct kvm *kvm, unsigned long mpidr);
 701
 702 DECLARE_KVM_HYP_PER_CPU(struct kvm_host_data, kvm_host_data);
 703
 704 static inline void kvm_init_host_cpu_context(struct kvm_cpu_context *cpu_ctxt)
 705 {
 706         /* The host's MPIDR is immutable, so let's set it up at boot time */
 707         ctxt_sys_reg(cpu_ctxt, MPIDR_EL1) = read_cpuid_mpidr();
 708 }
 709
 710 void kvm_arm_vcpu_ptrauth_trap(struct kvm_vcpu *vcpu);
 711
 712 static inline void kvm_arch_hardware_unsetup(void) {}
 713 static inline void kvm_arch_sync_events(struct kvm *kvm) {}
 714 static inline void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu) {}
 715 static inline void kvm_arch_vcpu_block_finish(struct kvm_vcpu *vcpu) {}
 716
 717 void kvm_arm_init_debug(void);
 718 void kvm_arm_vcpu_init_debug(struct kvm_vcpu *vcpu);
 719 void kvm_arm_setup_debug(struct kvm_vcpu *vcpu);
 720 void kvm_arm_clear_debug(struct kvm_vcpu *vcpu);
 721 void kvm_arm_reset_debug_ptr(struct kvm_vcpu *vcpu);
 722 int kvm_arm_vcpu_arch_set_attr(struct kvm_vcpu *vcpu,
 723                                struct kvm_device_attr *attr);
 724 int kvm_arm_vcpu_arch_get_attr(struct kvm_vcpu *vcpu,
 725                                struct kvm_device_attr *attr);
 726 int kvm_arm_vcpu_arch_has_attr(struct kvm_vcpu *vcpu,
 727                                struct kvm_device_attr *attr);
 728
 729 long kvm_vm_ioctl_mte_copy_tags(struct kvm *kvm,
 730                                 struct kvm_arm_copy_mte_tags *copy_tags);
 731
 732 /* Guest/host FPSIMD coordination helpers */
 733 int kvm_arch_vcpu_run_map_fp(struct kvm_vcpu *vcpu);
 734 void kvm_arch_vcpu_load_fp(struct kvm_vcpu *vcpu);
 735 void kvm_arch_vcpu_ctxsync_fp(struct kvm_vcpu *vcpu);
 736 void kvm_arch_vcpu_put_fp(struct kvm_vcpu *vcpu);
 737
 738 static inline bool kvm_pmu_counter_deferred(struct perf_event_attr *attr)
 739 {
 740         return (!has_vhe() && attr->exclude_host);
 741 }
 742
 743 /* Flags for host debug state */
 744 void kvm_arch_vcpu_load_debug_state_flags(struct kvm_vcpu *vcpu);
 745 void kvm_arch_vcpu_put_debug_state_flags(struct kvm_vcpu *vcpu);
 746
 747 #ifdef CONFIG_KVM /* Avoid conflicts with core headers if CONFIG_KVM=n */
 748 static inline int kvm_arch_vcpu_run_pid_change(struct kvm_vcpu *vcpu)
 749 {
 750         return kvm_arch_vcpu_run_map_fp(vcpu);
 751 }
 752
 753 void kvm_set_pmu_events(u32 set, struct perf_event_attr *attr);
 754 void kvm_clr_pmu_events(u32 clr);
 755
 756 void kvm_vcpu_pmu_restore_guest(struct kvm_vcpu *vcpu);
 757 void kvm_vcpu_pmu_restore_host(struct kvm_vcpu *vcpu);
 758 #else
 759 static inline void kvm_set_pmu_events(u32 set, struct perf_event_attr *attr) {}
 760 static inline void kvm_clr_pmu_events(u32 clr) {}
 761 #endif
 762
 763 void kvm_vcpu_load_sysregs_vhe(struct kvm_vcpu *vcpu);
 764 void kvm_vcpu_put_sysregs_vhe(struct kvm_vcpu *vcpu);
 765
 766 int kvm_set_ipa_limit(void);
 767
 768 #define __KVM_HAVE_ARCH_VM_ALLOC
 769 struct kvm *kvm_arch_alloc_vm(void);
 770 void kvm_arch_free_vm(struct kvm *kvm);
 771
 772 int kvm_arm_setup_stage2(struct kvm *kvm, unsigned long type);
 773
 774 int kvm_arm_vcpu_finalize(struct kvm_vcpu *vcpu, int feature);
 775 bool kvm_arm_vcpu_is_finalized(struct kvm_vcpu *vcpu);
 776
 777 #define kvm_arm_vcpu_sve_finalized(vcpu) \
 778         ((vcpu)->arch.flags & KVM_ARM64_VCPU_SVE_FINALIZED)
 779
 780 #define kvm_has_mte(kvm) (system_supports_mte() && (kvm)->arch.mte_enabled)
 781 #define kvm_vcpu_has_pmu(vcpu)                                  \
 782         (test_bit(KVM_ARM_VCPU_PMU_V3, (vcpu)->arch.features))
 783
 784 int kvm_trng_call(struct kvm_vcpu *vcpu);
 785 #ifdef CONFIG_KVM
 786 extern phys_addr_t hyp_mem_base;
 787 extern phys_addr_t hyp_mem_size;
 788 void __init kvm_hyp_reserve(void);
 789 #else
 790 static inline void kvm_hyp_reserve(void) { }
 791 #endif
 792
 793 #endif /* __ARM64_KVM_HOST_H__ */