arch/arm64/include/asm/kvm_host.h

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2 /*
   3  * Copyright (C) 2012,2013 - ARM Ltd
   4  * Author: Marc Zyngier <marc.zyngier@arm.com>
   5  *
   6  * Derived from arch/arm/include/asm/kvm_host.h:
   7  * Copyright (C) 2012 - Virtual Open Systems and Columbia University
   8  * Author: Christoffer Dall <c.dall@virtualopensystems.com>
   9  */
  10
  11 #ifndef __ARM64_KVM_HOST_H__
  12 #define __ARM64_KVM_HOST_H__
  13
  14 #include <linux/arm-smccc.h>
  15 #include <linux/bitmap.h>
  16 #include <linux/types.h>
  17 #include <linux/jump_label.h>
  18 #include <linux/kvm_types.h>
  19 #include <linux/percpu.h>
  20 #include <linux/psci.h>
  21 #include <asm/arch_gicv3.h>
  22 #include <asm/barrier.h>
  23 #include <asm/cpufeature.h>
  24 #include <asm/cputype.h>
  25 #include <asm/daifflags.h>
  26 #include <asm/fpsimd.h>
  27 #include <asm/kvm.h>
  28 #include <asm/kvm_asm.h>
  29
  30 #define __KVM_HAVE_ARCH_INTC_INITIALIZED
  31
  32 #define KVM_HALT_POLL_NS_DEFAULT 500000
  33
  34 #include <kvm/arm_vgic.h>
  35 #include <kvm/arm_arch_timer.h>
  36 #include <kvm/arm_pmu.h>
  37
  38 #define KVM_MAX_VCPUS VGIC_V3_MAX_CPUS
  39
  40 #define KVM_VCPU_MAX_FEATURES 7
  41
  42 #define KVM_REQ_SLEEP \
  43         KVM_ARCH_REQ_FLAGS(0, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
  44 #define KVM_REQ_IRQ_PENDING     KVM_ARCH_REQ(1)
  45 #define KVM_REQ_VCPU_RESET      KVM_ARCH_REQ(2)
  46 #define KVM_REQ_RECORD_STEAL    KVM_ARCH_REQ(3)
  47 #define KVM_REQ_RELOAD_GICv4    KVM_ARCH_REQ(4)
  48 #define KVM_REQ_RELOAD_PMU      KVM_ARCH_REQ(5)
  49
  50 #define KVM_DIRTY_LOG_MANUAL_CAPS   (KVM_DIRTY_LOG_MANUAL_PROTECT_ENABLE | \
  51                                      KVM_DIRTY_LOG_INITIALLY_SET)
  52
  53 #define KVM_HAVE_MMU_RWLOCK
  54
  55 /*
  56  * Mode of operation configurable with kvm-arm.mode early param.
  57  * See Documentation/admin-guide/kernel-parameters.txt for more information.
  58  */
  59 enum kvm_mode {
  60         KVM_MODE_DEFAULT,
  61         KVM_MODE_PROTECTED,
  62         KVM_MODE_NONE,
  63 };
  64 enum kvm_mode kvm_get_mode(void);
  65
  66 DECLARE_STATIC_KEY_FALSE(userspace_irqchip_in_use);
  67
  68 extern unsigned int kvm_sve_max_vl;
  69 int kvm_arm_init_sve(void);
  70
  71 u32 __attribute_const__ kvm_target_cpu(void);
  72 int kvm_reset_vcpu(struct kvm_vcpu *vcpu);
  73 void kvm_arm_vcpu_destroy(struct kvm_vcpu *vcpu);
  74
  75 struct kvm_vmid {
  76         atomic64_t id;
  77 };
  78
  79 struct kvm_s2_mmu {
  80         struct kvm_vmid vmid;
  81
  82         /*
  83          * stage2 entry level table
  84          *
  85          * Two kvm_s2_mmu structures in the same VM can point to the same
  86          * pgd here.  This happens when running a guest using a
  87          * translation regime that isn't affected by its own stage-2
  88          * translation, such as a non-VHE hypervisor running at vEL2, or
  89          * for vEL1/EL0 with vHCR_EL2.VM == 0.  In that case, we use the
  90          * canonical stage-2 page tables.
  91          */
  92         phys_addr_t     pgd_phys;
  93         struct kvm_pgtable *pgt;
  94
  95         /* The last vcpu id that ran on each physical CPU */
  96         int __percpu *last_vcpu_ran;
  97
  98         struct kvm_arch *arch;
  99 };
 100
 101 struct kvm_arch_memory_slot {
 102 };
 103
 104 struct kvm_arch {
 105         struct kvm_s2_mmu mmu;
 106
 107         /* VTCR_EL2 value for this VM */
 108         u64    vtcr;
 109
 110         /* The maximum number of vCPUs depends on the used GIC model */
 111         int max_vcpus;
 112
 113         /* Interrupt controller */
 114         struct vgic_dist        vgic;
 115
 116         /* Mandated version of PSCI */
 117         u32 psci_version;
 118
 119         /*
 120          * If we encounter a data abort without valid instruction syndrome
 121          * information, report this to user space.  User space can (and
 122          * should) opt in to this feature if KVM_CAP_ARM_NISV_TO_USER is
 123          * supported.
 124          */
 125 #define KVM_ARCH_FLAG_RETURN_NISV_IO_ABORT_TO_USER      0
 126         /* Memory Tagging Extension enabled for the guest */
 127 #define KVM_ARCH_FLAG_MTE_ENABLED                       1
 128         /* At least one vCPU has ran in the VM */
 129 #define KVM_ARCH_FLAG_HAS_RAN_ONCE                      2
 130         /*
 131          * The following two bits are used to indicate the guest's EL1
 132          * register width configuration. A value of KVM_ARCH_FLAG_EL1_32BIT
 133          * bit is valid only when KVM_ARCH_FLAG_REG_WIDTH_CONFIGURED is set.
 134          * Otherwise, the guest's EL1 register width has not yet been
 135          * determined yet.
 136          */
 137 #define KVM_ARCH_FLAG_REG_WIDTH_CONFIGURED              3
 138 #define KVM_ARCH_FLAG_EL1_32BIT                         4
 139
 140         unsigned long flags;
 141
 142         /*
 143          * VM-wide PMU filter, implemented as a bitmap and big enough for
 144          * up to 2^10 events (ARMv8.0) or 2^16 events (ARMv8.1+).
 145          */
 146         unsigned long *pmu_filter;
 147         struct arm_pmu *arm_pmu;
 148
 149         cpumask_var_t supported_cpus;
 150
 151         u8 pfr0_csv2;
 152         u8 pfr0_csv3;
 153 };
 154
 155 struct kvm_vcpu_fault_info {
 156         u32 esr_el2;            /* Hyp Syndrom Register */
 157         u64 far_el2;            /* Hyp Fault Address Register */
 158         u64 hpfar_el2;          /* Hyp IPA Fault Address Register */
 159         u64 disr_el1;           /* Deferred [SError] Status Register */
 160 };
 161
 162 enum vcpu_sysreg {
 163         __INVALID_SYSREG__,   /* 0 is reserved as an invalid value */
 164         MPIDR_EL1,      /* MultiProcessor Affinity Register */
 165         CSSELR_EL1,     /* Cache Size Selection Register */
 166         SCTLR_EL1,      /* System Control Register */
 167         ACTLR_EL1,      /* Auxiliary Control Register */
 168         CPACR_EL1,      /* Coprocessor Access Control */
 169         ZCR_EL1,        /* SVE Control */
 170         TTBR0_EL1,      /* Translation Table Base Register 0 */
 171         TTBR1_EL1,      /* Translation Table Base Register 1 */
 172         TCR_EL1,        /* Translation Control Register */
 173         ESR_EL1,        /* Exception Syndrome Register */
 174         AFSR0_EL1,      /* Auxiliary Fault Status Register 0 */
 175         AFSR1_EL1,      /* Auxiliary Fault Status Register 1 */
 176         FAR_EL1,        /* Fault Address Register */
 177         MAIR_EL1,       /* Memory Attribute Indirection Register */
 178         VBAR_EL1,       /* Vector Base Address Register */
 179         CONTEXTIDR_EL1, /* Context ID Register */
 180         TPIDR_EL0,      /* Thread ID, User R/W */
 181         TPIDRRO_EL0,    /* Thread ID, User R/O */
 182         TPIDR_EL1,      /* Thread ID, Privileged */
 183         AMAIR_EL1,      /* Aux Memory Attribute Indirection Register */
 184         CNTKCTL_EL1,    /* Timer Control Register (EL1) */
 185         PAR_EL1,        /* Physical Address Register */
 186         MDSCR_EL1,      /* Monitor Debug System Control Register */
 187         MDCCINT_EL1,    /* Monitor Debug Comms Channel Interrupt Enable Reg */
 188         OSLSR_EL1,      /* OS Lock Status Register */
 189         DISR_EL1,       /* Deferred Interrupt Status Register */
 190
 191         /* Performance Monitors Registers */
 192         PMCR_EL0,       /* Control Register */
 193         PMSELR_EL0,     /* Event Counter Selection Register */
 194         PMEVCNTR0_EL0,  /* Event Counter Register (0-30) */
 195         PMEVCNTR30_EL0 = PMEVCNTR0_EL0 + 30,
 196         PMCCNTR_EL0,    /* Cycle Counter Register */
 197         PMEVTYPER0_EL0, /* Event Type Register (0-30) */
 198         PMEVTYPER30_EL0 = PMEVTYPER0_EL0 + 30,
 199         PMCCFILTR_EL0,  /* Cycle Count Filter Register */
 200         PMCNTENSET_EL0, /* Count Enable Set Register */
 201         PMINTENSET_EL1, /* Interrupt Enable Set Register */
 202         PMOVSSET_EL0,   /* Overflow Flag Status Set Register */
 203         PMUSERENR_EL0,  /* User Enable Register */
 204
 205         /* Pointer Authentication Registers in a strict increasing order. */
 206         APIAKEYLO_EL1,
 207         APIAKEYHI_EL1,
 208         APIBKEYLO_EL1,
 209         APIBKEYHI_EL1,
 210         APDAKEYLO_EL1,
 211         APDAKEYHI_EL1,
 212         APDBKEYLO_EL1,
 213         APDBKEYHI_EL1,
 214         APGAKEYLO_EL1,
 215         APGAKEYHI_EL1,
 216
 217         ELR_EL1,
 218         SP_EL1,
 219         SPSR_EL1,
 220
 221         CNTVOFF_EL2,
 222         CNTV_CVAL_EL0,
 223         CNTV_CTL_EL0,
 224         CNTP_CVAL_EL0,
 225         CNTP_CTL_EL0,
 226
 227         /* Memory Tagging Extension registers */
 228         RGSR_EL1,       /* Random Allocation Tag Seed Register */
 229         GCR_EL1,        /* Tag Control Register */
 230         TFSR_EL1,       /* Tag Fault Status Register (EL1) */
 231         TFSRE0_EL1,     /* Tag Fault Status Register (EL0) */
 232
 233         /* 32bit specific registers. Keep them at the end of the range */
 234         DACR32_EL2,     /* Domain Access Control Register */
 235         IFSR32_EL2,     /* Instruction Fault Status Register */
 236         FPEXC32_EL2,    /* Floating-Point Exception Control Register */
 237         DBGVCR32_EL2,   /* Debug Vector Catch Register */
 238
 239         NR_SYS_REGS     /* Nothing after this line! */
 240 };
 241
 242 struct kvm_cpu_context {
 243         struct user_pt_regs regs;       /* sp = sp_el0 */
 244
 245         u64     spsr_abt;
 246         u64     spsr_und;
 247         u64     spsr_irq;
 248         u64     spsr_fiq;
 249
 250         struct user_fpsimd_state fp_regs;
 251
 252         u64 sys_regs[NR_SYS_REGS];
 253
 254         struct kvm_vcpu *__hyp_running_vcpu;
 255 };
 256
 257 struct kvm_pmu_events {
 258         u32 events_host;
 259         u32 events_guest;
 260 };
 261
 262 struct kvm_host_data {
 263         struct kvm_cpu_context host_ctxt;
 264         struct kvm_pmu_events pmu_events;
 265 };
 266
 267 struct kvm_host_psci_config {
 268         /* PSCI version used by host. */
 269         u32 version;
 270
 271         /* Function IDs used by host if version is v0.1. */
 272         struct psci_0_1_function_ids function_ids_0_1;
 273
 274         bool psci_0_1_cpu_suspend_implemented;
 275         bool psci_0_1_cpu_on_implemented;
 276         bool psci_0_1_cpu_off_implemented;
 277         bool psci_0_1_migrate_implemented;
 278 };
 279
 280 extern struct kvm_host_psci_config kvm_nvhe_sym(kvm_host_psci_config);
 281 #define kvm_host_psci_config CHOOSE_NVHE_SYM(kvm_host_psci_config)
 282
 283 extern s64 kvm_nvhe_sym(hyp_physvirt_offset);
 284 #define hyp_physvirt_offset CHOOSE_NVHE_SYM(hyp_physvirt_offset)
 285
 286 extern u64 kvm_nvhe_sym(hyp_cpu_logical_map)[NR_CPUS];
 287 #define hyp_cpu_logical_map CHOOSE_NVHE_SYM(hyp_cpu_logical_map)
 288
 289 struct vcpu_reset_state {
 290         unsigned long   pc;
 291         unsigned long   r0;
 292         bool            be;
 293         bool            reset;
 294 };
 295
 296 struct kvm_vcpu_arch {
 297         struct kvm_cpu_context ctxt;
 298         void *sve_state;
 299         unsigned int sve_max_vl;
 300
 301         /* Stage 2 paging state used by the hardware on next switch */
 302         struct kvm_s2_mmu *hw_mmu;
 303
 304         /* Values of trap registers for the guest. */
 305         u64 hcr_el2;
 306         u64 mdcr_el2;
 307         u64 cptr_el2;
 308
 309         /* Values of trap registers for the host before guest entry. */
 310         u64 mdcr_el2_host;
 311
 312         /* Exception Information */
 313         struct kvm_vcpu_fault_info fault;
 314
 315         /* Miscellaneous vcpu state flags */
 316         u64 flags;
 317
 318         /*
 319          * We maintain more than a single set of debug registers to support
 320          * debugging the guest from the host and to maintain separate host and
 321          * guest state during world switches. vcpu_debug_state are the debug
 322          * registers of the vcpu as the guest sees them.  host_debug_state are
 323          * the host registers which are saved and restored during
 324          * world switches. external_debug_state contains the debug
 325          * values we want to debug the guest. This is set via the
 326          * KVM_SET_GUEST_DEBUG ioctl.
 327          *
 328          * debug_ptr points to the set of debug registers that should be loaded
 329          * onto the hardware when running the guest.
 330          */
 331         struct kvm_guest_debug_arch *debug_ptr;
 332         struct kvm_guest_debug_arch vcpu_debug_state;
 333         struct kvm_guest_debug_arch external_debug_state;
 334
 335         struct user_fpsimd_state *host_fpsimd_state;    /* hyp VA */
 336         struct task_struct *parent_task;
 337
 338         struct {
 339                 /* {Break,watch}point registers */
 340                 struct kvm_guest_debug_arch regs;
 341                 /* Statistical profiling extension */
 342                 u64 pmscr_el1;
 343                 /* Self-hosted trace */
 344                 u64 trfcr_el1;
 345         } host_debug_state;
 346
 347         /* VGIC state */
 348         struct vgic_cpu vgic_cpu;
 349         struct arch_timer_cpu timer_cpu;
 350         struct kvm_pmu pmu;
 351
 352         /*
 353          * Anything that is not used directly from assembly code goes
 354          * here.
 355          */
 356
 357         /*
 358          * Guest registers we preserve during guest debugging.
 359          *
 360          * These shadow registers are updated by the kvm_handle_sys_reg
 361          * trap handler if the guest accesses or updates them while we
 362          * are using guest debug.
 363          */
 364         struct {
 365                 u32     mdscr_el1;
 366         } guest_debug_preserved;
 367
 368         /* vcpu power-off state */
 369         bool power_off;
 370
 371         /* Don't run the guest (internal implementation need) */
 372         bool pause;
 373
 374         /* Cache some mmu pages needed inside spinlock regions */
 375         struct kvm_mmu_memory_cache mmu_page_cache;
 376
 377         /* Target CPU and feature flags */
 378         int target;
 379         DECLARE_BITMAP(features, KVM_VCPU_MAX_FEATURES);
 380
 381         /* Virtual SError ESR to restore when HCR_EL2.VSE is set */
 382         u64 vsesr_el2;
 383
 384         /* Additional reset state */
 385         struct vcpu_reset_state reset_state;
 386
 387         /* True when deferrable sysregs are loaded on the physical CPU,
 388          * see kvm_vcpu_load_sysregs_vhe and kvm_vcpu_put_sysregs_vhe. */
 389         bool sysregs_loaded_on_cpu;
 390
 391         /* Guest PV state */
 392         struct {
 393                 u64 last_steal;
 394                 gpa_t base;
 395         } steal;
 396 };
 397
 398 /* Pointer to the vcpu's SVE FFR for sve_{save,load}_state() */
 399 #define vcpu_sve_pffr(vcpu) (kern_hyp_va((vcpu)->arch.sve_state) +      \
 400                              sve_ffr_offset((vcpu)->arch.sve_max_vl))
 401
 402 #define vcpu_sve_max_vq(vcpu)   sve_vq_from_vl((vcpu)->arch.sve_max_vl)
 403
 404 #define vcpu_sve_state_size(vcpu) ({                                    \
 405         size_t __size_ret;                                              \
 406         unsigned int __vcpu_vq;                                         \
 407                                                                         \
 408         if (WARN_ON(!sve_vl_valid((vcpu)->arch.sve_max_vl))) {          \
 409                 __size_ret = 0;                                         \
 410         } else {                                                        \
 411                 __vcpu_vq = vcpu_sve_max_vq(vcpu);                      \
 412                 __size_ret = SVE_SIG_REGS_SIZE(__vcpu_vq);              \
 413         }                                                               \
 414                                                                         \
 415         __size_ret;                                                     \
 416 })
 417
 418 /* vcpu_arch flags field values: */
 419 #define KVM_ARM64_DEBUG_DIRTY           (1 << 0)
 420 #define KVM_ARM64_FP_ENABLED            (1 << 1) /* guest FP regs loaded */
 421 #define KVM_ARM64_FP_HOST               (1 << 2) /* host FP regs loaded */
 422 #define KVM_ARM64_HOST_SVE_ENABLED      (1 << 4) /* SVE enabled for EL0 */
 423 #define KVM_ARM64_GUEST_HAS_SVE         (1 << 5) /* SVE exposed to guest */
 424 #define KVM_ARM64_VCPU_SVE_FINALIZED    (1 << 6) /* SVE config completed */
 425 #define KVM_ARM64_GUEST_HAS_PTRAUTH     (1 << 7) /* PTRAUTH exposed to guest */
 426 #define KVM_ARM64_PENDING_EXCEPTION     (1 << 8) /* Exception pending */
 427 /*
 428  * Overlaps with KVM_ARM64_EXCEPT_MASK on purpose so that it can't be
 429  * set together with an exception...
 430  */
 431 #define KVM_ARM64_INCREMENT_PC          (1 << 9) /* Increment PC */
 432 #define KVM_ARM64_EXCEPT_MASK           (7 << 9) /* Target EL/MODE */
 433 /*
 434  * When KVM_ARM64_PENDING_EXCEPTION is set, KVM_ARM64_EXCEPT_MASK can
 435  * take the following values:
 436  *
 437  * For AArch32 EL1:
 438  */
 439 #define KVM_ARM64_EXCEPT_AA32_UND       (0 << 9)
 440 #define KVM_ARM64_EXCEPT_AA32_IABT      (1 << 9)
 441 #define KVM_ARM64_EXCEPT_AA32_DABT      (2 << 9)
 442 /* For AArch64: */
 443 #define KVM_ARM64_EXCEPT_AA64_ELx_SYNC  (0 << 9)
 444 #define KVM_ARM64_EXCEPT_AA64_ELx_IRQ   (1 << 9)
 445 #define KVM_ARM64_EXCEPT_AA64_ELx_FIQ   (2 << 9)
 446 #define KVM_ARM64_EXCEPT_AA64_ELx_SERR  (3 << 9)
 447 #define KVM_ARM64_EXCEPT_AA64_EL1       (0 << 11)
 448 #define KVM_ARM64_EXCEPT_AA64_EL2       (1 << 11)
 449
 450 #define KVM_ARM64_DEBUG_STATE_SAVE_SPE  (1 << 12) /* Save SPE context if active  */
 451 #define KVM_ARM64_DEBUG_STATE_SAVE_TRBE (1 << 13) /* Save TRBE context if active  */
 452 #define KVM_ARM64_FP_FOREIGN_FPSTATE    (1 << 14)
 453 #define KVM_ARM64_ON_UNSUPPORTED_CPU    (1 << 15) /* Physical CPU not in supported_cpus */
 454
 455 #define KVM_GUESTDBG_VALID_MASK (KVM_GUESTDBG_ENABLE | \
 456                                  KVM_GUESTDBG_USE_SW_BP | \
 457                                  KVM_GUESTDBG_USE_HW | \
 458                                  KVM_GUESTDBG_SINGLESTEP)
 459
 460 #define vcpu_has_sve(vcpu) (system_supports_sve() &&                    \
 461                             ((vcpu)->arch.flags & KVM_ARM64_GUEST_HAS_SVE))
 462
 463 #ifdef CONFIG_ARM64_PTR_AUTH
 464 #define vcpu_has_ptrauth(vcpu)                                          \
 465         ((cpus_have_final_cap(ARM64_HAS_ADDRESS_AUTH) ||                \
 466           cpus_have_final_cap(ARM64_HAS_GENERIC_AUTH)) &&               \
 467          (vcpu)->arch.flags & KVM_ARM64_GUEST_HAS_PTRAUTH)
 468 #else
 469 #define vcpu_has_ptrauth(vcpu)          false
 470 #endif
 471
 472 #define vcpu_on_unsupported_cpu(vcpu)                                   \
 473         ((vcpu)->arch.flags & KVM_ARM64_ON_UNSUPPORTED_CPU)
 474
 475 #define vcpu_set_on_unsupported_cpu(vcpu)                               \
 476         ((vcpu)->arch.flags |= KVM_ARM64_ON_UNSUPPORTED_CPU)
 477
 478 #define vcpu_clear_on_unsupported_cpu(vcpu)                             \
 479         ((vcpu)->arch.flags &= ~KVM_ARM64_ON_UNSUPPORTED_CPU)
 480
 481 #define vcpu_gp_regs(v)         (&(v)->arch.ctxt.regs)
 482
 483 /*
 484  * Only use __vcpu_sys_reg/ctxt_sys_reg if you know you want the
 485  * memory backed version of a register, and not the one most recently
 486  * accessed by a running VCPU.  For example, for userspace access or
 487  * for system registers that are never context switched, but only
 488  * emulated.
 489  */
 490 #define __ctxt_sys_reg(c,r)     (&(c)->sys_regs[(r)])
 491
 492 #define ctxt_sys_reg(c,r)       (*__ctxt_sys_reg(c,r))
 493
 494 #define __vcpu_sys_reg(v,r)     (ctxt_sys_reg(&(v)->arch.ctxt, (r)))
 495
 496 u64 vcpu_read_sys_reg(const struct kvm_vcpu *vcpu, int reg);
 497 void vcpu_write_sys_reg(struct kvm_vcpu *vcpu, u64 val, int reg);
 498
 499 static inline bool __vcpu_read_sys_reg_from_cpu(int reg, u64 *val)
 500 {
 501         /*
 502          * *** VHE ONLY ***
 503          *
 504          * System registers listed in the switch are not saved on every
 505          * exit from the guest but are only saved on vcpu_put.
 506          *
 507          * Note that MPIDR_EL1 for the guest is set by KVM via VMPIDR_EL2 but
 508          * should never be listed below, because the guest cannot modify its
 509          * own MPIDR_EL1 and MPIDR_EL1 is accessed for VCPU A from VCPU B's
 510          * thread when emulating cross-VCPU communication.
 511          */
 512         if (!has_vhe())
 513                 return false;
 514
 515         switch (reg) {
 516         case CSSELR_EL1:        *val = read_sysreg_s(SYS_CSSELR_EL1);   break;
 517         case SCTLR_EL1:         *val = read_sysreg_s(SYS_SCTLR_EL12);   break;
 518         case CPACR_EL1:         *val = read_sysreg_s(SYS_CPACR_EL12);   break;
 519         case TTBR0_EL1:         *val = read_sysreg_s(SYS_TTBR0_EL12);   break;
 520         case TTBR1_EL1:         *val = read_sysreg_s(SYS_TTBR1_EL12);   break;
 521         case TCR_EL1:           *val = read_sysreg_s(SYS_TCR_EL12);     break;
 522         case ESR_EL1:           *val = read_sysreg_s(SYS_ESR_EL12);     break;
 523         case AFSR0_EL1:         *val = read_sysreg_s(SYS_AFSR0_EL12);   break;
 524         case AFSR1_EL1:         *val = read_sysreg_s(SYS_AFSR1_EL12);   break;
 525         case FAR_EL1:           *val = read_sysreg_s(SYS_FAR_EL12);     break;
 526         case MAIR_EL1:          *val = read_sysreg_s(SYS_MAIR_EL12);    break;
 527         case VBAR_EL1:          *val = read_sysreg_s(SYS_VBAR_EL12);    break;
 528         case CONTEXTIDR_EL1:    *val = read_sysreg_s(SYS_CONTEXTIDR_EL12);break;
 529         case TPIDR_EL0:         *val = read_sysreg_s(SYS_TPIDR_EL0);    break;
 530         case TPIDRRO_EL0:       *val = read_sysreg_s(SYS_TPIDRRO_EL0);  break;
 531         case TPIDR_EL1:         *val = read_sysreg_s(SYS_TPIDR_EL1);    break;
 532         case AMAIR_EL1:         *val = read_sysreg_s(SYS_AMAIR_EL12);   break;
 533         case CNTKCTL_EL1:       *val = read_sysreg_s(SYS_CNTKCTL_EL12); break;
 534         case ELR_EL1:           *val = read_sysreg_s(SYS_ELR_EL12);     break;
 535         case PAR_EL1:           *val = read_sysreg_par();               break;
 536         case DACR32_EL2:        *val = read_sysreg_s(SYS_DACR32_EL2);   break;
 537         case IFSR32_EL2:        *val = read_sysreg_s(SYS_IFSR32_EL2);   break;
 538         case DBGVCR32_EL2:      *val = read_sysreg_s(SYS_DBGVCR32_EL2); break;
 539         default:                return false;
 540         }
 541
 542         return true;
 543 }
 544
 545 static inline bool __vcpu_write_sys_reg_to_cpu(u64 val, int reg)
 546 {
 547         /*
 548          * *** VHE ONLY ***
 549          *
 550          * System registers listed in the switch are not restored on every
 551          * entry to the guest but are only restored on vcpu_load.
 552          *
 553          * Note that MPIDR_EL1 for the guest is set by KVM via VMPIDR_EL2 but
 554          * should never be listed below, because the MPIDR should only be set
 555          * once, before running the VCPU, and never changed later.
 556          */
 557         if (!has_vhe())
 558                 return false;
 559
 560         switch (reg) {
 561         case CSSELR_EL1:        write_sysreg_s(val, SYS_CSSELR_EL1);    break;
 562         case SCTLR_EL1:         write_sysreg_s(val, SYS_SCTLR_EL12);    break;
 563         case CPACR_EL1:         write_sysreg_s(val, SYS_CPACR_EL12);    break;
 564         case TTBR0_EL1:         write_sysreg_s(val, SYS_TTBR0_EL12);    break;
 565         case TTBR1_EL1:         write_sysreg_s(val, SYS_TTBR1_EL12);    break;
 566         case TCR_EL1:           write_sysreg_s(val, SYS_TCR_EL12);      break;
 567         case ESR_EL1:           write_sysreg_s(val, SYS_ESR_EL12);      break;
 568         case AFSR0_EL1:         write_sysreg_s(val, SYS_AFSR0_EL12);    break;
 569         case AFSR1_EL1:         write_sysreg_s(val, SYS_AFSR1_EL12);    break;
 570         case FAR_EL1:           write_sysreg_s(val, SYS_FAR_EL12);      break;
 571         case MAIR_EL1:          write_sysreg_s(val, SYS_MAIR_EL12);     break;
 572         case VBAR_EL1:          write_sysreg_s(val, SYS_VBAR_EL12);     break;
 573         case CONTEXTIDR_EL1:    write_sysreg_s(val, SYS_CONTEXTIDR_EL12);break;
 574         case TPIDR_EL0:         write_sysreg_s(val, SYS_TPIDR_EL0);     break;
 575         case TPIDRRO_EL0:       write_sysreg_s(val, SYS_TPIDRRO_EL0);   break;
 576         case TPIDR_EL1:         write_sysreg_s(val, SYS_TPIDR_EL1);     break;
 577         case AMAIR_EL1:         write_sysreg_s(val, SYS_AMAIR_EL12);    break;
 578         case CNTKCTL_EL1:       write_sysreg_s(val, SYS_CNTKCTL_EL12);  break;
 579         case ELR_EL1:           write_sysreg_s(val, SYS_ELR_EL12);      break;
 580         case PAR_EL1:           write_sysreg_s(val, SYS_PAR_EL1);       break;
 581         case DACR32_EL2:        write_sysreg_s(val, SYS_DACR32_EL2);    break;
 582         case IFSR32_EL2:        write_sysreg_s(val, SYS_IFSR32_EL2);    break;
 583         case DBGVCR32_EL2:      write_sysreg_s(val, SYS_DBGVCR32_EL2);  break;
 584         default:                return false;
 585         }
 586
 587         return true;
 588 }
 589
 590 struct kvm_vm_stat {
 591         struct kvm_vm_stat_generic generic;
 592 };
 593
 594 struct kvm_vcpu_stat {
 595         struct kvm_vcpu_stat_generic generic;
 596         u64 hvc_exit_stat;
 597         u64 wfe_exit_stat;
 598         u64 wfi_exit_stat;
 599         u64 mmio_exit_user;
 600         u64 mmio_exit_kernel;
 601         u64 signal_exits;
 602         u64 exits;
 603 };
 604
 605 void kvm_vcpu_preferred_target(struct kvm_vcpu_init *init);
 606 unsigned long kvm_arm_num_regs(struct kvm_vcpu *vcpu);
 607 int kvm_arm_copy_reg_indices(struct kvm_vcpu *vcpu, u64 __user *indices);
 608 int kvm_arm_get_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg);
 609 int kvm_arm_set_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg);
 610
 611 unsigned long kvm_arm_num_sys_reg_descs(struct kvm_vcpu *vcpu);
 612 int kvm_arm_copy_sys_reg_indices(struct kvm_vcpu *vcpu, u64 __user *uindices);
 613 int kvm_arm_sys_reg_get_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *);
 614 int kvm_arm_sys_reg_set_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *);
 615
 616 int __kvm_arm_vcpu_get_events(struct kvm_vcpu *vcpu,
 617                               struct kvm_vcpu_events *events);
 618
 619 int __kvm_arm_vcpu_set_events(struct kvm_vcpu *vcpu,
 620                               struct kvm_vcpu_events *events);
 621
 622 #define KVM_ARCH_WANT_MMU_NOTIFIER
 623
 624 void kvm_arm_halt_guest(struct kvm *kvm);
 625 void kvm_arm_resume_guest(struct kvm *kvm);
 626
 627 #define vcpu_has_run_once(vcpu) !!rcu_access_pointer((vcpu)->pid)
 628
 629 #ifndef __KVM_NVHE_HYPERVISOR__
 630 #define kvm_call_hyp_nvhe(f, ...)                                               \
 631         ({                                                              \
 632                 struct arm_smccc_res res;                               \
 633                                                                         \
 634                 arm_smccc_1_1_hvc(KVM_HOST_SMCCC_FUNC(f),               \
 635                                   ##__VA_ARGS__, &res);                 \
 636                 WARN_ON(res.a0 != SMCCC_RET_SUCCESS);                   \
 637                                                                         \
 638                 res.a1;                                                 \
 639         })
 640
 641 /*
 642  * The couple of isb() below are there to guarantee the same behaviour
 643  * on VHE as on !VHE, where the eret to EL1 acts as a context
 644  * synchronization event.
 645  */
 646 #define kvm_call_hyp(f, ...)                                            \
 647         do {                                                            \
 648                 if (has_vhe()) {                                        \
 649                         f(__VA_ARGS__);                                 \
 650                         isb();                                          \
 651                 } else {                                                \
 652                         kvm_call_hyp_nvhe(f, ##__VA_ARGS__);            \
 653                 }                                                       \
 654         } while(0)
 655
 656 #define kvm_call_hyp_ret(f, ...)                                        \
 657         ({                                                              \
 658                 typeof(f(__VA_ARGS__)) ret;                             \
 659                                                                         \
 660                 if (has_vhe()) {                                        \
 661                         ret = f(__VA_ARGS__);                           \
 662                         isb();                                          \
 663                 } else {                                                \
 664                         ret = kvm_call_hyp_nvhe(f, ##__VA_ARGS__);      \
 665                 }                                                       \
 666                                                                         \
 667                 ret;                                                    \
 668         })
 669 #else /* __KVM_NVHE_HYPERVISOR__ */
 670 #define kvm_call_hyp(f, ...) f(__VA_ARGS__)
 671 #define kvm_call_hyp_ret(f, ...) f(__VA_ARGS__)
 672 #define kvm_call_hyp_nvhe(f, ...) f(__VA_ARGS__)
 673 #endif /* __KVM_NVHE_HYPERVISOR__ */
 674
 675 void force_vm_exit(const cpumask_t *mask);
 676
 677 int handle_exit(struct kvm_vcpu *vcpu, int exception_index);
 678 void handle_exit_early(struct kvm_vcpu *vcpu, int exception_index);
 679
 680 int kvm_handle_cp14_load_store(struct kvm_vcpu *vcpu);
 681 int kvm_handle_cp14_32(struct kvm_vcpu *vcpu);
 682 int kvm_handle_cp14_64(struct kvm_vcpu *vcpu);
 683 int kvm_handle_cp15_32(struct kvm_vcpu *vcpu);
 684 int kvm_handle_cp15_64(struct kvm_vcpu *vcpu);
 685 int kvm_handle_sys_reg(struct kvm_vcpu *vcpu);
 686
 687 void kvm_reset_sys_regs(struct kvm_vcpu *vcpu);
 688
 689 void kvm_sys_reg_table_init(void);
 690
 691 /* MMIO helpers */
 692 void kvm_mmio_write_buf(void *buf, unsigned int len, unsigned long data);
 693 unsigned long kvm_mmio_read_buf(const void *buf, unsigned int len);
 694
 695 int kvm_handle_mmio_return(struct kvm_vcpu *vcpu);
 696 int io_mem_abort(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa);
 697
 698 /*
 699  * Returns true if a Performance Monitoring Interrupt (PMI), a.k.a. perf event,
 700  * arrived in guest context.  For arm64, any event that arrives while a vCPU is
 701  * loaded is considered to be "in guest".
 702  */
 703 static inline bool kvm_arch_pmi_in_guest(struct kvm_vcpu *vcpu)
 704 {
 705         return IS_ENABLED(CONFIG_GUEST_PERF_EVENTS) && !!vcpu;
 706 }
 707
 708 long kvm_hypercall_pv_features(struct kvm_vcpu *vcpu);
 709 gpa_t kvm_init_stolen_time(struct kvm_vcpu *vcpu);
 710 void kvm_update_stolen_time(struct kvm_vcpu *vcpu);
 711
 712 bool kvm_arm_pvtime_supported(void);
 713 int kvm_arm_pvtime_set_attr(struct kvm_vcpu *vcpu,
 714                             struct kvm_device_attr *attr);
 715 int kvm_arm_pvtime_get_attr(struct kvm_vcpu *vcpu,
 716                             struct kvm_device_attr *attr);
 717 int kvm_arm_pvtime_has_attr(struct kvm_vcpu *vcpu,
 718                             struct kvm_device_attr *attr);
 719
 720 extern unsigned int kvm_arm_vmid_bits;
 721 int kvm_arm_vmid_alloc_init(void);
 722 void kvm_arm_vmid_alloc_free(void);
 723 void kvm_arm_vmid_update(struct kvm_vmid *kvm_vmid);
 724 void kvm_arm_vmid_clear_active(void);
 725
 726 static inline void kvm_arm_pvtime_vcpu_init(struct kvm_vcpu_arch *vcpu_arch)
 727 {
 728         vcpu_arch->steal.base = GPA_INVALID;
 729 }
 730
 731 static inline bool kvm_arm_is_pvtime_enabled(struct kvm_vcpu_arch *vcpu_arch)
 732 {
 733         return (vcpu_arch->steal.base != GPA_INVALID);
 734 }
 735
 736 void kvm_set_sei_esr(struct kvm_vcpu *vcpu, u64 syndrome);
 737
 738 struct kvm_vcpu *kvm_mpidr_to_vcpu(struct kvm *kvm, unsigned long mpidr);
 739
 740 DECLARE_KVM_HYP_PER_CPU(struct kvm_host_data, kvm_host_data);
 741
 742 static inline void kvm_init_host_cpu_context(struct kvm_cpu_context *cpu_ctxt)
 743 {
 744         /* The host's MPIDR is immutable, so let's set it up at boot time */
 745         ctxt_sys_reg(cpu_ctxt, MPIDR_EL1) = read_cpuid_mpidr();
 746 }
 747
 748 static inline bool kvm_system_needs_idmapped_vectors(void)
 749 {
 750         return cpus_have_const_cap(ARM64_SPECTRE_V3A);
 751 }
 752
 753 void kvm_arm_vcpu_ptrauth_trap(struct kvm_vcpu *vcpu);
 754
 755 static inline void kvm_arch_hardware_unsetup(void) {}
 756 static inline void kvm_arch_sync_events(struct kvm *kvm) {}
 757 static inline void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu) {}
 758
 759 void kvm_arm_init_debug(void);
 760 void kvm_arm_vcpu_init_debug(struct kvm_vcpu *vcpu);
 761 void kvm_arm_setup_debug(struct kvm_vcpu *vcpu);
 762 void kvm_arm_clear_debug(struct kvm_vcpu *vcpu);
 763 void kvm_arm_reset_debug_ptr(struct kvm_vcpu *vcpu);
 764
 765 #define kvm_vcpu_os_lock_enabled(vcpu)          \
 766         (!!(__vcpu_sys_reg(vcpu, OSLSR_EL1) & SYS_OSLSR_OSLK))
 767
 768 int kvm_arm_vcpu_arch_set_attr(struct kvm_vcpu *vcpu,
 769                                struct kvm_device_attr *attr);
 770 int kvm_arm_vcpu_arch_get_attr(struct kvm_vcpu *vcpu,
 771                                struct kvm_device_attr *attr);
 772 int kvm_arm_vcpu_arch_has_attr(struct kvm_vcpu *vcpu,
 773                                struct kvm_device_attr *attr);
 774
 775 long kvm_vm_ioctl_mte_copy_tags(struct kvm *kvm,
 776                                 struct kvm_arm_copy_mte_tags *copy_tags);
 777
 778 /* Guest/host FPSIMD coordination helpers */
 779 int kvm_arch_vcpu_run_map_fp(struct kvm_vcpu *vcpu);
 780 void kvm_arch_vcpu_load_fp(struct kvm_vcpu *vcpu);
 781 void kvm_arch_vcpu_ctxflush_fp(struct kvm_vcpu *vcpu);
 782 void kvm_arch_vcpu_ctxsync_fp(struct kvm_vcpu *vcpu);
 783 void kvm_arch_vcpu_put_fp(struct kvm_vcpu *vcpu);
 784 void kvm_vcpu_unshare_task_fp(struct kvm_vcpu *vcpu);
 785
 786 static inline bool kvm_pmu_counter_deferred(struct perf_event_attr *attr)
 787 {
 788         return (!has_vhe() && attr->exclude_host);
 789 }
 790
 791 /* Flags for host debug state */
 792 void kvm_arch_vcpu_load_debug_state_flags(struct kvm_vcpu *vcpu);
 793 void kvm_arch_vcpu_put_debug_state_flags(struct kvm_vcpu *vcpu);
 794
 795 #ifdef CONFIG_KVM
 796 void kvm_set_pmu_events(u32 set, struct perf_event_attr *attr);
 797 void kvm_clr_pmu_events(u32 clr);
 798
 799 void kvm_vcpu_pmu_restore_guest(struct kvm_vcpu *vcpu);
 800 void kvm_vcpu_pmu_restore_host(struct kvm_vcpu *vcpu);
 801 #else
 802 static inline void kvm_set_pmu_events(u32 set, struct perf_event_attr *attr) {}
 803 static inline void kvm_clr_pmu_events(u32 clr) {}
 804 #endif
 805
 806 void kvm_vcpu_load_sysregs_vhe(struct kvm_vcpu *vcpu);
 807 void kvm_vcpu_put_sysregs_vhe(struct kvm_vcpu *vcpu);
 808
 809 int kvm_set_ipa_limit(void);
 810
 811 #define __KVM_HAVE_ARCH_VM_ALLOC
 812 struct kvm *kvm_arch_alloc_vm(void);
 813
 814 int kvm_arm_setup_stage2(struct kvm *kvm, unsigned long type);
 815
 816 static inline bool kvm_vm_is_protected(struct kvm *kvm)
 817 {
 818         return false;
 819 }
 820
 821 void kvm_init_protected_traps(struct kvm_vcpu *vcpu);
 822
 823 int kvm_arm_vcpu_finalize(struct kvm_vcpu *vcpu, int feature);
 824 bool kvm_arm_vcpu_is_finalized(struct kvm_vcpu *vcpu);
 825
 826 #define kvm_arm_vcpu_sve_finalized(vcpu) \
 827         ((vcpu)->arch.flags & KVM_ARM64_VCPU_SVE_FINALIZED)
 828
 829 #define kvm_has_mte(kvm)                                        \
 830         (system_supports_mte() &&                               \
 831          test_bit(KVM_ARCH_FLAG_MTE_ENABLED, &(kvm)->arch.flags))
 832 #define kvm_vcpu_has_pmu(vcpu)                                  \
 833         (test_bit(KVM_ARM_VCPU_PMU_V3, (vcpu)->arch.features))
 834
 835 int kvm_trng_call(struct kvm_vcpu *vcpu);
 836 #ifdef CONFIG_KVM
 837 extern phys_addr_t hyp_mem_base;
 838 extern phys_addr_t hyp_mem_size;
 839 void __init kvm_hyp_reserve(void);
 840 #else
 841 static inline void kvm_hyp_reserve(void) { }
 842 #endif
 843
 844 #endif /* __ARM64_KVM_HOST_H__ */