1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright (c) 2023 Edgeble AI Technologies Pvt. Ltd.
6 #include <dt-bindings/gpio/gpio.h>
10 stdout-path = "serial2:1500000n8";
13 vcc3v3_pcie2x1l0: vcc3v3-pcie2x1l0-regulator {
14 compatible = "regulator-fixed";
15 regulator-name = "vcc3v3_pcie2x1l0";
16 regulator-min-microvolt = <3300000>;
17 regulator-max-microvolt = <3300000>;
18 startup-delay-us = <5000>;
19 vin-supply = <&vcc_3v3_s3>;
22 vcc3v3_pcie3x2: vcc3v3-pcie3x2-regulator {
23 compatible = "regulator-fixed";
25 gpios = <&gpio2 RK_PC4 GPIO_ACTIVE_HIGH>; /* PCIE_4G_PWEN */
26 pinctrl-names = "default";
27 pinctrl-0 = <&pcie3x2_vcc3v3_en>;
28 regulator-name = "vcc3v3_pcie3x2";
29 regulator-min-microvolt = <3300000>;
30 regulator-max-microvolt = <3300000>;
31 startup-delay-us = <5000>;
32 vin-supply = <&vcc5v0_sys>;
35 vcc3v3_pcie3x4: vcc3v3-pcie3x4-regulator {
36 compatible = "regulator-fixed";
38 gpios = <&gpio2 RK_PC5 GPIO_ACTIVE_HIGH>; /* PCIE30x4_PWREN_H */
39 pinctrl-names = "default";
40 pinctrl-0 = <&pcie3x4_vcc3v3_en>;
41 regulator-name = "vcc3v3_pcie3x4";
42 regulator-min-microvolt = <3300000>;
43 regulator-max-microvolt = <3300000>;
44 startup-delay-us = <5000>;
45 vin-supply = <&vcc5v0_sys>;
48 vcc5v0_host: vcc5v0-host-regulator {
49 compatible = "regulator-fixed";
51 gpio = <&gpio3 RK_PC7 GPIO_ACTIVE_HIGH>;
52 pinctrl-names = "default";
53 pinctrl-0 = <&vcc5v0_host_en>;
54 regulator-name = "vcc5v0_host";
55 regulator-min-microvolt = <5000000>;
56 regulator-max-microvolt = <5000000>;
59 vin-supply = <&vcc5v0_sys>;
75 compatible = "haoyu,hym8563";
77 interrupt-parent = <&gpio0>;
78 interrupts = <RK_PB0 IRQ_TYPE_LEVEL_LOW>;
80 clock-output-names = "hym8563";
81 pinctrl-names = "default";
82 pinctrl-0 = <&hym8563_int>;
89 pinctrl-names = "default";
90 pinctrl-0 = <&pcie2_0_rst>;
91 reset-gpios = <&gpio4 RK_PA5 GPIO_ACTIVE_HIGH>; /* PCIE20_1_PERST_L */
92 vpcie3v3-supply = <&vcc3v3_pcie2x1l0>;
100 /* B-Key and E-Key */
102 pinctrl-names = "default";
103 pinctrl-0 = <&pcie3x2_rst>;
104 reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>; /* PCIE30X4_PERSTn_M1_L */
105 vpcie3v3-supply = <&vcc3v3_pcie3x2>;
111 pinctrl-names = "default";
112 pinctrl-0 = <&pcie3x4_rst>;
113 reset-gpios = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>; /* PCIE30X2_PERSTn_M1_L */
114 vpcie3v3-supply = <&vcc3v3_pcie3x4>;
120 pcie2_0_rst: pcie2-0-rst {
121 rockchip,pins = <4 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
126 pcie3x2_rst: pcie3x2-rst {
127 rockchip,pins = <4 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
130 pcie3x2_vcc3v3_en: pcie3x2-vcc3v3-en {
131 rockchip,pins = <2 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>;
134 pcie3x4_rst: pcie3x4-rst {
135 rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
138 pcie3x4_vcc3v3_en: pcie3x4-vcc3v3-en {
139 rockchip,pins = <2 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
144 hym8563_int: hym8563-int {
145 rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
150 vcc5v0_host_en: vcc5v0-host-en {
151 rockchip,pins = <3 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>;
158 pinctrl-0 = <&pwm2m1_pins>;
159 pinctrl-names = "default";
175 vmmc-supply = <&vcc_3v3_s3>;
176 vqmmc-supply = <&vccio_sd_s0>;
181 pinctrl-0 = <&uart2m0_xfer>;
187 pinctrl-0 = <&uart6m0_xfer>;
188 pinctrl-names = "default";
194 pinctrl-0 = <&uart7m2_xfer>;
195 pinctrl-names = "default";
204 /* connected to USB hub, which is powered by vcc5v0_sys */
205 phy-supply = <&vcc5v0_sys>;
214 phy-supply = <&vcc5v0_host>;