arch/arm64/boot/dts/renesas/r8a77995-draak.dts

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Device Tree Source for the Draak board
   4  *
   5  * Copyright (C) 2016-2018 Renesas Electronics Corp.
   6  * Copyright (C) 2017 Glider bvba
   7  */
   8
   9 /dts-v1/;
  10 #include "r8a77995.dtsi"
  11 #include <dt-bindings/gpio/gpio.h>
  12 #include <dt-bindings/input/input.h>
  13
  14 / {
  15         model = "Renesas Draak board based on r8a77995";
  16         compatible = "renesas,draak", "renesas,r8a77995";
  17
  18         aliases {
  19                 serial0 = &scif2;
  20                 ethernet0 = &avb;
  21         };
  22
  23         backlight: backlight {
  24                 compatible = "pwm-backlight";
  25                 pwms = <&pwm1 0 50000>;
  26
  27                 brightness-levels = <512 511 505 494 473 440 392 327 241 133 0>;
  28                 default-brightness-level = <10>;
  29
  30                 power-supply = <&reg_12p0v>;
  31                 enable-gpios = <&gpio4 0 GPIO_ACTIVE_HIGH>;
  32         };
  33
  34         chosen {
  35                 bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
  36                 stdout-path = "serial0:115200n8";
  37         };
  38
  39         composite-in {
  40                 compatible = "composite-video-connector";
  41
  42                 port {
  43                         composite_con_in: endpoint {
  44                                 remote-endpoint = <&adv7180_in>;
  45                         };
  46                 };
  47         };
  48
  49         hdmi-in {
  50                 compatible = "hdmi-connector";
  51                 type = "a";
  52
  53                 port {
  54                         hdmi_con_in: endpoint {
  55                                 remote-endpoint = <&adv7612_in>;
  56                         };
  57                 };
  58         };
  59
  60         hdmi-out {
  61                 compatible = "hdmi-connector";
  62                 type = "a";
  63
  64                 port {
  65                         hdmi_con_out: endpoint {
  66                                 remote-endpoint = <&adv7511_out>;
  67                         };
  68                 };
  69         };
  70
  71         keys {
  72                 compatible = "gpio-keys";
  73
  74                 pinctrl-0 = <&keys_pins>;
  75                 pinctrl-names = "default";
  76
  77                 key-1 {
  78                         gpios = <&gpio4 12 GPIO_ACTIVE_LOW>;
  79                         linux,code = <KEY_1>;
  80                         label = "SW56-1";
  81                         wakeup-source;
  82                         debounce-interval = <20>;
  83                 };
  84                 key-2 {
  85                         gpios = <&gpio4 13 GPIO_ACTIVE_LOW>;
  86                         linux,code = <KEY_2>;
  87                         label = "SW56-2";
  88                         wakeup-source;
  89                         debounce-interval = <20>;
  90                 };
  91                 key-3 {
  92                         gpios = <&gpio4 14 GPIO_ACTIVE_LOW>;
  93                         linux,code = <KEY_3>;
  94                         label = "SW56-3";
  95                         wakeup-source;
  96                         debounce-interval = <20>;
  97                 };
  98                 key-4 {
  99                         gpios = <&gpio4 15 GPIO_ACTIVE_LOW>;
 100                         linux,code = <KEY_4>;
 101                         label = "SW56-4";
 102                         wakeup-source;
 103                         debounce-interval = <20>;
 104                 };
 105         };
 106
 107         lvds-decoder {
 108                 compatible = "thine,thc63lvd1024";
 109                 vcc-supply = <&reg_3p3v>;
 110
 111                 ports {
 112                         #address-cells = <1>;
 113                         #size-cells = <0>;
 114
 115                         port@0 {
 116                                 reg = <0>;
 117                                 thc63lvd1024_in: endpoint {
 118                                         remote-endpoint = <&lvds0_out>;
 119                                 };
 120                         };
 121
 122                         port@2 {
 123                                 reg = <2>;
 124                                 thc63lvd1024_out: endpoint {
 125                                         remote-endpoint = <&adv7511_in>;
 126                                 };
 127                         };
 128                 };
 129         };
 130
 131         memory@48000000 {
 132                 device_type = "memory";
 133                 /* first 128MB is reserved for secure area. */
 134                 reg = <0x0 0x48000000 0x0 0x18000000>;
 135         };
 136
 137         reg_1p8v: regulator-1p8v {
 138                 compatible = "regulator-fixed";
 139                 regulator-name = "fixed-1.8V";
 140                 regulator-min-microvolt = <1800000>;
 141                 regulator-max-microvolt = <1800000>;
 142                 regulator-boot-on;
 143                 regulator-always-on;
 144         };
 145
 146         reg_3p3v: regulator-3p3v {
 147                 compatible = "regulator-fixed";
 148                 regulator-name = "fixed-3.3V";
 149                 regulator-min-microvolt = <3300000>;
 150                 regulator-max-microvolt = <3300000>;
 151                 regulator-boot-on;
 152                 regulator-always-on;
 153         };
 154
 155         reg_12p0v: regulator-12p0v {
 156                 compatible = "regulator-fixed";
 157                 regulator-name = "D12.0V";
 158                 regulator-min-microvolt = <12000000>;
 159                 regulator-max-microvolt = <12000000>;
 160                 regulator-boot-on;
 161                 regulator-always-on;
 162         };
 163
 164         vga {
 165                 compatible = "vga-connector";
 166
 167                 port {
 168                         vga_in: endpoint {
 169                                 remote-endpoint = <&adv7123_out>;
 170                         };
 171                 };
 172         };
 173
 174         vga-encoder {
 175                 compatible = "adi,adv7123";
 176
 177                 ports {
 178                         #address-cells = <1>;
 179                         #size-cells = <0>;
 180
 181                         port@0 {
 182                                 reg = <0>;
 183                                 adv7123_in: endpoint {
 184                                         remote-endpoint = <&du_out_rgb>;
 185                                 };
 186                         };
 187                         port@1 {
 188                                 reg = <1>;
 189                                 adv7123_out: endpoint {
 190                                         remote-endpoint = <&vga_in>;
 191                                 };
 192                         };
 193                 };
 194         };
 195
 196         x12_clk: x12 {
 197                 compatible = "fixed-clock";
 198                 #clock-cells = <0>;
 199                 clock-frequency = <74250000>;
 200         };
 201 };
 202
 203 &avb {
 204         pinctrl-0 = <&avb0_pins>;
 205         pinctrl-names = "default";
 206         renesas,no-ether-link;
 207         phy-handle = <&phy0>;
 208         status = "okay";
 209
 210         phy0: ethernet-phy@0 {
 211                 rxc-skew-ps = <1500>;
 212                 reg = <0>;
 213                 interrupt-parent = <&gpio5>;
 214                 interrupts = <19 IRQ_TYPE_LEVEL_LOW>;
 215                 /*
 216                  * TX clock internal delay mode is required for reliable
 217                  * 1Gbps communication using the KSZ9031RNX phy present on
 218                  * the Draak board, however, TX clock internal delay mode
 219                  * isn't supported on r8a77995.  Thus, limit speed to
 220                  * 100Mbps for reliable communication.
 221                  */
 222                 max-speed = <100>;
 223         };
 224 };
 225
 226 &can0 {
 227         pinctrl-0 = <&can0_pins>;
 228         pinctrl-names = "default";
 229         status = "okay";
 230 };
 231
 232 &can1 {
 233         pinctrl-0 = <&can1_pins>;
 234         pinctrl-names = "default";
 235         status = "okay";
 236 };
 237
 238 &du {
 239         pinctrl-0 = <&du_pins>;
 240         pinctrl-names = "default";
 241         status = "okay";
 242
 243         clocks = <&cpg CPG_MOD 724>,
 244                  <&cpg CPG_MOD 723>,
 245                  <&x12_clk>;
 246         clock-names = "du.0", "du.1", "dclkin.0";
 247
 248         ports {
 249                 port@0 {
 250                         endpoint {
 251                                 remote-endpoint = <&adv7123_in>;
 252                         };
 253                 };
 254         };
 255 };
 256
 257 &ehci0 {
 258         dr_mode = "host";
 259         status = "okay";
 260 };
 261
 262 &extal_clk {
 263         clock-frequency = <48000000>;
 264 };
 265
 266 &hsusb {
 267         dr_mode = "host";
 268         status = "okay";
 269 };
 270
 271 &i2c0 {
 272         pinctrl-0 = <&i2c0_pins>;
 273         pinctrl-names = "default";
 274         status = "okay";
 275
 276         composite-in@20 {
 277                 compatible = "adi,adv7180cp";
 278                 reg = <0x20>;
 279
 280                 ports {
 281                         #address-cells = <1>;
 282                         #size-cells = <0>;
 283
 284                         port@0 {
 285                                 reg = <0>;
 286                                 adv7180_in: endpoint {
 287                                         remote-endpoint = <&composite_con_in>;
 288                                 };
 289                         };
 290
 291                         port@3 {
 292                                 reg = <3>;
 293
 294                                 /*
 295                                  * The VIN4 video input path is shared between
 296                                  * CVBS and HDMI inputs through SW[49-53]
 297                                  * switches.
 298                                  *
 299                                  * CVBS is the default selection, link it to
 300                                  * VIN4 here.
 301                                  */
 302                                 adv7180_out: endpoint {
 303                                         remote-endpoint = <&vin4_in>;
 304                                 };
 305                         };
 306                 };
 307
 308         };
 309
 310         hdmi-encoder@39 {
 311                 compatible = "adi,adv7511w";
 312                 reg = <0x39>, <0x3f>, <0x3c>, <0x38>;
 313                 reg-names = "main", "edid", "cec", "packet";
 314                 interrupt-parent = <&gpio1>;
 315                 interrupts = <28 IRQ_TYPE_LEVEL_LOW>;
 316
 317                 adi,input-depth = <8>;
 318                 adi,input-colorspace = "rgb";
 319                 adi,input-clock = "1x";
 320
 321                 ports {
 322                         #address-cells = <1>;
 323                         #size-cells = <0>;
 324
 325                         port@0 {
 326                                 reg = <0>;
 327                                 adv7511_in: endpoint {
 328                                         remote-endpoint = <&thc63lvd1024_out>;
 329                                 };
 330                         };
 331
 332                         port@1 {
 333                                 reg = <1>;
 334                                 adv7511_out: endpoint {
 335                                         remote-endpoint = <&hdmi_con_out>;
 336                                 };
 337                         };
 338                 };
 339         };
 340
 341         hdmi-decoder@4c {
 342                 compatible = "adi,adv7612";
 343                 reg = <0x4c>;
 344                 default-input = <0>;
 345
 346                 ports {
 347                         #address-cells = <1>;
 348                         #size-cells = <0>;
 349
 350                         port@0 {
 351                                 reg = <0>;
 352
 353                                 adv7612_in: endpoint {
 354                                         remote-endpoint = <&hdmi_con_in>;
 355                                 };
 356                         };
 357
 358                         port@2 {
 359                                 reg = <2>;
 360
 361                                 /*
 362                                  * The VIN4 video input path is shared between
 363                                  * CVBS and HDMI inputs through SW[49-53]
 364                                  * switches.
 365                                  *
 366                                  * CVBS is the default selection, leave HDMI
 367                                  * not connected here.
 368                                  */
 369                                 adv7612_out: endpoint {
 370                                         pclk-sample = <0>;
 371                                         hsync-active = <0>;
 372                                         vsync-active = <0>;
 373                                 };
 374                         };
 375                 };
 376         };
 377
 378         eeprom@50 {
 379                 compatible = "rohm,br24t01", "atmel,24c01";
 380                 reg = <0x50>;
 381                 pagesize = <8>;
 382         };
 383 };
 384
 385 &i2c1 {
 386         pinctrl-0 = <&i2c1_pins>;
 387         pinctrl-names = "default";
 388         status = "okay";
 389 };
 390
 391 &lvds0 {
 392         status = "okay";
 393
 394         clocks = <&cpg CPG_MOD 727>,
 395                  <&x12_clk>,
 396                  <&extal_clk>;
 397         clock-names = "fck", "dclkin.0", "extal";
 398
 399         ports {
 400                 port@1 {
 401                         lvds0_out: endpoint {
 402                                 remote-endpoint = <&thc63lvd1024_in>;
 403                         };
 404                 };
 405         };
 406 };
 407
 408 &lvds1 {
 409         /*
 410          * Even though the LVDS1 output is not connected, the encoder must be
 411          * enabled to supply a pixel clock to the DU for the DPAD output when
 412          * LVDS0 is in use.
 413          */
 414         status = "okay";
 415
 416         clocks = <&cpg CPG_MOD 727>,
 417                  <&x12_clk>,
 418                  <&extal_clk>;
 419         clock-names = "fck", "dclkin.0", "extal";
 420 };
 421
 422 &ohci0 {
 423         dr_mode = "host";
 424         status = "okay";
 425 };
 426
 427 &pfc {
 428         avb0_pins: avb {
 429                 groups = "avb0_link", "avb0_mdio", "avb0_mii";
 430                 function = "avb0";
 431         };
 432
 433         can0_pins: can0 {
 434                 groups = "can0_data_a";
 435                 function = "can0";
 436         };
 437
 438         can1_pins: can1 {
 439                 groups = "can1_data_a";
 440                 function = "can1";
 441         };
 442
 443         du_pins: du {
 444                 groups = "du_rgb888", "du_sync", "du_disp", "du_clk_out_0";
 445                 function = "du";
 446         };
 447
 448         i2c0_pins: i2c0 {
 449                 groups = "i2c0";
 450                 function = "i2c0";
 451         };
 452
 453         i2c1_pins: i2c1 {
 454                 groups = "i2c1";
 455                 function = "i2c1";
 456         };
 457
 458         keys_pins: keys {
 459                 pins = "GP_4_12", "GP_4_13", "GP_4_14", "GP_4_15";
 460                 bias-pull-up;
 461         };
 462
 463         pwm0_pins: pwm0 {
 464                 groups = "pwm0_c";
 465                 function = "pwm0";
 466         };
 467
 468         pwm1_pins: pwm1 {
 469                 groups = "pwm1_c";
 470                 function = "pwm1";
 471         };
 472
 473         scif2_pins: scif2 {
 474                 groups = "scif2_data";
 475                 function = "scif2";
 476         };
 477
 478         sdhi2_pins: sd2 {
 479                 groups = "mmc_data8", "mmc_ctrl";
 480                 function = "mmc";
 481                 power-source = <1800>;
 482         };
 483
 484         sdhi2_pins_uhs: sd2_uhs {
 485                 groups = "mmc_data8", "mmc_ctrl";
 486                 function = "mmc";
 487                 power-source = <1800>;
 488         };
 489
 490         usb0_pins: usb0 {
 491                 groups = "usb0";
 492                 function = "usb0";
 493         };
 494
 495         vin4_pins_cvbs: vin4 {
 496                 groups = "vin4_data8", "vin4_sync", "vin4_clk";
 497                 function = "vin4";
 498         };
 499 };
 500
 501 &pwm0 {
 502         pinctrl-0 = <&pwm0_pins>;
 503         pinctrl-names = "default";
 504
 505         status = "okay";
 506 };
 507
 508 &pwm1 {
 509         pinctrl-0 = <&pwm1_pins>;
 510         pinctrl-names = "default";
 511
 512         status = "okay";
 513 };
 514
 515 &rwdt {
 516         timeout-sec = <60>;
 517         status = "okay";
 518 };
 519
 520 &scif2 {
 521         pinctrl-0 = <&scif2_pins>;
 522         pinctrl-names = "default";
 523
 524         status = "okay";
 525 };
 526
 527 &sdhi2 {
 528         /* used for on-board eMMC */
 529         pinctrl-0 = <&sdhi2_pins>;
 530         pinctrl-1 = <&sdhi2_pins_uhs>;
 531         pinctrl-names = "default", "state_uhs";
 532
 533         vmmc-supply = <&reg_3p3v>;
 534         vqmmc-supply = <&reg_1p8v>;
 535         bus-width = <8>;
 536         mmc-hs200-1_8v;
 537         no-sd;
 538         no-sdio;
 539         non-removable;
 540         status = "okay";
 541 };
 542
 543 &usb2_phy0 {
 544         pinctrl-0 = <&usb0_pins>;
 545         pinctrl-names = "default";
 546
 547         renesas,no-otg-pins;
 548         status = "okay";
 549 };
 550
 551 &vin4 {
 552         pinctrl-0 = <&vin4_pins_cvbs>;
 553         pinctrl-names = "default";
 554
 555         status = "okay";
 556
 557         ports {
 558                 port {
 559                         vin4_in: endpoint {
 560                                 remote-endpoint = <&adv7180_out>;
 561                         };
 562                 };
 563         };
 564 };