arch/arm64/boot/dts/renesas/r8a77990.dtsi

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Device Tree Source for the R-Car E3 (R8A77990) SoC
   4  *
   5  * Copyright (C) 2018-2019 Renesas Electronics Corp.
   6  */
   7
   8 #include <dt-bindings/clock/r8a77990-cpg-mssr.h>
   9 #include <dt-bindings/interrupt-controller/arm-gic.h>
  10 #include <dt-bindings/power/r8a77990-sysc.h>
  11
  12 / {
  13         compatible = "renesas,r8a77990";
  14         #address-cells = <2>;
  15         #size-cells = <2>;
  16
  17         aliases {
  18                 i2c0 = &i2c0;
  19                 i2c1 = &i2c1;
  20                 i2c2 = &i2c2;
  21                 i2c3 = &i2c3;
  22                 i2c4 = &i2c4;
  23                 i2c5 = &i2c5;
  24                 i2c6 = &i2c6;
  25                 i2c7 = &i2c7;
  26         };
  27
  28         /*
  29          * The external audio clocks are configured as 0 Hz fixed frequency
  30          * clocks by default.
  31          * Boards that provide audio clocks should override them.
  32          */
  33         audio_clk_a: audio_clk_a {
  34                 compatible = "fixed-clock";
  35                 #clock-cells = <0>;
  36                 clock-frequency = <0>;
  37         };
  38
  39         audio_clk_b: audio_clk_b {
  40                 compatible = "fixed-clock";
  41                 #clock-cells = <0>;
  42                 clock-frequency = <0>;
  43         };
  44
  45         audio_clk_c: audio_clk_c {
  46                 compatible = "fixed-clock";
  47                 #clock-cells = <0>;
  48                 clock-frequency = <0>;
  49         };
  50
  51         /* External CAN clock - to be overridden by boards that provide it */
  52         can_clk: can {
  53                 compatible = "fixed-clock";
  54                 #clock-cells = <0>;
  55                 clock-frequency = <0>;
  56         };
  57
  58         cluster1_opp: opp_table10 {
  59                 compatible = "operating-points-v2";
  60                 opp-shared;
  61                 opp-800000000 {
  62                         opp-hz = /bits/ 64 <800000000>;
  63                         opp-microvolt = <820000>;
  64                         clock-latency-ns = <300000>;
  65                 };
  66                 opp-1000000000 {
  67                         opp-hz = /bits/ 64 <1000000000>;
  68                         opp-microvolt = <820000>;
  69                         clock-latency-ns = <300000>;
  70                 };
  71                 opp-1200000000 {
  72                         opp-hz = /bits/ 64 <1200000000>;
  73                         opp-microvolt = <820000>;
  74                         clock-latency-ns = <300000>;
  75                         opp-suspend;
  76                 };
  77         };
  78
  79         cpus {
  80                 #address-cells = <1>;
  81                 #size-cells = <0>;
  82
  83                 a53_0: cpu@0 {
  84                         compatible = "arm,cortex-a53";
  85                         reg = <0>;
  86                         device_type = "cpu";
  87                         #cooling-cells = <2>;
  88                         power-domains = <&sysc R8A77990_PD_CA53_CPU0>;
  89                         next-level-cache = <&L2_CA53>;
  90                         enable-method = "psci";
  91                         cpu-idle-states = <&CPU_SLEEP_0>;
  92                         dynamic-power-coefficient = <277>;
  93                         clocks =<&cpg CPG_CORE R8A77990_CLK_Z2>;
  94                         operating-points-v2 = <&cluster1_opp>;
  95                 };
  96
  97                 a53_1: cpu@1 {
  98                         compatible = "arm,cortex-a53";
  99                         reg = <1>;
 100                         device_type = "cpu";
 101                         power-domains = <&sysc R8A77990_PD_CA53_CPU1>;
 102                         next-level-cache = <&L2_CA53>;
 103                         enable-method = "psci";
 104                         cpu-idle-states = <&CPU_SLEEP_0>;
 105                         clocks =<&cpg CPG_CORE R8A77990_CLK_Z2>;
 106                         operating-points-v2 = <&cluster1_opp>;
 107                 };
 108
 109                 L2_CA53: cache-controller-0 {
 110                         compatible = "cache";
 111                         power-domains = <&sysc R8A77990_PD_CA53_SCU>;
 112                         cache-unified;
 113                         cache-level = <2>;
 114                 };
 115
 116                 idle-states {
 117                         entry-method = "psci";
 118
 119                         CPU_SLEEP_0: cpu-sleep-0 {
 120                                 compatible = "arm,idle-state";
 121                                 arm,psci-suspend-param = <0x0010000>;
 122                                 local-timer-stop;
 123                                 entry-latency-us = <700>;
 124                                 exit-latency-us = <700>;
 125                                 min-residency-us = <5000>;
 126                         };
 127                 };
 128         };
 129
 130         extal_clk: extal {
 131                 compatible = "fixed-clock";
 132                 #clock-cells = <0>;
 133                 /* This value must be overridden by the board */
 134                 clock-frequency = <0>;
 135         };
 136
 137         /* External PCIe clock - can be overridden by the board */
 138         pcie_bus_clk: pcie_bus {
 139                 compatible = "fixed-clock";
 140                 #clock-cells = <0>;
 141                 clock-frequency = <0>;
 142         };
 143
 144         pmu_a53 {
 145                 compatible = "arm,cortex-a53-pmu";
 146                 interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
 147                                       <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
 148                 interrupt-affinity = <&a53_0>, <&a53_1>;
 149         };
 150
 151         psci {
 152                 compatible = "arm,psci-1.0", "arm,psci-0.2";
 153                 method = "smc";
 154         };
 155
 156         /* External SCIF clock - to be overridden by boards that provide it */
 157         scif_clk: scif {
 158                 compatible = "fixed-clock";
 159                 #clock-cells = <0>;
 160                 clock-frequency = <0>;
 161         };
 162
 163         soc: soc {
 164                 compatible = "simple-bus";
 165                 interrupt-parent = <&gic>;
 166                 #address-cells = <2>;
 167                 #size-cells = <2>;
 168                 ranges;
 169
 170                 rwdt: watchdog@e6020000 {
 171                         compatible = "renesas,r8a77990-wdt",
 172                                      "renesas,rcar-gen3-wdt";
 173                         reg = <0 0xe6020000 0 0x0c>;
 174                         clocks = <&cpg CPG_MOD 402>;
 175                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 176                         resets = <&cpg 402>;
 177                         status = "disabled";
 178                 };
 179
 180                 gpio0: gpio@e6050000 {
 181                         compatible = "renesas,gpio-r8a77990",
 182                                      "renesas,rcar-gen3-gpio";
 183                         reg = <0 0xe6050000 0 0x50>;
 184                         interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
 185                         #gpio-cells = <2>;
 186                         gpio-controller;
 187                         gpio-ranges = <&pfc 0 0 18>;
 188                         #interrupt-cells = <2>;
 189                         interrupt-controller;
 190                         clocks = <&cpg CPG_MOD 912>;
 191                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 192                         resets = <&cpg 912>;
 193                 };
 194
 195                 gpio1: gpio@e6051000 {
 196                         compatible = "renesas,gpio-r8a77990",
 197                                      "renesas,rcar-gen3-gpio";
 198                         reg = <0 0xe6051000 0 0x50>;
 199                         interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
 200                         #gpio-cells = <2>;
 201                         gpio-controller;
 202                         gpio-ranges = <&pfc 0 32 23>;
 203                         #interrupt-cells = <2>;
 204                         interrupt-controller;
 205                         clocks = <&cpg CPG_MOD 911>;
 206                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 207                         resets = <&cpg 911>;
 208                 };
 209
 210                 gpio2: gpio@e6052000 {
 211                         compatible = "renesas,gpio-r8a77990",
 212                                      "renesas,rcar-gen3-gpio";
 213                         reg = <0 0xe6052000 0 0x50>;
 214                         interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
 215                         #gpio-cells = <2>;
 216                         gpio-controller;
 217                         gpio-ranges = <&pfc 0 64 26>;
 218                         #interrupt-cells = <2>;
 219                         interrupt-controller;
 220                         clocks = <&cpg CPG_MOD 910>;
 221                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 222                         resets = <&cpg 910>;
 223                 };
 224
 225                 gpio3: gpio@e6053000 {
 226                         compatible = "renesas,gpio-r8a77990",
 227                                      "renesas,rcar-gen3-gpio";
 228                         reg = <0 0xe6053000 0 0x50>;
 229                         interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
 230                         #gpio-cells = <2>;
 231                         gpio-controller;
 232                         gpio-ranges = <&pfc 0 96 16>;
 233                         #interrupt-cells = <2>;
 234                         interrupt-controller;
 235                         clocks = <&cpg CPG_MOD 909>;
 236                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 237                         resets = <&cpg 909>;
 238                 };
 239
 240                 gpio4: gpio@e6054000 {
 241                         compatible = "renesas,gpio-r8a77990",
 242                                      "renesas,rcar-gen3-gpio";
 243                         reg = <0 0xe6054000 0 0x50>;
 244                         interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
 245                         #gpio-cells = <2>;
 246                         gpio-controller;
 247                         gpio-ranges = <&pfc 0 128 11>;
 248                         #interrupt-cells = <2>;
 249                         interrupt-controller;
 250                         clocks = <&cpg CPG_MOD 908>;
 251                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 252                         resets = <&cpg 908>;
 253                 };
 254
 255                 gpio5: gpio@e6055000 {
 256                         compatible = "renesas,gpio-r8a77990",
 257                                      "renesas,rcar-gen3-gpio";
 258                         reg = <0 0xe6055000 0 0x50>;
 259                         interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
 260                         #gpio-cells = <2>;
 261                         gpio-controller;
 262                         gpio-ranges = <&pfc 0 160 20>;
 263                         #interrupt-cells = <2>;
 264                         interrupt-controller;
 265                         clocks = <&cpg CPG_MOD 907>;
 266                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 267                         resets = <&cpg 907>;
 268                 };
 269
 270                 gpio6: gpio@e6055400 {
 271                         compatible = "renesas,gpio-r8a77990",
 272                                      "renesas,rcar-gen3-gpio";
 273                         reg = <0 0xe6055400 0 0x50>;
 274                         interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
 275                         #gpio-cells = <2>;
 276                         gpio-controller;
 277                         gpio-ranges = <&pfc 0 192 18>;
 278                         #interrupt-cells = <2>;
 279                         interrupt-controller;
 280                         clocks = <&cpg CPG_MOD 906>;
 281                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 282                         resets = <&cpg 906>;
 283                 };
 284
 285                 pfc: pinctrl@e6060000 {
 286                         compatible = "renesas,pfc-r8a77990";
 287                         reg = <0 0xe6060000 0 0x508>;
 288                 };
 289
 290                 i2c_dvfs: i2c@e60b0000 {
 291                         #address-cells = <1>;
 292                         #size-cells = <0>;
 293                         compatible = "renesas,iic-r8a77990";
 294                         reg = <0 0xe60b0000 0 0x15>;
 295                         interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
 296                         clocks = <&cpg CPG_MOD 926>;
 297                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 298                         resets = <&cpg 926>;
 299                         dmas = <&dmac0 0x11>, <&dmac0 0x10>;
 300                         dma-names = "tx", "rx";
 301                         status = "disabled";
 302                 };
 303
 304                 cmt0: timer@e60f0000 {
 305                         compatible = "renesas,r8a77990-cmt0",
 306                                      "renesas,rcar-gen3-cmt0";
 307                         reg = <0 0xe60f0000 0 0x1004>;
 308                         interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
 309                                      <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
 310                         clocks = <&cpg CPG_MOD 303>;
 311                         clock-names = "fck";
 312                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 313                         resets = <&cpg 303>;
 314                         status = "disabled";
 315                 };
 316
 317                 cmt1: timer@e6130000 {
 318                         compatible = "renesas,r8a77990-cmt1",
 319                                      "renesas,rcar-gen3-cmt1";
 320                         reg = <0 0xe6130000 0 0x1004>;
 321                         interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
 322                                      <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
 323                                      <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
 324                                      <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
 325                                      <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
 326                                      <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
 327                                      <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
 328                                      <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
 329                         clocks = <&cpg CPG_MOD 302>;
 330                         clock-names = "fck";
 331                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 332                         resets = <&cpg 302>;
 333                         status = "disabled";
 334                 };
 335
 336                 cmt2: timer@e6140000 {
 337                         compatible = "renesas,r8a77990-cmt1",
 338                                      "renesas,rcar-gen3-cmt1";
 339                         reg = <0 0xe6140000 0 0x1004>;
 340                         interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>,
 341                                      <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>,
 342                                      <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>,
 343                                      <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>,
 344                                      <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>,
 345                                      <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>,
 346                                      <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>,
 347                                      <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>;
 348                         clocks = <&cpg CPG_MOD 301>;
 349                         clock-names = "fck";
 350                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 351                         resets = <&cpg 301>;
 352                         status = "disabled";
 353                 };
 354
 355                 cmt3: timer@e6148000 {
 356                         compatible = "renesas,r8a77990-cmt1",
 357                                      "renesas,rcar-gen3-cmt1";
 358                         reg = <0 0xe6148000 0 0x1004>;
 359                         interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>,
 360                                      <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>,
 361                                      <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>,
 362                                      <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>,
 363                                      <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>,
 364                                      <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>,
 365                                      <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>,
 366                                      <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>;
 367                         clocks = <&cpg CPG_MOD 300>;
 368                         clock-names = "fck";
 369                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 370                         resets = <&cpg 300>;
 371                         status = "disabled";
 372                 };
 373
 374                 cpg: clock-controller@e6150000 {
 375                         compatible = "renesas,r8a77990-cpg-mssr";
 376                         reg = <0 0xe6150000 0 0x1000>;
 377                         clocks = <&extal_clk>;
 378                         clock-names = "extal";
 379                         #clock-cells = <2>;
 380                         #power-domain-cells = <0>;
 381                         #reset-cells = <1>;
 382                 };
 383
 384                 rst: reset-controller@e6160000 {
 385                         compatible = "renesas,r8a77990-rst";
 386                         reg = <0 0xe6160000 0 0x0200>;
 387                 };
 388
 389                 sysc: system-controller@e6180000 {
 390                         compatible = "renesas,r8a77990-sysc";
 391                         reg = <0 0xe6180000 0 0x0400>;
 392                         #power-domain-cells = <1>;
 393                 };
 394
 395                 thermal: thermal@e6190000 {
 396                         compatible = "renesas,thermal-r8a77990";
 397                         reg = <0 0xe6190000 0 0x10>, <0 0xe6190100 0 0x38>;
 398                         interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
 399                                      <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
 400                                      <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
 401                         clocks = <&cpg CPG_MOD 522>;
 402                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 403                         resets = <&cpg 522>;
 404                         #thermal-sensor-cells = <0>;
 405                 };
 406
 407                 intc_ex: interrupt-controller@e61c0000 {
 408                         compatible = "renesas,intc-ex-r8a77990", "renesas,irqc";
 409                         #interrupt-cells = <2>;
 410                         interrupt-controller;
 411                         reg = <0 0xe61c0000 0 0x200>;
 412                         interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
 413                                      <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
 414                                      <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
 415                                      <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
 416                                      <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
 417                                      <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
 418                         clocks = <&cpg CPG_MOD 407>;
 419                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 420                         resets = <&cpg 407>;
 421                 };
 422
 423                 tmu0: timer@e61e0000 {
 424                         compatible = "renesas,tmu-r8a77990", "renesas,tmu";
 425                         reg = <0 0xe61e0000 0 0x30>;
 426                         interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
 427                                      <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
 428                                      <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
 429                         clocks = <&cpg CPG_MOD 125>;
 430                         clock-names = "fck";
 431                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 432                         resets = <&cpg 125>;
 433                         status = "disabled";
 434                 };
 435
 436                 tmu1: timer@e6fc0000 {
 437                         compatible = "renesas,tmu-r8a77990", "renesas,tmu";
 438                         reg = <0 0xe6fc0000 0 0x30>;
 439                         interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
 440                                      <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
 441                                      <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
 442                         clocks = <&cpg CPG_MOD 124>;
 443                         clock-names = "fck";
 444                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 445                         resets = <&cpg 124>;
 446                         status = "disabled";
 447                 };
 448
 449                 tmu2: timer@e6fd0000 {
 450                         compatible = "renesas,tmu-r8a77990", "renesas,tmu";
 451                         reg = <0 0xe6fd0000 0 0x30>;
 452                         interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,
 453                                      <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
 454                                      <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>;
 455                         clocks = <&cpg CPG_MOD 123>;
 456                         clock-names = "fck";
 457                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 458                         resets = <&cpg 123>;
 459                         status = "disabled";
 460                 };
 461
 462                 tmu3: timer@e6fe0000 {
 463                         compatible = "renesas,tmu-r8a77990", "renesas,tmu";
 464                         reg = <0 0xe6fe0000 0 0x30>;
 465                         interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
 466                                      <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
 467                                      <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
 468                         clocks = <&cpg CPG_MOD 122>;
 469                         clock-names = "fck";
 470                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 471                         resets = <&cpg 122>;
 472                         status = "disabled";
 473                 };
 474
 475                 tmu4: timer@ffc00000 {
 476                         compatible = "renesas,tmu-r8a77990", "renesas,tmu";
 477                         reg = <0 0xffc00000 0 0x30>;
 478                         interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>,
 479                                      <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>,
 480                                      <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>;
 481                         clocks = <&cpg CPG_MOD 121>;
 482                         clock-names = "fck";
 483                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 484                         resets = <&cpg 121>;
 485                         status = "disabled";
 486                 };
 487
 488                 i2c0: i2c@e6500000 {
 489                         #address-cells = <1>;
 490                         #size-cells = <0>;
 491                         compatible = "renesas,i2c-r8a77990",
 492                                      "renesas,rcar-gen3-i2c";
 493                         reg = <0 0xe6500000 0 0x40>;
 494                         interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
 495                         clocks = <&cpg CPG_MOD 931>;
 496                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 497                         resets = <&cpg 931>;
 498                         dmas = <&dmac1 0x91>, <&dmac1 0x90>,
 499                                <&dmac2 0x91>, <&dmac2 0x90>;
 500                         dma-names = "tx", "rx", "tx", "rx";
 501                         i2c-scl-internal-delay-ns = <110>;
 502                         status = "disabled";
 503                 };
 504
 505                 i2c1: i2c@e6508000 {
 506                         #address-cells = <1>;
 507                         #size-cells = <0>;
 508                         compatible = "renesas,i2c-r8a77990",
 509                                      "renesas,rcar-gen3-i2c";
 510                         reg = <0 0xe6508000 0 0x40>;
 511                         interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
 512                         clocks = <&cpg CPG_MOD 930>;
 513                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 514                         resets = <&cpg 930>;
 515                         dmas = <&dmac1 0x93>, <&dmac1 0x92>,
 516                                <&dmac2 0x93>, <&dmac2 0x92>;
 517                         dma-names = "tx", "rx", "tx", "rx";
 518                         i2c-scl-internal-delay-ns = <6>;
 519                         status = "disabled";
 520                 };
 521
 522                 i2c2: i2c@e6510000 {
 523                         #address-cells = <1>;
 524                         #size-cells = <0>;
 525                         compatible = "renesas,i2c-r8a77990",
 526                                      "renesas,rcar-gen3-i2c";
 527                         reg = <0 0xe6510000 0 0x40>;
 528                         interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
 529                         clocks = <&cpg CPG_MOD 929>;
 530                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 531                         resets = <&cpg 929>;
 532                         dmas = <&dmac1 0x95>, <&dmac1 0x94>,
 533                                <&dmac2 0x95>, <&dmac2 0x94>;
 534                         dma-names = "tx", "rx", "tx", "rx";
 535                         i2c-scl-internal-delay-ns = <6>;
 536                         status = "disabled";
 537                 };
 538
 539                 i2c3: i2c@e66d0000 {
 540                         #address-cells = <1>;
 541                         #size-cells = <0>;
 542                         compatible = "renesas,i2c-r8a77990",
 543                                      "renesas,rcar-gen3-i2c";
 544                         reg = <0 0xe66d0000 0 0x40>;
 545                         interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
 546                         clocks = <&cpg CPG_MOD 928>;
 547                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 548                         resets = <&cpg 928>;
 549                         dmas = <&dmac0 0x97>, <&dmac0 0x96>;
 550                         dma-names = "tx", "rx";
 551                         i2c-scl-internal-delay-ns = <110>;
 552                         status = "disabled";
 553                 };
 554
 555                 i2c4: i2c@e66d8000 {
 556                         #address-cells = <1>;
 557                         #size-cells = <0>;
 558                         compatible = "renesas,i2c-r8a77990",
 559                                      "renesas,rcar-gen3-i2c";
 560                         reg = <0 0xe66d8000 0 0x40>;
 561                         interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
 562                         clocks = <&cpg CPG_MOD 927>;
 563                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 564                         resets = <&cpg 927>;
 565                         dmas = <&dmac0 0x99>, <&dmac0 0x98>;
 566                         dma-names = "tx", "rx";
 567                         i2c-scl-internal-delay-ns = <6>;
 568                         status = "disabled";
 569                 };
 570
 571                 i2c5: i2c@e66e0000 {
 572                         #address-cells = <1>;
 573                         #size-cells = <0>;
 574                         compatible = "renesas,i2c-r8a77990",
 575                                      "renesas,rcar-gen3-i2c";
 576                         reg = <0 0xe66e0000 0 0x40>;
 577                         interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
 578                         clocks = <&cpg CPG_MOD 919>;
 579                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 580                         resets = <&cpg 919>;
 581                         dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
 582                         dma-names = "tx", "rx";
 583                         i2c-scl-internal-delay-ns = <6>;
 584                         status = "disabled";
 585                 };
 586
 587                 i2c6: i2c@e66e8000 {
 588                         #address-cells = <1>;
 589                         #size-cells = <0>;
 590                         compatible = "renesas,i2c-r8a77990",
 591                                      "renesas,rcar-gen3-i2c";
 592                         reg = <0 0xe66e8000 0 0x40>;
 593                         interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
 594                         clocks = <&cpg CPG_MOD 918>;
 595                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 596                         resets = <&cpg 918>;
 597                         dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
 598                         dma-names = "tx", "rx";
 599                         i2c-scl-internal-delay-ns = <6>;
 600                         status = "disabled";
 601                 };
 602
 603                 i2c7: i2c@e6690000 {
 604                         #address-cells = <1>;
 605                         #size-cells = <0>;
 606                         compatible = "renesas,i2c-r8a77990",
 607                                      "renesas,rcar-gen3-i2c";
 608                         reg = <0 0xe6690000 0 0x40>;
 609                         interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
 610                         clocks = <&cpg CPG_MOD 1003>;
 611                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 612                         resets = <&cpg 1003>;
 613                         i2c-scl-internal-delay-ns = <6>;
 614                         status = "disabled";
 615                 };
 616
 617                 hscif0: serial@e6540000 {
 618                         compatible = "renesas,hscif-r8a77990",
 619                                      "renesas,rcar-gen3-hscif",
 620                                      "renesas,hscif";
 621                         reg = <0 0xe6540000 0 0x60>;
 622                         interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
 623                         clocks = <&cpg CPG_MOD 520>,
 624                                  <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
 625                                  <&scif_clk>;
 626                         clock-names = "fck", "brg_int", "scif_clk";
 627                         dmas = <&dmac1 0x31>, <&dmac1 0x30>,
 628                                <&dmac2 0x31>, <&dmac2 0x30>;
 629                         dma-names = "tx", "rx", "tx", "rx";
 630                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 631                         resets = <&cpg 520>;
 632                         status = "disabled";
 633                 };
 634
 635                 hscif1: serial@e6550000 {
 636                         compatible = "renesas,hscif-r8a77990",
 637                                      "renesas,rcar-gen3-hscif",
 638                                      "renesas,hscif";
 639                         reg = <0 0xe6550000 0 0x60>;
 640                         interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
 641                         clocks = <&cpg CPG_MOD 519>,
 642                                  <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
 643                                  <&scif_clk>;
 644                         clock-names = "fck", "brg_int", "scif_clk";
 645                         dmas = <&dmac1 0x33>, <&dmac1 0x32>,
 646                                <&dmac2 0x33>, <&dmac2 0x32>;
 647                         dma-names = "tx", "rx", "tx", "rx";
 648                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 649                         resets = <&cpg 519>;
 650                         status = "disabled";
 651                 };
 652
 653                 hscif2: serial@e6560000 {
 654                         compatible = "renesas,hscif-r8a77990",
 655                                      "renesas,rcar-gen3-hscif",
 656                                      "renesas,hscif";
 657                         reg = <0 0xe6560000 0 0x60>;
 658                         interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
 659                         clocks = <&cpg CPG_MOD 518>,
 660                                  <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
 661                                  <&scif_clk>;
 662                         clock-names = "fck", "brg_int", "scif_clk";
 663                         dmas = <&dmac1 0x35>, <&dmac1 0x34>,
 664                                <&dmac2 0x35>, <&dmac2 0x34>;
 665                         dma-names = "tx", "rx", "tx", "rx";
 666                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 667                         resets = <&cpg 518>;
 668                         status = "disabled";
 669                 };
 670
 671                 hscif3: serial@e66a0000 {
 672                         compatible = "renesas,hscif-r8a77990",
 673                                      "renesas,rcar-gen3-hscif",
 674                                      "renesas,hscif";
 675                         reg = <0 0xe66a0000 0 0x60>;
 676                         interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
 677                         clocks = <&cpg CPG_MOD 517>,
 678                                  <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
 679                                  <&scif_clk>;
 680                         clock-names = "fck", "brg_int", "scif_clk";
 681                         dmas = <&dmac0 0x37>, <&dmac0 0x36>;
 682                         dma-names = "tx", "rx";
 683                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 684                         resets = <&cpg 517>;
 685                         status = "disabled";
 686                 };
 687
 688                 hscif4: serial@e66b0000 {
 689                         compatible = "renesas,hscif-r8a77990",
 690                                      "renesas,rcar-gen3-hscif",
 691                                      "renesas,hscif";
 692                         reg = <0 0xe66b0000 0 0x60>;
 693                         interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
 694                         clocks = <&cpg CPG_MOD 516>,
 695                                  <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
 696                                  <&scif_clk>;
 697                         clock-names = "fck", "brg_int", "scif_clk";
 698                         dmas = <&dmac0 0x39>, <&dmac0 0x38>;
 699                         dma-names = "tx", "rx";
 700                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 701                         resets = <&cpg 516>;
 702                         status = "disabled";
 703                 };
 704
 705                 hsusb: usb@e6590000 {
 706                         compatible = "renesas,usbhs-r8a77990",
 707                                      "renesas,rcar-gen3-usbhs";
 708                         reg = <0 0xe6590000 0 0x200>;
 709                         interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
 710                         clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>;
 711                         dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
 712                                <&usb_dmac1 0>, <&usb_dmac1 1>;
 713                         dma-names = "ch0", "ch1", "ch2", "ch3";
 714                         renesas,buswait = <11>;
 715                         phys = <&usb2_phy0 3>;
 716                         phy-names = "usb";
 717                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 718                         resets = <&cpg 704>, <&cpg 703>;
 719                         status = "disabled";
 720                 };
 721
 722                 usb_dmac0: dma-controller@e65a0000 {
 723                         compatible = "renesas,r8a77990-usb-dmac",
 724                                      "renesas,usb-dmac";
 725                         reg = <0 0xe65a0000 0 0x100>;
 726                         interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
 727                                      <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
 728                         interrupt-names = "ch0", "ch1";
 729                         clocks = <&cpg CPG_MOD 330>;
 730                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 731                         resets = <&cpg 330>;
 732                         #dma-cells = <1>;
 733                         dma-channels = <2>;
 734                 };
 735
 736                 usb_dmac1: dma-controller@e65b0000 {
 737                         compatible = "renesas,r8a77990-usb-dmac",
 738                                      "renesas,usb-dmac";
 739                         reg = <0 0xe65b0000 0 0x100>;
 740                         interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
 741                                      <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
 742                         interrupt-names = "ch0", "ch1";
 743                         clocks = <&cpg CPG_MOD 331>;
 744                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 745                         resets = <&cpg 331>;
 746                         #dma-cells = <1>;
 747                         dma-channels = <2>;
 748                 };
 749
 750                 arm_cc630p: crypto@e6601000 {
 751                         compatible = "arm,cryptocell-630p-ree";
 752                         interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
 753                         reg = <0x0 0xe6601000 0 0x1000>;
 754                         clocks = <&cpg CPG_MOD 229>;
 755                         resets = <&cpg 229>;
 756                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 757                 };
 758
 759                 dmac0: dma-controller@e6700000 {
 760                         compatible = "renesas,dmac-r8a77990",
 761                                      "renesas,rcar-dmac";
 762                         reg = <0 0xe6700000 0 0x10000>;
 763                         interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>,
 764                                      <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
 765                                      <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>,
 766                                      <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>,
 767                                      <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>,
 768                                      <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
 769                                      <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>,
 770                                      <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>,
 771                                      <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
 772                                      <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
 773                                      <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>,
 774                                      <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
 775                                      <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
 776                                      <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>,
 777                                      <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
 778                                      <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>,
 779                                      <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
 780                         interrupt-names = "error",
 781                                         "ch0", "ch1", "ch2", "ch3",
 782                                         "ch4", "ch5", "ch6", "ch7",
 783                                         "ch8", "ch9", "ch10", "ch11",
 784                                         "ch12", "ch13", "ch14", "ch15";
 785                         clocks = <&cpg CPG_MOD 219>;
 786                         clock-names = "fck";
 787                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 788                         resets = <&cpg 219>;
 789                         #dma-cells = <1>;
 790                         dma-channels = <16>;
 791                         iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>,
 792                                <&ipmmu_ds0 2>, <&ipmmu_ds0 3>,
 793                                <&ipmmu_ds0 4>, <&ipmmu_ds0 5>,
 794                                <&ipmmu_ds0 6>, <&ipmmu_ds0 7>,
 795                                <&ipmmu_ds0 8>, <&ipmmu_ds0 9>,
 796                                <&ipmmu_ds0 10>, <&ipmmu_ds0 11>,
 797                                <&ipmmu_ds0 12>, <&ipmmu_ds0 13>,
 798                                <&ipmmu_ds0 14>, <&ipmmu_ds0 15>;
 799                 };
 800
 801                 dmac1: dma-controller@e7300000 {
 802                         compatible = "renesas,dmac-r8a77990",
 803                                      "renesas,rcar-dmac";
 804                         reg = <0 0xe7300000 0 0x10000>;
 805                         interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
 806                                      <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
 807                                      <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
 808                                      <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
 809                                      <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
 810                                      <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
 811                                      <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
 812                                      <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
 813                                      <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
 814                                      <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
 815                                      <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
 816                                      <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
 817                                      <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
 818                                      <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
 819                                      <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
 820                                      <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>,
 821                                      <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
 822                         interrupt-names = "error",
 823                                         "ch0", "ch1", "ch2", "ch3",
 824                                         "ch4", "ch5", "ch6", "ch7",
 825                                         "ch8", "ch9", "ch10", "ch11",
 826                                         "ch12", "ch13", "ch14", "ch15";
 827                         clocks = <&cpg CPG_MOD 218>;
 828                         clock-names = "fck";
 829                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 830                         resets = <&cpg 218>;
 831                         #dma-cells = <1>;
 832                         dma-channels = <16>;
 833                         iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>,
 834                                <&ipmmu_ds1 2>, <&ipmmu_ds1 3>,
 835                                <&ipmmu_ds1 4>, <&ipmmu_ds1 5>,
 836                                <&ipmmu_ds1 6>, <&ipmmu_ds1 7>,
 837                                <&ipmmu_ds1 8>, <&ipmmu_ds1 9>,
 838                                <&ipmmu_ds1 10>, <&ipmmu_ds1 11>,
 839                                <&ipmmu_ds1 12>, <&ipmmu_ds1 13>,
 840                                <&ipmmu_ds1 14>, <&ipmmu_ds1 15>;
 841                 };
 842
 843                 dmac2: dma-controller@e7310000 {
 844                         compatible = "renesas,dmac-r8a77990",
 845                                      "renesas,rcar-dmac";
 846                         reg = <0 0xe7310000 0 0x10000>;
 847                         interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>,
 848                                      <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>,
 849                                      <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>,
 850                                      <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>,
 851                                      <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>,
 852                                      <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>,
 853                                      <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>,
 854                                      <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>,
 855                                      <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>,
 856                                      <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>,
 857                                      <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>,
 858                                      <GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>,
 859                                      <GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>,
 860                                      <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>,
 861                                      <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>,
 862                                      <GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>,
 863                                      <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
 864                         interrupt-names = "error",
 865                                         "ch0", "ch1", "ch2", "ch3",
 866                                         "ch4", "ch5", "ch6", "ch7",
 867                                         "ch8", "ch9", "ch10", "ch11",
 868                                         "ch12", "ch13", "ch14", "ch15";
 869                         clocks = <&cpg CPG_MOD 217>;
 870                         clock-names = "fck";
 871                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 872                         resets = <&cpg 217>;
 873                         #dma-cells = <1>;
 874                         dma-channels = <16>;
 875                         iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>,
 876                                <&ipmmu_ds1 18>, <&ipmmu_ds1 19>,
 877                                <&ipmmu_ds1 20>, <&ipmmu_ds1 21>,
 878                                <&ipmmu_ds1 22>, <&ipmmu_ds1 23>,
 879                                <&ipmmu_ds1 24>, <&ipmmu_ds1 25>,
 880                                <&ipmmu_ds1 26>, <&ipmmu_ds1 27>,
 881                                <&ipmmu_ds1 28>, <&ipmmu_ds1 29>,
 882                                <&ipmmu_ds1 30>, <&ipmmu_ds1 31>;
 883                 };
 884
 885                 ipmmu_ds0: iommu@e6740000 {
 886                         compatible = "renesas,ipmmu-r8a77990";
 887                         reg = <0 0xe6740000 0 0x1000>;
 888                         renesas,ipmmu-main = <&ipmmu_mm 0>;
 889                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 890                         #iommu-cells = <1>;
 891                 };
 892
 893                 ipmmu_ds1: iommu@e7740000 {
 894                         compatible = "renesas,ipmmu-r8a77990";
 895                         reg = <0 0xe7740000 0 0x1000>;
 896                         renesas,ipmmu-main = <&ipmmu_mm 1>;
 897                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 898                         #iommu-cells = <1>;
 899                 };
 900
 901                 ipmmu_hc: iommu@e6570000 {
 902                         compatible = "renesas,ipmmu-r8a77990";
 903                         reg = <0 0xe6570000 0 0x1000>;
 904                         renesas,ipmmu-main = <&ipmmu_mm 2>;
 905                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 906                         #iommu-cells = <1>;
 907                 };
 908
 909                 ipmmu_mm: iommu@e67b0000 {
 910                         compatible = "renesas,ipmmu-r8a77990";
 911                         reg = <0 0xe67b0000 0 0x1000>;
 912                         interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
 913                                      <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
 914                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 915                         #iommu-cells = <1>;
 916                 };
 917
 918                 ipmmu_mp: iommu@ec670000 {
 919                         compatible = "renesas,ipmmu-r8a77990";
 920                         reg = <0 0xec670000 0 0x1000>;
 921                         renesas,ipmmu-main = <&ipmmu_mm 4>;
 922                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 923                         #iommu-cells = <1>;
 924                 };
 925
 926                 ipmmu_pv0: iommu@fd800000 {
 927                         compatible = "renesas,ipmmu-r8a77990";
 928                         reg = <0 0xfd800000 0 0x1000>;
 929                         renesas,ipmmu-main = <&ipmmu_mm 6>;
 930                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 931                         #iommu-cells = <1>;
 932                 };
 933
 934                 ipmmu_rt: iommu@ffc80000 {
 935                         compatible = "renesas,ipmmu-r8a77990";
 936                         reg = <0 0xffc80000 0 0x1000>;
 937                         renesas,ipmmu-main = <&ipmmu_mm 10>;
 938                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 939                         #iommu-cells = <1>;
 940                 };
 941
 942                 ipmmu_vc0: iommu@fe6b0000 {
 943                         compatible = "renesas,ipmmu-r8a77990";
 944                         reg = <0 0xfe6b0000 0 0x1000>;
 945                         renesas,ipmmu-main = <&ipmmu_mm 12>;
 946                         power-domains = <&sysc R8A77990_PD_A3VC>;
 947                         #iommu-cells = <1>;
 948                 };
 949
 950                 ipmmu_vi0: iommu@febd0000 {
 951                         compatible = "renesas,ipmmu-r8a77990";
 952                         reg = <0 0xfebd0000 0 0x1000>;
 953                         renesas,ipmmu-main = <&ipmmu_mm 14>;
 954                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 955                         #iommu-cells = <1>;
 956                 };
 957
 958                 ipmmu_vp0: iommu@fe990000 {
 959                         compatible = "renesas,ipmmu-r8a77990";
 960                         reg = <0 0xfe990000 0 0x1000>;
 961                         renesas,ipmmu-main = <&ipmmu_mm 16>;
 962                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 963                         #iommu-cells = <1>;
 964                 };
 965
 966                 avb: ethernet@e6800000 {
 967                         compatible = "renesas,etheravb-r8a77990",
 968                                      "renesas,etheravb-rcar-gen3";
 969                         reg = <0 0xe6800000 0 0x800>;
 970                         interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
 971                                      <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
 972                                      <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
 973                                      <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
 974                                      <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
 975                                      <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
 976                                      <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
 977                                      <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
 978                                      <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
 979                                      <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
 980                                      <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
 981                                      <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
 982                                      <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
 983                                      <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
 984                                      <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
 985                                      <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
 986                                      <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
 987                                      <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
 988                                      <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
 989                                      <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
 990                                      <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
 991                                      <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
 992                                      <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
 993                                      <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
 994                                      <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
 995                         interrupt-names = "ch0", "ch1", "ch2", "ch3",
 996                                           "ch4", "ch5", "ch6", "ch7",
 997                                           "ch8", "ch9", "ch10", "ch11",
 998                                           "ch12", "ch13", "ch14", "ch15",
 999                                           "ch16", "ch17", "ch18", "ch19",
1000                                           "ch20", "ch21", "ch22", "ch23",
1001                                           "ch24";
1002                         clocks = <&cpg CPG_MOD 812>;
1003                         clock-names = "fck";
1004                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1005                         resets = <&cpg 812>;
1006                         phy-mode = "rgmii";
1007                         rx-internal-delay-ps = <0>;
1008                         iommus = <&ipmmu_ds0 16>;
1009                         #address-cells = <1>;
1010                         #size-cells = <0>;
1011                         status = "disabled";
1012                 };
1013
1014                 can0: can@e6c30000 {
1015                         compatible = "renesas,can-r8a77990",
1016                                      "renesas,rcar-gen3-can";
1017                         reg = <0 0xe6c30000 0 0x1000>;
1018                         interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
1019                         clocks = <&cpg CPG_MOD 916>,
1020                                <&cpg CPG_CORE R8A77990_CLK_CANFD>,
1021                                <&can_clk>;
1022                         clock-names = "clkp1", "clkp2", "can_clk";
1023                         assigned-clocks = <&cpg CPG_CORE R8A77990_CLK_CANFD>;
1024                         assigned-clock-rates = <40000000>;
1025                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1026                         resets = <&cpg 916>;
1027                         status = "disabled";
1028                 };
1029
1030                 can1: can@e6c38000 {
1031                         compatible = "renesas,can-r8a77990",
1032                                      "renesas,rcar-gen3-can";
1033                         reg = <0 0xe6c38000 0 0x1000>;
1034                         interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
1035                         clocks = <&cpg CPG_MOD 915>,
1036                                <&cpg CPG_CORE R8A77990_CLK_CANFD>,
1037                                <&can_clk>;
1038                         clock-names = "clkp1", "clkp2", "can_clk";
1039                         assigned-clocks = <&cpg CPG_CORE R8A77990_CLK_CANFD>;
1040                         assigned-clock-rates = <40000000>;
1041                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1042                         resets = <&cpg 915>;
1043                         status = "disabled";
1044                 };
1045
1046                 canfd: can@e66c0000 {
1047                         compatible = "renesas,r8a77990-canfd",
1048                                      "renesas,rcar-gen3-canfd";
1049                         reg = <0 0xe66c0000 0 0x8000>;
1050                         interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
1051                                    <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
1052                         clocks = <&cpg CPG_MOD 914>,
1053                                <&cpg CPG_CORE R8A77990_CLK_CANFD>,
1054                                <&can_clk>;
1055                         clock-names = "fck", "canfd", "can_clk";
1056                         assigned-clocks = <&cpg CPG_CORE R8A77990_CLK_CANFD>;
1057                         assigned-clock-rates = <40000000>;
1058                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1059                         resets = <&cpg 914>;
1060                         status = "disabled";
1061
1062                         channel0 {
1063                                 status = "disabled";
1064                         };
1065
1066                         channel1 {
1067                                 status = "disabled";
1068                         };
1069                 };
1070
1071                 pwm0: pwm@e6e30000 {
1072                         compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar";
1073                         reg = <0 0xe6e30000 0 0x8>;
1074                         clocks = <&cpg CPG_MOD 523>;
1075                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1076                         resets = <&cpg 523>;
1077                         #pwm-cells = <2>;
1078                         status = "disabled";
1079                 };
1080
1081                 pwm1: pwm@e6e31000 {
1082                         compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar";
1083                         reg = <0 0xe6e31000 0 0x8>;
1084                         clocks = <&cpg CPG_MOD 523>;
1085                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1086                         resets = <&cpg 523>;
1087                         #pwm-cells = <2>;
1088                         status = "disabled";
1089                 };
1090
1091                 pwm2: pwm@e6e32000 {
1092                         compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar";
1093                         reg = <0 0xe6e32000 0 0x8>;
1094                         clocks = <&cpg CPG_MOD 523>;
1095                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1096                         resets = <&cpg 523>;
1097                         #pwm-cells = <2>;
1098                         status = "disabled";
1099                 };
1100
1101                 pwm3: pwm@e6e33000 {
1102                         compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar";
1103                         reg = <0 0xe6e33000 0 0x8>;
1104                         clocks = <&cpg CPG_MOD 523>;
1105                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1106                         resets = <&cpg 523>;
1107                         #pwm-cells = <2>;
1108                         status = "disabled";
1109                 };
1110
1111                 pwm4: pwm@e6e34000 {
1112                         compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar";
1113                         reg = <0 0xe6e34000 0 0x8>;
1114                         clocks = <&cpg CPG_MOD 523>;
1115                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1116                         resets = <&cpg 523>;
1117                         #pwm-cells = <2>;
1118                         status = "disabled";
1119                 };
1120
1121                 pwm5: pwm@e6e35000 {
1122                         compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar";
1123                         reg = <0 0xe6e35000 0 0x8>;
1124                         clocks = <&cpg CPG_MOD 523>;
1125                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1126                         resets = <&cpg 523>;
1127                         #pwm-cells = <2>;
1128                         status = "disabled";
1129                 };
1130
1131                 pwm6: pwm@e6e36000 {
1132                         compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar";
1133                         reg = <0 0xe6e36000 0 0x8>;
1134                         clocks = <&cpg CPG_MOD 523>;
1135                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1136                         resets = <&cpg 523>;
1137                         #pwm-cells = <2>;
1138                         status = "disabled";
1139                 };
1140
1141                 scif0: serial@e6e60000 {
1142                         compatible = "renesas,scif-r8a77990",
1143                                      "renesas,rcar-gen3-scif", "renesas,scif";
1144                         reg = <0 0xe6e60000 0 64>;
1145                         interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
1146                         clocks = <&cpg CPG_MOD 207>,
1147                                  <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
1148                                  <&scif_clk>;
1149                         clock-names = "fck", "brg_int", "scif_clk";
1150                         dmas = <&dmac1 0x51>, <&dmac1 0x50>,
1151                                <&dmac2 0x51>, <&dmac2 0x50>;
1152                         dma-names = "tx", "rx", "tx", "rx";
1153                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1154                         resets = <&cpg 207>;
1155                         status = "disabled";
1156                 };
1157
1158                 scif1: serial@e6e68000 {
1159                         compatible = "renesas,scif-r8a77990",
1160                                      "renesas,rcar-gen3-scif", "renesas,scif";
1161                         reg = <0 0xe6e68000 0 64>;
1162                         interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
1163                         clocks = <&cpg CPG_MOD 206>,
1164                                  <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
1165                                  <&scif_clk>;
1166                         clock-names = "fck", "brg_int", "scif_clk";
1167                         dmas = <&dmac1 0x53>, <&dmac1 0x52>,
1168                                <&dmac2 0x53>, <&dmac2 0x52>;
1169                         dma-names = "tx", "rx", "tx", "rx";
1170                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1171                         resets = <&cpg 206>;
1172                         status = "disabled";
1173                 };
1174
1175                 scif2: serial@e6e88000 {
1176                         compatible = "renesas,scif-r8a77990",
1177                                      "renesas,rcar-gen3-scif", "renesas,scif";
1178                         reg = <0 0xe6e88000 0 64>;
1179                         interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
1180                         clocks = <&cpg CPG_MOD 310>,
1181                                  <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
1182                                  <&scif_clk>;
1183                         clock-names = "fck", "brg_int", "scif_clk";
1184                         dmas = <&dmac1 0x13>, <&dmac1 0x12>,
1185                                <&dmac2 0x13>, <&dmac2 0x12>;
1186                         dma-names = "tx", "rx", "tx", "rx";
1187                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1188                         resets = <&cpg 310>;
1189                         status = "disabled";
1190                 };
1191
1192                 scif3: serial@e6c50000 {
1193                         compatible = "renesas,scif-r8a77990",
1194                                      "renesas,rcar-gen3-scif", "renesas,scif";
1195                         reg = <0 0xe6c50000 0 64>;
1196                         interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
1197                         clocks = <&cpg CPG_MOD 204>,
1198                                  <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
1199                                  <&scif_clk>;
1200                         clock-names = "fck", "brg_int", "scif_clk";
1201                         dmas = <&dmac0 0x57>, <&dmac0 0x56>;
1202                         dma-names = "tx", "rx";
1203                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1204                         resets = <&cpg 204>;
1205                         status = "disabled";
1206                 };
1207
1208                 scif4: serial@e6c40000 {
1209                         compatible = "renesas,scif-r8a77990",
1210                                      "renesas,rcar-gen3-scif", "renesas,scif";
1211                         reg = <0 0xe6c40000 0 64>;
1212                         interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
1213                         clocks = <&cpg CPG_MOD 203>,
1214                                  <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
1215                                  <&scif_clk>;
1216                         clock-names = "fck", "brg_int", "scif_clk";
1217                         dmas = <&dmac0 0x59>, <&dmac0 0x58>;
1218                         dma-names = "tx", "rx";
1219                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1220                         resets = <&cpg 203>;
1221                         status = "disabled";
1222                 };
1223
1224                 scif5: serial@e6f30000 {
1225                         compatible = "renesas,scif-r8a77990",
1226                                      "renesas,rcar-gen3-scif", "renesas,scif";
1227                         reg = <0 0xe6f30000 0 64>;
1228                         interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
1229                         clocks = <&cpg CPG_MOD 202>,
1230                                  <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
1231                                  <&scif_clk>;
1232                         clock-names = "fck", "brg_int", "scif_clk";
1233                         dmas = <&dmac0 0x5b>, <&dmac0 0x5a>;
1234                         dma-names = "tx", "rx";
1235                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1236                         resets = <&cpg 202>;
1237                         status = "disabled";
1238                 };
1239
1240                 msiof0: spi@e6e90000 {
1241                         compatible = "renesas,msiof-r8a77990",
1242                                      "renesas,rcar-gen3-msiof";
1243                         reg = <0 0xe6e90000 0 0x0064>;
1244                         interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
1245                         clocks = <&cpg CPG_MOD 211>;
1246                         dmas = <&dmac1 0x41>, <&dmac1 0x40>,
1247                                <&dmac2 0x41>, <&dmac2 0x40>;
1248                         dma-names = "tx", "rx", "tx", "rx";
1249                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1250                         resets = <&cpg 211>;
1251                         #address-cells = <1>;
1252                         #size-cells = <0>;
1253                         status = "disabled";
1254                 };
1255
1256                 msiof1: spi@e6ea0000 {
1257                         compatible = "renesas,msiof-r8a77990",
1258                                      "renesas,rcar-gen3-msiof";
1259                         reg = <0 0xe6ea0000 0 0x0064>;
1260                         interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
1261                         clocks = <&cpg CPG_MOD 210>;
1262                         dmas = <&dmac0 0x43>, <&dmac0 0x42>;
1263                         dma-names = "tx", "rx";
1264                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1265                         resets = <&cpg 210>;
1266                         #address-cells = <1>;
1267                         #size-cells = <0>;
1268                         status = "disabled";
1269                 };
1270
1271                 msiof2: spi@e6c00000 {
1272                         compatible = "renesas,msiof-r8a77990",
1273                                      "renesas,rcar-gen3-msiof";
1274                         reg = <0 0xe6c00000 0 0x0064>;
1275                         interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
1276                         clocks = <&cpg CPG_MOD 209>;
1277                         dmas = <&dmac0 0x45>, <&dmac0 0x44>;
1278                         dma-names = "tx", "rx";
1279                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1280                         resets = <&cpg 209>;
1281                         #address-cells = <1>;
1282                         #size-cells = <0>;
1283                         status = "disabled";
1284                 };
1285
1286                 msiof3: spi@e6c10000 {
1287                         compatible = "renesas,msiof-r8a77990",
1288                                      "renesas,rcar-gen3-msiof";
1289                         reg = <0 0xe6c10000 0 0x0064>;
1290                         interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
1291                         clocks = <&cpg CPG_MOD 208>;
1292                         dmas = <&dmac0 0x47>, <&dmac0 0x46>;
1293                         dma-names = "tx", "rx";
1294                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1295                         resets = <&cpg 208>;
1296                         #address-cells = <1>;
1297                         #size-cells = <0>;
1298                         status = "disabled";
1299                 };
1300
1301                 vin4: video@e6ef4000 {
1302                         compatible = "renesas,vin-r8a77990";
1303                         reg = <0 0xe6ef4000 0 0x1000>;
1304                         interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
1305                         clocks = <&cpg CPG_MOD 807>;
1306                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1307                         resets = <&cpg 807>;
1308                         renesas,id = <4>;
1309                         status = "disabled";
1310
1311                         ports {
1312                                 #address-cells = <1>;
1313                                 #size-cells = <0>;
1314
1315                                 port@1 {
1316                                         #address-cells = <1>;
1317                                         #size-cells = <0>;
1318
1319                                         reg = <1>;
1320
1321                                         vin4csi40: endpoint@2 {
1322                                                 reg = <2>;
1323                                                 remote-endpoint= <&csi40vin4>;
1324                                         };
1325                                 };
1326                         };
1327                 };
1328
1329                 vin5: video@e6ef5000 {
1330                         compatible = "renesas,vin-r8a77990";
1331                         reg = <0 0xe6ef5000 0 0x1000>;
1332                         interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
1333                         clocks = <&cpg CPG_MOD 806>;
1334                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1335                         resets = <&cpg 806>;
1336                         renesas,id = <5>;
1337                         status = "disabled";
1338
1339                         ports {
1340                                 #address-cells = <1>;
1341                                 #size-cells = <0>;
1342
1343                                 port@1 {
1344                                         #address-cells = <1>;
1345                                         #size-cells = <0>;
1346
1347                                         reg = <1>;
1348
1349                                         vin5csi40: endpoint@2 {
1350                                                 reg = <2>;
1351                                                 remote-endpoint= <&csi40vin5>;
1352                                         };
1353                                 };
1354                         };
1355                 };
1356
1357                 drif00: rif@e6f40000 {
1358                         compatible = "renesas,r8a77990-drif",
1359                                      "renesas,rcar-gen3-drif";
1360                         reg = <0 0xe6f40000 0 0x84>;
1361                         interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
1362                         clocks = <&cpg CPG_MOD 515>;
1363                         clock-names = "fck";
1364                         dmas = <&dmac1 0x20>, <&dmac2 0x20>;
1365                         dma-names = "rx", "rx";
1366                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1367                         resets = <&cpg 515>;
1368                         renesas,bonding = <&drif01>;
1369                         status = "disabled";
1370                 };
1371
1372                 drif01: rif@e6f50000 {
1373                         compatible = "renesas,r8a77990-drif",
1374                                      "renesas,rcar-gen3-drif";
1375                         reg = <0 0xe6f50000 0 0x84>;
1376                         interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
1377                         clocks = <&cpg CPG_MOD 514>;
1378                         clock-names = "fck";
1379                         dmas = <&dmac1 0x22>, <&dmac2 0x22>;
1380                         dma-names = "rx", "rx";
1381                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1382                         resets = <&cpg 514>;
1383                         renesas,bonding = <&drif00>;
1384                         status = "disabled";
1385                 };
1386
1387                 drif10: rif@e6f60000 {
1388                         compatible = "renesas,r8a77990-drif",
1389                                      "renesas,rcar-gen3-drif";
1390                         reg = <0 0xe6f60000 0 0x84>;
1391                         interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
1392                         clocks = <&cpg CPG_MOD 513>;
1393                         clock-names = "fck";
1394                         dmas = <&dmac1 0x24>, <&dmac2 0x24>;
1395                         dma-names = "rx", "rx";
1396                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1397                         resets = <&cpg 513>;
1398                         renesas,bonding = <&drif11>;
1399                         status = "disabled";
1400                 };
1401
1402                 drif11: rif@e6f70000 {
1403                         compatible = "renesas,r8a77990-drif",
1404                                      "renesas,rcar-gen3-drif";
1405                         reg = <0 0xe6f70000 0 0x84>;
1406                         interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
1407                         clocks = <&cpg CPG_MOD 512>;
1408                         clock-names = "fck";
1409                         dmas = <&dmac1 0x26>, <&dmac2 0x26>;
1410                         dma-names = "rx", "rx";
1411                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1412                         resets = <&cpg 512>;
1413                         renesas,bonding = <&drif10>;
1414                         status = "disabled";
1415                 };
1416
1417                 drif20: rif@e6f80000 {
1418                         compatible = "renesas,r8a77990-drif",
1419                                      "renesas,rcar-gen3-drif";
1420                         reg = <0 0xe6f80000 0 0x84>;
1421                         interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
1422                         clocks = <&cpg CPG_MOD 511>;
1423                         clock-names = "fck";
1424                         dmas = <&dmac0 0x28>;
1425                         dma-names = "rx";
1426                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1427                         resets = <&cpg 511>;
1428                         renesas,bonding = <&drif21>;
1429                         status = "disabled";
1430                 };
1431
1432                 drif21: rif@e6f90000 {
1433                         compatible = "renesas,r8a77990-drif",
1434                                      "renesas,rcar-gen3-drif";
1435                         reg = <0 0xe6f90000 0 0x84>;
1436                         interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
1437                         clocks = <&cpg CPG_MOD 510>;
1438                         clock-names = "fck";
1439                         dmas = <&dmac0 0x2a>;
1440                         dma-names = "rx";
1441                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1442                         resets = <&cpg 510>;
1443                         renesas,bonding = <&drif20>;
1444                         status = "disabled";
1445                 };
1446
1447                 drif30: rif@e6fa0000 {
1448                         compatible = "renesas,r8a77990-drif",
1449                                      "renesas,rcar-gen3-drif";
1450                         reg = <0 0xe6fa0000 0 0x84>;
1451                         interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
1452                         clocks = <&cpg CPG_MOD 509>;
1453                         clock-names = "fck";
1454                         dmas = <&dmac0 0x2c>;
1455                         dma-names = "rx";
1456                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1457                         resets = <&cpg 509>;
1458                         renesas,bonding = <&drif31>;
1459                         status = "disabled";
1460                 };
1461
1462                 drif31: rif@e6fb0000 {
1463                         compatible = "renesas,r8a77990-drif",
1464                                      "renesas,rcar-gen3-drif";
1465                         reg = <0 0xe6fb0000 0 0x84>;
1466                         interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
1467                         clocks = <&cpg CPG_MOD 508>;
1468                         clock-names = "fck";
1469                         dmas = <&dmac0 0x2e>;
1470                         dma-names = "rx";
1471                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1472                         resets = <&cpg 508>;
1473                         renesas,bonding = <&drif30>;
1474                         status = "disabled";
1475                 };
1476
1477                 rcar_sound: sound@ec500000 {
1478                         /*
1479                          * #sound-dai-cells is required
1480                          *
1481                          * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1482                          * Multi  DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
1483                          */
1484                         /*
1485                          * #clock-cells is required for audio_clkout0/1/2/3
1486                          *
1487                          * clkout       : #clock-cells = <0>;   <&rcar_sound>;
1488                          * clkout0/1/2/3: #clock-cells = <1>;   <&rcar_sound N>;
1489                          */
1490                         compatible =  "renesas,rcar_sound-r8a77990", "renesas,rcar_sound-gen3";
1491                         reg =   <0 0xec500000 0 0x1000>, /* SCU */
1492                                 <0 0xec5a0000 0 0x100>,  /* ADG */
1493                                 <0 0xec540000 0 0x1000>, /* SSIU */
1494                                 <0 0xec541000 0 0x280>,  /* SSI */
1495                                 <0 0xec760000 0 0x200>;  /* Audio DMAC peri peri*/
1496                         reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1497
1498                         clocks = <&cpg CPG_MOD 1005>,
1499                                  <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1500                                  <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1501                                  <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1502                                  <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1503                                  <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1504                                  <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1505                                  <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1506                                  <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1507                                  <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1508                                  <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1509                                  <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1510                                  <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1511                                  <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1512                                  <&audio_clk_a>, <&audio_clk_b>,
1513                                  <&audio_clk_c>,
1514                                  <&cpg CPG_CORE R8A77990_CLK_ZA2>;
1515                         clock-names = "ssi-all",
1516                                       "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1517                                       "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1518                                       "ssi.1", "ssi.0",
1519                                       "src.9", "src.8", "src.7", "src.6",
1520                                       "src.5", "src.4", "src.3", "src.2",
1521                                       "src.1", "src.0",
1522                                       "mix.1", "mix.0",
1523                                       "ctu.1", "ctu.0",
1524                                       "dvc.0", "dvc.1",
1525                                       "clk_a", "clk_b", "clk_c", "clk_i";
1526                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1527                         resets = <&cpg 1005>,
1528                                  <&cpg 1006>, <&cpg 1007>,
1529                                  <&cpg 1008>, <&cpg 1009>,
1530                                  <&cpg 1010>, <&cpg 1011>,
1531                                  <&cpg 1012>, <&cpg 1013>,
1532                                  <&cpg 1014>, <&cpg 1015>;
1533                         reset-names = "ssi-all",
1534                                       "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1535                                       "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1536                                       "ssi.1", "ssi.0";
1537                         status = "disabled";
1538
1539                         rcar_sound,ctu {
1540                                 ctu00: ctu-0 { };
1541                                 ctu01: ctu-1 { };
1542                                 ctu02: ctu-2 { };
1543                                 ctu03: ctu-3 { };
1544                                 ctu10: ctu-4 { };
1545                                 ctu11: ctu-5 { };
1546                                 ctu12: ctu-6 { };
1547                                 ctu13: ctu-7 { };
1548                         };
1549
1550                         rcar_sound,dvc {
1551                                 dvc0: dvc-0 {
1552                                         dmas = <&audma0 0xbc>;
1553                                         dma-names = "tx";
1554                                 };
1555                                 dvc1: dvc-1 {
1556                                         dmas = <&audma0 0xbe>;
1557                                         dma-names = "tx";
1558                                 };
1559                         };
1560
1561                         rcar_sound,mix {
1562                                 mix0: mix-0 { };
1563                                 mix1: mix-1 { };
1564                         };
1565
1566                         rcar_sound,src {
1567                                 src0: src-0 {
1568                                         interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
1569                                         dmas = <&audma0 0x85>, <&audma0 0x9a>;
1570                                         dma-names = "rx", "tx";
1571                                 };
1572                                 src1: src-1 {
1573                                         interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1574                                         dmas = <&audma0 0x87>, <&audma0 0x9c>;
1575                                         dma-names = "rx", "tx";
1576                                 };
1577                                 src2: src-2 {
1578                                         interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1579                                         dmas = <&audma0 0x89>, <&audma0 0x9e>;
1580                                         dma-names = "rx", "tx";
1581                                 };
1582                                 src3: src-3 {
1583                                         interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1584                                         dmas = <&audma0 0x8b>, <&audma0 0xa0>;
1585                                         dma-names = "rx", "tx";
1586                                 };
1587                                 src4: src-4 {
1588                                         interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1589                                         dmas = <&audma0 0x8d>, <&audma0 0xb0>;
1590                                         dma-names = "rx", "tx";
1591                                 };
1592                                 src5: src-5 {
1593                                         interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1594                                         dmas = <&audma0 0x8f>, <&audma0 0xb2>;
1595                                         dma-names = "rx", "tx";
1596                                 };
1597                                 src6: src-6 {
1598                                         interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1599                                         dmas = <&audma0 0x91>, <&audma0 0xb4>;
1600                                         dma-names = "rx", "tx";
1601                                 };
1602                                 src7: src-7 {
1603                                         interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
1604                                         dmas = <&audma0 0x93>, <&audma0 0xb6>;
1605                                         dma-names = "rx", "tx";
1606                                 };
1607                                 src8: src-8 {
1608                                         interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1609                                         dmas = <&audma0 0x95>, <&audma0 0xb8>;
1610                                         dma-names = "rx", "tx";
1611                                 };
1612                                 src9: src-9 {
1613                                         interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
1614                                         dmas = <&audma0 0x97>, <&audma0 0xba>;
1615                                         dma-names = "rx", "tx";
1616                                 };
1617                         };
1618
1619                         rcar_sound,ssi {
1620                                 ssi0: ssi-0 {
1621                                         interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
1622                                         dmas = <&audma0 0x01>, <&audma0 0x02>,
1623                                                <&audma0 0x15>, <&audma0 0x16>;
1624                                         dma-names = "rx", "tx", "rxu", "txu";
1625                                 };
1626                                 ssi1: ssi-1 {
1627                                         interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
1628                                         dmas = <&audma0 0x03>, <&audma0 0x04>,
1629                                                <&audma0 0x49>, <&audma0 0x4a>;
1630                                         dma-names = "rx", "tx", "rxu", "txu";
1631                                 };
1632                                 ssi2: ssi-2 {
1633                                         interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
1634                                         dmas = <&audma0 0x05>, <&audma0 0x06>,
1635                                                <&audma0 0x63>, <&audma0 0x64>;
1636                                         dma-names = "rx", "tx", "rxu", "txu";
1637                                 };
1638                                 ssi3: ssi-3 {
1639                                         interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
1640                                         dmas = <&audma0 0x07>, <&audma0 0x08>,
1641                                                <&audma0 0x6f>, <&audma0 0x70>;
1642                                         dma-names = "rx", "tx", "rxu", "txu";
1643                                 };
1644                                 ssi4: ssi-4 {
1645                                         interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
1646                                         dmas = <&audma0 0x09>, <&audma0 0x0a>,
1647                                                <&audma0 0x71>, <&audma0 0x72>;
1648                                         dma-names = "rx", "tx", "rxu", "txu";
1649                                 };
1650                                 ssi5: ssi-5 {
1651                                         interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
1652                                         dmas = <&audma0 0x0b>, <&audma0 0x0c>,
1653                                                <&audma0 0x73>, <&audma0 0x74>;
1654                                         dma-names = "rx", "tx", "rxu", "txu";
1655                                 };
1656                                 ssi6: ssi-6 {
1657                                         interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
1658                                         dmas = <&audma0 0x0d>, <&audma0 0x0e>,
1659                                                <&audma0 0x75>, <&audma0 0x76>;
1660                                         dma-names = "rx", "tx", "rxu", "txu";
1661                                 };
1662                                 ssi7: ssi-7 {
1663                                         interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
1664                                         dmas = <&audma0 0x0f>, <&audma0 0x10>,
1665                                                <&audma0 0x79>, <&audma0 0x7a>;
1666                                         dma-names = "rx", "tx", "rxu", "txu";
1667                                 };
1668                                 ssi8: ssi-8 {
1669                                         interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
1670                                         dmas = <&audma0 0x11>, <&audma0 0x12>,
1671                                                <&audma0 0x7b>, <&audma0 0x7c>;
1672                                         dma-names = "rx", "tx", "rxu", "txu";
1673                                 };
1674                                 ssi9: ssi-9 {
1675                                         interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
1676                                         dmas = <&audma0 0x13>, <&audma0 0x14>,
1677                                                <&audma0 0x7d>, <&audma0 0x7e>;
1678                                         dma-names = "rx", "tx", "rxu", "txu";
1679                                 };
1680                         };
1681                 };
1682
1683                 audma0: dma-controller@ec700000 {
1684                         compatible = "renesas,dmac-r8a77990",
1685                                      "renesas,rcar-dmac";
1686                         reg = <0 0xec700000 0 0x10000>;
1687                         interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>,
1688                                      <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
1689                                      <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>,
1690                                      <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,
1691                                      <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>,
1692                                      <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
1693                                      <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>,
1694                                      <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
1695                                      <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>,
1696                                      <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>,
1697                                      <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,
1698                                      <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
1699                                      <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>,
1700                                      <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>,
1701                                      <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>,
1702                                      <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
1703                                      <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
1704                         interrupt-names = "error",
1705                                         "ch0", "ch1", "ch2", "ch3",
1706                                         "ch4", "ch5", "ch6", "ch7",
1707                                         "ch8", "ch9", "ch10", "ch11",
1708                                         "ch12", "ch13", "ch14", "ch15";
1709                         clocks = <&cpg CPG_MOD 502>;
1710                         clock-names = "fck";
1711                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1712                         resets = <&cpg 502>;
1713                         #dma-cells = <1>;
1714                         dma-channels = <16>;
1715                         iommus = <&ipmmu_mp 0>, <&ipmmu_mp 1>,
1716                                  <&ipmmu_mp 2>, <&ipmmu_mp 3>,
1717                                  <&ipmmu_mp 4>, <&ipmmu_mp 5>,
1718                                  <&ipmmu_mp 6>, <&ipmmu_mp 7>,
1719                                  <&ipmmu_mp 8>, <&ipmmu_mp 9>,
1720                                  <&ipmmu_mp 10>, <&ipmmu_mp 11>,
1721                                  <&ipmmu_mp 12>, <&ipmmu_mp 13>,
1722                                  <&ipmmu_mp 14>, <&ipmmu_mp 15>;
1723                 };
1724
1725                 xhci0: usb@ee000000 {
1726                         compatible = "renesas,xhci-r8a77990",
1727                                      "renesas,rcar-gen3-xhci";
1728                         reg = <0 0xee000000 0 0xc00>;
1729                         interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
1730                         clocks = <&cpg CPG_MOD 328>;
1731                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1732                         resets = <&cpg 328>;
1733                         status = "disabled";
1734                 };
1735
1736                 usb3_peri0: usb@ee020000 {
1737                         compatible = "renesas,r8a77990-usb3-peri",
1738                                      "renesas,rcar-gen3-usb3-peri";
1739                         reg = <0 0xee020000 0 0x400>;
1740                         interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
1741                         clocks = <&cpg CPG_MOD 328>;
1742                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1743                         resets = <&cpg 328>;
1744                         status = "disabled";
1745                 };
1746
1747                 ohci0: usb@ee080000 {
1748                         compatible = "generic-ohci";
1749                         reg = <0 0xee080000 0 0x100>;
1750                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1751                         clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
1752                         phys = <&usb2_phy0 1>;
1753                         phy-names = "usb";
1754                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1755                         resets = <&cpg 703>, <&cpg 704>;
1756                         status = "disabled";
1757                 };
1758
1759                 ehci0: usb@ee080100 {
1760                         compatible = "generic-ehci";
1761                         reg = <0 0xee080100 0 0x100>;
1762                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1763                         clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
1764                         phys = <&usb2_phy0 2>;
1765                         phy-names = "usb";
1766                         companion = <&ohci0>;
1767                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1768                         resets = <&cpg 703>, <&cpg 704>;
1769                         status = "disabled";
1770                 };
1771
1772                 usb2_phy0: usb-phy@ee080200 {
1773                         compatible = "renesas,usb2-phy-r8a77990",
1774                                      "renesas,rcar-gen3-usb2-phy";
1775                         reg = <0 0xee080200 0 0x700>;
1776                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1777                         clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
1778                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1779                         resets = <&cpg 703>, <&cpg 704>;
1780                         #phy-cells = <1>;
1781                         status = "disabled";
1782                 };
1783
1784                 sdhi0: mmc@ee100000 {
1785                         compatible = "renesas,sdhi-r8a77990",
1786                                      "renesas,rcar-gen3-sdhi";
1787                         reg = <0 0xee100000 0 0x2000>;
1788                         interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
1789                         clocks = <&cpg CPG_MOD 314>;
1790                         max-frequency = <200000000>;
1791                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1792                         resets = <&cpg 314>;
1793                         iommus = <&ipmmu_ds1 32>;
1794                         status = "disabled";
1795                 };
1796
1797                 sdhi1: mmc@ee120000 {
1798                         compatible = "renesas,sdhi-r8a77990",
1799                                      "renesas,rcar-gen3-sdhi";
1800                         reg = <0 0xee120000 0 0x2000>;
1801                         interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
1802                         clocks = <&cpg CPG_MOD 313>;
1803                         max-frequency = <200000000>;
1804                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1805                         resets = <&cpg 313>;
1806                         iommus = <&ipmmu_ds1 33>;
1807                         status = "disabled";
1808                 };
1809
1810                 sdhi3: mmc@ee160000 {
1811                         compatible = "renesas,sdhi-r8a77990",
1812                                      "renesas,rcar-gen3-sdhi";
1813                         reg = <0 0xee160000 0 0x2000>;
1814                         interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
1815                         clocks = <&cpg CPG_MOD 311>;
1816                         max-frequency = <200000000>;
1817                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1818                         resets = <&cpg 311>;
1819                         iommus = <&ipmmu_ds1 35>;
1820                         status = "disabled";
1821                 };
1822
1823                 gic: interrupt-controller@f1010000 {
1824                         compatible = "arm,gic-400";
1825                         #interrupt-cells = <3>;
1826                         #address-cells = <0>;
1827                         interrupt-controller;
1828                         reg = <0x0 0xf1010000 0 0x1000>,
1829                               <0x0 0xf1020000 0 0x20000>,
1830                               <0x0 0xf1040000 0 0x20000>,
1831                               <0x0 0xf1060000 0 0x20000>;
1832                         interrupts = <GIC_PPI 9
1833                                         (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
1834                         clocks = <&cpg CPG_MOD 408>;
1835                         clock-names = "clk";
1836                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1837                         resets = <&cpg 408>;
1838                 };
1839
1840                 pciec0: pcie@fe000000 {
1841                         compatible = "renesas,pcie-r8a77990",
1842                                      "renesas,pcie-rcar-gen3";
1843                         reg = <0 0xfe000000 0 0x80000>;
1844                         #address-cells = <3>;
1845                         #size-cells = <2>;
1846                         bus-range = <0x00 0xff>;
1847                         device_type = "pci";
1848                         ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>,
1849                                  <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>,
1850                                  <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>,
1851                                  <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
1852                         /* Map all possible DDR as inbound ranges */
1853                         dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>;
1854                         interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
1855                                      <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
1856                                      <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
1857                         #interrupt-cells = <1>;
1858                         interrupt-map-mask = <0 0 0 0>;
1859                         interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
1860                         clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
1861                         clock-names = "pcie", "pcie_bus";
1862                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1863                         resets = <&cpg 319>;
1864                         status = "disabled";
1865                 };
1866
1867                 vspb0: vsp@fe960000 {
1868                         compatible = "renesas,vsp2";
1869                         reg = <0 0xfe960000 0 0x8000>;
1870                         interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
1871                         clocks = <&cpg CPG_MOD 626>;
1872                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1873                         resets = <&cpg 626>;
1874                         renesas,fcp = <&fcpvb0>;
1875                 };
1876
1877                 fcpvb0: fcp@fe96f000 {
1878                         compatible = "renesas,fcpv";
1879                         reg = <0 0xfe96f000 0 0x200>;
1880                         clocks = <&cpg CPG_MOD 607>;
1881                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1882                         resets = <&cpg 607>;
1883                         iommus = <&ipmmu_vp0 5>;
1884                 };
1885
1886                 vspi0: vsp@fe9a0000 {
1887                         compatible = "renesas,vsp2";
1888                         reg = <0 0xfe9a0000 0 0x8000>;
1889                         interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
1890                         clocks = <&cpg CPG_MOD 631>;
1891                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1892                         resets = <&cpg 631>;
1893                         renesas,fcp = <&fcpvi0>;
1894                 };
1895
1896                 fcpvi0: fcp@fe9af000 {
1897                         compatible = "renesas,fcpv";
1898                         reg = <0 0xfe9af000 0 0x200>;
1899                         clocks = <&cpg CPG_MOD 611>;
1900                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1901                         resets = <&cpg 611>;
1902                         iommus = <&ipmmu_vp0 8>;
1903                 };
1904
1905                 vspd0: vsp@fea20000 {
1906                         compatible = "renesas,vsp2";
1907                         reg = <0 0xfea20000 0 0x7000>;
1908                         interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>;
1909                         clocks = <&cpg CPG_MOD 623>;
1910                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1911                         resets = <&cpg 623>;
1912                         renesas,fcp = <&fcpvd0>;
1913                 };
1914
1915                 fcpvd0: fcp@fea27000 {
1916                         compatible = "renesas,fcpv";
1917                         reg = <0 0xfea27000 0 0x200>;
1918                         clocks = <&cpg CPG_MOD 603>;
1919                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1920                         resets = <&cpg 603>;
1921                         iommus = <&ipmmu_vi0 8>;
1922                 };
1923
1924                 vspd1: vsp@fea28000 {
1925                         compatible = "renesas,vsp2";
1926                         reg = <0 0xfea28000 0 0x7000>;
1927                         interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>;
1928                         clocks = <&cpg CPG_MOD 622>;
1929                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1930                         resets = <&cpg 622>;
1931                         renesas,fcp = <&fcpvd1>;
1932                 };
1933
1934                 fcpvd1: fcp@fea2f000 {
1935                         compatible = "renesas,fcpv";
1936                         reg = <0 0xfea2f000 0 0x200>;
1937                         clocks = <&cpg CPG_MOD 602>;
1938                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1939                         resets = <&cpg 602>;
1940                         iommus = <&ipmmu_vi0 9>;
1941                 };
1942
1943                 cmm0: cmm@fea40000 {
1944                         compatible = "renesas,r8a77990-cmm",
1945                                      "renesas,rcar-gen3-cmm";
1946                         reg = <0 0xfea40000 0 0x1000>;
1947                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1948                         clocks = <&cpg CPG_MOD 711>;
1949                         resets = <&cpg 711>;
1950                 };
1951
1952                 cmm1: cmm@fea50000 {
1953                         compatible = "renesas,r8a77990-cmm",
1954                                      "renesas,rcar-gen3-cmm";
1955                         reg = <0 0xfea50000 0 0x1000>;
1956                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1957                         clocks = <&cpg CPG_MOD 710>;
1958                         resets = <&cpg 710>;
1959                 };
1960
1961                 csi40: csi2@feaa0000 {
1962                         compatible = "renesas,r8a77990-csi2";
1963                         reg = <0 0xfeaa0000 0 0x10000>;
1964                         interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
1965                         clocks = <&cpg CPG_MOD 716>;
1966                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1967                         resets = <&cpg 716>;
1968                         status = "disabled";
1969
1970                         ports {
1971                                 #address-cells = <1>;
1972                                 #size-cells = <0>;
1973
1974                                 port@0 {
1975                                         reg = <0>;
1976                                 };
1977
1978                                 port@1 {
1979                                         #address-cells = <1>;
1980                                         #size-cells = <0>;
1981
1982                                         reg = <1>;
1983
1984                                         csi40vin4: endpoint@0 {
1985                                                 reg = <0>;
1986                                                 remote-endpoint = <&vin4csi40>;
1987                                         };
1988                                         csi40vin5: endpoint@1 {
1989                                                 reg = <1>;
1990                                                 remote-endpoint = <&vin5csi40>;
1991                                         };
1992                                 };
1993                         };
1994                 };
1995
1996                 du: display@feb00000 {
1997                         compatible = "renesas,du-r8a77990";
1998                         reg = <0 0xfeb00000 0 0x40000>;
1999                         interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
2000                                      <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
2001                         clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
2002                         clock-names = "du.0", "du.1";
2003                         resets = <&cpg 724>;
2004                         reset-names = "du.0";
2005
2006                         renesas,cmms = <&cmm0>, <&cmm1>;
2007                         renesas,vsps = <&vspd0 0>, <&vspd1 0>;
2008
2009                         status = "disabled";
2010
2011                         ports {
2012                                 #address-cells = <1>;
2013                                 #size-cells = <0>;
2014
2015                                 port@0 {
2016                                         reg = <0>;
2017                                         du_out_rgb: endpoint {
2018                                         };
2019                                 };
2020
2021                                 port@1 {
2022                                         reg = <1>;
2023                                         du_out_lvds0: endpoint {
2024                                                 remote-endpoint = <&lvds0_in>;
2025                                         };
2026                                 };
2027
2028                                 port@2 {
2029                                         reg = <2>;
2030                                         du_out_lvds1: endpoint {
2031                                                 remote-endpoint = <&lvds1_in>;
2032                                         };
2033                                 };
2034                         };
2035                 };
2036
2037                 lvds0: lvds-encoder@feb90000 {
2038                         compatible = "renesas,r8a77990-lvds";
2039                         reg = <0 0xfeb90000 0 0x20>;
2040                         clocks = <&cpg CPG_MOD 727>;
2041                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
2042                         resets = <&cpg 727>;
2043                         status = "disabled";
2044
2045                         renesas,companion = <&lvds1>;
2046
2047                         ports {
2048                                 #address-cells = <1>;
2049                                 #size-cells = <0>;
2050
2051                                 port@0 {
2052                                         reg = <0>;
2053                                         lvds0_in: endpoint {
2054                                                 remote-endpoint = <&du_out_lvds0>;
2055                                         };
2056                                 };
2057
2058                                 port@1 {
2059                                         reg = <1>;
2060                                         lvds0_out: endpoint {
2061                                         };
2062                                 };
2063                         };
2064                 };
2065
2066                 lvds1: lvds-encoder@feb90100 {
2067                         compatible = "renesas,r8a77990-lvds";
2068                         reg = <0 0xfeb90100 0 0x20>;
2069                         clocks = <&cpg CPG_MOD 727>;
2070                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
2071                         resets = <&cpg 726>;
2072                         status = "disabled";
2073
2074                         ports {
2075                                 #address-cells = <1>;
2076                                 #size-cells = <0>;
2077
2078                                 port@0 {
2079                                         reg = <0>;
2080                                         lvds1_in: endpoint {
2081                                                 remote-endpoint = <&du_out_lvds1>;
2082                                         };
2083                                 };
2084
2085                                 port@1 {
2086                                         reg = <1>;
2087                                         lvds1_out: endpoint {
2088                                         };
2089                                 };
2090                         };
2091                 };
2092
2093                 prr: chipid@fff00044 {
2094                         compatible = "renesas,prr";
2095                         reg = <0 0xfff00044 0 4>;
2096                 };
2097         };
2098
2099         thermal-zones {
2100                 cpu-thermal {
2101                         polling-delay-passive = <250>;
2102                         polling-delay = <0>;
2103                         thermal-sensors = <&thermal 0>;
2104                         sustainable-power = <717>;
2105
2106                         cooling-maps {
2107                                 map0 {
2108                                         trip = <&target>;
2109                                         cooling-device = <&a53_0 0 2>;
2110                                         contribution = <1024>;
2111                                 };
2112                         };
2113
2114                         trips {
2115                                 sensor1_crit: sensor1-crit {
2116                                         temperature = <120000>;
2117                                         hysteresis = <2000>;
2118                                         type = "critical";
2119                                 };
2120
2121                                 target: trip-point1 {
2122                                         temperature = <100000>;
2123                                         hysteresis = <2000>;
2124                                         type = "passive";
2125                                 };
2126                         };
2127                 };
2128         };
2129
2130         timer {
2131                 compatible = "arm,armv8-timer";
2132                 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
2133                                       <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
2134                                       <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
2135                                       <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
2136         };
2137 };