arch/arm64/boot/dts/renesas/r8a77990.dtsi

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Device Tree Source for the R-Car E3 (R8A77990) SoC
   4  *
   5  * Copyright (C) 2018-2019 Renesas Electronics Corp.
   6  */
   7
   8 #include <dt-bindings/clock/r8a77990-cpg-mssr.h>
   9 #include <dt-bindings/interrupt-controller/arm-gic.h>
  10 #include <dt-bindings/power/r8a77990-sysc.h>
  11
  12 / {
  13         compatible = "renesas,r8a77990";
  14         #address-cells = <2>;
  15         #size-cells = <2>;
  16
  17         aliases {
  18                 i2c0 = &i2c0;
  19                 i2c1 = &i2c1;
  20                 i2c2 = &i2c2;
  21                 i2c3 = &i2c3;
  22                 i2c4 = &i2c4;
  23                 i2c5 = &i2c5;
  24                 i2c6 = &i2c6;
  25                 i2c7 = &i2c7;
  26         };
  27
  28         /*
  29          * The external audio clocks are configured as 0 Hz fixed frequency
  30          * clocks by default.
  31          * Boards that provide audio clocks should override them.
  32          */
  33         audio_clk_a: audio_clk_a {
  34                 compatible = "fixed-clock";
  35                 #clock-cells = <0>;
  36                 clock-frequency = <0>;
  37         };
  38
  39         audio_clk_b: audio_clk_b {
  40                 compatible = "fixed-clock";
  41                 #clock-cells = <0>;
  42                 clock-frequency = <0>;
  43         };
  44
  45         audio_clk_c: audio_clk_c {
  46                 compatible = "fixed-clock";
  47                 #clock-cells = <0>;
  48                 clock-frequency = <0>;
  49         };
  50
  51         /* External CAN clock - to be overridden by boards that provide it */
  52         can_clk: can {
  53                 compatible = "fixed-clock";
  54                 #clock-cells = <0>;
  55                 clock-frequency = <0>;
  56         };
  57
  58         cluster1_opp: opp_table10 {
  59                 compatible = "operating-points-v2";
  60                 opp-shared;
  61                 opp-800000000 {
  62                         opp-hz = /bits/ 64 <800000000>;
  63                         opp-microvolt = <820000>;
  64                         clock-latency-ns = <300000>;
  65                 };
  66                 opp-1000000000 {
  67                         opp-hz = /bits/ 64 <1000000000>;
  68                         opp-microvolt = <820000>;
  69                         clock-latency-ns = <300000>;
  70                 };
  71                 opp-1200000000 {
  72                         opp-hz = /bits/ 64 <1200000000>;
  73                         opp-microvolt = <820000>;
  74                         clock-latency-ns = <300000>;
  75                         opp-suspend;
  76                 };
  77         };
  78
  79         cpus {
  80                 #address-cells = <1>;
  81                 #size-cells = <0>;
  82
  83                 a53_0: cpu@0 {
  84                         compatible = "arm,cortex-a53";
  85                         reg = <0>;
  86                         device_type = "cpu";
  87                         #cooling-cells = <2>;
  88                         power-domains = <&sysc R8A77990_PD_CA53_CPU0>;
  89                         next-level-cache = <&L2_CA53>;
  90                         enable-method = "psci";
  91                         cpu-idle-states = <&CPU_SLEEP_0>;
  92                         dynamic-power-coefficient = <277>;
  93                         clocks =<&cpg CPG_CORE R8A77990_CLK_Z2>;
  94                         operating-points-v2 = <&cluster1_opp>;
  95                 };
  96
  97                 a53_1: cpu@1 {
  98                         compatible = "arm,cortex-a53";
  99                         reg = <1>;
 100                         device_type = "cpu";
 101                         power-domains = <&sysc R8A77990_PD_CA53_CPU1>;
 102                         next-level-cache = <&L2_CA53>;
 103                         enable-method = "psci";
 104                         cpu-idle-states = <&CPU_SLEEP_0>;
 105                         clocks =<&cpg CPG_CORE R8A77990_CLK_Z2>;
 106                         operating-points-v2 = <&cluster1_opp>;
 107                 };
 108
 109                 L2_CA53: cache-controller-0 {
 110                         compatible = "cache";
 111                         power-domains = <&sysc R8A77990_PD_CA53_SCU>;
 112                         cache-unified;
 113                         cache-level = <2>;
 114                 };
 115
 116                 idle-states {
 117                         entry-method = "psci";
 118
 119                         CPU_SLEEP_0: cpu-sleep-0 {
 120                                 compatible = "arm,idle-state";
 121                                 arm,psci-suspend-param = <0x0010000>;
 122                                 local-timer-stop;
 123                                 entry-latency-us = <700>;
 124                                 exit-latency-us = <700>;
 125                                 min-residency-us = <5000>;
 126                         };
 127                 };
 128         };
 129
 130         extal_clk: extal {
 131                 compatible = "fixed-clock";
 132                 #clock-cells = <0>;
 133                 /* This value must be overridden by the board */
 134                 clock-frequency = <0>;
 135         };
 136
 137         /* External PCIe clock - can be overridden by the board */
 138         pcie_bus_clk: pcie_bus {
 139                 compatible = "fixed-clock";
 140                 #clock-cells = <0>;
 141                 clock-frequency = <0>;
 142         };
 143
 144         pmu_a53 {
 145                 compatible = "arm,cortex-a53-pmu";
 146                 interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
 147                                       <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
 148                 interrupt-affinity = <&a53_0>, <&a53_1>;
 149         };
 150
 151         psci {
 152                 compatible = "arm,psci-1.0", "arm,psci-0.2";
 153                 method = "smc";
 154         };
 155
 156         /* External SCIF clock - to be overridden by boards that provide it */
 157         scif_clk: scif {
 158                 compatible = "fixed-clock";
 159                 #clock-cells = <0>;
 160                 clock-frequency = <0>;
 161         };
 162
 163         soc: soc {
 164                 compatible = "simple-bus";
 165                 interrupt-parent = <&gic>;
 166                 #address-cells = <2>;
 167                 #size-cells = <2>;
 168                 ranges;
 169
 170                 rwdt: watchdog@e6020000 {
 171                         compatible = "renesas,r8a77990-wdt",
 172                                      "renesas,rcar-gen3-wdt";
 173                         reg = <0 0xe6020000 0 0x0c>;
 174                         clocks = <&cpg CPG_MOD 402>;
 175                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 176                         resets = <&cpg 402>;
 177                         status = "disabled";
 178                 };
 179
 180                 gpio0: gpio@e6050000 {
 181                         compatible = "renesas,gpio-r8a77990",
 182                                      "renesas,rcar-gen3-gpio";
 183                         reg = <0 0xe6050000 0 0x50>;
 184                         interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
 185                         #gpio-cells = <2>;
 186                         gpio-controller;
 187                         gpio-ranges = <&pfc 0 0 18>;
 188                         #interrupt-cells = <2>;
 189                         interrupt-controller;
 190                         clocks = <&cpg CPG_MOD 912>;
 191                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 192                         resets = <&cpg 912>;
 193                 };
 194
 195                 gpio1: gpio@e6051000 {
 196                         compatible = "renesas,gpio-r8a77990",
 197                                      "renesas,rcar-gen3-gpio";
 198                         reg = <0 0xe6051000 0 0x50>;
 199                         interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
 200                         #gpio-cells = <2>;
 201                         gpio-controller;
 202                         gpio-ranges = <&pfc 0 32 23>;
 203                         #interrupt-cells = <2>;
 204                         interrupt-controller;
 205                         clocks = <&cpg CPG_MOD 911>;
 206                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 207                         resets = <&cpg 911>;
 208                 };
 209
 210                 gpio2: gpio@e6052000 {
 211                         compatible = "renesas,gpio-r8a77990",
 212                                      "renesas,rcar-gen3-gpio";
 213                         reg = <0 0xe6052000 0 0x50>;
 214                         interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
 215                         #gpio-cells = <2>;
 216                         gpio-controller;
 217                         gpio-ranges = <&pfc 0 64 26>;
 218                         #interrupt-cells = <2>;
 219                         interrupt-controller;
 220                         clocks = <&cpg CPG_MOD 910>;
 221                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 222                         resets = <&cpg 910>;
 223                 };
 224
 225                 gpio3: gpio@e6053000 {
 226                         compatible = "renesas,gpio-r8a77990",
 227                                      "renesas,rcar-gen3-gpio";
 228                         reg = <0 0xe6053000 0 0x50>;
 229                         interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
 230                         #gpio-cells = <2>;
 231                         gpio-controller;
 232                         gpio-ranges = <&pfc 0 96 16>;
 233                         #interrupt-cells = <2>;
 234                         interrupt-controller;
 235                         clocks = <&cpg CPG_MOD 909>;
 236                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 237                         resets = <&cpg 909>;
 238                 };
 239
 240                 gpio4: gpio@e6054000 {
 241                         compatible = "renesas,gpio-r8a77990",
 242                                      "renesas,rcar-gen3-gpio";
 243                         reg = <0 0xe6054000 0 0x50>;
 244                         interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
 245                         #gpio-cells = <2>;
 246                         gpio-controller;
 247                         gpio-ranges = <&pfc 0 128 11>;
 248                         #interrupt-cells = <2>;
 249                         interrupt-controller;
 250                         clocks = <&cpg CPG_MOD 908>;
 251                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 252                         resets = <&cpg 908>;
 253                 };
 254
 255                 gpio5: gpio@e6055000 {
 256                         compatible = "renesas,gpio-r8a77990",
 257                                      "renesas,rcar-gen3-gpio";
 258                         reg = <0 0xe6055000 0 0x50>;
 259                         interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
 260                         #gpio-cells = <2>;
 261                         gpio-controller;
 262                         gpio-ranges = <&pfc 0 160 20>;
 263                         #interrupt-cells = <2>;
 264                         interrupt-controller;
 265                         clocks = <&cpg CPG_MOD 907>;
 266                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 267                         resets = <&cpg 907>;
 268                 };
 269
 270                 gpio6: gpio@e6055400 {
 271                         compatible = "renesas,gpio-r8a77990",
 272                                      "renesas,rcar-gen3-gpio";
 273                         reg = <0 0xe6055400 0 0x50>;
 274                         interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
 275                         #gpio-cells = <2>;
 276                         gpio-controller;
 277                         gpio-ranges = <&pfc 0 192 18>;
 278                         #interrupt-cells = <2>;
 279                         interrupt-controller;
 280                         clocks = <&cpg CPG_MOD 906>;
 281                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 282                         resets = <&cpg 906>;
 283                 };
 284
 285                 pfc: pinctrl@e6060000 {
 286                         compatible = "renesas,pfc-r8a77990";
 287                         reg = <0 0xe6060000 0 0x508>;
 288                 };
 289
 290                 i2c_dvfs: i2c@e60b0000 {
 291                         #address-cells = <1>;
 292                         #size-cells = <0>;
 293                         compatible = "renesas,iic-r8a77990";
 294                         reg = <0 0xe60b0000 0 0x15>;
 295                         interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
 296                         clocks = <&cpg CPG_MOD 926>;
 297                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 298                         resets = <&cpg 926>;
 299                         dmas = <&dmac0 0x11>, <&dmac0 0x10>;
 300                         dma-names = "tx", "rx";
 301                         status = "disabled";
 302                 };
 303
 304                 cmt0: timer@e60f0000 {
 305                         compatible = "renesas,r8a77990-cmt0",
 306                                      "renesas,rcar-gen3-cmt0";
 307                         reg = <0 0xe60f0000 0 0x1004>;
 308                         interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
 309                                      <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
 310                         clocks = <&cpg CPG_MOD 303>;
 311                         clock-names = "fck";
 312                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 313                         resets = <&cpg 303>;
 314                         status = "disabled";
 315                 };
 316
 317                 cmt1: timer@e6130000 {
 318                         compatible = "renesas,r8a77990-cmt1",
 319                                      "renesas,rcar-gen3-cmt1";
 320                         reg = <0 0xe6130000 0 0x1004>;
 321                         interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
 322                                      <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
 323                                      <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
 324                                      <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
 325                                      <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
 326                                      <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
 327                                      <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
 328                                      <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
 329                         clocks = <&cpg CPG_MOD 302>;
 330                         clock-names = "fck";
 331                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 332                         resets = <&cpg 302>;
 333                         status = "disabled";
 334                 };
 335
 336                 cmt2: timer@e6140000 {
 337                         compatible = "renesas,r8a77990-cmt1",
 338                                      "renesas,rcar-gen3-cmt1";
 339                         reg = <0 0xe6140000 0 0x1004>;
 340                         interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>,
 341                                      <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>,
 342                                      <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>,
 343                                      <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>,
 344                                      <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>,
 345                                      <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>,
 346                                      <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>,
 347                                      <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>;
 348                         clocks = <&cpg CPG_MOD 301>;
 349                         clock-names = "fck";
 350                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 351                         resets = <&cpg 301>;
 352                         status = "disabled";
 353                 };
 354
 355                 cmt3: timer@e6148000 {
 356                         compatible = "renesas,r8a77990-cmt1",
 357                                      "renesas,rcar-gen3-cmt1";
 358                         reg = <0 0xe6148000 0 0x1004>;
 359                         interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>,
 360                                      <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>,
 361                                      <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>,
 362                                      <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>,
 363                                      <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>,
 364                                      <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>,
 365                                      <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>,
 366                                      <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>;
 367                         clocks = <&cpg CPG_MOD 300>;
 368                         clock-names = "fck";
 369                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 370                         resets = <&cpg 300>;
 371                         status = "disabled";
 372                 };
 373
 374                 cpg: clock-controller@e6150000 {
 375                         compatible = "renesas,r8a77990-cpg-mssr";
 376                         reg = <0 0xe6150000 0 0x1000>;
 377                         clocks = <&extal_clk>;
 378                         clock-names = "extal";
 379                         #clock-cells = <2>;
 380                         #power-domain-cells = <0>;
 381                         #reset-cells = <1>;
 382                 };
 383
 384                 rst: reset-controller@e6160000 {
 385                         compatible = "renesas,r8a77990-rst";
 386                         reg = <0 0xe6160000 0 0x0200>;
 387                 };
 388
 389                 sysc: system-controller@e6180000 {
 390                         compatible = "renesas,r8a77990-sysc";
 391                         reg = <0 0xe6180000 0 0x0400>;
 392                         #power-domain-cells = <1>;
 393                 };
 394
 395                 thermal: thermal@e6190000 {
 396                         compatible = "renesas,thermal-r8a77990";
 397                         reg = <0 0xe6190000 0 0x10>, <0 0xe6190100 0 0x38>;
 398                         interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
 399                                      <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
 400                                      <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
 401                         clocks = <&cpg CPG_MOD 522>;
 402                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 403                         resets = <&cpg 522>;
 404                         #thermal-sensor-cells = <0>;
 405                 };
 406
 407                 intc_ex: interrupt-controller@e61c0000 {
 408                         compatible = "renesas,intc-ex-r8a77990", "renesas,irqc";
 409                         #interrupt-cells = <2>;
 410                         interrupt-controller;
 411                         reg = <0 0xe61c0000 0 0x200>;
 412                         interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
 413                                      <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
 414                                      <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
 415                                      <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
 416                                      <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
 417                                      <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
 418                         clocks = <&cpg CPG_MOD 407>;
 419                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 420                         resets = <&cpg 407>;
 421                 };
 422
 423                 tmu0: timer@e61e0000 {
 424                         compatible = "renesas,tmu-r8a77990", "renesas,tmu";
 425                         reg = <0 0xe61e0000 0 0x30>;
 426                         interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
 427                                      <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
 428                                      <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
 429                         clocks = <&cpg CPG_MOD 125>;
 430                         clock-names = "fck";
 431                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 432                         resets = <&cpg 125>;
 433                         status = "disabled";
 434                 };
 435
 436                 tmu1: timer@e6fc0000 {
 437                         compatible = "renesas,tmu-r8a77990", "renesas,tmu";
 438                         reg = <0 0xe6fc0000 0 0x30>;
 439                         interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
 440                                      <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
 441                                      <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
 442                         clocks = <&cpg CPG_MOD 124>;
 443                         clock-names = "fck";
 444                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 445                         resets = <&cpg 124>;
 446                         status = "disabled";
 447                 };
 448
 449                 tmu2: timer@e6fd0000 {
 450                         compatible = "renesas,tmu-r8a77990", "renesas,tmu";
 451                         reg = <0 0xe6fd0000 0 0x30>;
 452                         interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,
 453                                      <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
 454                                      <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>;
 455                         clocks = <&cpg CPG_MOD 123>;
 456                         clock-names = "fck";
 457                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 458                         resets = <&cpg 123>;
 459                         status = "disabled";
 460                 };
 461
 462                 tmu3: timer@e6fe0000 {
 463                         compatible = "renesas,tmu-r8a77990", "renesas,tmu";
 464                         reg = <0 0xe6fe0000 0 0x30>;
 465                         interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
 466                                      <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
 467                                      <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
 468                         clocks = <&cpg CPG_MOD 122>;
 469                         clock-names = "fck";
 470                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 471                         resets = <&cpg 122>;
 472                         status = "disabled";
 473                 };
 474
 475                 tmu4: timer@ffc00000 {
 476                         compatible = "renesas,tmu-r8a77990", "renesas,tmu";
 477                         reg = <0 0xffc00000 0 0x30>;
 478                         interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>,
 479                                      <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>,
 480                                      <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>;
 481                         clocks = <&cpg CPG_MOD 121>;
 482                         clock-names = "fck";
 483                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 484                         resets = <&cpg 121>;
 485                         status = "disabled";
 486                 };
 487
 488                 i2c0: i2c@e6500000 {
 489                         #address-cells = <1>;
 490                         #size-cells = <0>;
 491                         compatible = "renesas,i2c-r8a77990",
 492                                      "renesas,rcar-gen3-i2c";
 493                         reg = <0 0xe6500000 0 0x40>;
 494                         interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
 495                         clocks = <&cpg CPG_MOD 931>;
 496                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 497                         resets = <&cpg 931>;
 498                         dmas = <&dmac1 0x91>, <&dmac1 0x90>,
 499                                <&dmac2 0x91>, <&dmac2 0x90>;
 500                         dma-names = "tx", "rx", "tx", "rx";
 501                         i2c-scl-internal-delay-ns = <110>;
 502                         status = "disabled";
 503                 };
 504
 505                 i2c1: i2c@e6508000 {
 506                         #address-cells = <1>;
 507                         #size-cells = <0>;
 508                         compatible = "renesas,i2c-r8a77990",
 509                                      "renesas,rcar-gen3-i2c";
 510                         reg = <0 0xe6508000 0 0x40>;
 511                         interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
 512                         clocks = <&cpg CPG_MOD 930>;
 513                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 514                         resets = <&cpg 930>;
 515                         dmas = <&dmac1 0x93>, <&dmac1 0x92>,
 516                                <&dmac2 0x93>, <&dmac2 0x92>;
 517                         dma-names = "tx", "rx", "tx", "rx";
 518                         i2c-scl-internal-delay-ns = <6>;
 519                         status = "disabled";
 520                 };
 521
 522                 i2c2: i2c@e6510000 {
 523                         #address-cells = <1>;
 524                         #size-cells = <0>;
 525                         compatible = "renesas,i2c-r8a77990",
 526                                      "renesas,rcar-gen3-i2c";
 527                         reg = <0 0xe6510000 0 0x40>;
 528                         interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
 529                         clocks = <&cpg CPG_MOD 929>;
 530                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 531                         resets = <&cpg 929>;
 532                         dmas = <&dmac1 0x95>, <&dmac1 0x94>,
 533                                <&dmac2 0x95>, <&dmac2 0x94>;
 534                         dma-names = "tx", "rx", "tx", "rx";
 535                         i2c-scl-internal-delay-ns = <6>;
 536                         status = "disabled";
 537                 };
 538
 539                 i2c3: i2c@e66d0000 {
 540                         #address-cells = <1>;
 541                         #size-cells = <0>;
 542                         compatible = "renesas,i2c-r8a77990",
 543                                      "renesas,rcar-gen3-i2c";
 544                         reg = <0 0xe66d0000 0 0x40>;
 545                         interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
 546                         clocks = <&cpg CPG_MOD 928>;
 547                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 548                         resets = <&cpg 928>;
 549                         dmas = <&dmac0 0x97>, <&dmac0 0x96>;
 550                         dma-names = "tx", "rx";
 551                         i2c-scl-internal-delay-ns = <110>;
 552                         status = "disabled";
 553                 };
 554
 555                 i2c4: i2c@e66d8000 {
 556                         #address-cells = <1>;
 557                         #size-cells = <0>;
 558                         compatible = "renesas,i2c-r8a77990",
 559                                      "renesas,rcar-gen3-i2c";
 560                         reg = <0 0xe66d8000 0 0x40>;
 561                         interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
 562                         clocks = <&cpg CPG_MOD 927>;
 563                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 564                         resets = <&cpg 927>;
 565                         dmas = <&dmac0 0x99>, <&dmac0 0x98>;
 566                         dma-names = "tx", "rx";
 567                         i2c-scl-internal-delay-ns = <6>;
 568                         status = "disabled";
 569                 };
 570
 571                 i2c5: i2c@e66e0000 {
 572                         #address-cells = <1>;
 573                         #size-cells = <0>;
 574                         compatible = "renesas,i2c-r8a77990",
 575                                      "renesas,rcar-gen3-i2c";
 576                         reg = <0 0xe66e0000 0 0x40>;
 577                         interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
 578                         clocks = <&cpg CPG_MOD 919>;
 579                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 580                         resets = <&cpg 919>;
 581                         dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
 582                         dma-names = "tx", "rx";
 583                         i2c-scl-internal-delay-ns = <6>;
 584                         status = "disabled";
 585                 };
 586
 587                 i2c6: i2c@e66e8000 {
 588                         #address-cells = <1>;
 589                         #size-cells = <0>;
 590                         compatible = "renesas,i2c-r8a77990",
 591                                      "renesas,rcar-gen3-i2c";
 592                         reg = <0 0xe66e8000 0 0x40>;
 593                         interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
 594                         clocks = <&cpg CPG_MOD 918>;
 595                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 596                         resets = <&cpg 918>;
 597                         dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
 598                         dma-names = "tx", "rx";
 599                         i2c-scl-internal-delay-ns = <6>;
 600                         status = "disabled";
 601                 };
 602
 603                 i2c7: i2c@e6690000 {
 604                         #address-cells = <1>;
 605                         #size-cells = <0>;
 606                         compatible = "renesas,i2c-r8a77990",
 607                                      "renesas,rcar-gen3-i2c";
 608                         reg = <0 0xe6690000 0 0x40>;
 609                         interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
 610                         clocks = <&cpg CPG_MOD 1003>;
 611                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 612                         resets = <&cpg 1003>;
 613                         i2c-scl-internal-delay-ns = <6>;
 614                         status = "disabled";
 615                 };
 616
 617                 hscif0: serial@e6540000 {
 618                         compatible = "renesas,hscif-r8a77990",
 619                                      "renesas,rcar-gen3-hscif",
 620                                      "renesas,hscif";
 621                         reg = <0 0xe6540000 0 0x60>;
 622                         interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
 623                         clocks = <&cpg CPG_MOD 520>,
 624                                  <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
 625                                  <&scif_clk>;
 626                         clock-names = "fck", "brg_int", "scif_clk";
 627                         dmas = <&dmac1 0x31>, <&dmac1 0x30>,
 628                                <&dmac2 0x31>, <&dmac2 0x30>;
 629                         dma-names = "tx", "rx", "tx", "rx";
 630                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 631                         resets = <&cpg 520>;
 632                         status = "disabled";
 633                 };
 634
 635                 hscif1: serial@e6550000 {
 636                         compatible = "renesas,hscif-r8a77990",
 637                                      "renesas,rcar-gen3-hscif",
 638                                      "renesas,hscif";
 639                         reg = <0 0xe6550000 0 0x60>;
 640                         interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
 641                         clocks = <&cpg CPG_MOD 519>,
 642                                  <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
 643                                  <&scif_clk>;
 644                         clock-names = "fck", "brg_int", "scif_clk";
 645                         dmas = <&dmac1 0x33>, <&dmac1 0x32>,
 646                                <&dmac2 0x33>, <&dmac2 0x32>;
 647                         dma-names = "tx", "rx", "tx", "rx";
 648                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 649                         resets = <&cpg 519>;
 650                         status = "disabled";
 651                 };
 652
 653                 hscif2: serial@e6560000 {
 654                         compatible = "renesas,hscif-r8a77990",
 655                                      "renesas,rcar-gen3-hscif",
 656                                      "renesas,hscif";
 657                         reg = <0 0xe6560000 0 0x60>;
 658                         interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
 659                         clocks = <&cpg CPG_MOD 518>,
 660                                  <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
 661                                  <&scif_clk>;
 662                         clock-names = "fck", "brg_int", "scif_clk";
 663                         dmas = <&dmac1 0x35>, <&dmac1 0x34>,
 664                                <&dmac2 0x35>, <&dmac2 0x34>;
 665                         dma-names = "tx", "rx", "tx", "rx";
 666                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 667                         resets = <&cpg 518>;
 668                         status = "disabled";
 669                 };
 670
 671                 hscif3: serial@e66a0000 {
 672                         compatible = "renesas,hscif-r8a77990",
 673                                      "renesas,rcar-gen3-hscif",
 674                                      "renesas,hscif";
 675                         reg = <0 0xe66a0000 0 0x60>;
 676                         interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
 677                         clocks = <&cpg CPG_MOD 517>,
 678                                  <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
 679                                  <&scif_clk>;
 680                         clock-names = "fck", "brg_int", "scif_clk";
 681                         dmas = <&dmac0 0x37>, <&dmac0 0x36>;
 682                         dma-names = "tx", "rx";
 683                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 684                         resets = <&cpg 517>;
 685                         status = "disabled";
 686                 };
 687
 688                 hscif4: serial@e66b0000 {
 689                         compatible = "renesas,hscif-r8a77990",
 690                                      "renesas,rcar-gen3-hscif",
 691                                      "renesas,hscif";
 692                         reg = <0 0xe66b0000 0 0x60>;
 693                         interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
 694                         clocks = <&cpg CPG_MOD 516>,
 695                                  <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
 696                                  <&scif_clk>;
 697                         clock-names = "fck", "brg_int", "scif_clk";
 698                         dmas = <&dmac0 0x39>, <&dmac0 0x38>;
 699                         dma-names = "tx", "rx";
 700                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 701                         resets = <&cpg 516>;
 702                         status = "disabled";
 703                 };
 704
 705                 hsusb: usb@e6590000 {
 706                         compatible = "renesas,usbhs-r8a77990",
 707                                      "renesas,rcar-gen3-usbhs";
 708                         reg = <0 0xe6590000 0 0x200>;
 709                         interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
 710                         clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>;
 711                         dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
 712                                <&usb_dmac1 0>, <&usb_dmac1 1>;
 713                         dma-names = "ch0", "ch1", "ch2", "ch3";
 714                         renesas,buswait = <11>;
 715                         phys = <&usb2_phy0 3>;
 716                         phy-names = "usb";
 717                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 718                         resets = <&cpg 704>, <&cpg 703>;
 719                         status = "disabled";
 720                 };
 721
 722                 usb_dmac0: dma-controller@e65a0000 {
 723                         compatible = "renesas,r8a77990-usb-dmac",
 724                                      "renesas,usb-dmac";
 725                         reg = <0 0xe65a0000 0 0x100>;
 726                         interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
 727                                      <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
 728                         interrupt-names = "ch0", "ch1";
 729                         clocks = <&cpg CPG_MOD 330>;
 730                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 731                         resets = <&cpg 330>;
 732                         #dma-cells = <1>;
 733                         dma-channels = <2>;
 734                 };
 735
 736                 usb_dmac1: dma-controller@e65b0000 {
 737                         compatible = "renesas,r8a77990-usb-dmac",
 738                                      "renesas,usb-dmac";
 739                         reg = <0 0xe65b0000 0 0x100>;
 740                         interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
 741                                      <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
 742                         interrupt-names = "ch0", "ch1";
 743                         clocks = <&cpg CPG_MOD 331>;
 744                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 745                         resets = <&cpg 331>;
 746                         #dma-cells = <1>;
 747                         dma-channels = <2>;
 748                 };
 749
 750                 arm_cc630p: crypto@e6601000 {
 751                         compatible = "arm,cryptocell-630p-ree";
 752                         interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
 753                         reg = <0x0 0xe6601000 0 0x1000>;
 754                         clocks = <&cpg CPG_MOD 229>;
 755                         resets = <&cpg 229>;
 756                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 757                 };
 758
 759                 dmac0: dma-controller@e6700000 {
 760                         compatible = "renesas,dmac-r8a77990",
 761                                      "renesas,rcar-dmac";
 762                         reg = <0 0xe6700000 0 0x10000>;
 763                         interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>,
 764                                      <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
 765                                      <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>,
 766                                      <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>,
 767                                      <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>,
 768                                      <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
 769                                      <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>,
 770                                      <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>,
 771                                      <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
 772                                      <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
 773                                      <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>,
 774                                      <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
 775                                      <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
 776                                      <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>,
 777                                      <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
 778                                      <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>,
 779                                      <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
 780                         interrupt-names = "error",
 781                                         "ch0", "ch1", "ch2", "ch3",
 782                                         "ch4", "ch5", "ch6", "ch7",
 783                                         "ch8", "ch9", "ch10", "ch11",
 784                                         "ch12", "ch13", "ch14", "ch15";
 785                         clocks = <&cpg CPG_MOD 219>;
 786                         clock-names = "fck";
 787                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 788                         resets = <&cpg 219>;
 789                         #dma-cells = <1>;
 790                         dma-channels = <16>;
 791                         iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>,
 792                                <&ipmmu_ds0 2>, <&ipmmu_ds0 3>,
 793                                <&ipmmu_ds0 4>, <&ipmmu_ds0 5>,
 794                                <&ipmmu_ds0 6>, <&ipmmu_ds0 7>,
 795                                <&ipmmu_ds0 8>, <&ipmmu_ds0 9>,
 796                                <&ipmmu_ds0 10>, <&ipmmu_ds0 11>,
 797                                <&ipmmu_ds0 12>, <&ipmmu_ds0 13>,
 798                                <&ipmmu_ds0 14>, <&ipmmu_ds0 15>;
 799                 };
 800
 801                 dmac1: dma-controller@e7300000 {
 802                         compatible = "renesas,dmac-r8a77990",
 803                                      "renesas,rcar-dmac";
 804                         reg = <0 0xe7300000 0 0x10000>;
 805                         interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
 806                                      <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
 807                                      <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
 808                                      <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
 809                                      <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
 810                                      <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
 811                                      <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
 812                                      <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
 813                                      <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
 814                                      <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
 815                                      <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
 816                                      <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
 817                                      <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
 818                                      <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
 819                                      <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
 820                                      <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>,
 821                                      <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
 822                         interrupt-names = "error",
 823                                         "ch0", "ch1", "ch2", "ch3",
 824                                         "ch4", "ch5", "ch6", "ch7",
 825                                         "ch8", "ch9", "ch10", "ch11",
 826                                         "ch12", "ch13", "ch14", "ch15";
 827                         clocks = <&cpg CPG_MOD 218>;
 828                         clock-names = "fck";
 829                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 830                         resets = <&cpg 218>;
 831                         #dma-cells = <1>;
 832                         dma-channels = <16>;
 833                         iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>,
 834                                <&ipmmu_ds1 2>, <&ipmmu_ds1 3>,
 835                                <&ipmmu_ds1 4>, <&ipmmu_ds1 5>,
 836                                <&ipmmu_ds1 6>, <&ipmmu_ds1 7>,
 837                                <&ipmmu_ds1 8>, <&ipmmu_ds1 9>,
 838                                <&ipmmu_ds1 10>, <&ipmmu_ds1 11>,
 839                                <&ipmmu_ds1 12>, <&ipmmu_ds1 13>,
 840                                <&ipmmu_ds1 14>, <&ipmmu_ds1 15>;
 841                 };
 842
 843                 dmac2: dma-controller@e7310000 {
 844                         compatible = "renesas,dmac-r8a77990",
 845                                      "renesas,rcar-dmac";
 846                         reg = <0 0xe7310000 0 0x10000>;
 847                         interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>,
 848                                      <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>,
 849                                      <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>,
 850                                      <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>,
 851                                      <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>,
 852                                      <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>,
 853                                      <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>,
 854                                      <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>,
 855                                      <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>,
 856                                      <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>,
 857                                      <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>,
 858                                      <GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>,
 859                                      <GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>,
 860                                      <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>,
 861                                      <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>,
 862                                      <GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>,
 863                                      <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
 864                         interrupt-names = "error",
 865                                         "ch0", "ch1", "ch2", "ch3",
 866                                         "ch4", "ch5", "ch6", "ch7",
 867                                         "ch8", "ch9", "ch10", "ch11",
 868                                         "ch12", "ch13", "ch14", "ch15";
 869                         clocks = <&cpg CPG_MOD 217>;
 870                         clock-names = "fck";
 871                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 872                         resets = <&cpg 217>;
 873                         #dma-cells = <1>;
 874                         dma-channels = <16>;
 875                         iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>,
 876                                <&ipmmu_ds1 18>, <&ipmmu_ds1 19>,
 877                                <&ipmmu_ds1 20>, <&ipmmu_ds1 21>,
 878                                <&ipmmu_ds1 22>, <&ipmmu_ds1 23>,
 879                                <&ipmmu_ds1 24>, <&ipmmu_ds1 25>,
 880                                <&ipmmu_ds1 26>, <&ipmmu_ds1 27>,
 881                                <&ipmmu_ds1 28>, <&ipmmu_ds1 29>,
 882                                <&ipmmu_ds1 30>, <&ipmmu_ds1 31>;
 883                 };
 884
 885                 ipmmu_ds0: iommu@e6740000 {
 886                         compatible = "renesas,ipmmu-r8a77990";
 887                         reg = <0 0xe6740000 0 0x1000>;
 888                         renesas,ipmmu-main = <&ipmmu_mm 0>;
 889                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 890                         #iommu-cells = <1>;
 891                 };
 892
 893                 ipmmu_ds1: iommu@e7740000 {
 894                         compatible = "renesas,ipmmu-r8a77990";
 895                         reg = <0 0xe7740000 0 0x1000>;
 896                         renesas,ipmmu-main = <&ipmmu_mm 1>;
 897                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 898                         #iommu-cells = <1>;
 899                 };
 900
 901                 ipmmu_hc: iommu@e6570000 {
 902                         compatible = "renesas,ipmmu-r8a77990";
 903                         reg = <0 0xe6570000 0 0x1000>;
 904                         renesas,ipmmu-main = <&ipmmu_mm 2>;
 905                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 906                         #iommu-cells = <1>;
 907                 };
 908
 909                 ipmmu_mm: iommu@e67b0000 {
 910                         compatible = "renesas,ipmmu-r8a77990";
 911                         reg = <0 0xe67b0000 0 0x1000>;
 912                         interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
 913                                      <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
 914                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 915                         #iommu-cells = <1>;
 916                 };
 917
 918                 ipmmu_mp: iommu@ec670000 {
 919                         compatible = "renesas,ipmmu-r8a77990";
 920                         reg = <0 0xec670000 0 0x1000>;
 921                         renesas,ipmmu-main = <&ipmmu_mm 4>;
 922                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 923                         #iommu-cells = <1>;
 924                 };
 925
 926                 ipmmu_pv0: iommu@fd800000 {
 927                         compatible = "renesas,ipmmu-r8a77990";
 928                         reg = <0 0xfd800000 0 0x1000>;
 929                         renesas,ipmmu-main = <&ipmmu_mm 6>;
 930                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 931                         #iommu-cells = <1>;
 932                 };
 933
 934                 ipmmu_rt: iommu@ffc80000 {
 935                         compatible = "renesas,ipmmu-r8a77990";
 936                         reg = <0 0xffc80000 0 0x1000>;
 937                         renesas,ipmmu-main = <&ipmmu_mm 10>;
 938                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 939                         #iommu-cells = <1>;
 940                 };
 941
 942                 ipmmu_vc0: iommu@fe6b0000 {
 943                         compatible = "renesas,ipmmu-r8a77990";
 944                         reg = <0 0xfe6b0000 0 0x1000>;
 945                         renesas,ipmmu-main = <&ipmmu_mm 12>;
 946                         power-domains = <&sysc R8A77990_PD_A3VC>;
 947                         #iommu-cells = <1>;
 948                 };
 949
 950                 ipmmu_vi0: iommu@febd0000 {
 951                         compatible = "renesas,ipmmu-r8a77990";
 952                         reg = <0 0xfebd0000 0 0x1000>;
 953                         renesas,ipmmu-main = <&ipmmu_mm 14>;
 954                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 955                         #iommu-cells = <1>;
 956                 };
 957
 958                 ipmmu_vp0: iommu@fe990000 {
 959                         compatible = "renesas,ipmmu-r8a77990";
 960                         reg = <0 0xfe990000 0 0x1000>;
 961                         renesas,ipmmu-main = <&ipmmu_mm 16>;
 962                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 963                         #iommu-cells = <1>;
 964                 };
 965
 966                 avb: ethernet@e6800000 {
 967                         compatible = "renesas,etheravb-r8a77990",
 968                                      "renesas,etheravb-rcar-gen3";
 969                         reg = <0 0xe6800000 0 0x800>;
 970                         interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
 971                                      <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
 972                                      <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
 973                                      <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
 974                                      <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
 975                                      <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
 976                                      <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
 977                                      <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
 978                                      <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
 979                                      <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
 980                                      <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
 981                                      <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
 982                                      <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
 983                                      <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
 984                                      <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
 985                                      <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
 986                                      <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
 987                                      <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
 988                                      <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
 989                                      <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
 990                                      <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
 991                                      <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
 992                                      <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
 993                                      <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
 994                                      <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
 995                         interrupt-names = "ch0", "ch1", "ch2", "ch3",
 996                                           "ch4", "ch5", "ch6", "ch7",
 997                                           "ch8", "ch9", "ch10", "ch11",
 998                                           "ch12", "ch13", "ch14", "ch15",
 999                                           "ch16", "ch17", "ch18", "ch19",
1000                                           "ch20", "ch21", "ch22", "ch23",
1001                                           "ch24";
1002                         clocks = <&cpg CPG_MOD 812>;
1003                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1004                         resets = <&cpg 812>;
1005                         phy-mode = "rgmii";
1006                         rx-internal-delay-ps = <0>;
1007                         iommus = <&ipmmu_ds0 16>;
1008                         #address-cells = <1>;
1009                         #size-cells = <0>;
1010                         status = "disabled";
1011                 };
1012
1013                 can0: can@e6c30000 {
1014                         compatible = "renesas,can-r8a77990",
1015                                      "renesas,rcar-gen3-can";
1016                         reg = <0 0xe6c30000 0 0x1000>;
1017                         interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
1018                         clocks = <&cpg CPG_MOD 916>,
1019                                <&cpg CPG_CORE R8A77990_CLK_CANFD>,
1020                                <&can_clk>;
1021                         clock-names = "clkp1", "clkp2", "can_clk";
1022                         assigned-clocks = <&cpg CPG_CORE R8A77990_CLK_CANFD>;
1023                         assigned-clock-rates = <40000000>;
1024                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1025                         resets = <&cpg 916>;
1026                         status = "disabled";
1027                 };
1028
1029                 can1: can@e6c38000 {
1030                         compatible = "renesas,can-r8a77990",
1031                                      "renesas,rcar-gen3-can";
1032                         reg = <0 0xe6c38000 0 0x1000>;
1033                         interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
1034                         clocks = <&cpg CPG_MOD 915>,
1035                                <&cpg CPG_CORE R8A77990_CLK_CANFD>,
1036                                <&can_clk>;
1037                         clock-names = "clkp1", "clkp2", "can_clk";
1038                         assigned-clocks = <&cpg CPG_CORE R8A77990_CLK_CANFD>;
1039                         assigned-clock-rates = <40000000>;
1040                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1041                         resets = <&cpg 915>;
1042                         status = "disabled";
1043                 };
1044
1045                 canfd: can@e66c0000 {
1046                         compatible = "renesas,r8a77990-canfd",
1047                                      "renesas,rcar-gen3-canfd";
1048                         reg = <0 0xe66c0000 0 0x8000>;
1049                         interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
1050                                    <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
1051                         clocks = <&cpg CPG_MOD 914>,
1052                                <&cpg CPG_CORE R8A77990_CLK_CANFD>,
1053                                <&can_clk>;
1054                         clock-names = "fck", "canfd", "can_clk";
1055                         assigned-clocks = <&cpg CPG_CORE R8A77990_CLK_CANFD>;
1056                         assigned-clock-rates = <40000000>;
1057                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1058                         resets = <&cpg 914>;
1059                         status = "disabled";
1060
1061                         channel0 {
1062                                 status = "disabled";
1063                         };
1064
1065                         channel1 {
1066                                 status = "disabled";
1067                         };
1068                 };
1069
1070                 pwm0: pwm@e6e30000 {
1071                         compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar";
1072                         reg = <0 0xe6e30000 0 0x8>;
1073                         clocks = <&cpg CPG_MOD 523>;
1074                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1075                         resets = <&cpg 523>;
1076                         #pwm-cells = <2>;
1077                         status = "disabled";
1078                 };
1079
1080                 pwm1: pwm@e6e31000 {
1081                         compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar";
1082                         reg = <0 0xe6e31000 0 0x8>;
1083                         clocks = <&cpg CPG_MOD 523>;
1084                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1085                         resets = <&cpg 523>;
1086                         #pwm-cells = <2>;
1087                         status = "disabled";
1088                 };
1089
1090                 pwm2: pwm@e6e32000 {
1091                         compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar";
1092                         reg = <0 0xe6e32000 0 0x8>;
1093                         clocks = <&cpg CPG_MOD 523>;
1094                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1095                         resets = <&cpg 523>;
1096                         #pwm-cells = <2>;
1097                         status = "disabled";
1098                 };
1099
1100                 pwm3: pwm@e6e33000 {
1101                         compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar";
1102                         reg = <0 0xe6e33000 0 0x8>;
1103                         clocks = <&cpg CPG_MOD 523>;
1104                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1105                         resets = <&cpg 523>;
1106                         #pwm-cells = <2>;
1107                         status = "disabled";
1108                 };
1109
1110                 pwm4: pwm@e6e34000 {
1111                         compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar";
1112                         reg = <0 0xe6e34000 0 0x8>;
1113                         clocks = <&cpg CPG_MOD 523>;
1114                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1115                         resets = <&cpg 523>;
1116                         #pwm-cells = <2>;
1117                         status = "disabled";
1118                 };
1119
1120                 pwm5: pwm@e6e35000 {
1121                         compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar";
1122                         reg = <0 0xe6e35000 0 0x8>;
1123                         clocks = <&cpg CPG_MOD 523>;
1124                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1125                         resets = <&cpg 523>;
1126                         #pwm-cells = <2>;
1127                         status = "disabled";
1128                 };
1129
1130                 pwm6: pwm@e6e36000 {
1131                         compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar";
1132                         reg = <0 0xe6e36000 0 0x8>;
1133                         clocks = <&cpg CPG_MOD 523>;
1134                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1135                         resets = <&cpg 523>;
1136                         #pwm-cells = <2>;
1137                         status = "disabled";
1138                 };
1139
1140                 scif0: serial@e6e60000 {
1141                         compatible = "renesas,scif-r8a77990",
1142                                      "renesas,rcar-gen3-scif", "renesas,scif";
1143                         reg = <0 0xe6e60000 0 64>;
1144                         interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
1145                         clocks = <&cpg CPG_MOD 207>,
1146                                  <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
1147                                  <&scif_clk>;
1148                         clock-names = "fck", "brg_int", "scif_clk";
1149                         dmas = <&dmac1 0x51>, <&dmac1 0x50>,
1150                                <&dmac2 0x51>, <&dmac2 0x50>;
1151                         dma-names = "tx", "rx", "tx", "rx";
1152                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1153                         resets = <&cpg 207>;
1154                         status = "disabled";
1155                 };
1156
1157                 scif1: serial@e6e68000 {
1158                         compatible = "renesas,scif-r8a77990",
1159                                      "renesas,rcar-gen3-scif", "renesas,scif";
1160                         reg = <0 0xe6e68000 0 64>;
1161                         interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
1162                         clocks = <&cpg CPG_MOD 206>,
1163                                  <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
1164                                  <&scif_clk>;
1165                         clock-names = "fck", "brg_int", "scif_clk";
1166                         dmas = <&dmac1 0x53>, <&dmac1 0x52>,
1167                                <&dmac2 0x53>, <&dmac2 0x52>;
1168                         dma-names = "tx", "rx", "tx", "rx";
1169                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1170                         resets = <&cpg 206>;
1171                         status = "disabled";
1172                 };
1173
1174                 scif2: serial@e6e88000 {
1175                         compatible = "renesas,scif-r8a77990",
1176                                      "renesas,rcar-gen3-scif", "renesas,scif";
1177                         reg = <0 0xe6e88000 0 64>;
1178                         interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
1179                         clocks = <&cpg CPG_MOD 310>,
1180                                  <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
1181                                  <&scif_clk>;
1182                         clock-names = "fck", "brg_int", "scif_clk";
1183                         dmas = <&dmac1 0x13>, <&dmac1 0x12>,
1184                                <&dmac2 0x13>, <&dmac2 0x12>;
1185                         dma-names = "tx", "rx", "tx", "rx";
1186                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1187                         resets = <&cpg 310>;
1188                         status = "disabled";
1189                 };
1190
1191                 scif3: serial@e6c50000 {
1192                         compatible = "renesas,scif-r8a77990",
1193                                      "renesas,rcar-gen3-scif", "renesas,scif";
1194                         reg = <0 0xe6c50000 0 64>;
1195                         interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
1196                         clocks = <&cpg CPG_MOD 204>,
1197                                  <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
1198                                  <&scif_clk>;
1199                         clock-names = "fck", "brg_int", "scif_clk";
1200                         dmas = <&dmac0 0x57>, <&dmac0 0x56>;
1201                         dma-names = "tx", "rx";
1202                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1203                         resets = <&cpg 204>;
1204                         status = "disabled";
1205                 };
1206
1207                 scif4: serial@e6c40000 {
1208                         compatible = "renesas,scif-r8a77990",
1209                                      "renesas,rcar-gen3-scif", "renesas,scif";
1210                         reg = <0 0xe6c40000 0 64>;
1211                         interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
1212                         clocks = <&cpg CPG_MOD 203>,
1213                                  <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
1214                                  <&scif_clk>;
1215                         clock-names = "fck", "brg_int", "scif_clk";
1216                         dmas = <&dmac0 0x59>, <&dmac0 0x58>;
1217                         dma-names = "tx", "rx";
1218                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1219                         resets = <&cpg 203>;
1220                         status = "disabled";
1221                 };
1222
1223                 scif5: serial@e6f30000 {
1224                         compatible = "renesas,scif-r8a77990",
1225                                      "renesas,rcar-gen3-scif", "renesas,scif";
1226                         reg = <0 0xe6f30000 0 64>;
1227                         interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
1228                         clocks = <&cpg CPG_MOD 202>,
1229                                  <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
1230                                  <&scif_clk>;
1231                         clock-names = "fck", "brg_int", "scif_clk";
1232                         dmas = <&dmac0 0x5b>, <&dmac0 0x5a>;
1233                         dma-names = "tx", "rx";
1234                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1235                         resets = <&cpg 202>;
1236                         status = "disabled";
1237                 };
1238
1239                 msiof0: spi@e6e90000 {
1240                         compatible = "renesas,msiof-r8a77990",
1241                                      "renesas,rcar-gen3-msiof";
1242                         reg = <0 0xe6e90000 0 0x0064>;
1243                         interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
1244                         clocks = <&cpg CPG_MOD 211>;
1245                         dmas = <&dmac1 0x41>, <&dmac1 0x40>,
1246                                <&dmac2 0x41>, <&dmac2 0x40>;
1247                         dma-names = "tx", "rx", "tx", "rx";
1248                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1249                         resets = <&cpg 211>;
1250                         #address-cells = <1>;
1251                         #size-cells = <0>;
1252                         status = "disabled";
1253                 };
1254
1255                 msiof1: spi@e6ea0000 {
1256                         compatible = "renesas,msiof-r8a77990",
1257                                      "renesas,rcar-gen3-msiof";
1258                         reg = <0 0xe6ea0000 0 0x0064>;
1259                         interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
1260                         clocks = <&cpg CPG_MOD 210>;
1261                         dmas = <&dmac0 0x43>, <&dmac0 0x42>;
1262                         dma-names = "tx", "rx";
1263                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1264                         resets = <&cpg 210>;
1265                         #address-cells = <1>;
1266                         #size-cells = <0>;
1267                         status = "disabled";
1268                 };
1269
1270                 msiof2: spi@e6c00000 {
1271                         compatible = "renesas,msiof-r8a77990",
1272                                      "renesas,rcar-gen3-msiof";
1273                         reg = <0 0xe6c00000 0 0x0064>;
1274                         interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
1275                         clocks = <&cpg CPG_MOD 209>;
1276                         dmas = <&dmac0 0x45>, <&dmac0 0x44>;
1277                         dma-names = "tx", "rx";
1278                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1279                         resets = <&cpg 209>;
1280                         #address-cells = <1>;
1281                         #size-cells = <0>;
1282                         status = "disabled";
1283                 };
1284
1285                 msiof3: spi@e6c10000 {
1286                         compatible = "renesas,msiof-r8a77990",
1287                                      "renesas,rcar-gen3-msiof";
1288                         reg = <0 0xe6c10000 0 0x0064>;
1289                         interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
1290                         clocks = <&cpg CPG_MOD 208>;
1291                         dmas = <&dmac0 0x47>, <&dmac0 0x46>;
1292                         dma-names = "tx", "rx";
1293                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1294                         resets = <&cpg 208>;
1295                         #address-cells = <1>;
1296                         #size-cells = <0>;
1297                         status = "disabled";
1298                 };
1299
1300                 vin4: video@e6ef4000 {
1301                         compatible = "renesas,vin-r8a77990";
1302                         reg = <0 0xe6ef4000 0 0x1000>;
1303                         interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
1304                         clocks = <&cpg CPG_MOD 807>;
1305                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1306                         resets = <&cpg 807>;
1307                         renesas,id = <4>;
1308                         status = "disabled";
1309
1310                         ports {
1311                                 #address-cells = <1>;
1312                                 #size-cells = <0>;
1313
1314                                 port@1 {
1315                                         #address-cells = <1>;
1316                                         #size-cells = <0>;
1317
1318                                         reg = <1>;
1319
1320                                         vin4csi40: endpoint@2 {
1321                                                 reg = <2>;
1322                                                 remote-endpoint= <&csi40vin4>;
1323                                         };
1324                                 };
1325                         };
1326                 };
1327
1328                 vin5: video@e6ef5000 {
1329                         compatible = "renesas,vin-r8a77990";
1330                         reg = <0 0xe6ef5000 0 0x1000>;
1331                         interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
1332                         clocks = <&cpg CPG_MOD 806>;
1333                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1334                         resets = <&cpg 806>;
1335                         renesas,id = <5>;
1336                         status = "disabled";
1337
1338                         ports {
1339                                 #address-cells = <1>;
1340                                 #size-cells = <0>;
1341
1342                                 port@1 {
1343                                         #address-cells = <1>;
1344                                         #size-cells = <0>;
1345
1346                                         reg = <1>;
1347
1348                                         vin5csi40: endpoint@2 {
1349                                                 reg = <2>;
1350                                                 remote-endpoint= <&csi40vin5>;
1351                                         };
1352                                 };
1353                         };
1354                 };
1355
1356                 drif00: rif@e6f40000 {
1357                         compatible = "renesas,r8a77990-drif",
1358                                      "renesas,rcar-gen3-drif";
1359                         reg = <0 0xe6f40000 0 0x84>;
1360                         interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
1361                         clocks = <&cpg CPG_MOD 515>;
1362                         clock-names = "fck";
1363                         dmas = <&dmac1 0x20>, <&dmac2 0x20>;
1364                         dma-names = "rx", "rx";
1365                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1366                         resets = <&cpg 515>;
1367                         renesas,bonding = <&drif01>;
1368                         status = "disabled";
1369                 };
1370
1371                 drif01: rif@e6f50000 {
1372                         compatible = "renesas,r8a77990-drif",
1373                                      "renesas,rcar-gen3-drif";
1374                         reg = <0 0xe6f50000 0 0x84>;
1375                         interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
1376                         clocks = <&cpg CPG_MOD 514>;
1377                         clock-names = "fck";
1378                         dmas = <&dmac1 0x22>, <&dmac2 0x22>;
1379                         dma-names = "rx", "rx";
1380                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1381                         resets = <&cpg 514>;
1382                         renesas,bonding = <&drif00>;
1383                         status = "disabled";
1384                 };
1385
1386                 drif10: rif@e6f60000 {
1387                         compatible = "renesas,r8a77990-drif",
1388                                      "renesas,rcar-gen3-drif";
1389                         reg = <0 0xe6f60000 0 0x84>;
1390                         interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
1391                         clocks = <&cpg CPG_MOD 513>;
1392                         clock-names = "fck";
1393                         dmas = <&dmac1 0x24>, <&dmac2 0x24>;
1394                         dma-names = "rx", "rx";
1395                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1396                         resets = <&cpg 513>;
1397                         renesas,bonding = <&drif11>;
1398                         status = "disabled";
1399                 };
1400
1401                 drif11: rif@e6f70000 {
1402                         compatible = "renesas,r8a77990-drif",
1403                                      "renesas,rcar-gen3-drif";
1404                         reg = <0 0xe6f70000 0 0x84>;
1405                         interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
1406                         clocks = <&cpg CPG_MOD 512>;
1407                         clock-names = "fck";
1408                         dmas = <&dmac1 0x26>, <&dmac2 0x26>;
1409                         dma-names = "rx", "rx";
1410                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1411                         resets = <&cpg 512>;
1412                         renesas,bonding = <&drif10>;
1413                         status = "disabled";
1414                 };
1415
1416                 drif20: rif@e6f80000 {
1417                         compatible = "renesas,r8a77990-drif",
1418                                      "renesas,rcar-gen3-drif";
1419                         reg = <0 0xe6f80000 0 0x84>;
1420                         interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
1421                         clocks = <&cpg CPG_MOD 511>;
1422                         clock-names = "fck";
1423                         dmas = <&dmac0 0x28>;
1424                         dma-names = "rx";
1425                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1426                         resets = <&cpg 511>;
1427                         renesas,bonding = <&drif21>;
1428                         status = "disabled";
1429                 };
1430
1431                 drif21: rif@e6f90000 {
1432                         compatible = "renesas,r8a77990-drif",
1433                                      "renesas,rcar-gen3-drif";
1434                         reg = <0 0xe6f90000 0 0x84>;
1435                         interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
1436                         clocks = <&cpg CPG_MOD 510>;
1437                         clock-names = "fck";
1438                         dmas = <&dmac0 0x2a>;
1439                         dma-names = "rx";
1440                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1441                         resets = <&cpg 510>;
1442                         renesas,bonding = <&drif20>;
1443                         status = "disabled";
1444                 };
1445
1446                 drif30: rif@e6fa0000 {
1447                         compatible = "renesas,r8a77990-drif",
1448                                      "renesas,rcar-gen3-drif";
1449                         reg = <0 0xe6fa0000 0 0x84>;
1450                         interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
1451                         clocks = <&cpg CPG_MOD 509>;
1452                         clock-names = "fck";
1453                         dmas = <&dmac0 0x2c>;
1454                         dma-names = "rx";
1455                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1456                         resets = <&cpg 509>;
1457                         renesas,bonding = <&drif31>;
1458                         status = "disabled";
1459                 };
1460
1461                 drif31: rif@e6fb0000 {
1462                         compatible = "renesas,r8a77990-drif",
1463                                      "renesas,rcar-gen3-drif";
1464                         reg = <0 0xe6fb0000 0 0x84>;
1465                         interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
1466                         clocks = <&cpg CPG_MOD 508>;
1467                         clock-names = "fck";
1468                         dmas = <&dmac0 0x2e>;
1469                         dma-names = "rx";
1470                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1471                         resets = <&cpg 508>;
1472                         renesas,bonding = <&drif30>;
1473                         status = "disabled";
1474                 };
1475
1476                 rcar_sound: sound@ec500000 {
1477                         /*
1478                          * #sound-dai-cells is required
1479                          *
1480                          * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1481                          * Multi  DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
1482                          */
1483                         /*
1484                          * #clock-cells is required for audio_clkout0/1/2/3
1485                          *
1486                          * clkout       : #clock-cells = <0>;   <&rcar_sound>;
1487                          * clkout0/1/2/3: #clock-cells = <1>;   <&rcar_sound N>;
1488                          */
1489                         compatible =  "renesas,rcar_sound-r8a77990", "renesas,rcar_sound-gen3";
1490                         reg =   <0 0xec500000 0 0x1000>, /* SCU */
1491                                 <0 0xec5a0000 0 0x100>,  /* ADG */
1492                                 <0 0xec540000 0 0x1000>, /* SSIU */
1493                                 <0 0xec541000 0 0x280>,  /* SSI */
1494                                 <0 0xec760000 0 0x200>;  /* Audio DMAC peri peri*/
1495                         reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1496
1497                         clocks = <&cpg CPG_MOD 1005>,
1498                                  <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1499                                  <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1500                                  <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1501                                  <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1502                                  <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1503                                  <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1504                                  <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1505                                  <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1506                                  <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1507                                  <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1508                                  <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1509                                  <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1510                                  <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1511                                  <&audio_clk_a>, <&audio_clk_b>,
1512                                  <&audio_clk_c>,
1513                                  <&cpg CPG_CORE R8A77990_CLK_ZA2>;
1514                         clock-names = "ssi-all",
1515                                       "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1516                                       "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1517                                       "ssi.1", "ssi.0",
1518                                       "src.9", "src.8", "src.7", "src.6",
1519                                       "src.5", "src.4", "src.3", "src.2",
1520                                       "src.1", "src.0",
1521                                       "mix.1", "mix.0",
1522                                       "ctu.1", "ctu.0",
1523                                       "dvc.0", "dvc.1",
1524                                       "clk_a", "clk_b", "clk_c", "clk_i";
1525                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1526                         resets = <&cpg 1005>,
1527                                  <&cpg 1006>, <&cpg 1007>,
1528                                  <&cpg 1008>, <&cpg 1009>,
1529                                  <&cpg 1010>, <&cpg 1011>,
1530                                  <&cpg 1012>, <&cpg 1013>,
1531                                  <&cpg 1014>, <&cpg 1015>;
1532                         reset-names = "ssi-all",
1533                                       "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1534                                       "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1535                                       "ssi.1", "ssi.0";
1536                         status = "disabled";
1537
1538                         rcar_sound,ctu {
1539                                 ctu00: ctu-0 { };
1540                                 ctu01: ctu-1 { };
1541                                 ctu02: ctu-2 { };
1542                                 ctu03: ctu-3 { };
1543                                 ctu10: ctu-4 { };
1544                                 ctu11: ctu-5 { };
1545                                 ctu12: ctu-6 { };
1546                                 ctu13: ctu-7 { };
1547                         };
1548
1549                         rcar_sound,dvc {
1550                                 dvc0: dvc-0 {
1551                                         dmas = <&audma0 0xbc>;
1552                                         dma-names = "tx";
1553                                 };
1554                                 dvc1: dvc-1 {
1555                                         dmas = <&audma0 0xbe>;
1556                                         dma-names = "tx";
1557                                 };
1558                         };
1559
1560                         rcar_sound,mix {
1561                                 mix0: mix-0 { };
1562                                 mix1: mix-1 { };
1563                         };
1564
1565                         rcar_sound,src {
1566                                 src0: src-0 {
1567                                         interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
1568                                         dmas = <&audma0 0x85>, <&audma0 0x9a>;
1569                                         dma-names = "rx", "tx";
1570                                 };
1571                                 src1: src-1 {
1572                                         interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1573                                         dmas = <&audma0 0x87>, <&audma0 0x9c>;
1574                                         dma-names = "rx", "tx";
1575                                 };
1576                                 src2: src-2 {
1577                                         interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1578                                         dmas = <&audma0 0x89>, <&audma0 0x9e>;
1579                                         dma-names = "rx", "tx";
1580                                 };
1581                                 src3: src-3 {
1582                                         interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1583                                         dmas = <&audma0 0x8b>, <&audma0 0xa0>;
1584                                         dma-names = "rx", "tx";
1585                                 };
1586                                 src4: src-4 {
1587                                         interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1588                                         dmas = <&audma0 0x8d>, <&audma0 0xb0>;
1589                                         dma-names = "rx", "tx";
1590                                 };
1591                                 src5: src-5 {
1592                                         interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1593                                         dmas = <&audma0 0x8f>, <&audma0 0xb2>;
1594                                         dma-names = "rx", "tx";
1595                                 };
1596                                 src6: src-6 {
1597                                         interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1598                                         dmas = <&audma0 0x91>, <&audma0 0xb4>;
1599                                         dma-names = "rx", "tx";
1600                                 };
1601                                 src7: src-7 {
1602                                         interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
1603                                         dmas = <&audma0 0x93>, <&audma0 0xb6>;
1604                                         dma-names = "rx", "tx";
1605                                 };
1606                                 src8: src-8 {
1607                                         interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1608                                         dmas = <&audma0 0x95>, <&audma0 0xb8>;
1609                                         dma-names = "rx", "tx";
1610                                 };
1611                                 src9: src-9 {
1612                                         interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
1613                                         dmas = <&audma0 0x97>, <&audma0 0xba>;
1614                                         dma-names = "rx", "tx";
1615                                 };
1616                         };
1617
1618                         rcar_sound,ssi {
1619                                 ssi0: ssi-0 {
1620                                         interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
1621                                         dmas = <&audma0 0x01>, <&audma0 0x02>,
1622                                                <&audma0 0x15>, <&audma0 0x16>;
1623                                         dma-names = "rx", "tx", "rxu", "txu";
1624                                 };
1625                                 ssi1: ssi-1 {
1626                                         interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
1627                                         dmas = <&audma0 0x03>, <&audma0 0x04>,
1628                                                <&audma0 0x49>, <&audma0 0x4a>;
1629                                         dma-names = "rx", "tx", "rxu", "txu";
1630                                 };
1631                                 ssi2: ssi-2 {
1632                                         interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
1633                                         dmas = <&audma0 0x05>, <&audma0 0x06>,
1634                                                <&audma0 0x63>, <&audma0 0x64>;
1635                                         dma-names = "rx", "tx", "rxu", "txu";
1636                                 };
1637                                 ssi3: ssi-3 {
1638                                         interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
1639                                         dmas = <&audma0 0x07>, <&audma0 0x08>,
1640                                                <&audma0 0x6f>, <&audma0 0x70>;
1641                                         dma-names = "rx", "tx", "rxu", "txu";
1642                                 };
1643                                 ssi4: ssi-4 {
1644                                         interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
1645                                         dmas = <&audma0 0x09>, <&audma0 0x0a>,
1646                                                <&audma0 0x71>, <&audma0 0x72>;
1647                                         dma-names = "rx", "tx", "rxu", "txu";
1648                                 };
1649                                 ssi5: ssi-5 {
1650                                         interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
1651                                         dmas = <&audma0 0x0b>, <&audma0 0x0c>,
1652                                                <&audma0 0x73>, <&audma0 0x74>;
1653                                         dma-names = "rx", "tx", "rxu", "txu";
1654                                 };
1655                                 ssi6: ssi-6 {
1656                                         interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
1657                                         dmas = <&audma0 0x0d>, <&audma0 0x0e>,
1658                                                <&audma0 0x75>, <&audma0 0x76>;
1659                                         dma-names = "rx", "tx", "rxu", "txu";
1660                                 };
1661                                 ssi7: ssi-7 {
1662                                         interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
1663                                         dmas = <&audma0 0x0f>, <&audma0 0x10>,
1664                                                <&audma0 0x79>, <&audma0 0x7a>;
1665                                         dma-names = "rx", "tx", "rxu", "txu";
1666                                 };
1667                                 ssi8: ssi-8 {
1668                                         interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
1669                                         dmas = <&audma0 0x11>, <&audma0 0x12>,
1670                                                <&audma0 0x7b>, <&audma0 0x7c>;
1671                                         dma-names = "rx", "tx", "rxu", "txu";
1672                                 };
1673                                 ssi9: ssi-9 {
1674                                         interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
1675                                         dmas = <&audma0 0x13>, <&audma0 0x14>,
1676                                                <&audma0 0x7d>, <&audma0 0x7e>;
1677                                         dma-names = "rx", "tx", "rxu", "txu";
1678                                 };
1679                         };
1680                 };
1681
1682                 audma0: dma-controller@ec700000 {
1683                         compatible = "renesas,dmac-r8a77990",
1684                                      "renesas,rcar-dmac";
1685                         reg = <0 0xec700000 0 0x10000>;
1686                         interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>,
1687                                      <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
1688                                      <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>,
1689                                      <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,
1690                                      <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>,
1691                                      <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
1692                                      <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>,
1693                                      <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
1694                                      <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>,
1695                                      <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>,
1696                                      <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,
1697                                      <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
1698                                      <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>,
1699                                      <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>,
1700                                      <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>,
1701                                      <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
1702                                      <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
1703                         interrupt-names = "error",
1704                                         "ch0", "ch1", "ch2", "ch3",
1705                                         "ch4", "ch5", "ch6", "ch7",
1706                                         "ch8", "ch9", "ch10", "ch11",
1707                                         "ch12", "ch13", "ch14", "ch15";
1708                         clocks = <&cpg CPG_MOD 502>;
1709                         clock-names = "fck";
1710                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1711                         resets = <&cpg 502>;
1712                         #dma-cells = <1>;
1713                         dma-channels = <16>;
1714                         iommus = <&ipmmu_mp 0>, <&ipmmu_mp 1>,
1715                                  <&ipmmu_mp 2>, <&ipmmu_mp 3>,
1716                                  <&ipmmu_mp 4>, <&ipmmu_mp 5>,
1717                                  <&ipmmu_mp 6>, <&ipmmu_mp 7>,
1718                                  <&ipmmu_mp 8>, <&ipmmu_mp 9>,
1719                                  <&ipmmu_mp 10>, <&ipmmu_mp 11>,
1720                                  <&ipmmu_mp 12>, <&ipmmu_mp 13>,
1721                                  <&ipmmu_mp 14>, <&ipmmu_mp 15>;
1722                 };
1723
1724                 xhci0: usb@ee000000 {
1725                         compatible = "renesas,xhci-r8a77990",
1726                                      "renesas,rcar-gen3-xhci";
1727                         reg = <0 0xee000000 0 0xc00>;
1728                         interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
1729                         clocks = <&cpg CPG_MOD 328>;
1730                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1731                         resets = <&cpg 328>;
1732                         status = "disabled";
1733                 };
1734
1735                 usb3_peri0: usb@ee020000 {
1736                         compatible = "renesas,r8a77990-usb3-peri",
1737                                      "renesas,rcar-gen3-usb3-peri";
1738                         reg = <0 0xee020000 0 0x400>;
1739                         interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
1740                         clocks = <&cpg CPG_MOD 328>;
1741                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1742                         resets = <&cpg 328>;
1743                         status = "disabled";
1744                 };
1745
1746                 ohci0: usb@ee080000 {
1747                         compatible = "generic-ohci";
1748                         reg = <0 0xee080000 0 0x100>;
1749                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1750                         clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
1751                         phys = <&usb2_phy0 1>;
1752                         phy-names = "usb";
1753                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1754                         resets = <&cpg 703>, <&cpg 704>;
1755                         status = "disabled";
1756                 };
1757
1758                 ehci0: usb@ee080100 {
1759                         compatible = "generic-ehci";
1760                         reg = <0 0xee080100 0 0x100>;
1761                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1762                         clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
1763                         phys = <&usb2_phy0 2>;
1764                         phy-names = "usb";
1765                         companion = <&ohci0>;
1766                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1767                         resets = <&cpg 703>, <&cpg 704>;
1768                         status = "disabled";
1769                 };
1770
1771                 usb2_phy0: usb-phy@ee080200 {
1772                         compatible = "renesas,usb2-phy-r8a77990",
1773                                      "renesas,rcar-gen3-usb2-phy";
1774                         reg = <0 0xee080200 0 0x700>;
1775                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1776                         clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
1777                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1778                         resets = <&cpg 703>, <&cpg 704>;
1779                         #phy-cells = <1>;
1780                         status = "disabled";
1781                 };
1782
1783                 sdhi0: mmc@ee100000 {
1784                         compatible = "renesas,sdhi-r8a77990",
1785                                      "renesas,rcar-gen3-sdhi";
1786                         reg = <0 0xee100000 0 0x2000>;
1787                         interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
1788                         clocks = <&cpg CPG_MOD 314>;
1789                         max-frequency = <200000000>;
1790                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1791                         resets = <&cpg 314>;
1792                         iommus = <&ipmmu_ds1 32>;
1793                         status = "disabled";
1794                 };
1795
1796                 sdhi1: mmc@ee120000 {
1797                         compatible = "renesas,sdhi-r8a77990",
1798                                      "renesas,rcar-gen3-sdhi";
1799                         reg = <0 0xee120000 0 0x2000>;
1800                         interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
1801                         clocks = <&cpg CPG_MOD 313>;
1802                         max-frequency = <200000000>;
1803                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1804                         resets = <&cpg 313>;
1805                         iommus = <&ipmmu_ds1 33>;
1806                         status = "disabled";
1807                 };
1808
1809                 sdhi3: mmc@ee160000 {
1810                         compatible = "renesas,sdhi-r8a77990",
1811                                      "renesas,rcar-gen3-sdhi";
1812                         reg = <0 0xee160000 0 0x2000>;
1813                         interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
1814                         clocks = <&cpg CPG_MOD 311>;
1815                         max-frequency = <200000000>;
1816                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1817                         resets = <&cpg 311>;
1818                         iommus = <&ipmmu_ds1 35>;
1819                         status = "disabled";
1820                 };
1821
1822                 gic: interrupt-controller@f1010000 {
1823                         compatible = "arm,gic-400";
1824                         #interrupt-cells = <3>;
1825                         #address-cells = <0>;
1826                         interrupt-controller;
1827                         reg = <0x0 0xf1010000 0 0x1000>,
1828                               <0x0 0xf1020000 0 0x20000>,
1829                               <0x0 0xf1040000 0 0x20000>,
1830                               <0x0 0xf1060000 0 0x20000>;
1831                         interrupts = <GIC_PPI 9
1832                                         (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
1833                         clocks = <&cpg CPG_MOD 408>;
1834                         clock-names = "clk";
1835                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1836                         resets = <&cpg 408>;
1837                 };
1838
1839                 pciec0: pcie@fe000000 {
1840                         compatible = "renesas,pcie-r8a77990",
1841                                      "renesas,pcie-rcar-gen3";
1842                         reg = <0 0xfe000000 0 0x80000>;
1843                         #address-cells = <3>;
1844                         #size-cells = <2>;
1845                         bus-range = <0x00 0xff>;
1846                         device_type = "pci";
1847                         ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>,
1848                                  <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>,
1849                                  <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>,
1850                                  <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
1851                         /* Map all possible DDR as inbound ranges */
1852                         dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>;
1853                         interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
1854                                      <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
1855                                      <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
1856                         #interrupt-cells = <1>;
1857                         interrupt-map-mask = <0 0 0 0>;
1858                         interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
1859                         clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
1860                         clock-names = "pcie", "pcie_bus";
1861                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1862                         resets = <&cpg 319>;
1863                         status = "disabled";
1864                 };
1865
1866                 vspb0: vsp@fe960000 {
1867                         compatible = "renesas,vsp2";
1868                         reg = <0 0xfe960000 0 0x8000>;
1869                         interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
1870                         clocks = <&cpg CPG_MOD 626>;
1871                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1872                         resets = <&cpg 626>;
1873                         renesas,fcp = <&fcpvb0>;
1874                 };
1875
1876                 fcpvb0: fcp@fe96f000 {
1877                         compatible = "renesas,fcpv";
1878                         reg = <0 0xfe96f000 0 0x200>;
1879                         clocks = <&cpg CPG_MOD 607>;
1880                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1881                         resets = <&cpg 607>;
1882                         iommus = <&ipmmu_vp0 5>;
1883                 };
1884
1885                 vspi0: vsp@fe9a0000 {
1886                         compatible = "renesas,vsp2";
1887                         reg = <0 0xfe9a0000 0 0x8000>;
1888                         interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
1889                         clocks = <&cpg CPG_MOD 631>;
1890                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1891                         resets = <&cpg 631>;
1892                         renesas,fcp = <&fcpvi0>;
1893                 };
1894
1895                 fcpvi0: fcp@fe9af000 {
1896                         compatible = "renesas,fcpv";
1897                         reg = <0 0xfe9af000 0 0x200>;
1898                         clocks = <&cpg CPG_MOD 611>;
1899                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1900                         resets = <&cpg 611>;
1901                         iommus = <&ipmmu_vp0 8>;
1902                 };
1903
1904                 vspd0: vsp@fea20000 {
1905                         compatible = "renesas,vsp2";
1906                         reg = <0 0xfea20000 0 0x7000>;
1907                         interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>;
1908                         clocks = <&cpg CPG_MOD 623>;
1909                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1910                         resets = <&cpg 623>;
1911                         renesas,fcp = <&fcpvd0>;
1912                 };
1913
1914                 fcpvd0: fcp@fea27000 {
1915                         compatible = "renesas,fcpv";
1916                         reg = <0 0xfea27000 0 0x200>;
1917                         clocks = <&cpg CPG_MOD 603>;
1918                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1919                         resets = <&cpg 603>;
1920                         iommus = <&ipmmu_vi0 8>;
1921                 };
1922
1923                 vspd1: vsp@fea28000 {
1924                         compatible = "renesas,vsp2";
1925                         reg = <0 0xfea28000 0 0x7000>;
1926                         interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>;
1927                         clocks = <&cpg CPG_MOD 622>;
1928                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1929                         resets = <&cpg 622>;
1930                         renesas,fcp = <&fcpvd1>;
1931                 };
1932
1933                 fcpvd1: fcp@fea2f000 {
1934                         compatible = "renesas,fcpv";
1935                         reg = <0 0xfea2f000 0 0x200>;
1936                         clocks = <&cpg CPG_MOD 602>;
1937                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1938                         resets = <&cpg 602>;
1939                         iommus = <&ipmmu_vi0 9>;
1940                 };
1941
1942                 cmm0: cmm@fea40000 {
1943                         compatible = "renesas,r8a77990-cmm",
1944                                      "renesas,rcar-gen3-cmm";
1945                         reg = <0 0xfea40000 0 0x1000>;
1946                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1947                         clocks = <&cpg CPG_MOD 711>;
1948                         resets = <&cpg 711>;
1949                 };
1950
1951                 cmm1: cmm@fea50000 {
1952                         compatible = "renesas,r8a77990-cmm",
1953                                      "renesas,rcar-gen3-cmm";
1954                         reg = <0 0xfea50000 0 0x1000>;
1955                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1956                         clocks = <&cpg CPG_MOD 710>;
1957                         resets = <&cpg 710>;
1958                 };
1959
1960                 csi40: csi2@feaa0000 {
1961                         compatible = "renesas,r8a77990-csi2";
1962                         reg = <0 0xfeaa0000 0 0x10000>;
1963                         interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
1964                         clocks = <&cpg CPG_MOD 716>;
1965                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
1966                         resets = <&cpg 716>;
1967                         status = "disabled";
1968
1969                         ports {
1970                                 #address-cells = <1>;
1971                                 #size-cells = <0>;
1972
1973                                 port@1 {
1974                                         #address-cells = <1>;
1975                                         #size-cells = <0>;
1976
1977                                         reg = <1>;
1978
1979                                         csi40vin4: endpoint@0 {
1980                                                 reg = <0>;
1981                                                 remote-endpoint = <&vin4csi40>;
1982                                         };
1983                                         csi40vin5: endpoint@1 {
1984                                                 reg = <1>;
1985                                                 remote-endpoint = <&vin5csi40>;
1986                                         };
1987                                 };
1988                         };
1989                 };
1990
1991                 du: display@feb00000 {
1992                         compatible = "renesas,du-r8a77990";
1993                         reg = <0 0xfeb00000 0 0x40000>;
1994                         interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
1995                                      <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
1996                         clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
1997                         clock-names = "du.0", "du.1";
1998                         resets = <&cpg 724>;
1999                         reset-names = "du.0";
2000
2001                         renesas,cmms = <&cmm0>, <&cmm1>;
2002                         renesas,vsps = <&vspd0 0>, <&vspd1 0>;
2003
2004                         status = "disabled";
2005
2006                         ports {
2007                                 #address-cells = <1>;
2008                                 #size-cells = <0>;
2009
2010                                 port@0 {
2011                                         reg = <0>;
2012                                         du_out_rgb: endpoint {
2013                                         };
2014                                 };
2015
2016                                 port@1 {
2017                                         reg = <1>;
2018                                         du_out_lvds0: endpoint {
2019                                                 remote-endpoint = <&lvds0_in>;
2020                                         };
2021                                 };
2022
2023                                 port@2 {
2024                                         reg = <2>;
2025                                         du_out_lvds1: endpoint {
2026                                                 remote-endpoint = <&lvds1_in>;
2027                                         };
2028                                 };
2029                         };
2030                 };
2031
2032                 lvds0: lvds-encoder@feb90000 {
2033                         compatible = "renesas,r8a77990-lvds";
2034                         reg = <0 0xfeb90000 0 0x20>;
2035                         clocks = <&cpg CPG_MOD 727>;
2036                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
2037                         resets = <&cpg 727>;
2038                         status = "disabled";
2039
2040                         renesas,companion = <&lvds1>;
2041
2042                         ports {
2043                                 #address-cells = <1>;
2044                                 #size-cells = <0>;
2045
2046                                 port@0 {
2047                                         reg = <0>;
2048                                         lvds0_in: endpoint {
2049                                                 remote-endpoint = <&du_out_lvds0>;
2050                                         };
2051                                 };
2052
2053                                 port@1 {
2054                                         reg = <1>;
2055                                         lvds0_out: endpoint {
2056                                         };
2057                                 };
2058                         };
2059                 };
2060
2061                 lvds1: lvds-encoder@feb90100 {
2062                         compatible = "renesas,r8a77990-lvds";
2063                         reg = <0 0xfeb90100 0 0x20>;
2064                         clocks = <&cpg CPG_MOD 727>;
2065                         power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
2066                         resets = <&cpg 726>;
2067                         status = "disabled";
2068
2069                         ports {
2070                                 #address-cells = <1>;
2071                                 #size-cells = <0>;
2072
2073                                 port@0 {
2074                                         reg = <0>;
2075                                         lvds1_in: endpoint {
2076                                                 remote-endpoint = <&du_out_lvds1>;
2077                                         };
2078                                 };
2079
2080                                 port@1 {
2081                                         reg = <1>;
2082                                         lvds1_out: endpoint {
2083                                         };
2084                                 };
2085                         };
2086                 };
2087
2088                 prr: chipid@fff00044 {
2089                         compatible = "renesas,prr";
2090                         reg = <0 0xfff00044 0 4>;
2091                 };
2092         };
2093
2094         thermal-zones {
2095                 cpu-thermal {
2096                         polling-delay-passive = <250>;
2097                         polling-delay = <0>;
2098                         thermal-sensors = <&thermal 0>;
2099                         sustainable-power = <717>;
2100
2101                         cooling-maps {
2102                                 map0 {
2103                                         trip = <&target>;
2104                                         cooling-device = <&a53_0 0 2>;
2105                                         contribution = <1024>;
2106                                 };
2107                         };
2108
2109                         trips {
2110                                 sensor1_crit: sensor1-crit {
2111                                         temperature = <120000>;
2112                                         hysteresis = <2000>;
2113                                         type = "critical";
2114                                 };
2115
2116                                 target: trip-point1 {
2117                                         temperature = <100000>;
2118                                         hysteresis = <2000>;
2119                                         type = "passive";
2120                                 };
2121                         };
2122                 };
2123         };
2124
2125         timer {
2126                 compatible = "arm,armv8-timer";
2127                 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
2128                                       <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
2129                                       <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
2130                                       <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
2131         };
2132 };