arch/arm64/boot/dts/renesas/r8a77980.dtsi

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Device Tree Source for the R-Car V3H (R8A77980) SoC
   4  *
   5  * Copyright (C) 2018 Renesas Electronics Corp.
   6  * Copyright (C) 2018 Cogent Embedded, Inc.
   7  */
   8
   9 #include <dt-bindings/clock/r8a77980-cpg-mssr.h>
  10 #include <dt-bindings/interrupt-controller/irq.h>
  11 #include <dt-bindings/interrupt-controller/arm-gic.h>
  12 #include <dt-bindings/power/r8a77980-sysc.h>
  13
  14 / {
  15         compatible = "renesas,r8a77980";
  16         #address-cells = <2>;
  17         #size-cells = <2>;
  18
  19         aliases {
  20                 i2c0 = &i2c0;
  21                 i2c1 = &i2c1;
  22                 i2c2 = &i2c2;
  23                 i2c3 = &i2c3;
  24                 i2c4 = &i2c4;
  25                 i2c5 = &i2c5;
  26         };
  27
  28         /* External CAN clock - to be overridden by boards that provide it */
  29         can_clk: can {
  30                 compatible = "fixed-clock";
  31                 #clock-cells = <0>;
  32                 clock-frequency = <0>;
  33         };
  34
  35         cpus {
  36                 #address-cells = <1>;
  37                 #size-cells = <0>;
  38
  39                 a53_0: cpu@0 {
  40                         device_type = "cpu";
  41                         compatible = "arm,cortex-a53";
  42                         reg = <0>;
  43                         clocks = <&cpg CPG_CORE R8A77980_CLK_Z2>;
  44                         power-domains = <&sysc R8A77980_PD_CA53_CPU0>;
  45                         next-level-cache = <&L2_CA53>;
  46                         enable-method = "psci";
  47                 };
  48
  49                 a53_1: cpu@1 {
  50                         device_type = "cpu";
  51                         compatible = "arm,cortex-a53";
  52                         reg = <1>;
  53                         clocks = <&cpg CPG_CORE R8A77980_CLK_Z2>;
  54                         power-domains = <&sysc R8A77980_PD_CA53_CPU1>;
  55                         next-level-cache = <&L2_CA53>;
  56                         enable-method = "psci";
  57                 };
  58
  59                 a53_2: cpu@2 {
  60                         device_type = "cpu";
  61                         compatible = "arm,cortex-a53";
  62                         reg = <2>;
  63                         clocks = <&cpg CPG_CORE R8A77980_CLK_Z2>;
  64                         power-domains = <&sysc R8A77980_PD_CA53_CPU2>;
  65                         next-level-cache = <&L2_CA53>;
  66                         enable-method = "psci";
  67                 };
  68
  69                 a53_3: cpu@3 {
  70                         device_type = "cpu";
  71                         compatible = "arm,cortex-a53";
  72                         reg = <3>;
  73                         clocks = <&cpg CPG_CORE R8A77980_CLK_Z2>;
  74                         power-domains = <&sysc R8A77980_PD_CA53_CPU3>;
  75                         next-level-cache = <&L2_CA53>;
  76                         enable-method = "psci";
  77                 };
  78
  79                 L2_CA53: cache-controller {
  80                         compatible = "cache";
  81                         power-domains = <&sysc R8A77980_PD_CA53_SCU>;
  82                         cache-unified;
  83                         cache-level = <2>;
  84                 };
  85         };
  86
  87         extal_clk: extal {
  88                 compatible = "fixed-clock";
  89                 #clock-cells = <0>;
  90                 /* This value must be overridden by the board */
  91                 clock-frequency = <0>;
  92         };
  93
  94         extalr_clk: extalr {
  95                 compatible = "fixed-clock";
  96                 #clock-cells = <0>;
  97                 /* This value must be overridden by the board */
  98                 clock-frequency = <0>;
  99         };
 100
 101         /* External PCIe clock - can be overridden by the board */
 102         pcie_bus_clk: pcie_bus {
 103                 compatible = "fixed-clock";
 104                 #clock-cells = <0>;
 105                 clock-frequency = <0>;
 106         };
 107
 108         pmu_a53 {
 109                 compatible = "arm,cortex-a53-pmu";
 110                 interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
 111                                       <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
 112                                       <&gic GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
 113                                       <&gic GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
 114                 interrupt-affinity = <&a53_0>, <&a53_1>, <&a53_2>, <&a53_3>;
 115         };
 116
 117         psci {
 118                 compatible = "arm,psci-1.0", "arm,psci-0.2";
 119                 method = "smc";
 120         };
 121
 122         /* External SCIF clock - to be overridden by boards that provide it */
 123         scif_clk: scif {
 124                 compatible = "fixed-clock";
 125                 #clock-cells = <0>;
 126                 clock-frequency = <0>;
 127         };
 128
 129         soc {
 130                 compatible = "simple-bus";
 131                 interrupt-parent = <&gic>;
 132
 133                 #address-cells = <2>;
 134                 #size-cells = <2>;
 135                 ranges;
 136
 137                 rwdt: watchdog@e6020000 {
 138                         compatible = "renesas,r8a77980-wdt",
 139                                      "renesas,rcar-gen3-wdt";
 140                         reg = <0 0xe6020000 0 0x0c>;
 141                         clocks = <&cpg CPG_MOD 402>;
 142                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
 143                         resets = <&cpg 402>;
 144                         status = "disabled";
 145                 };
 146
 147                 gpio0: gpio@e6050000 {
 148                         compatible = "renesas,gpio-r8a77980",
 149                                      "renesas,rcar-gen3-gpio";
 150                         reg = <0 0xe6050000 0 0x50>;
 151                         interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
 152                         #gpio-cells = <2>;
 153                         gpio-controller;
 154                         gpio-ranges = <&pfc 0 0 22>;
 155                         #interrupt-cells = <2>;
 156                         interrupt-controller;
 157                         clocks = <&cpg CPG_MOD 912>;
 158                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
 159                         resets = <&cpg 912>;
 160                 };
 161
 162                 gpio1: gpio@e6051000 {
 163                         compatible = "renesas,gpio-r8a77980",
 164                                      "renesas,rcar-gen3-gpio";
 165                         reg = <0 0xe6051000 0 0x50>;
 166                         interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
 167                         #gpio-cells = <2>;
 168                         gpio-controller;
 169                         gpio-ranges = <&pfc 0 32 28>;
 170                         #interrupt-cells = <2>;
 171                         interrupt-controller;
 172                         clocks = <&cpg CPG_MOD 911>;
 173                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
 174                         resets = <&cpg 911>;
 175                 };
 176
 177                 gpio2: gpio@e6052000 {
 178                         compatible = "renesas,gpio-r8a77980",
 179                                      "renesas,rcar-gen3-gpio";
 180                         reg = <0 0xe6052000 0 0x50>;
 181                         interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
 182                         #gpio-cells = <2>;
 183                         gpio-controller;
 184                         gpio-ranges = <&pfc 0 64 30>;
 185                         #interrupt-cells = <2>;
 186                         interrupt-controller;
 187                         clocks = <&cpg CPG_MOD 910>;
 188                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
 189                         resets = <&cpg 910>;
 190                 };
 191
 192                 gpio3: gpio@e6053000 {
 193                         compatible = "renesas,gpio-r8a77980",
 194                                      "renesas,rcar-gen3-gpio";
 195                         reg = <0 0xe6053000 0 0x50>;
 196                         interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
 197                         #gpio-cells = <2>;
 198                         gpio-controller;
 199                         gpio-ranges = <&pfc 0 96 17>;
 200                         #interrupt-cells = <2>;
 201                         interrupt-controller;
 202                         clocks = <&cpg CPG_MOD 909>;
 203                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
 204                         resets = <&cpg 909>;
 205                 };
 206
 207                 gpio4: gpio@e6054000 {
 208                         compatible = "renesas,gpio-r8a77980",
 209                                      "renesas,rcar-gen3-gpio";
 210                         reg = <0 0xe6054000 0 0x50>;
 211                         interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
 212                         #gpio-cells = <2>;
 213                         gpio-controller;
 214                         gpio-ranges = <&pfc 0 128 25>;
 215                         #interrupt-cells = <2>;
 216                         interrupt-controller;
 217                         clocks = <&cpg CPG_MOD 908>;
 218                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
 219                         resets = <&cpg 908>;
 220                 };
 221
 222                 gpio5: gpio@e6055000 {
 223                         compatible = "renesas,gpio-r8a77980",
 224                                      "renesas,rcar-gen3-gpio";
 225                         reg = <0 0xe6055000 0 0x50>;
 226                         interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
 227                         #gpio-cells = <2>;
 228                         gpio-controller;
 229                         gpio-ranges = <&pfc 0 160 15>;
 230                         #interrupt-cells = <2>;
 231                         interrupt-controller;
 232                         clocks = <&cpg CPG_MOD 907>;
 233                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
 234                         resets = <&cpg 907>;
 235                 };
 236
 237                 pfc: pinctrl@e6060000 {
 238                         compatible = "renesas,pfc-r8a77980";
 239                         reg = <0 0xe6060000 0 0x50c>;
 240                 };
 241
 242                 cmt0: timer@e60f0000 {
 243                         compatible = "renesas,r8a77980-cmt0",
 244                                      "renesas,rcar-gen3-cmt0";
 245                         reg = <0 0xe60f0000 0 0x1004>;
 246                         interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
 247                                      <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
 248                         clocks = <&cpg CPG_MOD 303>;
 249                         clock-names = "fck";
 250                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
 251                         resets = <&cpg 303>;
 252                         status = "disabled";
 253                 };
 254
 255                 cmt1: timer@e6130000 {
 256                         compatible = "renesas,r8a77980-cmt1",
 257                                      "renesas,rcar-gen3-cmt1";
 258                         reg = <0 0xe6130000 0 0x1004>;
 259                         interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
 260                                      <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
 261                                      <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
 262                                      <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
 263                                      <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
 264                                      <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
 265                                      <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
 266                                      <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
 267                         clocks = <&cpg CPG_MOD 302>;
 268                         clock-names = "fck";
 269                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
 270                         resets = <&cpg 302>;
 271                         status = "disabled";
 272                 };
 273
 274                 cmt2: timer@e6140000 {
 275                         compatible = "renesas,r8a77980-cmt1",
 276                                      "renesas,rcar-gen3-cmt1";
 277                         reg = <0 0xe6140000 0 0x1004>;
 278                         interrupts = <GIC_SPI 258 IRQ_TYPE_LEVEL_HIGH>,
 279                                      <GIC_SPI 259 IRQ_TYPE_LEVEL_HIGH>,
 280                                      <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
 281                                      <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>,
 282                                      <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>,
 283                                      <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>,
 284                                      <GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>,
 285                                      <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>;
 286                         clocks = <&cpg CPG_MOD 301>;
 287                         clock-names = "fck";
 288                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
 289                         resets = <&cpg 301>;
 290                         status = "disabled";
 291                 };
 292
 293                 cmt3: timer@e6148000 {
 294                         compatible = "renesas,r8a77980-cmt1",
 295                                      "renesas,rcar-gen3-cmt1";
 296                         reg = <0 0xe6148000 0 0x1004>;
 297                         interrupts = <GIC_SPI 273 IRQ_TYPE_LEVEL_HIGH>,
 298                                      <GIC_SPI 274 IRQ_TYPE_LEVEL_HIGH>,
 299                                      <GIC_SPI 275 IRQ_TYPE_LEVEL_HIGH>,
 300                                      <GIC_SPI 276 IRQ_TYPE_LEVEL_HIGH>,
 301                                      <GIC_SPI 277 IRQ_TYPE_LEVEL_HIGH>,
 302                                      <GIC_SPI 278 IRQ_TYPE_LEVEL_HIGH>,
 303                                      <GIC_SPI 279 IRQ_TYPE_LEVEL_HIGH>,
 304                                      <GIC_SPI 280 IRQ_TYPE_LEVEL_HIGH>;
 305                         clocks = <&cpg CPG_MOD 300>;
 306                         clock-names = "fck";
 307                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
 308                         resets = <&cpg 300>;
 309                         status = "disabled";
 310                 };
 311
 312                 cpg: clock-controller@e6150000 {
 313                         compatible = "renesas,r8a77980-cpg-mssr";
 314                         reg = <0 0xe6150000 0 0x1000>;
 315                         clocks = <&extal_clk>, <&extalr_clk>;
 316                         clock-names = "extal", "extalr";
 317                         #clock-cells = <2>;
 318                         #power-domain-cells = <0>;
 319                         #reset-cells = <1>;
 320                 };
 321
 322                 rst: reset-controller@e6160000 {
 323                         compatible = "renesas,r8a77980-rst";
 324                         reg = <0 0xe6160000 0 0x200>;
 325                 };
 326
 327                 sysc: system-controller@e6180000 {
 328                         compatible = "renesas,r8a77980-sysc";
 329                         reg = <0 0xe6180000 0 0x440>;
 330                         #power-domain-cells = <1>;
 331                 };
 332
 333                 tsc: thermal@e6198000 {
 334                         compatible = "renesas,r8a77980-thermal";
 335                         reg = <0 0xe6198000 0 0x100>,
 336                               <0 0xe61a0000 0 0x100>;
 337                         interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
 338                                      <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
 339                                      <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
 340                         clocks = <&cpg CPG_MOD 522>;
 341                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
 342                         resets = <&cpg 522>;
 343                         #thermal-sensor-cells = <1>;
 344                 };
 345
 346                 intc_ex: interrupt-controller@e61c0000 {
 347                         compatible = "renesas,intc-ex-r8a77980", "renesas,irqc";
 348                         #interrupt-cells = <2>;
 349                         interrupt-controller;
 350                         reg = <0 0xe61c0000 0 0x200>;
 351                         interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
 352                                      <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
 353                                      <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
 354                                      <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
 355                                      <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
 356                                      <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
 357                         clocks = <&cpg CPG_MOD 407>;
 358                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
 359                         resets = <&cpg 407>;
 360                 };
 361
 362                 tmu0: timer@e61e0000 {
 363                         compatible = "renesas,tmu-r8a77980", "renesas,tmu";
 364                         reg = <0 0xe61e0000 0 0x30>;
 365                         interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
 366                                      <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
 367                                      <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
 368                         clocks = <&cpg CPG_MOD 125>;
 369                         clock-names = "fck";
 370                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
 371                         resets = <&cpg 125>;
 372                         status = "disabled";
 373                 };
 374
 375                 tmu1: timer@e6fc0000 {
 376                         compatible = "renesas,tmu-r8a77980", "renesas,tmu";
 377                         reg = <0 0xe6fc0000 0 0x30>;
 378                         interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
 379                                      <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
 380                                      <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
 381                         clocks = <&cpg CPG_MOD 124>;
 382                         clock-names = "fck";
 383                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
 384                         resets = <&cpg 124>;
 385                         status = "disabled";
 386                 };
 387
 388                 tmu2: timer@e6fd0000 {
 389                         compatible = "renesas,tmu-r8a77980", "renesas,tmu";
 390                         reg = <0 0xe6fd0000 0 0x30>;
 391                         interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,
 392                                      <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
 393                                      <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>;
 394                         clocks = <&cpg CPG_MOD 123>;
 395                         clock-names = "fck";
 396                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
 397                         resets = <&cpg 123>;
 398                         status = "disabled";
 399                 };
 400
 401                 tmu3: timer@e6fe0000 {
 402                         compatible = "renesas,tmu-r8a77980", "renesas,tmu";
 403                         reg = <0 0xe6fe0000 0 0x30>;
 404                         interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
 405                                      <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
 406                                      <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
 407                         clocks = <&cpg CPG_MOD 122>;
 408                         clock-names = "fck";
 409                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
 410                         resets = <&cpg 122>;
 411                         status = "disabled";
 412                 };
 413
 414                 tmu4: timer@ffc00000 {
 415                         compatible = "renesas,tmu-r8a77980", "renesas,tmu";
 416                         reg = <0 0xffc00000 0 0x30>;
 417                         interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
 418                                      <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
 419                                      <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
 420                         clocks = <&cpg CPG_MOD 121>;
 421                         clock-names = "fck";
 422                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
 423                         resets = <&cpg 121>;
 424                         status = "disabled";
 425                 };
 426
 427                 i2c0: i2c@e6500000 {
 428                         compatible = "renesas,i2c-r8a77980",
 429                                      "renesas,rcar-gen3-i2c";
 430                         reg = <0 0xe6500000 0 0x40>;
 431                         interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
 432                         clocks = <&cpg CPG_MOD 931>;
 433                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
 434                         resets = <&cpg 931>;
 435                         dmas = <&dmac1 0x91>, <&dmac1 0x90>,
 436                                <&dmac2 0x91>, <&dmac2 0x90>;
 437                         dma-names = "tx", "rx", "tx", "rx";
 438                         i2c-scl-internal-delay-ns = <6>;
 439                         #address-cells = <1>;
 440                         #size-cells = <0>;
 441                         status = "disabled";
 442                 };
 443
 444                 i2c1: i2c@e6508000 {
 445                         compatible = "renesas,i2c-r8a77980",
 446                                      "renesas,rcar-gen3-i2c";
 447                         reg = <0 0xe6508000 0 0x40>;
 448                         interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
 449                         clocks = <&cpg CPG_MOD 930>;
 450                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
 451                         resets = <&cpg 930>;
 452                         dmas = <&dmac1 0x93>, <&dmac1 0x92>,
 453                                <&dmac2 0x93>, <&dmac2 0x92>;
 454                         dma-names = "tx", "rx", "tx", "rx";
 455                         i2c-scl-internal-delay-ns = <6>;
 456                         #address-cells = <1>;
 457                         #size-cells = <0>;
 458                         status = "disabled";
 459                 };
 460
 461                 i2c2: i2c@e6510000 {
 462                         compatible = "renesas,i2c-r8a77980",
 463                                      "renesas,rcar-gen3-i2c";
 464                         reg = <0 0xe6510000 0 0x40>;
 465                         interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
 466                         clocks = <&cpg CPG_MOD 929>;
 467                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
 468                         resets = <&cpg 929>;
 469                         dmas = <&dmac1 0x95>, <&dmac1 0x94>,
 470                                <&dmac2 0x95>, <&dmac2 0x94>;
 471                         dma-names = "tx", "rx", "tx", "rx";
 472                         i2c-scl-internal-delay-ns = <6>;
 473                         #address-cells = <1>;
 474                         #size-cells = <0>;
 475                         status = "disabled";
 476                 };
 477
 478                 i2c3: i2c@e66d0000 {
 479                         compatible = "renesas,i2c-r8a77980",
 480                                      "renesas,rcar-gen3-i2c";
 481                         reg = <0 0xe66d0000 0 0x40>;
 482                         interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
 483                         clocks = <&cpg CPG_MOD 928>;
 484                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
 485                         resets = <&cpg 928>;
 486                         i2c-scl-internal-delay-ns = <6>;
 487                         #address-cells = <1>;
 488                         #size-cells = <0>;
 489                         status = "disabled";
 490                 };
 491
 492                 i2c4: i2c@e66d8000 {
 493                         compatible = "renesas,i2c-r8a77980",
 494                                      "renesas,rcar-gen3-i2c";
 495                         reg = <0 0xe66d8000 0 0x40>;
 496                         interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
 497                         clocks = <&cpg CPG_MOD 927>;
 498                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
 499                         resets = <&cpg 927>;
 500                         i2c-scl-internal-delay-ns = <6>;
 501                         #address-cells = <1>;
 502                         #size-cells = <0>;
 503                         status = "disabled";
 504                 };
 505
 506                 i2c5: i2c@e66e0000 {
 507                         compatible = "renesas,i2c-r8a77980",
 508                                      "renesas,rcar-gen3-i2c";
 509                         reg = <0 0xe66e0000 0 0x40>;
 510                         interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
 511                         clocks = <&cpg CPG_MOD 919>;
 512                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
 513                         resets = <&cpg 919>;
 514                         dmas = <&dmac1 0x9b>, <&dmac1 0x9a>,
 515                                <&dmac2 0x9b>, <&dmac2 0x9a>;
 516                         dma-names = "tx", "rx", "tx", "rx";
 517                         i2c-scl-internal-delay-ns = <6>;
 518                         #address-cells = <1>;
 519                         #size-cells = <0>;
 520                         status = "disabled";
 521                 };
 522
 523                 hscif0: serial@e6540000 {
 524                         compatible = "renesas,hscif-r8a77980",
 525                                      "renesas,rcar-gen3-hscif",
 526                                      "renesas,hscif";
 527                         reg = <0 0xe6540000 0 0x60>;
 528                         interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
 529                         clocks = <&cpg CPG_MOD 520>,
 530                                  <&cpg CPG_CORE R8A77980_CLK_S3D1>,
 531                                  <&scif_clk>;
 532                         clock-names = "fck", "brg_int", "scif_clk";
 533                         dmas = <&dmac1 0x31>, <&dmac1 0x30>,
 534                                <&dmac2 0x31>, <&dmac2 0x30>;
 535                         dma-names = "tx", "rx", "tx", "rx";
 536                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
 537                         resets = <&cpg 520>;
 538                         status = "disabled";
 539                 };
 540
 541                 hscif1: serial@e6550000 {
 542                         compatible = "renesas,hscif-r8a77980",
 543                                      "renesas,rcar-gen3-hscif",
 544                                      "renesas,hscif";
 545                         reg = <0 0xe6550000 0 0x60>;
 546                         interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
 547                         clocks = <&cpg CPG_MOD 519>,
 548                                  <&cpg CPG_CORE R8A77980_CLK_S3D1>,
 549                                  <&scif_clk>;
 550                         clock-names = "fck", "brg_int", "scif_clk";
 551                         dmas = <&dmac1 0x33>, <&dmac1 0x32>,
 552                                <&dmac2 0x33>, <&dmac2 0x32>;
 553                         dma-names = "tx", "rx", "tx", "rx";
 554                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
 555                         resets = <&cpg 519>;
 556                         status = "disabled";
 557                 };
 558
 559                 hscif2: serial@e6560000 {
 560                         compatible = "renesas,hscif-r8a77980",
 561                                      "renesas,rcar-gen3-hscif",
 562                                      "renesas,hscif";
 563                         reg = <0 0xe6560000 0 0x60>;
 564                         interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
 565                         clocks = <&cpg CPG_MOD 518>,
 566                                  <&cpg CPG_CORE R8A77980_CLK_S3D1>,
 567                                  <&scif_clk>;
 568                         clock-names = "fck", "brg_int", "scif_clk";
 569                         dmas = <&dmac1 0x35>, <&dmac1 0x34>,
 570                                <&dmac2 0x35>, <&dmac2 0x34>;
 571                         dma-names = "tx", "rx", "tx", "rx";
 572                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
 573                         resets = <&cpg 518>;
 574                         status = "disabled";
 575                 };
 576
 577                 hscif3: serial@e66a0000 {
 578                         compatible = "renesas,hscif-r8a77980",
 579                                      "renesas,rcar-gen3-hscif",
 580                                      "renesas,hscif";
 581                         reg = <0 0xe66a0000 0 0x60>;
 582                         interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
 583                         clocks = <&cpg CPG_MOD 517>,
 584                                  <&cpg CPG_CORE R8A77980_CLK_S3D1>,
 585                                  <&scif_clk>;
 586                         clock-names = "fck", "brg_int", "scif_clk";
 587                         dmas = <&dmac1 0x37>, <&dmac1 0x36>,
 588                                <&dmac2 0x37>, <&dmac2 0x36>;
 589                         dma-names = "tx", "rx", "tx", "rx";
 590                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
 591                         resets = <&cpg 517>;
 592                         status = "disabled";
 593                 };
 594
 595                 pcie_phy: pcie-phy@e65d0000 {
 596                         compatible = "renesas,r8a77980-pcie-phy";
 597                         reg = <0 0xe65d0000 0 0x8000>;
 598                         #phy-cells = <0>;
 599                         clocks = <&cpg CPG_MOD 319>;
 600                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
 601                         resets = <&cpg 319>;
 602                         status = "disabled";
 603                 };
 604
 605                 canfd: can@e66c0000 {
 606                         compatible = "renesas,r8a77980-canfd",
 607                                      "renesas,rcar-gen3-canfd";
 608                         reg = <0 0xe66c0000 0 0x8000>;
 609                         interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
 610                                      <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
 611                         clocks = <&cpg CPG_MOD 914>,
 612                                  <&cpg CPG_CORE R8A77980_CLK_CANFD>,
 613                                  <&can_clk>;
 614                         clock-names = "fck", "canfd", "can_clk";
 615                         assigned-clocks = <&cpg CPG_CORE R8A77980_CLK_CANFD>;
 616                         assigned-clock-rates = <40000000>;
 617                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
 618                         resets = <&cpg 914>;
 619                         status = "disabled";
 620
 621                         channel0 {
 622                                 status = "disabled";
 623                         };
 624
 625                         channel1 {
 626                                 status = "disabled";
 627                         };
 628                 };
 629
 630                 avb: ethernet@e6800000 {
 631                         compatible = "renesas,etheravb-r8a77980",
 632                                      "renesas,etheravb-rcar-gen3";
 633                         reg = <0 0xe6800000 0 0x800>;
 634                         interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
 635                                      <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
 636                                      <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
 637                                      <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
 638                                      <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
 639                                      <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
 640                                      <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
 641                                      <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
 642                                      <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
 643                                      <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
 644                                      <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
 645                                      <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
 646                                      <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
 647                                      <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
 648                                      <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
 649                                      <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
 650                                      <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
 651                                      <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
 652                                      <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
 653                                      <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
 654                                      <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
 655                                      <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
 656                                      <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
 657                                      <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
 658                                      <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
 659                         interrupt-names = "ch0", "ch1", "ch2", "ch3",
 660                                           "ch4", "ch5", "ch6", "ch7",
 661                                           "ch8", "ch9", "ch10", "ch11",
 662                                           "ch12", "ch13", "ch14", "ch15",
 663                                           "ch16", "ch17", "ch18", "ch19",
 664                                           "ch20", "ch21", "ch22", "ch23",
 665                                           "ch24";
 666                         clocks = <&cpg CPG_MOD 812>;
 667                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
 668                         resets = <&cpg 812>;
 669                         phy-mode = "rgmii";
 670                         rx-internal-delay-ps = <0>;
 671                         tx-internal-delay-ps = <2000>;
 672                         iommus = <&ipmmu_ds1 33>;
 673                         #address-cells = <1>;
 674                         #size-cells = <0>;
 675                         status = "disabled";
 676                 };
 677
 678                 pwm0: pwm@e6e30000 {
 679                         compatible = "renesas,pwm-r8a77980", "renesas,pwm-rcar";
 680                         reg = <0 0xe6e30000 0 0x10>;
 681                         #pwm-cells = <2>;
 682                         clocks = <&cpg CPG_MOD 523>;
 683                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
 684                         resets = <&cpg 523>;
 685                         status = "disabled";
 686                 };
 687
 688                 pwm1: pwm@e6e31000 {
 689                         compatible = "renesas,pwm-r8a77980", "renesas,pwm-rcar";
 690                         reg = <0 0xe6e31000 0 0x10>;
 691                         #pwm-cells = <2>;
 692                         clocks = <&cpg CPG_MOD 523>;
 693                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
 694                         resets = <&cpg 523>;
 695                         status = "disabled";
 696                 };
 697
 698                 pwm2: pwm@e6e32000 {
 699                         compatible = "renesas,pwm-r8a77980", "renesas,pwm-rcar";
 700                         reg = <0 0xe6e32000 0 0x10>;
 701                         #pwm-cells = <2>;
 702                         clocks = <&cpg CPG_MOD 523>;
 703                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
 704                         resets = <&cpg 523>;
 705                         status = "disabled";
 706                 };
 707
 708                 pwm3: pwm@e6e33000 {
 709                         compatible = "renesas,pwm-r8a77980", "renesas,pwm-rcar";
 710                         reg = <0 0xe6e33000 0 0x10>;
 711                         #pwm-cells = <2>;
 712                         clocks = <&cpg CPG_MOD 523>;
 713                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
 714                         resets = <&cpg 523>;
 715                         status = "disabled";
 716                 };
 717
 718                 pwm4: pwm@e6e34000 {
 719                         compatible = "renesas,pwm-r8a77980", "renesas,pwm-rcar";
 720                         reg = <0 0xe6e34000 0 0x10>;
 721                         #pwm-cells = <2>;
 722                         clocks = <&cpg CPG_MOD 523>;
 723                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
 724                         resets = <&cpg 523>;
 725                         status = "disabled";
 726                 };
 727
 728                 scif0: serial@e6e60000 {
 729                         compatible = "renesas,scif-r8a77980",
 730                                      "renesas,rcar-gen3-scif",
 731                                      "renesas,scif";
 732                         reg = <0 0xe6e60000 0 0x40>;
 733                         interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
 734                         clocks = <&cpg CPG_MOD 207>,
 735                                  <&cpg CPG_CORE R8A77980_CLK_S3D1>,
 736                                  <&scif_clk>;
 737                         clock-names = "fck", "brg_int", "scif_clk";
 738                         dmas = <&dmac1 0x51>, <&dmac1 0x50>,
 739                                <&dmac2 0x51>, <&dmac2 0x50>;
 740                         dma-names = "tx", "rx", "tx", "rx";
 741                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
 742                         resets = <&cpg 207>;
 743                         status = "disabled";
 744                 };
 745
 746                 scif1: serial@e6e68000 {
 747                         compatible = "renesas,scif-r8a77980",
 748                                      "renesas,rcar-gen3-scif",
 749                                      "renesas,scif";
 750                         reg = <0 0xe6e68000 0 0x40>;
 751                         interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
 752                         clocks = <&cpg CPG_MOD 206>,
 753                                  <&cpg CPG_CORE R8A77980_CLK_S3D1>,
 754                                  <&scif_clk>;
 755                         clock-names = "fck", "brg_int", "scif_clk";
 756                         dmas = <&dmac1 0x53>, <&dmac1 0x52>,
 757                                <&dmac2 0x53>, <&dmac2 0x52>;
 758                         dma-names = "tx", "rx", "tx", "rx";
 759                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
 760                         resets = <&cpg 206>;
 761                         status = "disabled";
 762                 };
 763
 764                 scif3: serial@e6c50000 {
 765                         compatible = "renesas,scif-r8a77980",
 766                                      "renesas,rcar-gen3-scif",
 767                                      "renesas,scif";
 768                         reg = <0 0xe6c50000 0 0x40>;
 769                         interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
 770                         clocks = <&cpg CPG_MOD 204>,
 771                                  <&cpg CPG_CORE R8A77980_CLK_S3D1>,
 772                                  <&scif_clk>;
 773                         clock-names = "fck", "brg_int", "scif_clk";
 774                         dmas = <&dmac1 0x57>, <&dmac1 0x56>,
 775                                <&dmac2 0x57>, <&dmac2 0x56>;
 776                         dma-names = "tx", "rx", "tx", "rx";
 777                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
 778                         resets = <&cpg 204>;
 779                         status = "disabled";
 780                 };
 781
 782                 scif4: serial@e6c40000 {
 783                         compatible = "renesas,scif-r8a77980",
 784                                      "renesas,rcar-gen3-scif",
 785                                      "renesas,scif";
 786                         reg = <0 0xe6c40000 0 0x40>;
 787                         interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
 788                         clocks = <&cpg CPG_MOD 203>,
 789                                  <&cpg CPG_CORE R8A77980_CLK_S3D1>,
 790                                  <&scif_clk>;
 791                         clock-names = "fck", "brg_int", "scif_clk";
 792                         dmas = <&dmac1 0x59>, <&dmac1 0x58>,
 793                                <&dmac2 0x59>, <&dmac2 0x58>;
 794                         dma-names = "tx", "rx", "tx", "rx";
 795                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
 796                         resets = <&cpg 203>;
 797                         status = "disabled";
 798                 };
 799
 800                 tpu: pwm@e6e80000 {
 801                         compatible = "renesas,tpu-r8a77980", "renesas,tpu";
 802                         reg = <0 0xe6e80000 0 0x148>;
 803                         interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>;
 804                         clocks = <&cpg CPG_MOD 304>;
 805                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
 806                         resets = <&cpg 304>;
 807                         #pwm-cells = <3>;
 808                         status = "disabled";
 809                 };
 810
 811                 msiof0: spi@e6e90000 {
 812                         compatible = "renesas,msiof-r8a77980",
 813                                      "renesas,rcar-gen3-msiof";
 814                         reg = <0 0xe6e90000 0 0x64>;
 815                         interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
 816                         clocks = <&cpg CPG_MOD 211>;
 817                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
 818                         resets = <&cpg 211>;
 819                         #address-cells = <1>;
 820                         #size-cells = <0>;
 821                         status = "disabled";
 822                 };
 823
 824                 msiof1: spi@e6ea0000 {
 825                         compatible = "renesas,msiof-r8a77980",
 826                                      "renesas,rcar-gen3-msiof";
 827                         reg = <0 0xe6ea0000 0 0x0064>;
 828                         interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
 829                         clocks = <&cpg CPG_MOD 210>;
 830                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
 831                         resets = <&cpg 210>;
 832                         #address-cells = <1>;
 833                         #size-cells = <0>;
 834                         status = "disabled";
 835                 };
 836
 837                 msiof2: spi@e6c00000 {
 838                         compatible = "renesas,msiof-r8a77980",
 839                                      "renesas,rcar-gen3-msiof";
 840                         reg = <0 0xe6c00000 0 0x0064>;
 841                         interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
 842                         clocks = <&cpg CPG_MOD 209>;
 843                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
 844                         resets = <&cpg 209>;
 845                         #address-cells = <1>;
 846                         #size-cells = <0>;
 847                         status = "disabled";
 848                 };
 849
 850                 msiof3: spi@e6c10000 {
 851                         compatible = "renesas,msiof-r8a77980",
 852                                      "renesas,rcar-gen3-msiof";
 853                         reg = <0 0xe6c10000 0 0x0064>;
 854                         interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
 855                         clocks = <&cpg CPG_MOD 208>;
 856                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
 857                         resets = <&cpg 208>;
 858                         #address-cells = <1>;
 859                         #size-cells = <0>;
 860                         status = "disabled";
 861                 };
 862
 863                 vin0: video@e6ef0000 {
 864                         compatible = "renesas,vin-r8a77980";
 865                         reg = <0 0xe6ef0000 0 0x1000>;
 866                         interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
 867                         clocks = <&cpg CPG_MOD 811>;
 868                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
 869                         resets = <&cpg 811>;
 870                         renesas,id = <0>;
 871                         status = "disabled";
 872
 873                         ports {
 874                                 #address-cells = <1>;
 875                                 #size-cells = <0>;
 876
 877                                 port@1 {
 878                                         #address-cells = <1>;
 879                                         #size-cells = <0>;
 880
 881                                         reg = <1>;
 882
 883                                         vin0csi40: endpoint@2 {
 884                                                 reg = <2>;
 885                                                 remote-endpoint = <&csi40vin0>;
 886                                         };
 887                                 };
 888                         };
 889                 };
 890
 891                 vin1: video@e6ef1000 {
 892                         compatible = "renesas,vin-r8a77980";
 893                         reg = <0 0xe6ef1000 0 0x1000>;
 894                         interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
 895                         clocks = <&cpg CPG_MOD 810>;
 896                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
 897                         status = "disabled";
 898                         renesas,id = <1>;
 899                         resets = <&cpg 810>;
 900
 901                         ports {
 902                                 #address-cells = <1>;
 903                                 #size-cells = <0>;
 904
 905                                 port@1 {
 906                                         #address-cells = <1>;
 907                                         #size-cells = <0>;
 908
 909                                         reg = <1>;
 910
 911                                         vin1csi40: endpoint@2 {
 912                                                 reg = <2>;
 913                                                 remote-endpoint = <&csi40vin1>;
 914                                         };
 915                                 };
 916                         };
 917                 };
 918
 919                 vin2: video@e6ef2000 {
 920                         compatible = "renesas,vin-r8a77980";
 921                         reg = <0 0xe6ef2000 0 0x1000>;
 922                         interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
 923                         clocks = <&cpg CPG_MOD 809>;
 924                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
 925                         resets = <&cpg 809>;
 926                         renesas,id = <2>;
 927                         status = "disabled";
 928
 929                         ports {
 930                                 #address-cells = <1>;
 931                                 #size-cells = <0>;
 932
 933                                 port@1 {
 934                                         #address-cells = <1>;
 935                                         #size-cells = <0>;
 936
 937                                         reg = <1>;
 938
 939                                         vin2csi40: endpoint@2 {
 940                                                 reg = <2>;
 941                                                 remote-endpoint = <&csi40vin2>;
 942                                         };
 943                                 };
 944                         };
 945                 };
 946
 947                 vin3: video@e6ef3000 {
 948                         compatible = "renesas,vin-r8a77980";
 949                         reg = <0 0xe6ef3000 0 0x1000>;
 950                         interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
 951                         clocks = <&cpg CPG_MOD 808>;
 952                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
 953                         resets = <&cpg 808>;
 954                         renesas,id = <3>;
 955                         status = "disabled";
 956
 957                         ports {
 958                                 #address-cells = <1>;
 959                                 #size-cells = <0>;
 960
 961                                 port@1 {
 962                                         #address-cells = <1>;
 963                                         #size-cells = <0>;
 964
 965                                         reg = <1>;
 966
 967                                         vin3csi40: endpoint@2 {
 968                                                 reg = <2>;
 969                                                 remote-endpoint = <&csi40vin3>;
 970                                         };
 971                                 };
 972                         };
 973                 };
 974
 975                 vin4: video@e6ef4000 {
 976                         compatible = "renesas,vin-r8a77980";
 977                         reg = <0 0xe6ef4000 0 0x1000>;
 978                         interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
 979                         clocks = <&cpg CPG_MOD 807>;
 980                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
 981                         resets = <&cpg 807>;
 982                         renesas,id = <4>;
 983                         status = "disabled";
 984
 985                         ports {
 986                                 #address-cells = <1>;
 987                                 #size-cells = <0>;
 988
 989                                 port@1 {
 990                                         #address-cells = <1>;
 991                                         #size-cells = <0>;
 992
 993                                         reg = <1>;
 994
 995                                         vin4csi41: endpoint@3 {
 996                                                 reg = <3>;
 997                                                 remote-endpoint = <&csi41vin4>;
 998                                         };
 999                                 };
1000                         };
1001                 };
1002
1003                 vin5: video@e6ef5000 {
1004                         compatible = "renesas,vin-r8a77980";
1005                         reg = <0 0xe6ef5000 0 0x1000>;
1006                         interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
1007                         clocks = <&cpg CPG_MOD 806>;
1008                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1009                         resets = <&cpg 806>;
1010                         renesas,id = <5>;
1011                         status = "disabled";
1012
1013                         ports {
1014                                 #address-cells = <1>;
1015                                 #size-cells = <0>;
1016
1017                                 port@1 {
1018                                         #address-cells = <1>;
1019                                         #size-cells = <0>;
1020
1021                                         reg = <1>;
1022
1023                                         vin5csi41: endpoint@3 {
1024                                                 reg = <3>;
1025                                                 remote-endpoint = <&csi41vin5>;
1026                                         };
1027                                 };
1028                         };
1029                 };
1030
1031                 vin6: video@e6ef6000 {
1032                         compatible = "renesas,vin-r8a77980";
1033                         reg = <0 0xe6ef6000 0 0x1000>;
1034                         interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
1035                         clocks = <&cpg CPG_MOD 805>;
1036                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1037                         resets = <&cpg 805>;
1038                         renesas,id = <6>;
1039                         status = "disabled";
1040
1041                         ports {
1042                                 #address-cells = <1>;
1043                                 #size-cells = <0>;
1044
1045                                 port@1 {
1046                                         #address-cells = <1>;
1047                                         #size-cells = <0>;
1048
1049                                         reg = <1>;
1050
1051                                         vin6csi41: endpoint@3 {
1052                                                 reg = <3>;
1053                                                 remote-endpoint = <&csi41vin6>;
1054                                         };
1055                                 };
1056                         };
1057                 };
1058
1059                 vin7: video@e6ef7000 {
1060                         compatible = "renesas,vin-r8a77980";
1061                         reg = <0 0xe6ef7000 0 0x1000>;
1062                         interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>;
1063                         clocks = <&cpg CPG_MOD 804>;
1064                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1065                         resets = <&cpg 804>;
1066                         renesas,id = <7>;
1067                         status = "disabled";
1068
1069                         ports {
1070                                 #address-cells = <1>;
1071                                 #size-cells = <0>;
1072
1073                                 port@1 {
1074                                         #address-cells = <1>;
1075                                         #size-cells = <0>;
1076
1077                                         reg = <1>;
1078
1079                                         vin7csi41: endpoint@3 {
1080                                                 reg = <3>;
1081                                                 remote-endpoint = <&csi41vin7>;
1082                                         };
1083                                 };
1084                         };
1085                 };
1086
1087                 vin8: video@e6ef8000 {
1088                         compatible = "renesas,vin-r8a77980";
1089                         reg = <0 0xe6ef8000 0 0x1000>;
1090                         interrupts = <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
1091                         clocks = <&cpg CPG_MOD 628>;
1092                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1093                         resets = <&cpg 628>;
1094                         renesas,id = <8>;
1095                         status = "disabled";
1096                 };
1097
1098                 vin9: video@e6ef9000 {
1099                         compatible = "renesas,vin-r8a77980";
1100                         reg = <0 0xe6ef9000 0 0x1000>;
1101                         interrupts = <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>;
1102                         clocks = <&cpg CPG_MOD 627>;
1103                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1104                         resets = <&cpg 627>;
1105                         renesas,id = <9>;
1106                         status = "disabled";
1107                 };
1108
1109                 vin10: video@e6efa000 {
1110                         compatible = "renesas,vin-r8a77980";
1111                         reg = <0 0xe6efa000 0 0x1000>;
1112                         interrupts = <GIC_SPI 289 IRQ_TYPE_LEVEL_HIGH>;
1113                         clocks = <&cpg CPG_MOD 625>;
1114                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1115                         resets = <&cpg 625>;
1116                         renesas,id = <10>;
1117                         status = "disabled";
1118                 };
1119
1120                 vin11: video@e6efb000 {
1121                         compatible = "renesas,vin-r8a77980";
1122                         reg = <0 0xe6efb000 0 0x1000>;
1123                         interrupts = <GIC_SPI 296 IRQ_TYPE_LEVEL_HIGH>;
1124                         clocks = <&cpg CPG_MOD 618>;
1125                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1126                         resets = <&cpg 618>;
1127                         renesas,id = <11>;
1128                         status = "disabled";
1129                 };
1130
1131                 vin12: video@e6efc000 {
1132                         compatible = "renesas,vin-r8a77980";
1133                         reg = <0 0xe6efc000 0 0x1000>;
1134                         interrupts = <GIC_SPI 298 IRQ_TYPE_LEVEL_HIGH>;
1135                         clocks = <&cpg CPG_MOD 612>;
1136                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1137                         resets = <&cpg 612>;
1138                         renesas,id = <12>;
1139                         status = "disabled";
1140                 };
1141
1142                 vin13: video@e6efd000 {
1143                         compatible = "renesas,vin-r8a77980";
1144                         reg = <0 0xe6efd000 0 0x1000>;
1145                         interrupts = <GIC_SPI 299 IRQ_TYPE_LEVEL_HIGH>;
1146                         clocks = <&cpg CPG_MOD 608>;
1147                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1148                         resets = <&cpg 608>;
1149                         renesas,id = <13>;
1150                         status = "disabled";
1151                 };
1152
1153                 vin14: video@e6efe000 {
1154                         compatible = "renesas,vin-r8a77980";
1155                         reg = <0 0xe6efe000 0 0x1000>;
1156                         interrupts = <GIC_SPI 301 IRQ_TYPE_LEVEL_HIGH>;
1157                         clocks = <&cpg CPG_MOD 605>;
1158                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1159                         resets = <&cpg 605>;
1160                         renesas,id = <14>;
1161                         status = "disabled";
1162                 };
1163
1164                 vin15: video@e6eff000 {
1165                         compatible = "renesas,vin-r8a77980";
1166                         reg = <0 0xe6eff000 0 0x1000>;
1167                         interrupts = <GIC_SPI 302 IRQ_TYPE_LEVEL_HIGH>;
1168                         clocks = <&cpg CPG_MOD 604>;
1169                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1170                         resets = <&cpg 604>;
1171                         renesas,id = <15>;
1172                         status = "disabled";
1173                 };
1174
1175                 dmac1: dma-controller@e7300000 {
1176                         compatible = "renesas,dmac-r8a77980",
1177                                      "renesas,rcar-dmac";
1178                         reg = <0 0xe7300000 0 0x10000>;
1179                         interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
1180                                      <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
1181                                      <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
1182                                      <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
1183                                      <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
1184                                      <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
1185                                      <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
1186                                      <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
1187                                      <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
1188                                      <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>,
1189                                      <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>,
1190                                      <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>,
1191                                      <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>,
1192                                      <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>,
1193                                      <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>,
1194                                      <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>,
1195                                      <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1196                         interrupt-names = "error",
1197                                           "ch0", "ch1", "ch2", "ch3",
1198                                           "ch4", "ch5", "ch6", "ch7",
1199                                           "ch8", "ch9", "ch10", "ch11",
1200                                           "ch12", "ch13", "ch14", "ch15";
1201                         clocks = <&cpg CPG_MOD 218>;
1202                         clock-names = "fck";
1203                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1204                         resets = <&cpg 218>;
1205                         #dma-cells = <1>;
1206                         dma-channels = <16>;
1207                         iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>,
1208                                <&ipmmu_ds1 2>, <&ipmmu_ds1 3>,
1209                                <&ipmmu_ds1 4>, <&ipmmu_ds1 5>,
1210                                <&ipmmu_ds1 6>, <&ipmmu_ds1 7>,
1211                                <&ipmmu_ds1 8>, <&ipmmu_ds1 9>,
1212                                <&ipmmu_ds1 10>, <&ipmmu_ds1 11>,
1213                                <&ipmmu_ds1 12>, <&ipmmu_ds1 13>,
1214                                <&ipmmu_ds1 14>, <&ipmmu_ds1 15>;
1215                 };
1216
1217                 dmac2: dma-controller@e7310000 {
1218                         compatible = "renesas,dmac-r8a77980",
1219                                      "renesas,rcar-dmac";
1220                         reg = <0 0xe7310000 0 0x10000>;
1221                         interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>,
1222                                      <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
1223                                      <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
1224                                      <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
1225                                      <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
1226                                      <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
1227                                      <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
1228                                      <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>,
1229                                      <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>,
1230                                      <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>,
1231                                      <GIC_SPI 362 IRQ_TYPE_LEVEL_HIGH>,
1232                                      <GIC_SPI 363 IRQ_TYPE_LEVEL_HIGH>,
1233                                      <GIC_SPI 364 IRQ_TYPE_LEVEL_HIGH>,
1234                                      <GIC_SPI 365 IRQ_TYPE_LEVEL_HIGH>,
1235                                      <GIC_SPI 366 IRQ_TYPE_LEVEL_HIGH>,
1236                                      <GIC_SPI 367 IRQ_TYPE_LEVEL_HIGH>,
1237                                      <GIC_SPI 368 IRQ_TYPE_LEVEL_HIGH>;
1238                         interrupt-names = "error",
1239                                           "ch0", "ch1", "ch2", "ch3",
1240                                           "ch4", "ch5", "ch6", "ch7",
1241                                           "ch8", "ch9", "ch10", "ch11",
1242                                           "ch12", "ch13", "ch14", "ch15";
1243                         clocks = <&cpg CPG_MOD 217>;
1244                         clock-names = "fck";
1245                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1246                         resets = <&cpg 217>;
1247                         #dma-cells = <1>;
1248                         dma-channels = <16>;
1249                         iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>,
1250                                <&ipmmu_ds1 18>, <&ipmmu_ds1 19>,
1251                                <&ipmmu_ds1 20>, <&ipmmu_ds1 21>,
1252                                <&ipmmu_ds1 22>, <&ipmmu_ds1 23>,
1253                                <&ipmmu_ds1 24>, <&ipmmu_ds1 25>,
1254                                <&ipmmu_ds1 26>, <&ipmmu_ds1 27>,
1255                                <&ipmmu_ds1 28>, <&ipmmu_ds1 29>,
1256                                <&ipmmu_ds1 30>, <&ipmmu_ds1 31>;
1257                 };
1258
1259                 gether: ethernet@e7400000 {
1260                         compatible = "renesas,gether-r8a77980";
1261                         reg = <0 0xe7400000 0 0x1000>;
1262                         interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
1263                         clocks = <&cpg CPG_MOD 813>;
1264                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1265                         resets = <&cpg 813>;
1266                         #address-cells = <1>;
1267                         #size-cells = <0>;
1268                         status = "disabled";
1269                 };
1270
1271                 ipmmu_ds1: iommu@e7740000 {
1272                         compatible = "renesas,ipmmu-r8a77980";
1273                         reg = <0 0xe7740000 0 0x1000>;
1274                         renesas,ipmmu-main = <&ipmmu_mm 0>;
1275                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1276                         #iommu-cells = <1>;
1277                 };
1278
1279                 ipmmu_ir: iommu@ff8b0000 {
1280                         compatible = "renesas,ipmmu-r8a77980";
1281                         reg = <0 0xff8b0000 0 0x1000>;
1282                         renesas,ipmmu-main = <&ipmmu_mm 3>;
1283                         power-domains = <&sysc R8A77980_PD_A3IR>;
1284                         #iommu-cells = <1>;
1285                 };
1286
1287                 ipmmu_mm: iommu@e67b0000 {
1288                         compatible = "renesas,ipmmu-r8a77980";
1289                         reg = <0 0xe67b0000 0 0x1000>;
1290                         interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
1291                                      <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
1292                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1293                         #iommu-cells = <1>;
1294                 };
1295
1296                 ipmmu_rt: iommu@ffc80000 {
1297                         compatible = "renesas,ipmmu-r8a77980";
1298                         reg = <0 0xffc80000 0 0x1000>;
1299                         renesas,ipmmu-main = <&ipmmu_mm 10>;
1300                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1301                         #iommu-cells = <1>;
1302                 };
1303
1304                 ipmmu_vc0: iommu@fe990000 {
1305                         compatible = "renesas,ipmmu-r8a77980";
1306                         reg = <0 0xfe990000 0 0x1000>;
1307                         renesas,ipmmu-main = <&ipmmu_mm 12>;
1308                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1309                         #iommu-cells = <1>;
1310                 };
1311
1312                 ipmmu_vi0: iommu@febd0000 {
1313                         compatible = "renesas,ipmmu-r8a77980";
1314                         reg = <0 0xfebd0000 0 0x1000>;
1315                         renesas,ipmmu-main = <&ipmmu_mm 14>;
1316                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1317                         #iommu-cells = <1>;
1318                 };
1319
1320                 ipmmu_vip0: iommu@e7b00000 {
1321                         compatible = "renesas,ipmmu-r8a77980";
1322                         reg = <0 0xe7b00000 0 0x1000>;
1323                         renesas,ipmmu-main = <&ipmmu_mm 4>;
1324                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1325                         #iommu-cells = <1>;
1326                 };
1327
1328                 ipmmu_vip1: iommu@e7960000 {
1329                         compatible = "renesas,ipmmu-r8a77980";
1330                         reg = <0 0xe7960000 0 0x1000>;
1331                         renesas,ipmmu-main = <&ipmmu_mm 11>;
1332                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1333                         #iommu-cells = <1>;
1334                 };
1335
1336                 mmc0: mmc@ee140000 {
1337                         compatible = "renesas,sdhi-r8a77980",
1338                                      "renesas,rcar-gen3-sdhi";
1339                         reg = <0 0xee140000 0 0x2000>;
1340                         interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
1341                         clocks = <&cpg CPG_MOD 314>;
1342                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1343                         resets = <&cpg 314>;
1344                         max-frequency = <200000000>;
1345                         iommus = <&ipmmu_ds1 32>;
1346                         status = "disabled";
1347                 };
1348
1349                 rpc: spi@ee200000 {
1350                         compatible = "renesas,r8a77980-rpc-if",
1351                                      "renesas,rcar-gen3-rpc-if";
1352                         reg = <0 0xee200000 0 0x200>,
1353                               <0 0x08000000 0 0x4000000>,
1354                               <0 0xee208000 0 0x100>;
1355                         reg-names = "regs", "dirmap", "wbuf";
1356                         interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
1357                         clocks = <&cpg CPG_MOD 917>;
1358                         clock-names = "rpc";
1359                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1360                         resets = <&cpg 917>;
1361                         #address-cells = <1>;
1362                         #size-cells = <0>;
1363                         status = "disabled";
1364                 };
1365
1366                 gic: interrupt-controller@f1010000 {
1367                         compatible = "arm,gic-400";
1368                         #interrupt-cells = <3>;
1369                         #address-cells = <0>;
1370                         interrupt-controller;
1371                         reg = <0x0 0xf1010000 0 0x1000>,
1372                               <0x0 0xf1020000 0 0x20000>,
1373                               <0x0 0xf1040000 0 0x20000>,
1374                               <0x0 0xf1060000 0 0x20000>;
1375                         interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) |
1376                                       IRQ_TYPE_LEVEL_HIGH)>;
1377                         clocks = <&cpg CPG_MOD 408>;
1378                         clock-names = "clk";
1379                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1380                         resets = <&cpg 408>;
1381                 };
1382
1383                 pciec: pcie@fe000000 {
1384                         compatible = "renesas,pcie-r8a77980",
1385                                      "renesas,pcie-rcar-gen3";
1386                         reg = <0 0xfe000000 0 0x80000>;
1387                         #address-cells = <3>;
1388                         #size-cells = <2>;
1389                         bus-range = <0x00 0xff>;
1390                         device_type = "pci";
1391                         ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x0100000>,
1392                                  <0x02000000 0 0xfe200000 0 0xfe200000 0 0x0200000>,
1393                                  <0x02000000 0 0x30000000 0 0x30000000 0 0x8000000>,
1394                                  <0x42000000 0 0x38000000 0 0x38000000 0 0x8000000>;
1395                         dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
1396                         interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
1397                                      <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
1398                                      <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
1399                         #interrupt-cells = <1>;
1400                         interrupt-map-mask = <0 0 0 0>;
1401                         interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
1402                         clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
1403                         clock-names = "pcie", "pcie_bus";
1404                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1405                         resets = <&cpg 319>;
1406                         phys = <&pcie_phy>;
1407                         phy-names = "pcie";
1408                         status = "disabled";
1409                 };
1410
1411                 vspd0: vsp@fea20000 {
1412                         compatible = "renesas,vsp2";
1413                         reg = <0 0xfea20000 0 0x5000>;
1414                         interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
1415                         clocks = <&cpg CPG_MOD 623>;
1416                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1417                         resets = <&cpg 623>;
1418                         renesas,fcp = <&fcpvd0>;
1419                 };
1420
1421                 fcpvd0: fcp@fea27000 {
1422                         compatible = "renesas,fcpv";
1423                         reg = <0 0xfea27000 0 0x200>;
1424                         clocks = <&cpg CPG_MOD 603>;
1425                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1426                         resets = <&cpg 603>;
1427                 };
1428
1429                 csi40: csi2@feaa0000 {
1430                         compatible = "renesas,r8a77980-csi2";
1431                         reg = <0 0xfeaa0000 0 0x10000>;
1432                         interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
1433                         clocks = <&cpg CPG_MOD 716>;
1434                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1435                         resets = <&cpg 716>;
1436                         status = "disabled";
1437
1438                         ports {
1439                                 #address-cells = <1>;
1440                                 #size-cells = <0>;
1441
1442                                 port@0 {
1443                                         reg = <0>;
1444                                 };
1445
1446                                 port@1 {
1447                                         #address-cells = <1>;
1448                                         #size-cells = <0>;
1449
1450                                         reg = <1>;
1451
1452                                         csi40vin0: endpoint@0 {
1453                                                 reg = <0>;
1454                                                 remote-endpoint = <&vin0csi40>;
1455                                         };
1456                                         csi40vin1: endpoint@1 {
1457                                                 reg = <1>;
1458                                                 remote-endpoint = <&vin1csi40>;
1459                                         };
1460                                         csi40vin2: endpoint@2 {
1461                                                 reg = <2>;
1462                                                 remote-endpoint = <&vin2csi40>;
1463                                         };
1464                                         csi40vin3: endpoint@3 {
1465                                                 reg = <3>;
1466                                                 remote-endpoint = <&vin3csi40>;
1467                                         };
1468                                 };
1469                         };
1470                 };
1471
1472                 csi41: csi2@feab0000 {
1473                         compatible = "renesas,r8a77980-csi2";
1474                         reg = <0 0xfeab0000 0 0x10000>;
1475                         interrupts = <GIC_SPI 241 IRQ_TYPE_LEVEL_HIGH>;
1476                         clocks = <&cpg CPG_MOD 715>;
1477                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1478                         resets = <&cpg 715>;
1479                         status = "disabled";
1480
1481                         ports {
1482                                 #address-cells = <1>;
1483                                 #size-cells = <0>;
1484
1485                                 port@0 {
1486                                         reg = <0>;
1487                                 };
1488
1489                                 port@1 {
1490                                         #address-cells = <1>;
1491                                         #size-cells = <0>;
1492
1493                                         reg = <1>;
1494
1495                                         csi41vin4: endpoint@0 {
1496                                                 reg = <0>;
1497                                                 remote-endpoint = <&vin4csi41>;
1498                                         };
1499                                         csi41vin5: endpoint@1 {
1500                                                 reg = <1>;
1501                                                 remote-endpoint = <&vin5csi41>;
1502                                         };
1503                                         csi41vin6: endpoint@2 {
1504                                                 reg = <2>;
1505                                                 remote-endpoint = <&vin6csi41>;
1506                                         };
1507                                         csi41vin7: endpoint@3 {
1508                                                 reg = <3>;
1509                                                 remote-endpoint = <&vin7csi41>;
1510                                         };
1511                                 };
1512                         };
1513                 };
1514
1515                 du: display@feb00000 {
1516                         compatible = "renesas,du-r8a77980";
1517                         reg = <0 0xfeb00000 0 0x80000>;
1518                         interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>;
1519                         clocks = <&cpg CPG_MOD 724>;
1520                         clock-names = "du.0";
1521                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1522                         resets = <&cpg 724>;
1523                         reset-names = "du.0";
1524                         renesas,vsps = <&vspd0 0>;
1525
1526                         status = "disabled";
1527
1528                         ports {
1529                                 #address-cells = <1>;
1530                                 #size-cells = <0>;
1531
1532                                 port@0 {
1533                                         reg = <0>;
1534                                         du_out_rgb: endpoint {
1535                                         };
1536                                 };
1537
1538                                 port@1 {
1539                                         reg = <1>;
1540                                         du_out_lvds0: endpoint {
1541                                                 remote-endpoint = <&lvds0_in>;
1542                                         };
1543                                 };
1544                         };
1545                 };
1546
1547                 lvds0: lvds-encoder@feb90000 {
1548                         compatible = "renesas,r8a77980-lvds";
1549                         reg = <0 0xfeb90000 0 0x14>;
1550                         clocks = <&cpg CPG_MOD 727>;
1551                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1552                         resets = <&cpg 727>;
1553                         status = "disabled";
1554
1555                         ports {
1556                                 #address-cells = <1>;
1557                                 #size-cells = <0>;
1558
1559                                 port@0 {
1560                                         reg = <0>;
1561                                         lvds0_in: endpoint {
1562                                                 remote-endpoint =
1563                                                         <&du_out_lvds0>;
1564                                         };
1565                                 };
1566
1567                                 port@1 {
1568                                         reg = <1>;
1569                                         lvds0_out: endpoint {
1570                                         };
1571                                 };
1572                         };
1573                 };
1574
1575                 prr: chipid@fff00044 {
1576                         compatible = "renesas,prr";
1577                         reg = <0 0xfff00044 0 4>;
1578                 };
1579         };
1580
1581         thermal-zones {
1582                 thermal-sensor-1 {
1583                         polling-delay-passive = <250>;
1584                         polling-delay = <1000>;
1585                         thermal-sensors = <&tsc 0>;
1586
1587                         trips {
1588                                 sensor1-passive {
1589                                         temperature = <95000>;
1590                                         hysteresis = <1000>;
1591                                         type = "passive";
1592                                 };
1593                                 sensor1-critical {
1594                                         temperature = <120000>;
1595                                         hysteresis = <1000>;
1596                                         type = "critical";
1597                                 };
1598                         };
1599                 };
1600
1601                 thermal-sensor-2 {
1602                         polling-delay-passive = <250>;
1603                         polling-delay = <1000>;
1604                         thermal-sensors = <&tsc 1>;
1605
1606                         trips {
1607                                 sensor2-passive {
1608                                         temperature = <95000>;
1609                                         hysteresis = <1000>;
1610                                         type = "passive";
1611                                 };
1612                                 sensor2-critical {
1613                                         temperature = <120000>;
1614                                         hysteresis = <1000>;
1615                                         type = "critical";
1616                                 };
1617                         };
1618                 };
1619         };
1620
1621         timer {
1622                 compatible = "arm,armv8-timer";
1623                 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) |
1624                                        IRQ_TYPE_LEVEL_LOW)>,
1625                                       <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) |
1626                                        IRQ_TYPE_LEVEL_LOW)>,
1627                                       <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) |
1628                                        IRQ_TYPE_LEVEL_LOW)>,
1629                                       <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) |
1630                                        IRQ_TYPE_LEVEL_LOW)>;
1631         };
1632 };