arch/arm64/boot/dts/renesas/r8a77965.dtsi

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Device Tree Source for the R-Car M3-N (R8A77965) SoC
   4  *
   5  * Copyright (C) 2018 Jacopo Mondi <jacopo+renesas@jmondi.org>
   6  *
   7  * Based on r8a7796.dtsi
   8  * Copyright (C) 2016 Renesas Electronics Corp.
   9  */
  10
  11 #include <dt-bindings/clock/r8a77965-cpg-mssr.h>
  12 #include <dt-bindings/interrupt-controller/arm-gic.h>
  13 #include <dt-bindings/power/r8a77965-sysc.h>
  14
  15 #define CPG_AUDIO_CLK_I         R8A77965_CLK_S0D4
  16
  17 / {
  18         compatible = "renesas,r8a77965";
  19         #address-cells = <2>;
  20         #size-cells = <2>;
  21
  22         aliases {
  23                 i2c0 = &i2c0;
  24                 i2c1 = &i2c1;
  25                 i2c2 = &i2c2;
  26                 i2c3 = &i2c3;
  27                 i2c4 = &i2c4;
  28                 i2c5 = &i2c5;
  29                 i2c6 = &i2c6;
  30                 i2c7 = &i2c_dvfs;
  31         };
  32
  33         /*
  34          * The external audio clocks are configured as 0 Hz fixed frequency
  35          * clocks by default.
  36          * Boards that provide audio clocks should override them.
  37          */
  38         audio_clk_a: audio_clk_a {
  39                 compatible = "fixed-clock";
  40                 #clock-cells = <0>;
  41                 clock-frequency = <0>;
  42         };
  43
  44         audio_clk_b: audio_clk_b {
  45                 compatible = "fixed-clock";
  46                 #clock-cells = <0>;
  47                 clock-frequency = <0>;
  48         };
  49
  50         audio_clk_c: audio_clk_c {
  51                 compatible = "fixed-clock";
  52                 #clock-cells = <0>;
  53                 clock-frequency = <0>;
  54         };
  55
  56         /* External CAN clock - to be overridden by boards that provide it */
  57         can_clk: can {
  58                 compatible = "fixed-clock";
  59                 #clock-cells = <0>;
  60                 clock-frequency = <0>;
  61         };
  62
  63         cluster0_opp: opp_table0 {
  64                 compatible = "operating-points-v2";
  65                 opp-shared;
  66
  67                 opp-500000000 {
  68                         opp-hz = /bits/ 64 <500000000>;
  69                         opp-microvolt = <830000>;
  70                         clock-latency-ns = <300000>;
  71                 };
  72                 opp-1000000000 {
  73                         opp-hz = /bits/ 64 <1000000000>;
  74                         opp-microvolt = <830000>;
  75                         clock-latency-ns = <300000>;
  76                 };
  77                 opp-1500000000 {
  78                         opp-hz = /bits/ 64 <1500000000>;
  79                         opp-microvolt = <830000>;
  80                         clock-latency-ns = <300000>;
  81                         opp-suspend;
  82                 };
  83                 opp-1600000000 {
  84                         opp-hz = /bits/ 64 <1600000000>;
  85                         opp-microvolt = <900000>;
  86                         clock-latency-ns = <300000>;
  87                         turbo-mode;
  88                 };
  89                 opp-1700000000 {
  90                         opp-hz = /bits/ 64 <1700000000>;
  91                         opp-microvolt = <900000>;
  92                         clock-latency-ns = <300000>;
  93                         turbo-mode;
  94                 };
  95                 opp-1800000000 {
  96                         opp-hz = /bits/ 64 <1800000000>;
  97                         opp-microvolt = <960000>;
  98                         clock-latency-ns = <300000>;
  99                         turbo-mode;
 100                 };
 101         };
 102
 103         cpus {
 104                 #address-cells = <1>;
 105                 #size-cells = <0>;
 106
 107                 a57_0: cpu@0 {
 108                         compatible = "arm,cortex-a57", "arm,armv8";
 109                         reg = <0x0>;
 110                         device_type = "cpu";
 111                         power-domains = <&sysc R8A77965_PD_CA57_CPU0>;
 112                         next-level-cache = <&L2_CA57>;
 113                         enable-method = "psci";
 114                         clocks = <&cpg CPG_CORE R8A77965_CLK_Z>;
 115                         operating-points-v2 = <&cluster0_opp>;
 116                 };
 117
 118                 a57_1: cpu@1 {
 119                         compatible = "arm,cortex-a57", "arm,armv8";
 120                         reg = <0x1>;
 121                         device_type = "cpu";
 122                         power-domains = <&sysc R8A77965_PD_CA57_CPU1>;
 123                         next-level-cache = <&L2_CA57>;
 124                         enable-method = "psci";
 125                         clocks = <&cpg CPG_CORE R8A77965_CLK_Z>;
 126                         operating-points-v2 = <&cluster0_opp>;
 127                 };
 128
 129                 L2_CA57: cache-controller-0 {
 130                         compatible = "cache";
 131                         power-domains = <&sysc R8A77965_PD_CA57_SCU>;
 132                         cache-unified;
 133                         cache-level = <2>;
 134                 };
 135         };
 136
 137         extal_clk: extal {
 138                 compatible = "fixed-clock";
 139                 #clock-cells = <0>;
 140                 /* This value must be overridden by the board */
 141                 clock-frequency = <0>;
 142         };
 143
 144         extalr_clk: extalr {
 145                 compatible = "fixed-clock";
 146                 #clock-cells = <0>;
 147                 /* This value must be overridden by the board */
 148                 clock-frequency = <0>;
 149         };
 150
 151         /* External PCIe clock - can be overridden by the board */
 152         pcie_bus_clk: pcie_bus {
 153                 compatible = "fixed-clock";
 154                 #clock-cells = <0>;
 155                 clock-frequency = <0>;
 156         };
 157
 158         pmu_a57 {
 159                 compatible = "arm,cortex-a57-pmu";
 160                 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
 161                                       <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
 162                 interrupt-affinity = <&a57_0>,
 163                                      <&a57_1>;
 164         };
 165
 166         psci {
 167                 compatible = "arm,psci-1.0", "arm,psci-0.2";
 168                 method = "smc";
 169         };
 170
 171         /* External SCIF clock - to be overridden by boards that provide it */
 172         scif_clk: scif {
 173                 compatible = "fixed-clock";
 174                 #clock-cells = <0>;
 175                 clock-frequency = <0>;
 176         };
 177
 178         soc {
 179                 compatible = "simple-bus";
 180                 interrupt-parent = <&gic>;
 181                 #address-cells = <2>;
 182                 #size-cells = <2>;
 183                 ranges;
 184
 185                 rwdt: watchdog@e6020000 {
 186                         compatible = "renesas,r8a77965-wdt",
 187                                      "renesas,rcar-gen3-wdt";
 188                         reg = <0 0xe6020000 0 0x0c>;
 189                         clocks = <&cpg CPG_MOD 402>;
 190                         power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
 191                         resets = <&cpg 402>;
 192                         status = "disabled";
 193                 };
 194
 195                 gpio0: gpio@e6050000 {
 196                         compatible = "renesas,gpio-r8a77965",
 197                                      "renesas,rcar-gen3-gpio";
 198                         reg = <0 0xe6050000 0 0x50>;
 199                         interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
 200                         #gpio-cells = <2>;
 201                         gpio-controller;
 202                         gpio-ranges = <&pfc 0 0 16>;
 203                         #interrupt-cells = <2>;
 204                         interrupt-controller;
 205                         clocks = <&cpg CPG_MOD 912>;
 206                         power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
 207                         resets = <&cpg 912>;
 208                 };
 209
 210                 gpio1: gpio@e6051000 {
 211                         compatible = "renesas,gpio-r8a77965",
 212                                      "renesas,rcar-gen3-gpio";
 213                         reg = <0 0xe6051000 0 0x50>;
 214                         interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
 215                         #gpio-cells = <2>;
 216                         gpio-controller;
 217                         gpio-ranges = <&pfc 0 32 29>;
 218                         #interrupt-cells = <2>;
 219                         interrupt-controller;
 220                         clocks = <&cpg CPG_MOD 911>;
 221                         power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
 222                         resets = <&cpg 911>;
 223                 };
 224
 225                 gpio2: gpio@e6052000 {
 226                         compatible = "renesas,gpio-r8a77965",
 227                                      "renesas,rcar-gen3-gpio";
 228                         reg = <0 0xe6052000 0 0x50>;
 229                         interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
 230                         #gpio-cells = <2>;
 231                         gpio-controller;
 232                         gpio-ranges = <&pfc 0 64 15>;
 233                         #interrupt-cells = <2>;
 234                         interrupt-controller;
 235                         clocks = <&cpg CPG_MOD 910>;
 236                         power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
 237                         resets = <&cpg 910>;
 238                 };
 239
 240                 gpio3: gpio@e6053000 {
 241                         compatible = "renesas,gpio-r8a77965",
 242                                      "renesas,rcar-gen3-gpio";
 243                         reg = <0 0xe6053000 0 0x50>;
 244                         interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
 245                         #gpio-cells = <2>;
 246                         gpio-controller;
 247                         gpio-ranges = <&pfc 0 96 16>;
 248                         #interrupt-cells = <2>;
 249                         interrupt-controller;
 250                         clocks = <&cpg CPG_MOD 909>;
 251                         power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
 252                         resets = <&cpg 909>;
 253                 };
 254
 255                 gpio4: gpio@e6054000 {
 256                         compatible = "renesas,gpio-r8a77965",
 257                                      "renesas,rcar-gen3-gpio";
 258                         reg = <0 0xe6054000 0 0x50>;
 259                         interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
 260                         #gpio-cells = <2>;
 261                         gpio-controller;
 262                         gpio-ranges = <&pfc 0 128 18>;
 263                         #interrupt-cells = <2>;
 264                         interrupt-controller;
 265                         clocks = <&cpg CPG_MOD 908>;
 266                         power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
 267                         resets = <&cpg 908>;
 268                 };
 269
 270                 gpio5: gpio@e6055000 {
 271                         compatible = "renesas,gpio-r8a77965",
 272                                      "renesas,rcar-gen3-gpio";
 273                         reg = <0 0xe6055000 0 0x50>;
 274                         interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
 275                         #gpio-cells = <2>;
 276                         gpio-controller;
 277                         gpio-ranges = <&pfc 0 160 26>;
 278                         #interrupt-cells = <2>;
 279                         interrupt-controller;
 280                         clocks = <&cpg CPG_MOD 907>;
 281                         power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
 282                         resets = <&cpg 907>;
 283                 };
 284
 285                 gpio6: gpio@e6055400 {
 286                         compatible = "renesas,gpio-r8a77965",
 287                                      "renesas,rcar-gen3-gpio";
 288                         reg = <0 0xe6055400 0 0x50>;
 289                         interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
 290                         #gpio-cells = <2>;
 291                         gpio-controller;
 292                         gpio-ranges = <&pfc 0 192 32>;
 293                         #interrupt-cells = <2>;
 294                         interrupt-controller;
 295                         clocks = <&cpg CPG_MOD 906>;
 296                         power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
 297                         resets = <&cpg 906>;
 298                 };
 299
 300                 gpio7: gpio@e6055800 {
 301                         compatible = "renesas,gpio-r8a77965",
 302                                      "renesas,rcar-gen3-gpio";
 303                         reg = <0 0xe6055800 0 0x50>;
 304                         interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
 305                         #gpio-cells = <2>;
 306                         gpio-controller;
 307                         gpio-ranges = <&pfc 0 224 4>;
 308                         #interrupt-cells = <2>;
 309                         interrupt-controller;
 310                         clocks = <&cpg CPG_MOD 905>;
 311                         power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
 312                         resets = <&cpg 905>;
 313                 };
 314
 315                 pfc: pin-controller@e6060000 {
 316                         compatible = "renesas,pfc-r8a77965";
 317                         reg = <0 0xe6060000 0 0x50c>;
 318                 };
 319
 320                 cpg: clock-controller@e6150000 {
 321                         compatible = "renesas,r8a77965-cpg-mssr";
 322                         reg = <0 0xe6150000 0 0x1000>;
 323                         clocks = <&extal_clk>, <&extalr_clk>;
 324                         clock-names = "extal", "extalr";
 325                         #clock-cells = <2>;
 326                         #power-domain-cells = <0>;
 327                         #reset-cells = <1>;
 328                 };
 329
 330                 rst: reset-controller@e6160000 {
 331                         compatible = "renesas,r8a77965-rst";
 332                         reg = <0 0xe6160000 0 0x0200>;
 333                 };
 334
 335                 sysc: system-controller@e6180000 {
 336                         compatible = "renesas,r8a77965-sysc";
 337                         reg = <0 0xe6180000 0 0x0400>;
 338                         #power-domain-cells = <1>;
 339                 };
 340
 341                 tsc: thermal@e6198000 {
 342                         compatible = "renesas,r8a77965-thermal";
 343                         reg = <0 0xe6198000 0 0x100>,
 344                               <0 0xe61a0000 0 0x100>,
 345                               <0 0xe61a8000 0 0x100>;
 346                         interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
 347                                      <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
 348                                      <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
 349                         clocks = <&cpg CPG_MOD 522>;
 350                         power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
 351                         resets = <&cpg 522>;
 352                         #thermal-sensor-cells = <1>;
 353                 };
 354
 355                 intc_ex: interrupt-controller@e61c0000 {
 356                         compatible = "renesas,intc-ex-r8a77965", "renesas,irqc";
 357                         #interrupt-cells = <2>;
 358                         interrupt-controller;
 359                         reg = <0 0xe61c0000 0 0x200>;
 360                         interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH
 361                                       GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH
 362                                       GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH
 363                                       GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH
 364                                       GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH
 365                                       GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
 366                         clocks = <&cpg CPG_MOD 407>;
 367                         power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
 368                         resets = <&cpg 407>;
 369                 };
 370
 371                 i2c0: i2c@e6500000 {
 372                         #address-cells = <1>;
 373                         #size-cells = <0>;
 374                         compatible = "renesas,i2c-r8a77965",
 375                                      "renesas,rcar-gen3-i2c";
 376                         reg = <0 0xe6500000 0 0x40>;
 377                         interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
 378                         clocks = <&cpg CPG_MOD 931>;
 379                         power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
 380                         resets = <&cpg 931>;
 381                         dmas = <&dmac1 0x91>, <&dmac1 0x90>,
 382                                <&dmac2 0x91>, <&dmac2 0x90>;
 383                         dma-names = "tx", "rx", "tx", "rx";
 384                         i2c-scl-internal-delay-ns = <110>;
 385                         status = "disabled";
 386                 };
 387
 388                 i2c1: i2c@e6508000 {
 389                         #address-cells = <1>;
 390                         #size-cells = <0>;
 391                         compatible = "renesas,i2c-r8a77965",
 392                                      "renesas,rcar-gen3-i2c";
 393                         reg = <0 0xe6508000 0 0x40>;
 394                         interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
 395                         clocks = <&cpg CPG_MOD 930>;
 396                         power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
 397                         resets = <&cpg 930>;
 398                         dmas = <&dmac1 0x93>, <&dmac1 0x92>,
 399                                <&dmac2 0x93>, <&dmac2 0x92>;
 400                         dma-names = "tx", "rx", "tx", "rx";
 401                         i2c-scl-internal-delay-ns = <6>;
 402                         status = "disabled";
 403                 };
 404
 405                 i2c2: i2c@e6510000 {
 406                         #address-cells = <1>;
 407                         #size-cells = <0>;
 408                         compatible = "renesas,i2c-r8a77965",
 409                                      "renesas,rcar-gen3-i2c";
 410                         reg = <0 0xe6510000 0 0x40>;
 411                         interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
 412                         clocks = <&cpg CPG_MOD 929>;
 413                         power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
 414                         resets = <&cpg 929>;
 415                         dmas = <&dmac1 0x95>, <&dmac1 0x94>,
 416                                <&dmac2 0x95>, <&dmac2 0x94>;
 417                         dma-names = "tx", "rx", "tx", "rx";
 418                         i2c-scl-internal-delay-ns = <6>;
 419                         status = "disabled";
 420                 };
 421
 422                 i2c3: i2c@e66d0000 {
 423                         #address-cells = <1>;
 424                         #size-cells = <0>;
 425                         compatible = "renesas,i2c-r8a77965",
 426                                      "renesas,rcar-gen3-i2c";
 427                         reg = <0 0xe66d0000 0 0x40>;
 428                         interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
 429                         clocks = <&cpg CPG_MOD 928>;
 430                         power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
 431                         resets = <&cpg 928>;
 432                         dmas = <&dmac0 0x97>, <&dmac0 0x96>;
 433                         dma-names = "tx", "rx";
 434                         i2c-scl-internal-delay-ns = <110>;
 435                         status = "disabled";
 436                 };
 437
 438                 i2c4: i2c@e66d8000 {
 439                         #address-cells = <1>;
 440                         #size-cells = <0>;
 441                         compatible = "renesas,i2c-r8a77965",
 442                                      "renesas,rcar-gen3-i2c";
 443                         reg = <0 0xe66d8000 0 0x40>;
 444                         interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
 445                         clocks = <&cpg CPG_MOD 927>;
 446                         power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
 447                         resets = <&cpg 927>;
 448                         dmas = <&dmac0 0x99>, <&dmac0 0x98>;
 449                         dma-names = "tx", "rx";
 450                         i2c-scl-internal-delay-ns = <110>;
 451                         status = "disabled";
 452                 };
 453
 454                 i2c5: i2c@e66e0000 {
 455                         #address-cells = <1>;
 456                         #size-cells = <0>;
 457                         compatible = "renesas,i2c-r8a77965",
 458                                      "renesas,rcar-gen3-i2c";
 459                         reg = <0 0xe66e0000 0 0x40>;
 460                         interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
 461                         clocks = <&cpg CPG_MOD 919>;
 462                         power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
 463                         resets = <&cpg 919>;
 464                         dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
 465                         dma-names = "tx", "rx";
 466                         i2c-scl-internal-delay-ns = <110>;
 467                         status = "disabled";
 468                 };
 469
 470                 i2c6: i2c@e66e8000 {
 471                         #address-cells = <1>;
 472                         #size-cells = <0>;
 473                         compatible = "renesas,i2c-r8a77965",
 474                                      "renesas,rcar-gen3-i2c";
 475                         reg = <0 0xe66e8000 0 0x40>;
 476                         interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
 477                         clocks = <&cpg CPG_MOD 918>;
 478                         power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
 479                         resets = <&cpg 918>;
 480                         dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
 481                         dma-names = "tx", "rx";
 482                         i2c-scl-internal-delay-ns = <6>;
 483                         status = "disabled";
 484                 };
 485
 486                 i2c_dvfs: i2c@e60b0000 {
 487                         #address-cells = <1>;
 488                         #size-cells = <0>;
 489                         compatible = "renesas,iic-r8a77965",
 490                                      "renesas,rcar-gen3-iic",
 491                                      "renesas,rmobile-iic";
 492                         reg = <0 0xe60b0000 0 0x425>;
 493                         interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
 494                         clocks = <&cpg CPG_MOD 926>;
 495                         power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
 496                         resets = <&cpg 926>;
 497                         dmas = <&dmac0 0x11>, <&dmac0 0x10>;
 498                         dma-names = "tx", "rx";
 499                         status = "disabled";
 500                 };
 501
 502                 hscif0: serial@e6540000 {
 503                         compatible = "renesas,hscif-r8a77965",
 504                                      "renesas,rcar-gen3-hscif",
 505                                      "renesas,hscif";
 506                         reg = <0 0xe6540000 0 0x60>;
 507                         interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
 508                         clocks = <&cpg CPG_MOD 520>,
 509                                  <&cpg CPG_CORE R8A77965_CLK_S3D1>,
 510                                  <&scif_clk>;
 511                         clock-names = "fck", "brg_int", "scif_clk";
 512                         dmas = <&dmac1 0x31>, <&dmac1 0x30>,
 513                                <&dmac2 0x31>, <&dmac2 0x30>;
 514                         dma-names = "tx", "rx", "tx", "rx";
 515                         power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
 516                         resets = <&cpg 520>;
 517                         status = "disabled";
 518                 };
 519
 520                 hscif1: serial@e6550000 {
 521                         compatible = "renesas,hscif-r8a77965",
 522                                      "renesas,rcar-gen3-hscif",
 523                                      "renesas,hscif";
 524                         reg = <0 0xe6550000 0 0x60>;
 525                         interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
 526                         clocks = <&cpg CPG_MOD 519>,
 527                                  <&cpg CPG_CORE R8A77965_CLK_S3D1>,
 528                                  <&scif_clk>;
 529                         clock-names = "fck", "brg_int", "scif_clk";
 530                         dmas = <&dmac1 0x33>, <&dmac1 0x32>,
 531                                <&dmac2 0x33>, <&dmac2 0x32>;
 532                         dma-names = "tx", "rx", "tx", "rx";
 533                         power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
 534                         resets = <&cpg 519>;
 535                         status = "disabled";
 536                 };
 537
 538                 hscif2: serial@e6560000 {
 539                         compatible = "renesas,hscif-r8a77965",
 540                                      "renesas,rcar-gen3-hscif",
 541                                      "renesas,hscif";
 542                         reg = <0 0xe6560000 0 0x60>;
 543                         interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
 544                         clocks = <&cpg CPG_MOD 518>,
 545                                  <&cpg CPG_CORE R8A77965_CLK_S3D1>,
 546                                  <&scif_clk>;
 547                         clock-names = "fck", "brg_int", "scif_clk";
 548                         dmas = <&dmac1 0x35>, <&dmac1 0x34>,
 549                                <&dmac2 0x35>, <&dmac2 0x34>;
 550                         dma-names = "tx", "rx", "tx", "rx";
 551                         power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
 552                         resets = <&cpg 518>;
 553                         status = "disabled";
 554                 };
 555
 556                 hscif3: serial@e66a0000 {
 557                         compatible = "renesas,hscif-r8a77965",
 558                                      "renesas,rcar-gen3-hscif",
 559                                      "renesas,hscif";
 560                         reg = <0 0xe66a0000 0 0x60>;
 561                         interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
 562                         clocks = <&cpg CPG_MOD 517>,
 563                                  <&cpg CPG_CORE R8A77965_CLK_S3D1>,
 564                                  <&scif_clk>;
 565                         clock-names = "fck", "brg_int", "scif_clk";
 566                         dmas = <&dmac0 0x37>, <&dmac0 0x36>;
 567                         dma-names = "tx", "rx";
 568                         power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
 569                         resets = <&cpg 517>;
 570                         status = "disabled";
 571                 };
 572
 573                 hscif4: serial@e66b0000 {
 574                         compatible = "renesas,hscif-r8a77965",
 575                                      "renesas,rcar-gen3-hscif",
 576                                      "renesas,hscif";
 577                         reg = <0 0xe66b0000 0 0x60>;
 578                         interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
 579                         clocks = <&cpg CPG_MOD 516>,
 580                                  <&cpg CPG_CORE R8A77965_CLK_S3D1>,
 581                                  <&scif_clk>;
 582                         clock-names = "fck", "brg_int", "scif_clk";
 583                         dmas = <&dmac0 0x39>, <&dmac0 0x38>;
 584                         dma-names = "tx", "rx";
 585                         power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
 586                         resets = <&cpg 516>;
 587                         status = "disabled";
 588                 };
 589
 590                 hsusb: usb@e6590000 {
 591                         compatible = "renesas,usbhs-r8a77965",
 592                                      "renesas,rcar-gen3-usbhs";
 593                         reg = <0 0xe6590000 0 0x200>;
 594                         interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
 595                         clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>;
 596                         dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
 597                                <&usb_dmac1 0>, <&usb_dmac1 1>;
 598                         dma-names = "ch0", "ch1", "ch2", "ch3";
 599                         renesas,buswait = <11>;
 600                         phys = <&usb2_phy0>;
 601                         phy-names = "usb";
 602                         power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
 603                         resets = <&cpg 704>, <&cpg 703>;
 604                         status = "disabled";
 605                 };
 606
 607                 usb_dmac0: dma-controller@e65a0000 {
 608                         compatible = "renesas,r8a77965-usb-dmac",
 609                                      "renesas,usb-dmac";
 610                         reg = <0 0xe65a0000 0 0x100>;
 611                         interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
 612                                       GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
 613                         interrupt-names = "ch0", "ch1";
 614                         clocks = <&cpg CPG_MOD 330>;
 615                         power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
 616                         resets = <&cpg 330>;
 617                         #dma-cells = <1>;
 618                         dma-channels = <2>;
 619                 };
 620
 621                 usb_dmac1: dma-controller@e65b0000 {
 622                         compatible = "renesas,r8a77965-usb-dmac",
 623                                      "renesas,usb-dmac";
 624                         reg = <0 0xe65b0000 0 0x100>;
 625                         interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
 626                                       GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
 627                         interrupt-names = "ch0", "ch1";
 628                         clocks = <&cpg CPG_MOD 331>;
 629                         power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
 630                         resets = <&cpg 331>;
 631                         #dma-cells = <1>;
 632                         dma-channels = <2>;
 633                 };
 634
 635                 usb3_phy0: usb-phy@e65ee000 {
 636                         compatible = "renesas,r8a77965-usb3-phy",
 637                                      "renesas,rcar-gen3-usb3-phy";
 638                         reg = <0 0xe65ee000 0 0x90>;
 639                         clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>,
 640                                  <&usb_extal_clk>;
 641                         clock-names = "usb3-if", "usb3s_clk", "usb_extal";
 642                         power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
 643                         resets = <&cpg 328>;
 644                         #phy-cells = <0>;
 645                         status = "disabled";
 646                 };
 647
 648                 dmac0: dma-controller@e6700000 {
 649                         compatible = "renesas,dmac-r8a77965",
 650                                      "renesas,rcar-dmac";
 651                         reg = <0 0xe6700000 0 0x10000>;
 652                         interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH
 653                                       GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
 654                                       GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
 655                                       GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
 656                                       GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
 657                                       GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
 658                                       GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
 659                                       GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
 660                                       GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
 661                                       GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
 662                                       GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
 663                                       GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
 664                                       GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
 665                                       GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
 666                                       GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
 667                                       GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH
 668                                       GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
 669                         interrupt-names = "error",
 670                                         "ch0", "ch1", "ch2", "ch3",
 671                                         "ch4", "ch5", "ch6", "ch7",
 672                                         "ch8", "ch9", "ch10", "ch11",
 673                                         "ch12", "ch13", "ch14", "ch15";
 674                         clocks = <&cpg CPG_MOD 219>;
 675                         clock-names = "fck";
 676                         power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
 677                         resets = <&cpg 219>;
 678                         #dma-cells = <1>;
 679                         dma-channels = <16>;
 680                         iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>,
 681                                <&ipmmu_ds0 2>, <&ipmmu_ds0 3>,
 682                                <&ipmmu_ds0 4>, <&ipmmu_ds0 5>,
 683                                <&ipmmu_ds0 6>, <&ipmmu_ds0 7>,
 684                                <&ipmmu_ds0 8>, <&ipmmu_ds0 9>,
 685                                <&ipmmu_ds0 10>, <&ipmmu_ds0 11>,
 686                                <&ipmmu_ds0 12>, <&ipmmu_ds0 13>,
 687                                <&ipmmu_ds0 14>, <&ipmmu_ds0 15>;
 688                 };
 689
 690                 dmac1: dma-controller@e7300000 {
 691                         compatible = "renesas,dmac-r8a77965",
 692                                      "renesas,rcar-dmac";
 693                         reg = <0 0xe7300000 0 0x10000>;
 694                         interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
 695                                       GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
 696                                       GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
 697                                       GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
 698                                       GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
 699                                       GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
 700                                       GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
 701                                       GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
 702                                       GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
 703                                       GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
 704                                       GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
 705                                       GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
 706                                       GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
 707                                       GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
 708                                       GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
 709                                       GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH
 710                                       GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
 711                         interrupt-names = "error",
 712                                         "ch0", "ch1", "ch2", "ch3",
 713                                         "ch4", "ch5", "ch6", "ch7",
 714                                         "ch8", "ch9", "ch10", "ch11",
 715                                         "ch12", "ch13", "ch14", "ch15";
 716                         clocks = <&cpg CPG_MOD 218>;
 717                         clock-names = "fck";
 718                         power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
 719                         resets = <&cpg 218>;
 720                         #dma-cells = <1>;
 721                         dma-channels = <16>;
 722                         iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>,
 723                                <&ipmmu_ds1 2>, <&ipmmu_ds1 3>,
 724                                <&ipmmu_ds1 4>, <&ipmmu_ds1 5>,
 725                                <&ipmmu_ds1 6>, <&ipmmu_ds1 7>,
 726                                <&ipmmu_ds1 8>, <&ipmmu_ds1 9>,
 727                                <&ipmmu_ds1 10>, <&ipmmu_ds1 11>,
 728                                <&ipmmu_ds1 12>, <&ipmmu_ds1 13>,
 729                                <&ipmmu_ds1 14>, <&ipmmu_ds1 15>;
 730                 };
 731
 732                 dmac2: dma-controller@e7310000 {
 733                         compatible = "renesas,dmac-r8a77965",
 734                                      "renesas,rcar-dmac";
 735                         reg = <0 0xe7310000 0 0x10000>;
 736                         interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH
 737                                       GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH
 738                                       GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH
 739                                       GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH
 740                                       GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH
 741                                       GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH
 742                                       GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH
 743                                       GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH
 744                                       GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH
 745                                       GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH
 746                                       GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH
 747                                       GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH
 748                                       GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH
 749                                       GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH
 750                                       GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH
 751                                       GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH
 752                                       GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
 753                         interrupt-names = "error",
 754                                         "ch0", "ch1", "ch2", "ch3",
 755                                         "ch4", "ch5", "ch6", "ch7",
 756                                         "ch8", "ch9", "ch10", "ch11",
 757                                         "ch12", "ch13", "ch14", "ch15";
 758                         clocks = <&cpg CPG_MOD 217>;
 759                         clock-names = "fck";
 760                         power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
 761                         resets = <&cpg 217>;
 762                         #dma-cells = <1>;
 763                         dma-channels = <16>;
 764                         iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>,
 765                                <&ipmmu_ds1 18>, <&ipmmu_ds1 19>,
 766                                <&ipmmu_ds1 20>, <&ipmmu_ds1 21>,
 767                                <&ipmmu_ds1 22>, <&ipmmu_ds1 23>,
 768                                <&ipmmu_ds1 24>, <&ipmmu_ds1 25>,
 769                                <&ipmmu_ds1 26>, <&ipmmu_ds1 27>,
 770                                <&ipmmu_ds1 28>, <&ipmmu_ds1 29>,
 771                                <&ipmmu_ds1 30>, <&ipmmu_ds1 31>;
 772                 };
 773
 774                 ipmmu_ds0: mmu@e6740000 {
 775                         compatible = "renesas,ipmmu-r8a77965";
 776                         reg = <0 0xe6740000 0 0x1000>;
 777                         renesas,ipmmu-main = <&ipmmu_mm 0>;
 778                         power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
 779                         #iommu-cells = <1>;
 780                 };
 781
 782                 ipmmu_ds1: mmu@e7740000 {
 783                         compatible = "renesas,ipmmu-r8a77965";
 784                         reg = <0 0xe7740000 0 0x1000>;
 785                         renesas,ipmmu-main = <&ipmmu_mm 1>;
 786                         power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
 787                         #iommu-cells = <1>;
 788                 };
 789
 790                 ipmmu_hc: mmu@e6570000 {
 791                         compatible = "renesas,ipmmu-r8a77965";
 792                         reg = <0 0xe6570000 0 0x1000>;
 793                         renesas,ipmmu-main = <&ipmmu_mm 2>;
 794                         power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
 795                         #iommu-cells = <1>;
 796                 };
 797
 798                 ipmmu_mm: mmu@e67b0000 {
 799                         compatible = "renesas,ipmmu-r8a77965";
 800                         reg = <0 0xe67b0000 0 0x1000>;
 801                         interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
 802                                      <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
 803                         power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
 804                         #iommu-cells = <1>;
 805                 };
 806
 807                 ipmmu_mp: mmu@ec670000 {
 808                         compatible = "renesas,ipmmu-r8a77965";
 809                         reg = <0 0xec670000 0 0x1000>;
 810                         renesas,ipmmu-main = <&ipmmu_mm 4>;
 811                         power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
 812                         #iommu-cells = <1>;
 813                 };
 814
 815                 ipmmu_pv0: mmu@fd800000 {
 816                         compatible = "renesas,ipmmu-r8a77965";
 817                         reg = <0 0xfd800000 0 0x1000>;
 818                         renesas,ipmmu-main = <&ipmmu_mm 6>;
 819                         power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
 820                         #iommu-cells = <1>;
 821                 };
 822
 823                 ipmmu_rt: mmu@ffc80000 {
 824                         compatible = "renesas,ipmmu-r8a77965";
 825                         reg = <0 0xffc80000 0 0x1000>;
 826                         renesas,ipmmu-main = <&ipmmu_mm 10>;
 827                         power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
 828                         #iommu-cells = <1>;
 829                 };
 830
 831                 ipmmu_vc0: mmu@fe6b0000 {
 832                         compatible = "renesas,ipmmu-r8a77965";
 833                         reg = <0 0xfe6b0000 0 0x1000>;
 834                         renesas,ipmmu-main = <&ipmmu_mm 12>;
 835                         power-domains = <&sysc R8A77965_PD_A3VC>;
 836                         #iommu-cells = <1>;
 837                 };
 838
 839                 ipmmu_vi0: mmu@febd0000 {
 840                         compatible = "renesas,ipmmu-r8a77965";
 841                         reg = <0 0xfebd0000 0 0x1000>;
 842                         renesas,ipmmu-main = <&ipmmu_mm 14>;
 843                         power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
 844                         #iommu-cells = <1>;
 845                 };
 846
 847                 ipmmu_vp0: mmu@fe990000 {
 848                         compatible = "renesas,ipmmu-r8a77965";
 849                         reg = <0 0xfe990000 0 0x1000>;
 850                         renesas,ipmmu-main = <&ipmmu_mm 16>;
 851                         power-domains = <&sysc R8A77965_PD_A3VP>;
 852                         #iommu-cells = <1>;
 853                 };
 854
 855                 avb: ethernet@e6800000 {
 856                         compatible = "renesas,etheravb-r8a77965",
 857                                      "renesas,etheravb-rcar-gen3";
 858                         reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
 859                         interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
 860                                      <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
 861                                      <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
 862                                      <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
 863                                      <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
 864                                      <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
 865                                      <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
 866                                      <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
 867                                      <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
 868                                      <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
 869                                      <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
 870                                      <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
 871                                      <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
 872                                      <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
 873                                      <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
 874                                      <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
 875                                      <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
 876                                      <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
 877                                      <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
 878                                      <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
 879                                      <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
 880                                      <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
 881                                      <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
 882                                      <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
 883                                      <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
 884                         interrupt-names = "ch0", "ch1", "ch2", "ch3",
 885                                           "ch4", "ch5", "ch6", "ch7",
 886                                           "ch8", "ch9", "ch10", "ch11",
 887                                           "ch12", "ch13", "ch14", "ch15",
 888                                           "ch16", "ch17", "ch18", "ch19",
 889                                           "ch20", "ch21", "ch22", "ch23",
 890                                           "ch24";
 891                         clocks = <&cpg CPG_MOD 812>;
 892                         power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
 893                         resets = <&cpg 812>;
 894                         phy-mode = "rgmii";
 895                         iommus = <&ipmmu_ds0 16>;
 896                         #address-cells = <1>;
 897                         #size-cells = <0>;
 898                         status = "disabled";
 899                 };
 900
 901                 can0: can@e6c30000 {
 902                         compatible = "renesas,can-r8a77965",
 903                                      "renesas,rcar-gen3-can";
 904                         reg = <0 0xe6c30000 0 0x1000>;
 905                         interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
 906                         clocks = <&cpg CPG_MOD 916>,
 907                                <&cpg CPG_CORE R8A77965_CLK_CANFD>,
 908                                <&can_clk>;
 909                         clock-names = "clkp1", "clkp2", "can_clk";
 910                         assigned-clocks = <&cpg CPG_CORE R8A77965_CLK_CANFD>;
 911                         assigned-clock-rates = <40000000>;
 912                         power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
 913                         resets = <&cpg 916>;
 914                         status = "disabled";
 915                 };
 916
 917                 can1: can@e6c38000 {
 918                         compatible = "renesas,can-r8a77965",
 919                                      "renesas,rcar-gen3-can";
 920                         reg = <0 0xe6c38000 0 0x1000>;
 921                         interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
 922                         clocks = <&cpg CPG_MOD 915>,
 923                                <&cpg CPG_CORE R8A77965_CLK_CANFD>,
 924                                <&can_clk>;
 925                         clock-names = "clkp1", "clkp2", "can_clk";
 926                         assigned-clocks = <&cpg CPG_CORE R8A77965_CLK_CANFD>;
 927                         assigned-clock-rates = <40000000>;
 928                         power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
 929                         resets = <&cpg 915>;
 930                         status = "disabled";
 931                 };
 932
 933                 canfd: can@e66c0000 {
 934                         compatible = "renesas,r8a77965-canfd",
 935                                      "renesas,rcar-gen3-canfd";
 936                         reg = <0 0xe66c0000 0 0x8000>;
 937                         interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
 938                                    <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
 939                         clocks = <&cpg CPG_MOD 914>,
 940                                <&cpg CPG_CORE R8A77965_CLK_CANFD>,
 941                                <&can_clk>;
 942                         clock-names = "fck", "canfd", "can_clk";
 943                         assigned-clocks = <&cpg CPG_CORE R8A77965_CLK_CANFD>;
 944                         assigned-clock-rates = <40000000>;
 945                         power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
 946                         resets = <&cpg 914>;
 947                         status = "disabled";
 948
 949                         channel0 {
 950                                 status = "disabled";
 951                         };
 952
 953                         channel1 {
 954                                 status = "disabled";
 955                         };
 956                 };
 957
 958                 pwm0: pwm@e6e30000 {
 959                         compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
 960                         reg = <0 0xe6e30000 0 8>;
 961                         #pwm-cells = <2>;
 962                         clocks = <&cpg CPG_MOD 523>;
 963                         resets = <&cpg 523>;
 964                         power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
 965                         status = "disabled";
 966                 };
 967
 968                 pwm1: pwm@e6e31000 {
 969                         compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
 970                         reg = <0 0xe6e31000 0 8>;
 971                         #pwm-cells = <2>;
 972                         clocks = <&cpg CPG_MOD 523>;
 973                         resets = <&cpg 523>;
 974                         power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
 975                         status = "disabled";
 976                 };
 977
 978                 pwm2: pwm@e6e32000 {
 979                         compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
 980                         reg = <0 0xe6e32000 0 8>;
 981                         #pwm-cells = <2>;
 982                         clocks = <&cpg CPG_MOD 523>;
 983                         resets = <&cpg 523>;
 984                         power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
 985                         status = "disabled";
 986                 };
 987
 988                 pwm3: pwm@e6e33000 {
 989                         compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
 990                         reg = <0 0xe6e33000 0 8>;
 991                         #pwm-cells = <2>;
 992                         clocks = <&cpg CPG_MOD 523>;
 993                         resets = <&cpg 523>;
 994                         power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
 995                         status = "disabled";
 996                 };
 997
 998                 pwm4: pwm@e6e34000 {
 999                         compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
1000                         reg = <0 0xe6e34000 0 8>;
1001                         #pwm-cells = <2>;
1002                         clocks = <&cpg CPG_MOD 523>;
1003                         resets = <&cpg 523>;
1004                         power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1005                         status = "disabled";
1006                 };
1007
1008                 pwm5: pwm@e6e35000 {
1009                         compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
1010                         reg = <0 0xe6e35000 0 8>;
1011                         #pwm-cells = <2>;
1012                         clocks = <&cpg CPG_MOD 523>;
1013                         resets = <&cpg 523>;
1014                         power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1015                         status = "disabled";
1016                 };
1017
1018                 pwm6: pwm@e6e36000 {
1019                         compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
1020                         reg = <0 0xe6e36000 0 8>;
1021                         #pwm-cells = <2>;
1022                         clocks = <&cpg CPG_MOD 523>;
1023                         resets = <&cpg 523>;
1024                         power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1025                         status = "disabled";
1026                 };
1027
1028                 scif0: serial@e6e60000 {
1029                         compatible = "renesas,scif-r8a77965",
1030                                      "renesas,rcar-gen3-scif", "renesas,scif";
1031                         reg = <0 0xe6e60000 0 64>;
1032                         interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
1033                         clocks = <&cpg CPG_MOD 207>,
1034                                  <&cpg CPG_CORE R8A77965_CLK_S3D1>,
1035                                  <&scif_clk>;
1036                         clock-names = "fck", "brg_int", "scif_clk";
1037                         dmas = <&dmac1 0x51>, <&dmac1 0x50>,
1038                                <&dmac2 0x51>, <&dmac2 0x50>;
1039                         dma-names = "tx", "rx", "tx", "rx";
1040                         power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1041                         resets = <&cpg 207>;
1042                         status = "disabled";
1043                 };
1044
1045                 scif1: serial@e6e68000 {
1046                         compatible = "renesas,scif-r8a77965",
1047                                      "renesas,rcar-gen3-scif", "renesas,scif";
1048                         reg = <0 0xe6e68000 0 64>;
1049                         interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
1050                         clocks = <&cpg CPG_MOD 206>,
1051                                  <&cpg CPG_CORE R8A77965_CLK_S3D1>,
1052                                  <&scif_clk>;
1053                         clock-names = "fck", "brg_int", "scif_clk";
1054                         dmas = <&dmac1 0x53>, <&dmac1 0x52>,
1055                                <&dmac2 0x53>, <&dmac2 0x52>;
1056                         dma-names = "tx", "rx", "tx", "rx";
1057                         power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1058                         resets = <&cpg 206>;
1059                         status = "disabled";
1060                 };
1061
1062                 scif2: serial@e6e88000 {
1063                         compatible = "renesas,scif-r8a77965",
1064                                      "renesas,rcar-gen3-scif", "renesas,scif";
1065                         reg = <0 0xe6e88000 0 64>;
1066                         interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
1067                         clocks = <&cpg CPG_MOD 310>,
1068                                  <&cpg CPG_CORE R8A77965_CLK_S3D1>,
1069                                  <&scif_clk>;
1070                         clock-names = "fck", "brg_int", "scif_clk";
1071                         power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1072                         resets = <&cpg 310>;
1073                         status = "disabled";
1074                 };
1075
1076                 scif3: serial@e6c50000 {
1077                         compatible = "renesas,scif-r8a77965",
1078                                      "renesas,rcar-gen3-scif", "renesas,scif";
1079                         reg = <0 0xe6c50000 0 64>;
1080                         interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
1081                         clocks = <&cpg CPG_MOD 204>,
1082                                  <&cpg CPG_CORE R8A77965_CLK_S3D1>,
1083                                  <&scif_clk>;
1084                         clock-names = "fck", "brg_int", "scif_clk";
1085                         dmas = <&dmac0 0x57>, <&dmac0 0x56>;
1086                         dma-names = "tx", "rx";
1087                         power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1088                         resets = <&cpg 204>;
1089                         status = "disabled";
1090                 };
1091
1092                 scif4: serial@e6c40000 {
1093                         compatible = "renesas,scif-r8a77965",
1094                                      "renesas,rcar-gen3-scif", "renesas,scif";
1095                         reg = <0 0xe6c40000 0 64>;
1096                         interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
1097                         clocks = <&cpg CPG_MOD 203>,
1098                                  <&cpg CPG_CORE R8A77965_CLK_S3D1>,
1099                                  <&scif_clk>;
1100                         clock-names = "fck", "brg_int", "scif_clk";
1101                         dmas = <&dmac0 0x59>, <&dmac0 0x58>;
1102                         dma-names = "tx", "rx";
1103                         power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1104                         resets = <&cpg 203>;
1105                         status = "disabled";
1106                 };
1107
1108                 scif5: serial@e6f30000 {
1109                         compatible = "renesas,scif-r8a77965",
1110                                      "renesas,rcar-gen3-scif", "renesas,scif";
1111                         reg = <0 0xe6f30000 0 64>;
1112                         interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
1113                         clocks = <&cpg CPG_MOD 202>,
1114                                  <&cpg CPG_CORE R8A77965_CLK_S3D1>,
1115                                  <&scif_clk>;
1116                         clock-names = "fck", "brg_int", "scif_clk";
1117                         dmas = <&dmac1 0x5b>, <&dmac1 0x5a>,
1118                                <&dmac2 0x5b>, <&dmac2 0x5a>;
1119                         dma-names = "tx", "rx", "tx", "rx";
1120                         power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1121                         resets = <&cpg 202>;
1122                         status = "disabled";
1123                 };
1124
1125                 msiof0: spi@e6e90000 {
1126                         compatible = "renesas,msiof-r8a77965",
1127                                      "renesas,rcar-gen3-msiof";
1128                         reg = <0 0xe6e90000 0 0x0064>;
1129                         interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
1130                         clocks = <&cpg CPG_MOD 211>;
1131                         dmas = <&dmac1 0x41>, <&dmac1 0x40>,
1132                                <&dmac2 0x41>, <&dmac2 0x40>;
1133                         dma-names = "tx", "rx", "tx", "rx";
1134                         power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1135                         resets = <&cpg 211>;
1136                         #address-cells = <1>;
1137                         #size-cells = <0>;
1138                         status = "disabled";
1139                 };
1140
1141                 msiof1: spi@e6ea0000 {
1142                         compatible = "renesas,msiof-r8a77965",
1143                                      "renesas,rcar-gen3-msiof";
1144                         reg = <0 0xe6ea0000 0 0x0064>;
1145                         interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
1146                         clocks = <&cpg CPG_MOD 210>;
1147                         dmas = <&dmac1 0x43>, <&dmac1 0x42>,
1148                                <&dmac2 0x43>, <&dmac2 0x42>;
1149                         dma-names = "tx", "rx", "tx", "rx";
1150                         power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1151                         resets = <&cpg 210>;
1152                         #address-cells = <1>;
1153                         #size-cells = <0>;
1154                         status = "disabled";
1155                 };
1156
1157                 msiof2: spi@e6c00000 {
1158                         compatible = "renesas,msiof-r8a77965",
1159                                      "renesas,rcar-gen3-msiof";
1160                         reg = <0 0xe6c00000 0 0x0064>;
1161                         interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
1162                         clocks = <&cpg CPG_MOD 209>;
1163                         dmas = <&dmac0 0x45>, <&dmac0 0x44>;
1164                         dma-names = "tx", "rx";
1165                         power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1166                         resets = <&cpg 209>;
1167                         #address-cells = <1>;
1168                         #size-cells = <0>;
1169                         status = "disabled";
1170                 };
1171
1172                 msiof3: spi@e6c10000 {
1173                         compatible = "renesas,msiof-r8a77965",
1174                                      "renesas,rcar-gen3-msiof";
1175                         reg = <0 0xe6c10000 0 0x0064>;
1176                         interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
1177                         clocks = <&cpg CPG_MOD 208>;
1178                         dmas = <&dmac0 0x47>, <&dmac0 0x46>;
1179                         dma-names = "tx", "rx";
1180                         power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1181                         resets = <&cpg 208>;
1182                         #address-cells = <1>;
1183                         #size-cells = <0>;
1184                         status = "disabled";
1185                 };
1186
1187                 vin0: video@e6ef0000 {
1188                         compatible = "renesas,vin-r8a77965";
1189                         reg = <0 0xe6ef0000 0 0x1000>;
1190                         interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
1191                         clocks = <&cpg CPG_MOD 811>;
1192                         power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1193                         resets = <&cpg 811>;
1194                         renesas,id = <0>;
1195                         status = "disabled";
1196
1197                         ports {
1198                                 #address-cells = <1>;
1199                                 #size-cells = <0>;
1200
1201                                 port@1 {
1202                                         #address-cells = <1>;
1203                                         #size-cells = <0>;
1204
1205                                         reg = <1>;
1206
1207                                         vin0csi20: endpoint@0 {
1208                                                 reg = <0>;
1209                                                 remote-endpoint = <&csi20vin0>;
1210                                         };
1211                                         vin0csi40: endpoint@2 {
1212                                                 reg = <2>;
1213                                                 remote-endpoint = <&csi40vin0>;
1214                                         };
1215                                 };
1216                         };
1217                 };
1218
1219                 vin1: video@e6ef1000 {
1220                         compatible = "renesas,vin-r8a77965";
1221                         reg = <0 0xe6ef1000 0 0x1000>;
1222                         interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
1223                         clocks = <&cpg CPG_MOD 810>;
1224                         power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1225                         resets = <&cpg 810>;
1226                         renesas,id = <1>;
1227                         status = "disabled";
1228
1229                         ports {
1230                                 #address-cells = <1>;
1231                                 #size-cells = <0>;
1232
1233                                 port@1 {
1234                                         #address-cells = <1>;
1235                                         #size-cells = <0>;
1236
1237                                         reg = <1>;
1238
1239                                         vin1csi20: endpoint@0 {
1240                                                 reg = <0>;
1241                                                 remote-endpoint = <&csi20vin1>;
1242                                         };
1243                                         vin1csi40: endpoint@2 {
1244                                                 reg = <2>;
1245                                                 remote-endpoint = <&csi40vin1>;
1246                                         };
1247                                 };
1248                         };
1249                 };
1250
1251                 vin2: video@e6ef2000 {
1252                         compatible = "renesas,vin-r8a77965";
1253                         reg = <0 0xe6ef2000 0 0x1000>;
1254                         interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
1255                         clocks = <&cpg CPG_MOD 809>;
1256                         power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1257                         resets = <&cpg 809>;
1258                         renesas,id = <2>;
1259                         status = "disabled";
1260
1261                         ports {
1262                                 #address-cells = <1>;
1263                                 #size-cells = <0>;
1264
1265                                 port@1 {
1266                                         #address-cells = <1>;
1267                                         #size-cells = <0>;
1268
1269                                         reg = <1>;
1270
1271                                         vin2csi20: endpoint@0 {
1272                                                 reg = <0>;
1273                                                 remote-endpoint = <&csi20vin2>;
1274                                         };
1275                                         vin2csi40: endpoint@2 {
1276                                                 reg = <2>;
1277                                                 remote-endpoint = <&csi40vin2>;
1278                                         };
1279                                 };
1280                         };
1281                 };
1282
1283                 vin3: video@e6ef3000 {
1284                         compatible = "renesas,vin-r8a77965";
1285                         reg = <0 0xe6ef3000 0 0x1000>;
1286                         interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
1287                         clocks = <&cpg CPG_MOD 808>;
1288                         power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1289                         resets = <&cpg 808>;
1290                         renesas,id = <3>;
1291                         status = "disabled";
1292
1293                         ports {
1294                                 #address-cells = <1>;
1295                                 #size-cells = <0>;
1296
1297                                 port@1 {
1298                                         #address-cells = <1>;
1299                                         #size-cells = <0>;
1300
1301                                         reg = <1>;
1302
1303                                         vin3csi20: endpoint@0 {
1304                                                 reg = <0>;
1305                                                 remote-endpoint = <&csi20vin3>;
1306                                         };
1307                                         vin3csi40: endpoint@2 {
1308                                                 reg = <2>;
1309                                                 remote-endpoint = <&csi40vin3>;
1310                                         };
1311                                 };
1312                         };
1313                 };
1314
1315                 vin4: video@e6ef4000 {
1316                         compatible = "renesas,vin-r8a77965";
1317                         reg = <0 0xe6ef4000 0 0x1000>;
1318                         interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
1319                         clocks = <&cpg CPG_MOD 807>;
1320                         power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1321                         resets = <&cpg 807>;
1322                         renesas,id = <4>;
1323                         status = "disabled";
1324
1325                         ports {
1326                                 #address-cells = <1>;
1327                                 #size-cells = <0>;
1328
1329                                 port@1 {
1330                                         #address-cells = <1>;
1331                                         #size-cells = <0>;
1332
1333                                         reg = <1>;
1334
1335                                         vin4csi20: endpoint@0 {
1336                                                 reg = <0>;
1337                                                 remote-endpoint = <&csi20vin4>;
1338                                         };
1339                                         vin4csi40: endpoint@2 {
1340                                                 reg = <2>;
1341                                                 remote-endpoint = <&csi40vin4>;
1342                                         };
1343                                 };
1344                         };
1345                 };
1346
1347                 vin5: video@e6ef5000 {
1348                         compatible = "renesas,vin-r8a77965";
1349                         reg = <0 0xe6ef5000 0 0x1000>;
1350                         interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
1351                         clocks = <&cpg CPG_MOD 806>;
1352                         power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1353                         resets = <&cpg 806>;
1354                         renesas,id = <5>;
1355                         status = "disabled";
1356
1357                         ports {
1358                                 #address-cells = <1>;
1359                                 #size-cells = <0>;
1360
1361                                 port@1 {
1362                                         #address-cells = <1>;
1363                                         #size-cells = <0>;
1364
1365                                         reg = <1>;
1366
1367                                         vin5csi20: endpoint@0 {
1368                                                 reg = <0>;
1369                                                 remote-endpoint = <&csi20vin5>;
1370                                         };
1371                                         vin5csi40: endpoint@2 {
1372                                                 reg = <2>;
1373                                                 remote-endpoint = <&csi40vin5>;
1374                                         };
1375                                 };
1376                         };
1377                 };
1378
1379                 vin6: video@e6ef6000 {
1380                         compatible = "renesas,vin-r8a77965";
1381                         reg = <0 0xe6ef6000 0 0x1000>;
1382                         interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
1383                         clocks = <&cpg CPG_MOD 805>;
1384                         power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1385                         resets = <&cpg 805>;
1386                         renesas,id = <6>;
1387                         status = "disabled";
1388
1389                         ports {
1390                                 #address-cells = <1>;
1391                                 #size-cells = <0>;
1392
1393                                 port@1 {
1394                                         #address-cells = <1>;
1395                                         #size-cells = <0>;
1396
1397                                         reg = <1>;
1398
1399                                         vin6csi20: endpoint@0 {
1400                                                 reg = <0>;
1401                                                 remote-endpoint = <&csi20vin6>;
1402                                         };
1403                                         vin6csi40: endpoint@2 {
1404                                                 reg = <2>;
1405                                                 remote-endpoint = <&csi40vin6>;
1406                                         };
1407                                 };
1408                         };
1409                 };
1410
1411                 vin7: video@e6ef7000 {
1412                         compatible = "renesas,vin-r8a77965";
1413                         reg = <0 0xe6ef7000 0 0x1000>;
1414                         interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>;
1415                         clocks = <&cpg CPG_MOD 804>;
1416                         power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1417                         resets = <&cpg 804>;
1418                         renesas,id = <7>;
1419                         status = "disabled";
1420
1421                         ports {
1422                                 #address-cells = <1>;
1423                                 #size-cells = <0>;
1424
1425                                 port@1 {
1426                                         #address-cells = <1>;
1427                                         #size-cells = <0>;
1428
1429                                         reg = <1>;
1430
1431                                         vin7csi20: endpoint@0 {
1432                                                 reg = <0>;
1433                                                 remote-endpoint = <&csi20vin7>;
1434                                         };
1435                                         vin7csi40: endpoint@2 {
1436                                                 reg = <2>;
1437                                                 remote-endpoint = <&csi40vin7>;
1438                                         };
1439                                 };
1440                         };
1441                 };
1442
1443                 rcar_sound: sound@ec500000 {
1444                         /*
1445                          * #sound-dai-cells is required
1446                          *
1447                          * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1448                          * Multi  DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
1449                          */
1450                         /*
1451                          * #clock-cells is required for audio_clkout0/1/2/3
1452                          *
1453                          * clkout       : #clock-cells = <0>;   <&rcar_sound>;
1454                          * clkout0/1/2/3: #clock-cells = <1>;   <&rcar_sound N>;
1455                          */
1456                         compatible =  "renesas,rcar_sound-r8a77965", "renesas,rcar_sound-gen3";
1457                         reg =   <0 0xec500000 0 0x1000>, /* SCU */
1458                                 <0 0xec5a0000 0 0x100>,  /* ADG */
1459                                 <0 0xec540000 0 0x1000>, /* SSIU */
1460                                 <0 0xec541000 0 0x280>,  /* SSI */
1461                                 <0 0xec740000 0 0x200>;  /* Audio DMAC peri peri*/
1462                         reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1463
1464                         clocks = <&cpg CPG_MOD 1005>,
1465                                  <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1466                                  <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1467                                  <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1468                                  <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1469                                  <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1470                                  <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1471                                  <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1472                                  <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1473                                  <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1474                                  <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1475                                  <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1476                                  <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1477                                  <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1478                                  <&audio_clk_a>, <&audio_clk_b>,
1479                                  <&audio_clk_c>,
1480                                  <&cpg CPG_CORE R8A77965_CLK_S0D4>;
1481                         clock-names = "ssi-all",
1482                                       "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1483                                       "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1484                                       "ssi.1", "ssi.0",
1485                                       "src.9", "src.8", "src.7", "src.6",
1486                                       "src.5", "src.4", "src.3", "src.2",
1487                                       "src.1", "src.0",
1488                                       "mix.1", "mix.0",
1489                                       "ctu.1", "ctu.0",
1490                                       "dvc.0", "dvc.1",
1491                                       "clk_a", "clk_b", "clk_c", "clk_i";
1492                         power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1493                         resets = <&cpg 1005>,
1494                                  <&cpg 1006>, <&cpg 1007>,
1495                                  <&cpg 1008>, <&cpg 1009>,
1496                                  <&cpg 1010>, <&cpg 1011>,
1497                                  <&cpg 1012>, <&cpg 1013>,
1498                                  <&cpg 1014>, <&cpg 1015>;
1499                         reset-names = "ssi-all",
1500                                       "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1501                                       "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1502                                       "ssi.1", "ssi.0";
1503                         status = "disabled";
1504
1505                         rcar_sound,dvc {
1506                                 dvc0: dvc-0 {
1507                                         dmas = <&audma1 0xbc>;
1508                                         dma-names = "tx";
1509                                 };
1510                                 dvc1: dvc-1 {
1511                                         dmas = <&audma1 0xbe>;
1512                                         dma-names = "tx";
1513                                 };
1514                         };
1515
1516                         rcar_sound,mix {
1517                                 mix0: mix-0 { };
1518                                 mix1: mix-1 { };
1519                         };
1520
1521                         rcar_sound,ctu {
1522                                 ctu00: ctu-0 { };
1523                                 ctu01: ctu-1 { };
1524                                 ctu02: ctu-2 { };
1525                                 ctu03: ctu-3 { };
1526                                 ctu10: ctu-4 { };
1527                                 ctu11: ctu-5 { };
1528                                 ctu12: ctu-6 { };
1529                                 ctu13: ctu-7 { };
1530                         };
1531
1532                         rcar_sound,src {
1533                                 src0: src-0 {
1534                                         interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
1535                                         dmas = <&audma0 0x85>, <&audma1 0x9a>;
1536                                         dma-names = "rx", "tx";
1537                                 };
1538                                 src1: src-1 {
1539                                         interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1540                                         dmas = <&audma0 0x87>, <&audma1 0x9c>;
1541                                         dma-names = "rx", "tx";
1542                                 };
1543                                 src2: src-2 {
1544                                         interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1545                                         dmas = <&audma0 0x89>, <&audma1 0x9e>;
1546                                         dma-names = "rx", "tx";
1547                                 };
1548                                 src3: src-3 {
1549                                         interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1550                                         dmas = <&audma0 0x8b>, <&audma1 0xa0>;
1551                                         dma-names = "rx", "tx";
1552                                 };
1553                                 src4: src-4 {
1554                                         interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1555                                         dmas = <&audma0 0x8d>, <&audma1 0xb0>;
1556                                         dma-names = "rx", "tx";
1557                                 };
1558                                 src5: src-5 {
1559                                         interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1560                                         dmas = <&audma0 0x8f>, <&audma1 0xb2>;
1561                                         dma-names = "rx", "tx";
1562                                 };
1563                                 src6: src-6 {
1564                                         interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1565                                         dmas = <&audma0 0x91>, <&audma1 0xb4>;
1566                                         dma-names = "rx", "tx";
1567                                 };
1568                                 src7: src-7 {
1569                                         interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
1570                                         dmas = <&audma0 0x93>, <&audma1 0xb6>;
1571                                         dma-names = "rx", "tx";
1572                                 };
1573                                 src8: src-8 {
1574                                         interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1575                                         dmas = <&audma0 0x95>, <&audma1 0xb8>;
1576                                         dma-names = "rx", "tx";
1577                                 };
1578                                 src9: src-9 {
1579                                         interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
1580                                         dmas = <&audma0 0x97>, <&audma1 0xba>;
1581                                         dma-names = "rx", "tx";
1582                                 };
1583                         };
1584
1585                         rcar_sound,ssi {
1586                                 ssi0: ssi-0 {
1587                                         interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
1588                                         dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>;
1589                                         dma-names = "rx", "tx", "rxu", "txu";
1590                                 };
1591                                 ssi1: ssi-1 {
1592                                         interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
1593                                         dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>;
1594                                         dma-names = "rx", "tx", "rxu", "txu";
1595                                 };
1596                                 ssi2: ssi-2 {
1597                                         interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
1598                                         dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>;
1599                                         dma-names = "rx", "tx", "rxu", "txu";
1600                                 };
1601                                 ssi3: ssi-3 {
1602                                         interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
1603                                         dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>;
1604                                         dma-names = "rx", "tx", "rxu", "txu";
1605                                 };
1606                                 ssi4: ssi-4 {
1607                                         interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
1608                                         dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>;
1609                                         dma-names = "rx", "tx", "rxu", "txu";
1610                                 };
1611                                 ssi5: ssi-5 {
1612                                         interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
1613                                         dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>;
1614                                         dma-names = "rx", "tx", "rxu", "txu";
1615                                 };
1616                                 ssi6: ssi-6 {
1617                                         interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
1618                                         dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>;
1619                                         dma-names = "rx", "tx", "rxu", "txu";
1620                                 };
1621                                 ssi7: ssi-7 {
1622                                         interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
1623                                         dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>;
1624                                         dma-names = "rx", "tx", "rxu", "txu";
1625                                 };
1626                                 ssi8: ssi-8 {
1627                                         interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
1628                                         dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>;
1629                                         dma-names = "rx", "tx", "rxu", "txu";
1630                                 };
1631                                 ssi9: ssi-9 {
1632                                         interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
1633                                         dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>;
1634                                         dma-names = "rx", "tx", "rxu", "txu";
1635                                 };
1636                         };
1637                 };
1638
1639                 audma0: dma-controller@ec700000 {
1640                         compatible = "renesas,dmac-r8a77965",
1641                                      "renesas,rcar-dmac";
1642                         reg = <0 0xec700000 0 0x10000>;
1643                         interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH
1644                                       GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
1645                                       GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
1646                                       GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
1647                                       GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
1648                                       GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
1649                                       GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
1650                                       GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
1651                                       GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
1652                                       GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
1653                                       GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
1654                                       GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
1655                                       GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
1656                                       GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH
1657                                       GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
1658                                       GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
1659                                       GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
1660                         interrupt-names = "error",
1661                                         "ch0", "ch1", "ch2", "ch3",
1662                                         "ch4", "ch5", "ch6", "ch7",
1663                                         "ch8", "ch9", "ch10", "ch11",
1664                                         "ch12", "ch13", "ch14", "ch15";
1665                         clocks = <&cpg CPG_MOD 502>;
1666                         clock-names = "fck";
1667                         power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1668                         resets = <&cpg 502>;
1669                         #dma-cells = <1>;
1670                         dma-channels = <16>;
1671                 };
1672
1673                 audma1: dma-controller@ec720000 {
1674                         compatible = "renesas,dmac-r8a77965",
1675                                      "renesas,rcar-dmac";
1676                         reg = <0 0xec720000 0 0x10000>;
1677                         interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH
1678                                       GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
1679                                       GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
1680                                       GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
1681                                       GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
1682                                       GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
1683                                       GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
1684                                       GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
1685                                       GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
1686                                       GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
1687                                       GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH
1688                                       GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
1689                                       GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
1690                                       GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH
1691                                       GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH
1692                                       GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH
1693                                       GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>;
1694                         interrupt-names = "error",
1695                                         "ch0", "ch1", "ch2", "ch3",
1696                                         "ch4", "ch5", "ch6", "ch7",
1697                                         "ch8", "ch9", "ch10", "ch11",
1698                                         "ch12", "ch13", "ch14", "ch15";
1699                         clocks = <&cpg CPG_MOD 501>;
1700                         clock-names = "fck";
1701                         power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1702                         resets = <&cpg 501>;
1703                         #dma-cells = <1>;
1704                         dma-channels = <16>;
1705                 };
1706
1707                 xhci0: usb@ee000000 {
1708                         compatible = "renesas,xhci-r8a77965",
1709                                      "renesas,rcar-gen3-xhci";
1710                         reg = <0 0xee000000 0 0xc00>;
1711                         interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
1712                         clocks = <&cpg CPG_MOD 328>;
1713                         power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1714                         resets = <&cpg 328>;
1715                         status = "disabled";
1716                 };
1717
1718                 usb3_peri0: usb@ee020000 {
1719                         compatible = "renesas,r8a77965-usb3-peri",
1720                                      "renesas,rcar-gen3-usb3-peri";
1721                         reg = <0 0xee020000 0 0x400>;
1722                         interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
1723                         clocks = <&cpg CPG_MOD 328>;
1724                         power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1725                         resets = <&cpg 328>;
1726                         status = "disabled";
1727                 };
1728
1729                 ohci0: usb@ee080000 {
1730                         compatible = "generic-ohci";
1731                         reg = <0 0xee080000 0 0x100>;
1732                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1733                         clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
1734                         phys = <&usb2_phy0>;
1735                         phy-names = "usb";
1736                         power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1737                         resets = <&cpg 703>, <&cpg 704>;
1738                         status = "disabled";
1739                 };
1740
1741                 ohci1: usb@ee0a0000 {
1742                         compatible = "generic-ohci";
1743                         reg = <0 0xee0a0000 0 0x100>;
1744                         interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1745                         clocks = <&cpg CPG_MOD 702>;
1746                         phys = <&usb2_phy1>;
1747                         phy-names = "usb";
1748                         power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1749                         resets = <&cpg 702>;
1750                         status = "disabled";
1751                 };
1752
1753                 ehci0: usb@ee080100 {
1754                         compatible = "generic-ehci";
1755                         reg = <0 0xee080100 0 0x100>;
1756                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1757                         clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
1758                         phys = <&usb2_phy0>;
1759                         phy-names = "usb";
1760                         companion = <&ohci0>;
1761                         power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1762                         resets = <&cpg 703>, <&cpg 704>;
1763                         status = "disabled";
1764                 };
1765
1766                 ehci1: usb@ee0a0100 {
1767                         compatible = "generic-ehci";
1768                         reg = <0 0xee0a0100 0 0x100>;
1769                         interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1770                         clocks = <&cpg CPG_MOD 702>;
1771                         phys = <&usb2_phy1>;
1772                         phy-names = "usb";
1773                         companion = <&ohci1>;
1774                         power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1775                         resets = <&cpg 702>;
1776                         status = "disabled";
1777                 };
1778
1779                 usb2_phy0: usb-phy@ee080200 {
1780                         compatible = "renesas,usb2-phy-r8a77965",
1781                                      "renesas,rcar-gen3-usb2-phy";
1782                         reg = <0 0xee080200 0 0x700>;
1783                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1784                         clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
1785                         power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1786                         resets = <&cpg 703>, <&cpg 704>;
1787                         #phy-cells = <0>;
1788                         status = "disabled";
1789                 };
1790
1791                 usb2_phy1: usb-phy@ee0a0200 {
1792                         compatible = "renesas,usb2-phy-r8a77965",
1793                                      "renesas,rcar-gen3-usb2-phy";
1794                         reg = <0 0xee0a0200 0 0x700>;
1795                         clocks = <&cpg CPG_MOD 702>;
1796                         power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1797                         resets = <&cpg 702>;
1798                         #phy-cells = <0>;
1799                         status = "disabled";
1800                 };
1801
1802                 sdhi0: sd@ee100000 {
1803                         compatible = "renesas,sdhi-r8a77965",
1804                                      "renesas,rcar-gen3-sdhi";
1805                         reg = <0 0xee100000 0 0x2000>;
1806                         interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
1807                         clocks = <&cpg CPG_MOD 314>;
1808                         max-frequency = <200000000>;
1809                         power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1810                         resets = <&cpg 314>;
1811                         status = "disabled";
1812                 };
1813
1814                 sdhi1: sd@ee120000 {
1815                         compatible = "renesas,sdhi-r8a77965",
1816                                      "renesas,rcar-gen3-sdhi";
1817                         reg = <0 0xee120000 0 0x2000>;
1818                         interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
1819                         clocks = <&cpg CPG_MOD 313>;
1820                         max-frequency = <200000000>;
1821                         power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1822                         resets = <&cpg 313>;
1823                         status = "disabled";
1824                 };
1825
1826                 sdhi2: sd@ee140000 {
1827                         compatible = "renesas,sdhi-r8a77965",
1828                                      "renesas,rcar-gen3-sdhi";
1829                         reg = <0 0xee140000 0 0x2000>;
1830                         interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
1831                         clocks = <&cpg CPG_MOD 312>;
1832                         max-frequency = <200000000>;
1833                         power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1834                         resets = <&cpg 312>;
1835                         status = "disabled";
1836                 };
1837
1838                 sdhi3: sd@ee160000 {
1839                         compatible = "renesas,sdhi-r8a77965",
1840                                      "renesas,rcar-gen3-sdhi";
1841                         reg = <0 0xee160000 0 0x2000>;
1842                         interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
1843                         clocks = <&cpg CPG_MOD 311>;
1844                         max-frequency = <200000000>;
1845                         power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1846                         resets = <&cpg 311>;
1847                         status = "disabled";
1848                 };
1849
1850                 sata: sata@ee300000 {
1851                         compatible = "renesas,sata-r8a77965",
1852                                      "renesas,rcar-gen3-sata";
1853                         reg = <0 0xee300000 0 0x200000>;
1854                         interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
1855                         clocks = <&cpg CPG_MOD 815>;
1856                         power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1857                         resets = <&cpg 815>;
1858                         status = "disabled";
1859                 };
1860
1861                 gic: interrupt-controller@f1010000 {
1862                         compatible = "arm,gic-400";
1863                         #interrupt-cells = <3>;
1864                         #address-cells = <0>;
1865                         interrupt-controller;
1866                         reg = <0x0 0xf1010000 0 0x1000>,
1867                               <0x0 0xf1020000 0 0x20000>,
1868                               <0x0 0xf1040000 0 0x20000>,
1869                               <0x0 0xf1060000 0 0x20000>;
1870                         interrupts = <GIC_PPI 9
1871                                         (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
1872                         clocks = <&cpg CPG_MOD 408>;
1873                         clock-names = "clk";
1874                         power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1875                         resets = <&cpg 408>;
1876                 };
1877
1878                 pciec0: pcie@fe000000 {
1879                         compatible = "renesas,pcie-r8a77965",
1880                                      "renesas,pcie-rcar-gen3";
1881                         reg = <0 0xfe000000 0 0x80000>;
1882                         #address-cells = <3>;
1883                         #size-cells = <2>;
1884                         bus-range = <0x00 0xff>;
1885                         device_type = "pci";
1886                         ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
1887                                 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
1888                                 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
1889                                 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
1890                         /* Map all possible DDR as inbound ranges */
1891                         dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
1892                         interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
1893                                 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
1894                                 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
1895                         #interrupt-cells = <1>;
1896                         interrupt-map-mask = <0 0 0 0>;
1897                         interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
1898                         clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
1899                         clock-names = "pcie", "pcie_bus";
1900                         power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1901                         resets = <&cpg 319>;
1902                         status = "disabled";
1903                 };
1904
1905                 pciec1: pcie@ee800000 {
1906                         compatible = "renesas,pcie-r8a77965",
1907                                      "renesas,pcie-rcar-gen3";
1908                         reg = <0 0xee800000 0 0x80000>;
1909                         #address-cells = <3>;
1910                         #size-cells = <2>;
1911                         bus-range = <0x00 0xff>;
1912                         device_type = "pci";
1913                         ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000
1914                                 0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000
1915                                 0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000
1916                                 0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
1917                         /* Map all possible DDR as inbound ranges */
1918                         dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
1919                         interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
1920                                 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
1921                                 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
1922                         #interrupt-cells = <1>;
1923                         interrupt-map-mask = <0 0 0 0>;
1924                         interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
1925                         clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>;
1926                         clock-names = "pcie", "pcie_bus";
1927                         power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1928                         resets = <&cpg 318>;
1929                         status = "disabled";
1930                 };
1931
1932                 fdp1@fe940000 {
1933                         compatible = "renesas,fdp1";
1934                         reg = <0 0xfe940000 0 0x2400>;
1935                         interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
1936                         clocks = <&cpg CPG_MOD 119>;
1937                         power-domains = <&sysc R8A77965_PD_A3VP>;
1938                         resets = <&cpg 119>;
1939                         renesas,fcp = <&fcpf0>;
1940                 };
1941
1942                 fcpf0: fcp@fe950000 {
1943                         compatible = "renesas,fcpf";
1944                         reg = <0 0xfe950000 0 0x200>;
1945                         clocks = <&cpg CPG_MOD 615>;
1946                         power-domains = <&sysc R8A77965_PD_A3VP>;
1947                         resets = <&cpg 615>;
1948                 };
1949
1950                 vspb: vsp@fe960000 {
1951                         compatible = "renesas,vsp2";
1952                         reg = <0 0xfe960000 0 0x8000>;
1953                         interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
1954                         clocks = <&cpg CPG_MOD 626>;
1955                         power-domains = <&sysc R8A77965_PD_A3VP>;
1956                         resets = <&cpg 626>;
1957
1958                         renesas,fcp = <&fcpvb0>;
1959                 };
1960
1961                 fcpvb0: fcp@fe96f000 {
1962                         compatible = "renesas,fcpv";
1963                         reg = <0 0xfe96f000 0 0x200>;
1964                         clocks = <&cpg CPG_MOD 607>;
1965                         power-domains = <&sysc R8A77965_PD_A3VP>;
1966                         resets = <&cpg 607>;
1967                 };
1968
1969                 vspi0: vsp@fe9a0000 {
1970                         compatible = "renesas,vsp2";
1971                         reg = <0 0xfe9a0000 0 0x8000>;
1972                         interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
1973                         clocks = <&cpg CPG_MOD 631>;
1974                         power-domains = <&sysc R8A77965_PD_A3VP>;
1975                         resets = <&cpg 631>;
1976
1977                         renesas,fcp = <&fcpvi0>;
1978                 };
1979
1980                 fcpvi0: fcp@fe9af000 {
1981                         compatible = "renesas,fcpv";
1982                         reg = <0 0xfe9af000 0 0x200>;
1983                         clocks = <&cpg CPG_MOD 611>;
1984                         power-domains = <&sysc R8A77965_PD_A3VP>;
1985                         resets = <&cpg 611>;
1986                 };
1987
1988                 vspd0: vsp@fea20000 {
1989                         compatible = "renesas,vsp2";
1990                         reg = <0 0xfea20000 0 0x5000>;
1991                         interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>;
1992                         clocks = <&cpg CPG_MOD 623>;
1993                         power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1994                         resets = <&cpg 623>;
1995
1996                         renesas,fcp = <&fcpvd0>;
1997                 };
1998
1999                 fcpvd0: fcp@fea27000 {
2000                         compatible = "renesas,fcpv";
2001                         reg = <0 0xfea27000 0 0x200>;
2002                         clocks = <&cpg CPG_MOD 603>;
2003                         power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2004                         resets = <&cpg 603>;
2005                 };
2006
2007                 vspd1: vsp@fea28000 {
2008                         compatible = "renesas,vsp2";
2009                         reg = <0 0xfea28000 0 0x5000>;
2010                         interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>;
2011                         clocks = <&cpg CPG_MOD 622>;
2012                         power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2013                         resets = <&cpg 622>;
2014
2015                         renesas,fcp = <&fcpvd1>;
2016                 };
2017
2018                 fcpvd1: fcp@fea2f000 {
2019                         compatible = "renesas,fcpv";
2020                         reg = <0 0xfea2f000 0 0x200>;
2021                         clocks = <&cpg CPG_MOD 602>;
2022                         power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2023                         resets = <&cpg 602>;
2024                 };
2025
2026                 csi20: csi2@fea80000 {
2027                         compatible = "renesas,r8a77965-csi2";
2028                         reg = <0 0xfea80000 0 0x10000>;
2029                         interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
2030                         clocks = <&cpg CPG_MOD 714>;
2031                         power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2032                         resets = <&cpg 714>;
2033                         status = "disabled";
2034
2035                         ports {
2036                                 #address-cells = <1>;
2037                                 #size-cells = <0>;
2038
2039                                 port@1 {
2040                                         #address-cells = <1>;
2041                                         #size-cells = <0>;
2042
2043                                         reg = <1>;
2044
2045                                         csi20vin0: endpoint@0 {
2046                                                 reg = <0>;
2047                                                 remote-endpoint = <&vin0csi20>;
2048                                         };
2049                                         csi20vin1: endpoint@1 {
2050                                                 reg = <1>;
2051                                                 remote-endpoint = <&vin1csi20>;
2052                                         };
2053                                         csi20vin2: endpoint@2 {
2054                                                 reg = <2>;
2055                                                 remote-endpoint = <&vin2csi20>;
2056                                         };
2057                                         csi20vin3: endpoint@3 {
2058                                                 reg = <3>;
2059                                                 remote-endpoint = <&vin3csi20>;
2060                                         };
2061                                         csi20vin4: endpoint@4 {
2062                                                 reg = <4>;
2063                                                 remote-endpoint = <&vin4csi20>;
2064                                         };
2065                                         csi20vin5: endpoint@5 {
2066                                                 reg = <5>;
2067                                                 remote-endpoint = <&vin5csi20>;
2068                                         };
2069                                         csi20vin6: endpoint@6 {
2070                                                 reg = <6>;
2071                                                 remote-endpoint = <&vin6csi20>;
2072                                         };
2073                                         csi20vin7: endpoint@7 {
2074                                                 reg = <7>;
2075                                                 remote-endpoint = <&vin7csi20>;
2076                                         };
2077                                 };
2078                         };
2079                 };
2080
2081                 csi40: csi2@feaa0000 {
2082                         compatible = "renesas,r8a77965-csi2";
2083                         reg = <0 0xfeaa0000 0 0x10000>;
2084                         interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
2085                         clocks = <&cpg CPG_MOD 716>;
2086                         power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2087                         resets = <&cpg 716>;
2088                         status = "disabled";
2089
2090                         ports {
2091                                 #address-cells = <1>;
2092                                 #size-cells = <0>;
2093
2094                                 port@1 {
2095                                         #address-cells = <1>;
2096                                         #size-cells = <0>;
2097
2098                                         reg = <1>;
2099
2100                                         csi40vin0: endpoint@0 {
2101                                                 reg = <0>;
2102                                                 remote-endpoint = <&vin0csi40>;
2103                                         };
2104                                         csi40vin1: endpoint@1 {
2105                                                 reg = <1>;
2106                                                 remote-endpoint = <&vin1csi40>;
2107                                         };
2108                                         csi40vin2: endpoint@2 {
2109                                                 reg = <2>;
2110                                                 remote-endpoint = <&vin2csi40>;
2111                                         };
2112                                         csi40vin3: endpoint@3 {
2113                                                 reg = <3>;
2114                                                 remote-endpoint = <&vin3csi40>;
2115                                         };
2116                                         csi40vin4: endpoint@4 {
2117                                                 reg = <4>;
2118                                                 remote-endpoint = <&vin4csi40>;
2119                                         };
2120                                         csi40vin5: endpoint@5 {
2121                                                 reg = <5>;
2122                                                 remote-endpoint = <&vin5csi40>;
2123                                         };
2124                                         csi40vin6: endpoint@6 {
2125                                                 reg = <6>;
2126                                                 remote-endpoint = <&vin6csi40>;
2127                                         };
2128                                         csi40vin7: endpoint@7 {
2129                                                 reg = <7>;
2130                                                 remote-endpoint = <&vin7csi40>;
2131                                         };
2132                                 };
2133                         };
2134                 };
2135
2136                 hdmi0: hdmi@fead0000 {
2137                         compatible = "renesas,r8a77965-hdmi",
2138                                      "renesas,rcar-gen3-hdmi";
2139                         reg = <0 0xfead0000 0 0x10000>;
2140                         interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>;
2141                         clocks = <&cpg CPG_MOD 729>,
2142                                  <&cpg CPG_CORE R8A77965_CLK_HDMI>;
2143                         clock-names = "iahb", "isfr";
2144                         power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2145                         resets = <&cpg 729>;
2146                         status = "disabled";
2147
2148                         ports {
2149                                 #address-cells = <1>;
2150                                 #size-cells = <0>;
2151                                 port@0 {
2152                                         reg = <0>;
2153                                         dw_hdmi0_in: endpoint {
2154                                                 remote-endpoint = <&du_out_hdmi0>;
2155                                         };
2156                                 };
2157                                 port@1 {
2158                                         reg = <1>;
2159                                 };
2160                         };
2161                 };
2162
2163                 du: display@feb00000 {
2164                         compatible = "renesas,du-r8a77965";
2165                         reg = <0 0xfeb00000 0 0x80000>;
2166                         reg-names = "du";
2167                         interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
2168                                      <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
2169                                      <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>;
2170                         clocks = <&cpg CPG_MOD 724>,
2171                                  <&cpg CPG_MOD 723>,
2172                                  <&cpg CPG_MOD 721>;
2173                         clock-names = "du.0", "du.1", "du.3";
2174                         status = "disabled";
2175
2176                         vsps = <&vspd0 0 &vspd1 0 &vspd0 1>;
2177
2178                         ports {
2179                                 #address-cells = <1>;
2180                                 #size-cells = <0>;
2181
2182                                 port@0 {
2183                                         reg = <0>;
2184                                         du_out_rgb: endpoint {
2185                                         };
2186                                 };
2187                                 port@1 {
2188                                         reg = <1>;
2189                                         du_out_hdmi0: endpoint {
2190                                                 remote-endpoint = <&dw_hdmi0_in>;
2191                                         };
2192                                 };
2193                                 port@2 {
2194                                         reg = <2>;
2195                                         du_out_lvds0: endpoint {
2196                                                 remote-endpoint = <&lvds0_in>;
2197                                         };
2198                                 };
2199                         };
2200                 };
2201
2202                 lvds0: lvds@feb90000 {
2203                         compatible = "renesas,r8a77965-lvds";
2204                         reg = <0 0xfeb90000 0 0x14>;
2205                         clocks = <&cpg CPG_MOD 727>;
2206                         power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2207                         resets = <&cpg 727>;
2208                         status = "disabled";
2209
2210                         ports {
2211                                 #address-cells = <1>;
2212                                 #size-cells = <0>;
2213
2214                                 port@0 {
2215                                         reg = <0>;
2216                                         lvds0_in: endpoint {
2217                                                 remote-endpoint = <&du_out_lvds0>;
2218                                         };
2219                                 };
2220                                 port@1 {
2221                                         reg = <1>;
2222                                         lvds0_out: endpoint {
2223                                         };
2224                                 };
2225                         };
2226                 };
2227
2228                 prr: chipid@fff00044 {
2229                         compatible = "renesas,prr";
2230                         reg = <0 0xfff00044 0 4>;
2231                 };
2232         };
2233
2234         thermal-zones {
2235                 sensor_thermal1: sensor-thermal1 {
2236                         polling-delay-passive = <250>;
2237                         polling-delay = <1000>;
2238                         thermal-sensors = <&tsc 0>;
2239
2240                         trips {
2241                                 sensor1_crit: sensor1-crit {
2242                                         temperature = <120000>;
2243                                         hysteresis = <1000>;
2244                                         type = "critical";
2245                                 };
2246                         };
2247                 };
2248
2249                 sensor_thermal2: sensor-thermal2 {
2250                         polling-delay-passive = <250>;
2251                         polling-delay = <1000>;
2252                         thermal-sensors = <&tsc 1>;
2253
2254                         trips {
2255                                 sensor2_crit: sensor2-crit {
2256                                         temperature = <120000>;
2257                                         hysteresis = <1000>;
2258                                         type = "critical";
2259                                 };
2260                         };
2261                 };
2262
2263                 sensor_thermal3: sensor-thermal3 {
2264                         polling-delay-passive = <250>;
2265                         polling-delay = <1000>;
2266                         thermal-sensors = <&tsc 2>;
2267
2268                         trips {
2269                                 sensor3_crit: sensor3-crit {
2270                                         temperature = <120000>;
2271                                         hysteresis = <1000>;
2272                                         type = "critical";
2273                                 };
2274                         };
2275                 };
2276         };
2277
2278         timer {
2279                 compatible = "arm,armv8-timer";
2280                 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
2281                                       <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
2282                                       <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
2283                                       <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
2284         };
2285
2286         /* External USB clocks - can be overridden by the board */
2287         usb3s0_clk: usb3s0 {
2288                 compatible = "fixed-clock";
2289                 #clock-cells = <0>;
2290                 clock-frequency = <0>;
2291         };
2292
2293         usb_extal_clk: usb_extal {
2294                 compatible = "fixed-clock";
2295                 #clock-cells = <0>;
2296                 clock-frequency = <0>;
2297         };
2298 };