arch/arm64/boot/dts/renesas/r8a774e1.dtsi

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Device Tree Source for the r8a774e1 SoC
   4  *
   5  * Copyright (C) 2020 Renesas Electronics Corp.
   6  */
   7
   8 #include <dt-bindings/interrupt-controller/irq.h>
   9 #include <dt-bindings/interrupt-controller/arm-gic.h>
  10 #include <dt-bindings/clock/r8a774e1-cpg-mssr.h>
  11 #include <dt-bindings/power/r8a774e1-sysc.h>
  12
  13 #define CPG_AUDIO_CLK_I         R8A774E1_CLK_S0D4
  14
  15 / {
  16         compatible = "renesas,r8a774e1";
  17         #address-cells = <2>;
  18         #size-cells = <2>;
  19
  20         /*
  21          * The external audio clocks are configured as 0 Hz fixed frequency
  22          * clocks by default.
  23          * Boards that provide audio clocks should override them.
  24          */
  25         audio_clk_a: audio_clk_a {
  26                 compatible = "fixed-clock";
  27                 #clock-cells = <0>;
  28                 clock-frequency = <0>;
  29         };
  30
  31         audio_clk_b: audio_clk_b {
  32                 compatible = "fixed-clock";
  33                 #clock-cells = <0>;
  34                 clock-frequency = <0>;
  35         };
  36
  37         audio_clk_c: audio_clk_c {
  38                 compatible = "fixed-clock";
  39                 #clock-cells = <0>;
  40                 clock-frequency = <0>;
  41         };
  42
  43         /* External CAN clock - to be overridden by boards that provide it */
  44         can_clk: can {
  45                 compatible = "fixed-clock";
  46                 #clock-cells = <0>;
  47                 clock-frequency = <0>;
  48         };
  49
  50         cluster0_opp: opp_table0 {
  51                 compatible = "operating-points-v2";
  52                 opp-shared;
  53
  54                 opp-500000000 {
  55                         opp-hz = /bits/ 64 <500000000>;
  56                         opp-microvolt = <820000>;
  57                         clock-latency-ns = <300000>;
  58                 };
  59                 opp-1000000000 {
  60                         opp-hz = /bits/ 64 <1000000000>;
  61                         opp-microvolt = <820000>;
  62                         clock-latency-ns = <300000>;
  63                 };
  64                 opp-1500000000 {
  65                         opp-hz = /bits/ 64 <1500000000>;
  66                         opp-microvolt = <820000>;
  67                         clock-latency-ns = <300000>;
  68                         opp-suspend;
  69                 };
  70         };
  71
  72         cluster1_opp: opp_table1 {
  73                 compatible = "operating-points-v2";
  74                 opp-shared;
  75
  76                 opp-800000000 {
  77                         opp-hz = /bits/ 64 <800000000>;
  78                         opp-microvolt = <820000>;
  79                         clock-latency-ns = <300000>;
  80                 };
  81                 opp-1000000000 {
  82                         opp-hz = /bits/ 64 <1000000000>;
  83                         opp-microvolt = <820000>;
  84                         clock-latency-ns = <300000>;
  85                 };
  86                 opp-1200000000 {
  87                         opp-hz = /bits/ 64 <1200000000>;
  88                         opp-microvolt = <820000>;
  89                         clock-latency-ns = <300000>;
  90                 };
  91         };
  92
  93         cpus {
  94                 #address-cells = <1>;
  95                 #size-cells = <0>;
  96
  97                 cpu-map {
  98                         cluster0 {
  99                                 core0 {
 100                                         cpu = <&a57_0>;
 101                                 };
 102                                 core1 {
 103                                         cpu = <&a57_1>;
 104                                 };
 105                                 core2 {
 106                                         cpu = <&a57_2>;
 107                                 };
 108                                 core3 {
 109                                         cpu = <&a57_3>;
 110                                 };
 111                         };
 112
 113                         cluster1 {
 114                                 core0 {
 115                                         cpu = <&a53_0>;
 116                                 };
 117                                 core1 {
 118                                         cpu = <&a53_1>;
 119                                 };
 120                                 core2 {
 121                                         cpu = <&a53_2>;
 122                                 };
 123                                 core3 {
 124                                         cpu = <&a53_3>;
 125                                 };
 126                         };
 127                 };
 128
 129                 a57_0: cpu@0 {
 130                         compatible = "arm,cortex-a57";
 131                         reg = <0x0>;
 132                         device_type = "cpu";
 133                         power-domains = <&sysc R8A774E1_PD_CA57_CPU0>;
 134                         next-level-cache = <&L2_CA57>;
 135                         enable-method = "psci";
 136                         cpu-idle-states = <&CPU_SLEEP_0>;
 137                         dynamic-power-coefficient = <854>;
 138                         clocks = <&cpg CPG_CORE R8A774E1_CLK_Z>;
 139                         operating-points-v2 = <&cluster0_opp>;
 140                         capacity-dmips-mhz = <1024>;
 141                         #cooling-cells = <2>;
 142                 };
 143
 144                 a57_1: cpu@1 {
 145                         compatible = "arm,cortex-a57";
 146                         reg = <0x1>;
 147                         device_type = "cpu";
 148                         power-domains = <&sysc R8A774E1_PD_CA57_CPU1>;
 149                         next-level-cache = <&L2_CA57>;
 150                         enable-method = "psci";
 151                         cpu-idle-states = <&CPU_SLEEP_0>;
 152                         clocks = <&cpg CPG_CORE R8A774E1_CLK_Z>;
 153                         operating-points-v2 = <&cluster0_opp>;
 154                         capacity-dmips-mhz = <1024>;
 155                         #cooling-cells = <2>;
 156                 };
 157
 158                 a57_2: cpu@2 {
 159                         compatible = "arm,cortex-a57";
 160                         reg = <0x2>;
 161                         device_type = "cpu";
 162                         power-domains = <&sysc R8A774E1_PD_CA57_CPU2>;
 163                         next-level-cache = <&L2_CA57>;
 164                         enable-method = "psci";
 165                         cpu-idle-states = <&CPU_SLEEP_0>;
 166                         clocks = <&cpg CPG_CORE R8A774E1_CLK_Z>;
 167                         operating-points-v2 = <&cluster0_opp>;
 168                         capacity-dmips-mhz = <1024>;
 169                         #cooling-cells = <2>;
 170                 };
 171
 172                 a57_3: cpu@3 {
 173                         compatible = "arm,cortex-a57";
 174                         reg = <0x3>;
 175                         device_type = "cpu";
 176                         power-domains = <&sysc R8A774E1_PD_CA57_CPU3>;
 177                         next-level-cache = <&L2_CA57>;
 178                         enable-method = "psci";
 179                         cpu-idle-states = <&CPU_SLEEP_0>;
 180                         clocks = <&cpg CPG_CORE R8A774E1_CLK_Z>;
 181                         operating-points-v2 = <&cluster0_opp>;
 182                         capacity-dmips-mhz = <1024>;
 183                         #cooling-cells = <2>;
 184                 };
 185
 186                 a53_0: cpu@100 {
 187                         compatible = "arm,cortex-a53";
 188                         reg = <0x100>;
 189                         device_type = "cpu";
 190                         power-domains = <&sysc R8A774E1_PD_CA53_CPU0>;
 191                         next-level-cache = <&L2_CA53>;
 192                         enable-method = "psci";
 193                         cpu-idle-states = <&CPU_SLEEP_1>;
 194                         #cooling-cells = <2>;
 195                         dynamic-power-coefficient = <277>;
 196                         clocks = <&cpg CPG_CORE R8A774E1_CLK_Z2>;
 197                         operating-points-v2 = <&cluster1_opp>;
 198                         capacity-dmips-mhz = <535>;
 199                 };
 200
 201                 a53_1: cpu@101 {
 202                         compatible = "arm,cortex-a53";
 203                         reg = <0x101>;
 204                         device_type = "cpu";
 205                         power-domains = <&sysc R8A774E1_PD_CA53_CPU1>;
 206                         next-level-cache = <&L2_CA53>;
 207                         enable-method = "psci";
 208                         cpu-idle-states = <&CPU_SLEEP_1>;
 209                         clocks = <&cpg CPG_CORE R8A774E1_CLK_Z2>;
 210                         operating-points-v2 = <&cluster1_opp>;
 211                         capacity-dmips-mhz = <535>;
 212                 };
 213
 214                 a53_2: cpu@102 {
 215                         compatible = "arm,cortex-a53";
 216                         reg = <0x102>;
 217                         device_type = "cpu";
 218                         power-domains = <&sysc R8A774E1_PD_CA53_CPU2>;
 219                         next-level-cache = <&L2_CA53>;
 220                         enable-method = "psci";
 221                         cpu-idle-states = <&CPU_SLEEP_1>;
 222                         clocks = <&cpg CPG_CORE R8A774E1_CLK_Z2>;
 223                         operating-points-v2 = <&cluster1_opp>;
 224                         capacity-dmips-mhz = <535>;
 225                 };
 226
 227                 a53_3: cpu@103 {
 228                         compatible = "arm,cortex-a53";
 229                         reg = <0x103>;
 230                         device_type = "cpu";
 231                         power-domains = <&sysc R8A774E1_PD_CA53_CPU3>;
 232                         next-level-cache = <&L2_CA53>;
 233                         enable-method = "psci";
 234                         cpu-idle-states = <&CPU_SLEEP_1>;
 235                         clocks = <&cpg CPG_CORE R8A774E1_CLK_Z2>;
 236                         operating-points-v2 = <&cluster1_opp>;
 237                         capacity-dmips-mhz = <535>;
 238                 };
 239
 240                 L2_CA57: cache-controller-0 {
 241                         compatible = "cache";
 242                         power-domains = <&sysc R8A774E1_PD_CA57_SCU>;
 243                         cache-unified;
 244                         cache-level = <2>;
 245                 };
 246
 247                 L2_CA53: cache-controller-1 {
 248                         compatible = "cache";
 249                         power-domains = <&sysc R8A774E1_PD_CA53_SCU>;
 250                         cache-unified;
 251                         cache-level = <2>;
 252                 };
 253
 254                 idle-states {
 255                         entry-method = "psci";
 256
 257                         CPU_SLEEP_0: cpu-sleep-0 {
 258                                 compatible = "arm,idle-state";
 259                                 arm,psci-suspend-param = <0x0010000>;
 260                                 local-timer-stop;
 261                                 entry-latency-us = <400>;
 262                                 exit-latency-us = <500>;
 263                                 min-residency-us = <4000>;
 264                         };
 265
 266                         CPU_SLEEP_1: cpu-sleep-1 {
 267                                 compatible = "arm,idle-state";
 268                                 arm,psci-suspend-param = <0x0010000>;
 269                                 local-timer-stop;
 270                                 entry-latency-us = <700>;
 271                                 exit-latency-us = <700>;
 272                                 min-residency-us = <5000>;
 273                         };
 274                 };
 275         };
 276
 277         extal_clk: extal {
 278                 compatible = "fixed-clock";
 279                 #clock-cells = <0>;
 280                 /* This value must be overridden by the board */
 281                 clock-frequency = <0>;
 282         };
 283
 284         extalr_clk: extalr {
 285                 compatible = "fixed-clock";
 286                 #clock-cells = <0>;
 287                 /* This value must be overridden by the board */
 288                 clock-frequency = <0>;
 289         };
 290
 291         /* External PCIe clock - can be overridden by the board */
 292         pcie_bus_clk: pcie_bus {
 293                 compatible = "fixed-clock";
 294                 #clock-cells = <0>;
 295                 clock-frequency = <0>;
 296         };
 297
 298         pmu_a53 {
 299                 compatible = "arm,cortex-a53-pmu";
 300                 interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
 301                                       <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
 302                                       <&gic GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
 303                                       <&gic GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
 304                 interrupt-affinity = <&a53_0>, <&a53_1>, <&a53_2>, <&a53_3>;
 305         };
 306
 307         pmu_a57 {
 308                 compatible = "arm,cortex-a57-pmu";
 309                 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
 310                                       <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>,
 311                                       <&gic GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>,
 312                                       <&gic GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
 313                 interrupt-affinity = <&a57_0>, <&a57_1>, <&a57_2>, <&a57_3>;
 314         };
 315
 316         psci {
 317                 compatible = "arm,psci-1.0", "arm,psci-0.2";
 318                 method = "smc";
 319         };
 320
 321         /* External SCIF clock - to be overridden by boards that provide it */
 322         scif_clk: scif {
 323                 compatible = "fixed-clock";
 324                 #clock-cells = <0>;
 325                 clock-frequency = <0>;
 326         };
 327
 328         soc {
 329                 compatible = "simple-bus";
 330                 interrupt-parent = <&gic>;
 331                 #address-cells = <2>;
 332                 #size-cells = <2>;
 333                 ranges;
 334
 335                 rwdt: watchdog@e6020000 {
 336                         compatible = "renesas,r8a774e1-wdt",
 337                                      "renesas,rcar-gen3-wdt";
 338                         reg = <0 0xe6020000 0 0x0c>;
 339                         interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
 340                         clocks = <&cpg CPG_MOD 402>;
 341                         power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
 342                         resets = <&cpg 402>;
 343                         status = "disabled";
 344                 };
 345
 346                 gpio0: gpio@e6050000 {
 347                         compatible = "renesas,gpio-r8a774e1",
 348                                      "renesas,rcar-gen3-gpio";
 349                         reg = <0 0xe6050000 0 0x50>;
 350                         interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
 351                         #gpio-cells = <2>;
 352                         gpio-controller;
 353                         gpio-ranges = <&pfc 0 0 16>;
 354                         #interrupt-cells = <2>;
 355                         interrupt-controller;
 356                         clocks = <&cpg CPG_MOD 912>;
 357                         power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
 358                         resets = <&cpg 912>;
 359                 };
 360
 361                 gpio1: gpio@e6051000 {
 362                         compatible = "renesas,gpio-r8a774e1",
 363                                      "renesas,rcar-gen3-gpio";
 364                         reg = <0 0xe6051000 0 0x50>;
 365                         interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
 366                         #gpio-cells = <2>;
 367                         gpio-controller;
 368                         gpio-ranges = <&pfc 0 32 29>;
 369                         #interrupt-cells = <2>;
 370                         interrupt-controller;
 371                         clocks = <&cpg CPG_MOD 911>;
 372                         power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
 373                         resets = <&cpg 911>;
 374                 };
 375
 376                 gpio2: gpio@e6052000 {
 377                         compatible = "renesas,gpio-r8a774e1",
 378                                      "renesas,rcar-gen3-gpio";
 379                         reg = <0 0xe6052000 0 0x50>;
 380                         interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
 381                         #gpio-cells = <2>;
 382                         gpio-controller;
 383                         gpio-ranges = <&pfc 0 64 15>;
 384                         #interrupt-cells = <2>;
 385                         interrupt-controller;
 386                         clocks = <&cpg CPG_MOD 910>;
 387                         power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
 388                         resets = <&cpg 910>;
 389                 };
 390
 391                 gpio3: gpio@e6053000 {
 392                         compatible = "renesas,gpio-r8a774e1",
 393                                      "renesas,rcar-gen3-gpio";
 394                         reg = <0 0xe6053000 0 0x50>;
 395                         interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
 396                         #gpio-cells = <2>;
 397                         gpio-controller;
 398                         gpio-ranges = <&pfc 0 96 16>;
 399                         #interrupt-cells = <2>;
 400                         interrupt-controller;
 401                         clocks = <&cpg CPG_MOD 909>;
 402                         power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
 403                         resets = <&cpg 909>;
 404                 };
 405
 406                 gpio4: gpio@e6054000 {
 407                         compatible = "renesas,gpio-r8a774e1",
 408                                      "renesas,rcar-gen3-gpio";
 409                         reg = <0 0xe6054000 0 0x50>;
 410                         interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
 411                         #gpio-cells = <2>;
 412                         gpio-controller;
 413                         gpio-ranges = <&pfc 0 128 18>;
 414                         #interrupt-cells = <2>;
 415                         interrupt-controller;
 416                         clocks = <&cpg CPG_MOD 908>;
 417                         power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
 418                         resets = <&cpg 908>;
 419                 };
 420
 421                 gpio5: gpio@e6055000 {
 422                         compatible = "renesas,gpio-r8a774e1",
 423                                      "renesas,rcar-gen3-gpio";
 424                         reg = <0 0xe6055000 0 0x50>;
 425                         interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
 426                         #gpio-cells = <2>;
 427                         gpio-controller;
 428                         gpio-ranges = <&pfc 0 160 26>;
 429                         #interrupt-cells = <2>;
 430                         interrupt-controller;
 431                         clocks = <&cpg CPG_MOD 907>;
 432                         power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
 433                         resets = <&cpg 907>;
 434                 };
 435
 436                 gpio6: gpio@e6055400 {
 437                         compatible = "renesas,gpio-r8a774e1",
 438                                      "renesas,rcar-gen3-gpio";
 439                         reg = <0 0xe6055400 0 0x50>;
 440                         interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
 441                         #gpio-cells = <2>;
 442                         gpio-controller;
 443                         gpio-ranges = <&pfc 0 192 32>;
 444                         #interrupt-cells = <2>;
 445                         interrupt-controller;
 446                         clocks = <&cpg CPG_MOD 906>;
 447                         power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
 448                         resets = <&cpg 906>;
 449                 };
 450
 451                 gpio7: gpio@e6055800 {
 452                         compatible = "renesas,gpio-r8a774e1",
 453                                      "renesas,rcar-gen3-gpio";
 454                         reg = <0 0xe6055800 0 0x50>;
 455                         interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
 456                         #gpio-cells = <2>;
 457                         gpio-controller;
 458                         gpio-ranges = <&pfc 0 224 4>;
 459                         #interrupt-cells = <2>;
 460                         interrupt-controller;
 461                         clocks = <&cpg CPG_MOD 905>;
 462                         power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
 463                         resets = <&cpg 905>;
 464                 };
 465
 466                 pfc: pinctrl@e6060000 {
 467                         compatible = "renesas,pfc-r8a774e1";
 468                         reg = <0 0xe6060000 0 0x50c>;
 469                 };
 470
 471                 cmt0: timer@e60f0000 {
 472                         compatible = "renesas,r8a774e1-cmt0",
 473                                      "renesas,rcar-gen3-cmt0";
 474                         reg = <0 0xe60f0000 0 0x1004>;
 475                         interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
 476                                      <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
 477                         clocks = <&cpg CPG_MOD 303>;
 478                         clock-names = "fck";
 479                         power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
 480                         resets = <&cpg 303>;
 481                         status = "disabled";
 482                 };
 483
 484                 cmt1: timer@e6130000 {
 485                         compatible = "renesas,r8a774e1-cmt1",
 486                                      "renesas,rcar-gen3-cmt1";
 487                         reg = <0 0xe6130000 0 0x1004>;
 488                         interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
 489                                      <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
 490                                      <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
 491                                      <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
 492                                      <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
 493                                      <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
 494                                      <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
 495                                      <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
 496                         clocks = <&cpg CPG_MOD 302>;
 497                         clock-names = "fck";
 498                         power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
 499                         resets = <&cpg 302>;
 500                         status = "disabled";
 501                 };
 502
 503                 cmt2: timer@e6140000 {
 504                         compatible = "renesas,r8a774e1-cmt1",
 505                                      "renesas,rcar-gen3-cmt1";
 506                         reg = <0 0xe6140000 0 0x1004>;
 507                         interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>,
 508                                      <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>,
 509                                      <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>,
 510                                      <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>,
 511                                      <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>,
 512                                      <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>,
 513                                      <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>,
 514                                      <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>;
 515                         clocks = <&cpg CPG_MOD 301>;
 516                         clock-names = "fck";
 517                         power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
 518                         resets = <&cpg 301>;
 519                         status = "disabled";
 520                 };
 521
 522                 cmt3: timer@e6148000 {
 523                         compatible = "renesas,r8a774e1-cmt1",
 524                                      "renesas,rcar-gen3-cmt1";
 525                         reg = <0 0xe6148000 0 0x1004>;
 526                         interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>,
 527                                      <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>,
 528                                      <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>,
 529                                      <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>,
 530                                      <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>,
 531                                      <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>,
 532                                      <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>,
 533                                      <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>;
 534                         clocks = <&cpg CPG_MOD 300>;
 535                         clock-names = "fck";
 536                         power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
 537                         resets = <&cpg 300>;
 538                         status = "disabled";
 539                 };
 540
 541                 cpg: clock-controller@e6150000 {
 542                         compatible = "renesas,r8a774e1-cpg-mssr";
 543                         reg = <0 0xe6150000 0 0x1000>;
 544                         clocks = <&extal_clk>, <&extalr_clk>;
 545                         clock-names = "extal", "extalr";
 546                         #clock-cells = <2>;
 547                         #power-domain-cells = <0>;
 548                         #reset-cells = <1>;
 549                 };
 550
 551                 rst: reset-controller@e6160000 {
 552                         compatible = "renesas,r8a774e1-rst";
 553                         reg = <0 0xe6160000 0 0x0200>;
 554                 };
 555
 556                 sysc: system-controller@e6180000 {
 557                         compatible = "renesas,r8a774e1-sysc";
 558                         reg = <0 0xe6180000 0 0x0400>;
 559                         #power-domain-cells = <1>;
 560                 };
 561
 562                 tsc: thermal@e6198000 {
 563                         compatible = "renesas,r8a774e1-thermal";
 564                         reg = <0 0xe6198000 0 0x100>,
 565                               <0 0xe61a0000 0 0x100>,
 566                               <0 0xe61a8000 0 0x100>;
 567                         interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
 568                                      <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
 569                                      <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
 570                         clocks = <&cpg CPG_MOD 522>;
 571                         power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
 572                         resets = <&cpg 522>;
 573                         #thermal-sensor-cells = <1>;
 574                 };
 575
 576                 intc_ex: interrupt-controller@e61c0000 {
 577                         compatible = "renesas,intc-ex-r8a774e1", "renesas,irqc";
 578                         #interrupt-cells = <2>;
 579                         interrupt-controller;
 580                         reg = <0 0xe61c0000 0 0x200>;
 581                         interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
 582                                      <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
 583                                      <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
 584                                      <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
 585                                      <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
 586                                      <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
 587                         clocks = <&cpg CPG_MOD 407>;
 588                         power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
 589                         resets = <&cpg 407>;
 590                 };
 591
 592                 tmu0: timer@e61e0000 {
 593                         compatible = "renesas,tmu-r8a774e1", "renesas,tmu";
 594                         reg = <0 0xe61e0000 0 0x30>;
 595                         interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
 596                                      <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
 597                                      <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
 598                         clocks = <&cpg CPG_MOD 125>;
 599                         clock-names = "fck";
 600                         power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
 601                         resets = <&cpg 125>;
 602                         status = "disabled";
 603                 };
 604
 605                 tmu1: timer@e6fc0000 {
 606                         compatible = "renesas,tmu-r8a774e1", "renesas,tmu";
 607                         reg = <0 0xe6fc0000 0 0x30>;
 608                         interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
 609                                      <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
 610                                      <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
 611                         clocks = <&cpg CPG_MOD 124>;
 612                         clock-names = "fck";
 613                         power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
 614                         resets = <&cpg 124>;
 615                         status = "disabled";
 616                 };
 617
 618                 tmu2: timer@e6fd0000 {
 619                         compatible = "renesas,tmu-r8a774e1", "renesas,tmu";
 620                         reg = <0 0xe6fd0000 0 0x30>;
 621                         interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,
 622                                      <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
 623                                      <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>;
 624                         clocks = <&cpg CPG_MOD 123>;
 625                         clock-names = "fck";
 626                         power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
 627                         resets = <&cpg 123>;
 628                         status = "disabled";
 629                 };
 630
 631                 tmu3: timer@e6fe0000 {
 632                         compatible = "renesas,tmu-r8a774e1", "renesas,tmu";
 633                         reg = <0 0xe6fe0000 0 0x30>;
 634                         interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
 635                                      <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
 636                                      <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
 637                         clocks = <&cpg CPG_MOD 122>;
 638                         clock-names = "fck";
 639                         power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
 640                         resets = <&cpg 122>;
 641                         status = "disabled";
 642                 };
 643
 644                 tmu4: timer@ffc00000 {
 645                         compatible = "renesas,tmu-r8a774e1", "renesas,tmu";
 646                         reg = <0 0xffc00000 0 0x30>;
 647                         interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>,
 648                                      <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>,
 649                                      <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>;
 650                         clocks = <&cpg CPG_MOD 121>;
 651                         clock-names = "fck";
 652                         power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
 653                         resets = <&cpg 121>;
 654                         status = "disabled";
 655                 };
 656
 657                 i2c0: i2c@e6500000 {
 658                         #address-cells = <1>;
 659                         #size-cells = <0>;
 660                         compatible = "renesas,i2c-r8a774e1",
 661                                      "renesas,rcar-gen3-i2c";
 662                         reg = <0 0xe6500000 0 0x40>;
 663                         interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
 664                         clocks = <&cpg CPG_MOD 931>;
 665                         power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
 666                         resets = <&cpg 931>;
 667                         dmas = <&dmac1 0x91>, <&dmac1 0x90>,
 668                                <&dmac2 0x91>, <&dmac2 0x90>;
 669                         dma-names = "tx", "rx", "tx", "rx";
 670                         i2c-scl-internal-delay-ns = <110>;
 671                         status = "disabled";
 672                 };
 673
 674                 i2c1: i2c@e6508000 {
 675                         #address-cells = <1>;
 676                         #size-cells = <0>;
 677                         compatible = "renesas,i2c-r8a774e1",
 678                                      "renesas,rcar-gen3-i2c";
 679                         reg = <0 0xe6508000 0 0x40>;
 680                         interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
 681                         clocks = <&cpg CPG_MOD 930>;
 682                         power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
 683                         resets = <&cpg 930>;
 684                         dmas = <&dmac1 0x93>, <&dmac1 0x92>,
 685                                <&dmac2 0x93>, <&dmac2 0x92>;
 686                         dma-names = "tx", "rx", "tx", "rx";
 687                         i2c-scl-internal-delay-ns = <6>;
 688                         status = "disabled";
 689                 };
 690
 691                 i2c2: i2c@e6510000 {
 692                         #address-cells = <1>;
 693                         #size-cells = <0>;
 694                         compatible = "renesas,i2c-r8a774e1",
 695                                      "renesas,rcar-gen3-i2c";
 696                         reg = <0 0xe6510000 0 0x40>;
 697                         interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
 698                         clocks = <&cpg CPG_MOD 929>;
 699                         power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
 700                         resets = <&cpg 929>;
 701                         dmas = <&dmac1 0x95>, <&dmac1 0x94>,
 702                                <&dmac2 0x95>, <&dmac2 0x94>;
 703                         dma-names = "tx", "rx", "tx", "rx";
 704                         i2c-scl-internal-delay-ns = <6>;
 705                         status = "disabled";
 706                 };
 707
 708                 i2c3: i2c@e66d0000 {
 709                         #address-cells = <1>;
 710                         #size-cells = <0>;
 711                         compatible = "renesas,i2c-r8a774e1",
 712                                      "renesas,rcar-gen3-i2c";
 713                         reg = <0 0xe66d0000 0 0x40>;
 714                         interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
 715                         clocks = <&cpg CPG_MOD 928>;
 716                         power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
 717                         resets = <&cpg 928>;
 718                         dmas = <&dmac0 0x97>, <&dmac0 0x96>;
 719                         dma-names = "tx", "rx";
 720                         i2c-scl-internal-delay-ns = <110>;
 721                         status = "disabled";
 722                 };
 723
 724                 i2c4: i2c@e66d8000 {
 725                         #address-cells = <1>;
 726                         #size-cells = <0>;
 727                         compatible = "renesas,i2c-r8a774e1",
 728                                      "renesas,rcar-gen3-i2c";
 729                         reg = <0 0xe66d8000 0 0x40>;
 730                         interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
 731                         clocks = <&cpg CPG_MOD 927>;
 732                         power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
 733                         resets = <&cpg 927>;
 734                         dmas = <&dmac0 0x99>, <&dmac0 0x98>;
 735                         dma-names = "tx", "rx";
 736                         i2c-scl-internal-delay-ns = <110>;
 737                         status = "disabled";
 738                 };
 739
 740                 i2c5: i2c@e66e0000 {
 741                         #address-cells = <1>;
 742                         #size-cells = <0>;
 743                         compatible = "renesas,i2c-r8a774e1",
 744                                      "renesas,rcar-gen3-i2c";
 745                         reg = <0 0xe66e0000 0 0x40>;
 746                         interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
 747                         clocks = <&cpg CPG_MOD 919>;
 748                         power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
 749                         resets = <&cpg 919>;
 750                         dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
 751                         dma-names = "tx", "rx";
 752                         i2c-scl-internal-delay-ns = <110>;
 753                         status = "disabled";
 754                 };
 755
 756                 i2c6: i2c@e66e8000 {
 757                         #address-cells = <1>;
 758                         #size-cells = <0>;
 759                         compatible = "renesas,i2c-r8a774e1",
 760                                      "renesas,rcar-gen3-i2c";
 761                         reg = <0 0xe66e8000 0 0x40>;
 762                         interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
 763                         clocks = <&cpg CPG_MOD 918>;
 764                         power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
 765                         resets = <&cpg 918>;
 766                         dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
 767                         dma-names = "tx", "rx";
 768                         i2c-scl-internal-delay-ns = <6>;
 769                         status = "disabled";
 770                 };
 771
 772                 i2c_dvfs: i2c@e60b0000 {
 773                         #address-cells = <1>;
 774                         #size-cells = <0>;
 775                         compatible = "renesas,iic-r8a774e1",
 776                                      "renesas,rcar-gen3-iic",
 777                                      "renesas,rmobile-iic";
 778                         reg = <0 0xe60b0000 0 0x425>;
 779                         interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
 780                         clocks = <&cpg CPG_MOD 926>;
 781                         power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
 782                         resets = <&cpg 926>;
 783                         dmas = <&dmac0 0x11>, <&dmac0 0x10>;
 784                         dma-names = "tx", "rx";
 785                         status = "disabled";
 786                 };
 787
 788                 hscif0: serial@e6540000 {
 789                         compatible = "renesas,hscif-r8a774e1",
 790                                      "renesas,rcar-gen3-hscif",
 791                                      "renesas,hscif";
 792                         reg = <0 0xe6540000 0 0x60>;
 793                         interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
 794                         clocks = <&cpg CPG_MOD 520>,
 795                                  <&cpg CPG_CORE R8A774E1_CLK_S3D1>,
 796                                  <&scif_clk>;
 797                         clock-names = "fck", "brg_int", "scif_clk";
 798                         dmas = <&dmac1 0x31>, <&dmac1 0x30>,
 799                                <&dmac2 0x31>, <&dmac2 0x30>;
 800                         dma-names = "tx", "rx", "tx", "rx";
 801                         power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
 802                         resets = <&cpg 520>;
 803                         status = "disabled";
 804                 };
 805
 806                 hscif1: serial@e6550000 {
 807                         compatible = "renesas,hscif-r8a774e1",
 808                                      "renesas,rcar-gen3-hscif",
 809                                      "renesas,hscif";
 810                         reg = <0 0xe6550000 0 0x60>;
 811                         interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
 812                         clocks = <&cpg CPG_MOD 519>,
 813                                  <&cpg CPG_CORE R8A774E1_CLK_S3D1>,
 814                                  <&scif_clk>;
 815                         clock-names = "fck", "brg_int", "scif_clk";
 816                         dmas = <&dmac1 0x33>, <&dmac1 0x32>,
 817                                <&dmac2 0x33>, <&dmac2 0x32>;
 818                         dma-names = "tx", "rx", "tx", "rx";
 819                         power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
 820                         resets = <&cpg 519>;
 821                         status = "disabled";
 822                 };
 823
 824                 hscif2: serial@e6560000 {
 825                         compatible = "renesas,hscif-r8a774e1",
 826                                      "renesas,rcar-gen3-hscif",
 827                                      "renesas,hscif";
 828                         reg = <0 0xe6560000 0 0x60>;
 829                         interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
 830                         clocks = <&cpg CPG_MOD 518>,
 831                                  <&cpg CPG_CORE R8A774E1_CLK_S3D1>,
 832                                  <&scif_clk>;
 833                         clock-names = "fck", "brg_int", "scif_clk";
 834                         dmas = <&dmac1 0x35>, <&dmac1 0x34>,
 835                                <&dmac2 0x35>, <&dmac2 0x34>;
 836                         dma-names = "tx", "rx", "tx", "rx";
 837                         power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
 838                         resets = <&cpg 518>;
 839                         status = "disabled";
 840                 };
 841
 842                 hscif3: serial@e66a0000 {
 843                         compatible = "renesas,hscif-r8a774e1",
 844                                      "renesas,rcar-gen3-hscif",
 845                                      "renesas,hscif";
 846                         reg = <0 0xe66a0000 0 0x60>;
 847                         interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
 848                         clocks = <&cpg CPG_MOD 517>,
 849                                  <&cpg CPG_CORE R8A774E1_CLK_S3D1>,
 850                                  <&scif_clk>;
 851                         clock-names = "fck", "brg_int", "scif_clk";
 852                         dmas = <&dmac0 0x37>, <&dmac0 0x36>;
 853                         dma-names = "tx", "rx";
 854                         power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
 855                         resets = <&cpg 517>;
 856                         status = "disabled";
 857                 };
 858
 859                 hscif4: serial@e66b0000 {
 860                         compatible = "renesas,hscif-r8a774e1",
 861                                      "renesas,rcar-gen3-hscif",
 862                                      "renesas,hscif";
 863                         reg = <0 0xe66b0000 0 0x60>;
 864                         interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
 865                         clocks = <&cpg CPG_MOD 516>,
 866                                  <&cpg CPG_CORE R8A774E1_CLK_S3D1>,
 867                                  <&scif_clk>;
 868                         clock-names = "fck", "brg_int", "scif_clk";
 869                         dmas = <&dmac0 0x39>, <&dmac0 0x38>;
 870                         dma-names = "tx", "rx";
 871                         power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
 872                         resets = <&cpg 516>;
 873                         status = "disabled";
 874                 };
 875
 876                 hsusb: usb@e6590000 {
 877                         compatible = "renesas,usbhs-r8a774e1",
 878                                      "renesas,rcar-gen3-usbhs";
 879                         reg = <0 0xe6590000 0 0x200>;
 880                         interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
 881                         clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>;
 882                         dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
 883                                <&usb_dmac1 0>, <&usb_dmac1 1>;
 884                         dma-names = "ch0", "ch1", "ch2", "ch3";
 885                         renesas,buswait = <11>;
 886                         phys = <&usb2_phy0 3>;
 887                         phy-names = "usb";
 888                         power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
 889                         resets = <&cpg 704>, <&cpg 703>;
 890                         status = "disabled";
 891                 };
 892
 893                 usb2_clksel: clock-controller@e6590630 {
 894                         compatible = "renesas,r8a774e1-rcar-usb2-clock-sel",
 895                                      "renesas,rcar-gen3-usb2-clock-sel";
 896                         reg = <0 0xe6590630 0 0x02>;
 897                         clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>,
 898                                  <&usb_extal_clk>, <&usb3s0_clk>;
 899                         clock-names = "ehci_ohci", "hs-usb-if",
 900                                       "usb_extal", "usb_xtal";
 901                         #clock-cells = <0>;
 902                         power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
 903                         resets = <&cpg 703>, <&cpg 704>;
 904                         reset-names = "ehci_ohci", "hs-usb-if";
 905                         status = "disabled";
 906                 };
 907
 908                 usb_dmac0: dma-controller@e65a0000 {
 909                         compatible = "renesas,r8a774e1-usb-dmac",
 910                                      "renesas,usb-dmac";
 911                         reg = <0 0xe65a0000 0 0x100>;
 912                         interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
 913                                      <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
 914                         interrupt-names = "ch0", "ch1";
 915                         clocks = <&cpg CPG_MOD 330>;
 916                         power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
 917                         resets = <&cpg 330>;
 918                         #dma-cells = <1>;
 919                         dma-channels = <2>;
 920                 };
 921
 922                 usb_dmac1: dma-controller@e65b0000 {
 923                         compatible = "renesas,r8a774e1-usb-dmac",
 924                                      "renesas,usb-dmac";
 925                         reg = <0 0xe65b0000 0 0x100>;
 926                         interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
 927                                      <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
 928                         interrupt-names = "ch0", "ch1";
 929                         clocks = <&cpg CPG_MOD 331>;
 930                         power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
 931                         resets = <&cpg 331>;
 932                         #dma-cells = <1>;
 933                         dma-channels = <2>;
 934                 };
 935
 936                 usb3_phy0: usb-phy@e65ee000 {
 937                         compatible = "renesas,r8a774e1-usb3-phy",
 938                                      "renesas,rcar-gen3-usb3-phy";
 939                         reg = <0 0xe65ee000 0 0x90>;
 940                         clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>,
 941                                  <&usb_extal_clk>;
 942                         clock-names = "usb3-if", "usb3s_clk", "usb_extal";
 943                         power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
 944                         resets = <&cpg 328>;
 945                         #phy-cells = <0>;
 946                         status = "disabled";
 947                 };
 948
 949                 dmac0: dma-controller@e6700000 {
 950                         compatible = "renesas,dmac-r8a774e1",
 951                                      "renesas,rcar-dmac";
 952                         reg = <0 0xe6700000 0 0x10000>;
 953                         interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>,
 954                                      <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
 955                                      <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>,
 956                                      <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>,
 957                                      <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>,
 958                                      <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
 959                                      <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>,
 960                                      <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>,
 961                                      <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
 962                                      <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
 963                                      <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>,
 964                                      <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
 965                                      <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
 966                                      <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>,
 967                                      <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
 968                                      <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>,
 969                                      <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
 970                         interrupt-names = "error",
 971                                           "ch0", "ch1", "ch2", "ch3",
 972                                           "ch4", "ch5", "ch6", "ch7",
 973                                           "ch8", "ch9", "ch10", "ch11",
 974                                           "ch12", "ch13", "ch14", "ch15";
 975                         clocks = <&cpg CPG_MOD 219>;
 976                         clock-names = "fck";
 977                         power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
 978                         resets = <&cpg 219>;
 979                         #dma-cells = <1>;
 980                         dma-channels = <16>;
 981                         iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>,
 982                                  <&ipmmu_ds0 2>, <&ipmmu_ds0 3>,
 983                                  <&ipmmu_ds0 4>, <&ipmmu_ds0 5>,
 984                                  <&ipmmu_ds0 6>, <&ipmmu_ds0 7>,
 985                                  <&ipmmu_ds0 8>, <&ipmmu_ds0 9>,
 986                                  <&ipmmu_ds0 10>, <&ipmmu_ds0 11>,
 987                                  <&ipmmu_ds0 12>, <&ipmmu_ds0 13>,
 988                                  <&ipmmu_ds0 14>, <&ipmmu_ds0 15>;
 989                 };
 990
 991                 dmac1: dma-controller@e7300000 {
 992                         compatible = "renesas,dmac-r8a774e1",
 993                                      "renesas,rcar-dmac";
 994                         reg = <0 0xe7300000 0 0x10000>;
 995                         interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
 996                                      <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
 997                                      <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
 998                                      <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
 999                                      <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
1000                                      <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
1001                                      <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
1002                                      <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
1003                                      <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
1004                                      <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
1005                                      <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
1006                                      <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
1007                                      <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
1008                                      <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
1009                                      <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
1010                                      <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>,
1011                                      <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
1012                         interrupt-names = "error",
1013                                           "ch0", "ch1", "ch2", "ch3",
1014                                           "ch4", "ch5", "ch6", "ch7",
1015                                           "ch8", "ch9", "ch10", "ch11",
1016                                           "ch12", "ch13", "ch14", "ch15";
1017                         clocks = <&cpg CPG_MOD 218>;
1018                         clock-names = "fck";
1019                         power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1020                         resets = <&cpg 218>;
1021                         #dma-cells = <1>;
1022                         dma-channels = <16>;
1023                         iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>,
1024                                  <&ipmmu_ds1 2>, <&ipmmu_ds1 3>,
1025                                  <&ipmmu_ds1 4>, <&ipmmu_ds1 5>,
1026                                  <&ipmmu_ds1 6>, <&ipmmu_ds1 7>,
1027                                  <&ipmmu_ds1 8>, <&ipmmu_ds1 9>,
1028                                  <&ipmmu_ds1 10>, <&ipmmu_ds1 11>,
1029                                  <&ipmmu_ds1 12>, <&ipmmu_ds1 13>,
1030                                  <&ipmmu_ds1 14>, <&ipmmu_ds1 15>;
1031                 };
1032
1033                 dmac2: dma-controller@e7310000 {
1034                         compatible = "renesas,dmac-r8a774e1",
1035                                      "renesas,rcar-dmac";
1036                         reg = <0 0xe7310000 0 0x10000>;
1037                         interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>,
1038                                      <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>,
1039                                      <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>,
1040                                      <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>,
1041                                      <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>,
1042                                      <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>,
1043                                      <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>,
1044                                      <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>,
1045                                      <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>,
1046                                      <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>,
1047                                      <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>,
1048                                      <GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>,
1049                                      <GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>,
1050                                      <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>,
1051                                      <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>,
1052                                      <GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>,
1053                                      <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
1054                         interrupt-names = "error",
1055                                           "ch0", "ch1", "ch2", "ch3",
1056                                           "ch4", "ch5", "ch6", "ch7",
1057                                           "ch8", "ch9", "ch10", "ch11",
1058                                           "ch12", "ch13", "ch14", "ch15";
1059                         clocks = <&cpg CPG_MOD 217>;
1060                         clock-names = "fck";
1061                         power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1062                         resets = <&cpg 217>;
1063                         #dma-cells = <1>;
1064                         dma-channels = <16>;
1065                         iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>,
1066                                  <&ipmmu_ds1 18>, <&ipmmu_ds1 19>,
1067                                  <&ipmmu_ds1 20>, <&ipmmu_ds1 21>,
1068                                  <&ipmmu_ds1 22>, <&ipmmu_ds1 23>,
1069                                  <&ipmmu_ds1 24>, <&ipmmu_ds1 25>,
1070                                  <&ipmmu_ds1 26>, <&ipmmu_ds1 27>,
1071                                  <&ipmmu_ds1 28>, <&ipmmu_ds1 29>,
1072                                  <&ipmmu_ds1 30>, <&ipmmu_ds1 31>;
1073                 };
1074
1075                 ipmmu_ds0: iommu@e6740000 {
1076                         compatible = "renesas,ipmmu-r8a774e1";
1077                         reg = <0 0xe6740000 0 0x1000>;
1078                         renesas,ipmmu-main = <&ipmmu_mm 0>;
1079                         power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1080                         #iommu-cells = <1>;
1081                 };
1082
1083                 ipmmu_ds1: iommu@e7740000 {
1084                         compatible = "renesas,ipmmu-r8a774e1";
1085                         reg = <0 0xe7740000 0 0x1000>;
1086                         renesas,ipmmu-main = <&ipmmu_mm 1>;
1087                         power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1088                         #iommu-cells = <1>;
1089                 };
1090
1091                 ipmmu_hc: iommu@e6570000 {
1092                         compatible = "renesas,ipmmu-r8a774e1";
1093                         reg = <0 0xe6570000 0 0x1000>;
1094                         renesas,ipmmu-main = <&ipmmu_mm 2>;
1095                         power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1096                         #iommu-cells = <1>;
1097                 };
1098
1099                 ipmmu_mm: iommu@e67b0000 {
1100                         compatible = "renesas,ipmmu-r8a774e1";
1101                         reg = <0 0xe67b0000 0 0x1000>;
1102                         interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
1103                                      <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
1104                         power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1105                         #iommu-cells = <1>;
1106                 };
1107
1108                 ipmmu_mp0: iommu@ec670000 {
1109                         compatible = "renesas,ipmmu-r8a774e1";
1110                         reg = <0 0xec670000 0 0x1000>;
1111                         renesas,ipmmu-main = <&ipmmu_mm 4>;
1112                         power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1113                         #iommu-cells = <1>;
1114                 };
1115
1116                 ipmmu_pv0: iommu@fd800000 {
1117                         compatible = "renesas,ipmmu-r8a774e1";
1118                         reg = <0 0xfd800000 0 0x1000>;
1119                         renesas,ipmmu-main = <&ipmmu_mm 6>;
1120                         power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1121                         #iommu-cells = <1>;
1122                 };
1123
1124                 ipmmu_pv1: iommu@fd950000 {
1125                         compatible = "renesas,ipmmu-r8a774e1";
1126                         reg = <0 0xfd950000 0 0x1000>;
1127                         renesas,ipmmu-main = <&ipmmu_mm 7>;
1128                         power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1129                         #iommu-cells = <1>;
1130                 };
1131
1132                 ipmmu_pv2: iommu@fd960000 {
1133                         compatible = "renesas,ipmmu-r8a774e1";
1134                         reg = <0 0xfd960000 0 0x1000>;
1135                         renesas,ipmmu-main = <&ipmmu_mm 8>;
1136                         power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1137                         #iommu-cells = <1>;
1138                 };
1139
1140                 ipmmu_pv3: iommu@fd970000 {
1141                         compatible = "renesas,ipmmu-r8a774e1";
1142                         reg = <0 0xfd970000 0 0x1000>;
1143                         renesas,ipmmu-main = <&ipmmu_mm 9>;
1144                         power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1145                         #iommu-cells = <1>;
1146                 };
1147
1148                 ipmmu_vc0: iommu@fe6b0000 {
1149                         compatible = "renesas,ipmmu-r8a774e1";
1150                         reg = <0 0xfe6b0000 0 0x1000>;
1151                         renesas,ipmmu-main = <&ipmmu_mm 12>;
1152                         power-domains = <&sysc R8A774E1_PD_A3VC>;
1153                         #iommu-cells = <1>;
1154                 };
1155
1156                 ipmmu_vc1: iommu@fe6f0000 {
1157                         compatible = "renesas,ipmmu-r8a774e1";
1158                         reg = <0 0xfe6f0000 0 0x1000>;
1159                         renesas,ipmmu-main = <&ipmmu_mm 13>;
1160                         power-domains = <&sysc R8A774E1_PD_A3VC>;
1161                         #iommu-cells = <1>;
1162                 };
1163
1164                 ipmmu_vi0: iommu@febd0000 {
1165                         compatible = "renesas,ipmmu-r8a774e1";
1166                         reg = <0 0xfebd0000 0 0x1000>;
1167                         renesas,ipmmu-main = <&ipmmu_mm 14>;
1168                         power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1169                         #iommu-cells = <1>;
1170                 };
1171
1172                 ipmmu_vi1: iommu@febe0000 {
1173                         compatible = "renesas,ipmmu-r8a774e1";
1174                         reg = <0 0xfebe0000 0 0x1000>;
1175                         renesas,ipmmu-main = <&ipmmu_mm 15>;
1176                         power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1177                         #iommu-cells = <1>;
1178                 };
1179
1180                 ipmmu_vp0: iommu@fe990000 {
1181                         compatible = "renesas,ipmmu-r8a774e1";
1182                         reg = <0 0xfe990000 0 0x1000>;
1183                         renesas,ipmmu-main = <&ipmmu_mm 16>;
1184                         power-domains = <&sysc R8A774E1_PD_A3VP>;
1185                         #iommu-cells = <1>;
1186                 };
1187
1188                 ipmmu_vp1: iommu@fe980000 {
1189                         compatible = "renesas,ipmmu-r8a774e1";
1190                         reg = <0 0xfe980000 0 0x1000>;
1191                         renesas,ipmmu-main = <&ipmmu_mm 17>;
1192                         power-domains = <&sysc R8A774E1_PD_A3VP>;
1193                         #iommu-cells = <1>;
1194                 };
1195
1196                 avb: ethernet@e6800000 {
1197                         compatible = "renesas,etheravb-r8a774e1",
1198                                      "renesas,etheravb-rcar-gen3";
1199                         reg = <0 0xe6800000 0 0x800>;
1200                         interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
1201                                      <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
1202                                      <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
1203                                      <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
1204                                      <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
1205                                      <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
1206                                      <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
1207                                      <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
1208                                      <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
1209                                      <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
1210                                      <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
1211                                      <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
1212                                      <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
1213                                      <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
1214                                      <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
1215                                      <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
1216                                      <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
1217                                      <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
1218                                      <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
1219                                      <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
1220                                      <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
1221                                      <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
1222                                      <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
1223                                      <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
1224                                      <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
1225                         interrupt-names = "ch0", "ch1", "ch2", "ch3",
1226                                           "ch4", "ch5", "ch6", "ch7",
1227                                           "ch8", "ch9", "ch10", "ch11",
1228                                           "ch12", "ch13", "ch14", "ch15",
1229                                           "ch16", "ch17", "ch18", "ch19",
1230                                           "ch20", "ch21", "ch22", "ch23",
1231                                           "ch24";
1232                         clocks = <&cpg CPG_MOD 812>;
1233                         power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1234                         resets = <&cpg 812>;
1235                         phy-mode = "rgmii";
1236                         rx-internal-delay-ps = <0>;
1237                         tx-internal-delay-ps = <0>;
1238                         iommus = <&ipmmu_ds0 16>;
1239                         #address-cells = <1>;
1240                         #size-cells = <0>;
1241                         status = "disabled";
1242                 };
1243
1244                 can0: can@e6c30000 {
1245                         compatible = "renesas,can-r8a774e1",
1246                                      "renesas,rcar-gen3-can";
1247                         reg = <0 0xe6c30000 0 0x1000>;
1248                         interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
1249                         clocks = <&cpg CPG_MOD 916>,
1250                                  <&cpg CPG_CORE R8A774E1_CLK_CANFD>,
1251                                  <&can_clk>;
1252                         clock-names = "clkp1", "clkp2", "can_clk";
1253                         assigned-clocks = <&cpg CPG_CORE R8A774E1_CLK_CANFD>;
1254                         assigned-clock-rates = <40000000>;
1255                         power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1256                         resets = <&cpg 916>;
1257                         status = "disabled";
1258                 };
1259
1260                 can1: can@e6c38000 {
1261                         compatible = "renesas,can-r8a774e1",
1262                                      "renesas,rcar-gen3-can";
1263                         reg = <0 0xe6c38000 0 0x1000>;
1264                         interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
1265                         clocks = <&cpg CPG_MOD 915>,
1266                                  <&cpg CPG_CORE R8A774E1_CLK_CANFD>,
1267                                  <&can_clk>;
1268                         clock-names = "clkp1", "clkp2", "can_clk";
1269                         assigned-clocks = <&cpg CPG_CORE R8A774E1_CLK_CANFD>;
1270                         assigned-clock-rates = <40000000>;
1271                         power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1272                         resets = <&cpg 915>;
1273                         status = "disabled";
1274                 };
1275
1276                 canfd: can@e66c0000 {
1277                         compatible = "renesas,r8a774e1-canfd",
1278                                      "renesas,rcar-gen3-canfd";
1279                         reg = <0 0xe66c0000 0 0x8000>;
1280                         interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
1281                                      <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
1282                         clocks = <&cpg CPG_MOD 914>,
1283                                  <&cpg CPG_CORE R8A774E1_CLK_CANFD>,
1284                                  <&can_clk>;
1285                         clock-names = "fck", "canfd", "can_clk";
1286                         assigned-clocks = <&cpg CPG_CORE R8A774E1_CLK_CANFD>;
1287                         assigned-clock-rates = <40000000>;
1288                         power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1289                         resets = <&cpg 914>;
1290                         status = "disabled";
1291
1292                         channel0 {
1293                                 status = "disabled";
1294                         };
1295
1296                         channel1 {
1297                                 status = "disabled";
1298                         };
1299                 };
1300
1301                 pwm0: pwm@e6e30000 {
1302                         compatible = "renesas,pwm-r8a774e1", "renesas,pwm-rcar";
1303                         reg = <0 0xe6e30000 0 0x8>;
1304                         clocks = <&cpg CPG_MOD 523>;
1305                         power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1306                         resets = <&cpg 523>;
1307                         #pwm-cells = <2>;
1308                         status = "disabled";
1309                 };
1310
1311                 pwm1: pwm@e6e31000 {
1312                         compatible = "renesas,pwm-r8a774e1", "renesas,pwm-rcar";
1313                         reg = <0 0xe6e31000 0 0x8>;
1314                         clocks = <&cpg CPG_MOD 523>;
1315                         power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1316                         resets = <&cpg 523>;
1317                         #pwm-cells = <2>;
1318                         status = "disabled";
1319                 };
1320
1321                 pwm2: pwm@e6e32000 {
1322                         compatible = "renesas,pwm-r8a774e1", "renesas,pwm-rcar";
1323                         reg = <0 0xe6e32000 0 0x8>;
1324                         clocks = <&cpg CPG_MOD 523>;
1325                         power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1326                         resets = <&cpg 523>;
1327                         #pwm-cells = <2>;
1328                         status = "disabled";
1329                 };
1330
1331                 pwm3: pwm@e6e33000 {
1332                         compatible = "renesas,pwm-r8a774e1", "renesas,pwm-rcar";
1333                         reg = <0 0xe6e33000 0 0x8>;
1334                         clocks = <&cpg CPG_MOD 523>;
1335                         power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1336                         resets = <&cpg 523>;
1337                         #pwm-cells = <2>;
1338                         status = "disabled";
1339                 };
1340
1341                 pwm4: pwm@e6e34000 {
1342                         compatible = "renesas,pwm-r8a774e1", "renesas,pwm-rcar";
1343                         reg = <0 0xe6e34000 0 0x8>;
1344                         clocks = <&cpg CPG_MOD 523>;
1345                         power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1346                         resets = <&cpg 523>;
1347                         #pwm-cells = <2>;
1348                         status = "disabled";
1349                 };
1350
1351                 pwm5: pwm@e6e35000 {
1352                         compatible = "renesas,pwm-r8a774e1", "renesas,pwm-rcar";
1353                         reg = <0 0xe6e35000 0 0x8>;
1354                         clocks = <&cpg CPG_MOD 523>;
1355                         power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1356                         resets = <&cpg 523>;
1357                         #pwm-cells = <2>;
1358                         status = "disabled";
1359                 };
1360
1361                 pwm6: pwm@e6e36000 {
1362                         compatible = "renesas,pwm-r8a774e1", "renesas,pwm-rcar";
1363                         reg = <0 0xe6e36000 0 0x8>;
1364                         clocks = <&cpg CPG_MOD 523>;
1365                         power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1366                         resets = <&cpg 523>;
1367                         #pwm-cells = <2>;
1368                         status = "disabled";
1369                 };
1370
1371                 scif0: serial@e6e60000 {
1372                         compatible = "renesas,scif-r8a774e1",
1373                                      "renesas,rcar-gen3-scif", "renesas,scif";
1374                         reg = <0 0xe6e60000 0 0x40>;
1375                         interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
1376                         clocks = <&cpg CPG_MOD 207>,
1377                                  <&cpg CPG_CORE R8A774E1_CLK_S3D1>,
1378                                  <&scif_clk>;
1379                         clock-names = "fck", "brg_int", "scif_clk";
1380                         dmas = <&dmac1 0x51>, <&dmac1 0x50>,
1381                                <&dmac2 0x51>, <&dmac2 0x50>;
1382                         dma-names = "tx", "rx", "tx", "rx";
1383                         power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1384                         resets = <&cpg 207>;
1385                         status = "disabled";
1386                 };
1387
1388                 scif1: serial@e6e68000 {
1389                         compatible = "renesas,scif-r8a774e1",
1390                                      "renesas,rcar-gen3-scif", "renesas,scif";
1391                         reg = <0 0xe6e68000 0 0x40>;
1392                         interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
1393                         clocks = <&cpg CPG_MOD 206>,
1394                                  <&cpg CPG_CORE R8A774E1_CLK_S3D1>,
1395                                  <&scif_clk>;
1396                         clock-names = "fck", "brg_int", "scif_clk";
1397                         dmas = <&dmac1 0x53>, <&dmac1 0x52>,
1398                                <&dmac2 0x53>, <&dmac2 0x52>;
1399                         dma-names = "tx", "rx", "tx", "rx";
1400                         power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1401                         resets = <&cpg 206>;
1402                         status = "disabled";
1403                 };
1404
1405                 scif2: serial@e6e88000 {
1406                         compatible = "renesas,scif-r8a774e1",
1407                                      "renesas,rcar-gen3-scif", "renesas,scif";
1408                         reg = <0 0xe6e88000 0 0x40>;
1409                         interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
1410                         clocks = <&cpg CPG_MOD 310>,
1411                                  <&cpg CPG_CORE R8A774E1_CLK_S3D1>,
1412                                  <&scif_clk>;
1413                         clock-names = "fck", "brg_int", "scif_clk";
1414                         dmas = <&dmac1 0x13>, <&dmac1 0x12>,
1415                                <&dmac2 0x13>, <&dmac2 0x12>;
1416                         dma-names = "tx", "rx", "tx", "rx";
1417                         power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1418                         resets = <&cpg 310>;
1419                         status = "disabled";
1420                 };
1421
1422                 scif3: serial@e6c50000 {
1423                         compatible = "renesas,scif-r8a774e1",
1424                                      "renesas,rcar-gen3-scif", "renesas,scif";
1425                         reg = <0 0xe6c50000 0 0x40>;
1426                         interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
1427                         clocks = <&cpg CPG_MOD 204>,
1428                                  <&cpg CPG_CORE R8A774E1_CLK_S3D1>,
1429                                  <&scif_clk>;
1430                         clock-names = "fck", "brg_int", "scif_clk";
1431                         dmas = <&dmac0 0x57>, <&dmac0 0x56>;
1432                         dma-names = "tx", "rx";
1433                         power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1434                         resets = <&cpg 204>;
1435                         status = "disabled";
1436                 };
1437
1438                 scif4: serial@e6c40000 {
1439                         compatible = "renesas,scif-r8a774e1",
1440                                      "renesas,rcar-gen3-scif", "renesas,scif";
1441                         reg = <0 0xe6c40000 0 0x40>;
1442                         interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
1443                         clocks = <&cpg CPG_MOD 203>,
1444                                  <&cpg CPG_CORE R8A774E1_CLK_S3D1>,
1445                                  <&scif_clk>;
1446                         clock-names = "fck", "brg_int", "scif_clk";
1447                         dmas = <&dmac0 0x59>, <&dmac0 0x58>;
1448                         dma-names = "tx", "rx";
1449                         power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1450                         resets = <&cpg 203>;
1451                         status = "disabled";
1452                 };
1453
1454                 scif5: serial@e6f30000 {
1455                         compatible = "renesas,scif-r8a774e1",
1456                                      "renesas,rcar-gen3-scif", "renesas,scif";
1457                         reg = <0 0xe6f30000 0 0x40>;
1458                         interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
1459                         clocks = <&cpg CPG_MOD 202>,
1460                                  <&cpg CPG_CORE R8A774E1_CLK_S3D1>,
1461                                  <&scif_clk>;
1462                         clock-names = "fck", "brg_int", "scif_clk";
1463                         dmas = <&dmac1 0x5b>, <&dmac1 0x5a>,
1464                                <&dmac2 0x5b>, <&dmac2 0x5a>;
1465                         dma-names = "tx", "rx", "tx", "rx";
1466                         power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1467                         resets = <&cpg 202>;
1468                         status = "disabled";
1469                 };
1470
1471                 msiof0: spi@e6e90000 {
1472                         compatible = "renesas,msiof-r8a774e1",
1473                                      "renesas,rcar-gen3-msiof";
1474                         reg = <0 0xe6e90000 0 0x0064>;
1475                         interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
1476                         clocks = <&cpg CPG_MOD 211>;
1477                         dmas = <&dmac1 0x41>, <&dmac1 0x40>,
1478                                <&dmac2 0x41>, <&dmac2 0x40>;
1479                         dma-names = "tx", "rx", "tx", "rx";
1480                         power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1481                         resets = <&cpg 211>;
1482                         #address-cells = <1>;
1483                         #size-cells = <0>;
1484                         status = "disabled";
1485                 };
1486
1487                 msiof1: spi@e6ea0000 {
1488                         compatible = "renesas,msiof-r8a774e1",
1489                                      "renesas,rcar-gen3-msiof";
1490                         reg = <0 0xe6ea0000 0 0x0064>;
1491                         interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
1492                         clocks = <&cpg CPG_MOD 210>;
1493                         dmas = <&dmac1 0x43>, <&dmac1 0x42>,
1494                                <&dmac2 0x43>, <&dmac2 0x42>;
1495                         dma-names = "tx", "rx", "tx", "rx";
1496                         power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1497                         resets = <&cpg 210>;
1498                         #address-cells = <1>;
1499                         #size-cells = <0>;
1500                         status = "disabled";
1501                 };
1502
1503                 msiof2: spi@e6c00000 {
1504                         compatible = "renesas,msiof-r8a774e1",
1505                                      "renesas,rcar-gen3-msiof";
1506                         reg = <0 0xe6c00000 0 0x0064>;
1507                         interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
1508                         clocks = <&cpg CPG_MOD 209>;
1509                         dmas = <&dmac0 0x45>, <&dmac0 0x44>;
1510                         dma-names = "tx", "rx";
1511                         power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1512                         resets = <&cpg 209>;
1513                         #address-cells = <1>;
1514                         #size-cells = <0>;
1515                         status = "disabled";
1516                 };
1517
1518                 msiof3: spi@e6c10000 {
1519                         compatible = "renesas,msiof-r8a774e1",
1520                                      "renesas,rcar-gen3-msiof";
1521                         reg = <0 0xe6c10000 0 0x0064>;
1522                         interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
1523                         clocks = <&cpg CPG_MOD 208>;
1524                         dmas = <&dmac0 0x47>, <&dmac0 0x46>;
1525                         dma-names = "tx", "rx";
1526                         power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1527                         resets = <&cpg 208>;
1528                         #address-cells = <1>;
1529                         #size-cells = <0>;
1530                         status = "disabled";
1531                 };
1532
1533                 vin0: video@e6ef0000 {
1534                         compatible = "renesas,vin-r8a774e1";
1535                         reg = <0 0xe6ef0000 0 0x1000>;
1536                         interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
1537                         clocks = <&cpg CPG_MOD 811>;
1538                         power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1539                         resets = <&cpg 811>;
1540                         renesas,id = <0>;
1541                         status = "disabled";
1542
1543                         ports {
1544                                 #address-cells = <1>;
1545                                 #size-cells = <0>;
1546
1547                                 port@1 {
1548                                         #address-cells = <1>;
1549                                         #size-cells = <0>;
1550
1551                                         reg = <1>;
1552
1553                                         vin0csi20: endpoint@0 {
1554                                                 reg = <0>;
1555                                                 remote-endpoint = <&csi20vin0>;
1556                                         };
1557                                         vin0csi40: endpoint@2 {
1558                                                 reg = <2>;
1559                                                 remote-endpoint = <&csi40vin0>;
1560                                         };
1561                                 };
1562                         };
1563                 };
1564
1565                 vin1: video@e6ef1000 {
1566                         compatible = "renesas,vin-r8a774e1";
1567                         reg = <0 0xe6ef1000 0 0x1000>;
1568                         interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
1569                         clocks = <&cpg CPG_MOD 810>;
1570                         power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1571                         resets = <&cpg 810>;
1572                         renesas,id = <1>;
1573                         status = "disabled";
1574
1575                         ports {
1576                                 #address-cells = <1>;
1577                                 #size-cells = <0>;
1578
1579                                 port@1 {
1580                                         #address-cells = <1>;
1581                                         #size-cells = <0>;
1582
1583                                         reg = <1>;
1584
1585                                         vin1csi20: endpoint@0 {
1586                                                 reg = <0>;
1587                                                 remote-endpoint = <&csi20vin1>;
1588                                         };
1589                                         vin1csi40: endpoint@2 {
1590                                                 reg = <2>;
1591                                                 remote-endpoint = <&csi40vin1>;
1592                                         };
1593                                 };
1594                         };
1595                 };
1596
1597                 vin2: video@e6ef2000 {
1598                         compatible = "renesas,vin-r8a774e1";
1599                         reg = <0 0xe6ef2000 0 0x1000>;
1600                         interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
1601                         clocks = <&cpg CPG_MOD 809>;
1602                         power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1603                         resets = <&cpg 809>;
1604                         renesas,id = <2>;
1605                         status = "disabled";
1606
1607                         ports {
1608                                 #address-cells = <1>;
1609                                 #size-cells = <0>;
1610
1611                                 port@1 {
1612                                         #address-cells = <1>;
1613                                         #size-cells = <0>;
1614
1615                                         reg = <1>;
1616
1617                                         vin2csi20: endpoint@0 {
1618                                                 reg = <0>;
1619                                                 remote-endpoint = <&csi20vin2>;
1620                                         };
1621                                         vin2csi40: endpoint@2 {
1622                                                 reg = <2>;
1623                                                 remote-endpoint = <&csi40vin2>;
1624                                         };
1625                                 };
1626                         };
1627                 };
1628
1629                 vin3: video@e6ef3000 {
1630                         compatible = "renesas,vin-r8a774e1";
1631                         reg = <0 0xe6ef3000 0 0x1000>;
1632                         interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
1633                         clocks = <&cpg CPG_MOD 808>;
1634                         power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1635                         resets = <&cpg 808>;
1636                         renesas,id = <3>;
1637                         status = "disabled";
1638
1639                         ports {
1640                                 #address-cells = <1>;
1641                                 #size-cells = <0>;
1642
1643                                 port@1 {
1644                                         #address-cells = <1>;
1645                                         #size-cells = <0>;
1646
1647                                         reg = <1>;
1648
1649                                         vin3csi20: endpoint@0 {
1650                                                 reg = <0>;
1651                                                 remote-endpoint = <&csi20vin3>;
1652                                         };
1653                                         vin3csi40: endpoint@2 {
1654                                                 reg = <2>;
1655                                                 remote-endpoint = <&csi40vin3>;
1656                                         };
1657                                 };
1658                         };
1659                 };
1660
1661                 vin4: video@e6ef4000 {
1662                         compatible = "renesas,vin-r8a774e1";
1663                         reg = <0 0xe6ef4000 0 0x1000>;
1664                         interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
1665                         clocks = <&cpg CPG_MOD 807>;
1666                         power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1667                         resets = <&cpg 807>;
1668                         renesas,id = <4>;
1669                         status = "disabled";
1670
1671                         ports {
1672                                 #address-cells = <1>;
1673                                 #size-cells = <0>;
1674
1675                                 port@1 {
1676                                         #address-cells = <1>;
1677                                         #size-cells = <0>;
1678
1679                                         reg = <1>;
1680
1681                                         vin4csi20: endpoint@0 {
1682                                                 reg = <0>;
1683                                                 remote-endpoint = <&csi20vin4>;
1684                                         };
1685                                 };
1686                         };
1687                 };
1688
1689                 vin5: video@e6ef5000 {
1690                         compatible = "renesas,vin-r8a774e1";
1691                         reg = <0 0xe6ef5000 0 0x1000>;
1692                         interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
1693                         clocks = <&cpg CPG_MOD 806>;
1694                         power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1695                         resets = <&cpg 806>;
1696                         renesas,id = <5>;
1697                         status = "disabled";
1698
1699                         ports {
1700                                 #address-cells = <1>;
1701                                 #size-cells = <0>;
1702
1703                                 port@1 {
1704                                         #address-cells = <1>;
1705                                         #size-cells = <0>;
1706
1707                                         reg = <1>;
1708
1709                                         vin5csi20: endpoint@0 {
1710                                                 reg = <0>;
1711                                                 remote-endpoint = <&csi20vin5>;
1712                                         };
1713                                 };
1714                         };
1715                 };
1716
1717                 vin6: video@e6ef6000 {
1718                         compatible = "renesas,vin-r8a774e1";
1719                         reg = <0 0xe6ef6000 0 0x1000>;
1720                         interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
1721                         clocks = <&cpg CPG_MOD 805>;
1722                         power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1723                         resets = <&cpg 805>;
1724                         renesas,id = <6>;
1725                         status = "disabled";
1726
1727                         ports {
1728                                 #address-cells = <1>;
1729                                 #size-cells = <0>;
1730
1731                                 port@1 {
1732                                         #address-cells = <1>;
1733                                         #size-cells = <0>;
1734
1735                                         reg = <1>;
1736
1737                                         vin6csi20: endpoint@0 {
1738                                                 reg = <0>;
1739                                                 remote-endpoint = <&csi20vin6>;
1740                                         };
1741                                 };
1742                         };
1743                 };
1744
1745                 vin7: video@e6ef7000 {
1746                         compatible = "renesas,vin-r8a774e1";
1747                         reg = <0 0xe6ef7000 0 0x1000>;
1748                         interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>;
1749                         clocks = <&cpg CPG_MOD 804>;
1750                         power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1751                         resets = <&cpg 804>;
1752                         renesas,id = <7>;
1753                         status = "disabled";
1754
1755                         ports {
1756                                 #address-cells = <1>;
1757                                 #size-cells = <0>;
1758
1759                                 port@1 {
1760                                         #address-cells = <1>;
1761                                         #size-cells = <0>;
1762
1763                                         reg = <1>;
1764
1765                                         vin7csi20: endpoint@0 {
1766                                                 reg = <0>;
1767                                                 remote-endpoint = <&csi20vin7>;
1768                                         };
1769                                 };
1770                         };
1771                 };
1772
1773                 rcar_sound: sound@ec500000 {
1774                         /*
1775                          * #sound-dai-cells is required
1776                          *
1777                          * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1778                          * Multi  DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
1779                          */
1780                         /*
1781                          * #clock-cells is required for audio_clkout0/1/2/3
1782                          *
1783                          * clkout       : #clock-cells = <0>;   <&rcar_sound>;
1784                          * clkout0/1/2/3: #clock-cells = <1>;   <&rcar_sound N>;
1785                          */
1786                         compatible =  "renesas,rcar_sound-r8a774e1", "renesas,rcar_sound-gen3";
1787                         reg = <0 0xec500000 0 0x1000>, /* SCU */
1788                               <0 0xec5a0000 0 0x100>,  /* ADG */
1789                               <0 0xec540000 0 0x1000>, /* SSIU */
1790                               <0 0xec541000 0 0x280>,  /* SSI */
1791                               <0 0xec760000 0 0x200>;  /* Audio DMAC peri peri*/
1792                         reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1793
1794                         clocks = <&cpg CPG_MOD 1005>,
1795                                  <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1796                                  <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1797                                  <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1798                                  <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1799                                  <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1800                                  <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1801                                  <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1802                                  <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1803                                  <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1804                                  <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1805                                  <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1806                                  <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1807                                  <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1808                                  <&audio_clk_a>, <&audio_clk_b>,
1809                                  <&audio_clk_c>,
1810                                  <&cpg CPG_CORE R8A774E1_CLK_S0D4>;
1811                         clock-names = "ssi-all",
1812                                       "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1813                                       "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1814                                       "ssi.1", "ssi.0",
1815                                       "src.9", "src.8", "src.7", "src.6",
1816                                       "src.5", "src.4", "src.3", "src.2",
1817                                       "src.1", "src.0",
1818                                       "mix.1", "mix.0",
1819                                       "ctu.1", "ctu.0",
1820                                       "dvc.0", "dvc.1",
1821                                       "clk_a", "clk_b", "clk_c", "clk_i";
1822                         power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1823                         resets = <&cpg 1005>,
1824                                  <&cpg 1006>, <&cpg 1007>,
1825                                  <&cpg 1008>, <&cpg 1009>,
1826                                  <&cpg 1010>, <&cpg 1011>,
1827                                  <&cpg 1012>, <&cpg 1013>,
1828                                  <&cpg 1014>, <&cpg 1015>;
1829                         reset-names = "ssi-all",
1830                                       "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1831                                       "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1832                                       "ssi.1", "ssi.0";
1833                         status = "disabled";
1834
1835                         rcar_sound,dvc {
1836                                 dvc0: dvc-0 {
1837                                         dmas = <&audma1 0xbc>;
1838                                         dma-names = "tx";
1839                                 };
1840                                 dvc1: dvc-1 {
1841                                         dmas = <&audma1 0xbe>;
1842                                         dma-names = "tx";
1843                                 };
1844                         };
1845
1846                         rcar_sound,mix {
1847                                 mix0: mix-0 { };
1848                                 mix1: mix-1 { };
1849                         };
1850
1851                         rcar_sound,ctu {
1852                                 ctu00: ctu-0 { };
1853                                 ctu01: ctu-1 { };
1854                                 ctu02: ctu-2 { };
1855                                 ctu03: ctu-3 { };
1856                                 ctu10: ctu-4 { };
1857                                 ctu11: ctu-5 { };
1858                                 ctu12: ctu-6 { };
1859                                 ctu13: ctu-7 { };
1860                         };
1861
1862                         rcar_sound,src {
1863                                 src0: src-0 {
1864                                         interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
1865                                         dmas = <&audma0 0x85>, <&audma1 0x9a>;
1866                                         dma-names = "rx", "tx";
1867                                 };
1868                                 src1: src-1 {
1869                                         interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1870                                         dmas = <&audma0 0x87>, <&audma1 0x9c>;
1871                                         dma-names = "rx", "tx";
1872                                 };
1873                                 src2: src-2 {
1874                                         interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1875                                         dmas = <&audma0 0x89>, <&audma1 0x9e>;
1876                                         dma-names = "rx", "tx";
1877                                 };
1878                                 src3: src-3 {
1879                                         interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1880                                         dmas = <&audma0 0x8b>, <&audma1 0xa0>;
1881                                         dma-names = "rx", "tx";
1882                                 };
1883                                 src4: src-4 {
1884                                         interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1885                                         dmas = <&audma0 0x8d>, <&audma1 0xb0>;
1886                                         dma-names = "rx", "tx";
1887                                 };
1888                                 src5: src-5 {
1889                                         interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1890                                         dmas = <&audma0 0x8f>, <&audma1 0xb2>;
1891                                         dma-names = "rx", "tx";
1892                                 };
1893                                 src6: src-6 {
1894                                         interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1895                                         dmas = <&audma0 0x91>, <&audma1 0xb4>;
1896                                         dma-names = "rx", "tx";
1897                                 };
1898                                 src7: src-7 {
1899                                         interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
1900                                         dmas = <&audma0 0x93>, <&audma1 0xb6>;
1901                                         dma-names = "rx", "tx";
1902                                 };
1903                                 src8: src-8 {
1904                                         interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1905                                         dmas = <&audma0 0x95>, <&audma1 0xb8>;
1906                                         dma-names = "rx", "tx";
1907                                 };
1908                                 src9: src-9 {
1909                                         interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
1910                                         dmas = <&audma0 0x97>, <&audma1 0xba>;
1911                                         dma-names = "rx", "tx";
1912                                 };
1913                         };
1914
1915                         rcar_sound,ssiu {
1916                                 ssiu00: ssiu-0 {
1917                                         dmas = <&audma0 0x15>, <&audma1 0x16>;
1918                                         dma-names = "rx", "tx";
1919                                 };
1920                                 ssiu01: ssiu-1 {
1921                                         dmas = <&audma0 0x35>, <&audma1 0x36>;
1922                                         dma-names = "rx", "tx";
1923                                 };
1924                                 ssiu02: ssiu-2 {
1925                                         dmas = <&audma0 0x37>, <&audma1 0x38>;
1926                                         dma-names = "rx", "tx";
1927                                 };
1928                                 ssiu03: ssiu-3 {
1929                                         dmas = <&audma0 0x47>, <&audma1 0x48>;
1930                                         dma-names = "rx", "tx";
1931                                 };
1932                                 ssiu04: ssiu-4 {
1933                                         dmas = <&audma0 0x3F>, <&audma1 0x40>;
1934                                         dma-names = "rx", "tx";
1935                                 };
1936                                 ssiu05: ssiu-5 {
1937                                         dmas = <&audma0 0x43>, <&audma1 0x44>;
1938                                         dma-names = "rx", "tx";
1939                                 };
1940                                 ssiu06: ssiu-6 {
1941                                         dmas = <&audma0 0x4F>, <&audma1 0x50>;
1942                                         dma-names = "rx", "tx";
1943                                 };
1944                                 ssiu07: ssiu-7 {
1945                                         dmas = <&audma0 0x53>, <&audma1 0x54>;
1946                                         dma-names = "rx", "tx";
1947                                 };
1948                                 ssiu10: ssiu-8 {
1949                                         dmas = <&audma0 0x49>, <&audma1 0x4a>;
1950                                         dma-names = "rx", "tx";
1951                                 };
1952                                 ssiu11: ssiu-9 {
1953                                         dmas = <&audma0 0x4B>, <&audma1 0x4C>;
1954                                         dma-names = "rx", "tx";
1955                                 };
1956                                 ssiu12: ssiu-10 {
1957                                         dmas = <&audma0 0x57>, <&audma1 0x58>;
1958                                         dma-names = "rx", "tx";
1959                                 };
1960                                 ssiu13: ssiu-11 {
1961                                         dmas = <&audma0 0x59>, <&audma1 0x5A>;
1962                                         dma-names = "rx", "tx";
1963                                 };
1964                                 ssiu14: ssiu-12 {
1965                                         dmas = <&audma0 0x5F>, <&audma1 0x60>;
1966                                         dma-names = "rx", "tx";
1967                                 };
1968                                 ssiu15: ssiu-13 {
1969                                         dmas = <&audma0 0xC3>, <&audma1 0xC4>;
1970                                         dma-names = "rx", "tx";
1971                                 };
1972                                 ssiu16: ssiu-14 {
1973                                         dmas = <&audma0 0xC7>, <&audma1 0xC8>;
1974                                         dma-names = "rx", "tx";
1975                                 };
1976                                 ssiu17: ssiu-15 {
1977                                         dmas = <&audma0 0xCB>, <&audma1 0xCC>;
1978                                         dma-names = "rx", "tx";
1979                                 };
1980                                 ssiu20: ssiu-16 {
1981                                         dmas = <&audma0 0x63>, <&audma1 0x64>;
1982                                         dma-names = "rx", "tx";
1983                                 };
1984                                 ssiu21: ssiu-17 {
1985                                         dmas = <&audma0 0x67>, <&audma1 0x68>;
1986                                         dma-names = "rx", "tx";
1987                                 };
1988                                 ssiu22: ssiu-18 {
1989                                         dmas = <&audma0 0x6B>, <&audma1 0x6C>;
1990                                         dma-names = "rx", "tx";
1991                                 };
1992                                 ssiu23: ssiu-19 {
1993                                         dmas = <&audma0 0x6D>, <&audma1 0x6E>;
1994                                         dma-names = "rx", "tx";
1995                                 };
1996                                 ssiu24: ssiu-20 {
1997                                         dmas = <&audma0 0xCF>, <&audma1 0xCE>;
1998                                         dma-names = "rx", "tx";
1999                                 };
2000                                 ssiu25: ssiu-21 {
2001                                         dmas = <&audma0 0xEB>, <&audma1 0xEC>;
2002                                         dma-names = "rx", "tx";
2003                                 };
2004                                 ssiu26: ssiu-22 {
2005                                         dmas = <&audma0 0xED>, <&audma1 0xEE>;
2006                                         dma-names = "rx", "tx";
2007                                 };
2008                                 ssiu27: ssiu-23 {
2009                                         dmas = <&audma0 0xEF>, <&audma1 0xF0>;
2010                                         dma-names = "rx", "tx";
2011                                 };
2012                                 ssiu30: ssiu-24 {
2013                                         dmas = <&audma0 0x6f>, <&audma1 0x70>;
2014                                         dma-names = "rx", "tx";
2015                                 };
2016                                 ssiu31: ssiu-25 {
2017                                         dmas = <&audma0 0x21>, <&audma1 0x22>;
2018                                         dma-names = "rx", "tx";
2019                                 };
2020                                 ssiu32: ssiu-26 {
2021                                         dmas = <&audma0 0x23>, <&audma1 0x24>;
2022                                         dma-names = "rx", "tx";
2023                                 };
2024                                 ssiu33: ssiu-27 {
2025                                         dmas = <&audma0 0x25>, <&audma1 0x26>;
2026                                         dma-names = "rx", "tx";
2027                                 };
2028                                 ssiu34: ssiu-28 {
2029                                         dmas = <&audma0 0x27>, <&audma1 0x28>;
2030                                         dma-names = "rx", "tx";
2031                                 };
2032                                 ssiu35: ssiu-29 {
2033                                         dmas = <&audma0 0x29>, <&audma1 0x2A>;
2034                                         dma-names = "rx", "tx";
2035                                 };
2036                                 ssiu36: ssiu-30 {
2037                                         dmas = <&audma0 0x2B>, <&audma1 0x2C>;
2038                                         dma-names = "rx", "tx";
2039                                 };
2040                                 ssiu37: ssiu-31 {
2041                                         dmas = <&audma0 0x2D>, <&audma1 0x2E>;
2042                                         dma-names = "rx", "tx";
2043                                 };
2044                                 ssiu40: ssiu-32 {
2045                                         dmas =  <&audma0 0x71>, <&audma1 0x72>;
2046                                         dma-names = "rx", "tx";
2047                                 };
2048                                 ssiu41: ssiu-33 {
2049                                         dmas = <&audma0 0x17>, <&audma1 0x18>;
2050                                         dma-names = "rx", "tx";
2051                                 };
2052                                 ssiu42: ssiu-34 {
2053                                         dmas = <&audma0 0x19>, <&audma1 0x1A>;
2054                                         dma-names = "rx", "tx";
2055                                 };
2056                                 ssiu43: ssiu-35 {
2057                                         dmas = <&audma0 0x1B>, <&audma1 0x1C>;
2058                                         dma-names = "rx", "tx";
2059                                 };
2060                                 ssiu44: ssiu-36 {
2061                                         dmas = <&audma0 0x1D>, <&audma1 0x1E>;
2062                                         dma-names = "rx", "tx";
2063                                 };
2064                                 ssiu45: ssiu-37 {
2065                                         dmas = <&audma0 0x1F>, <&audma1 0x20>;
2066                                         dma-names = "rx", "tx";
2067                                 };
2068                                 ssiu46: ssiu-38 {
2069                                         dmas = <&audma0 0x31>, <&audma1 0x32>;
2070                                         dma-names = "rx", "tx";
2071                                 };
2072                                 ssiu47: ssiu-39 {
2073                                         dmas = <&audma0 0x33>, <&audma1 0x34>;
2074                                         dma-names = "rx", "tx";
2075                                 };
2076                                 ssiu50: ssiu-40 {
2077                                         dmas = <&audma0 0x73>, <&audma1 0x74>;
2078                                         dma-names = "rx", "tx";
2079                                 };
2080                                 ssiu60: ssiu-41 {
2081                                         dmas = <&audma0 0x75>, <&audma1 0x76>;
2082                                         dma-names = "rx", "tx";
2083                                 };
2084                                 ssiu70: ssiu-42 {
2085                                         dmas = <&audma0 0x79>, <&audma1 0x7a>;
2086                                         dma-names = "rx", "tx";
2087                                 };
2088                                 ssiu80: ssiu-43 {
2089                                         dmas = <&audma0 0x7b>, <&audma1 0x7c>;
2090                                         dma-names = "rx", "tx";
2091                                 };
2092                                 ssiu90: ssiu-44 {
2093                                         dmas = <&audma0 0x7d>, <&audma1 0x7e>;
2094                                         dma-names = "rx", "tx";
2095                                 };
2096                                 ssiu91: ssiu-45 {
2097                                         dmas = <&audma0 0x7F>, <&audma1 0x80>;
2098                                         dma-names = "rx", "tx";
2099                                 };
2100                                 ssiu92: ssiu-46 {
2101                                         dmas = <&audma0 0x81>, <&audma1 0x82>;
2102                                         dma-names = "rx", "tx";
2103                                 };
2104                                 ssiu93: ssiu-47 {
2105                                         dmas = <&audma0 0x83>, <&audma1 0x84>;
2106                                         dma-names = "rx", "tx";
2107                                 };
2108                                 ssiu94: ssiu-48 {
2109                                         dmas = <&audma0 0xA3>, <&audma1 0xA4>;
2110                                         dma-names = "rx", "tx";
2111                                 };
2112                                 ssiu95: ssiu-49 {
2113                                         dmas = <&audma0 0xA5>, <&audma1 0xA6>;
2114                                         dma-names = "rx", "tx";
2115                                 };
2116                                 ssiu96: ssiu-50 {
2117                                         dmas = <&audma0 0xA7>, <&audma1 0xA8>;
2118                                         dma-names = "rx", "tx";
2119                                 };
2120                                 ssiu97: ssiu-51 {
2121                                         dmas = <&audma0 0xA9>, <&audma1 0xAA>;
2122                                         dma-names = "rx", "tx";
2123                                 };
2124                         };
2125
2126                         rcar_sound,ssi {
2127                                 ssi0: ssi-0 {
2128                                         interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
2129                                         dmas = <&audma0 0x01>, <&audma1 0x02>;
2130                                         dma-names = "rx", "tx";
2131                                 };
2132                                 ssi1: ssi-1 {
2133                                         interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
2134                                         dmas = <&audma0 0x03>, <&audma1 0x04>;
2135                                         dma-names = "rx", "tx";
2136                                 };
2137                                 ssi2: ssi-2 {
2138                                         interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
2139                                         dmas = <&audma0 0x05>, <&audma1 0x06>;
2140                                         dma-names = "rx", "tx";
2141                                 };
2142                                 ssi3: ssi-3 {
2143                                         interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
2144                                         dmas = <&audma0 0x07>, <&audma1 0x08>;
2145                                         dma-names = "rx", "tx";
2146                                 };
2147                                 ssi4: ssi-4 {
2148                                         interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
2149                                         dmas = <&audma0 0x09>, <&audma1 0x0a>;
2150                                         dma-names = "rx", "tx";
2151                                 };
2152                                 ssi5: ssi-5 {
2153                                         interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
2154                                         dmas = <&audma0 0x0b>, <&audma1 0x0c>;
2155                                         dma-names = "rx", "tx";
2156                                 };
2157                                 ssi6: ssi-6 {
2158                                         interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
2159                                         dmas = <&audma0 0x0d>, <&audma1 0x0e>;
2160                                         dma-names = "rx", "tx";
2161                                 };
2162                                 ssi7: ssi-7 {
2163                                         interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
2164                                         dmas = <&audma0 0x0f>, <&audma1 0x10>;
2165                                         dma-names = "rx", "tx";
2166                                 };
2167                                 ssi8: ssi-8 {
2168                                         interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
2169                                         dmas = <&audma0 0x11>, <&audma1 0x12>;
2170                                         dma-names = "rx", "tx";
2171                                 };
2172                                 ssi9: ssi-9 {
2173                                         interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
2174                                         dmas = <&audma0 0x13>, <&audma1 0x14>;
2175                                         dma-names = "rx", "tx";
2176                                 };
2177                         };
2178                 };
2179
2180                 audma0: dma-controller@ec700000 {
2181                         compatible = "renesas,dmac-r8a774e1",
2182                                      "renesas,rcar-dmac";
2183                         reg = <0 0xec700000 0 0x10000>;
2184                         interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>,
2185                                      <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
2186                                      <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>,
2187                                      <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,
2188                                      <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>,
2189                                      <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
2190                                      <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>,
2191                                      <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
2192                                      <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>,
2193                                      <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>,
2194                                      <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,
2195                                      <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
2196                                      <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>,
2197                                      <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>,
2198                                      <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>,
2199                                      <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
2200                                      <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
2201                         interrupt-names = "error",
2202                                           "ch0", "ch1", "ch2", "ch3",
2203                                           "ch4", "ch5", "ch6", "ch7",
2204                                           "ch8", "ch9", "ch10", "ch11",
2205                                           "ch12", "ch13", "ch14", "ch15";
2206                         clocks = <&cpg CPG_MOD 502>;
2207                         clock-names = "fck";
2208                         power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2209                         resets = <&cpg 502>;
2210                         #dma-cells = <1>;
2211                         dma-channels = <16>;
2212                         iommus = <&ipmmu_mp0 0>, <&ipmmu_mp0 1>,
2213                                  <&ipmmu_mp0 2>, <&ipmmu_mp0 3>,
2214                                  <&ipmmu_mp0 4>, <&ipmmu_mp0 5>,
2215                                  <&ipmmu_mp0 6>, <&ipmmu_mp0 7>,
2216                                  <&ipmmu_mp0 8>, <&ipmmu_mp0 9>,
2217                                  <&ipmmu_mp0 10>, <&ipmmu_mp0 11>,
2218                                  <&ipmmu_mp0 12>, <&ipmmu_mp0 13>,
2219                                  <&ipmmu_mp0 14>, <&ipmmu_mp0 15>;
2220                 };
2221
2222                 audma1: dma-controller@ec720000 {
2223                         compatible = "renesas,dmac-r8a774e1",
2224                                      "renesas,rcar-dmac";
2225                         reg = <0 0xec720000 0 0x10000>;
2226                         interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>,
2227                                      <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>,
2228                                      <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>,
2229                                      <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>,
2230                                      <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>,
2231                                      <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>,
2232                                      <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>,
2233                                      <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>,
2234                                      <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>,
2235                                      <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>,
2236                                      <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>,
2237                                      <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>,
2238                                      <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>,
2239                                      <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>,
2240                                      <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>,
2241                                      <GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>,
2242                                      <GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>;
2243                         interrupt-names = "error",
2244                                           "ch0", "ch1", "ch2", "ch3",
2245                                           "ch4", "ch5", "ch6", "ch7",
2246                                           "ch8", "ch9", "ch10", "ch11",
2247                                           "ch12", "ch13", "ch14", "ch15";
2248                         clocks = <&cpg CPG_MOD 501>;
2249                         clock-names = "fck";
2250                         power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2251                         resets = <&cpg 501>;
2252                         #dma-cells = <1>;
2253                         dma-channels = <16>;
2254                         iommus = <&ipmmu_mp0 16>, <&ipmmu_mp0 17>,
2255                                  <&ipmmu_mp0 18>, <&ipmmu_mp0 19>,
2256                                  <&ipmmu_mp0 20>, <&ipmmu_mp0 21>,
2257                                  <&ipmmu_mp0 22>, <&ipmmu_mp0 23>,
2258                                  <&ipmmu_mp0 24>, <&ipmmu_mp0 25>,
2259                                  <&ipmmu_mp0 26>, <&ipmmu_mp0 27>,
2260                                  <&ipmmu_mp0 28>, <&ipmmu_mp0 29>,
2261                                  <&ipmmu_mp0 30>, <&ipmmu_mp0 31>;
2262                 };
2263
2264                 xhci0: usb@ee000000 {
2265                         compatible = "renesas,xhci-r8a774e1",
2266                                      "renesas,rcar-gen3-xhci";
2267                         reg = <0 0xee000000 0 0xc00>;
2268                         interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
2269                         clocks = <&cpg CPG_MOD 328>;
2270                         power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2271                         resets = <&cpg 328>;
2272                         status = "disabled";
2273                 };
2274
2275                 usb3_peri0: usb@ee020000 {
2276                         compatible = "renesas,r8a774e1-usb3-peri",
2277                                      "renesas,rcar-gen3-usb3-peri";
2278                         reg = <0 0xee020000 0 0x400>;
2279                         interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
2280                         clocks = <&cpg CPG_MOD 328>;
2281                         power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2282                         resets = <&cpg 328>;
2283                         status = "disabled";
2284                 };
2285
2286                 ohci0: usb@ee080000 {
2287                         compatible = "generic-ohci";
2288                         reg = <0 0xee080000 0 0x100>;
2289                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
2290                         clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
2291                         phys = <&usb2_phy0 1>;
2292                         phy-names = "usb";
2293                         power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2294                         resets = <&cpg 703>, <&cpg 704>;
2295                         status = "disabled";
2296                 };
2297
2298                 ohci1: usb@ee0a0000 {
2299                         compatible = "generic-ohci";
2300                         reg = <0 0xee0a0000 0 0x100>;
2301                         interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
2302                         clocks = <&cpg CPG_MOD 702>;
2303                         phys = <&usb2_phy1 1>;
2304                         phy-names = "usb";
2305                         power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2306                         resets = <&cpg 702>;
2307                         status = "disabled";
2308                 };
2309
2310                 ehci0: usb@ee080100 {
2311                         compatible = "generic-ehci";
2312                         reg = <0 0xee080100 0 0x100>;
2313                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
2314                         clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
2315                         phys = <&usb2_phy0 2>;
2316                         phy-names = "usb";
2317                         companion = <&ohci0>;
2318                         power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2319                         resets = <&cpg 703>, <&cpg 704>;
2320                         status = "disabled";
2321                 };
2322
2323                 ehci1: usb@ee0a0100 {
2324                         compatible = "generic-ehci";
2325                         reg = <0 0xee0a0100 0 0x100>;
2326                         interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
2327                         clocks = <&cpg CPG_MOD 702>;
2328                         phys = <&usb2_phy1 2>;
2329                         phy-names = "usb";
2330                         companion = <&ohci1>;
2331                         power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2332                         resets = <&cpg 702>;
2333                         status = "disabled";
2334                 };
2335
2336                 usb2_phy0: usb-phy@ee080200 {
2337                         compatible = "renesas,usb2-phy-r8a774e1",
2338                                      "renesas,rcar-gen3-usb2-phy";
2339                         reg = <0 0xee080200 0 0x700>;
2340                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
2341                         clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
2342                         power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2343                         resets = <&cpg 703>, <&cpg 704>;
2344                         #phy-cells = <1>;
2345                         status = "disabled";
2346                 };
2347
2348                 usb2_phy1: usb-phy@ee0a0200 {
2349                         compatible = "renesas,usb2-phy-r8a774e1",
2350                                      "renesas,rcar-gen3-usb2-phy";
2351                         reg = <0 0xee0a0200 0 0x700>;
2352                         clocks = <&cpg CPG_MOD 702>;
2353                         power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2354                         resets = <&cpg 702>;
2355                         #phy-cells = <1>;
2356                         status = "disabled";
2357                 };
2358
2359                 sdhi0: mmc@ee100000 {
2360                         compatible = "renesas,sdhi-r8a774e1",
2361                                      "renesas,rcar-gen3-sdhi";
2362                         reg = <0 0xee100000 0 0x2000>;
2363                         interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
2364                         clocks = <&cpg CPG_MOD 314>;
2365                         max-frequency = <200000000>;
2366                         power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2367                         resets = <&cpg 314>;
2368                         iommus = <&ipmmu_ds1 32>;
2369                         status = "disabled";
2370                 };
2371
2372                 sdhi1: mmc@ee120000 {
2373                         compatible = "renesas,sdhi-r8a774e1",
2374                                      "renesas,rcar-gen3-sdhi";
2375                         reg = <0 0xee120000 0 0x2000>;
2376                         interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
2377                         clocks = <&cpg CPG_MOD 313>;
2378                         max-frequency = <200000000>;
2379                         power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2380                         resets = <&cpg 313>;
2381                         iommus = <&ipmmu_ds1 33>;
2382                         status = "disabled";
2383                 };
2384
2385                 sdhi2: mmc@ee140000 {
2386                         compatible = "renesas,sdhi-r8a774e1",
2387                                      "renesas,rcar-gen3-sdhi";
2388                         reg = <0 0xee140000 0 0x2000>;
2389                         interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
2390                         clocks = <&cpg CPG_MOD 312>;
2391                         max-frequency = <200000000>;
2392                         power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2393                         resets = <&cpg 312>;
2394                         iommus = <&ipmmu_ds1 34>;
2395                         status = "disabled";
2396                 };
2397
2398                 sdhi3: mmc@ee160000 {
2399                         compatible = "renesas,sdhi-r8a774e1",
2400                                      "renesas,rcar-gen3-sdhi";
2401                         reg = <0 0xee160000 0 0x2000>;
2402                         interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
2403                         clocks = <&cpg CPG_MOD 311>;
2404                         max-frequency = <200000000>;
2405                         power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2406                         resets = <&cpg 311>;
2407                         iommus = <&ipmmu_ds1 35>;
2408                         status = "disabled";
2409                 };
2410
2411                 rpc: spi@ee200000 {
2412                         compatible = "renesas,r8a774e1-rpc-if",
2413                                      "renesas,rcar-gen3-rpc-if";
2414                         reg = <0 0xee200000 0 0x200>,
2415                               <0 0x08000000 0 0x4000000>,
2416                               <0 0xee208000 0 0x100>;
2417                         reg-names = "regs", "dirmap", "wbuf";
2418                         interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
2419                         clocks = <&cpg CPG_MOD 917>;
2420                         clock-names = "rpc";
2421                         power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2422                         resets = <&cpg 917>;
2423                         #address-cells = <1>;
2424                         #size-cells = <0>;
2425                         status = "disabled";
2426                 };
2427
2428                 sata: sata@ee300000 {
2429                         compatible = "renesas,sata-r8a774e1",
2430                                      "renesas,rcar-gen3-sata";
2431                         reg = <0 0xee300000 0 0x200000>;
2432                         interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
2433                         clocks = <&cpg CPG_MOD 815>;
2434                         power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2435                         resets = <&cpg 815>;
2436                         iommus = <&ipmmu_hc 2>;
2437                         status = "disabled";
2438                 };
2439
2440                 gic: interrupt-controller@f1010000 {
2441                         compatible = "arm,gic-400";
2442                         #interrupt-cells = <3>;
2443                         #address-cells = <0>;
2444                         interrupt-controller;
2445                         reg = <0x0 0xf1010000 0 0x1000>,
2446                               <0x0 0xf1020000 0 0x20000>,
2447                               <0x0 0xf1040000 0 0x20000>,
2448                               <0x0 0xf1060000 0 0x20000>;
2449                         interrupts = <GIC_PPI 9
2450                                         (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;
2451                         clocks = <&cpg CPG_MOD 408>;
2452                         clock-names = "clk";
2453                         power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2454                         resets = <&cpg 408>;
2455                 };
2456
2457                 pciec0: pcie@fe000000 {
2458                         compatible = "renesas,pcie-r8a774e1",
2459                                      "renesas,pcie-rcar-gen3";
2460                         reg = <0 0xfe000000 0 0x80000>;
2461                         #address-cells = <3>;
2462                         #size-cells = <2>;
2463                         bus-range = <0x00 0xff>;
2464                         device_type = "pci";
2465                         ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>,
2466                                  <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>,
2467                                  <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>,
2468                                  <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
2469                         /* Map all possible DDR as inbound ranges */
2470                         dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
2471                         interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
2472                                      <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
2473                                      <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
2474                         #interrupt-cells = <1>;
2475                         interrupt-map-mask = <0 0 0 0>;
2476                         interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
2477                         clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
2478                         clock-names = "pcie", "pcie_bus";
2479                         power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2480                         resets = <&cpg 319>;
2481                         status = "disabled";
2482                 };
2483
2484                 pciec1: pcie@ee800000 {
2485                         compatible = "renesas,pcie-r8a774e1",
2486                                      "renesas,pcie-rcar-gen3";
2487                         reg = <0 0xee800000 0 0x80000>;
2488                         #address-cells = <3>;
2489                         #size-cells = <2>;
2490                         bus-range = <0x00 0xff>;
2491                         device_type = "pci";
2492                         ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000>,
2493                                  <0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000>,
2494                                  <0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000>,
2495                                  <0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
2496                         /* Map all possible DDR as inbound ranges */
2497                         dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
2498                         interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
2499                                      <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
2500                                      <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
2501                         #interrupt-cells = <1>;
2502                         interrupt-map-mask = <0 0 0 0>;
2503                         interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
2504                         clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>;
2505                         clock-names = "pcie", "pcie_bus";
2506                         power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2507                         resets = <&cpg 318>;
2508                         status = "disabled";
2509                 };
2510
2511                 pciec0_ep: pcie-ep@fe000000 {
2512                         compatible = "renesas,r8a774e1-pcie-ep",
2513                                      "renesas,rcar-gen3-pcie-ep";
2514                         reg = <0x0 0xfe000000 0 0x80000>,
2515                               <0x0 0xfe100000 0 0x100000>,
2516                               <0x0 0xfe200000 0 0x200000>,
2517                               <0x0 0x30000000 0 0x8000000>,
2518                               <0x0 0x38000000 0 0x8000000>;
2519                         reg-names = "apb-base", "memory0", "memory1", "memory2", "memory3";
2520                         interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
2521                                      <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
2522                                      <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
2523                         clocks = <&cpg CPG_MOD 319>;
2524                         clock-names = "pcie";
2525                         resets = <&cpg 319>;
2526                         power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2527                         status = "disabled";
2528                 };
2529
2530                 pciec1_ep: pcie-ep@ee800000 {
2531                         compatible = "renesas,r8a774e1-pcie-ep",
2532                                      "renesas,rcar-gen3-pcie-ep";
2533                         reg = <0x0 0xee800000 0 0x80000>,
2534                               <0x0 0xee900000 0 0x100000>,
2535                               <0x0 0xeea00000 0 0x200000>,
2536                               <0x0 0xc0000000 0 0x8000000>,
2537                               <0x0 0xc8000000 0 0x8000000>;
2538                         reg-names = "apb-base", "memory0", "memory1", "memory2", "memory3";
2539                         interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
2540                                      <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
2541                                      <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
2542                         clocks = <&cpg CPG_MOD 318>;
2543                         clock-names = "pcie";
2544                         resets = <&cpg 318>;
2545                         power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2546                         status = "disabled";
2547                 };
2548
2549                 vspbc: vsp@fe920000 {
2550                         compatible = "renesas,vsp2";
2551                         reg = <0 0xfe920000 0 0x8000>;
2552                         interrupts = <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>;
2553                         clocks = <&cpg CPG_MOD 624>;
2554                         power-domains = <&sysc R8A774E1_PD_A3VP>;
2555                         resets = <&cpg 624>;
2556
2557                         renesas,fcp = <&fcpvb1>;
2558                 };
2559
2560                 vspbd: vsp@fe960000 {
2561                         compatible = "renesas,vsp2";
2562                         reg = <0 0xfe960000 0 0x8000>;
2563                         interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
2564                         clocks = <&cpg CPG_MOD 626>;
2565                         power-domains = <&sysc R8A774E1_PD_A3VP>;
2566                         resets = <&cpg 626>;
2567
2568                         renesas,fcp = <&fcpvb0>;
2569                 };
2570
2571                 vspd0: vsp@fea20000 {
2572                         compatible = "renesas,vsp2";
2573                         reg = <0 0xfea20000 0 0x5000>;
2574                         interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>;
2575                         clocks = <&cpg CPG_MOD 623>;
2576                         power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2577                         resets = <&cpg 623>;
2578
2579                         renesas,fcp = <&fcpvd0>;
2580                 };
2581
2582                 vspd1: vsp@fea28000 {
2583                         compatible = "renesas,vsp2";
2584                         reg = <0 0xfea28000 0 0x5000>;
2585                         interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>;
2586                         clocks = <&cpg CPG_MOD 622>;
2587                         power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2588                         resets = <&cpg 622>;
2589
2590                         renesas,fcp = <&fcpvd1>;
2591                 };
2592
2593                 vspi0: vsp@fe9a0000 {
2594                         compatible = "renesas,vsp2";
2595                         reg = <0 0xfe9a0000 0 0x8000>;
2596                         interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
2597                         clocks = <&cpg CPG_MOD 631>;
2598                         power-domains = <&sysc R8A774E1_PD_A3VP>;
2599                         resets = <&cpg 631>;
2600
2601                         renesas,fcp = <&fcpvi0>;
2602                 };
2603
2604                 vspi1: vsp@fe9b0000 {
2605                         compatible = "renesas,vsp2";
2606                         reg = <0 0xfe9b0000 0 0x8000>;
2607                         interrupts = <GIC_SPI 445 IRQ_TYPE_LEVEL_HIGH>;
2608                         clocks = <&cpg CPG_MOD 630>;
2609                         power-domains = <&sysc R8A774E1_PD_A3VP>;
2610                         resets = <&cpg 630>;
2611
2612                         renesas,fcp = <&fcpvi1>;
2613                 };
2614
2615                 fdp1@fe940000 {
2616                         compatible = "renesas,fdp1";
2617                         reg = <0 0xfe940000 0 0x2400>;
2618                         interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
2619                         clocks = <&cpg CPG_MOD 119>;
2620                         power-domains = <&sysc R8A774E1_PD_A3VP>;
2621                         resets = <&cpg 119>;
2622                         renesas,fcp = <&fcpf0>;
2623                 };
2624
2625                 fdp1@fe944000 {
2626                         compatible = "renesas,fdp1";
2627                         reg = <0 0xfe944000 0 0x2400>;
2628                         interrupts = <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>;
2629                         clocks = <&cpg CPG_MOD 118>;
2630                         power-domains = <&sysc R8A774E1_PD_A3VP>;
2631                         resets = <&cpg 118>;
2632                         renesas,fcp = <&fcpf1>;
2633                 };
2634
2635                 fcpf0: fcp@fe950000 {
2636                         compatible = "renesas,fcpf";
2637                         reg = <0 0xfe950000 0 0x200>;
2638                         clocks = <&cpg CPG_MOD 615>;
2639                         power-domains = <&sysc R8A774E1_PD_A3VP>;
2640                         resets = <&cpg 615>;
2641                 };
2642
2643                 fcpf1: fcp@fe951000 {
2644                         compatible = "renesas,fcpf";
2645                         reg = <0 0xfe951000 0 0x200>;
2646                         clocks = <&cpg CPG_MOD 614>;
2647                         power-domains = <&sysc R8A774E1_PD_A3VP>;
2648                         resets = <&cpg 614>;
2649                 };
2650
2651                 fcpvb0: fcp@fe96f000 {
2652                         compatible = "renesas,fcpv";
2653                         reg = <0 0xfe96f000 0 0x200>;
2654                         clocks = <&cpg CPG_MOD 607>;
2655                         power-domains = <&sysc R8A774E1_PD_A3VP>;
2656                         resets = <&cpg 607>;
2657                 };
2658
2659                 fcpvb1: fcp@fe92f000 {
2660                         compatible = "renesas,fcpv";
2661                         reg = <0 0xfe92f000 0 0x200>;
2662                         clocks = <&cpg CPG_MOD 606>;
2663                         power-domains = <&sysc R8A774E1_PD_A3VP>;
2664                         resets = <&cpg 606>;
2665                 };
2666
2667                 fcpvi0: fcp@fe9af000 {
2668                         compatible = "renesas,fcpv";
2669                         reg = <0 0xfe9af000 0 0x200>;
2670                         clocks = <&cpg CPG_MOD 611>;
2671                         power-domains = <&sysc R8A774E1_PD_A3VP>;
2672                         resets = <&cpg 611>;
2673                 };
2674
2675                 fcpvi1: fcp@fe9bf000 {
2676                         compatible = "renesas,fcpv";
2677                         reg = <0 0xfe9bf000 0 0x200>;
2678                         clocks = <&cpg CPG_MOD 610>;
2679                         power-domains = <&sysc R8A774E1_PD_A3VP>;
2680                         resets = <&cpg 610>;
2681                 };
2682
2683                 fcpvd0: fcp@fea27000 {
2684                         compatible = "renesas,fcpv";
2685                         reg = <0 0xfea27000 0 0x200>;
2686                         clocks = <&cpg CPG_MOD 603>;
2687                         power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2688                         resets = <&cpg 603>;
2689                 };
2690
2691                 fcpvd1: fcp@fea2f000 {
2692                         compatible = "renesas,fcpv";
2693                         reg = <0 0xfea2f000 0 0x200>;
2694                         clocks = <&cpg CPG_MOD 602>;
2695                         power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2696                         resets = <&cpg 602>;
2697                 };
2698
2699                 csi20: csi2@fea80000 {
2700                         compatible = "renesas,r8a774e1-csi2";
2701                         reg = <0 0xfea80000 0 0x10000>;
2702                         interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
2703                         clocks = <&cpg CPG_MOD 714>;
2704                         power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2705                         resets = <&cpg 714>;
2706                         status = "disabled";
2707
2708                         ports {
2709                                 #address-cells = <1>;
2710                                 #size-cells = <0>;
2711
2712                                 port@0 {
2713                                         reg = <0>;
2714                                 };
2715
2716                                 port@1 {
2717                                         #address-cells = <1>;
2718                                         #size-cells = <0>;
2719
2720                                         reg = <1>;
2721
2722                                         csi20vin0: endpoint@0 {
2723                                                 reg = <0>;
2724                                                 remote-endpoint = <&vin0csi20>;
2725                                         };
2726                                         csi20vin1: endpoint@1 {
2727                                                 reg = <1>;
2728                                                 remote-endpoint = <&vin1csi20>;
2729                                         };
2730                                         csi20vin2: endpoint@2 {
2731                                                 reg = <2>;
2732                                                 remote-endpoint = <&vin2csi20>;
2733                                         };
2734                                         csi20vin3: endpoint@3 {
2735                                                 reg = <3>;
2736                                                 remote-endpoint = <&vin3csi20>;
2737                                         };
2738                                         csi20vin4: endpoint@4 {
2739                                                 reg = <4>;
2740                                                 remote-endpoint = <&vin4csi20>;
2741                                         };
2742                                         csi20vin5: endpoint@5 {
2743                                                 reg = <5>;
2744                                                 remote-endpoint = <&vin5csi20>;
2745                                         };
2746                                         csi20vin6: endpoint@6 {
2747                                                 reg = <6>;
2748                                                 remote-endpoint = <&vin6csi20>;
2749                                         };
2750                                         csi20vin7: endpoint@7 {
2751                                                 reg = <7>;
2752                                                 remote-endpoint = <&vin7csi20>;
2753                                         };
2754                                 };
2755                         };
2756                 };
2757
2758                 csi40: csi2@feaa0000 {
2759                         compatible = "renesas,r8a774e1-csi2";
2760                         reg = <0 0xfeaa0000 0 0x10000>;
2761                         interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
2762                         clocks = <&cpg CPG_MOD 716>;
2763                         power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2764                         resets = <&cpg 716>;
2765                         status = "disabled";
2766
2767                         ports {
2768                                 #address-cells = <1>;
2769                                 #size-cells = <0>;
2770
2771                                 port@0 {
2772                                         reg = <0>;
2773                                 };
2774
2775                                 port@1 {
2776                                         #address-cells = <1>;
2777                                         #size-cells = <0>;
2778
2779                                         reg = <1>;
2780
2781                                         csi40vin0: endpoint@0 {
2782                                                 reg = <0>;
2783                                                 remote-endpoint = <&vin0csi40>;
2784                                         };
2785                                         csi40vin1: endpoint@1 {
2786                                                 reg = <1>;
2787                                                 remote-endpoint = <&vin1csi40>;
2788                                         };
2789                                         csi40vin2: endpoint@2 {
2790                                                 reg = <2>;
2791                                                 remote-endpoint = <&vin2csi40>;
2792                                         };
2793                                         csi40vin3: endpoint@3 {
2794                                                 reg = <3>;
2795                                                 remote-endpoint = <&vin3csi40>;
2796                                         };
2797                                 };
2798                         };
2799                 };
2800
2801                 hdmi0: hdmi@fead0000 {
2802                         compatible = "renesas,r8a774e1-hdmi",
2803                                      "renesas,rcar-gen3-hdmi";
2804                         reg = <0 0xfead0000 0 0x10000>;
2805                         interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>;
2806                         clocks = <&cpg CPG_MOD 729>,
2807                                  <&cpg CPG_CORE R8A774E1_CLK_HDMI>;
2808                         clock-names = "iahb", "isfr";
2809                         power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2810                         resets = <&cpg 729>;
2811                         status = "disabled";
2812
2813                         ports {
2814                                 #address-cells = <1>;
2815                                 #size-cells = <0>;
2816
2817                                 port@0 {
2818                                         reg = <0>;
2819                                         dw_hdmi0_in: endpoint {
2820                                                 remote-endpoint = <&du_out_hdmi0>;
2821                                         };
2822                                 };
2823                                 port@1 {
2824                                         reg = <1>;
2825                                 };
2826                                 port@2 {
2827                                         /* HDMI sound */
2828                                         reg = <2>;
2829                                 };
2830                         };
2831                 };
2832
2833                 du: display@feb00000 {
2834                         compatible = "renesas,du-r8a774e1";
2835                         reg = <0 0xfeb00000 0 0x80000>;
2836                         interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
2837                                      <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
2838                                      <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>;
2839                         clocks = <&cpg CPG_MOD 724>,
2840                                  <&cpg CPG_MOD 723>,
2841                                  <&cpg CPG_MOD 721>;
2842                         clock-names = "du.0", "du.1", "du.3";
2843                         resets = <&cpg 724>, <&cpg 722>;
2844                         reset-names = "du.0", "du.3";
2845                         status = "disabled";
2846
2847                         renesas,vsps = <&vspd0 0>, <&vspd1 0>, <&vspd0 1>;
2848
2849                         ports {
2850                                 #address-cells = <1>;
2851                                 #size-cells = <0>;
2852
2853                                 port@0 {
2854                                         reg = <0>;
2855                                         du_out_rgb: endpoint {
2856                                         };
2857                                 };
2858                                 port@1 {
2859                                         reg = <1>;
2860                                         du_out_hdmi0: endpoint {
2861                                                 remote-endpoint = <&dw_hdmi0_in>;
2862                                         };
2863                                 };
2864                                 port@2 {
2865                                         reg = <2>;
2866                                         du_out_lvds0: endpoint {
2867                                                 remote-endpoint = <&lvds0_in>;
2868                                         };
2869                                 };
2870                         };
2871                 };
2872
2873                 lvds0: lvds@feb90000 {
2874                         compatible = "renesas,r8a774e1-lvds";
2875                         reg = <0 0xfeb90000 0 0x14>;
2876                         clocks = <&cpg CPG_MOD 727>;
2877                         power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2878                         resets = <&cpg 727>;
2879                         status = "disabled";
2880
2881                         ports {
2882                                 #address-cells = <1>;
2883                                 #size-cells = <0>;
2884
2885                                 port@0 {
2886                                         reg = <0>;
2887                                         lvds0_in: endpoint {
2888                                                 remote-endpoint = <&du_out_lvds0>;
2889                                         };
2890                                 };
2891                                 port@1 {
2892                                         reg = <1>;
2893                                         lvds0_out: endpoint {
2894                                         };
2895                                 };
2896                         };
2897                 };
2898
2899                 prr: chipid@fff00044 {
2900                         compatible = "renesas,prr";
2901                         reg = <0 0xfff00044 0 4>;
2902                 };
2903         };
2904
2905         thermal-zones {
2906                 sensor_thermal1: sensor-thermal1 {
2907                         polling-delay-passive = <250>;
2908                         polling-delay = <1000>;
2909                         thermal-sensors = <&tsc 0>;
2910                         sustainable-power = <6313>;
2911
2912                         trips {
2913                                 sensor1_crit: sensor1-crit {
2914                                         temperature = <120000>;
2915                                         hysteresis = <1000>;
2916                                         type = "critical";
2917                                 };
2918                         };
2919                 };
2920
2921                 sensor_thermal2: sensor-thermal2 {
2922                         polling-delay-passive = <250>;
2923                         polling-delay = <1000>;
2924                         thermal-sensors = <&tsc 1>;
2925                         sustainable-power = <6313>;
2926
2927                         trips {
2928                                 sensor2_crit: sensor2-crit {
2929                                         temperature = <120000>;
2930                                         hysteresis = <1000>;
2931                                         type = "critical";
2932                                 };
2933                         };
2934                 };
2935
2936                 sensor_thermal3: sensor-thermal3 {
2937                         polling-delay-passive = <250>;
2938                         polling-delay = <1000>;
2939                         thermal-sensors = <&tsc 2>;
2940                         sustainable-power = <6313>;
2941
2942                         trips {
2943                                 target: trip-point1 {
2944                                         temperature = <100000>;
2945                                         hysteresis = <1000>;
2946                                         type = "passive";
2947                                 };
2948
2949                                 sensor3_crit: sensor3-crit {
2950                                         temperature = <120000>;
2951                                         hysteresis = <1000>;
2952                                         type = "critical";
2953                                 };
2954                         };
2955
2956                         cooling-maps {
2957                                 map0 {
2958                                         trip = <&target>;
2959                                         cooling-device = <&a57_0 0 2>;
2960                                         contribution = <1024>;
2961                                 };
2962
2963                                 map1 {
2964                                         trip = <&target>;
2965                                         cooling-device = <&a53_0 0 2>;
2966                                         contribution = <1024>;
2967                                 };
2968                         };
2969                 };
2970         };
2971
2972         timer {
2973                 compatible = "arm,armv8-timer";
2974                 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
2975                                       <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
2976                                       <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
2977                                       <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
2978         };
2979
2980         /* External USB clocks - can be overridden by the board */
2981         usb3s0_clk: usb3s0 {
2982                 compatible = "fixed-clock";
2983                 #clock-cells = <0>;
2984                 clock-frequency = <0>;
2985         };
2986
2987         usb_extal_clk: usb_extal {
2988                 compatible = "fixed-clock";
2989                 #clock-cells = <0>;
2990                 clock-frequency = <0>;
2991         };
2992 };