arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Copyright 2020, Compass Electronics Group, LLC
   4  */
   5
   6 #include <dt-bindings/gpio/gpio.h>
   7 #include <dt-bindings/input/input.h>
   8 #include <dt-bindings/clock/versaclock.h>
   9
  10 / {
  11         backlight_lvds: backlight-lvds {
  12                 compatible = "pwm-backlight";
  13                 power-supply = <&reg_lcd>;
  14                 enable-gpios = <&gpio_exp1 3 GPIO_ACTIVE_HIGH>;
  15                 pwms = <&pwm2 0 25000>;
  16                 brightness-levels = <0 4 8 16 32 64 128 255>;
  17                 default-brightness-level = <6>;
  18         };
  19
  20         backlight_dpi: backlight-dpi {
  21                 compatible = "pwm-backlight";
  22                 power-supply = <&reg_lcd>;
  23                 enable-gpios = <&gpio_exp1 7 GPIO_ACTIVE_LOW>;
  24                 pwms = <&pwm0 0 25000>;
  25                 brightness-levels = <0 25 33 50 63 75 88 100>;
  26                 default-brightness-level = <6>;
  27         };
  28
  29         hdmi0-out {
  30                 compatible = "hdmi-connector";
  31                 type = "a";
  32
  33                 port {
  34                         hdmi0_con: endpoint {
  35                                 remote-endpoint = <&rcar_dw_hdmi0_out>;
  36                         };
  37                 };
  38         };
  39
  40         keys {
  41                 compatible = "gpio-keys";
  42
  43                 key-1 { /* S19 */
  44                         gpios = <&gpio4 6 GPIO_ACTIVE_LOW>;
  45                         linux,code = <KEY_UP>;
  46                         label = "Up";
  47                         wakeup-source;
  48                         debounce-interval = <20>;
  49                 };
  50                 key-2 { /*S20 */
  51                         gpios = <&gpio3 13 GPIO_ACTIVE_LOW>;
  52                         linux,code = <KEY_LEFT>;
  53                         label = "Left";
  54                         wakeup-source;
  55                         debounce-interval = <20>;
  56                 };
  57                 key-3 { /* S21 */
  58                         gpios = <&gpio5 17 GPIO_ACTIVE_LOW>;
  59                         linux,code = <KEY_DOWN>;
  60                         label = "Down";
  61                         wakeup-source;
  62                         debounce-interval = <20>;
  63                 };
  64                 key-4 { /* S22 */
  65                         gpios = <&gpio5 20 GPIO_ACTIVE_LOW>;
  66                         linux,code = <KEY_RIGHT>;
  67                         label = "Right";
  68                         wakeup-source;
  69                         debounce-interval = <20>;
  70                 };
  71                 key-5 { /* S23 */
  72                         gpios = <&gpio5 22 GPIO_ACTIVE_LOW>;
  73                         linux,code = <KEY_ENTER>;
  74                         label = "Center";
  75                         wakeup-source;
  76                         debounce-interval = <20>;
  77                 };
  78         };
  79
  80         leds {
  81                 compatible = "gpio-leds";
  82                 pinctrl-0 = <&led_pins>;
  83                 pinctrl-names = "default";
  84
  85                 led0 {
  86                         gpios = <&gpio0 4 GPIO_ACTIVE_HIGH>;
  87                         label = "LED0";
  88                         linux,default-trigger = "heartbeat";
  89                 };
  90                 led1 {
  91                         gpios = <&gpio7 0 GPIO_ACTIVE_HIGH>;
  92                         label = "LED1";
  93                 };
  94                 led2 {
  95                         gpios = <&gpio7 1 GPIO_ACTIVE_HIGH>;
  96                         label = "LED2";
  97                 };
  98                 led3 {
  99                         gpios = <&gpio7 3 GPIO_ACTIVE_HIGH>;
 100                         label = "LED3";
 101                 };
 102         };
 103
 104         lvds {
 105                 compatible = "panel-lvds";
 106                 power-supply = <&reg_lcd_reset>;
 107                 width-mm = <223>;
 108                 height-mm = <125>;
 109                 backlight = <&backlight_lvds>;
 110                 data-mapping = "vesa-24";
 111
 112                 panel-timing {
 113                         /* 800x480@60Hz */
 114                         clock-frequency = <30000000>;
 115                         hactive = <800>;
 116                         vactive = <480>;
 117                         hsync-len = <48>;
 118                         hfront-porch = <40>;
 119                         hback-porch = <40>;
 120                         vfront-porch = <13>;
 121                         vback-porch = <29>;
 122                         vsync-len = <1>;
 123                         hsync-active = <1>;
 124                         vsync-active = <3>;
 125                         de-active = <1>;
 126                         pixelclk-active = <0>;
 127                 };
 128
 129                 port {
 130                         panel_in: endpoint {
 131                                 remote-endpoint = <&lvds0_out>;
 132                         };
 133                 };
 134         };
 135
 136         rgb {
 137                 /* Different LCD with compatible timings */
 138                 compatible = "rocktech,rk070er9427";
 139                 backlight = <&backlight_dpi>;
 140                 enable-gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>;
 141                 power-supply = <&reg_lcd>;
 142                 port {
 143                         rgb_panel: endpoint {
 144                                 remote-endpoint = <&du_out_rgb>;
 145                         };
 146                 };
 147         };
 148
 149         reg_audio: regulator-audio {
 150                 compatible = "regulator-fixed";
 151                 regulator-name = "audio-1.8V";
 152                 regulator-min-microvolt = <1800000>;
 153                 regulator-max-microvolt = <1800000>;
 154                 gpio = <&gpio_exp4 1 GPIO_ACTIVE_HIGH>;
 155                 enable-active-high;
 156         };
 157
 158         reg_lcd: regulator-lcd {
 159                 compatible = "regulator-fixed";
 160                 regulator-name = "lcd_panel_pwr";
 161                 regulator-min-microvolt = <3300000>;
 162                 regulator-max-microvolt = <3300000>;
 163                 gpio = <&gpio_exp1 1 GPIO_ACTIVE_HIGH>;
 164                 enable-active-high;
 165         };
 166
 167         reg_lcd_reset: regulator-lcd-reset {
 168                 compatible = "regulator-fixed";
 169                 regulator-name = "nLCD_RESET";
 170                 regulator-min-microvolt = <3300000>;
 171                 regulator-max-microvolt = <3300000>;
 172                 gpio = <&gpio5 3 GPIO_ACTIVE_HIGH>;
 173                 enable-active-high;
 174                 vin-supply = <&reg_lcd>;
 175         };
 176
 177         reg_cam0: regulator-cam0 {
 178                 compatible = "regulator-fixed";
 179                 regulator-name = "reg_cam0";
 180                 regulator-min-microvolt = <1800000>;
 181                 regulator-max-microvolt = <1800000>;
 182                 gpio = <&gpio_exp2 2 GPIO_ACTIVE_HIGH>;
 183                 enable-active-high;
 184         };
 185
 186         reg_cam1: regulator-cam1 {
 187                 compatible = "regulator-fixed";
 188                 regulator-name = "reg_cam1";
 189                 regulator-min-microvolt = <1800000>;
 190                 regulator-max-microvolt = <1800000>;
 191                 gpio = <&gpio_exp2 5 GPIO_ACTIVE_HIGH>;
 192                 enable-active-high;
 193                 startup-delay-us = <100000>;
 194         };
 195
 196         sound_card {
 197                 compatible = "audio-graph-card";
 198                 label = "rcar-sound";
 199                 dais = <&rsnd_port0>, <&rsnd_port1>;
 200                 widgets = "Microphone", "Mic Jack",
 201                           "Line", "Line In Jack",
 202                           "Headphone", "Headphone Jack";
 203                 mic-det-gpio = <&gpio0 2 GPIO_ACTIVE_LOW>;
 204                 routing = "Headphone Jack", "HPOUTL",
 205                          "Headphone Jack", "HPOUTR",
 206                          "IN3R", "MICBIAS",
 207                          "Mic Jack", "IN3R";
 208         };
 209
 210         vccq_sdhi0: regulator-vccq-sdhi0 {
 211                 compatible = "regulator-gpio";
 212                 regulator-name = "SDHI0 VccQ";
 213                 regulator-min-microvolt = <1800000>;
 214                 regulator-max-microvolt = <3300000>;
 215                 gpios = <&gpio6 30 GPIO_ACTIVE_HIGH>;
 216                 gpios-states = <1>;
 217                 states = <3300000 1>, <1800000 0>;
 218         };
 219
 220         /* External DU dot clocks */
 221         x302_clk: x302-clock {
 222                 compatible = "fixed-clock";
 223                 #clock-cells = <0>;
 224                 clock-frequency = <33000000>;
 225         };
 226
 227         x304_clk: x304-clock {
 228                 compatible = "fixed-clock";
 229                 #clock-cells = <0>;
 230                 clock-frequency = <25000000>;
 231         };
 232
 233         connector {
 234                 compatible = "usb-c-connector";
 235                 label = "USB-C";
 236                 data-role = "dual";
 237
 238                 ports {
 239                         #address-cells = <1>;
 240                         #size-cells = <0>;
 241                         port@0 {
 242                                 reg = <0>;
 243                                 hs_ep: endpoint {
 244                                         remote-endpoint = <&usb3_hs_ep>;
 245                                 };
 246                         };
 247                         port@1 {
 248                                 reg = <1>;
 249                                 ss_ep: endpoint {
 250                                         remote-endpoint = <&hd3ss3220_in_ep>;
 251                                 };
 252                         };
 253                 };
 254         };
 255 };
 256
 257 &audio_clk_b {
 258         clock-frequency = <22579200>;
 259 };
 260
 261 &can0 {
 262         pinctrl-0 = <&can0_pins>;
 263         pinctrl-names = "default";
 264         renesas,can-clock-select = <0x0>;
 265         status = "okay";
 266 };
 267
 268 &can1 {
 269         pinctrl-0 = <&can1_pins>;
 270         pinctrl-names = "default";
 271         renesas,can-clock-select = <0x0>;
 272         status = "okay";
 273 };
 274
 275 &du {
 276         ports {
 277                 port@0 {
 278                         du_out_rgb: endpoint {
 279                                 remote-endpoint = <&rgb_panel>;
 280                         };
 281                 };
 282         };
 283 };
 284
 285 &ehci0 {
 286         dr_mode = "otg";
 287         status = "okay";
 288         clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>, <&usb2_clksel>, <&versaclock5 3>;
 289 };
 290
 291 &ehci1 {
 292         status = "okay";
 293         clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>, <&usb2_clksel>, <&versaclock5 3>;
 294 };
 295
 296 &hdmi0 {
 297         status = "okay";
 298         ports {
 299                 #address-cells = <1>;
 300                 #size-cells = <0>;
 301                 port@0 {
 302                         reg = <0>;
 303                         dw_hdmi0_in: endpoint {
 304                                 remote-endpoint = <&du_out_hdmi0>;
 305                         };
 306                 };
 307                 port@1 {
 308                         reg = <1>;
 309                         rcar_dw_hdmi0_out: endpoint {
 310                                 remote-endpoint = <&hdmi0_con>;
 311                         };
 312                 };
 313                 port@2 {
 314                         reg = <2>;
 315                         dw_hdmi0_snd_in: endpoint {
 316                                 remote-endpoint = <&rsnd_endpoint1>;
 317                         };
 318                 };
 319         };
 320 };
 321
 322 &hscif1 {
 323         pinctrl-0 = <&hscif1_pins>;
 324         pinctrl-names = "default";
 325         uart-has-rtscts;
 326         status = "okay";
 327 };
 328
 329 &hsusb {
 330         dr_mode = "otg";
 331         status = "okay";
 332 };
 333
 334 &i2c2 {
 335         status = "okay";
 336         clock-frequency = <400000>;
 337         pinctrl-0 = <&i2c2_pins>;
 338         pinctrl-names = "default";
 339
 340         gpio_exp2: gpio@21 {
 341                 compatible = "onnn,pca9654";
 342                 reg = <0x21>;
 343                 gpio-controller;
 344                 #gpio-cells = <2>;
 345         };
 346
 347         gpio_exp3: gpio@22 {
 348                 compatible = "onnn,pca9654";
 349                 reg = <0x22>;
 350                 gpio-controller;
 351                 #gpio-cells = <2>;
 352         };
 353
 354         gpio_exp4: gpio@23 {
 355                 compatible = "onnn,pca9654";
 356                 reg = <0x23>;
 357                 gpio-controller;
 358                 #gpio-cells = <2>;
 359         };
 360
 361         versaclock6_bb: clock-controller@6a {
 362                 compatible = "idt,5p49v6965";
 363                 reg = <0x6a>;
 364                 #clock-cells = <1>;
 365                 clocks = <&x304_clk>;
 366                 clock-names = "xin";
 367
 368                 assigned-clocks = <&versaclock6_bb 1>, <&versaclock6_bb 2>,
 369                                   <&versaclock6_bb 3>, <&versaclock6_bb 4>;
 370                 assigned-clock-rates = <24000000>, <24000000>, <24576000>,
 371                                        <24576000>;
 372
 373                 OUT1 {
 374                         idt,mode = <VC5_CMOS>;
 375                         idt,voltage-microvolt = <1800000>;
 376                         idt,slew-percent = <100>;
 377                 };
 378
 379                 OUT2 {
 380                         idt,mode = <VC5_CMOS>;
 381                         idt,voltage-microvolt = <1800000>;
 382                         idt,slew-percent = <100>;
 383                 };
 384
 385                 OUT3 {
 386                         idt,mode = <VC5_CMOS>;
 387                         idt,voltage-microvolt = <3300000>;
 388                         idt,slew-percent = <100>;
 389                 };
 390
 391                 OUT4 {
 392                         idt,mode = <VC5_CMOS>;
 393                         idt,voltage-microvolt = <3300000>;
 394                         idt,slew-percent = <100>;
 395                 };
 396         };
 397 };
 398
 399 &i2c0 {
 400         status = "okay";
 401         clock-frequency = <400000>;
 402
 403         pinctrl-0 = <&i2c0_pins>;
 404         pinctrl-names = "default";
 405 };
 406
 407 &i2c5 {
 408         status = "okay";
 409         clock-frequency = <400000>;
 410         pinctrl-0 = <&i2c5_pins>;
 411         pinctrl-names = "default";
 412
 413         codec: wm8962@1a {
 414                 compatible = "wlf,wm8962";
 415                 reg = <0x1a>;
 416                 clocks = <&versaclock6_bb 3>;
 417                 DCVDD-supply = <&reg_audio>;
 418                 DBVDD-supply = <&reg_audio>;
 419                 AVDD-supply = <&reg_audio>;
 420                 CPVDD-supply = <&reg_audio>;
 421                 MICVDD-supply = <&reg_audio>;
 422                 PLLVDD-supply = <&reg_audio>;
 423                 SPKVDD1-supply = <&reg_audio>;
 424                 SPKVDD2-supply = <&reg_audio>;
 425                 gpio-cfg = <
 426                         0x0000 /* 0:Default */
 427                         0x0000 /* 1:Default */
 428                         0x0000 /* 2:Default */
 429                         0x0000 /* 3:Default */
 430                         0x0000 /* 4:Default */
 431                         0x0000 /* 5:Default */
 432                 >;
 433                 port {
 434                         wm8962_endpoint: endpoint {
 435                                 remote-endpoint = <&rsnd_endpoint0>;
 436                         };
 437                 };
 438         };
 439
 440         touchscreen@26 {
 441                 compatible = "ilitek,ili2117";
 442                 reg = <0x26>;
 443                 interrupt-parent = <&gpio5>;
 444                 interrupts = <9 IRQ_TYPE_EDGE_RISING>;
 445                 wakeup-source;
 446         };
 447
 448         hd3ss3220@47 {
 449                 compatible = "ti,hd3ss3220";
 450                 reg = <0x47>;
 451                 interrupt-parent = <&gpio6>;
 452                 interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
 453
 454                 ports {
 455                         #address-cells = <1>;
 456                         #size-cells = <0>;
 457                         port@0 {
 458                                 reg = <0>;
 459                                 hd3ss3220_in_ep: endpoint {
 460                                         remote-endpoint = <&ss_ep>;
 461                                 };
 462                         };
 463                         port@1 {
 464                                 reg = <1>;
 465                                 hd3ss3220_out_ep: endpoint {
 466                                         remote-endpoint = <&usb3_role_switch>;
 467                                 };
 468                         };
 469                 };
 470         };
 471
 472         gpio_exp1: gpio@70 {
 473                 compatible = "nxp,pca9538";
 474                 reg = <0x70>;
 475                 gpio-controller;
 476                 #gpio-cells = <2>;
 477                 gpio-line-names = "lcd_reset", "lcd_pwr", "lcd_select",
 478                                   "backlight-enable", "Touch_shdwn",
 479                                   "LCD_H_pol", "lcd_V_pol";
 480         };
 481 };
 482
 483 &lvds0 {
 484         status = "okay";
 485
 486         ports {
 487                 port@1 {
 488                         lvds0_out: endpoint {
 489                                 remote-endpoint = <&panel_in>;
 490                         };
 491                 };
 492         };
 493 };
 494
 495 &msiof1 {
 496         pinctrl-0 = <&msiof1_pins>;
 497         pinctrl-names = "default";
 498         status = "okay";
 499         cs-gpios = <&gpio3 10 GPIO_ACTIVE_LOW>;
 500 };
 501
 502 &ohci0 {
 503         dr_mode = "otg";
 504         status = "okay";
 505 };
 506
 507 &ohci1 {
 508         status = "okay";
 509 };
 510
 511 &pciec0 {
 512         status = "okay";
 513 };
 514
 515 &pciec1 {
 516         status = "okay";
 517 };
 518
 519 &pcie_bus_clk {
 520         clock-frequency = <100000000>;
 521 };
 522
 523 &pfc {
 524         can0_pins: can0 {
 525                 groups = "can0_data_a";
 526                 function = "can0";
 527         };
 528
 529         can1_pins: can1 {
 530                 groups = "can1_data";
 531                 function = "can1";
 532         };
 533
 534         du_pins: du {
 535                 groups = "du_rgb888", "du_sync", "du_clk_out_1", "du_disp";
 536                 function = "du";
 537         };
 538
 539         i2c2_pins: i2c2 {
 540                 groups = "i2c2_a";
 541                 function = "i2c2";
 542         };
 543
 544         i2c5_pins: i2c5 {
 545                 groups = "i2c5";
 546                 function = "i2c5";
 547         };
 548
 549         led_pins: leds {
 550                 /* GP_0_4 , AVS1, AVS2, GP_7_3 */
 551                 pins = "GP_0_4", "GP_7_0", "GP_7_1", "GP_7_3";
 552                 bias-pull-down;
 553         };
 554
 555         msiof1_pins: msiof1 {
 556                 groups = "msiof1_clk_g", "msiof1_rxd_g", "msiof1_txd_g";
 557                 function = "msiof1";
 558         };
 559
 560         pwm0_pins: pwm0 {
 561                 groups = "pwm0";
 562                 function = "pwm0";
 563         };
 564
 565         pwm2_pins: pwm2 {
 566                 groups = "pwm2_a";
 567                 function = "pwm2";
 568         };
 569
 570         sdhi0_pins: sd0 {
 571                 groups = "sdhi0_data4", "sdhi0_ctrl";
 572                 function = "sdhi0";
 573                 power-source = <3300>;
 574         };
 575
 576         sdhi0_pins_uhs: sd0_uhs {
 577                 groups = "sdhi0_data4", "sdhi0_ctrl";
 578                 function = "sdhi0";
 579                 power-source = <1800>;
 580         };
 581
 582         sound_pins: sound {
 583                 groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data_a";
 584                 function = "ssi";
 585         };
 586
 587         sound_clk_pins: sound_clk {
 588                 groups = "audio_clk_a_a", "audio_clk_b_a";
 589                 function = "audio_clk";
 590         };
 591
 592         usb0_pins: usb0 {
 593                 mux {
 594                         groups = "usb0";
 595                         function = "usb0";
 596                 };
 597         };
 598
 599         usb1_pins: usb1 {
 600                 mux {
 601                         groups = "usb1";
 602                         function = "usb1";
 603                 };
 604         };
 605
 606         usb30_pins: usb30 {
 607                 mux {
 608                         groups = "usb30";
 609                         function = "usb30";
 610                 };
 611         };
 612 };
 613
 614 &pwm0 {
 615         pinctrl-0 = <&pwm0_pins>;
 616         pinctrl-names = "default";
 617         status = "okay";
 618 };
 619
 620 &pwm2 {
 621         pinctrl-0 = <&pwm2_pins>;
 622         pinctrl-names = "default";
 623         status = "okay";
 624 };
 625
 626 &rcar_sound {
 627         pinctrl-0 = <&sound_pins>, <&sound_clk_pins>;
 628         pinctrl-names = "default";
 629
 630         /* Single DAI */
 631         #sound-dai-cells = <0>;
 632
 633         /* audio_clkout0/1/2/3 */
 634         #clock-cells = <1>;
 635         clock-frequency = <11289600>;
 636
 637         /* Reference versaclock instead of audio_clk_a */
 638         clocks = <&cpg CPG_MOD 1005>,
 639                  <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
 640                  <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
 641                  <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
 642                  <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
 643                  <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
 644                  <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
 645                  <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
 646                  <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
 647                  <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
 648                  <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
 649                  <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
 650                  <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
 651                  <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
 652                  <&versaclock6_bb 4>, <&audio_clk_b>,
 653                  <&audio_clk_c>,
 654                  <&cpg CPG_MOD 922>;
 655
 656         status = "okay";
 657
 658         ports {
 659                 #address-cells = <1>;
 660                 #size-cells = <0>;
 661                 rsnd_port0: port@0 {
 662                         reg = <0>;
 663                         rsnd_endpoint0: endpoint {
 664                                 remote-endpoint = <&wm8962_endpoint>;
 665
 666                                 dai-format = "i2s";
 667                                 bitclock-master = <&rsnd_endpoint0>;
 668                                 frame-master = <&rsnd_endpoint0>;
 669
 670                                 playback = <&ssi1>, <&dvc1>, <&src1>;
 671                                 capture = <&ssi0>;
 672                         };
 673                 };
 674                 rsnd_port1: port@1 {
 675                     reg = <0x01>;
 676                         rsnd_endpoint1: endpoint {
 677                                 remote-endpoint = <&dw_hdmi0_snd_in>;
 678
 679                                 dai-format = "i2s";
 680                                 bitclock-master = <&rsnd_endpoint1>;
 681                                 frame-master = <&rsnd_endpoint1>;
 682
 683                                 playback = <&ssi2>;
 684                         };
 685                 };
 686         };
 687 };
 688
 689 &rwdt {
 690         status = "okay";
 691         timeout-sec = <60>;
 692 };
 693
 694 &scif0 {
 695         pinctrl-0 = <&scif0_pins>;
 696         pinctrl-names = "default";
 697         status = "okay";
 698 };
 699
 700 &scif5 {
 701         pinctrl-0 = <&scif5_pins>;
 702         pinctrl-names = "default";
 703         status = "okay";
 704 };
 705
 706 &scif_clk {
 707         clock-frequency = <14745600>;
 708 };
 709
 710 &sdhi0 {
 711         pinctrl-0 = <&sdhi0_pins>;
 712         pinctrl-1 = <&sdhi0_pins_uhs>;
 713         pinctrl-names = "default", "state_uhs";
 714         vmmc-supply = <&reg_3p3v>;
 715         vqmmc-supply = <&vccq_sdhi0>;
 716         cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
 717         bus-width = <4>;
 718         sd-uhs-sdr50;
 719         sd-uhs-sdr104;
 720         status = "okay";
 721 };
 722
 723 &ssi1 {
 724         shared-pin;
 725 };
 726
 727 &tmu0 {
 728         status = "okay";
 729 };
 730
 731 &tmu1 {
 732         status = "okay";
 733 };
 734
 735 &tmu2 {
 736         status = "okay";
 737 };
 738
 739 &tmu3 {
 740         status = "okay";
 741 };
 742
 743 &tmu4 {
 744         status = "okay";
 745 };
 746
 747 &usb2_phy0 {
 748         pinctrl-0 = <&usb0_pins>;
 749         pinctrl-names = "default";
 750         status = "okay";
 751 };
 752
 753 &usb2_phy1 {
 754         pinctrl-0 = <&usb1_pins>;
 755         pinctrl-names = "default";
 756         status = "okay";
 757 };
 758
 759 &usb3_peri0 {
 760         companion = <&xhci0>;
 761         status = "okay";
 762         usb-role-switch;
 763
 764         ports {
 765                 #address-cells = <1>;
 766                 #size-cells = <0>;
 767                 port@0 {
 768                         reg = <0>;
 769                         usb3_hs_ep: endpoint {
 770                                 remote-endpoint = <&hs_ep>;
 771                         };
 772                 };
 773                 port@1 {
 774                         reg = <1>;
 775                         usb3_role_switch: endpoint {
 776                                 remote-endpoint = <&hd3ss3220_out_ep>;
 777                         };
 778                 };
 779         };
 780 };
 781
 782 &usb3_phy0 {
 783         status = "okay";
 784 };
 785
 786 &vin0 {
 787         status = "okay";
 788 };
 789 &vin1 {
 790         status = "okay";
 791 };
 792 &vin2 {
 793         status = "okay";
 794 };
 795 &vin3 {
 796         status = "okay";
 797 };
 798 &vin4 {
 799         status = "okay";
 800 };
 801 &vin5 {
 802         status = "okay";
 803 };
 804 &vin6 {
 805         status = "okay";
 806 };
 807 &vin7 {
 808         status = "okay";
 809 };
 810
 811 &xhci0
 812 {
 813         pinctrl-0 = <&usb30_pins>;
 814         pinctrl-names = "default";
 815         status = "okay";
 816 };