arch/arm64/boot/dts/qcom/msm8994-msft-lumia-octagon.dtsi

   1 // SPDX-License-Identifier: BSD-3-Clause
   2 /*
   3  * Common Board Device Tree for
   4  * Microsoft Mobile MSM8994 Octagon Platforms
   5  *
   6  * Copyright (c) 2020, Konrad Dybcio
   7  * Copyright (c) 2020, Gustave Monce <gustave.monce@outlook.com>
   8  */
   9
  10 #include "pm8994.dtsi"
  11 #include "pmi8994.dtsi"
  12 #include <dt-bindings/gpio/gpio.h>
  13 #include <dt-bindings/input/gpio-keys.h>
  14 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
  15
  16 /*
  17  * Delete all generic (msm8994.dtsi) reserved
  18  * memory mappings which are different in this device.
  19  */
  20 /delete-node/ &adsp_mem;
  21 /delete-node/ &audio_mem;
  22 /delete-node/ &cont_splash_mem;
  23 /delete-node/ &mba_mem;
  24 /delete-node/ &mpss_mem;
  25 /delete-node/ &peripheral_region;
  26 /delete-node/ &rmtfs_mem;
  27 /delete-node/ &smem_mem;
  28
  29 / {
  30         /*
  31          * Most Lumia 950/XL users use GRUB to load their kernels,
  32          * hence there is no need for msm-id and friends.
  33          */
  34
  35         /*
  36          * This enables graphical output via bootloader-enabled display.
  37          * acpi=no is required due to WP platforms having ACPI support, but
  38          * only for Windows-based OSes.
  39          */
  40         chosen {
  41                 bootargs = "earlycon=efifb console=efifb acpi=no";
  42
  43                 #address-cells = <2>;
  44                 #size-cells = <2>;
  45                 ranges;
  46         };
  47
  48         clocks {
  49                 compatible = "simple-bus";
  50
  51                 divclk4: divclk4 {
  52                         compatible = "fixed-clock";
  53                         #clock-cells = <0>;
  54
  55                         clock-frequency = <32768>;
  56                         clock-output-names = "divclk4";
  57
  58                         pinctrl-names = "default";
  59                         pinctrl-0 = <&divclk4_pin_a>;
  60                 };
  61         };
  62
  63         gpio-keys {
  64                 compatible = "gpio-keys";
  65                 input-name = "gpio-keys";
  66                 autorepeat;
  67
  68                 volupkey {
  69                         label = "Volume Up";
  70                         gpios = <&pm8994_gpios 3 GPIO_ACTIVE_LOW>;
  71                         linux,input-type = <1>;
  72                         linux,code = <KEY_VOLUMEUP>;
  73                         wakeup-source;
  74                         debounce-interval = <15>;
  75                 };
  76
  77                 camsnapkey {
  78                         label = "Camera Snapshot";
  79                         gpios = <&pm8994_gpios 4 GPIO_ACTIVE_LOW>;
  80                         linux,input-type = <1>;
  81                         linux,code = <KEY_CAMERA>;
  82                         wakeup-source;
  83                         debounce-interval = <15>;
  84                 };
  85
  86                 camfocuskey {
  87                         label = "Camera Focus";
  88                         gpios = <&pm8994_gpios 5 GPIO_ACTIVE_LOW>;
  89                         linux,input-type = <1>;
  90                         linux,code = <KEY_VOLUMEUP>;
  91                         wakeup-source;
  92                         debounce-interval = <15>;
  93                 };
  94         };
  95
  96         gpio-hall-sensor {
  97                 compatible = "gpio-keys";
  98
  99                 pinctrl-names = "default";
 100                 pinctrl-0 = <&hall_front_default &hall_back_default>;
 101
 102                 label = "GPIO Hall Effect Sensor";
 103
 104                 hall-front-sensor {
 105                         label = "Hall Effect Front Sensor";
 106                         gpios = <&tlmm 42 GPIO_ACTIVE_HIGH>;
 107                         linux,input-type = <EV_SW>;
 108                         linux,code = <SW_LID>;
 109                         linux,can-disable;
 110                 };
 111
 112                 hall-back-sensor {
 113                         label = "Hall Effect Back Sensor";
 114                         gpios = <&tlmm 75 GPIO_ACTIVE_HIGH>;
 115                         linux,input-type = <EV_SW>;
 116                         linux,code = <SW_MACHINE_COVER>;
 117                         linux,can-disable;
 118                 };
 119         };
 120
 121         reserved-memory {
 122                 /*
 123                  * This device being a WP platform has a very different
 124                  * memory layout than other Android based devices.
 125                  * This memory layout is directly copied from the original
 126                  * device UEFI firmware, and adapted based on observations
 127                  * using JTAG for the Qualcomm Peripheral Image regions.
 128                  */
 129
 130                 uefi_mem: memory@200000 {
 131                         reg = <0 0x200000 0 0x100000>;
 132                         no-map;
 133                 };
 134
 135                 mppark_mem: memory@300000 {
 136                         reg = <0 0x300000 0 0x80000>;
 137                         no-map;
 138                 };
 139
 140                 fbpt_mem: memory@380000 {
 141                         reg = <0 0x380000 0 0x1000>;
 142                         no-map;
 143                 };
 144
 145                 dbg2_mem: memory@381000 {
 146                         reg = <0 0x381000 0 0x4000>;
 147                         no-map;
 148                 };
 149
 150                 capsule_mem: memory@385000 {
 151                         reg = <0 0x385000 0 0x1000>;
 152                         no-map;
 153                 };
 154
 155                 tpmctrl_mem: memory@386000 {
 156                         reg = <0 0x386000 0 0x3000>;
 157                         no-map;
 158                 };
 159
 160                 uefiinfo_mem: memory@389000 {
 161                         reg = <0 0x389000 0 0x1000>;
 162                         no-map;
 163                 };
 164
 165                 reset_mem: memory@389000 {
 166                         reg = <0 0x389000 0 0x1000>;
 167                         no-map;
 168                 };
 169
 170                 resuncached_mem: memory@38e000 {
 171                         reg = <0 0x38e000 0 0x72000>;
 172                         no-map;
 173                 };
 174
 175                 disp_mem: memory@400000 {
 176                         reg = <0 0x400000 0 0x800000>;
 177                         no-map;
 178                 };
 179
 180                 uefistack_mem: memory@c00000 {
 181                         reg = <0 0xc00000 0 0x40000>;
 182                         no-map;
 183                 };
 184
 185                 cpuvect_mem: memory@c40000 {
 186                         reg = <0 0xc40000 0 0x10000>;
 187                         no-map;
 188                 };
 189
 190                 rescached_mem: memory@400000 {
 191                         reg = <0 0xc50000 0 0xb0000>;
 192                         no-map;
 193                 };
 194
 195                 tzapps_mem: memory@6500000 {
 196                         reg = <0 0x6500000 0 0x500000>;
 197                         no-map;
 198                 };
 199
 200                 smem_mem: memory@6a00000 {
 201                         reg = <0 0x6a00000 0 0x200000>;
 202                         no-map;
 203                 };
 204
 205                 hyp_mem: memory@6c00000 {
 206                         reg = <0 0x6c00000 0 0x100000>;
 207                         no-map;
 208                 };
 209
 210                 tz_mem: memory@6d00000 {
 211                         reg = <0 0x6d00000 0 0x160000>;
 212                         no-map;
 213                 };
 214
 215                 rfsa_adsp_mem: memory@6e60000 {
 216                         reg = <0 0x6e60000 0 0x10000>;
 217                         no-map;
 218                 };
 219
 220                 rfsa_mpss_mem: memory@6e70000 {
 221                         compatible = "qcom,rmtfs-mem";
 222                         reg = <0 0x6e70000 0 0x10000>;
 223                         no-map;
 224
 225                         qcom,client-id = <1>;
 226                 };
 227
 228                 /*
 229                  * Value obtained from the device original ACPI DSDT table
 230                  * MPSS_EFS / SBL
 231                  */
 232                 mba_mem: memory@6e80000 {
 233                         reg = <0 0x6e80000 0 0x180000>;
 234                         no-map;
 235                 };
 236
 237                 /*
 238                  * Peripheral Image loader region begin!
 239                  * The region reserved for pil is 0x7000000-0xef00000
 240                  */
 241
 242                 mpss_mem: memory@7000000 {
 243                         reg = <0 0x7000000 0 0x5a00000>;
 244                         no-map;
 245                 };
 246
 247                 adsp_mem: memory@ca00000 {
 248                         reg = <0 0xca00000 0 0x1800000>;
 249                         no-map;
 250                 };
 251
 252                 venus_mem: memory@e200000 {
 253                         reg = <0 0xe200000 0 0x500000>;
 254                         no-map;
 255                 };
 256
 257                 pil_metadata_mem: memory@e700000 {
 258                         reg = <0 0xe700000 0 0x4000>;
 259                         no-map;
 260                 };
 261
 262                 memory@e704000 {
 263                         reg = <0 0xe704000 0 0x7fc000>;
 264                         no-map;
 265                 };
 266                 /* Peripheral Image loader region end */
 267
 268                 cnss_mem: memory@ef00000 {
 269                         reg = <0 0xef00000 0 0x300000>;
 270                         no-map;
 271                 };
 272         };
 273 };
 274
 275 &blsp1_i2c1 {
 276         status = "okay";
 277
 278         rmi4-i2c-dev@4b {
 279                 compatible = "syna,rmi4-i2c";
 280                 reg = <0x4b>;
 281                 #address-cells = <1>;
 282                 #size-cells = <0>;
 283
 284                 interrupt-parent = <&tlmm>;
 285                 interrupts = <77 IRQ_TYPE_EDGE_FALLING>;
 286
 287                 rmi4-f01@1 {
 288                         reg = <0x01>;
 289                         syna,nosleep-mode = <1>;
 290                 };
 291
 292                 rmi4-f12@12 {
 293                         reg = <0x12>;
 294                         syna,sensor-type = <1>;
 295                         syna,clip-x-low = <0>;
 296                         syna,clip-x-high = <1440>;
 297                         syna,clip-y-low = <0>;
 298                         syna,clip-y-high = <2560>;
 299                 };
 300         };
 301 };
 302
 303 &blsp1_i2c2 {
 304         status = "okay";
 305
 306         /*
 307          * This device uses the Texas Instruments TAS2553, however the TAS2552 driver
 308          * seems to work here. In the future a proper driver might need to
 309          * be written for this device.
 310          */
 311         tas2553: tas2553@40 {
 312                 compatible = "ti,tas2552";
 313                 reg = <0x40>;
 314
 315                 vbat-supply = <&vph_pwr>;
 316                 iovdd-supply = <&vreg_s4a_1p8>;
 317                 avdd-supply = <&vreg_s4a_1p8>;
 318
 319                 enable-gpio = <&pm8994_gpios 12 GPIO_ACTIVE_HIGH>;
 320         };
 321 };
 322
 323 &blsp1_i2c5 {
 324         status = "okay";
 325
 326         ak09912: magnetometer@c {
 327                 compatible = "asahi-kasei,ak09912";
 328                 reg = <0xc>;
 329
 330                 interrupt-parent = <&tlmm>;
 331                 interrupts = <26 IRQ_TYPE_EDGE_RISING>;
 332
 333                 vdd-supply = <&vreg_l18a_2p85>;
 334                 vid-supply = <&vreg_lvs2a_1p8>;
 335         };
 336
 337         zpa2326: barometer@5c {
 338                 compatible = "murata,zpa2326";
 339                 reg = <0x5c>;
 340
 341                 interrupt-parent = <&tlmm>;
 342                 interrupts = <74 IRQ_TYPE_EDGE_RISING>;
 343
 344                 vdd-supply = <&vreg_lvs2a_1p8>;
 345         };
 346
 347         mpu6050: accelerometer@68 {
 348                 compatible = "invensense,mpu6500";
 349                 reg = <0x68>;
 350
 351                 interrupt-parent = <&tlmm>;
 352                 interrupts = <64 IRQ_TYPE_EDGE_RISING>;
 353
 354                 vdd-supply = <&vreg_lvs2a_1p8>;
 355                 vddio-supply = <&vreg_lvs2a_1p8>;
 356         };
 357 };
 358
 359 &blsp1_i2c6 {
 360         status = "okay";
 361
 362         pn547: pn547@28 {
 363                 compatible = "nxp,pn544-i2c";
 364
 365                 reg = <0x28>;
 366
 367                 interrupt-parent = <&tlmm>;
 368                 interrupts = <29 IRQ_TYPE_EDGE_RISING>;
 369
 370                 enable-gpios = <&tlmm 30 GPIO_ACTIVE_HIGH>;
 371                 firmware-gpios = <&tlmm 94 GPIO_ACTIVE_HIGH>;
 372         };
 373 };
 374
 375 &blsp1_uart2 {
 376         status = "okay";
 377 };
 378
 379 &blsp2_i2c1 {
 380         status = "okay";
 381
 382         sideinteraction: ad7147_captouch@2c {
 383                 compatible = "ad,ad7147_captouch";
 384                 reg = <0x2c>;
 385
 386                 pinctrl-names = "default", "sleep";
 387                 pinctrl-0 = <&grip_default>;
 388                 pinctrl-1 = <&grip_sleep>;
 389
 390                 interrupts = <&tlmm 96 IRQ_TYPE_EDGE_FALLING>;
 391
 392                 button_num = <8>;
 393                 touchpad_num = <0>;
 394                 wheel_num = <0>;
 395                 slider_num = <0>;
 396
 397                 vcc-supply = <&vreg_l18a_2p85>;
 398         };
 399
 400         /*
 401          * The QPDS-T900/QPDS-T930 is a customized part built for Nokia
 402          * by Avago. It is very similar to the Avago APDS-9930 with some
 403          * minor differences. In the future a proper driver might need to
 404          * be written for this device. For now this works fine.
 405          */
 406         qpdst900: qpdst900@39 {
 407                 compatible = "avago,apds9930";
 408                 reg = <0x39>;
 409
 410                 interrupt-parent = <&tlmm>;
 411                 interrupts = <40 IRQ_TYPE_EDGE_FALLING>;
 412         };
 413 };
 414
 415 &blsp2_i2c5 {
 416         status = "okay";
 417
 418         fm_radio: si4705@11 {
 419                 compatible = "silabs,si470x";
 420                 reg = <0x11>;
 421
 422                 interrupt-parent = <&tlmm>;
 423                 interrupts = <9 IRQ_TYPE_EDGE_FALLING>;
 424                 reset-gpios = <&tlmm 93 GPIO_ACTIVE_HIGH>;
 425         };
 426
 427         vreg_lpddr_1p1: fan53526a@6c {
 428                 compatible = "fcs,fan53526";
 429                 reg = <0x6c>;
 430
 431                 regulator-min-microvolt = <1100000>;
 432                 regulator-max-microvolt = <1100000>;
 433                 vin-supply = <&vph_pwr>;
 434                 fcs,suspend-voltage-selector = <1>;
 435                 regulator-always-on; /* Turning off DDR power doesn't sound good. */
 436         };
 437
 438         /* ANX7816 HDMI bridge (needs MDSS HDMI) */
 439 };
 440
 441 &blsp2_spi4 {
 442         status = "okay";
 443
 444         /*
 445          * This device is a Lattice UC120 USB-C PD PHY.
 446          * It is actually a Lattice iCE40 FPGA pre-programmed by
 447          * the device firmware with a specific bitstream
 448          * enabling USB Type C PHY functionality.
 449          * Communication is done via a proprietary protocol over SPI.
 450          *
 451          * TODO: Once a proper driver is available, replace this.
 452          */
 453         uc120: ice5lp2k@0 {
 454                 compatible = "lattice,ice40-fpga-mgr";
 455                 reg = <0>;
 456                 spi-max-frequency = <5000000>;
 457                 cdone-gpios = <&tlmm 95 GPIO_ACTIVE_HIGH>;
 458                 reset-gpios = <&pmi8994_gpios 4 GPIO_ACTIVE_LOW>;
 459         };
 460 };
 461
 462 &blsp2_uart2 {
 463         status = "okay";
 464
 465         qca6174_bt: bluetooth {
 466                 compatible = "qcom,qca6174-bt";
 467
 468                 enable-gpios = <&pm8994_gpios 19 GPIO_ACTIVE_HIGH>;
 469                 clocks = <&divclk4>;
 470         };
 471 };
 472
 473 &pm8994_gpios {
 474         bt_en_gpios: bt_en_gpios {
 475                 pinconf {
 476                         pins = "gpio19";
 477                         function = PMIC_GPIO_FUNC_NORMAL;
 478                         output-low;
 479                         power-source = <PM8994_GPIO_S4>;
 480                         qcom,drive-strength = <PMIC_GPIO_STRENGTH_LOW>;
 481                         bias-pull-down;
 482                 };
 483         };
 484
 485         divclk4_pin_a: divclk4 {
 486                 pinconf {
 487                         pins = "gpio18";
 488                         function = PMIC_GPIO_FUNC_FUNC2;
 489                         power-source = <PM8994_GPIO_S4>;
 490                         bias-disable;
 491                 };
 492         };
 493 };
 494
 495 &pm8994_pon {
 496         pwrkey {
 497                 compatible = "qcom,pm8941-pwrkey";
 498                 interrupts = <0 8 0 IRQ_TYPE_EDGE_BOTH>;
 499                 debounce = <15625>;
 500                 linux,code = <KEY_POWER>;
 501         };
 502
 503         volwnkey {
 504                 compatible = "qcom,pm8941-resin";
 505                 interrupts = <0 8 1 IRQ_TYPE_EDGE_BOTH>;
 506                 debounce = <15625>;
 507                 linux,code = <KEY_VOLUMEDOWN>;
 508         };
 509 };
 510
 511 &pmi8994_gpios {
 512         pinctrl-0 = <&hd3ss460_pol &hd3ss460_amsel &hd3ss460_en>;
 513         pinctrl-names = "default";
 514
 515         /*
 516          * This device uses a TI HD3SS460 Type-C MUX
 517          * As this device has no driver currently,
 518          * the configuration for USB Face Up is set-up here.
 519          *
 520          * TODO: remove once a driver is available
 521          * TODO: add VBUS GPIO 5
 522          */
 523         hd3ss460_pol: pol_low {
 524                 pins = "gpio8";
 525                 drive-strength = <3>;
 526                 bias-pull-down;
 527         };
 528
 529         hd3ss460_amsel: amsel_high {
 530                 pins = "gpio9";
 531                 drive-strength = <1>;
 532                 bias-pull-up;
 533         };
 534
 535         hd3ss460_en: en_high {
 536                 pins = "gpio10";
 537                 drive-strength = <1>;
 538                 bias-pull-up;
 539         };
 540 };
 541
 542 &pmi8994_spmi_regulators {
 543         vdd_gfx: s2@1700 {
 544                 reg = <0x1700 0x100>;
 545                 regulator-min-microvolt = <980000>;
 546                 regulator-max-microvolt = <980000>;
 547         };
 548 };
 549
 550 &rpm_requests {
 551         /* These values were taken from the original firmware ACPI tables */
 552         pm8994_regulators: pm8994-regulators {
 553                 compatible = "qcom,rpm-pm8994-regulators";
 554
 555                 vdd_s1-supply = <&vph_pwr>;
 556                 vdd_s2-supply = <&vph_pwr>;
 557                 vdd_s3-supply = <&vph_pwr>;
 558                 vdd_s4-supply = <&vph_pwr>;
 559                 vdd_s5-supply = <&vph_pwr>;
 560                 vdd_s6-supply = <&vph_pwr>;
 561                 vdd_s7-supply = <&vph_pwr>;
 562                 vdd_s8-supply = <&vph_pwr>;
 563                 vdd_s9-supply = <&vph_pwr>;
 564                 vdd_s10-supply = <&vph_pwr>;
 565                 vdd_s11-supply = <&vph_pwr>;
 566                 vdd_s12-supply = <&vph_pwr>;
 567                 vdd_l1-supply = <&vreg_s1b_1p0>;
 568                 vdd_l2_l26_l28-supply = <&vreg_s3a_1p3>;
 569                 vdd_l3_l11-supply = <&vreg_s3a_1p3>;
 570                 vdd_l4_l27_l31-supply = <&vreg_s3a_1p3>;
 571                 vdd_l5_l7-supply = <&vreg_s5a_2p15>;
 572                 vdd_l6_l12_l32-supply = <&vreg_s5a_2p15>;
 573                 vdd_l8_l16_l30-supply = <&vph_pwr>;
 574                 vdd_l9_l10_l18_l22-supply = <&vph_pwr_bbyp>;
 575                 vdd_l13_l19_l23_l24-supply = <&vph_pwr_bbyp>;
 576                 vdd_l14_l15-supply = <&vreg_s5a_2p15>;
 577                 vdd_l17_l29-supply = <&vph_pwr_bbyp>;
 578                 vdd_l20_l21-supply = <&vph_pwr_bbyp>;
 579                 vdd_l25-supply = <&vreg_s5a_2p15>;
 580                 vdd_lvs1_2-supply = <&vreg_s4a_1p8>;
 581
 582                 /* S1, S2, S6 and S12 are managed by RPMPD */
 583
 584                 vreg_s3a_1p3: s3 {
 585                         regulator-min-microvolt = <1300000>;
 586                         regulator-max-microvolt = <1300000>;
 587                         regulator-allow-set-load;
 588                         regulator-system-load = <300000>;
 589                 };
 590
 591                 vreg_s4a_1p8: s4 {
 592                         regulator-min-microvolt = <1800000>;
 593                         regulator-max-microvolt = <1800000>;
 594                         regulator-allow-set-load;
 595                         regulator-always-on;
 596                         regulator-system-load = <325000>;
 597                 };
 598
 599                 vreg_s5a_2p15: s5 {
 600                         regulator-min-microvolt = <2150000>;
 601                         regulator-max-microvolt = <2150000>;
 602                         regulator-allow-set-load;
 603                         regulator-system-load = <325000>;
 604                 };
 605
 606                 vreg_s7a_1p0: s7 {
 607                         regulator-min-microvolt = <1000000>;
 608                         regulator-max-microvolt = <1000000>;
 609                 };
 610
 611                 /*
 612                  * S8 - SPMI-managed VDD_APC0
 613                  * S9, S10 and S11 (the main one) - SPMI-managed VDD_APC1
 614                  */
 615
 616                 vreg_l1a_1p0: l1 {
 617                         regulator-min-microvolt = <1000000>;
 618                         regulator-max-microvolt = <1000000>;
 619                 };
 620
 621                 vreg_l2a_1p25: l2 {
 622                         regulator-min-microvolt = <1250000>;
 623                         regulator-max-microvolt = <1250000>;
 624                         regulator-allow-set-load;
 625                         regulator-system-load = <4160>;
 626                 };
 627
 628                 vreg_l3a_1p2: l3 {
 629                         regulator-min-microvolt = <1200000>;
 630                         regulator-max-microvolt = <1200000>;
 631                         regulator-always-on;
 632                         regulator-allow-set-load;
 633                         regulator-system-load = <80000>;
 634                 };
 635
 636                 vreg_l4a_1p225: l4 {
 637                         regulator-min-microvolt = <1225000>;
 638                         regulator-max-microvolt = <1225000>;
 639                 };
 640
 641                 /* L5 is inaccessible from RPM */
 642
 643                 vreg_l6a_1p8: l6 {
 644                         regulator-min-microvolt = <1800000>;
 645                         regulator-max-microvolt = <1800000>;
 646                         regulator-allow-set-load;
 647                         regulator-system-load = <1000>;
 648                 };
 649
 650                 /* L7 is inaccessible from RPM */
 651
 652                 vreg_l8a_1p8: l8 {
 653                         regulator-min-microvolt = <1800000>;
 654                         regulator-max-microvolt = <1800000>;
 655                 };
 656
 657                 vreg_l9a_1p8: l9 {
 658                         regulator-min-microvolt = <1800000>;
 659                         regulator-max-microvolt = <1800000>;
 660                 };
 661
 662                 vreg_l10a_1p8: l10 {
 663                         regulator-min-microvolt = <1800000>;
 664                         regulator-max-microvolt = <1800000>;
 665                 };
 666
 667                 vreg_l11a_1p2: l11 {
 668                         regulator-min-microvolt = <1200000>;
 669                         regulator-max-microvolt = <1200000>;
 670                         regulator-always-on;
 671                         regulator-allow-set-load;
 672                         regulator-system-load = <35000>;
 673                 };
 674
 675                 vreg_l12a_1p8: l12 {
 676                         regulator-min-microvolt = <1800000>;
 677                         regulator-max-microvolt = <1800000>;
 678                         regulator-always-on;
 679                         regulator-allow-set-load;
 680                         regulator-system-load = <50000>;
 681                 };
 682
 683                 vreg_l13a_2p95: l13 {
 684                         regulator-min-microvolt = <1850000>;
 685                         regulator-max-microvolt = <2950000>;
 686                         regulator-always-on;
 687                         regulator-allow-set-load;
 688                         regulator-system-load = <22000>;
 689                 };
 690
 691                 vreg_l14a_1p8: l14 {
 692                         regulator-min-microvolt = <1800000>;
 693                         regulator-max-microvolt = <1800000>;
 694                         regulator-always-on;
 695                         regulator-allow-set-load;
 696                         regulator-system-load = <52000>;
 697                 };
 698
 699                 vreg_l15a_1p8: l15 {
 700                         regulator-min-microvolt = <1800000>;
 701                         regulator-max-microvolt = <1800000>;
 702                 };
 703
 704                 vreg_l16a_2p7: l16 {
 705                         regulator-min-microvolt = <2700000>;
 706                         regulator-max-microvolt = <2700000>;
 707                 };
 708
 709                 vreg_l17a_2p7: l17 {
 710                         regulator-min-microvolt = <2800000>;
 711                         regulator-max-microvolt = <2800000>;
 712                         regulator-always-on;
 713                         regulator-allow-set-load;
 714                         regulator-system-load = <300000>;
 715                 };
 716
 717                 vreg_l18a_2p85: l18 {
 718                         regulator-min-microvolt = <2850000>;
 719                         regulator-max-microvolt = <2850000>;
 720                         regulator-always-on;
 721                         regulator-allow-set-load;
 722                         regulator-system-load = <600000>;
 723                 };
 724
 725                 vreg_l19a_3p3: l19 {
 726                         regulator-min-microvolt = <3300000>;
 727                         regulator-max-microvolt = <3300000>;
 728                         regulator-always-on;
 729                         regulator-allow-set-load;
 730                         regulator-system-load = <500000>;
 731                 };
 732
 733                 vreg_l20a_2p95: l20 {
 734                         regulator-min-microvolt = <2950000>;
 735                         regulator-max-microvolt = <2950000>;
 736                         regulator-always-on;
 737                         regulator-boot-on;
 738                         regulator-allow-set-load;
 739                         regulator-system-load = <570000>;
 740                 };
 741
 742                 vreg_l21a_2p95: l21 {
 743                         regulator-min-microvolt = <2950000>;
 744                         regulator-max-microvolt = <2950000>;
 745                         regulator-always-on;
 746                         regulator-allow-set-load;
 747                         regulator-system-load = <800000>;
 748                 };
 749
 750                 vreg_l22a_3p0: l22 {
 751                         regulator-min-microvolt = <3000000>;
 752                         regulator-max-microvolt = <3000000>;
 753                         regulator-always-on;
 754                         regulator-allow-set-load;
 755                         regulator-system-load = <150000>;
 756                 };
 757
 758                 vreg_l23a_2p8: l23 {
 759                         regulator-min-microvolt = <2850000>;
 760                         regulator-max-microvolt = <2850000>;
 761                         regulator-always-on;
 762                         regulator-allow-set-load;
 763                         regulator-system-load = <80000>;
 764                 };
 765
 766                 vreg_l24a_3p075: l24 {
 767                         regulator-min-microvolt = <3075000>;
 768                         regulator-max-microvolt = <3150000>;
 769                         regulator-allow-set-load;
 770                         regulator-system-load = <5800>;
 771                 };
 772
 773                 vreg_l25a_1p1: l25 {
 774                         regulator-min-microvolt = <1150000>;
 775                         regulator-max-microvolt = <1150000>;
 776                         regulator-always-on;
 777                         regulator-allow-set-load;
 778                         regulator-system-load = <80000>;
 779                 };
 780
 781                 vreg_l26a_1p0: l26 {
 782                         regulator-min-microvolt = <1000000>;
 783                         regulator-max-microvolt = <1000000>;
 784                 };
 785
 786                 vreg_l27a_1p05: l27 {
 787                         regulator-min-microvolt = <1000000>;
 788                         regulator-max-microvolt = <1000000>;
 789                         regulator-always-on;
 790                         regulator-allow-set-load;
 791                         regulator-system-load = <500000>;
 792                 };
 793
 794                 vreg_l28a_1p0: l28 {
 795                         regulator-min-microvolt = <1000000>;
 796                         regulator-max-microvolt = <1000000>;
 797                         regulator-always-on;
 798                         regulator-allow-set-load;
 799                         regulator-system-load = <26000>;
 800                 };
 801
 802                 vreg_l29a_2p8: l29 {
 803                         regulator-min-microvolt = <2850000>;
 804                         regulator-max-microvolt = <2850000>;
 805                         regulator-always-on;
 806                         regulator-allow-set-load;
 807                         regulator-system-load = <80000>;
 808                 };
 809
 810                 vreg_l30a_1p8: l30 {
 811                         regulator-min-microvolt = <1800000>;
 812                         regulator-max-microvolt = <1800000>;
 813                         regulator-always-on;
 814                         regulator-allow-set-load;
 815                         regulator-system-load = <2500>;
 816                 };
 817
 818                 vreg_l31a_1p2: l31 {
 819                         regulator-min-microvolt = <1200000>;
 820                         regulator-max-microvolt = <1200000>;
 821                         regulator-always-on;
 822                         regulator-allow-set-load;
 823                         regulator-system-load = <600000>;
 824                 };
 825
 826                 vreg_l32a_1p8: l32 {
 827                         regulator-min-microvolt = <1800000>;
 828                         regulator-max-microvolt = <1800000>;
 829                 };
 830
 831                 vreg_lvs1a_1p8: lvs1 { };
 832
 833                 vreg_lvs2a_1p8: lvs2 { };
 834         };
 835
 836         pmi8994_regulators: pmi8994-regulators {
 837                 compatible = "qcom,rpm-pmi8994-regulators";
 838
 839                 vdd_s1-supply = <&vph_pwr>;
 840                 vdd_bst_byp-supply = <&vph_pwr>;
 841
 842                 vreg_s1b_1p0: s1 {
 843                         regulator-min-microvolt = <1025000>;
 844                         regulator-max-microvolt = <1025000>;
 845                 };
 846
 847                 /* S2 & S3 - VDD_GFX */
 848
 849                 vph_pwr_bbyp: boost-bypass {
 850                         regulator-min-microvolt = <3300000>;
 851                         regulator-max-microvolt = <3300000>;
 852                 };
 853         };
 854 };
 855
 856 &sdhc1 {
 857         status = "okay";
 858
 859         /*
 860          * This device is shipped with HS400 capabable eMMCs
 861          * However various brands have been used in various product batches,
 862          * including a Samsung eMMC (BGND3R) which features a quirk with HS400.
 863          * Set the speed to HS200 as a safety measure.
 864          */
 865         mmc-hs200-1_8v;
 866 };
 867
 868 &sdhc2 {
 869         status = "okay";
 870
 871         pinctrl-names = "default", "sleep";
 872         pinctrl-0 = <&sdc2_clk_on &sdc2_cmd_on &sdc2_data_on>;
 873         pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off>;
 874
 875         vmmc-supply = <&vreg_l21a_2p95>;
 876         vqmmc-supply = <&vreg_l13a_2p95>;
 877
 878         cd-gpios = <&pm8994_gpios 8 GPIO_ACTIVE_LOW>;
 879 };
 880
 881 &tlmm {
 882         grip_default: grip-default {
 883                 pins = "gpio39";
 884                 function = "gpio";
 885                 drive-strength = <6>;
 886                 bias-pull-down;
 887         };
 888
 889         grip_sleep: grip-sleep {
 890                 pins = "gpio39";
 891                 function = "gpio";
 892                 drive-strength = <2>;
 893                 bias-pull-down;
 894         };
 895
 896         hall_front_default: hall-front-default {
 897                 pins = "gpio42";
 898                 function = "gpio";
 899                 drive-strength = <2>;
 900                 bias-disable;
 901         };
 902
 903         hall_back_default: hall-back-default {
 904                 pins = "gpio75";
 905                 function = "gpio";
 906                 drive-strength = <2>;
 907                 bias-disable;
 908         };
 909 };