Merge tag 'block-5.14-2021-08-07' of git://git.kernel.dk/linux-block
[linux-2.6-microblaze.git] / arch / arm64 / boot / dts / nvidia / tegra210-p2371-2180.dts
1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
3
4 #include "tegra210-p2180.dtsi"
5 #include "tegra210-p2597.dtsi"
6
7 / {
8         model = "NVIDIA Jetson TX1 Developer Kit";
9         compatible = "nvidia,p2371-2180", "nvidia,tegra210";
10
11         pcie@1003000 {
12                 status = "okay";
13
14                 avdd-pll-uerefe-supply = <&avdd_1v05_pll>;
15                 hvddio-pex-supply = <&vdd_1v8>;
16                 dvddio-pex-supply = <&vdd_pex_1v05>;
17                 dvdd-pex-pll-supply = <&vdd_pex_1v05>;
18                 hvdd-pex-pll-e-supply = <&vdd_1v8>;
19                 vddio-pex-ctl-supply = <&vdd_1v8>;
20
21                 pci@1,0 {
22                         phys = <&{/padctl@7009f000/pads/pcie/lanes/pcie-0}>,
23                                <&{/padctl@7009f000/pads/pcie/lanes/pcie-1}>,
24                                <&{/padctl@7009f000/pads/pcie/lanes/pcie-2}>,
25                                <&{/padctl@7009f000/pads/pcie/lanes/pcie-3}>;
26                         phy-names = "pcie-0", "pcie-1", "pcie-2", "pcie-3";
27                         status = "okay";
28                 };
29
30                 pci@2,0 {
31                         phys = <&{/padctl@7009f000/pads/pcie/lanes/pcie-4}>;
32                         phy-names = "pcie-0";
33                         status = "okay";
34                 };
35         };
36
37         host1x@50000000 {
38                 dsi@54300000 {
39                         status = "okay";
40
41                         avdd-dsi-csi-supply = <&vdd_dsi_csi>;
42
43                         panel@0 {
44                                 compatible = "auo,b080uan01";
45                                 reg = <0>;
46
47                                 enable-gpios = <&gpio TEGRA_GPIO(V, 2)
48                                                 GPIO_ACTIVE_HIGH>;
49                                 power-supply = <&vdd_5v0_io>;
50                                 backlight = <&backlight>;
51                         };
52                 };
53         };
54
55         i2c@7000c400 {
56                 backlight: backlight@2c {
57                         compatible = "ti,lp8557";
58                         reg = <0x2c>;
59                         power-supply = <&vdd_3v3_sys>;
60
61                         dev-ctrl = /bits/ 8 <0x80>;
62                         init-brt = /bits/ 8 <0xff>;
63
64                         pwm-period = <29334>;
65
66                         pwms = <&pwm 0 29334>;
67                         pwm-names = "lp8557";
68
69                         /* 3 LED string */
70                         rom_14h {
71                                 rom-addr = /bits/ 8 <0x14>;
72                                 rom-val = /bits/ 8 <0x87>;
73                         };
74
75                         /* boost frequency 1 MHz */
76                         rom_13h {
77                                 rom-addr = /bits/ 8 <0x13>;
78                                 rom-val = /bits/ 8 <0x01>;
79                         };
80                 };
81         };
82
83         i2c@7000c500 {
84                 /* carrier board ID EEPROM */
85                 eeprom@57 {
86                         compatible = "atmel,24c02";
87                         reg = <0x57>;
88
89                         label = "system";
90                         vcc-supply = <&vdd_1v8>;
91                         address-width = <8>;
92                         pagesize = <8>;
93                         size = <256>;
94                         read-only;
95                 };
96         };
97
98         clock@70110000 {
99                 status = "okay";
100
101                 nvidia,cf = <6>;
102                 nvidia,ci = <0>;
103                 nvidia,cg = <2>;
104                 nvidia,droop-ctrl = <0x00000f00>;
105                 nvidia,force-mode = <1>;
106                 nvidia,sample-rate = <25000>;
107
108                 nvidia,pwm-min-microvolts = <708000>;
109                 nvidia,pwm-period-nanoseconds = <2500>; /* 2.5us */
110                 nvidia,pwm-to-pmic;
111                 nvidia,pwm-tristate-microvolts = <1000000>;
112                 nvidia,pwm-voltage-step-microvolts = <19200>;
113
114                 pinctrl-names = "dvfs_pwm_enable", "dvfs_pwm_disable";
115                 pinctrl-0 = <&dvfs_pwm_active_state>;
116                 pinctrl-1 = <&dvfs_pwm_inactive_state>;
117         };
118
119         aconnect@702c0000 {
120                 status = "okay";
121
122                 dma-controller@702e2000 {
123                         status = "okay";
124                 };
125
126                 interrupt-controller@702f9000 {
127                         status = "okay";
128                 };
129
130                 ahub@702d0800 {
131                         status = "okay";
132
133                         admaif@702d0000 {
134                                 status = "okay";
135                         };
136
137                         i2s@702d1000 {
138                                 status = "okay";
139
140                                 ports {
141                                         #address-cells = <1>;
142                                         #size-cells = <0>;
143
144                                         port@0 {
145                                                 reg = <0>;
146
147                                                 i2s1_cif_ep: endpoint {
148                                                         remote-endpoint = <&xbar_i2s1_ep>;
149                                                 };
150                                         };
151
152                                         i2s1_port: port@1 {
153                                                 reg = <1>;
154
155                                                 i2s1_dap_ep: endpoint {
156                                                         dai-format = "i2s";
157                                                         /* Placeholder for external Codec */
158                                                 };
159                                         };
160                                 };
161                         };
162
163                         i2s@702d1100 {
164                                 status = "okay";
165
166                                 ports {
167                                         #address-cells = <1>;
168                                         #size-cells = <0>;
169
170                                         port@0 {
171                                                 reg = <0>;
172
173                                                 i2s2_cif_ep: endpoint {
174                                                         remote-endpoint = <&xbar_i2s2_ep>;
175                                                 };
176                                         };
177
178                                         i2s2_port: port@1 {
179                                                 reg = <1>;
180
181                                                 i2s2_dap_ep: endpoint {
182                                                         dai-format = "i2s";
183                                                         /* Placeholder for external Codec */
184                                                 };
185                                         };
186                                 };
187                         };
188
189                         i2s@702d1200 {
190                                 status = "okay";
191
192                                 ports {
193                                         #address-cells = <1>;
194                                         #size-cells = <0>;
195
196                                         port@0 {
197                                                 reg = <0>;
198
199                                                 i2s3_cif_ep: endpoint {
200                                                         remote-endpoint = <&xbar_i2s3_ep>;
201                                                 };
202                                         };
203
204                                         i2s3_port: port@1 {
205                                                 reg = <1>;
206
207                                                 i2s3_dap_ep: endpoint {
208                                                         dai-format = "i2s";
209                                                         /* Placeholder for external Codec */
210                                                 };
211                                         };
212                                 };
213                         };
214
215                         i2s@702d1300 {
216                                 status = "okay";
217
218                                 ports {
219                                         #address-cells = <1>;
220                                         #size-cells = <0>;
221
222                                         port@0 {
223                                                 reg = <0>;
224
225                                                 i2s4_cif_ep: endpoint {
226                                                         remote-endpoint = <&xbar_i2s4_ep>;
227                                                 };
228                                         };
229
230                                         i2s4_port: port@1 {
231                                                 reg = <1>;
232
233                                                 i2s4_dap_ep: endpoint {
234                                                         dai-format = "i2s";
235                                                         /* Placeholder for external Codec */
236                                                 };
237                                         };
238                                 };
239                         };
240
241                         i2s@702d1400 {
242                                 status = "okay";
243
244                                 ports {
245                                         #address-cells = <1>;
246                                         #size-cells = <0>;
247
248                                         port@0 {
249                                                 reg = <0>;
250
251                                                 i2s5_cif_ep: endpoint {
252                                                         remote-endpoint = <&xbar_i2s5_ep>;
253                                                 };
254                                         };
255
256                                         i2s5_port: port@1 {
257                                                 reg = <1>;
258
259                                                 i2s5_dap_ep: endpoint {
260                                                         dai-format = "i2s";
261                                                         /* Placeholder for external Codec */
262                                                 };
263                                         };
264                                 };
265                         };
266
267                         dmic@702d4000 {
268                                 status = "okay";
269
270                                 ports {
271                                         #address-cells = <1>;
272                                         #size-cells = <0>;
273
274                                         port@0 {
275                                                 reg = <0>;
276
277                                                 dmic1_cif_ep: endpoint {
278                                                         remote-endpoint = <&xbar_dmic1_ep>;
279                                                 };
280                                         };
281
282                                         dmic1_port: port@1 {
283                                                 reg = <1>;
284
285                                                 dmic1_dap_ep: endpoint {
286                                                         /* Placeholder for external Codec */
287                                                 };
288                                         };
289                                 };
290                         };
291
292                         dmic@702d4100 {
293                                 status = "okay";
294
295                                 ports {
296                                         #address-cells = <1>;
297                                         #size-cells = <0>;
298
299                                         port@0 {
300                                                 reg = <0>;
301
302                                                 dmic2_cif_ep: endpoint {
303                                                         remote-endpoint = <&xbar_dmic2_ep>;
304                                                 };
305                                         };
306
307                                         dmic2_port: port@1 {
308                                                 reg = <1>;
309
310                                                 dmic2_dap_ep: endpoint {
311                                                         /* Placeholder for external Codec */
312                                                 };
313                                         };
314                                 };
315                         };
316
317                         dmic@702d4200 {
318                                 status = "okay";
319
320                                 ports {
321                                         #address-cells = <1>;
322                                         #size-cells = <0>;
323
324                                         port@0 {
325                                                 reg = <0>;
326
327                                                 dmic3_cif_ep: endpoint {
328                                                         remote-endpoint = <&xbar_dmic3_ep>;
329                                                 };
330                                         };
331
332                                         dmic3_port: port@1 {
333                                                 reg = <1>;
334
335                                                 dmic3_dap_ep: endpoint {
336                                                         /* Placeholder for external Codec */
337                                                 };
338                                         };
339                                 };
340                         };
341
342                         ports {
343                                 xbar_i2s1_port: port@a {
344                                         reg = <0xa>;
345
346                                         xbar_i2s1_ep: endpoint {
347                                                 remote-endpoint = <&i2s1_cif_ep>;
348                                         };
349                                 };
350
351                                 xbar_i2s2_port: port@b {
352                                         reg = <0xb>;
353
354                                         xbar_i2s2_ep: endpoint {
355                                                 remote-endpoint = <&i2s2_cif_ep>;
356                                         };
357                                 };
358
359                                 xbar_i2s3_port: port@c {
360                                         reg = <0xc>;
361
362                                         xbar_i2s3_ep: endpoint {
363                                                 remote-endpoint = <&i2s3_cif_ep>;
364                                         };
365                                 };
366
367                                 xbar_i2s4_port: port@d {
368                                         reg = <0xd>;
369
370                                         xbar_i2s4_ep: endpoint {
371                                                 remote-endpoint = <&i2s4_cif_ep>;
372                                         };
373                                 };
374
375                                 xbar_i2s5_port: port@e {
376                                         reg = <0xe>;
377
378                                         xbar_i2s5_ep: endpoint {
379                                                 remote-endpoint = <&i2s5_cif_ep>;
380                                         };
381                                 };
382
383                                 xbar_dmic1_port: port@f {
384                                         reg = <0xf>;
385
386                                         xbar_dmic1_ep: endpoint {
387                                                 remote-endpoint = <&dmic1_cif_ep>;
388                                         };
389                                 };
390
391                                 xbar_dmic2_port: port@10 {
392                                         reg = <0x10>;
393
394                                         xbar_dmic2_ep: endpoint {
395                                                 remote-endpoint = <&dmic2_cif_ep>;
396                                         };
397                                 };
398
399                                 xbar_dmic3_port: port@11 {
400                                         reg = <0x11>;
401
402                                         xbar_dmic3_ep: endpoint {
403                                                 remote-endpoint = <&dmic3_cif_ep>;
404                                         };
405                                 };
406                         };
407                 };
408         };
409
410         sound {
411                 compatible = "nvidia,tegra210-audio-graph-card";
412                 status = "okay";
413
414                 dais = /* FE */
415                        <&admaif1_port>, <&admaif2_port>, <&admaif3_port>,
416                        <&admaif4_port>, <&admaif5_port>, <&admaif6_port>,
417                        <&admaif7_port>, <&admaif8_port>, <&admaif9_port>,
418                        <&admaif10_port>,
419                        /* Router */
420                        <&xbar_i2s1_port>, <&xbar_i2s2_port>, <&xbar_i2s3_port>,
421                        <&xbar_i2s4_port>, <&xbar_i2s5_port>, <&xbar_dmic1_port>,
422                        <&xbar_dmic2_port>, <&xbar_dmic3_port>,
423                        /* I/O DAP Ports */
424                        <&i2s1_port>, <&i2s2_port>, <&i2s3_port>, <&i2s4_port>,
425                        <&i2s5_port>, <&dmic1_port>, <&dmic2_port>, <&dmic3_port>;
426
427                 label = "NVIDIA Jetson TX1 APE";
428         };
429 };