arch/arm64/boot/dts/nvidia/tegra132-norrin.dts

   1 // SPDX-License-Identifier: GPL-2.0
   2 /dts-v1/;
   3
   4 #include <dt-bindings/input/input.h>
   5 #include "tegra132.dtsi"
   6
   7 / {
   8         model = "NVIDIA Tegra132 Norrin";
   9         compatible = "nvidia,norrin", "nvidia,tegra132", "nvidia,tegra124";
  10
  11         aliases {
  12                 rtc0 = "/i2c@7000d000/as3722@40";
  13                 rtc1 = "/rtc@7000e000";
  14                 serial0 = &uarta;
  15         };
  16
  17         chosen {
  18                 stdout-path = "serial0:115200n8";
  19         };
  20
  21         memory@80000000 {
  22                 device_type = "memory";
  23                 reg = <0x0 0x80000000 0x0 0x80000000>;
  24         };
  25
  26         host1x@50000000 {
  27                 hdmi@54280000 {
  28                         status = "disabled";
  29
  30                         vdd-supply = <&vdd_3v3_hdmi>;
  31                         pll-supply = <&vdd_hdmi_pll>;
  32                         hdmi-supply = <&vdd_5v0_hdmi>;
  33
  34                         nvidia,ddc-i2c-bus = <&hdmi_ddc>;
  35                         nvidia,hpd-gpio =
  36                                 <&gpio TEGRA_GPIO(N, 7) GPIO_ACTIVE_HIGH>;
  37                 };
  38
  39                 sor@54540000 {
  40                         status = "okay";
  41
  42                         avdd-io-hdmi-dp-supply = <&vdd_3v3_hdmi>;
  43                         vdd-hdmi-dp-pll-supply = <&vdd_hdmi_pll>;
  44
  45                         nvidia,dpaux = <&dpaux>;
  46                         nvidia,panel = <&panel>;
  47                 };
  48
  49                 dpaux: dpaux@545c0000 {
  50                         vdd-supply = <&vdd_3v3_panel>;
  51                         status = "okay";
  52                 };
  53         };
  54
  55         gpu@57000000 {
  56                 status = "okay";
  57
  58                 vdd-supply = <&vdd_gpu>;
  59         };
  60
  61         pinmux@70000868 {
  62                 pinctrl-names = "default";
  63                 pinctrl-0 = <&pinmux_default>;
  64
  65                 pinmux_default: pinmux@0 {
  66                         dap_mclk1_pw4 {
  67                                 nvidia,pins = "dap_mclk1_pw4";
  68                                 nvidia,function = "extperiph1";
  69                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  70                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
  71                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  72                         };
  73                         dap2_din_pa4 {
  74                                 nvidia,pins = "dap2_din_pa4";
  75                                 nvidia,function = "i2s1";
  76                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  77                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
  78                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
  79                         };
  80                         dap2_dout_pa5 {
  81                                 nvidia,pins = "dap2_dout_pa5",
  82                                               "dap2_fs_pa2",
  83                                               "dap2_sclk_pa3";
  84                                 nvidia,function = "i2s1";
  85                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  86                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
  87                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  88                         };
  89                         dap3_dout_pp2 {
  90                                 nvidia,pins = "dap3_dout_pp2";
  91                                 nvidia,function = "i2s2";
  92                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
  93                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
  94                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  95                         };
  96                         dvfs_pwm_px0 {
  97                                 nvidia,pins = "dvfs_pwm_px0",
  98                                               "dvfs_clk_px2";
  99                                 nvidia,function = "cldvfs";
 100                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 101                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 102                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 103                         };
 104                         ulpi_clk_py0 {
 105                                 nvidia,pins = "ulpi_clk_py0",
 106                                               "ulpi_nxt_py2",
 107                                               "ulpi_stp_py3";
 108                                 nvidia,function = "spi1";
 109                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 110                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 111                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 112                         };
 113                         ulpi_dir_py1 {
 114                                 nvidia,pins = "ulpi_dir_py1";
 115                                 nvidia,function = "spi1";
 116                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 117                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 118                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 119                         };
 120                         cam_i2c_scl_pbb1 {
 121                                 nvidia,pins = "cam_i2c_scl_pbb1",
 122                                               "cam_i2c_sda_pbb2";
 123                                 nvidia,function = "i2c3";
 124                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 125                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 126                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 127                                 nvidia,lock = <TEGRA_PIN_DISABLE>;
 128                                 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
 129                         };
 130                         gen2_i2c_scl_pt5 {
 131                                 nvidia,pins = "gen2_i2c_scl_pt5",
 132                                               "gen2_i2c_sda_pt6";
 133                                 nvidia,function = "i2c2";
 134                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 135                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 136                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 137                                 nvidia,lock = <TEGRA_PIN_DISABLE>;
 138                                 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
 139                         };
 140                         pj7 {
 141                                 nvidia,pins = "pj7";
 142                                 nvidia,function = "uartd";
 143                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 144                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 145                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 146                         };
 147                         spdif_in_pk6 {
 148                                 nvidia,pins = "spdif_in_pk6";
 149                                 nvidia,function = "spdif";
 150                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 151                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 152                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 153                         };
 154                         pk7 {
 155                                 nvidia,pins = "pk7";
 156                                 nvidia,function = "uartd";
 157                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 158                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 159                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 160                         };
 161                         pg4 {
 162                                 nvidia,pins = "pg4",
 163                                               "pg5",
 164                                               "pg6",
 165                                               "pi3";
 166                                 nvidia,function = "spi4";
 167                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 168                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 169                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 170                         };
 171                         pg7 {
 172                                 nvidia,pins = "pg7";
 173                                 nvidia,function = "spi4";
 174                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 175                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 176                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 177                         };
 178                         ph1 {
 179                                 nvidia,pins = "ph1";
 180                                 nvidia,function = "pwm1";
 181                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 182                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 183                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 184                         };
 185                         pk0 {
 186                                 nvidia,pins = "pk0",
 187                                               "kb_row15_ps7",
 188                                               "clk_32k_out_pa0";
 189                                 nvidia,function = "soc";
 190                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 191                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 192                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 193                         };
 194                         sdmmc1_clk_pz0 {
 195                                 nvidia,pins = "sdmmc1_clk_pz0";
 196                                 nvidia,function = "sdmmc1";
 197                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 198                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 199                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 200                         };
 201                         sdmmc1_cmd_pz1 {
 202                                 nvidia,pins = "sdmmc1_cmd_pz1",
 203                                               "sdmmc1_dat0_py7",
 204                                               "sdmmc1_dat1_py6",
 205                                               "sdmmc1_dat2_py5",
 206                                               "sdmmc1_dat3_py4";
 207                                 nvidia,function = "sdmmc1";
 208                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 209                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 210                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 211                         };
 212                         sdmmc3_clk_pa6 {
 213                                 nvidia,pins = "sdmmc3_clk_pa6";
 214                                 nvidia,function = "sdmmc3";
 215                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 216                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 217                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 218                         };
 219                         sdmmc3_cmd_pa7 {
 220                                 nvidia,pins = "sdmmc3_cmd_pa7",
 221                                               "sdmmc3_dat0_pb7",
 222                                               "sdmmc3_dat1_pb6",
 223                                               "sdmmc3_dat2_pb5",
 224                                               "sdmmc3_dat3_pb4",
 225                                               "kb_col4_pq4",
 226                                               "sdmmc3_clk_lb_out_pee4",
 227                                               "sdmmc3_clk_lb_in_pee5",
 228                                               "sdmmc3_cd_n_pv2";
 229                                 nvidia,function = "sdmmc3";
 230                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 231                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 232                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 233                         };
 234                         sdmmc4_clk_pcc4 {
 235                                 nvidia,pins = "sdmmc4_clk_pcc4";
 236                                 nvidia,function = "sdmmc4";
 237                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 238                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 239                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 240                         };
 241                         sdmmc4_cmd_pt7 {
 242                                 nvidia,pins = "sdmmc4_cmd_pt7",
 243                                               "sdmmc4_dat0_paa0",
 244                                               "sdmmc4_dat1_paa1",
 245                                               "sdmmc4_dat2_paa2",
 246                                               "sdmmc4_dat3_paa3",
 247                                               "sdmmc4_dat4_paa4",
 248                                               "sdmmc4_dat5_paa5",
 249                                               "sdmmc4_dat6_paa6",
 250                                               "sdmmc4_dat7_paa7";
 251                                 nvidia,function = "sdmmc4";
 252                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 253                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 254                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 255                         };
 256                         mic_det_l {
 257                                 nvidia,pins = "kb_row7_pr7";
 258                                 nvidia,function = "rsvd2";
 259                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 260                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 261                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 262                         };
 263                         kb_row10_ps2 {
 264                                 nvidia,pins = "kb_row10_ps2";
 265                                 nvidia,function = "uarta";
 266                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 267                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 268                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 269                         };
 270                         kb_row9_ps1 {
 271                                 nvidia,pins = "kb_row9_ps1";
 272                                 nvidia,function = "uarta";
 273                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 274                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 275                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 276                         };
 277                         pwr_i2c_scl_pz6 {
 278                                 nvidia,pins = "pwr_i2c_scl_pz6",
 279                                               "pwr_i2c_sda_pz7";
 280                                 nvidia,function = "i2cpwr";
 281                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 282                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 283                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 284                                 nvidia,lock = <TEGRA_PIN_DISABLE>;
 285                                 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
 286                         };
 287                         jtag_rtck {
 288                                 nvidia,pins = "jtag_rtck";
 289                                 nvidia,function = "rtck";
 290                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 291                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 292                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 293                         };
 294                         clk_32k_in {
 295                                 nvidia,pins = "clk_32k_in";
 296                                 nvidia,function = "clk";
 297                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 298                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 299                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 300                         };
 301                         core_pwr_req {
 302                                 nvidia,pins = "core_pwr_req";
 303                                 nvidia,function = "pwron";
 304                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 305                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 306                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 307                         };
 308                         cpu_pwr_req {
 309                                 nvidia,pins = "cpu_pwr_req";
 310                                 nvidia,function = "cpu";
 311                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 312                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 313                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 314                         };
 315                         kb_col0_ap {
 316                                 nvidia,pins = "kb_col0_pq0";
 317                                 nvidia,function = "rsvd4";
 318                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 319                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 320                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 321                         };
 322                         en_vdd_sd {
 323                                 nvidia,pins = "kb_row0_pr0";
 324                                 nvidia,function = "rsvd4";
 325                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 326                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 327                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 328                         };
 329                         lid_open {
 330                                 nvidia,pins = "kb_row4_pr4";
 331                                 nvidia,function = "rsvd3";
 332                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 333                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 334                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 335                         };
 336                         pwr_int_n {
 337                                 nvidia,pins = "pwr_int_n";
 338                                 nvidia,function = "pmi";
 339                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 340                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 341                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 342                         };
 343                         reset_out_n {
 344                                 nvidia,pins = "reset_out_n";
 345                                 nvidia,function = "reset_out_n";
 346                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 347                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 348                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 349                         };
 350                         clk3_out_pee0 {
 351                                 nvidia,pins = "clk3_out_pee0";
 352                                 nvidia,function = "extperiph3";
 353                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 354                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 355                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 356                         };
 357                         gen1_i2c_scl_pc4 {
 358                                 nvidia,pins = "gen1_i2c_scl_pc4",
 359                                               "gen1_i2c_sda_pc5";
 360                                 nvidia,function = "i2c1";
 361                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 362                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 363                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 364                                 nvidia,lock = <TEGRA_PIN_DISABLE>;
 365                                 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
 366                         };
 367                         hdmi_cec_pee3 {
 368                                 nvidia,pins = "hdmi_cec_pee3";
 369                                 nvidia,function = "cec";
 370                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 371                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 372                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 373                                 nvidia,lock = <TEGRA_PIN_DISABLE>;
 374                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 375                         };
 376                         hdmi_int_pn7 {
 377                                 nvidia,pins = "hdmi_int_pn7";
 378                                 nvidia,function = "rsvd1";
 379                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 380                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 381                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 382                         };
 383                         ddc_scl_pv4 {
 384                                 nvidia,pins = "ddc_scl_pv4",
 385                                               "ddc_sda_pv5";
 386                                 nvidia,function = "i2c4";
 387                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 388                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 389                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 390                                 nvidia,lock = <TEGRA_PIN_DISABLE>;
 391                                 nvidia,rcv-sel = <TEGRA_PIN_ENABLE>;
 392                         };
 393                         usb_vbus_en0_pn4 {
 394                                 nvidia,pins = "usb_vbus_en0_pn4",
 395                                               "usb_vbus_en1_pn5",
 396                                               "usb_vbus_en2_pff1";
 397                                 nvidia,function = "usb";
 398                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 399                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 400                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 401                                 nvidia,lock = <TEGRA_PIN_DISABLE>;
 402                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 403                         };
 404                         drive_sdio1 {
 405                                 nvidia,pins = "drive_sdio1";
 406                                 nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>;
 407                                 nvidia,schmitt = <TEGRA_PIN_DISABLE>;
 408                                 nvidia,pull-down-strength = <36>;
 409                                 nvidia,pull-up-strength = <20>;
 410                                 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_SLOW>;
 411                                 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_SLOW>;
 412                         };
 413                         drive_sdio3 {
 414                                 nvidia,pins = "drive_sdio3";
 415                                 nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>;
 416                                 nvidia,schmitt = <TEGRA_PIN_DISABLE>;
 417                                 nvidia,pull-down-strength = <22>;
 418                                 nvidia,pull-up-strength = <36>;
 419                                 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
 420                                 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
 421                         };
 422                         drive_gma {
 423                                 nvidia,pins = "drive_gma";
 424                                 nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>;
 425                                 nvidia,schmitt = <TEGRA_PIN_DISABLE>;
 426                                 nvidia,pull-down-strength = <2>;
 427                                 nvidia,pull-up-strength = <1>;
 428                                 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
 429                                 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
 430                                 nvidia,drive-type = <1>;
 431                         };
 432                         ac_ok {
 433                                 nvidia,pins = "pj0";
 434                                 nvidia,function = "gmi";
 435                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 436                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 437                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 438                         };
 439                         codec_irq_l {
 440                                 nvidia,pins = "ph4";
 441                                 nvidia,function = "gmi";
 442                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 443                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 444                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 445                         };
 446                         lcd_bl_en {
 447                                 nvidia,pins = "ph2";
 448                                 nvidia,function = "gmi";
 449                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 450                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 451                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 452                         };
 453                         touch_irq_l {
 454                                 nvidia,pins = "gpio_w3_aud_pw3";
 455                                 nvidia,function = "spi6";
 456                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 457                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 458                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 459                         };
 460                         tpm_davint_l {
 461                                 nvidia,pins = "ph6";
 462                                 nvidia,function = "gmi";
 463                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 464                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 465                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 466                         };
 467                         ts_irq_l {
 468                                 nvidia,pins = "pk2";
 469                                 nvidia,function = "gmi";
 470                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 471                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 472                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 473                         };
 474                         ts_reset_l {
 475                                 nvidia,pins = "pk4";
 476                                 nvidia,function = "gmi";
 477                                 nvidia,pull = <1>;
 478                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 479                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 480                         };
 481                         ts_shdn_l {
 482                                 nvidia,pins = "pk1";
 483                                 nvidia,function = "gmi";
 484                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 485                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 486                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 487                         };
 488                         ph7 {
 489                                 nvidia,pins = "ph7";
 490                                 nvidia,function = "gmi";
 491                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 492                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 493                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 494                         };
 495                         sensor_irq_l {
 496                                 nvidia,pins = "pi6";
 497                                 nvidia,function = "gmi";
 498                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 499                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 500                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 501                         };
 502                         wifi_en {
 503                                 nvidia,pins = "gpio_x7_aud_px7";
 504                                 nvidia,function = "rsvd4";
 505                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 506                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 507                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 508                         };
 509                         chromeos_write_protect {
 510                                 nvidia,pins = "kb_row1_pr1";
 511                                 nvidia,function = "rsvd4";
 512                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 513                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 514                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 515                         };
 516                         hp_det_l {
 517                                 nvidia,pins = "pi7";
 518                                 nvidia,function = "rsvd1";
 519                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 520                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 521                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 522                         };
 523                         soc_warm_reset_l {
 524                                 nvidia,pins = "pi5";
 525                                 nvidia,function = "gmi";
 526                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 527                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 528                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 529                         };
 530                 };
 531         };
 532
 533         serial@70006000 {
 534                 status = "okay";
 535         };
 536
 537         pwm: pwm@7000a000 {
 538                 status = "okay";
 539         };
 540
 541         /* HDMI DDC */
 542         hdmi_ddc: i2c@7000c700 {
 543                 status = "okay";
 544                 clock-frequency = <100000>;
 545         };
 546
 547         i2c@7000d000 {
 548                 status = "okay";
 549                 clock-frequency = <400000>;
 550
 551                 as3722: pmic@40 {
 552                         compatible = "ams,as3722";
 553                         reg = <0x40>;
 554                         interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
 555
 556                         ams,system-power-controller;
 557
 558                         #interrupt-cells = <2>;
 559                         interrupt-controller;
 560
 561                         #gpio-cells = <2>;
 562                         gpio-controller;
 563
 564                         pinctrl-names = "default";
 565                         pinctrl-0 = <&as3722_default>;
 566
 567                         as3722_default: pinmux@0 {
 568                                 gpio0 {
 569                                         pins = "gpio0";
 570                                         function = "gpio";
 571                                         bias-pull-down;
 572                                 };
 573
 574                                 gpio1 {
 575                                         pins = "gpio1";
 576                                         function = "gpio";
 577                                         bias-pull-up;
 578                                 };
 579
 580                                 gpio2_4_7 {
 581                                         pins = "gpio2", "gpio4", "gpio7";
 582                                         function = "gpio";
 583                                         bias-pull-up;
 584                                 };
 585
 586                                 gpio3 {
 587                                         pins = "gpio3";
 588                                         function = "gpio";
 589                                         bias-high-impedance;
 590                                 };
 591
 592                                 gpio5 {
 593                                         pins = "gpio5";
 594                                         function = "clk32k-out";
 595                                         bias-pull-down;
 596                                 };
 597
 598                                 gpio6 {
 599                                         pins = "gpio6";
 600                                         function = "clk32k-out";
 601                                         bias-pull-down;
 602                                 };
 603                         };
 604
 605                         regulators {
 606                                 vsup-sd2-supply = <&vdd_5v0_sys>;
 607                                 vsup-sd3-supply = <&vdd_5v0_sys>;
 608                                 vsup-sd4-supply = <&vdd_5v0_sys>;
 609                                 vsup-sd5-supply = <&vdd_5v0_sys>;
 610                                 vin-ldo0-supply = <&vdd_1v35_lp0>;
 611                                 vin-ldo1-6-supply = <&vdd_3v3_sys>;
 612                                 vin-ldo2-5-7-supply = <&vddio_1v8>;
 613                                 vin-ldo3-4-supply = <&vdd_3v3_sys>;
 614                                 vin-ldo9-10-supply = <&vdd_5v0_sys>;
 615                                 vin-ldo11-supply = <&vdd_3v3_run>;
 616
 617                                 sd0 {
 618                                         regulator-name = "+VDD_CPU_AP";
 619                                         regulator-min-microvolt = <700000>;
 620                                         regulator-max-microvolt = <1350000>;
 621                                         regulator-max-microamp = <3500000>;
 622                                         regulator-always-on;
 623                                         regulator-boot-on;
 624                                         ams,ext-control = <2>;
 625                                 };
 626
 627                                 sd1 {
 628                                         regulator-name = "+VDD_CORE";
 629                                         regulator-min-microvolt = <700000>;
 630                                         regulator-max-microvolt = <1350000>;
 631                                         regulator-max-microamp = <4000000>;
 632                                         regulator-always-on;
 633                                         regulator-boot-on;
 634                                         ams,ext-control = <1>;
 635                                 };
 636
 637                                 vdd_1v35_lp0: sd2 {
 638                                         regulator-name = "+1.35V_LP0(sd2)";
 639                                         regulator-min-microvolt = <1350000>;
 640                                         regulator-max-microvolt = <1350000>;
 641                                         regulator-always-on;
 642                                         regulator-boot-on;
 643                                 };
 644
 645                                 sd3 {
 646                                         regulator-name = "+1.35V_LP0(sd3)";
 647                                         regulator-min-microvolt = <1350000>;
 648                                         regulator-max-microvolt = <1350000>;
 649                                         regulator-always-on;
 650                                         regulator-boot-on;
 651                                 };
 652
 653                                 vdd_1v05_run: sd4 {
 654                                         regulator-name = "+1.05V_RUN";
 655                                         regulator-min-microvolt = <1050000>;
 656                                         regulator-max-microvolt = <1050000>;
 657                                 };
 658
 659                                 vddio_1v8: sd5 {
 660                                         regulator-name = "+1.8V_VDDIO";
 661                                         regulator-min-microvolt = <1800000>;
 662                                         regulator-max-microvolt = <1800000>;
 663                                         regulator-always-on;
 664                                         regulator-boot-on;
 665                                 };
 666
 667                                 vdd_gpu: sd6 {
 668                                         regulator-name = "+VDD_GPU_AP";
 669                                         regulator-min-microvolt = <800000>;
 670                                         regulator-max-microvolt = <1200000>;
 671                                         regulator-min-microamp = <3500000>;
 672                                         regulator-max-microamp = <3500000>;
 673                                         regulator-always-on;
 674                                         regulator-boot-on;
 675                                 };
 676
 677                                 avdd_1v05_run: ldo0 {
 678                                         regulator-name = "+1.05_RUN_AVDD";
 679                                         regulator-min-microvolt = <1050000>;
 680                                         regulator-max-microvolt = <1050000>;
 681                                         regulator-always-on;
 682                                         regulator-boot-on;
 683                                         ams,ext-control = <1>;
 684                                 };
 685
 686                                 ldo1 {
 687                                         regulator-name = "+1.8V_RUN_CAM";
 688                                         regulator-min-microvolt = <1800000>;
 689                                         regulator-max-microvolt = <1800000>;
 690                                 };
 691
 692                                 ldo2 {
 693                                         regulator-name = "+1.2V_GEN_AVDD";
 694                                         regulator-min-microvolt = <1200000>;
 695                                         regulator-max-microvolt = <1200000>;
 696                                         regulator-always-on;
 697                                         regulator-boot-on;
 698                                 };
 699
 700                                 ldo3 {
 701                                         regulator-name = "+1.00V_LP0_VDD_RTC";
 702                                         regulator-min-microvolt = <1000000>;
 703                                         regulator-max-microvolt = <1000000>;
 704                                         regulator-always-on;
 705                                         regulator-boot-on;
 706                                         ams,enable-tracking;
 707                                 };
 708
 709                                 vdd_run_cam: ldo4 {
 710                                         regulator-name = "+2.8V_RUN_CAM";
 711                                         regulator-min-microvolt = <2800000>;
 712                                         regulator-max-microvolt = <2800000>;
 713                                 };
 714
 715                                 ldo5 {
 716                                         regulator-name = "+1.2V_RUN_CAM_FRONT";
 717                                         regulator-min-microvolt = <1200000>;
 718                                         regulator-max-microvolt = <1200000>;
 719                                 };
 720
 721                                 vddio_sdmmc3: ldo6 {
 722                                         regulator-name = "+VDDIO_SDMMC3";
 723                                         regulator-min-microvolt = <1800000>;
 724                                         regulator-max-microvolt = <3300000>;
 725                                 };
 726
 727                                 ldo7 {
 728                                         regulator-name = "+1.05V_RUN_CAM_REAR";
 729                                         regulator-min-microvolt = <1050000>;
 730                                         regulator-max-microvolt = <1050000>;
 731                                 };
 732
 733                                 ldo9 {
 734                                         regulator-name = "+2.8V_RUN_TOUCH";
 735                                         regulator-min-microvolt = <2800000>;
 736                                         regulator-max-microvolt = <2800000>;
 737                                 };
 738
 739                                 ldo10 {
 740                                         regulator-name = "+2.8V_RUN_CAM_AF";
 741                                         regulator-min-microvolt = <2800000>;
 742                                         regulator-max-microvolt = <2800000>;
 743                                 };
 744
 745                                 ldo11 {
 746                                         regulator-name = "+1.8V_RUN_VPP_FUSE";
 747                                         regulator-min-microvolt = <1800000>;
 748                                         regulator-max-microvolt = <1800000>;
 749                                 };
 750                         };
 751                 };
 752         };
 753
 754         spi@7000d400 {
 755                 status = "okay";
 756
 757                 ec: cros-ec@0 {
 758                         compatible = "google,cros-ec-spi";
 759                         spi-max-frequency = <3000000>;
 760                         interrupt-parent = <&gpio>;
 761                         interrupts = <TEGRA_GPIO(C, 7) IRQ_TYPE_LEVEL_LOW>;
 762                         reg = <0>;
 763
 764                         google,cros-ec-spi-msg-delay = <2000>;
 765
 766                         i2c_20: i2c-tunnel {
 767                                 compatible = "google,cros-ec-i2c-tunnel";
 768                                 #address-cells = <1>;
 769                                 #size-cells = <0>;
 770
 771                                 google,remote-bus = <0>;
 772
 773                                 charger: bq24735 {
 774                                         compatible = "ti,bq24735";
 775                                         reg = <0x9>;
 776                                         interrupt-parent = <&gpio>;
 777                                         interrupts = <TEGRA_GPIO(J, 0)
 778                                                         GPIO_ACTIVE_HIGH>;
 779                                         ti,ac-detect-gpios = <&gpio
 780                                                         TEGRA_GPIO(J, 0)
 781                                                         GPIO_ACTIVE_HIGH>;
 782                                 };
 783
 784                                 battery: smart-battery {
 785                                         compatible = "sbs,sbs-battery";
 786                                         reg = <0xb>;
 787                                         sbs,i2c-retry-count = <2>;
 788                                         sbs,poll-retry-count = <10>;
 789                                 /*      power-supplies = <&charger>; */
 790                                 };
 791                         };
 792
 793                         keyboard-controller {
 794                                 compatible = "google,cros-ec-keyb";
 795                                 keypad,num-rows = <8>;
 796                                 keypad,num-columns = <13>;
 797                                 google,needs-ghost-filter;
 798                                 linux,keymap =
 799                                         <MATRIX_KEY(0x00, 0x01, KEY_LEFTMETA)
 800                                          MATRIX_KEY(0x00, 0x02, KEY_F1)
 801                                          MATRIX_KEY(0x00, 0x03, KEY_B)
 802                                          MATRIX_KEY(0x00, 0x04, KEY_F10)
 803                                          MATRIX_KEY(0x00, 0x06, KEY_N)
 804                                          MATRIX_KEY(0x00, 0x08, KEY_EQUAL)
 805                                          MATRIX_KEY(0x00, 0x0a, KEY_RIGHTALT)
 806
 807                                          MATRIX_KEY(0x01, 0x01, KEY_ESC)
 808                                          MATRIX_KEY(0x01, 0x02, KEY_F4)
 809                                          MATRIX_KEY(0x01, 0x03, KEY_G)
 810                                          MATRIX_KEY(0x01, 0x04, KEY_F7)
 811                                          MATRIX_KEY(0x01, 0x06, KEY_H)
 812                                          MATRIX_KEY(0x01, 0x08, KEY_APOSTROPHE)
 813                                          MATRIX_KEY(0x01, 0x09, KEY_F9)
 814                                          MATRIX_KEY(0x01, 0x0b, KEY_BACKSPACE)
 815
 816                                          MATRIX_KEY(0x02, 0x00, KEY_LEFTCTRL)
 817                                          MATRIX_KEY(0x02, 0x01, KEY_TAB)
 818                                          MATRIX_KEY(0x02, 0x02, KEY_F3)
 819                                          MATRIX_KEY(0x02, 0x03, KEY_T)
 820                                          MATRIX_KEY(0x02, 0x04, KEY_F6)
 821                                          MATRIX_KEY(0x02, 0x05, KEY_RIGHTBRACE)
 822                                          MATRIX_KEY(0x02, 0x06, KEY_Y)
 823                                          MATRIX_KEY(0x02, 0x07, KEY_102ND)
 824                                          MATRIX_KEY(0x02, 0x08, KEY_LEFTBRACE)
 825                                          MATRIX_KEY(0x02, 0x09, KEY_F8)
 826
 827                                          MATRIX_KEY(0x03, 0x01, KEY_GRAVE)
 828                                          MATRIX_KEY(0x03, 0x02, KEY_F2)
 829                                          MATRIX_KEY(0x03, 0x03, KEY_5)
 830                                          MATRIX_KEY(0x03, 0x04, KEY_F5)
 831                                          MATRIX_KEY(0x03, 0x06, KEY_6)
 832                                          MATRIX_KEY(0x03, 0x08, KEY_MINUS)
 833                                          MATRIX_KEY(0x03, 0x0b, KEY_BACKSLASH)
 834
 835                                          MATRIX_KEY(0x04, 0x00, KEY_RIGHTCTRL)
 836                                          MATRIX_KEY(0x04, 0x01, KEY_A)
 837                                          MATRIX_KEY(0x04, 0x02, KEY_D)
 838                                          MATRIX_KEY(0x04, 0x03, KEY_F)
 839                                          MATRIX_KEY(0x04, 0x04, KEY_S)
 840                                          MATRIX_KEY(0x04, 0x05, KEY_K)
 841                                          MATRIX_KEY(0x04, 0x06, KEY_J)
 842                                          MATRIX_KEY(0x04, 0x08, KEY_SEMICOLON)
 843                                          MATRIX_KEY(0x04, 0x09, KEY_L)
 844                                          MATRIX_KEY(0x04, 0x0a, KEY_BACKSLASH)
 845                                          MATRIX_KEY(0x04, 0x0b, KEY_ENTER)
 846
 847                                          MATRIX_KEY(0x05, 0x01, KEY_Z)
 848                                          MATRIX_KEY(0x05, 0x02, KEY_C)
 849                                          MATRIX_KEY(0x05, 0x03, KEY_V)
 850                                          MATRIX_KEY(0x05, 0x04, KEY_X)
 851                                          MATRIX_KEY(0x05, 0x05, KEY_COMMA)
 852                                          MATRIX_KEY(0x05, 0x06, KEY_M)
 853                                          MATRIX_KEY(0x05, 0x07, KEY_LEFTSHIFT)
 854                                          MATRIX_KEY(0x05, 0x08, KEY_SLASH)
 855                                          MATRIX_KEY(0x05, 0x09, KEY_DOT)
 856                                          MATRIX_KEY(0x05, 0x0b, KEY_SPACE)
 857
 858                                          MATRIX_KEY(0x06, 0x01, KEY_1)
 859                                          MATRIX_KEY(0x06, 0x02, KEY_3)
 860                                          MATRIX_KEY(0x06, 0x03, KEY_4)
 861                                          MATRIX_KEY(0x06, 0x04, KEY_2)
 862                                          MATRIX_KEY(0x06, 0x05, KEY_8)
 863                                          MATRIX_KEY(0x06, 0x06, KEY_7)
 864                                          MATRIX_KEY(0x06, 0x08, KEY_0)
 865                                          MATRIX_KEY(0x06, 0x09, KEY_9)
 866                                          MATRIX_KEY(0x06, 0x0a, KEY_LEFTALT)
 867                                          MATRIX_KEY(0x06, 0x0b, KEY_DOWN)
 868                                          MATRIX_KEY(0x06, 0x0c, KEY_RIGHT)
 869
 870                                          MATRIX_KEY(0x07, 0x01, KEY_Q)
 871                                          MATRIX_KEY(0x07, 0x02, KEY_E)
 872                                          MATRIX_KEY(0x07, 0x03, KEY_R)
 873                                          MATRIX_KEY(0x07, 0x04, KEY_W)
 874                                          MATRIX_KEY(0x07, 0x05, KEY_I)
 875                                          MATRIX_KEY(0x07, 0x06, KEY_U)
 876                                          MATRIX_KEY(0x07, 0x07, KEY_RIGHTSHIFT)
 877                                          MATRIX_KEY(0x07, 0x08, KEY_P)
 878                                          MATRIX_KEY(0x07, 0x09, KEY_O)
 879                                          MATRIX_KEY(0x07, 0x0b, KEY_UP)
 880                                          MATRIX_KEY(0x07, 0x0c, KEY_LEFT)>;
 881                         };
 882                 };
 883         };
 884
 885         pmc@7000e400 {
 886                 nvidia,invert-interrupt;
 887                 nvidia,suspend-mode = <0>;
 888                 #wake-cells = <3>;
 889                 nvidia,cpu-pwr-good-time = <500>;
 890                 nvidia,cpu-pwr-off-time = <300>;
 891                 nvidia,core-pwr-good-time = <641 3845>;
 892                 nvidia,core-pwr-off-time = <61036>;
 893                 nvidia,core-power-req-active-high;
 894                 nvidia,sys-clock-req-active-high;
 895                 nvidia,reset-gpio = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>;
 896         };
 897
 898         usb@70090000 {
 899                 phys = <&{/padctl@7009f000/pads/usb2/lanes/usb2-0}>, /* 1st USB A */
 900                        <&{/padctl@7009f000/pads/usb2/lanes/usb2-1}>, /* Internal USB */
 901                        <&{/padctl@7009f000/pads/usb2/lanes/usb2-2}>, /* 2nd USB A */
 902                        <&{/padctl@7009f000/pads/pcie/lanes/pcie-0}>, /* 1st USB A */
 903                        <&{/padctl@7009f000/pads/pcie/lanes/pcie-1}>; /* 2nd USB A */
 904                 phy-names = "usb2-0", "usb2-1", "usb2-2", "usb3-0", "usb3-1";
 905
 906                 avddio-pex-supply = <&vdd_1v05_run>;
 907                 dvddio-pex-supply = <&vdd_1v05_run>;
 908                 avdd-usb-supply = <&vdd_3v3_lp0>;
 909                 hvdd-usb-ss-supply = <&vdd_3v3_lp0>;
 910
 911                 status = "okay";
 912         };
 913
 914         padctl@7009f000 {
 915                 avdd-pll-utmip-supply = <&vddio_1v8>;
 916                 avdd-pll-erefe-supply = <&avdd_1v05_run>;
 917                 avdd-pex-pll-supply = <&vdd_1v05_run>;
 918                 hvdd-pex-pll-e-supply = <&vdd_3v3_lp0>;
 919
 920                 pads {
 921                         usb2 {
 922                                 status = "okay";
 923
 924                                 lanes {
 925                                         usb2-0 {
 926                                                 nvidia,function = "xusb";
 927                                                 status = "okay";
 928                                         };
 929
 930                                         usb2-1 {
 931                                                 nvidia,function = "xusb";
 932                                                 status = "okay";
 933                                         };
 934
 935                                         usb2-2 {
 936                                                 nvidia,function = "xusb";
 937                                                 status = "okay";
 938                                         };
 939                                 };
 940                         };
 941
 942                         pcie {
 943                                 status = "okay";
 944
 945                                 lanes {
 946                                         pcie-0 {
 947                                                 nvidia,function = "usb3-ss";
 948                                                 status = "okay";
 949                                         };
 950
 951                                         pcie-1 {
 952                                                 nvidia,function = "usb3-ss";
 953                                                 status = "okay";
 954                                         };
 955                                 };
 956                         };
 957                 };
 958
 959                 ports {
 960                         usb2-0 {
 961                                 status = "okay";
 962                                 mode = "otg";
 963
 964                                 vbus-supply = <&vdd_usb1_vbus>;
 965                         };
 966
 967                         usb2-1 {
 968                                 status = "okay";
 969                                 mode = "host";
 970
 971                                 vbus-supply = <&vdd_run_cam>;
 972                         };
 973
 974                         usb2-2 {
 975                                 status = "okay";
 976                                 mode = "host";
 977
 978                                 vbus-supply = <&vdd_usb3_vbus>;
 979                         };
 980
 981                         usb3-0 {
 982                                 nvidia,usb2-companion = <0>;
 983                                 status = "okay";
 984                         };
 985
 986                         usb3-1 {
 987                                 nvidia,usb2-companion = <2>;
 988                                 status = "okay";
 989                         };
 990                 };
 991         };
 992
 993         /* WIFI/BT module */
 994         mmc@700b0000 {
 995                 status = "disabled";
 996         };
 997
 998         /* external SD/MMC */
 999         mmc@700b0400 {
1000                 cd-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>;
1001                 power-gpios = <&gpio TEGRA_GPIO(R, 0) GPIO_ACTIVE_HIGH>;
1002                 wp-gpios = <&gpio TEGRA_GPIO(Q, 4) GPIO_ACTIVE_HIGH>;
1003                 status = "okay";
1004                 bus-width = <4>;
1005                 vqmmc-supply = <&vddio_sdmmc3>;
1006         };
1007
1008         /* EMMC 4.51 */
1009         mmc@700b0600 {
1010                 status = "okay";
1011                 bus-width = <8>;
1012                 non-removable;
1013         };
1014
1015         backlight: backlight {
1016                 compatible = "pwm-backlight";
1017
1018                 enable-gpios = <&gpio TEGRA_GPIO(H, 2) GPIO_ACTIVE_HIGH>;
1019                 power-supply = <&vdd_led>;
1020                 pwms = <&pwm 1 1000000>;
1021
1022                 brightness-levels = <0 4 8 16 32 64 128 255>;
1023                 default-brightness-level = <6>;
1024
1025                 backlight-boot-off;
1026         };
1027
1028         clk32k_in: clock@0 {
1029                 compatible = "fixed-clock";
1030                 clock-frequency = <32768>;
1031                 #clock-cells = <0>;
1032         };
1033
1034         gpio-keys {
1035                 compatible = "gpio-keys";
1036
1037                 lid {
1038                         label = "Lid";
1039                         gpios = <&gpio TEGRA_GPIO(R, 4) GPIO_ACTIVE_LOW>;
1040                         linux,input-type = <5>;
1041                         linux,code = <0>;
1042                         debounce-interval = <1>;
1043                         wakeup-source;
1044                 };
1045
1046                 power {
1047                         label = "Power";
1048                         gpios = <&gpio TEGRA_GPIO(Q, 0) GPIO_ACTIVE_LOW>;
1049                         linux,code = <KEY_POWER>;
1050                         debounce-interval = <10>;
1051                         wakeup-source;
1052                 };
1053         };
1054
1055         panel: panel {
1056                 compatible = "innolux,n116bge";
1057                 power-supply = <&vdd_3v3_panel>;
1058                 backlight = <&backlight>;
1059                 ddc-i2c-bus = <&dpaux>;
1060         };
1061
1062         vdd_mux: regulator@0 {
1063                 compatible = "regulator-fixed";
1064                 regulator-name = "+VDD_MUX";
1065                 regulator-min-microvolt = <19000000>;
1066                 regulator-max-microvolt = <19000000>;
1067                 regulator-always-on;
1068                 regulator-boot-on;
1069         };
1070
1071         vdd_5v0_sys: regulator@1 {
1072                 compatible = "regulator-fixed";
1073                 regulator-name = "+5V_SYS";
1074                 regulator-min-microvolt = <5000000>;
1075                 regulator-max-microvolt = <5000000>;
1076                 regulator-always-on;
1077                 regulator-boot-on;
1078                 vin-supply = <&vdd_mux>;
1079         };
1080
1081         vdd_3v3_sys: regulator@2 {
1082                 compatible = "regulator-fixed";
1083                 regulator-name = "+3.3V_SYS";
1084                 regulator-min-microvolt = <3300000>;
1085                 regulator-max-microvolt = <3300000>;
1086                 regulator-always-on;
1087                 regulator-boot-on;
1088                 vin-supply = <&vdd_mux>;
1089         };
1090
1091         vdd_3v3_run: regulator@3 {
1092                 compatible = "regulator-fixed";
1093                 regulator-name = "+3.3V_RUN";
1094                 regulator-min-microvolt = <3300000>;
1095                 regulator-max-microvolt = <3300000>;
1096                 regulator-always-on;
1097                 regulator-boot-on;
1098                 gpio = <&as3722 1 GPIO_ACTIVE_HIGH>;
1099                 enable-active-high;
1100                 vin-supply = <&vdd_3v3_sys>;
1101         };
1102
1103         vdd_3v3_hdmi: regulator@4 {
1104                 compatible = "regulator-fixed";
1105                 regulator-name = "+3.3V_AVDD_HDMI_AP_GATED";
1106                 regulator-min-microvolt = <3300000>;
1107                 regulator-max-microvolt = <3300000>;
1108                 vin-supply = <&vdd_3v3_run>;
1109         };
1110
1111         vdd_led: regulator@5 {
1112                 compatible = "regulator-fixed";
1113                 regulator-name = "+VDD_LED";
1114                 regulator-min-microvolt = <3300000>;
1115                 regulator-max-microvolt = <3300000>;
1116                 gpio = <&gpio TEGRA_GPIO(P, 2) GPIO_ACTIVE_HIGH>;
1117                 enable-active-high;
1118                 vin-supply = <&vdd_mux>;
1119         };
1120
1121         vdd_usb1_vbus: regulator@6 {
1122                 compatible = "regulator-fixed";
1123                 regulator-name = "+5V_USB_HS";
1124                 regulator-min-microvolt = <5000000>;
1125                 regulator-max-microvolt = <5000000>;
1126                 gpio = <&gpio TEGRA_GPIO(N, 4) GPIO_ACTIVE_HIGH>;
1127                 enable-active-high;
1128                 gpio-open-drain;
1129                 vin-supply = <&vdd_5v0_sys>;
1130         };
1131
1132         vdd_usb3_vbus: regulator@7 {
1133                 compatible = "regulator-fixed";
1134                 regulator-name = "+5V_USB_SS";
1135                 regulator-min-microvolt = <5000000>;
1136                 regulator-max-microvolt = <5000000>;
1137                 gpio = <&gpio TEGRA_GPIO(N, 5) GPIO_ACTIVE_HIGH>;
1138                 enable-active-high;
1139                 gpio-open-drain;
1140                 vin-supply = <&vdd_5v0_sys>;
1141         };
1142
1143         vdd_3v3_panel: regulator@8 {
1144                 compatible = "regulator-fixed";
1145                 regulator-name = "+3.3V_PANEL";
1146                 regulator-min-microvolt = <3300000>;
1147                 regulator-max-microvolt = <3300000>;
1148                 gpio = <&as3722 4 GPIO_ACTIVE_HIGH>;
1149                 enable-active-high;
1150                 vin-supply = <&vdd_3v3_sys>;
1151         };
1152
1153         vdd_hdmi_pll: regulator@9 {
1154                 compatible = "regulator-fixed";
1155                 regulator-name = "+1.05V_RUN_AVDD_HDMI_PLL_AP_GATE";
1156                 regulator-min-microvolt = <1050000>;
1157                 regulator-max-microvolt = <1050000>;
1158                 gpio = <&gpio TEGRA_GPIO(H, 7) GPIO_ACTIVE_LOW>;
1159                 vin-supply = <&vdd_1v05_run>;
1160         };
1161
1162         vdd_5v0_hdmi: regulator@10 {
1163                 compatible = "regulator-fixed";
1164                 regulator-name = "+5V_HDMI_CON";
1165                 regulator-min-microvolt = <5000000>;
1166                 regulator-max-microvolt = <5000000>;
1167                 gpio = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_HIGH>;
1168                 enable-active-high;
1169                 vin-supply = <&vdd_5v0_sys>;
1170         };
1171
1172         vdd_5v0_ts: regulator@11 {
1173                 compatible = "regulator-fixed";
1174                 regulator-name = "+5V_VDD_TS";
1175                 regulator-min-microvolt = <5000000>;
1176                 regulator-max-microvolt = <5000000>;
1177                 regulator-always-on;
1178                 regulator-boot-on;
1179                 gpio = <&gpio TEGRA_GPIO(K, 1) GPIO_ACTIVE_HIGH>;
1180                 enable-active-high;
1181         };
1182
1183         vdd_3v3_lp0: regulator@12 {
1184                 compatible = "regulator-fixed";
1185                 regulator-name = "+3.3V_LP0";
1186                 regulator-min-microvolt = <3300000>;
1187                 regulator-max-microvolt = <3300000>;
1188                 /*
1189                  * TODO: find a way to wire this up with the USB EHCI
1190                  * controllers so that it can be enabled on demand.
1191                  */
1192                 regulator-always-on;
1193                 gpio = <&as3722 2 GPIO_ACTIVE_HIGH>;
1194                 enable-active-high;
1195                 vin-supply = <&vdd_3v3_sys>;
1196         };
1197 };