arch/arm64/boot/dts/mediatek/mt8183-kukui-krane.dtsi

   1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
   2 /*
   3  * Copyright 2019 Google LLC
   4  */
   5
   6 #include "mt8183-kukui.dtsi"
   7
   8 / {
   9         ppvarn_lcd: ppvarn-lcd {
  10                 compatible = "regulator-fixed";
  11                 regulator-name = "ppvarn_lcd";
  12                 pinctrl-names = "default";
  13                 pinctrl-0 = <&ppvarn_lcd_en>;
  14
  15                 enable-active-high;
  16
  17                 gpio = <&pio 66 GPIO_ACTIVE_HIGH>;
  18         };
  19
  20         ppvarp_lcd: ppvarp-lcd {
  21                 compatible = "regulator-fixed";
  22                 regulator-name = "ppvarp_lcd";
  23                 pinctrl-names = "default";
  24                 pinctrl-0 = <&ppvarp_lcd_en>;
  25
  26                 enable-active-high;
  27
  28                 gpio = <&pio 166 GPIO_ACTIVE_HIGH>;
  29         };
  30
  31         pp1800_lcd: pp1800-lcd {
  32                 compatible = "regulator-fixed";
  33                 regulator-name = "pp1800_lcd";
  34                 pinctrl-names = "default";
  35                 pinctrl-0 = <&pp1800_lcd_en>;
  36
  37                 enable-active-high;
  38
  39                 gpio = <&pio 36 GPIO_ACTIVE_HIGH>;
  40         };
  41 };
  42
  43 &bluetooth {
  44         firmware-name = "nvm_00440302_i2s_eu.bin";
  45 };
  46
  47 &i2c0 {
  48         status = "okay";
  49
  50         touchscreen4: touchscreen@5d {
  51                 compatible = "hid-over-i2c";
  52                 reg = <0x5d>;
  53                 pinctrl-names = "default";
  54                 pinctrl-0 = <&open_touch>;
  55
  56                 interrupt-parent = <&pio>;
  57                 interrupts = <155 IRQ_TYPE_EDGE_FALLING>;
  58
  59                 post-power-on-delay-ms = <10>;
  60                 hid-descr-addr = <0x0001>;
  61         };
  62 };
  63
  64 &mt6358_vcama2_reg {
  65         regulator-min-microvolt = <2800000>;
  66         regulator-max-microvolt = <2800000>;
  67 };
  68
  69 &i2c2 {
  70         pinctrl-names = "default";
  71         pinctrl-0 = <&i2c2_pins>;
  72         status = "okay";
  73         clock-frequency = <400000>;
  74
  75         eeprom@58 {
  76                 compatible = "atmel,24c32";
  77                 reg = <0x58>;
  78                 pagesize = <32>;
  79         };
  80 };
  81
  82 &i2c4 {
  83         pinctrl-names = "default";
  84         pinctrl-0 = <&i2c4_pins>;
  85         status = "okay";
  86         clock-frequency = <400000>;
  87
  88         eeprom@54 {
  89                 compatible = "atmel,24c32";
  90                 reg = <0x54>;
  91                 pagesize = <32>;
  92         };
  93 };
  94
  95 &pio {
  96         /* 192 lines */
  97         gpio-line-names =
  98                 "SPI_AP_EC_CS_L",
  99                 "SPI_AP_EC_MOSI",
 100                 "SPI_AP_EC_CLK",
 101                 "I2S3_DO",
 102                 "USB_PD_INT_ODL",
 103                 "",
 104                 "",
 105                 "",
 106                 "",
 107                 "IT6505_HPD_L",
 108                 "I2S3_TDM_D3",
 109                 "SOC_I2C6_1V8_SCL",
 110                 "SOC_I2C6_1V8_SDA",
 111                 "DPI_D0",
 112                 "DPI_D1",
 113                 "DPI_D2",
 114                 "DPI_D3",
 115                 "DPI_D4",
 116                 "DPI_D5",
 117                 "DPI_D6",
 118                 "DPI_D7",
 119                 "DPI_D8",
 120                 "DPI_D9",
 121                 "DPI_D10",
 122                 "DPI_D11",
 123                 "DPI_HSYNC",
 124                 "DPI_VSYNC",
 125                 "DPI_DE",
 126                 "DPI_CK",
 127                 "AP_MSDC1_CLK",
 128                 "AP_MSDC1_DAT3",
 129                 "AP_MSDC1_CMD",
 130                 "AP_MSDC1_DAT0",
 131                 "AP_MSDC1_DAT2",
 132                 "AP_MSDC1_DAT1",
 133                 "",
 134                 "",
 135                 "",
 136                 "",
 137                 "",
 138                 "",
 139                 "OTG_EN",
 140                 "DRVBUS",
 141                 "DISP_PWM",
 142                 "DSI_TE",
 143                 "LCM_RST_1V8",
 144                 "AP_CTS_WIFI_RTS",
 145                 "AP_RTS_WIFI_CTS",
 146                 "SOC_I2C5_1V8_SCL",
 147                 "SOC_I2C5_1V8_SDA",
 148                 "SOC_I2C3_1V8_SCL",
 149                 "SOC_I2C3_1V8_SDA",
 150                 "",
 151                 "",
 152                 "",
 153                 "",
 154                 "",
 155                 "",
 156                 "",
 157                 "",
 158                 "",
 159                 "",
 160                 "",
 161                 "",
 162                 "",
 163                 "",
 164                 "",
 165                 "",
 166                 "",
 167                 "",
 168                 "",
 169                 "",
 170                 "",
 171                 "",
 172                 "",
 173                 "",
 174                 "",
 175                 "",
 176                 "",
 177                 "",
 178                 "",
 179                 "SOC_I2C1_1V8_SDA",
 180                 "SOC_I2C0_1V8_SDA",
 181                 "SOC_I2C0_1V8_SCL",
 182                 "SOC_I2C1_1V8_SCL",
 183                 "AP_SPI_H1_MISO",
 184                 "AP_SPI_H1_CS_L",
 185                 "AP_SPI_H1_MOSI",
 186                 "AP_SPI_H1_CLK",
 187                 "I2S5_BCK",
 188                 "I2S5_LRCK",
 189                 "I2S5_DO",
 190                 "BOOTBLOCK_EN_L",
 191                 "MT8183_KPCOL0",
 192                 "SPI_AP_EC_MISO",
 193                 "UART_DBG_TX_AP_RX",
 194                 "UART_AP_TX_DBG_RX",
 195                 "I2S2_MCK",
 196                 "I2S2_BCK",
 197                 "CLK_5M_WCAM",
 198                 "CLK_2M_UCAM",
 199                 "I2S2_LRCK",
 200                 "I2S2_DI",
 201                 "SOC_I2C2_1V8_SCL",
 202                 "SOC_I2C2_1V8_SDA",
 203                 "SOC_I2C4_1V8_SCL",
 204                 "SOC_I2C4_1V8_SDA",
 205                 "",
 206                 "SCL8",
 207                 "SDA8",
 208                 "FCAM_PWDN_L",
 209                 "",
 210                 "",
 211                 "",
 212                 "",
 213                 "",
 214                 "",
 215                 "",
 216                 "",
 217                 "",
 218                 "",
 219                 "",
 220                 "",
 221                 "",
 222                 "",
 223                 "",
 224                 "",
 225                 "",
 226                 "",
 227                 "",
 228                 "",
 229                 "",
 230                 "",
 231                 "",
 232                 "",
 233                 "",
 234                 "I2S_PMIC",
 235                 "I2S_PMIC",
 236                 "I2S_PMIC",
 237                 "I2S_PMIC",
 238                 "I2S_PMIC",
 239                 "I2S_PMIC",
 240                 "I2S_PMIC",
 241                 "I2S_PMIC",
 242                 "",
 243                 "",
 244                 "",
 245                 "",
 246                 "",
 247                 "",
 248                 /*
 249                  * AP_FLASH_WP_L is crossystem ABI. Rev1 schematics
 250                  * call it BIOS_FLASH_WP_R_L.
 251                  */
 252                 "AP_FLASH_WP_L",
 253                 "EC_AP_INT_ODL",
 254                 "IT6505_INT_ODL",
 255                 "H1_INT_OD_L",
 256                 "",
 257                 "",
 258                 "",
 259                 "",
 260                 "",
 261                 "",
 262                 "",
 263                 "AP_SPI_FLASH_MISO",
 264                 "AP_SPI_FLASH_CS_L",
 265                 "AP_SPI_FLASH_MOSI",
 266                 "AP_SPI_FLASH_CLK",
 267                 "DA7219_IRQ",
 268                 "",
 269                 "",
 270                 "",
 271                 "",
 272                 "",
 273                 "",
 274                 "",
 275                 "",
 276                 "",
 277                 "",
 278                 "",
 279                 "",
 280                 "",
 281                 "",
 282                 "",
 283                 "",
 284                 "",
 285                 "",
 286                 "",
 287                 "",
 288                 "",
 289                 "",
 290                 "",
 291                 "",
 292                 "",
 293                 "";
 294
 295         ppvarp_lcd_en: ppvarp-lcd-en {
 296                 pins1 {
 297                         pinmux = <PINMUX_GPIO66__FUNC_GPIO66>;
 298                         output-low;
 299                 };
 300         };
 301
 302         ppvarn_lcd_en: ppvarn-lcd-en {
 303                 pins1 {
 304                         pinmux = <PINMUX_GPIO166__FUNC_GPIO166>;
 305                         output-low;
 306                 };
 307         };
 308
 309         pp1800_lcd_en: pp1800-lcd-en {
 310                 pins1 {
 311                         pinmux = <PINMUX_GPIO36__FUNC_GPIO36>;
 312                         output-low;
 313                 };
 314         };
 315
 316         open_touch: open_touch {
 317                 irq_pin {
 318                         pinmux = <PINMUX_GPIO155__FUNC_GPIO155>;
 319                         input-enable;
 320                         bias-pull-up;
 321                 };
 322
 323                 rst_pin {
 324                         pinmux = <PINMUX_GPIO156__FUNC_GPIO156>;
 325
 326                         /*
 327                          * The pen driver doesn't currently support  driving
 328                          * this reset line.  By specifying output-high here
 329                          * we're relying on the fact that this pin has a default
 330                          * pulldown at boot (which makes sure the pen was in
 331                          * reset if it was powered) and then we set it high here
 332                          * to take it out of reset.  Better would be if the pen
 333                          * driver could control this and we could remove
 334                          * "output-high" here.
 335                          */
 336                         output-high;
 337                 };
 338         };
 339 };
 340
 341 &qca_wifi {
 342         qcom,ath10k-calibration-variant = "LE_Krane";
 343 };